Capacitor array for a high-speed communication unit
The capacitor arrangement with angled branched contact areas on a carrier plate addresses interference and space inefficiency, ensuring efficient and cost-effective high-speed communication by minimizing electromagnetic interference and optimizing signal paths.
Patent Information
- Authority / Receiving Office
- DE · DE
- Patent Type
- Patents
- Current Assignee / Owner
- MERCEDES BENZ GROUP AG
- Filing Date
- 2024-12-19
- Publication Date
- 2026-05-07
AI Technical Summary
Existing capacitor arrangements in high-speed communication units face interference issues and are not cost-effective, particularly due to electromagnetic interference and inefficient use of space.
A capacitor arrangement with branched contact areas on a carrier plate, positioned at predetermined angles, minimizes electromagnetic interference and optimizes signal paths, using two capacitors per channel with overlapping and separated terminals to maintain signal integrity and reduce space requirements.
The solution ensures efficient, reliable, and cost-effective high-speed communication by reducing electromagnetic interference and optimizing signal paths, while allowing flexible channel selection without altering hardware layout.
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Abstract
Description
[0001] The invention relates to a capacitor arrangement for a high-speed communication unit, comprising at least two capacitors for filtering a DC component from an AC signal, wherein the high-speed communication takes place via two separate communication channels, both of which are connected to the same terminal of a signal driver.
[0002] It is known that AC coupling capacitors are used in high-frequency communication to filter out the DC component of the signal.
[0003] US Patent 2021 / 0194721 A1 discloses a communication device with a high-speed communication bus coupled to a high-speed communication processor and configured to transmit communication signals over the bus to a second high-speed communication processor. An isolation circuit for the bus includes a first terminal connected to the bus and configured to receive a first communication signal from the first processor over the bus.
[0004] The isolation circuit is designed to match the impedances between the isolation circuit and the bus, to isolate the series inductance connected to the first terminal, and to protect the first terminal from overvoltage faults while maintaining signal integrity. The communication signal is then routed from the first terminal to a second terminal connected to the high-speed communication bus. The isolation circuit includes a capacitor bank with multiple capacitors for galvanic isolation of the first terminal. The transmission of the communication signal involves passing a low-frequency signal coupled to the first communication signal through a first resistor and then passing a high-frequency component of the communication signal through the capacitor bank.
[0005] Furthermore, US 2010 / 0 329 391 A1 discloses a device for information detection using a capacitor arrangement, and DE 44 26 908 A1 describes a method and arrangement for galvanic isolation of two signal circuits using a capacitor.
[0006] The object of the invention is to provide a capacitor arrangement for a high-speed communication unit which largely avoids interference with the communication signals and is nevertheless cost-effective to manufacture.
[0007] The invention is defined by the features of the independent claims. Advantageous further developments and embodiments are the subject of the dependent claims. Further features, applications, and advantages of the invention will become apparent from the following description and the explanation of exemplary embodiments of the invention illustrated in the figures.
[0008] The problem is solved by means of the subject matter of claim 1.
[0009] In the capacitor arrangement described above for a high-speed communication unit, comprising at least two capacitors for filtering a DC component from an AC signal, wherein the high-speed communication takes place via two separate communication channels, both of which are connected to the same terminal of a signal driver, two contact areas for each of the at least two capacitors are formed in a branched shape on one side of an electrical carrier plate, which are aligned at a predetermined angle to each other, wherein two overlapping contact areas of two adjacent capacitors facing each other can be coupled to the terminal of the signal driver, while the contact areas facing away from each other can each be connected to one of the communication channels.This minimizes the lengths of the branches, each with two contact areas, adjusts the impedance, and optimizes the signal paths, thus preserving signal integrity. Placing the capacitors on the same side of the carrier plate prevents electromagnetic interference caused by an "antenna effect" on the capacitor array. High-speed signal communication in a vehicle can therefore be efficient, reliable, and performant.
[0010] In one embodiment, the contact areas for an electrical connection of at least two capacitors are arranged such that the capacitors are connected via one of their capacitor terminals, while the other capacitor terminals are separated from each other, with the connected capacitor terminals being coupled to the signal driver connection. Positioning the contact areas on the same side of the substrate minimizes parasitic effects, as it eliminates the need to introduce additional signal traces within the circuit board.
[0011] In a further embodiment, the contact areas for two capacitors are positioned at a 90° angle to each other, with the opposing contact areas overlapping. Besides further optimizing signal integrity through the angular positioning of the branches containing the contact areas, the space required for the capacitor arrangement is reduced, and circuit sections before and after the capacitor arrangement can be used for multiple capacitors.
[0012] In a further embodiment, the branches of the contact areas form an M-shaped chain, with each pair of consecutive branches arranged at a 90° angle to each other. This allows multiple signal paths to be routed through the capacitor array to the downstream circuitry. This enables flexible selection of the required channel without altering the hardware layout.
[0013] In a further embodiment, two capacitor arrangements are positioned in the high-speed communication unit to form two interference-free communication channels. Each capacitor arrangement has contact areas for four capacitors, and only the parallel contact areas in each arrangement are fitted with capacitors. Thus, a signal path for a pair of differential signals can be configured via one of the capacitor arrangements.
[0014] In a further embodiment, each capacitor arrangement is designed as a module. This simplifies its positioning in circuit layouts. For example, if only one channel is needed, the other channel can be used for other applications. The described layout design can be used cost-effectively for all vehicle lines of a vehicle manufacturer, with the capacitor placement option serving as the dividing point.
[0015] Further advantages, features, and details will become apparent from the following description, in which at least one embodiment is described in detail. The described features can, individually or in any meaningful combination, constitute the subject matter of the invention, optionally also independently of the claims, and can, in particular, also be the subject matter of one or more separate applications.
[0016] This shows: Fig. 1: an embodiment of the capacitor unit according to the invention, Fig. 2: a schematic representation of a design of the contact areas of the capacitors, Fig. 3: An embodiment of the use of the capacitor unit in a device for symmetrical signal transmission.
[0017] In Fig. Figure 1 shows an embodiment of the capacitor unit according to the invention, as it can be used, for example, in high-speed communication units with symmetrical signal transmission. The modular capacitor unit 1 comprises a printed circuit board 3 on which four capacitors C1, C2, C3, and C4 are positioned together on one side 5 of the printed circuit board 3. The following description considers only four capacitors. However, this does not represent a limitation. The capacitor unit 1 can also carry additional capacitors (not shown) on the same side 5 of the printed circuit board 3. Each capacitor C1, C2, C3, and C4 has two electrical terminals 7 and 9, which are electrically connected to a contact area 11 formed on the printed circuit board 3 during the assembly of the capacitors C1, C2, C3, and C4.
[0018] A schematic diagram of the design of the contact areas of capacitors C1, C2, C3, C4 is shown in Fig. Figure 2 shows that the contact areas 13, 15 belonging to each capacitor C1, C2, C3, C4 form a straight branch 17, with the first contact area 13 carrying the input signal and the second contact area 15 of each branch 17 providing an output signal. The branches 17 are arranged in a chain, with the contact areas 15 of adjacent branches 17 overlapping and being electrically coupled to each other. Furthermore, each pair of adjacent branches 17 is angled at 90° to each other.
[0019] Fig. Figure 3 shows an embodiment of the capacitor unit's use in a device for symmetrical signal transmission. Two of the capacitors shown in Figure 3 are used to transmit two differential signals (Diff_P and Diff_N). Fig. Capacitor units 1 shown in 3a are used. According to Fig. In version 3b, for type A, circuit board 3 is populated only with capacitors C5 and C7, while the branches intended for capacitors C6 and C8 remain unpopulated. The signals (Diff_P and Diff_N) are only routed through capacitors C5 and C7.
[0020] In type B, the branches 17 intended for capacitors C9 and C11 remain unpopulated, while capacitors C10 and C12 are connected to contact points 13 and 15 of the corresponding branches 17. The differential signals Diff_P and Diff_N are routed via capacitors C10 and C12.
Claims
[1] Capacitor arrangement (1) for a high-speed communication unit, comprising at least two capacitors (C1, C2, C3, C4) for filtering a DC component from an AC signal, wherein the high-speed communication takes place via two separate communication channels (Diff_P; DIFF_N), both of which are connected to the same terminal of a signal driver, on one side of an electrical circuit board (3) two contact areas (13, 15) belonging to a capacitor (C1, C2, C3, C4) form a straight extending branch (17), wherein the branches (17) are aligned at a predetermined angle to each other and two facing, overlapping contact areas (15) of two adjacent branches (17) can be coupled to the terminal of the signal driver, while the contact areas (13) facing away from each other can each be connected to one of the communication channels. where [2] Capacitor arrangement according to claim 1, characterized by , that the contact areas (13, 15) for an electrical connection of at least two capacitors (C1, C2, C3, C4) are arranged such that the capacitors (C1, C2, C3, C4) are connected via one of their capacitor terminals (7, 9) each, while the other capacitor terminals (7, 9) are separated from each other, wherein the interconnected capacitor terminals (7, 9) are coupled to the connection of the signal driver. [3] Capacitor arrangement according to claim 2, characterized by , that the branches (17) carrying the contact areas (13, 15) of two capacitors (C1, C2, C3, C4) are at an angle of 90° to each other, with the contact areas (15) facing each other overlapping. [4] Capacitor arrangement according to claim 3, characterized by, that the branches (17) of the contact areas (13, 15) form an M-shaped chain, wherein two successive branches (17) of the contact areas (C1, C2, C3, C4) are always arranged at an angle of 90° to each other.
Citation Information
Patent Citations
Electrical isolation of two signal circuits for SMD on PCB
DE4426908A1
Information detecting apparatus and method
US20100329391A1
System, method, and apparatus providing isolation for a high-speed communication interface with optimized signal integrity
US20210194721A1