Method for operating a gate driver, a gate driver, a drive assembly, a powertrain and a motor vehicle

Abstract

The invention relates to a method for operating a driver (1) for an arrangement of electrical components (2, 8), wherein a first electrical component (2) is controlled by a first PWM signal (4) with a first frequency (5); wherein a second PWM signal (6) with a second frequency (7) higher than the first frequency (5) is generated in the driver (1); wherein a second electrical component is controlled by the second PWM signal (6) and thereby an output capacitor (9) is charged; wherein, on a rising edge (11) of a first pulse (12) of the first PWM signal (4), a first current signal (13) with a first voltage (14) from the output capacitor (9) is applied to the first component.

Description

[0001] The invention relates to a method for operating a (gate) driver, a (gate) driver, a drive assembly, a drive train and a motor vehicle.

[0002] A gate driver (also called a gate driver, flyback converter or flyback controller) is an isolated power supply that is usually used in converters (e.g. inverters, i.e. converters / inverters, or also in DC-DC converters) which are intended, for example, for traction drives.

[0003] The converter transforms, for example, the direct current drawn from a traction battery into alternating current or into a higher-voltage direct current, and uses this to power a traction drive. Within the converter, the energy or power required to drive the traction drive is converted and supplied via power electronics.

[0004] The energy or power is typically regulated by a microcontroller, which provides a (first) PWM (pulse-width modulated) signal on a low-voltage side (primary side). This low-voltage PWM signal is converted by the gate driver into a gate signal on a high-voltage side (secondary side), which then controls the gate of a power switch. As a result of this gate signal, the power switch is activated, supplying the current required to drive the traction motor.

[0005] A gate driver sends the (first) PWM signal, electrically isolated from the converter's microcontroller, to the gate of a power switch (e.g., IGBT / SiC / GaN) (IGBT - Insulated Gate Bipolar Transistor; SiC - silicon carbide; GaN - gallium nitride). Gate drivers thus protect people and equipment from the dangers of electric shock. To achieve this, the gate driver generates a positive and a negative output voltage for the power switch on the high-voltage side, so that the gate is either opened (the gate driver provides a positive (first) voltage for the gate) or closed (the gate driver provides a negative (second) voltage for the gate), depending on the first PWM signal from the microcontroller on the low-voltage side.

[0006] This positive (first) voltage and negative (second) voltage are generated by a separate control unit of the gate driver. The energy required to switch the gate is stored in so-called (buffer) output capacitors of this control unit. To charge these output capacitors, the control unit is driven on a low-voltage side with its own second PWM signal. This signal is transmitted to a galvanically isolated high-voltage side and charges the output capacitors located there. This second PWM signal has a significantly higher (constant) frequency than the first PWM signal. The second PWM signal can have a constant pulse duration and correspondingly a constant pause duration, or it can have load-dependent variable pulse durations and pause durations.

[0007] The gate driver has a low-voltage and a high-voltage side that are galvanically isolated from each other. Gate drivers enable the provision of high current for switching power switches, so that even SiC and IGBT power switches designed for several hundred kilowatts of drive power can be switched without the need for an additional external buffer.

[0008] A gate driver is generally provided as a separate electronic component. Modern and future generations of IGBT / SiC gate drivers integrate the gate driver circuitry within the IC chip (IC internal controller), thus eliminating the need for a separate chip and its associated package.

[0009] The secondary-side (high-voltage) regulation of the gate driver is used to generate a precise output voltage (first voltage or second voltage). During power-on, large currents (several tens of amperes) are drawn from the gate driver, specifically its high-voltage side. Therefore, large capacitance values ​​in the range of several tens of microfarads are required on the high-voltage side for stabilization and to minimize voltage drops. These capacitances are also known as (buffer) output capacitors.

[0010] One problem with existing gate drivers is that when a power module or power switch is turned on, the gate current causes a voltage drop across the output capacitors. Conventional gate drivers therefore require large output capacitors. If the capacitors are undersized, the voltage required to switch the gate may not be sufficient. Consequently, the required traction drive power cannot be supplied. The considerable size and weight of these capacitors can significantly increase their cost. Furthermore, the large output capacitance can negatively impact the gate driver's performance. It can impair the transient response and lead to slower voltage regulation.

[0011] A similar problem arises with the power output of DC-DC converters. Here, the voltage of a battery is regulated by the DC-DC converter to a voltage required for operating an electric motor. Furthermore, the electrical power is supplied to the motor as needed. A bridge rectifier is typically used to control the motor, which is driven by an initial PWM signal from a control unit. An output capacitor (or multiple capacitors) is usually placed between the converter and the bridge rectifier, from which additional energy can be supplied. If the capacitors are undersized, the power required to operate the motor may not be available immediately.

[0012] The object of the present invention is to at least partially solve the problems cited with reference to the prior art. In particular, a method for operating a gate driver is to be proposed which, on the one hand, ensures the gate is switched and, on the other hand, reduces the cost of the gate driver. In particular, a method for operating a driver is to be proposed which reduces or prevents any possible delay in the power supply to an electric motor.

[0013] A method with the features according to claim 1 contributes to solving these problems. Advantageous further developments are the subject of the dependent claims. The features listed individually in the claims can be combined in a technologically meaningful way and can be supplemented by explanatory facts from the description and / or details from the figures, thereby showing further embodiments of the invention.

[0014] A method for operating a driver for an arrangement of electrical components is proposed, wherein a first electrical component is controlled by a first PWM signal with a (constant or varying) first frequency. The driver generates a second PWM signal with a (constant or varying) second frequency that is (always) higher than the first frequency. The second PWM signal controls a second electrical component, thereby charging an output capacitor. Upon a rising edge of the first pulse of the first PWM signal, a first current signal with a first voltage from the output capacitor is applied to the first component. The method comprises the following steps: a) Generating the second PWM signal with (a multitude of successive) second pulses, wherein the second pulses have a (constant) first pulse duration; b) Determine that the rising edge of the first PWM signal begins; (and immediately thereafter) c) Changing the second PWM signal by extending the first pulse duration to a (constant) second pulse duration.

[0015] The driver is specifically designed for controlling an array of electrical components (e.g., a DC-DC converter and a bridge) and includes a control unit. The driver can receive or generate a first PWM signal with a first frequency and generates a second PWM signal with a second frequency higher than the first. The first PWM signal controls the bridge (as the first electrical component), as described above. The second PWM signal controls the converter (as the second electrical component). A capacitor located between the converter and the bridge can be charged via the converter. This charging process can be controlled in a targeted manner based on the first PWM signal. The second PWM signal is modulated in response to the first PWM signal.

[0016] The driver is a component of a drive assembly that includes at least one electric motor, one converter, and one bridge rectifier. The DC-DC converter serves to convert and transfer energy from a battery to the electric motor. The drive assembly includes a control unit that regulates the current transferred from the converter to the motor. The drive assembly features a driver suitable for controlling the drive assembly, specifically the converter and the bridge rectifier.

[0017] In particular, or alternatively, the driver is a gate driver (also called a gate driver, flyback converter, or gate controller) designed to control the gate (as the electrical first component) of a power switch. The gate of the power switch is controlled via the gate driver. The gate is driven by the first PWM signal at the first frequency. The second PWM signal at the second frequency is generated within the gate driver. This second PWM signal then drives a circuit (as the electrical second component) of the gate driver, which includes at least a first output capacitor and a second output capacitor, to charge the output capacitors.

[0018] A method for operating a gate driver is proposed. The gate driver controls the gate of a power switch (e.g., IGBT / SiC / GaN). The gate is driven by a first PWM signal with a (constant or varying) first frequency. A second PWM signal with a (constant or varying) second frequency, always higher than the first, is generated within the gate driver. This second PWM signal is used to charge a circuit within the gate driver, which includes at least a first output capacitor and a second output capacitor.

[0019] On a rising edge of the first pulse of the first PWM signal, a first current signal with a first voltage from the first output capacitor is applied to the gate, and on a falling edge of the first pulse, a second current signal with a second voltage from the second output capacitor is applied.

[0020] Starting from an initial state in which there is a pause between two initial impulses, the procedure comprises at least the following steps: a) Generating the second PWM signal with (a multitude of successive) second pulses, wherein the second pulses have a (constant) first pulse duration; b) Determine that the rising edge of the first PWM signal begins; (and immediately thereafter) c) Changing the second PWM signal by extending the first pulse duration to a (constant) second pulse duration.

[0021] Alternatively or additionally, the procedure includes at least the following steps, starting from a second state in which the first impulse is (already) present: x) Generating the second PWM signal with (a plurality of successive) second pulses, wherein the second pulses have a first pulse duration; y) Determine that the descending edge of the first PWM signal begins; z) Changing the second PWM signal by extending the first pulse duration to a second pulse duration.

[0022] In particular, a solution for existing gate drivers is proposed. Reference is made to the gate driver functionality described at the outset. Specifically, a method is proposed by which a voltage (or a value of the relevant first or second voltage) at the gate is increased based on the turn-on moment of the power switch. Within the framework of the method for operating the gate driver of the power switch (in particular a bipolar transistor with an insulated control electrode - IGBT), a second PWM signal is generated and provided, which can be varied depending on the first PWM signal. Specifically, the duty cycle of the pulse-width modulation (PWM) of the second PWM signal is increased.

[0023] In particular, this method achieves improved stabilization and reduced voltage drop across the output capacitor(s) when large currents flow during power-on (or bridge operation). This is accomplished by increasing the duty cycle of the second PWM signal as an immediate response to a rising edge of the first PWM signal, thereby generating a larger charge on the output capacitor(s). This boost event (i.e., the increased duty cycle) reduces or even prevents voltage drop across the output capacitor. Furthermore, the capacitance of the output capacitor can be reduced, thus lowering the component costs and footprint of the gate driver.The proposed method can improve the efficiency and reliability of the power supply in systems that use, for example, these circuit breakers.

[0024] The gate driver has, in particular, a low-voltage side (primary side) and a high-voltage side (secondary side). Specifically, a microcontroller on the primary side of the gate driver provides a (first) PWM signal. This first PWM signal is received by a first circuit within the gate driver.

[0025] The first PWM signal is primarily used to supply the necessary energy from a battery to a (traction) motor. This first PWM signal from the low-voltage side is converted by the gate driver into a gate signal on the high-voltage side (secondary side), which then controls the gate of the power switch. The power switch is located on the secondary side. As a result of the gate signal, the power switch is controlled, so that the current required to drive the traction motor is supplied via the power switch.

[0026] The gate driver generates a positive and a negative output voltage for the power switch on its high-voltage side (secondary side), so that the gate is closed (the gate driver provides a positive (first) voltage for the gate) or open (the gate driver provides a negative (second) voltage for the gate), depending on the first PWM signal of the microcontroller on the low-voltage side.

[0027] The gate driver includes a second circuit that generates the second PWM signal on the primary side. On the secondary side, this second PWM signal is used by the second circuit to charge the output capacitors. The output capacitors are part of a circuit that forms the secondary side of the second circuit.

[0028] The first output capacitor serves in particular to provide a positive (first) voltage with which the gate of the power switch can be supplied with a first current signal to switch, i.e. close, the power switch.

[0029] The second output capacitor serves in particular to provide a negative (second) voltage with which the gate of the power switch can be supplied with a second current signal to switch, i.e. open, the power switch.

[0030] The second circuit generates the second PWM signal on the primary side and uses it on the secondary side to charge the output capacitors. Additionally, the second circuit switches the gate by discharging the respective output capacitor and the resulting current signals.

[0031] When the output capacitor discharges, a voltage drop can occur across it, especially at high currents. This fluctuation in voltage across the output capacitor is also known as voltage ripple. This voltage drop can be at least partially compensated, balanced, or even overcompensated by this method.

[0032] The procedure distinguishes in particular between two states: 1) In the first state, there is a pause between two initial impulses. The pause ends with a rising edge. 2) In the second state, the first impulse is already present. The first impulse ends with a falling edge.

[0033] The duration of each initial impulse or the pause between two initial impulses can vary (especially depending on the performance requirement).

[0034] Starting from the first state, the procedure (for the driver or the gate driver) includes in particular the following steps: a) Generating the second PWM signal with (a plurality of successive) second pulses (depending on the first PWM signal), wherein the second pulses have a (constant) first pulse duration (and a constant second frequency); (and then) b) Determine that the rising edge of the first PWM signal begins; (and immediately thereafter) c) Modifying the second PWM signal by extending the first pulse duration to a (constant) second pulse duration (while maintaining the constant second frequency).

[0035] Starting from the second state, the procedure (for the gate driver) includes in particular the following steps: x) Generating the second PWM signal with (a plurality of successive) second pulses (depending on the first PWM signal), wherein the second pulses have a (constant) first pulse duration (and a constant second frequency); (and then) y) Determine that the descending edge of the first PWM signal begins; (and immediately thereafter) z) Modifying the second PWM signal by extending the first pulse duration to a (constant) second pulse duration (while maintaining the constant second frequency).

[0036] By extending the pulse duration, the discharge of the output capacitor (which occurs particularly simultaneously with steps b), c) or y), z) can be at least partially compensated, fully compensated or even overcompensated.

[0037] In particular, the driver is operated with at least one (or several or all) of the following parameters (especially specifically when used in conjunction with a DC-DC converter): • First frequency (of the first PWM signal): at least 1 kHz; at most 1 MHz, in particular at most 15 kHz; • Second frequency (of the second PWM signal): at least 10 kHz, in particular at least 100 kHz; at most 100 MHz, in particular at most 50 MHz, preferably at most 10 MHz; • second frequency > 10 x first frequency (i.e., second frequency always greater than first frequency, in particular at least 20 times greater); • Output capacitor (total): at least 1 µF, in particular at least 100 µF; at most 10 mF, in particular at most 1 mF; • Input voltage of a converter used as an electrical first component: at least 5 V, in particular at least 10 V; at most 500 V, in particular at most 50 volts, preferably at most 20 volts; • Output voltage of the converter (first component): at least 10 V, preferably at least 40 volts; at most 1,000 V, in particular at most 100 V; • Input voltage of the second PWM signal (i.e., on the primary side): at least 5 V, in particular at least 10 V; at most 500 V, in particular at most 100 V; • Pulse duration: at least 1%; at most 100%; where second pulse duration > 1.5 × first pulse duration, in particular at least 2 times greater.

[0038] In particular, the gate driver is operated with at least one (or several or all) of the following parameters (specific to the gate driver): • First frequency (of the first PWM signal): at least 1 kHz; at most 20 kHz; • Second frequency (of the second PWM signal): at least 10 kHz, in particular at least 100 kHz; at most 100 MHz, in particular at most 50 MHz, preferably at most 10 MHz; • second frequency > 10 × first frequency (i.e., second frequency always greater than first frequency, in particular at least 20 times greater); • (First and second) output capacitor (each): at least 1 µF, in particular at least 100 µF; at most 10 mF, in particular at most 1 mF; • First (nominal) voltage (when subjected to the first pulse duration): at least 10 V, in particular at least 15 V; at most 20 V; • Second (nominal) voltage (when applied with the first pulse duration): at least -20 V; at most 0 V, in particular at most -5 V; • Input voltage of the second PWM signal (i.e., on the primary side): at least 5 V, in particular at least 10 V; at most 500 V, in particular at most 100 V; • Pulse duration: at least 1%; at most 100%; where second pulse duration > 1.5 × first pulse duration, in particular at least 2 times greater.

[0039] In particular, (in the method for operating the driver and the gate driver) the second pulse duration is maintained for at least two (possibly three, four or more) second pulses and then (i.e. after step c) or z)) the second PWM signal is (again) changed or shortened by shortening the second pulse duration.

[0040] In particular, (in the procedure for operating the driver and the gate driver) the second pulse duration is (again) reduced to the first pulse duration.

[0041] In particular (in the procedure for operating the driver and the gate driver), the pulse duration (in step a) or x)) is either the constant amount of the first pulse duration or in step c) or z)) the constant amount of the second pulse duration.

[0042] In particular, (in the method for operating the driver and the gate driver) the second pulse duration is maintained for at least (or at most) 20% of the duration of the first pulse or (in the method for operating the gate driver) for at least (or at most) 20% of the duration of the pause between two first pulses (in particular for at least or at most 40% of the duration, preferably for at least or at most 60% of the duration, particularly preferably for at least or at most 80% of the duration).

[0043] In particular, (in the method for operating the driver and the gate driver) at least steps a) to c) or (in the method for operating the gate driver) steps x) to z) are performed at each first pulse.

[0044] In particular, after each first pulse or after each execution of the process steps a) to c) (in the method for operating the driver and the gate driver) or x) to z) (in the method for operating the gate driver) there are again second PWM signals with first pulse duration before second PWM signals with second pulse duration are generated again.

[0045] In particular, steps a) to c) (in the procedure for operating the driver and the gate driver) and / or x) to z) (in the procedure for operating the gate driver) are repeated with each first pulse, with steps c) and z) being carried out only for a limited time.

[0046] In particular, (in the method for operating the driver and the gate driver) the respective (first / second) (nominal) voltage is changed or increased in magnitude by at least (or at most) 10%, preferably by at least (or at most) 15%, by extending the pulse duration of the second PWM signal.

[0047] A driver is further proposed, which is suitable for controlling an arrangement of electrical components and includes a control unit. The driver receives or generates a first PWM signal with a first frequency and generates a second PWM signal with a second frequency that is higher than the first frequency. The control unit is suitable for carrying out the described method, and the second PWM signal can be varied depending on the first PWM signal.

[0048] The driver is particularly well-suited for controlling an array of electrical components (e.g., a DC-DC converter and a bridge). As described above, the first PWM signal controls the bridge (the first electrical component). The second PWM signal controls the converter (the second electrical component). A capacitor located between the converter and the bridge can be charged via the converter. This charging process can be controlled in a targeted manner based on the first PWM signal. The second PWM signal is modified in response to the first PWM signal.

[0049] The driver is, in particular, a component of a drive assembly that includes at least one electric motor, one converter, and one bridge (as electrical components). The DC-DC converter serves to convert and transfer energy from a battery to the electric motor. The drive assembly includes a control unit, which regulates the current transferred from the converter to the motor. The drive assembly has a driver that is suitable for controlling the arrangement of electrical components of the drive assembly (i.e., the converter and the bridge).

[0050] In particular, or alternatively, the driver is a gate driver (also called a gate driver, flyback converter, or gate controller) designed to control the gate (as the electrical first component) of a power switch. The gate of the power switch is controlled via the gate driver. The gate is driven by the first PWM signal at the first frequency. The second PWM signal at the second frequency is generated within the gate driver. This second PWM signal then drives a circuit (as the electrical second component) of the gate driver, which includes at least a first output capacitor and a second output capacitor, to charge the output capacitors.

[0051] A gate driver is proposed that is suitable for controlling the gate (as the electrical first component) of a power switch. The gate driver comprises a primary side and a secondary side galvanically isolated from the primary side, as well as a control unit. The gate driver includes at least one circuit for receiving a first PWM signal with a first frequency on the primary side and a second circuit for generating a second PWM signal with a second frequency higher than the first frequency on the primary side. The second circuit includes at least one output capacitor and one output capacitor on the secondary side. The output capacitors can be charged via the second PWM signal, and the gate located on the secondary side can be switched by at least a partial discharge of the respective output capacitor.The control unit is designed to carry out the procedure described (particularly with regard to the gate driver) or has means for executing the steps of the procedure and / or has means that are appropriately equipped, configured, or programmed to execute the steps of the procedure, or that execute the procedure. The second PWM signal is variable depending on the first PWM signal (particularly with regard to the first and second pulse durations, especially by the control unit).

[0052] A drive assembly is further proposed, comprising at least an electric motor and a converter for converting and transferring energy from a battery to the electric motor, as well as a control unit, wherein the control unit regulates a current transferred from the converter to the motor, and the drive assembly includes the described driver, which is suitable for controlling the arrangement of electrical components of the drive assembly (i.e., the converter and the bridge), or has means for controlling the drive assembly, and / or has means that are suitablely equipped, configured, or programmed for controlling the drive assembly, or that control the drive assembly.

[0053] In particular, the converter is a DC-DC converter. Specifically, the input voltage of the converter is at least 5 volts and at most 500 volts, more specifically at least 10 volts and at most 50 volts or at most 20 volts. Specifically, the output voltage of the converter is at least 10 volts and at most 1000 volts, preferably at least 40 volts and at most 100 volts.

[0054] In particular, the converter is a DC-DC converter, and a so-called or known B6 / H-bridge is arranged between the motor and the converter. The converter is connected to the battery via a filter. Specifically, the first frequency of the first PWM signal used to operate the bridge is at least 10 kHz and at most 1 MHz, preferably at least 5 kHz and at most 100 kHz. Specifically, the second frequency of the second PWM signal used to drive the converter is at least 10 kHz and at most 100 MHz, preferably at least 1 MHz and at most 10 MHz.

[0055] In particular, the current controlled by the control unit can be transmitted between the converter and the motor via at least one power switch, and the drive assembly has the described gate driver, which is designed to control a gate of the at least one power switch.

[0056] In particular, the converter is a DC-AC converter (a so-called inverter).

[0057] A powertrain for a motor vehicle is further proposed, comprising at least a battery (also referred to as a secondary battery) for storing electrical energy and the described drive assembly, wherein the motor (also referred to as a traction drive) can be connected to a drive axle in a torque-transmitting manner and the converter is designed to transfer energy from the battery to the electric motor and from the electric motor to the battery.

[0058] A motor vehicle is further proposed, comprising at least the described drivetrain and a drive axle connected to the engine in a torque-transmitting manner. The motor vehicle may also have multiple drive axles (driven by one engine or by other engines).

[0059] In particular, the control unit and / or the control device is provided as a system for data processing which has means which are suitable for carrying out the procedure or for controlling the gate, or which execute the procedure or control the gate.

[0060] The means include, for example, a processor and a memory in which instructions to be executed by the processor are stored, as well as data or signal lines or transmission devices that enable the transmission of instructions, measured values, data or the like between the aforementioned elements.

[0061] The "means" may include, in particular, one or more of the following components: control(s), microcontroller, data storage, data connection, display devices (such as a display), counter or timer, at least one other sensor, a power source, etc.

[0062] Furthermore, a computer program is proposed, comprising commands which, when executed by a computer, cause the computer to perform the described procedure or the steps of the described procedure.

[0063] Furthermore, a computer-readable storage medium is proposed, comprising instructions which, when executed by a computer, cause it to perform the described procedure or the steps of the described procedure.

[0064] The explanations regarding the procedure are particularly applicable to the drive assembly, the drive train, the motor vehicle, the control unit or the data processing system and / or the computer-implemented procedure (i.e., the computer program and the computer-readable storage medium) and vice versa.

[0065] Two different applications of the described method are proposed. The first is for a driver used, for example, to control a drive assembly comprising a DC-DC converter (second component), a bridge (first component), and a motor. In this application, a capacitor located between the converter and the bridge is charged (or recharged) as quickly as possible, ensuring that sufficient power is available to operate the motor at all times.

[0066] Secondly, for a gate driver suitable for controlling the gate (as the first component) of a power switch. The gate driver controls the gate of the power switch. The second PWM signal is generated within the gate driver, and this second PWM signal is used to charge a circuit (as the second electrical component) of the gate driver, which has at least a first output capacitor and a second output capacitor.

[0067] The use of indefinite articles (“a”, “an”, “one”, and “ones”), particularly in the patent claims and the description reproducing them, is to be understood as such and not as a numeral. Accordingly, terms or components introduced by these articles are to be understood as occurring at least once and, in particular, may also occur multiple times.

[0068] It should be noted as a precaution that the numerical terms used here ("first", "second", etc.) primarily serve (only) to distinguish between several similar objects, quantities, or processes, and thus do not necessarily dictate any dependency and / or sequence between these objects, quantities, or processes. Should a dependency and / or sequence be required, this is explicitly stated here, or it will be obvious to a person skilled in the art upon studying the specific configuration described. Where a component can occur multiple times ("at least one"), the description of one of these components may apply equally to all or a portion of the majority of these components, but this is not mandatory.

[0069] The invention and its technical context are explained in more detail below with reference to the accompanying figures. It should be noted that the invention is not limited by the exemplary embodiments shown. In particular, it should be noted that the figures, and especially the depicted dimensions, are only schematic. They show: Fig. 1: a motor vehicle with a drivetrain; Fig. 2: a gate driver and a power switch; Fig. 3: a first diagram; Fig. 4: a second diagram; Fig. 5: a representation of steps a), b), c) or x), y), z); Fig. 6: a third diagram comparing steps a) and c) or x) and z); Fig. 7: a fourth diagram showing the effect of the procedure; and Fig. 8: an arrangement.

[0070] The Fig. Figure 1 shows a motor vehicle 35 with a drive train 34 and a drive axle 36 connected to the motor 30 for torque transmission. The drive train 34 further includes a converter 31 for transferring energy from the battery 32 to the electric motor 30 and from the electric motor 30 to the battery 32. The drive train 34, or the motor vehicle 35, also includes a control unit 33. The motor 30 and converter 31, together with the control unit 33, form a drive assembly 29. The control unit 33 regulates a current 38 transmitted from the converter 31 to the motor 30 via at least one power switch 3.

[0071] Fig. Figure 2 shows a gate driver 1 and a power switch 3. See the explanations regarding Fig. 1 is referred to.

[0072] The in Fig. 1 The indicated drive assembly 29 comprises a gate driver 1 which is designed to control a gate 2 of the power switch 3.

[0073] The gate driver 1 is designed to control a gate 2 of a power switch 3. The gate driver 1 has, in a known manner, a primary side 24 and a secondary side 25 galvanically isolated from the primary side 24, as well as a control unit 26. The gate driver 1 has a first circuit 27 for receiving a first PWM signal 4, which has a first frequency 5, on the primary side 24. Furthermore, the gate driver 1 has a second circuit 28 for generating a second PWM signal 6, which has a second frequency 7 that is higher than the first frequency 5, on the primary side 24. The second circuit 28 has a first output capacitor 9 and a second output capacitor 10 on the secondary side 25. The output capacitors 9, 10 can be charged via the second PWM signal 6 and the gate 2 arranged on the secondary side 25 can be switched by at least a partial discharge of the respective output capacitor 9, 10.The control unit 26 is designed to carry out the procedure described below.

[0074] In contrast to known gate drivers 1, the second PWM signal 6 can be changed in a special way depending on the first PWM signal 4 (especially with regard to the first or second pulse duration 20, 21, in particular by the control unit 26).

[0075] Fig. Figure 3 shows a first diagram. Fig. Figure 4 shows a second diagram. Fig. Figure 5 shows a representation of steps a), b), c) and x), y), z). Fig. Figure 6 shows a third diagram comparing steps a) and c) and x) and z). Fig. Figure 6 shows a fourth diagram illustrating the effect of the procedure. Fig. 3, Fig. 4, Fig. 5, Fig. 6 to Fig. Seven will be described together below. The explanations regarding the Fig. 1 and Fig. 2 is referred to.

[0076] In the first diagram according to Fig. Figure 3 shows, in the upper part, the current 38 of one phase of the motor 30 on the vertical axis and the time 37 on the horizontal axis. In the lower part of the Fig. 3 is the first PWM signal 4 generating the current 38 on the vertical axis and the time 37 is shown on the horizontal axis.

[0077] In the second diagram according to Fig. 4, in the third diagram according to Fig. 6 and in the fourth diagram according to Fig. The stresses 14 and 17 are plotted on the vertical axis and the time 37 on the horizontal axis.

[0078] A gate driver 1 is an isolated power supply that is typically used in converters 31 (e.g. inverters, i.e. converters / inverters, or also in DC-DC converters) which are intended, for example, for traction drives.

[0079] The converter 31, for example, converts the direct current drawn from a traction battery 32 into alternating current or into a higher voltage direct current and uses this to drive a traction drive or motor 30. Within the converter 31, the energy or power required to drive the traction drive 30 is converted and provided via power electronics.

[0080] The energy or power is typically regulated by a microcontroller (referred to here as control unit 26), which provides a first PWM signal 4 on a low-voltage side (primary side 24). This first PWM signal 4 from the primary side 24 is converted by the gate driver 1 into a gate signal (current signal 13, 16) on a high-voltage side (secondary side 25), whereby the current signal 13, 16 controls the gate 2 of a power switch 3. As a result of the current signal 13, 16, the power switch 3 is controlled, so that the current 38 required to drive the motor 30 is supplied via the power switch 3.

[0081] A gate driver 1 directs the first PWM signal 4, electrically isolated from the control unit 26 of the converter 31, to the gate 2 of a power switch 3. For this purpose, the gate driver 1 generates a positive and a negative output voltage for the power switch 3 on the secondary side 25, so that the gate 2 is either closed (the gate driver 1 provides a positive first voltage 14 for the gate 2) or opened (the gate driver 1 provides a negative second voltage 17 for the gate 2), depending on the first PWM signal 4 of the control unit 26 on the primary side 24.

[0082] This positive first voltage 14 and negative second voltage 17 are generated via a separate control unit (second circuit 28) of the gate driver 1. The energy required to switch the gate 2 is stored in so-called (buffer) output capacitors 9, 10 of this second circuit 28. To charge these output capacitors 9, 10, the control unit 26 is driven on a low-voltage side (primary side 24) with its own second PWM signal 6, whereby this signal 6 is transmitted to a galvanically isolated high-voltage side (secondary side 25) and charges the output capacitors 9, 10 located there. This second PWM signal 6 has a significantly higher (constant) second frequency 7 than the first PWM signal 4 and also has a constant first pulse duration 20 and, accordingly, a constant duration 23 of the pause 18 (see Fig. 4). The second PWM signal 6 is provided at the primary side 24 with an input voltage 22.

[0083] A low-voltage side (primary side 24) and a high-voltage side (secondary side 25) of the gate driver 1 are galvanically isolated from each other. Gate drivers 1 enable the provision of a high current for switching power switches 3, so that even SiC and IGBT power switches 3, which are designed for several hundred kW of drive power, can be switched without the need for an additional external buffer.

[0084] The secondary-side (high-voltage-side) regulation (second circuit 28) of the gate driver 1 is used to generate a precise output voltage (first voltage 14 or second voltage 17). During the switching on of the power switch 3, large currents 38 (several tens of amperes) are drawn from the gate driver 1 or its secondary side 25. Therefore, large capacitance values ​​in the range of several tens of microfarads are required on the secondary side 25 for stabilization and to minimize voltage drops. These are also referred to as (buffer) output capacitors 9, 10. Such a voltage drop (of the first voltage 14) is in Fig. 4 shown.

[0085] A problem with existing gate drivers 1 is that when a power module or power switch 3 is switched on, a voltage drop occurs across the output capacitors 9, 10 due to the gate current 38. Conventional gate drivers 1 therefore require large output capacitors 9, 10. If the capacitors 9, 10 are undersized, the voltage 14, 17 required to switch the gate 3 may not be available. Consequently, the required power of the traction drive or motor 30 cannot be supplied. The considerable size and weight of these capacitors 9, 10 required for this reason can increase their cost. Furthermore, the performance of the gate driver 1 can be negatively affected by the large output capacitance. It can impair the transient response and lead to slower voltage regulation.

[0086] In the method described here, a gate 2 of a power switch 3 is controlled via the gate driver 1. The gate 2 is controlled by a first PWM signal 4 with a constant first frequency 5 (see Fig. 3 and Fig. 4 as well Fig. 5 upper part). In the gate driver 1, a second PWM signal 6 with a constant second frequency 7, which is always higher than the first frequency 5, is generated (see Fig. 4 and Fig. 5) The second PWM signal 6 is used to charge a circuit 8 of the gate driver 1, which has a first output capacitor 9 and a second output capacitor 10, for charging the output capacitors 9, 10.

[0087] On a rising edge 11 of a first pulse 12 of the first PWM signal 4, a first current signal 13 with a first voltage 14 is applied from the first output capacitor 9, and on a falling edge 15 of the first pulse 12, a second current signal 16 with a second voltage 17 is applied from the second output capacitor 10 to the gate 2 (see Fig. 2, Fig. 3 and Fig. 4).

[0088] The described method aims to propose a solution for existing gate drivers 1. A method is proposed by which a voltage 14, 17 (or a value of the respective first or second voltage) at the gate 2 is increased based on the switch-on moment of the power switch 3. Within the framework of the method for operating the gate driver 1 of the power switch 3, a second PWM signal 6 is generated and provided, which can be varied depending on the first PWM signal 4. The duty cycle of the pulse-width modulation (PWM) of the second PWM signal 6 is increased.

[0089] This method ensures that when large currents 38 flow during the switching on of the power switch, there is greater stabilization and a lower voltage drop across the output capacitors 9, 10. The mechanism by which this is achieved consists of increasing the duty cycle of the second PWM signal 6 as an (immediate) response to a rising edge 11 of the first PWM signal 4 (see Fig. 5 and Fig. 6), thereby generating a larger charge on the output capacitor(s) 9, 10. This boost event (i.e., the increase in the duty cycle) reduces the voltage drop across the respective output capacitor(s) 9, 10 (see Fig. 7) reduced or even prevented. In addition, the capacitance of the relevant output capacitor 9, 10 can even be reduced, thus reducing the component costs of the gate driver 1 and the space required by the gate driver 1. The proposed method can improve the efficiency and reliability of the power supply in systems that use these power switches 3.

[0090] The method comprises, at least, starting from a first state in which there is a pause 18 between two first pulses 12, steps a) to c). According to step a), the second PWM signal 6 is generated with (a plurality of successive) second pulses 19, wherein the second pulses 19 have a constant first pulse duration 20 (see Fig. 5 and Fig. 6, upper part). According to step b), it is determined that the rising edge 11 of the first PWM signal 4 begins (see Fig. 5). Immediately thereafter, according to step c), the second PWM signal 6 is changed by extending the first pulse duration 20 to a constant second pulse duration 21 (see Fig. 5 and Fig. 6).

[0091] Alternatively or additionally, starting from a second state in which the first pulse 12 is already present, the method comprises steps x) to z). According to step x), the second PWM signal 6 is generated with a plurality of successive second pulses 19, the second pulses 19 having a first pulse duration 20. According to step y), the onset of the descending edge 15 of the first PWM signal 4 is detected. According to step z), immediately after step y), the second PWM signal 6 is modified by extending the first pulse duration 20 to a second pulse duration 21.

[0092] The gate driver 1 has a low-voltage side (primary side 24) and a high-voltage side (secondary side 25). A microcontroller provides a first PWM signal 4 on the primary side 24 of the gate driver 1. This first PWM signal 4 is received by a first circuit 27 of the gate driver 1.

[0093] The first PWM signal 4 serves to supply the required energy from a battery 32 to a (traction) motor 30. This first PWM signal 4 from the low-voltage side is converted by the gate driver 1 into a gate signal 13, 16 on a high-voltage side (secondary side 25), whereby the gate signal 13, 16 controls the gate 2 of the power switch 3. The power switch 3 is located on the secondary side 25. As a result of the gate signal 13, 16, the power switch 3 is controlled, so that the current 38 required to drive the traction drive / motor 30 is supplied via the power switch 3.

[0094] The gate driver 1 generates a positive and a negative output voltage 14, 17 on its high-voltage side (secondary side 25) for the power switch 3, so that the gate 2 is closed (the gate driver 1 provides a positive first voltage 14 for the gate 2) or opened (the gate driver 1 provides a negative second voltage 17 for the gate 2), depending on the first PWM signal 4 of the microcontroller on the low-voltage side.

[0095] The gate driver 1 has a second circuit 28 which generates the second PWM signal 6 on the primary side 24. On the secondary side 25, the second PWM signal 6 is used by the second circuit 28 to charge the output capacitors 9, 10. The output capacitors 9, 10 are part of a circuit 8 that forms the secondary side 25 of the second circuit 28.

[0096] The first output capacitor 9 serves to provide a positive first voltage 14, with which the gate 2 of the power switch 3 can be supplied with a first current signal 13 to switch, i.e. close, the power switch 3.

[0097] The second output capacitor 10 serves to provide a negative second voltage 17, with which the gate 2 of the power switch 3 can be supplied with a second current signal 16 to switch, i.e. open, the power switch 3.

[0098] The second circuit 28 thus generates the second PWM signal 6 on the primary side 24 and uses it on the secondary side 25 to charge the output capacitors 9, 10. Furthermore, the second circuit 28 switches the gate 2 by discharging the respective output capacitor 9, 10 and by the resulting current signals 13, 16.

[0099] During the discharge of the output capacitor 9, 10, a voltage drop can occur, especially at high currents 38 (see first curve 39 in Fig. 7) at the output capacitors 9, 10. The rise and fall of the voltage 14, 17 at the output capacitors 9, 10 is also referred to as voltage fluctuation or voltage ripple. This voltage drop can now be at least partially compensated by the method (see second curve 40 in Fig. 7), balanced (see third course 41 in Fig. 7) or overcompensated (see fourth course 42 in Fig. 7) will be. The second curve 40 reaches the minimum of the first nominal voltage 41 again after a certain time 37. The third curve 41 runs between the minimum and the maximum of the first nominal voltage 14. The fourth curve 42 briefly exceeds the maximum of the first nominal voltage 14.

[0100] The process distinguishes between two states. In the first state, there is a pause 18 between two initial pulses 12. The pause 18 ends with a rising edge 11. In the second state, the first pulse 12 has already occurred. The first pulse 12 ends with a falling edge 15. The duration 23 of the respective initial pulse 12, or of the pause 18 between two initial pulses 12, can vary (especially depending on the power requirement).

[0101] By extending the pulse duration 20, 21, the discharge of the output capacitors 9, 10 (which occurs in particular simultaneously with steps b), c) or y), z) can be at least partially compensated, fully compensated or even overcompensated.

[0102] In Fig. It can be seen in Figure 5 that the second pulse duration 21 is maintained for five second pulses 19 and then (i.e., after step c) or z)) the second PWM signal 6 is (again) changed or shortened by shortening the second pulse duration 21. In doing so, the second pulse duration 21 is shortened back to the first pulse duration 20.

[0103] The pulse duration 20, 21 is (in step a) or x)) either the constant amount of the first pulse duration 20 or (in step c) or z)) the constant amount of the second pulse duration 21, i.e. the pulse duration 20, 21 alternates between these two different amounts.

[0104] The second pulse duration 21 can be maintained for a certain duration 23 of the first pulse 12 or for a certain duration 23 of the pause 18 between two first pulses 12.

[0105] Fig. Figure 8 shows a drive assembly 29. See the explanations regarding the Fig. 1, Fig. 2, Fig. 3, Fig. 4, Fig. 5, Fig. 6 to Fig. 7 is referred to.

[0106] The drive assembly 29 comprises an electric motor 30 and a converter 31 for converting and transferring energy from a battery 32 to the electric motor 30, as well as a control unit 33, wherein the control unit 33 regulates a current 38 transferred from the converter 31 to the motor 30 via at least one power switch 3. The converter 31 is a DC-DC converter. The converter 31 provides the voltage required for the operation of the motor 30. A so-called or known B6 / H bridge 43 (electrical first component 2) is arranged between the motor 30 and the converter 31. The converter 31 is connected to the battery 32 via a filter 44. The bridge 43 is controlled by the first PWM signal 4 of the control unit 33 and generates the current signals 38 for the different phases of the electric motor 30.

[0107] At least one output capacitor 9 is arranged between the converter 31 and the bridge 43. This serves to temporarily store energy so that fluctuations in the demand of the motor 30 or the bridge 43 can be compensated for via the output capacitor. When the output capacitor 9 is discharged (due to the current demand of the bridge 43 or the motor 30), a voltage drop can occur, especially at high currents 38 (see first trace 39 in Fig. 7) at the output capacitor 9. The rise and fall of the voltage 14 at the output capacitor 9, or the voltage drop, can now be at least partially compensated by the method (see second curve 40 in Fig. 7), balanced (see third course 41 in Fig. 7) or overcompensated (see fourth course 42 in Fig.7). The second curve 40 reaches the minimum of the first nominal voltage 41 again after a certain time 37. The third curve 41 runs between the minimum and the maximum of the first nominal voltage 14. The fourth curve 42 briefly exceeds the maximum of the first nominal voltage 14. For this, the converter 31 (second electrical component 8) is supplied with a second frequency 7 of the second PWM signal 6. Reference symbol list 1 (Gate) driver 2. First component (gate or bridge) 3 circuit breakers 4 first PWM signal 5 first frequency 6 second PWM signal 7 second frequency 8 second component (circuit or converter) 9 (first) output capacitor 10 second output capacitor 11. Ascending flank 12 first impulse 13 first current signal 14 first tension 15 descending flank 16 second current signal 17 second tension 18 Break 19 second impulse 20 first pulse duration 21 second pulse duration 22 Input voltage 23 Duration 24 Primary page 25 Secondary page 26 Control unit 27 first circuit 28 second circuit 29 Drive assembly 30 engine 31 converters (second component) 32 battery 33 Control unit 34 Powertrain 35 Motor vehicle 36 drive axle 37 Time 38 Electricity 39 first course 40 second course 41 third course 42 fourth course 43 Bridge (first component) 44 filters

Claims

Method for operating a driver (1) for an arrangement of electrical components (2, 8), wherein a first electrical component (2) is controlled by a first PWM signal (4) with a first frequency (5); wherein a second PWM signal (6) with a second frequency (7) higher than the first frequency (5) is generated in the driver (1); wherein a second electrical component is controlled by the second PWM signal (6), thereby charging an output capacitor (9); wherein, upon a rising edge (11) of a first pulse (12) of the first PWM signal (4), a first current signal (13) with a first voltage (14) from the output capacitor (9) is applied to the first component; wherein the method comprises the following steps: a) generating the second PWM signal (6) with second pulses (19), wherein the second pulses (19) have a first pulse duration (20); b) detecting that the rising edge (11) of the first PWM signal (4) begins;c) Changing the second PWM signal (6) by extending the first pulse duration (20) to a second pulse duration (21).; Method according to claim 1, wherein steps a) to c) are performed at each first pulse (12). Method according to one of the preceding claims, wherein the second pulse duration (21) is maintained for at least two second pulses (19) and then the second PWM signal (6) is modified by shortening the second pulse duration (21). Method according to claim 3, wherein the second pulse duration (21) is shortened to the first pulse duration (20). Method according to one of the preceding claims 3 and 4, wherein the second pulse duration (21) is maintained for at least 20% of a duration (23) of the first pulse (12). Method according to one of the preceding claims, wherein the voltage (14, 17) is changed by at least 10% of its magnitude by extending the pulse duration ((20, 21) of the second PWM signal (6). A method according to any of the preceding claims, wherein the driver (1) is a gate driver (1), the first component (2) is a gate (2) of a power switch (3), and the second component (8) is a circuit (8) of the gate driver (1); wherein the gate (2) of the power switch (3) is controlled via the gate driver (1); wherein the gate (2) is controlled by the first PWM signal (4) with the first frequency (5); wherein the second PWM signal (6) with the second frequency (7) is generated in the gate driver (1); wherein the second PWM signal (6) is used to charge the circuit (8) of the gate driver (1), which has at least a first output capacitor (9) and a second output capacitor (10);where, on the rising edge (11) of the first pulse (12) of the first PWM signal (4), the first current signal (13) with the first voltage (14) from the first output capacitor (9) is applied, and for a falling edge (15) of the first pulse (12), a second current signal (16) with a second voltage (17) from the second output capacitor (10) is applied to the gate (2); wherein the method, starting from a first state in which there is a pause (18) between two first pulses (12), comprises steps a) to c), or starting from a second state in which the first pulse (12) is present, comprises the following steps: x) generating the second PWM signal (6) with second pulses (19), wherein the second pulses (19) have a first pulse duration (20); y) detecting that the descending edge (15) of the first PWM signal (4) begins; z) modifying the second PWM signal (6) by extending the first pulse duration (20) to a second pulse duration (21). Method according to claim 6, wherein at least steps a) to c) or steps x) to z) are performed at each first pulse (12). Method according to one of the preceding claims 6 and 7, wherein the second pulse duration (21) is maintained for at least 20% of a duration (23) of the first pulse (12) or for at least 20% of a duration (23) of the pause (18) between two first pulses (12) A method according to any one of the preceding claims 6 to 8, wherein the gate driver (1) is operated with at least one of the following parameters: • first frequency (5): at least 1 kHz; at most 20 kHz; • second frequency (7): at least 10 kHz; at most 100 MHz; • second frequency (7) > 10 x first frequency (5); • output capacitor (9, 10): at least 1 µF; at most 10 mF; • first (nominal) voltage (14): at least 10 V; at most 20 V; • second (nominal) voltage (17): at least -20 V; at most 0 V; • input voltage (22) of the second PWM signal (6): at least 5 V; at most 500 V; • pulse duration (20, 21): at least 1 %; at most 100 %; where second pulse duration (21) > 1.5 × first pulse duration (20). Driver (1) suitable for controlling an arrangement of electrical components (2, 8) and comprising a control unit (26); wherein the driver (1) receives or generates a first PWM signal (4) with a first frequency (5) and generates a second PWM signal (6) with a second frequency (7) that is higher than the first frequency (5); wherein the control unit (26) is suitable for carrying out the method according to one of the preceding claims and the second PWM signal (6) is variable depending on the first PWM signal (4). Driver (1) according to claim 11, wherein the control unit (26) is designed to carry out the method according to any one of the preceding claims 7 to 10, the driver is a gate driver (1), the first component (2) is a gate (2) of a power switch (3), and the second component (8) is a circuit (8) of the gate driver (1), and the control unit (26) is designed to control the gate (2) of the power switch (3); wherein the gate driver (1) has a primary side (24) and a secondary side (25) that is galvanically isolated from the primary side (24); wherein the gate driver (1) has at least a first circuit (27) for receiving the first PWM signal (4) with a first frequency (5) at the primary side (24) and a second circuit (28) for generating the second PWM signal (6) with a second frequency (7) which is higher than the first frequency (5) at the primary side (24);wherein the second circuit (28) has at least a first output capacitor (9) and a second output capacitor (10) on the secondary side (25) and the output capacitors (9, 10) can be charged via the second PWM signal (6) and the gate (2) arranged on the secondary side (25) can be switched by at least a partial discharge of the respective output capacitor (9, 10). Drive assembly (29), comprising at least an electric motor (30) and a converter (31) for converting and transferring energy from a battery (32) to the electric motor (30) and a control unit (33), wherein the control unit (33) regulates a current transferred from the converter (31) to the motor (30) and the drive assembly (29) has a driver (1) according to one of claims 11 and 12, which is designed to control an arrangement of electrical components (2, 8) of the drive assembly (29). Drive assembly (29) according to claim 13, wherein the current controlled by the control unit (33) can be transmitted between the converter (31) and the motor (30) via at least one power switch (3) and the drive assembly (29) has a gate driver (1) according to claim 12, which is designed to control a gate (2) of the at least one power switch (3). Drive assembly (29) according to claim 14, wherein the converter (31) is a DC-AC converter.

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