Semiconductor device with a dielectric spacer and method for manufacturing

Abstract

Semiconductor device comprising a housing body with a top in a first plane and a bottom in a second plane parallel to the first plane, at least one conductor extending from the housing body, wherein the conductor has a first section in a plane parallel to the first plane and a second section bent away from the first plane towards the second plane, a cavity positioned between the at least one conductor and a feature of the semiconductor device, and a removable dielectric spacer configured to be positioned in the cavity between the at least one first conductor and the feature, wherein the dielectric spacer is longer than the conductor.

Description

TECHNICAL AREA

[0001] The present disclosure relates to a semiconductor device comprising a housing body and a dielectric spacer. The present disclosure further relates to a method for manufacturing the aforementioned semiconductor device. BACKGROUND

[0002] Mounting an encapsulated chip to another device, e.g., a heat sink for cooling, may require a safety distance between a conductor of the encapsulated chip and the attached device, especially if the attached device is made of an electrically conductive material, e.g., aluminum.

[0003] Several approaches have been taken to improve the safety margin, which can be both a gap clearance and a creepage distance. For example, it has been suggested to use a convex, balcony-like heat sink to move the conductive surface of the heat sink further away from conductive parts of the semiconductor device. Furthermore, to increase the creepage distance, it has been suggested to add grooves between conductors on a package contour.

[0004] In the following, the creepage distance is defined as the distance of a creepage current along a surface, where the gap distance is a required distance between two conductors through air.

[0005] A major disadvantage of the above proposals is that while the creepage distance can be increased, the gap spacing cannot.

[0006] It is therefore an intention of the present disclosure to provide a semiconductor device with increased creepage and gap spacing. SUMMARY

[0007] According to a first aspect of the present disclosure, a semiconductor device is provided, the semiconductor device comprising a housing body with a top in a first plane and a bottom in a second plane parallel to the first plane, at least one first conductor projecting from the housing body, the conductor having a first section in a plane parallel to the first plane and a second section bent away from the first plane towards the second plane, a cavity positioned between the at least one conductor and a feature of the semiconductor device, and a removable dielectric spacer configured to be positioned in the cavity between the at least one first conductor and the feature, the dielectric spacer being longer than the conductor.

[0008] The housing body can be made of or comprise a molding compound. The housing body can be rectangular, comprising a flat top and a flat bottom parallel to it. The housing body can generally be made of non-conductive material.

[0009] The non-conductive material can also be a polymer, polyimide, thermoplastic, silicone, ceramic, or glass material. The non-conductive material can also include any of the above-mentioned materials and, furthermore, embedded fillers such as thermally conductive increments like thermally conductive particles (e.g., AlO, BNi, AlNi, SiN, diamond, any other thermally conductive particles) or non-thermally conductive fillers (e.g., SiO, SiO2, glass, etc.).

[0010] However, conductive features can be located on the outer surfaces of the housing body or protrude from the housing body.

[0011] As an example, at least one first conductor can protrude from the package body. The first conductor can be connected to electrically conductive parts of a semiconductor chip, which may be encapsulated within the package body. The first section of the conductor protrudes from the package body at a peripheral side wall and can be substantially parallel to the first plane. The second section of the conductor is bent downwards towards the second plane and can form a section connected to second devices.

[0012] The second section of the conductor can be bent away from the first plane to form a foot-like connector for connecting the semiconductor device to a second device, e.g., a PCB or another semiconductor device in a device stack.

[0013] The housing body comprises a cavity or can be structured by a multitude of cavities. The cavity can be located on a peripheral side wall or can form an edge section of the top of the housing body. The cavity can be spaced from the first plane. The cavity can also be formed between the first plane and the surface of the housing body at the edge section. Alternatively, the cavity can be a recess, a bore, or a slot in the peripheral side wall of the housing body. The peripheral side wall can be substantially vertical.

[0014] The cavity can be located between a first conductor protruding from the housing body and another feature, which may be electrically conductive. This increases, for example, the distance along a surface between the conductor protruding from the housing body on a vertical side and the feature. This results in an increased creepage distance along the surface of the cavity. For example, the feature could be a heat sink.

[0015] An air gap between the first conductor and the feature, resulting from the cavity, can be filled by a dielectric spacer. The dielectric spacer can be fixed to a surface of the housing body and fill the cavity. By filling the air gap with the dielectric spacer, the air between the conductor and the feature is replaced by the insulating material of the dielectric spacer. This increases the distance between the conductor and the feature, as the distance from the boundary of the cavity and the dielectric spacer to the first section of the conductor is formed by the microgap between them. Furthermore, the dielectric spacer can cover the first section of the conductor and fill the space between the first section of the conductor and the first plane.

[0016] The dielectric spacer extends along the second section of the conductor, reaching at least to the second level and filling the space between the second section and the first level. This creates a barrier between the first level and the second section, thereby increasing the safety distance between the conductor and the first level, where a conductive feature may be located. Introducing an insulating material into this space further increases the clearance.

[0017] The spacer can be longer than the conductor. In particular, both the vertical and lateral extension of the spacer with respect to the conductor can be such that both the first and second sections of the conductor are shorter along their respective longitudinal extents than the dielectric spacer. This allows the dielectric spacer to project at least partially into the cavity on the housing body or into further cavities on a second device, as described in more detail below.

[0018] By allowing the dielectric spacer to protrude at least partially into the cavity, a direct line of sight between, for example, the conductor and an adjacent conductive feature is interrupted. In other words, the gap is interrupted by the dielectric spacer. The further the dielectric spacer protrudes into the cavity, the closer the gap becomes to the creepage distance.

[0019] Increasing the creepage and gap spacing using a dielectric spacer allows for a reduction in the form factor. Conversely, keeping the substrate size constant allows for an increase in power density.

[0020] This first aspect of the disclosure allows the influence of environmental pollution on the dielectric strength of the semiconductor device to be reduced. The semiconductor device, according to this first aspect, can then be used in environments with a higher degree of pollution, i.e., in more robust environments.

[0021] In one embodiment, the feature can be a second conductor. In this embodiment, the dielectric spacer can be arranged between two adjacent conductors that protrude from a peripheral side wall of the housing body. The removable dielectric spacer can thus be positioned such that a section of the dielectric spacer is located between the conductors and projects into the cavity. In this embodiment, the cavity can be located on an outer surface of the housing body between the first sections of the conductors.

[0022] In one embodiment, the dielectric spacer can contact a bottom surface of the cavity. In this embodiment as well, a corresponding section of the dielectric spacer is longer than the first section of the conductor. The dielectric spacer can extend into the cavity and contact its surface. This makes the gap between two adjacent conductive parts, for example, two conductors separated by the cavity, equal to the creepage distance defined along the surface of the cavity from one conductor to the other. If more than one conductor is present, the dielectric spacer can also completely fill an air gap between two adjacent conductors, resulting in an increased gap. The gap between two conductors filled by the dielectric spacer becomes equal to the creepage distance.This allows the distance between adjacent traces to be reduced, which can lead to a reduction in the form factor of the semiconductor device. Since the spacing between traces is also improved, devices with a smaller form factor, i.e., a closer distance between traces, would not need to be tested for safety before being used by a customer.

[0023] In one embodiment, the dielectric spacer extends along the second section of the first conductor to encapsulate at least one outer surface of the first conductor and to fill a gap between adjacent first and second conductors.

[0024] The dielectric spacer can comprise a vertical outer surface with a side surface that lies in a plane perpendicular to the second and first planes. The vertical outer surface can be the portion that at least partially covers the outside of the second section of the leads. The second section of the leads can form an acute angle with the vertical outer surface of the dielectric spacer. Thus, the dielectric spacer can extend vertically from the second section of the leads to the second plane, forming a vertical outer surface of the semiconductor device. The vertical outer surface of the dielectric spacer can form a right angle with the second plane and / or the first plane. The dielectric spacer can cover only a portion of the second section of the leads, leaving a subsequent portion exposed.Both the creepage distance and the gap between the uncovered, exposed part of the second section of the conductor and the first plane are equal to the vertical distance along the vertical side face of the dielectric spacer. Thus, by forming such a vertical side face of the dielectric spacer, the safe distance can be adjusted as needed and is always at least equal to the distance along the vertical outer surface of the dielectric spacer.

[0025] In one embodiment, the feature is a heat sink, wherein the heat sink comprises a flat underside and is attached to the top of the housing body and extends horizontally beyond a peripheral side wall of the housing body.

[0026] The heat sink can be made of an electrically and thermally conductive material and can be mounted with one flat side facing the top of the enclosure. The flat side (i.e., bottom) of the heat sink is located in the first plane. The cavity can be a stepped section on the top of the enclosure. Filling this cavity with the dielectric spacer eliminates the gap between the enclosure and the heat sink. Mounting the heat sink in the first plane of the enclosure increases the safety clearance from a conductor to the bottom of the heat sink. Consequently, a heat sink with a flat bottom can be used. This simplifies the design and manufacturing of the heat sink and provides greater flexibility in the mechanical and thermal design.For example, it may be possible to optimize the fin design independently of the orientation of the housing body relative to a PCB.

[0027] In one embodiment, an outer edge of the heat sink projects beyond an outer edge of the dielectric spacer; and / or wherein the dielectric spacer does not pass the outer edge of the heat sink.

[0028] A gap between the second section of the conduit and the heat sink, which can be considered to be made of conductive material, is filled with the dielectric spacer. In this case, the remaining gap between the second section of the conduit and the heat sink can be the distance between a lower section of the second section of the conduit, which may not be covered by the dielectric spacer, and the lower surface of the heat sink. Since the gap is a free air gap between two or more electrically conductive materials, the gap between the second section of the conduit and the heat sink can be increased by covering the second section of the conduit with the dielectric spacer, thus increasing the free air length between uncovered sections of conductive material, i.e., the conduit and the heat sink.The more of the second section of the conduit is covered by the dielectric spacer—that is, the more the dielectric spacer extends downwards along the conduit away from the first plane of the housing—the more of the conduit is covered by the spacer, and the greater the free air gap between the exposed, uncovered portions of the conduit and the heat sink. To further increase the gap, the spacer should not extend beyond the edge of the heat sink; that is, the spacer should not be larger than the heat sink but should extend vertically along the conduit.

[0029] In one embodiment, the dielectric spacer can be a plastic cover, wherein the plastic cover is an integral part and wherein the plastic cover is configured to be removablely attached to the housing body by means of a screw or a clip or a locking mechanism.

[0030] A plastic cover can be particularly easy to manufacture. The plastic cover can be molded, extruded, or printed separately to form a single, one-piece part obtained in just one process step. Furthermore, the plastic cover can then be assembled with the molded housing body after trimming / molding using a pick-and-place process. This makes assembly straightforward.

[0031] The dielectric spacer can be attached to the housing body in a removable manner by any known mechanical means, but preferably by means of a screw, a clip or a locking mechanism.

[0032] In one embodiment, the dielectric spacer acts as a spacer that includes the second section of the conductors. In this case, the dielectric spacer acts as a spacer to control the height of the housing body relative to a second device (e.g., a PCB) to which the semiconductor device can be attached.

[0033] The spacer controls the distance between a package body and a printed circuit board (PCB) when a semiconductor is soldered onto the PCB. The dimensions of the dielectric spacer—that is, the extent to which the spacer covers the second half of the traces—define / control the spacing height, allowing the semiconductor device to be robustly mounted to the PCB. Since covering the second half of the traces improves the spacing, the spacing height can also be reduced. The dielectric material of the spacer acts as a spacer. Reducing the spacing height typically requires changes to the trace frame design. With a dielectric spacer, the spacing height can be easily adjusted with minimal effort because the dielectric material is readily adaptable.

[0034] In one embodiment, the spacer comprises a projection that extends into a slot of a printed circuit board (PCB) to improve creepage distance between two conductors on the PCB. In particular, the projection can have a height approximately equal to the thickness of the PCB.

[0035] This increases both the spacing and creepage along the top surface of the PCB (a conformal coating is typically used on the underside). If the spacer's projection extends through the PCB, the spacing and creepage between conductors can be increased. If the dielectric spacer can extend into the PCB, both the spacing and creepage between conductors can be further enhanced.

[0036] In one embodiment, the slot is a through-hole through which the projection protrudes, and wherein a length of the projection is at least a length of the second section of the lines protruding through the second device.

[0037] In this embodiment, the conductors protrude through the PCB such that the second section of the conductors extends beyond the back of the PCB. Therefore, adjustments to the creepage distance and the gap spacing on the back of the PCB may be necessary. To improve both the gap spacing and the creepage distance on the back of the PCB between two adjacent conductors protruding from the PCB, the dielectric spacer can have a projection, as described in detail above. However, the projection can extend through the slot in the PCB and be as long as the conductors. This allows a dielectric barrier to be installed between the adjacent conductors on the back of the PCB. Alternatively, a conformal coating can be used on the back of the PCB, which eliminates both the creepage distance and the gap spacing.

[0038] According to a second aspect of the present disclosure, a method for manufacturing a semiconductor device is provided, the method comprising: providing a housing body having a top in a first plane and a bottom in a second plane parallel to the first plane; providing at least one conductor projecting from the housing body, the provision comprising: arranging a first section of the conductor in a plane parallel to the first plane and bending a second section of the conductor away from the first plane in the direction of the second plane; providing a cavity between the at least one conductor and a feature of the semiconductor device; and positioning a removable dielectric spacer in the cavity between the at least one first conductor and the feature, the dielectric spacer being longer than the conductor.

[0039] All embodiments described with respect to the first aspect can be combined with the second aspect of the disclosure in any order.

[0040] The expert will recognize additional features and advantages upon reading the following detailed description and upon examining the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] The present disclosure is illustrated by way of example and without limitation in the figures of the accompanying drawings, in which the same reference symbols refer to similar or identical elements. The elements of the drawings are not necessarily to scale relative to one another. The features of the various illustrated examples may be combined, provided they are not mutually exclusive. Fig. Figure 1 illustrates an example of a safety distance between two lines. Fig. Figure 2 shows a semiconductor device. Fig. 3a and Fig. Figure 3b shows an exemplary embodiment of the semiconductor device of Fig. 2. Fig. Figure 4 shows another embodiment of the first aspect of the revelation. Fig. Figure 5 shows several embodiments of the semiconductor device in a variety of applications with a heat sink. Fig. Figure 6 illustrates a device according to the first aspect of the disclosure with different mechanical mounting options. Fig. Figure 7 illustrates a device according to the first aspect of the revelation with a clip. Fig. Figure 8 illustrates a detail of a device according to the first aspect of the revelation. Fig. Figure 9 is a process diagram of the second aspect of revelation. DETAILED DESCRIPTION

[0042] Fig. Figure 1 illustrates an example of a safety distance between two lines. The safety distance includes both a creepage distance and a gap between lines. Fig. Creepage distance 1 is the distance between two adjacent conductors 1 along a surface of an enclosure body 2 from which the conductors 1 protrude. Since the creepage distance is a distance along the surface, a slot 3 increases the creepage distance from conductor 1 to conductor 1. However, the air gap is the minimum distance between two current-carrying conductors. Therefore, the air gap is not affected by slots 3 in the enclosure body 2. One way to increase the air gap is to space adjacent conductors 1 sufficiently apart. However, this can lead to an undesirable increase in the enclosure size.

[0043] Fig. Figure 2 shows an exemplary embodiment of a semiconductor device 4 from a top view. The semiconductor device 4 includes a dielectric spacer 5. The dielectric spacer 5 comprises sections that are positioned between the leads 1. As with respect to Fig. As described in Figure 1, slots 3 are provided in the vertical sides of the housing body 2 to increase the creepage distance along the surface between the adjacent conductors 1. Sections of the dielectric spacer 5 are inserted into the slots 3, thereby increasing the gap between the conductors to equal the creepage distance. In general, inserting an insulating material between two conductors increases the gap because it interrupts a minimum free length between the conductors. In this case, the new minimum free length from one conductor 1 to the other is the distance around the inserted dielectric spacer 5. If the dielectric spacer 5 is inserted between two conductors and extends to the surface of the slot 3, the gap between the conductors is equal to the creepage distance. The dielectric spacer 5 embeds the housing body 5.

[0044] Additionally, the housing body 2 in the embodiment of Fig. Two recesses 6 are located on opposite sides of the housing body 2. The recesses 6 serve as screw holes for attaching the semiconductor device 4 to a substrate, e.g., a PCB (not shown). The recesses 6 can be circular or semicircular and can also form eyelets on the outer surface on the short sides of the housing body 2.

[0045] Fig. 3a and Fig. Figure 3b shows an exemplary embodiment of the semiconductor device 4 of Fig. 2.

[0046] Fig. Figure 3a shows the semiconductor device 4 of Fig. 2 without the dielectric spacer 5. The slots 3 divide the housing body 5 near the first section of the conductors 1 into separate finger-like projections. An edge section 7 of the housing body 2 is structured by a groove structure 8, which comprises several grooves in the first plane 9 of the housing body 2. The groove structure 8 at the edge section 7 can have different shapes and is not necessarily symmetrical on opposite sides of the housing body 2. The groove structure 8 further increases the creepage distance from the first section of the conductor 1 to a further device 10 (not shown). The groove structure 8 can be interrupted by the slots 3, such that at least one groove of the groove structure 8 is not continuous through the finger-like projections from which the conductors 1 protrude. In the embodiment of Fig. 3a The groove structure 8 is present only on the long sides of the housing body 2, whereas the shorter end faces of the housing body 2 are free of grooves. The groove structure 8 can have a height that is less than the housing body 2, i.e., an upper surface of the groove structure 8 is spaced away from the first plane 9 of the housing body 2.

[0047] Fig. Figure 3b shows the dielectric spacer 5, which is configured to be used with the exemplary semiconductor device 4 of Fig. 3a. The dielectric spacer 5 is a rectangular, frame-like plastic part, which can also be described as a plastic cover. The plastic material can be a dielectric compound and can be manufactured by molding or injection molding. The dielectric spacer 5 is configured to be removable from a top side of the housing body 2. The dielectric spacer 5 includes an opening 11. When the dielectric spacer 5 is attached to the housing body 2, the opening 11 corresponds to an inner section of the top side of the housing body 2. This allows a heat sink or other device 10 to be attached to the housing body 2 without being obstructed by the dielectric spacer 5.The dielectric spacer 5 further comprises first sections 12 which are configured to be positioned in the grooves of the groove structure 8 of the housing body 2.

[0048] The first sections 12 are configured to fill the space within the grooves of the groove structure 8, or they can simply be planar structures or other useful shapes that act as an air barrier. The dielectric spacer 5 further comprises second sections 13 that are configured to be positioned laterally outside the second sections of the conductors 1. Fig. 3b the second sections 13 are shown as vertical walls, but they can also be structured to touch the second sections of the conduits 1 along their lengths.

[0049] Furthermore, the dielectric spacer comprises 5 third sections 14, which are configured to be positioned between the conductors 1 and to interlock positively with the slots 3 between the conductors 1 in order to increase the conductor-to-conductor spacing to the creepage distance. Fig. 3b these third sections 14 take the form of vertical fins, but they may instead be configured to completely fill the spaces between the lines 1 or take on another shape.

[0050] Fig. Figure 4 shows a further embodiment of the first aspect of the disclosure, which is in Fig. 3 is described. A further device 10 is attached to the semiconductor device 4. The further device 10 is a heat sink 15. The heat sink 15 has a planar bottom surface 16 and is attached to the top surface of the housing body 2. A base area of ​​the heat sink 15 is larger than a base area of ​​the semiconductor device 4. In particular, edges of the heat sink 15 project laterally beyond the second section of the conductors 1, the lateral direction being parallel to the first plane 9. In this embodiment, at least the outer surface of the second section of the conductor 1 is completely covered by the second sections of the dielectric spacer 13. Furthermore, edges of the heat sink 15 project beyond an outer surface of the dielectric spacer 5. In particular, a base area of ​​the heat sink 15 is larger than a base area of ​​the dielectric spacer 5.In this case, the gap between the second section of the conductor 1 and the underside 16 of the heat sink 15 is a distance along the outer surface of the dielectric spacer 5 to the underside 16 of the heat sink 15, i.e., the gap is the distance from a point of the second section of the conductor 1 that is not covered by the dielectric spacer 5 and is therefore a free conductive surface, to the conductive underside 16 of the heat sink 15 along the outer surface of the dielectric spacer 5.

[0051] The semiconductor device 4 is mounted on a substrate 17, which can be a PCB or the like. The dielectric spacer 5 acts as a spacer, separating the housing body 2 from the substrate 17. The leads 1 protrude through the substrate 17, as described in more detail below.

[0052] Fig. Figure 5 shows several embodiments of the semiconductor device 4 of Fig. 3a and Fig. 3b in a variety of applications. For the sake of simplicity, several different semiconductor devices 4 are connected to a single heat sink 15. Furthermore, all semiconductor devices 4 are connected to a common PCB 17, but this is only for illustrative purposes. On the left side of Fig. 5 are devices. 4 Devices containing diodes, such as a bridge diode or a power factor correction (PFC) circuit with an IGBT and a diode, are not limited to these. On the right side of Fig. Devices 4 are integrated power modules (IPMs). The heat sink 15 is a grounded heat sink, with the electrical connections to ground 18 located next to the devices 4, which form a frame or columns to support the heat sink 15. The dielectric spacer 5 acts as a spacer to limit and control a space between the bottom of the heat sink 15 and the PCB 17. The second section of the conductor 1 is completely covered, at least on its outer surface, by the insulating material of the dielectric spacer 5.

[0053] The semiconductor devices 4 on the left side of Fig. 5 and the semiconductor devices 4 on the right side of Fig. 5 are both through-hole devices (THDs), but with different package contours. However, the disclosure is not limited to THDs. The disclosure is also possible with surface-mount devices (SMDs). THDs and SMDs can also be mixed in the same application. Consequently, the shape of the dielectric spacer 5 is adapted to the shape of the package body 2. In the case of a flat THD, the shape of the dielectric spacer 5 is different than in the case of a vertical or vertical but curved THD of the semiconductor device 4, e.g., a TO-247.

[0054] As can be seen, the heat sink 15, due to the dielectric spacer 5, is not convex but has a planar base 16. This allows the heat sink 15 to be more easily sourced from multiple suppliers, reducing its cost and simplifying its thermal design. Furthermore, the pollution degree PD can be increased (e.g., from PD 2 to PD 3) because the lines 1 are covered and encased, thus protecting them from contaminated environments, such as dusty air, in harsh manufacturing environments.

[0055] Fig. Figure 6 shows a further embodiment of the housing body 2 and the dielectric spacer 5, which in conjunction with Fig. 3a and Fig. 3b. The dielectric spacer 5 is a plastic cover and is attached to the housing body 2 by means of one or more clips 19. The clips 19 are configured to attach the plastic cover to the housing body 2 in a removable manner. Clips 19 can be formed simultaneously with the other parts of the plastic cover during the manufacturing process, e.g., during injection molding. Alternatively, the clips 19 can be formed and attached separately from the dielectric spacer 5 after the spacer 5 has been placed on the housing body 2. The clips 19 are shown here to be located on the shorter end faces of the housing body 2 and are configured to extend under the bottom of the housing body 2 and form a positive-locking connection with the housing body 2, although other clip positions are of course possible.For example, clips 19 could be connected to the third rib-like sections 14 to extend over the underside of the housing body 2.

[0056] Fig. Figure 7 is a cross-sectional view of Fig. 6 through the dashed line. The clip 19 has a locking detent 20 that engages positively with the underside surface of the housing body 2. To better position the plastic cover, the housing body 2 may have a step 21 on the top surface 6 at the shorter end faces of the housing body 5. The step 21 is a recess in the top surface of the housing body 2 at the outer edge of the shorter end faces of the housing body 2. The step 21 may be part of the groove structure 8. The step 21 is also filled by the dielectric spacer 5, with the dielectric spacer 5 and the top surface both located in the first plane 9. The dielectric spacer 5 fills the step 21, i.e., a space between a surface of the step 21 and the first plane 9, to form a uniform planar top surface.

[0057] Fig. Figure 8 shows a further embodiment of the first aspect of the disclosure, in which the PCB 17 has an opening 22 into which a portion of the dielectric spacer 5 fits. The dielectric spacer 5 has a projection 23 that fits into the opening 22 of the PCB 17, thereby increasing the creepage distance. Furthermore, as already mentioned in relation to Fig. Section 1 explains that the spacing between conductors can also be increased by inserting insulating material between conductors or between sets of conductors. Fig. 7 and in Fig. 8 different sets of wires 1 are grouped together, and the opening 22 is inserted into the PCB 17 to divide the sets of wires 1 and to allow the projection 23 of the plastic cover to be inserted until a thickness of the PCB 17 is filled.

[0058] Fig. Figure 9 is a flowchart of an exemplary process according to the second aspect of the disclosure. The exemplary process is associated with a manufacturing process of the semiconductor device 4. As in Fig. As shown in Figure 9, process 24 includes in a first step S1 the provision of a housing body 2 which has a top in a first plane and a bottom in a second plane parallel to the first plane 9.

[0059] As further in Fig. As shown in Figure 9, process 24 can, in a second step S2, comprise the provision of at least one conduit 1 and its protrusion from the housing body 2. The provision of the at least one conduit 1 comprises arranging a first section of the conduit in a plane parallel to the first plane and bending a second section of the conduit away from the first plane towards the second plane.

[0060] As further in Fig. As shown in Figure 9, process 24 can include in a third step S3 the provision of a cavity between the at least one conductor and a feature of the semiconductor device.

[0061] As further in Fig. As shown in Figure 9, process 24 can include in a fourth step S4 the positioning of a removable dielectric spacer in the cavity between the at least one first conductor and the feature, wherein the dielectric spacer is longer than the conductor.

[0062] The foregoing disclosure provides illustration and description but is not intended to be exhaustive or to restrict implementations to the exact forms disclosed. Modifications and variations may be made in light of the foregoing disclosure or may be derived from the practice of the implementations described herein.

[0063] Each of the illustrated x-axis, y-axis, and z-axis is essentially perpendicular to the other two axes. In other words, the x-axis is essentially perpendicular to the y-axis and the z-axis, the y-axis is essentially perpendicular to the x-axis and the z-axis, and the z-axis is essentially perpendicular to the x-axis and the y-axis. In some cases, a single reference symbol is shown to refer to a surface, or fewer than all instances of a part may be labeled with all surfaces of that part. All instances of the part may include associated surfaces of that part, although not every surface is labeled.

[0064] The orientations of the various elements in the figures are shown as examples, and the illustrated examples may be rotated relative to the depicted orientations. The descriptions provided herein and the following claims apply to any structures exhibiting the described relationships between various features, regardless of whether the structures are in the specific orientation shown in the drawings or rotated relative to such an orientation. Likewise, spatially relative terms such as "above," "below," "under," "lesser," "above," "upper," "middle," "left," and "right" are used herein for the sake of simplicity to describe the relationship of one element to one or more other elements, as illustrated in the figures.The spatially relative terms are intended to encompass various orientations of the element, structure, and / or assembly during use or operation, in addition to those depicted in the figures. A structure and / or assembly may be oriented differently (rotated by 90 degrees or in other orientations), and the spatially relative descriptors used herein may be interpreted accordingly. Furthermore, the cross-sectional views in the figures show only features within the planes of the cross-sections and do not show materials behind the planes of the cross-sections, unless otherwise indicated, to simplify the drawings.

[0065] For example, the terms "essentially" and "approximately" may be used herein to account for small manufacturing tolerances or other factors (e.g., within 5%) that are considered acceptable in the industry without deviating from the aspects of the implementations described herein. For example, a resistor with an approximate resistance value may practically have a resistance within 5% of the approximate resistance value. As another example, an approximate signal value may practically have a signal value within 5% of the approximate signal value.

[0066] Even if certain combinations of features are specified in the claims and / or disclosed in the description, these combinations are not intended to limit the disclosure of implementations described herein. Many of these features can be combined in ways not specifically specified in the claims and / or disclosed in the description. For example, the disclosure includes each dependent claim in a claim set in combination with each other individual claim in that claim set and each combination of multiple claims in that claim set. As used herein, a phrase referring to "at least one of" a list of elements refers to any combination of those elements, including single elements. As an example, "at least one of: a, b, or c" is intended to cover a, b, c, a + b, a + c, b + c, and a + b + c, as well as any combination with multiples of the same element (e.g., a + b + c).B. a + a, a + a + a, a + a + b, a + a + c, a + b + b, a + c + c, b + b, b + b + b, b + b + c, c + c and c + c + c or any other order of a, b and c).

[0067] Furthermore, it is understood that the disclosure of multiple actions or functions in the description or claims should not be interpreted as being in a specific order. Therefore, the disclosure of multiple actions or functions does not restrict them to a particular order unless such actions or functions are not interchangeable for technical reasons. Moreover, in some implementations, a single action may comprise or be broken down into multiple sub-actions. Such sub-actions may be included and form part of the disclosure of that single action unless expressly excluded.

[0068] No element, action, or instruction used herein should be construed as critical or essential unless expressly described as such. Furthermore, as used herein, the article "the" is meant to encompass one or more elements referred to in conjunction with the article "the" and may be used interchangeably with "the one or the several." Also, as used herein, the terms "has," "have," "have," or the like are meant to be open terms that do not restrict an element they modify (e.g., an element that has A may also have B). Furthermore, the phrase "based on" is meant to mean "at least partly based on" unless expressly stated otherwise. As used herein, the term "several" may be replaced by "a multitude of" and vice versa.Furthermore, as used here, the term “or” should be inclusive when used in a series and can be used interchangeably with “and / or” unless explicitly stated otherwise (e.g. when used in combination with “either” or “only one of”). List of reference symbols 1 lines 2 Housing bodies 3 slots 4 Semiconductor device 5 Dielectric spacers 6 cutouts 7. Marginal section 8 groove structure 9 First Level 10 Further device 11 Opening 12 First sections of the dielectric spacer 13 Second sections of the dielectric spacer 14 Third sections of the dielectric spacer 15 Heat sinks 16 Underside of the heat sink 17 Substrate / PCB 18 Ground connection 19 clips 20 locking latch Level 21 22 Opening the PCB 23 lead 24 Process

Claims

[1] Semiconductor device comprising: a housing body having a top in a first plane and a bottom in a second plane parallel to the first plane, at least one first conductor protruding from the housing body, comprising: a first section in a plane parallel to the first plane, and a second section that is bent away from the first plane towards the second plane; a cavity positioned between the at least one first conductor and a feature of the semiconductor device; a removable dielectric spacer configured to be positioned in the cavity between the at least one first conductor and the feature; where the dielectric spacer is longer than the conductor. [2] Semiconductor device according to claim 1, wherein the feature is a second conductor. [3] Semiconductor device according to claim 1 or 2, wherein the dielectric spacer extends into the cavity. [4] Semiconductor device according to one of the preceding claims, wherein the dielectric spacer contacts a bottom surface of the cavity. [5] Semiconductor device according to one of the preceding claims, wherein the dielectric spacer extends along the second section of the conductor to encapsulate at least one outer surface of the conductor and to fill a gap between adjacent conductors. [6] Semiconductor device according to claim 1, wherein the feature is a heat sink, the heat sink comprising a flat bottom surface and being attached to the top surface of the housing body and projecting horizontally beyond a peripheral side wall of the housing body. [7] Semiconductor device according to claim 6, wherein an outer edge of the heat sink extends beyond an outer edge of the dielectric spacer; and / or wherein the dielectric spacer does not pass the outer edge of the heat sink. [8] Semiconductor device according to claim 6 or 7, wherein the dielectric spacer is configured to fill a gap between the second section of the conductor and the lower surface of the heat sink. [9] Semiconductor device according to any of the preceding claims, wherein the dielectric spacer is a plastic cover, the plastic cover being an integral part; and wherein the plastic cover is configured to be removablely attached to the housing body by means of a screw or a clip or a locking mechanism. [10] Semiconductor device according to one of the preceding claims, wherein the dielectric spacer acts as a spacer that includes the second section of the conductors, wherein the spacer is configured to control a distance between the bottom of the housing body and a second device to which the semiconductor device is to be attached. [11] Semiconductor device according to claim 8, wherein the spacer comprises a projection that extends into a slot of the second device, wherein the second device is a printed circuit board, PCB, to improve creepage distance between two conductors on the PCB. [12] Semiconductor device according to claim 11, wherein the projection has a height of approximately one thickness of the PCB. [13] Semiconductor device according to claim 11, wherein the slot is a through-hole through which the projection extends, and wherein a length of the projection is at least a length of the second section of the conductors extending through the second device. [14] Method for manufacturing a semiconductor device, comprising: Providing a housing body having a top in a first plane and a bottom in a second plane parallel to the first plane; Providing at least one conduit extending from the housing body, the provision comprising: Arranging a first section of the line in a plane parallel to the first plane, and Bending a second section of the line away from the first plane towards the second plane; Providing a cavity between the at least one conductor and a feature of the semiconductor device; and Positioning a removable dielectric spacer in the cavity between the at least one first conductor and the feature, wherein the dielectric spacer is longer than the conductor.

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