Interface device and computing unit with interface device

Abstract

The invention relates to an interface device (2) comprising an interface (4) having a first connection (22) for connection to a data cable (56) and a second connection (4b) for connection to a transceiver, a selection circuit (6) having a first connection (6a) that is connected to the second connection (4b) of the interface (4), a second connection (6b) that can be connected to or is connected to a connection of a transceiver (10), and a third connection (6c).The selection circuit (6) can be switched into a first and a second state by a selection signal, wherein in the first state signals are transmitted between the first terminal (6a) and the second terminal (6b) and in the second state signals are transmitted from the first terminal (6a) to the third terminal (6c), and a detection circuit (8) which is connected to the third terminal (6c) of the selection circuit (6), which has an output terminal (8b) and is configured to detect that a signal at the third terminal (6c) of the selection circuit (6) has a predetermined signal property, and in response to the detection of the predetermined signal property, to generate a wake-up signal (36) at the output terminal (8b).

Description

[0001] The present invention relates to an interface device and a computing unit comprising the interface device. Background of the invention

[0002] Computing units, such as computers, servers, or control units, can have different states or modes, each associated with different functionalities and energy consumption. In particular, a standby or sleep state can be provided, in which the functionality of the computing unit and its energy consumption are significantly reduced. Compared to a restart, this state allows for a relatively quick transition to a waking state, in which the computing unit, for example, exhibits its full functionality. This transition (so-called wake-up) can be triggered, especially over the network, by means of a suitable interface or transceiver for computing units integrated into a network, e.g., via "Wake-on-LAN," WO L. Disclosure of the invention

[0003] According to the invention, an interface device comprising an interface unit and a computing unit is proposed, the interface device having the features of the independent claims. Advantageous embodiments are the subject of the dependent claims and the following description.

[0004] The invention employs the measure of providing an interface device with an interface for connection to a network, in particular by means of a data cable, a selection circuit, and a detection circuit. The selection circuit can be switched, according to a selection signal, into a first state in which the interface is connected to a transceiver terminal and a second state in which the interface is connected to the detection circuit. The detection circuit is configured to recognize that a signal has a predetermined signal characteristic and, in response to the recognition of the predetermined signal characteristic, to generate a wake-up signal.The interface device enables a wake-up process from standby mode to be triggered via a network connection (over a data cable) in a computing unit where the interface device is used, even if a transceiver used for data communication is switched off during standby mode or does not provide wake-up functionality. This reduces the energy consumption of the computing unit during standby mode.

[0005] The interface is specifically an Ethernet interface, i.e., configured for connection via an Ethernet cable that includes electrical wires or conductors and is, for example, a twisted-pair cable. Unless otherwise stated, the terms "connected," "connection," etc., within the context of this application, refer to electrical connections or network connections.

[0006] According to one embodiment, the interface device comprises a first transceiver connected to the second port of the selector circuit. The first transceiver can be used for data communication via the interface device (e.g., from a processor or processor module connected to the first transceiver) when the selector circuit is in the first state. The first transceiver is configured, for example, for communication in one of the standards (defined in IEEE 803.2) 1000BASE-T, 1000BASE-T1, 2.5GBASE-T, 10GBASE-T, or similar standards with the same or higher data rates.

[0007] According to one embodiment, the detection circuit includes a control component configured to generate the selection signal. This allows, in particular, a signal level suitable for the selection signal to be achieved.

[0008] According to one embodiment, the control component is configured to generate the selection signal in response to the detection of the predetermined signal characteristic, such that the selection circuit is switched to the first state. This automatically connects a transceiver connected to the second terminal of the selection circuit (e.g., the first transceiver) to the interface and thus to the network or data cable, thereby enabling data communication.

[0009] According to one embodiment, the control component has a control terminal and is configured to generate the selection signal according to a first control signal at the control terminal such that the selection circuit is switched to the first state, and / or to generate the selection signal according to a second control signal at the control terminal such that the selection circuit is switched to the second state. This allows the state of the selection circuit to be controlled externally. The control component can, in particular, be configured to maintain the selection signal even when the first or second control signal is no longer present.

[0010] According to one embodiment, the predetermined signal characteristic consists of a signal at the third terminal of the selection circuit exhibiting a voltage above a predetermined voltage threshold and / or a current above a predetermined current threshold and / or a power above a predetermined power threshold and / or an energy above a predetermined energy threshold. The detection circuit includes, in particular, a sensor configured to determine or measure the voltage and / or current and / or power and / or energy of signals at the third terminal of the selection circuit. This signal characteristic can be easily detected. The threshold used is, for example, chosen such that messages transmitted via the data cable (from another processing unit or...)(whose interface to the interface device), which conform to the network specification used in the network, are recognized as a predetermined signal property. Accordingly, any network traffic can trigger a wake-up.

[0011] According to one embodiment, the predetermined signal characteristic consists in a signal at the third terminal of the selection circuit being a predetermined wake-up message. The detection circuit includes a second transceiver connected to the third terminal of the selection circuit, configured to detect the predetermined wake-up message, particularly when the second transceiver is in standby mode, and to generate the wake-up signal at the output terminal in response to the detection of the predetermined wake-up message. The second transceiver, in particular, has lower power consumption compared to a transceiver connected to the second terminal of the selection circuit (e.g., the first transceiver). (For example, the second transceiver is relatively simple in design and suitable only for low data rates.)in the range of 10 Mbit to 100 Mbit or less, while the first transceiver is suitable for data rates in the range of 1 Gbit to 10 Gbit or more. The second transceiver is, for example, configured for communication in one of the standards (defined in IEEE 803.2) 10BASE-T, 100BASE-TX, 100BASE-T4, 100BASE-FX or similar standards with the same or higher data rates.

[0012] According to one embodiment, the second transceiver has an identification number or address, and the predetermined wake-up message includes this identification number or address. This embodiment makes it possible, in a (data communication) network with multiple computing units, to selectively start or wake up from a standby state the computing unit whose second transceiver has a specific identification number or address.

[0013] According to one embodiment, the selection circuit is a bidirectional multiplexer. For example, the selection circuit can have semiconductor switching elements by means of which electrical connections can be selectively established between the first and second terminals of the selection circuit or between the first and third terminals of the selection circuit.

[0014] A computing unit according to the invention comprises an interface device according to the invention, a processor module, a power supply module and a power control, wherein the power control is configured to trigger a wake-up process or transition of the computing unit from the standby state to a waking state in response to the wake-up signal when the computing unit is in a standby state.

[0015] Power control generally serves to implement various power states (e.g., standby, wake, etc.) of the processing unit and / or to cause components of the processing unit to assume or be placed into assigned states. For example, power control can be configured to place the processor module and the power supply module into a wake state during the wake-up process. Power control is specifically provided for and / or implemented in the processor module and / or the power supply module.

[0016] According to one embodiment, the power control is configured to generate the selection signal during and / or after the wake-up process such that the selection circuit is switched to the first state, or, if necessary, to activate the control component of the detection circuit with the first control signal during and / or after the wake-up process. Accordingly, data communication can take place in the wake-up state via a transceiver connected to the first terminal of the selection circuit (e.g., the first transceiver).

[0017] According to one embodiment, the power control is configured to generate the selection signal during and / or after the processing unit enters standby mode, such that the selection circuit is switched to the second state, or, if necessary, to control the control component of the detection circuit with the second control signal during and / or after the processing unit enters standby mode. Accordingly, in the standby mode of the processing unit, the detection circuit is again connected to the interface via the selection circuit.

[0018] According to one embodiment, the power control is configured to put a transceiver connected to the second terminal of the selection circuit, or optionally the first transceiver, into a waking state during the wake-up process. According to another embodiment, the power control is configured to put a transceiver connected to the second terminal of the selection circuit, or optionally the first transceiver, into an off state during and / or after the processing unit transitions into standby mode. This prevents the (first) transceiver from consuming power in standby mode.

[0019] In one embodiment, the first transceiver is connected to the processor module and the power supply module. The processor module can then communicate data via the first transceiver and the interface device, with the first transceiver being powered by the power supply module.

[0020] Further advantages and embodiments of the invention will become apparent from the description and the accompanying drawing.

[0021] The invention is schematically illustrated in the drawing using exemplary embodiments and is described below with reference to the drawing. Brief description of the drawings Fig. Figure 1 shows an interface device according to an exemplary embodiment of the invention. Fig. Figure 2 shows a computing unit that includes an interface device. embodiment(s) of the invention

[0022] Fig. Figure 1 shows an interface device 2 according to an exemplary embodiment of the invention.

[0023] The interface device 2 comprises an interface 4, a selection circuit 6, in particular a multiplexer, and a detection circuit 8. The interface 4 is designed for connection to a network data cable and includes first pins or contacts (i.e., electrical contacts, hereinafter referred to simply as contacts or pins) for connection to conductors of the data cable, for example, integrated into a first terminal 22 for the data cable, symbolized here, for instance, as an RJ45 connector. Signals, in particular voltage signals used to communicate data, are transmitted between the first contacts and second contacts of the interface 4, which form a second terminal 4b of the interface 4. A filter element 24 may be provided between them to provide galvanic isolation and / or to prevent electromagnetic interference or similar interference. The interface 4 is, for example,to a medium-dependent interface (MDI) known to those skilled in the art. In particular, interface 4 is an Ethernet interface, wherein the optionally present filter element 24 is typically referred to as an Ethernet transformer or Ethernet magnetics and serves in particular to meet requirements for 10 / 100 / 1000BASE-T networks according to the IEEE 802.3-2012 specification.

[0024] Interface 4 is connected to selection circuit 6, i.e., the second terminal 4b of interface 4 is connected to a first terminal 6a of selection circuit 6, with the first contacts of the first terminal 6a of selection circuit 6 being connected to the second contacts of interface 4 via electrical leads. Selection circuit 6 further comprises a second terminal 6b with second contacts and a third terminal 6c with third contacts, and can be switched between a first state and a second state according to a selection signal. In the first state, signals, in particular voltage signals, are transmitted between the first terminal 6a and the second terminal 6b of selection circuit 6, i.e., between the first contacts and the corresponding second contacts.

[0025] In the second state, signals, in particular voltage signals, are transmitted from the first terminal 6a of the selection circuit 6 to the third terminal 6c of the selection circuit 6, or furthermore, signals, in particular voltage signals, are transmitted between the first terminal 6a of the selection circuit 6 and the third terminal 6c of the selection circuit 6. The third terminal 6c of the selection circuit 6 may (but need not) have fewer contacts than the first terminal 6a of the selection circuit 6. This can be the case, for example, if it is known which of the contacts of the first 22 and the second 4b terminal of the interface 4 or of the contacts of the first terminal 6a of the selection circuit 6 serve as receive pins or receive contacts (i.e., at which voltage signals are present when receiving data), for instance, if different contacts or pairs of contacts are used for sending and receiving.The voltage signals from these receiving contacts are then transmitted in the second state to the smaller number of third contacts. The selection circuit 6 is, in particular, a bidirectional multiplexer or demultiplexer.

[0026] In the first state, no signals are transmitted, in particular from the first terminal 6a to the third terminal 6c of the selection circuit 6, or between the first terminal 6a and the third terminal 6c of the selection circuit 6. In the second state, no signals are transmitted, in particular between the first terminal 6a and the second terminal 6b of the selection circuit 6.

[0027] To implement the functionality of the selection circuit 6, it can be configured, for example, to electrically connect the first terminal 6a (i.e., the first contacts) either in the first state to the second terminal 6b (i.e., the second contacts) or in the second state to the third terminal 6c (i.e., the third contacts), depending on the selection signal. For this purpose, switching elements, in particular semiconductor switching elements such as MOSFETs (metal-oxide-semiconductor field-effect transistors), can be provided, with which the corresponding connections between the contacts are selectively switched to a conductive or non-conductive state.

[0028] Interface 2 can further comprise a (first) transceiver 10 (PHY) connected to the second terminal 6b of the selection circuit 6, e.g., via a first terminal 10a of the transceiver 10. A second terminal 10b of the transceiver 10 is brought out of interface 2 via appropriate lines and can be connected to, for example, a processor or similar device. In the first state of the selection circuit 6, data can therefore be communicated via the transceiver 10 and a data cable connected to interface 4 (e.g., between a processor connected to the second terminal 10b of the transceiver 10 and a computing unit connected to the first terminal 22 of interface 4 via the data cable).

[0029] The detection circuit 8 is connected, for example, at an input terminal 8a of the detection circuit to the third terminal 6c of the selection circuit 6 and is configured to detect whether a signal, in particular a voltage signal, is present at the third terminal 6c of the selection circuit 6 which has a predetermined signal property, and, if it is detected that the predetermined signal property is present, i.e., that a signal with the predetermined signal property is present, to generate a wake-up signal 36, for example at an output terminal 8b of the detection circuit.

[0030] The wake-up signal 36 is transmitted, for example, to a power control 12 of a computing unit connected to the output terminal 8b, in which the interface device 2 is used, which in response to the wake-up signal 36 puts the computing unit from a standby mode or standby state (or sleep state) into an operating mode or operating state (or awake state).

[0031] The predetermined signal characteristic, which is detected by the detection circuit 8 at the third terminal 6c of the selection circuit 6 (or at the input terminal of the detection circuit), can consist of a signal present at the third terminal 6c of the selection circuit 6 exceeding a predetermined voltage threshold and / or a predetermined current threshold and / or a predetermined power threshold and / or a predetermined energy threshold. For this purpose, a sensor 32 can be provided in the detection circuit 8, e.g., a voltage, current, power, or energy sensor, which is specifically configured to generate the wake-up signal 36 or to trigger its generation (e.g., via a comparator or similar device) when the predetermined voltage, current, power, or energy threshold is exceeded. The voltage, current, power, or energy threshold can be, for example,The threshold is chosen so that network messages sent via the data cable, which, for example, conform to a specification of the respective network (such as those detected and sent by transceivers), cause the respective threshold to be exceeded. The wake-up signal is thus generated as soon as a computing unit connected via the data cable begins to send network messages.

[0032] Alternatively or additionally, the predetermined signal property can be that an incoming signal has a predetermined signal pattern, i.e., that the signal to be detected is a predetermined network message (received via the data cable) or a wake-up message, such as a WoL wake-up message (WoL: Wake-on-LAN). In this case, a (second) transceiver (not shown, instead of or in addition to sensor 32) can be provided, which is configured to detect such a wake-up message, especially when it is in a standby state. Such a second transceiver has, for example, very low power consumption in standby mode, and in particular, lower power consumption relative to the first transceiver 10 (for example, less than 50% or less than 20% of the first transceiver in standby mode), e.g., if the second transceiver is designed for lower data rates than the first transceiver.The predetermined signal pattern, for example in the case of a wake-up message, can include an identifier (e.g., MAC and / or IP address) that must match an identifier of the second transceiver to generate the wake-up signal. If the identifier contained in the wake-up message does not match the identifier of the second transceiver (or if the wake-up message does not contain an identifier), the wake-up signal is not generated. This allows for the targeted wake-up of individual processing units in a network with multiple units, identified by their identifier. Of course, different signal patterns can also be used instead of a single identifier for different processing units.

[0033] The detection circuit 8 can include a control component 34 configured to selectively switch the selection circuit 6 to either the first or the second state. The control component 34 can optionally be controlled to switch the selection circuit 6 to the first and / or second state. In particular, the control component 34 can be controlled from outside the interface device 2, e.g., by the power control 12, to switch the selection circuit 6 to the second state, and optionally to switch the selection circuit 6 to the first state. The control component 34, or the detection circuit 8, can for this purpose have, for example, a control connection 8c.

[0034] The detection circuit 8 can further be configured to switch the selection circuit 6 to the first state when the predetermined signal characteristic is detected at the third terminal of the selection circuit 6 (in addition to generating the wake-up signal 36). For example, the control component 34 can be configured to switch the selection circuit 6 (automatically) to the first state in response to the generation of the wake-up signal 36. Switching to the second state can then be triggered externally, e.g., via the control terminal 8c.

[0035] In other embodiments, the selection circuit 6 may be directly controllable from outside the interface device 2, e.g., directly by the power circuit 12. In this case, the detection circuit 8 does not need to have a control component.

[0036] Fig. Figure 2 shows a computing unit 50, which includes an interface device 2, such as in Fig. 1 shown, includes.

[0037] In addition to the interface device 2, which is connected here by a data cable 56, the computing unit 50 further comprises a power controller 12, a processor module 52, and a power supply module 54. The power controller 12 can be integrated into the processor module 52 and / or the power supply module 54 (e.g., as hardware by means of appropriate switching elements) and / or be at least partially implemented therein (e.g., by executing a computer program). The computing unit 50 generally includes other components not shown, e.g., volatile and / or non-volatile memory and / or further interfaces.

[0038] The processor module 52, for example, has one or more processing cores and is configured to execute computer programs in the one or more processing cores to implement certain functionalities of the arithmetic unit. The processor module 52 is connected, for example, to the interface device 2 for data communication, i.e., to the first transceiver if one is provided in the interface device 2, or via a separately provided transceiver (not shown) connected to the second terminal 6b of the selection circuit 6. The power supply module 54 is connected, for example, to an external power supply and provides operating voltages for the components of the arithmetic units, i.e., in particular for the processor module 52 and the interface device 2. Lines enclosing the corresponding lines for the operating voltages are shown in the figure.These lines should also include lines for data communication and / or for control and / or for the transmission of signals (e.g. wake-up signal) (where a single summary line is shown in each case).

[0039] The computing unit 50, the first transceiver optionally provided in the interface device 2 or the separately provided transceiver, the processor module 52, and the power supply module 54 have different power states, whereby, in addition to an off state and (at least) an operating state (or wake state), a standby state or sleep state may be provided. The different power states are associated in particular with different energy consumption. In particular, the operating voltages provided may differ depending on the power state (in their magnitude and / or number).

[0040] The power controller 12 is configured to implement or trigger the implementation of these various power states of the computing unit or its components. Each power state of the computing unit 50 is specifically assigned a corresponding power state of the computing unit's components. In particular, it can be provided that when the computing unit 50 is in standby mode, the first transceiver or the separately provided transceiver connected to the interface device is in the off state; that is, the standby state of the computing unit is assigned the off state of the first transceiver or the separately provided transceiver. Likewise, the standby state of the computing unit can be assigned the off state or a standby state (in which, for example, only the power controller is active if it is integrated into the processor module) of the processor module or any other components.

[0041] The power control 12 is, as already mentioned in Fig. The interface device 2, shown in Figure 1, is connected to receive the wake-up signal and, if necessary, to control the selection circuit 6 of the interface device 2. The power control 12 is configured to switch the computing unit 50, when it is in standby mode, into an operating state (wake-up state) in response to the wake-up signal.

[0042] The interface device 2 according to the invention thus enables a standby state of the computing unit in which it has very low energy consumption, wherein in particular the first transceiver (or a corresponding separate transceiver), which may have a WoL functionality, but which requires a standby or wake state of the transceiver in which, e.g. in the case of transceivers intended for high data rates, a certain, not to be neglected energy consumption occurs (especially if the computing unit is supplied with energy by a battery), can be put into the off state.

Claims

[1] Interface device (2) comprising an interface (4) having a first port (22) for connection to a data cable (56) and having a second port (4b) for connection to a transceiver; a selection circuit (6) comprising a first terminal (6a) connected to the second terminal (4b) of the interface (4), a second terminal (6b) connectable to or connected to a terminal (10a) of a transceiver (10), and a third terminal (6c), wherein the selection circuit (6) can be switched into a first and a second state by a selection signal, wherein in the first state signals are transmitted between the first terminal (6a) of the selection circuit (6) and the second terminal (6b) of the selection circuit (6), and wherein in the second state signals are transmitted from the first terminal (6a) of the selection circuit (6) to the third terminal (6c) of the selection circuit (6); and a detection circuit (8) connected to the third terminal (6c) of the selection circuit (6), which has an output terminal (8b) and is configured to detect that a signal at the third terminal (6c) of the selection circuit (6) has a predetermined signal property, and in response to the detection of the predetermined signal property, to generate a wake-up signal (36) at the output terminal (8b). [2] Interface device according to claim 1, further comprising a first transceiver (10) which is connected to the second terminal (6b) of the selection circuit (6). [3] Interface device according to one of the preceding claims, wherein the detection circuit (8) has a control component (34) configured to generate the selection signal. [4] Interface device according to claim 3, wherein the control component (34) is configured to generate the selection signal in response to the detection of the predetermined signal property or the generation of the wake-up signal, such that the selection circuit (6) is switched to the first state. [5] Interface device according to claim 3 or 4, wherein the control component (34) has a control terminal (8c) and is configured to generate the selection signal according to a first control signal at the control terminal (8c) such that the selection circuit (6) is switched to the first state and / or to generate the selection signal according to a second control signal at the control terminal (8c) such that the selection circuit (6) is switched to the second state. [6] Interface device according to any one of claims 1 to 5, wherein the predetermined signal characteristic consists in that a signal at the third terminal (6c) of the selection circuit (6) has a voltage above a predetermined voltage threshold and / or a current above a predetermined current threshold and / or a power above a predetermined power threshold and / or an energy above a predetermined energy threshold; wherein the detection circuit (8) in particular has a sensor (32) which is configured to determine or measure the voltage and / or the current and / or the power and / or the energy of signals at the third terminal of the selection circuit (6). [7] Interface device according to one of the preceding claims, wherein the predetermined signal characteristic consists in a signal at the third terminal (6c) of the selection circuit (6) being a predetermined wake-up message; wherein the detection circuit (8) has a second transceiver which is connected to the third terminal (6c) of the selection circuit (6) and which is configured to detect the predetermined wake-up message, in particular in a standby state of the second transceiver, and to generate the wake-up signal at the output terminal (8b) in response to the detection of the predetermined wake-up message. [8] Interface device (2) according to claim 7, wherein the second transceiver has an identification number and the predetermined wake-up message includes the identification number. [9] Interface device (2) according to one of the preceding claims, wherein the selection circuit (6) is a bidirectional multiplexer. [10] having a computing unit (50) an interface device (2) according to one of the preceding claims; a processor module (52); a power supply module (54); and a power control (12); wherein the power control (12) is configured to trigger a wake-up process or transition of the computing unit (50) from the standby state to a waking state in response to the wake-up signal when the computing unit (50) is in a standby state. [11] Computing unit (50) according to claim 10, wherein the power control (12) is configured to generate the selection signal during the wake-up process and / or after the wake-up process such that the selection circuit (6) is switched to the first state, or, if the interface device (2) includes the features of claim 5, to control the control component (34) of the recognition circuit (8) with the first control signal during the wake-up process and / or after the wake-up process. [12] Computing unit (50) according to claim 10 or 11, wherein the power control (12) is configured to generate the selection signal during and / or after a transition of the computing unit (50) into the standby state such that the selection circuit (6) is switched into the second state, or, if the interface device (2) includes the features of claim 5, to control the control component (34) of the recognition circuit (8) with the second control signal during and / or after the transition of the computing unit into the standby state. [13] Computing unit (50) according to one of claims 10 to 12, wherein the power control (12) is provided and / or implemented in the processor module (52) and / or in the power supply module (54). [14] Computing unit (50) according to one of claims 10 to 13, wherein the power control (12) is configured to put the processor module (52) and the power supply module (54) into a wake-up state during the wake-up process. [15] Computing unit (50) according to any one of claims 10 to 14, wherein the power control (12) is configured to put a transceiver connected to the second terminal (6b) of the selection circuit (6) or, if the interface device (2) includes the features of claim 2, the first transceiver (10) into a wake-up state during the wake-up process; and / or wherein the power control (12) is configured to put a transceiver connected to the second terminal (6b) of the selection circuit (6) or, if the interface device (6) includes the features of claim 2, the first transceiver (10) into an off state during and / or after a transition of the computing unit (50) into the standby state.

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