System and procedure for testing and / or measuring

Abstract

A test and / or measurement system (10) is described. The test and / or measurement system (10) comprises a noise generator (14), a first terminal (22), a second terminal (24), at least one receiver circuit (16, 18), and at least one processing circuit (36, 50, 52). The noise generator (14) is designed to generate a noise signal, wherein the noise signal has a frequency spectrum extending over a predetermined frequency band of interest. The noise generator (14) is connected to the first terminal (22), wherein the first terminal (22) can be connected to a first DUT terminal of a device under test (12) so that the noise signal can be supplied to the device under test (12).The second terminal (24) can be connected to a second DUT terminal of the device under test (12) so that a test signal is received from the device under test (12), wherein the at least one receiver circuit (18) is connected to the second terminal (24) so ​​that the test signal is received. The at least one receiver circuit (18) is configured to digitize the test signal, thereby obtaining a digitized test signal. The at least one processing circuit (50) is configured to transform the digitized test signal into a frequency domain, thereby obtaining a transformed test signal with multiple frequency bins. The at least one processing circuit (50) is configured to determine the signal power of the transformed test signal for at least two of the multiple frequency bins simultaneously. Furthermore, a test and / or measurement procedure for testing a device under test (12) is described.

Description

[0001] The present invention generally relates to a testing and / or measuring system. The present invention further relates to a testing and / or measuring method for testing a test object.

[0002] Noise measurements on a test object are usually performed by scanning a receiver over a frequency range of interest, sequentially measuring the noise generated by the test object at each frequency point.

[0003] Due to the typically low power level of the noise generated by the object under test, these measurements usually take a relatively long time, especially if the frequency range to be tested is large.

[0004] Therefore, the object of the present invention is to provide a testing and / or measuring system and a testing and / or measuring method that enable a more time-efficient measurement of the noise generated by a test object.

[0005] According to the present invention, the problem is solved by a test and / or measurement system. The test and / or measurement system comprises a noise generator, a first terminal, a second terminal, at least one receiver circuit, and at least one processing circuit. The noise generator is designed to generate a noise signal, wherein the noise signal has a frequency spectrum extending over a predetermined frequency band of interest. The noise generator is connected to the first terminal, the first terminal being able to be connected to a first device under test (DUT) terminal of the DUT, so that the noise signal can be supplied to the DUT. The second terminal can be connected to a second DUT terminal of the DUT, so that a test signal is received from the DUT, with the at least one receiver circuit being connected to the second terminal to receive the test signal.The at least one receiver circuit is designed to digitize the test signal, resulting in a digitized test signal. The at least one processing circuit is designed to transform the digitized test signal into a frequency range, resulting in a transformed test signal with multiple frequency bins. The at least one processing circuit is designed to determine the signal power of the transformed test signal for at least two of the multiple frequency bins simultaneously.

[0006] Here and in the following, the term "circuit" is to be understood as a description of suitable hardware, suitable software or a combination of hardware and software that is designed to have a specific functionality.

[0007] In fact, the term "circuit" should be understood as the designation of a module with suitable hardware, suitable software or a combination of hardware and software, which is designed to have a specific functionality.

[0008] The hardware can include, among other things, a CPU, a GPU, an FPGA, an ASIC, or other types of electronic circuits.

[0009] Furthermore, the term "connected" is to be understood as referring to a direct or indirect connection between the respective components. The respective components can be connected, for example, via a conductor and / or via electromagnetic coupling.

[0010] The testing and / or measuring system according to the present invention is based on the idea of ​​determining the noise generated by the test object for at least two frequency bins simultaneously.

[0011] This is achieved by designing the receiver circuit to process and digitize the test signal with a bandwidth sufficient to determine the signal power of the transformed test signal for at least two frequency bins simultaneously.

[0012] Accordingly, the receiver circuit can be designed as a broadband receiver circuit, i.e., as a receiver circuit designed to process and digitize the test signal over a bandwidth that covers at least part, and in particular completely, the frequency band of interest.

[0013] The test signal corresponds to the noise signal processed by the device under test. Accordingly, the test signal comprises the noise signal modified according to a transfer function of the device under test, as well as noise generated by the device under test itself.

[0014] The power level of the noise signal is known. In fact, the power level of the noise signal can be known beforehand and / or determined in a separate measurement.

[0015] Based on the known noise signal and the transformed test signal, a noise power level of the noise generated by the device under test can be determined. This determined noise level can then be used to determine a noise characteristic of the device under test, such as its noise figure.

[0016] Since the signal power of the transformed test signal is determined for at least two frequency bins simultaneously instead of for each frequency bin sequentially, the measurement time required to determine the noise generated by the test object is significantly reduced compared to the state of the art.

[0017] If the test object has more than one output port, i.e., at least two second DUT ports, the measurements described above and below can be performed simultaneously for the at least two second DUT ports.

[0018] In fact, the test and / or measurement system can have at least two receiver circuits, with each receiver circuit being connected to one of the at least two second DUT connections.

[0019] According to one aspect of the present invention, the digitized test signal is a data stream. In particular, the test signal can be continuously received and digitized by the at least one receiver circuit, thereby generating the digitized test signal as a continuous data stream.

[0020] The testing and / or measuring system according to the present invention can be configured as a vector network analyzer, spectrum analyzer and / or any other suitable type of testing and / or measuring instrument, or may include such an instrument.

[0021] According to one aspect of the present invention, the at least one processing circuit is designed to subtract a signal power of the noise signal from the determined signal power of the transformed test signal for each of the at least two frequency bins. By subtracting the signal power of the noise signal from the determined signal power of the transformed test signal, a noise power level of the noise generated by the test object can be determined for each of the at least two frequency bins.

[0022] In one embodiment of the present invention, the at least one receiver circuit is configured to digitize the noise signal, thereby obtaining a digitized noise signal. The at least one processing circuit is configured to transform the digitized noise signal into a frequency domain, thereby obtaining a transformed noise signal with multiple frequency bins. The at least one processing circuit is configured to determine the signal power of the transformed noise signal for at least two of the multiple frequency bins simultaneously. Accordingly, the signal power of the noise signal can be determined in a separate measurement, e.g., in a separate calibration measurement performed to calibrate the test and / or measurement system according to the present invention.

[0023] According to a variant of the present invention, the at least one receiver circuit can comprise a first receiver circuit and a second receiver circuit. The first receiver circuit can be configured to digitize the noise signal, while the second receiver circuit can be configured to digitize the test signal. In this case, both measurements can be performed simultaneously.

[0024] However, it is also conceivable that the at least one receiver circuit comprises a single receiver circuit designed to digitize both the noise signal and the test signal. In this case, the calibration measurement, i.e., the determination of the signal power of the transformed noise signal, and the measurements on the test signal can be performed sequentially.

[0025] The test and / or measurement system may further include a coupling circuit, wherein the coupling circuit is connected between the noise circuit and the first terminal, wherein the coupling circuit is further connected to the at least one receiver circuit, and wherein the coupling circuit is designed to forward the noise signal to both the first terminal and the at least one receiver circuit.

[0026] The coupling circuit can include an electrical connection linking the noise circuit and the first terminal. Furthermore, the coupling circuit can be designed to couple the noise signal from the electrical connection to the at least one receiver circuit, in particular by means of electromagnetic coupling.

[0027] Alternatively, the coupling circuit can have an electrical connection that links the noise circuit and the at least one receiver circuit. In this case, the coupling circuit can further be designed to couple the noise signal from the electrical connection to the first terminal, in particular by means of electromagnetic coupling.

[0028] The coupling circuit can be designed, for example, as a directional coupler.

[0029] The claimed test and / or measurement system can further comprise a memory, wherein a signal power of the noise signal for the multiple frequency bins is stored in the memory. In fact, the signal power of the noise signal can be permanently stored in the memory or renewed at specific time intervals, particularly periodically. The signal power of the noise signal stored in the memory can, for example, be renewed during calibration measurements, which can be performed at specific time intervals, particularly periodically.

[0030] The signal power of the noise signal can be loaded from memory by the processing circuit for further processing, as described above.

[0031] According to a further aspect of the present invention, the at least one receiver circuit is a broadband receiver circuit, such that the digitized test signal has a frequency spectrum that extends at least partially over the frequency band of interest. The term "at least partially" means that the frequency spectrum of the digitized test signal extends over at least two frequency bins, in particular over a certain portion of the frequency band of interest. Accordingly, the measurement time required to determine the noise generated by the device under test is significantly reduced, since the noise power level of the noise generated by the device under test can be determined simultaneously for a substantial portion of the frequency band of interest.

[0032] The determined proportion can be, for example, 5%, 10%, 25%, 50%, 75%, or any other value in between or above.

[0033] In fact, the frequency spectrum of the digitized test signal can extend over the entire frequency band of interest, so that the noise generated by the test object can be determined simultaneously for the entire frequency band of interest, thereby significantly reducing the measurement time required to determine the noise power level of the noise generated by the test object.

[0034] In a further embodiment of the present invention, the at least one processing circuit is designed to simultaneously determine the signal power of the transformed test signal for at least a portion of the multiple frequency bins, wherein this portion of the multiple frequency bins extends at least partially over the frequency band of interest. The term "at least partially" is to be understood as meaning that this portion of the multiple frequency bins extends over at least two frequency bins, in particular over a specific portion of the frequency band of interest. Accordingly, the measurement time required to determine the noise generated by the device under test is significantly reduced, since the noise power level of the noise generated by the device under test can be determined simultaneously for a substantial portion of the frequency band of interest.

[0035] The specified percentage can be, for example, 5%, 10%, 25%, 50%, 75%, or any other value in between or above.

[0036] In fact, the portion of the multiple frequency bins can extend across the entire frequency band of interest, so that the noise generated by the test object can be determined simultaneously for the entire frequency band of interest, thereby significantly reducing the required measurement time.

[0037] One aspect of the present invention provides that the receiver circuit can be tuned to different parts of the frequency band of interest. Accordingly, the signal power of the transformed test signal, the signal power of the noise signal, and / or the noise generated by the device under test can be determined successively for the different parts of the frequency band of interest. By simultaneously reducing the measurement time required to determine the noise generated by the device under test, a receiver circuit with a smaller bandwidth can be used, thus reducing the manufacturing costs of the test and / or measurement system.

[0038] In a further embodiment of the present invention, the at least one receiver circuit comprises a mixing circuit, wherein the mixing circuit is configured to mix the test signal with a local oscillator signal, thereby converting the test signal into an intermediate frequency (IF). More precisely, the mixing circuit can be configured to mix the test signal with the local oscillator signal such that the test signal is converted into a specific IF band. This ensures lower signal losses after the mixing circuit as well as efficient processing of the test signal after the mixing circuit.

[0039] The at least one receiver circuit can include a further mixing circuit, which is designed to mix the noise signal with a local oscillator signal, thereby converting the noise signal into an intermediate frequency (IF). More precisely, the further mixing circuit can be designed to mix the noise signal with the local oscillator signal in such a way that the noise signal is converted into a specific IF band. This ensures lower signal loss after the further mixing circuit as well as efficient processing of the noise signal after the further mixing circuit.

[0040] The at least one receiver circuit can include at least one filter circuit connected downstream of the mixer circuit. This filter circuit reliably rejects unwanted frequency ranges of the test signal and / or the noise signal mixed with the local oscillator signal.

[0041] Another aspect of the present invention provides that the at least one receiver circuit comprises at least one analog-to-digital converter (ADC), wherein the at least one ADC is designed to digitize the test signal, wherein the at least one ADC is connected to the second terminal, and wherein a signal path between the second terminal and the at least one ADC has a mixing circuit or does not have a mixing circuit.

[0042] If the signal path between the second connection and the at least one ADU does not have a mixed circuit, the at least one ADU can be a broadband ADU, so that a broadband digitization of the test signal is carried out.

[0043] If the bandwidth of the test signal is larger than the bandwidth of the test signal, the mixing circuit can be provided to convert the test signal into an operating bandwidth of the at least one ADU.

[0044] The test and / or measurement system can further include a data storage circuit, wherein the data storage circuit is connected to the at least one ADC and wherein the data storage circuit is designed to store the digitized test signal. This allows post-processing of the digitized test signal, so that the measurements described above do not need to be performed in real time.

[0045] According to another aspect of the present invention, the processing circuit is designed to load the digitized test signal from the data storage circuit.

[0046] In one embodiment of the present invention, the processing circuit is designed to weight the digitized test signal using a window function. In fact, the window function can be a time-domain window function, such that a specific time slice of the digitized test signal is selected by the window function.

[0047] The processing circuit can be designed to transform the digitized test signal weighted by the window function into a frequency range, thereby obtaining the transformed test signal.

[0048] In fact, the window function can correspond to an impulse response of a resolution filter, where a bandwidth of the resolution filter determines a length of the transformation into a frequency domain, in particular a length of the corresponding fast Fourier transform.

[0049] The processing circuit can be designed to determine a squared value for each of the at least two frequency bins of the transformed test signal, thereby obtaining the signal power. In fact, the squared value of the transformed test signal can be determined separately for each frequency bin.

[0050] Another aspect of the present invention provides that the multiple frequency bins comprise interpolated frequency bins. In other words, the processing circuit can be designed to interpolate the transformed test signal such that the transformed test signal includes both frequency bins derived from the transformation into the frequency domain and frequency bins derived from the interpolation. In this way, a resolution for determining the signal power of the transformed test signal and / or a resolution for determining the noise power level of the noise generated by the device under test can be adapted.

[0051] In fact, the frequency bins resulting from the transformation into the frequency domain and the frequency bins resulting from interpolation can alternate.

[0052] According to one aspect of the present invention, the at least one receiver circuit is configured to repeatedly digitize the test signal, wherein the processing circuit is configured to repeatedly determine the signal power, and wherein the processing circuit is configured to determine an average signal power corresponding to the time-averaged signal power of the test signal. Accordingly, an average noise power level of the noise generated by the test object can be determined by the processing circuit based on the determined average signal power.

[0053] According to a further aspect of the present invention, the digitized test signal comprises IQ data relating to the test signal. Thus, the digitized test signal includes both amplitude and phase information about the test signal.

[0054] It is possible that the signal path between the noise reduction circuit and the first connection does not include an amplifier. Accordingly, the noise signal supplied to the device under test is not amplified and / or distorted by a further amplifier. Furthermore, when determining the noise generated by the device under test, no gain applied to the noise signal by an amplifier needs to be taken into account.

[0055] In one embodiment of the present invention, the noise reduction circuit is either an active or a passive noise reduction circuit. In other words, the noise reduction circuit can actively generate the noise signal, for example, via a suitable signal generator. Alternatively or additionally, the noise reduction circuit can passively generate the noise signal, i.e., without active signal generation.

[0056] The noise reduction circuit includes, for example, a signal generator, an attenuator and / or a resistor with a predefined resistance value.

[0057] Accordingly, the signal generator of the noise circuit can actively generate the noise signal.

[0058] The attenuator can attenuate an RF signal generated or received by another circuit with a high attenuation factor of, for example, 50 dB or more.

[0059] The resistor passively generates a predefined thermal noise signal that depends on the temperature of the resistor.

[0060] According to the present invention, the problem is further solved by a testing and / or measuring method for testing a test object. The testing and / or measuring method comprises the following steps: - Generating a noise signal using a noise circuit, wherein the noise signal has a frequency spectrum extending over a predetermined frequency band of interest, - Feeding a test object with the noise signal via a first connection, - Receiving a test signal corresponding to the noise signal from the object under test via a second connection, - Digitizing the test signal by at least one receiver circuit, thereby obtaining a digitized test signal, - Transforming the digitized test signal into a frequency domain by at least one processing circuit, thereby obtaining a transformed test signal with multiple frequency bins, and - Determining the signal power of the transformed test signal for at least two frequency bins of the multiple frequency bins simultaneously by the at least one processing circuit.

[0061] In fact, the testing and / or measuring system can be designed to perform the testing and / or measuring procedure according to one of the variants described above.

[0062] Regarding the further advantages and characteristics of the testing and / or measuring method, reference is made to the above explanations concerning the testing and / or measuring system, which also apply to the testing and / or measuring method and vice versa.

[0063] The foregoing aspects and many of the associated advantages of the claimed subject matter are better understood when they are clarified by the following detailed description in conjunction with the accompanying drawings. These show: - Fig. 1 schematically a testing and / or measuring system according to the present invention, - Fig. 2 schematically a processing circuit of the test and / or measurement system Fig. 1, - Fig. 3 a flowchart of a testing and / or measuring method according to the present invention, - Fig. 4 schematically a second variant of the testing and / or measuring system Fig. 1, - Fig. 5 schematically a third variant of the testing and / or measuring system Fig. 1, and - Fig. 6 schematically a fourth variant of the testing and / or measuring system Fig. 1.

[0064] The detailed description set forth below in conjunction with the accompanying drawings, in which identical reference numerals denote identical elements, serves as a description of various embodiments of the disclosed subject matter and is not intended to represent the only embodiments. Each embodiment described in this disclosure serves only as an example or illustration and is not to be construed as preferred or advantageous over other embodiments. The illustrative examples given herein are not to be understood as exhaustive or as limiting the claimed subject matter to the forms disclosed herein.

[0065] For the purposes of this disclosure, for example, the expression “at least one of A, B and C” means (A), (B), (C), (A and B), (A and C), (B and C), or (A, B and C), including all other possible permutations, when more than three elements are listed. In other words, the term “at least one of A and B” generally means “A and / or B”, namely “A” alone, “B” alone, or “A and B”.

[0066] Fig. Figure 1 schematically shows a test and / or measurement system 10 designed to perform tests and / or measurements on a test object 12.

[0067] In general, the test object 12 is an electronic device designed to receive and process an input signal in order to obtain an output signal.

[0068] The test object 12 may, for example, be or include an amplifier, a mixer, a filter or other electronic components or devices.

[0069] The test and / or measurement system 10 can be set up as a vector network analyzer (VNA) or as a spectrum analyzer, or may include both.

[0070] However, it is understood that the testing and / or measuring system 10 may be set up as, or include, any other suitable type of testing and / or measuring instrument designed to perform the functions described below.

[0071] For example, the test and / or measurement system 10 may consist of or comprise several transmitters and / or receivers compared to the embodiments described below as examples.

[0072] In a particular example, the test and / or measurement system 10 may be an N-gate vector network analyzer or include one designed to measure all S-parameters of the test object 12.

[0073] The test and / or measurement system 10 comprises a noise circuit 14, a first receiver circuit 16 and a second receiver circuit 18.

[0074] In general, the noise circuit 14 is designed to generate a noise signal, wherein the noise signal has a frequency bandwidth that at least partially, and in particular completely, covers a frequency band of interest of the test object 12.

[0075] The noise signal can include, for example, white noise, thermal noise, or any other type of noise suitable for performing tests on the test object 12.

[0076] The frequency band of interest is a frequency band of the test object 12, which is to be tested.

[0077] The noise circuit 14 can, for example, be implemented as a signal generator, in particular as an arbitrary waveform generator, or include one. In other words, the noise circuit 14 can be an active noise source.

[0078] As another example, the noise circuit 14 can be a passive noise source, such as a resistor with a defined resistance value and a specific temperature, or an attenuator that is connected to a signal source and strongly attenuates a signal received from the signal source.

[0079] The noise reduction circuit 14, the first receiver circuit 16 and / or the second receiver circuit 18 can be integrated into one and the same test and / or measuring instrument, for example in a vector network analyzer or in a spectrum analyzer.

[0080] Accordingly, the noise reduction circuit 14, the first receiver circuit 16 and / or the second receiver circuit 18 can be enclosed in a common housing.

[0081] Alternatively, the noise reduction circuit 14, the first receiver circuit 16 and / or the second receiver circuit 18 can be provided in different test and / or measuring instruments and / or in different housings.

[0082] A coupling circuit 20 can be connected downstream of the noise circuit 14, which connects the noise circuit 14 to a first connection 22 of the test and / or measurement system 10, so that the noise signal generated by the noise circuit 14 is forwarded to the first connection 22.

[0083] Furthermore, the coupling circuit 20 can be designed to forward the noise signal to the first receiver circuit 16.

[0084] The coupling circuit 20 can, for example, be implemented as a directional coupler.

[0085] The first connection 22 is connected to a first DUT connection of the test object 12, in particular to an input of the test object 12.

[0086] The test and / or measurement system 10 further comprises a second connection 24, which is connected to a second DUT connection of the test object 12, in particular to an output of the test object 12.

[0087] The second terminal 24 is connected to the second receiver circuit 18, so that an output signal from the test object 12 is forwarded to the second receiver circuit 18 via the second terminal 24.

[0088] The first receiver circuit 16 comprises a first mixing circuit 26, which is connected to the coupling circuit 20 and a local oscillator (LO) signal generator circuit 28.

[0089] A first filter circuit 30 is connected downstream of the first mixing circuit 26.

[0090] The first receiver circuit 16 further comprises at least one first ADC 32, which is connected downstream of the first filter circuit 30 to the first filter circuit 30.

[0091] Optionally, at least one first ADU 32 can be followed by a memory 34.

[0092] The first receiver circuit 16 further comprises a first processing circuit 36, which is connected downstream of the at least one first ADU 32, in particular to the memory 34.

[0093] The second receiver circuit 18 can optionally include a coupling circuit 38 which is connected to the second terminal 24.

[0094] Furthermore, the second receiver circuit 18 can include a second mixing circuit 40 which is connected to the second terminal 24, in particular via the coupling circuit 38.

[0095] The second mixing circuit 40 is further connected to another LO signal generator circuit 42.

[0096] It should be noted that it is also conceivable that both the first mixing circuit 26 and the second mixing circuit 40 are connected to a common LO signal generator.

[0097] A second filter circuit 44 is connected downstream of the second mixing circuit 40.

[0098] The second receiver circuit 18 further comprises at least one second ADU 46, which is connected downstream of the second filter circuit 44 to the second filter circuit 44.

[0099] Optionally, at least one second ADU 46 can be followed by a data storage circuit 48.

[0100] The second receiver circuit 18 further comprises a second processing circuit 50, which is connected downstream of the at least one second ADU 46, in particular to the data storage circuit 48.

[0101] It should be noted that it is also conceivable that the first processing circuit 36 ​​and the second processing circuit 50 are integrated into a common processing circuit.

[0102] In the Fig. In the exemplary embodiment shown in Figure 1, the test and / or measurement system 10 further comprises a processing circuit 52 which is connected to both the first processing circuit 36 ​​and the second processing circuit 50.

[0103] However, it is understood that the first processing circuit 36, the second processing circuit 50 and / or the processing circuit 52 can be integrated into a common processing circuit.

[0104] Fig. Figure 2 schematically shows the first processing circuit 36 ​​in a more detailed way.

[0105] It is understood that the second processing circuit 50 can be set up analogously to the first processing circuit 36.

[0106] The first processing circuit 36 ​​comprises a weighting sub-circuit 54, which is connected to the at least one first ADC 32 or to the memory 34.

[0107] The weighting sub-circuit 54 is followed by an FFT sub-circuit 56.

[0108] The first processing circuit 36 ​​further comprises several power sub-circuits 58, which are connected downstream of the FFT sub-circuit 56 to the FFT sub-circuit 56.

[0109] In addition, the first processing circuit 36 ​​includes a correction sub-circuit 60, which is connected downstream of the power sub-circuits 58.

[0110] The functionality of the first processing circuit 36 ​​and the individual sub-circuits is described in more detail below.

[0111] The test and / or measurement system 10 described above is designed to perform a test and / or measurement procedure for testing the test object 12, which is described below with reference to Fig. 3 is described.

[0112] The noise signal described above is generated by the noise circuit 14 (step S1).

[0113] The noise signal is forwarded to the test object 12 via the coupling circuit 20 and the first connection 22.

[0114] Furthermore, the noise signal can be forwarded to the first mixing circuit 26 via the coupling circuit 20.

[0115] The noise signal is processed by the test object 12, resulting in a test signal (step S2).

[0116] Accordingly, the test signal includes the noise signal, but modified by a transfer function of the object under test 12.

[0117] Furthermore, the test signal includes noise originating from the test object 12, i.e., noise generated by the test object 12 itself.

[0118] The test signal is forwarded via the second connection 24 to the second receiver circuit 18.

[0119] Optionally, the test signal is mixed by the second mixing circuit 40 with an LO signal generated by the LO signal generator circuit 42, thereby converting the test signal into an intermediate frequency band (IF band).

[0120] Furthermore, the test signal can be filtered by the second filter circuit 44.

[0121] It is understood that further signal shaping circuits may be provided that perform further signal shaping operations on the test signal, such as an amplifier that can amplify the test signal.

[0122] According to another variant, the second mixing circuit 40 and / or the second filter circuit 44 can be bypassed. In this case, the test signal from the second terminal 24 can be forwarded directly to at least one second ADU 46.

[0123] In fact, up to a certain frequency, or rather bandwidth threshold corresponding to the bandwidth of at least one second ADC 46, for example up to 9 GHz, the second mixer circuit 40 and the filter circuit 44 can be bypassed. If the bandwidth of the test signal exceeds this threshold, the second mixer circuit 40 and the filter circuit 44 can be switched on.

[0124] The test signal is digitized by at least one second ADU 46, resulting in a digitized test signal (step S3).

[0125] In fact, the test signal can be continuously received and digitized, so that the digitized test signal is a digital data stream.

[0126] The digitized test signal can include IQ data relating to the test signal, so that the digitized test signal includes both amplitude and phase information about the test signal.

[0127] The at least one second ADU 46 has a specific bandwidth that covers a specific part of the frequency range of interest.

[0128] According to one variant, the bandwidth of at least one second ADU 46 can cover the entire frequency range of interest. In this case, the digitization of the test signal can be performed simultaneously across the entire frequency range of interest. Thus, the measurements described below can be carried out simultaneously across the entire frequency range of interest.

[0129] If the bandwidth of at least one second ADU 46 does not cover the entire frequency range of interest, the second receiver circuit 18 can tune to different parts of the frequency range of interest one after the other. Thus, the test signal can be digitized successively over several parts of the frequency range of interest, and the measurements described below can be performed sequentially for the different parts of the frequency range of interest.

[0130] The digitized test signal can be stored in the data storage circuit 48 (step S4).

[0131] The second processing circuit 50 can load the digitized test signal from the data storage circuit 48 and perform the post-processing steps described below.

[0132] However, it is also conceivable that the processing circuit 50 receives the digitized test signal directly from at least one second ADU 46 and performs the steps described below at least partially in real time.

[0133] The digitized test signal can be weighted by the second processing circuit 50, more precisely by the weighting sub-circuit 54, using a window function (step S5).

[0134] The window function can be a window function in the time domain, so that a specific time slice of the digitized test signal is selected by the window function.

[0135] In fact, the window function can correspond to an impulse response of a resolution filter, where a bandwidth of the resolution filter determines a length of a subsequently described transformation into a frequency domain, in particular a length of the corresponding fast Fourier transform.

[0136] The digitized test signal is transformed into a frequency domain by the second processing circuit 50, more precisely by the FFT sub-circuit 56, resulting in a transformed test signal with several frequency bins (step S6).

[0137] The FFT sub-circuit 56 can, for example, perform a fast Fourier transform (FFT) of the digitized test signal, thereby obtaining the transformed test signal.

[0138] The multiple frequency bins cover the frequency range of interest at least partially, and in particular completely.

[0139] If the multiple frequency bins do not fully cover the frequency range of interest, the different parts of the frequency range of interest can be successively converted into a single frequency range.

[0140] The successive transformations may have some overlap in the frequency domain to ensure that the successive transformations can be correctly aligned.

[0141] The second processing circuit 50 can be designed to interpolate the transformed test signal such that the transformed test signal includes both frequency bins that originate from the transformation into a frequency range and frequency bins that originate from the interpolation.

[0142] In fact, the frequency bins resulting from the transformation into a frequency domain and the frequency bins resulting from interpolation can alternate.

[0143] The signal power of the transformed test signal is determined for at least two frequency bins simultaneously by the several power sub-circuits 58 (step S7).

[0144] More precisely, the signal power of the transformed test signal can be determined by calculating a squared value of the transformed test signal for each frequency bin.

[0145] In fact, the signal power for each frequency bin can be determined individually, but simultaneously.

[0146] The signal power of the transformed test signal can be corrected by the second signal processing circuit 50, in particular by the correction sub-circuit 60, by gain factors in the signal chain.

[0147] In fact, the correction sub-circuit can perform further corrections, such as compensating for an impedance mismatch of the test object 12 and / or performing a cross-correlation averaging technique to reduce measurement errors and increase measurement sensitivity.

[0148] The measured signal power is then forwarded to the processing circuit 52.

[0149] A noise power level of the noise generated by the test object 12 is determined by the processing circuit 52 on the basis of the signal power of the transformed test signal determined by the second processing circuit 50 (step S8).

[0150] More precisely, the processing circuit 52 can subtract the signal power of the noise signal generated by the noise circuit 14 from the determined signal power of the transformed test signal for each frequency bin.

[0151] Based on the determined noise power level of the noise generated by the test object 12, a noise characteristic of the test object 12 can be determined, for example a noise figure.

[0152] In fact, the noise figure F can be determined from the frequency f of the test object 12 accordingly. F(f)=S1(f)N1(f)S1(f)⋅G(f)N2(f)=N2(f)N1(f)⋅G(f). to be determined.

[0153] Here, N1(f) is the noise power level at the input of the device under test 12, i.e., the noise power level of the noise signal generated by the noise circuit 14, N2(f) is the noise power level at the output of the device under test 12 (measured as described above), and G(f) is a gain of the device under test 12, which can be determined in a separate measurement.

[0154] It should be noted that in step S7 an average signal power, which corresponds to the time-averaged signal power of the test signal, can be determined, and in step S8 an average noise power level, which corresponds to the time-averaged noise power level, can be determined.

[0155] In fact, the average can be a moving average over a predetermined number of previous measurements.

[0156] The processing circuit 52 can further be designed to correct the determined noise power level by certain errors, for example by compensating for an impedance mismatch of the device under test 12 and / or by performing a cross-correlation averaging technique to reduce measurement errors and increase measurement sensitivity.

[0157] In order to determine the noise generated by the test object 12 in step S8, the signal power of the noise signal must be known.

[0158] The signal power of the noise signal generated by the noise circuit 14 can be known, for example, from a previous calibration measurement and stored in memory 34.

[0159] In fact, the corresponding calibration measurement can be repeated at specific time intervals, especially periodically.

[0160] However, it is also conceivable that the signal power of the noise signal is determined in parallel with the measurements on the test signal described above.

[0161] The corresponding calibration measurements and the corresponding parallel measurement are described below. In fact, the measurements on the noise signal generated by the noise circuit 14 can be carried out analogously to the measurements on the test signal described above.

[0162] The noise signal generated by the noise circuit 14 is forwarded to the first mixing circuit 26 via the coupling circuit 20.

[0163] The noise signal can be mixed with an LO signal generated by the LO signal generator circuit 28, thereby converting the noise signal into an IF band.

[0164] The noise signal can then be filtered by the first filter circuit 30 and / or processed by other suitable signal shaping circuits.

[0165] The noise signal is digitized by the at least one first ADU 32, resulting in a digitized noise signal.

[0166] The digitized noise signal can include IQ data relating to the noise signal, so that the digitized noise signal includes both amplitude and phase information about the test signal.

[0167] The digitized noise signal can be stored in memory 34.

[0168] Before transformation into a frequency domain, the digitized noise signal can be weighted using a corresponding window function.

[0169] The first processing circuit 36 ​​transforms the digitized noise signal into a frequency range, in particular by means of an FFT, thereby obtaining a transformed noise signal with several frequency bins.

[0170] The first processing circuit 36 ​​can be designed to interpolate the transformed noise signal such that the transformed noise signal includes both frequency bins that originate from the transformation into a frequency domain and frequency bins that originate from the interpolation.

[0171] In fact, the frequency bins resulting from the transformation into a frequency domain and the frequency bins resulting from interpolation can alternate.

[0172] The first processing circuit 36 ​​can load the digitized noise signal from the memory 34.

[0173] Alternatively or additionally, the first processing circuit 36 ​​can receive the digitized noise signal directly from the at least one first ADC 32.

[0174] A signal power of the transformed noise signal can be determined for each of the frequency bins by the first processing circuit 36.

[0175] More precisely, the signal power of the transformed noise signal can be determined by calculating a squared value of the transformed noise signal for each frequency bin.

[0176] The determined signal power of the transformed noise signal can be corrected by gain factors in the signal chain and / or by a gain factor of the test object 12.

[0177] The determined signal power of the transformed noise signal can then be forwarded to the processing circuit 52 and / or stored in the memory 34.

[0178] Fig. Figure 4 schematically shows a second variant of the testing and / or measuring system 10.

[0179] The following section explains only the differences compared to the first variant described above.

[0180] The test and / or measurement system 10 further comprises a signal source 62 and a circuit 64.

[0181] In general, the signal source 62 is designed to generate and receive a high-frequency (HF) signal. In fact, the HF signal can be a continuous wave signal.

[0182] Accordingly, signal source 62 can be a continuous wave signal source.

[0183] In general, the circuit 64 is designed to selectively connect the noise circuit 14 or the signal source 62 to the first terminal 22 and / or the first receiver circuit 16.

[0184] In the Fig. In the exemplary embodiment shown in Figure 4, the circuit 64 is designed to selectively connect the noise circuit 14 or the signal source 62 to the coupling circuit 20.

[0185] When the noise circuit 14 is connected to the first terminal 22 and / or the first receiver circuit 16, the above with reference to the Fig. Measurements 1 to 3 described above will be carried out.

[0186] When the signal source 62 is connected to the first terminal 22 and / or the first receiver circuit 16, a further set of measurements can be carried out, e.g. a measurement of the gain of the object under test 12.

[0187] Fig. Figure 5 schematically shows a third variant of the testing and / or measuring system 10, whereby only the differences compared to the one above are described below. Fig. The second variant described in section 4 will be explained.

[0188] In this exemplary embodiment, the circuit 64 is designed to selectively bypass the noise circuit 14 or to connect the noise circuit 14 between the signal source 62 and the first terminal 22 and / or the first receiver circuit 16.

[0189] In fact, the circuit 64 can be designed to selectively bypass the noise circuit 14 or to connect the noise circuit 14 between the signal source 62 and the coupling circuit 20.

[0190] In this exemplary embodiment, the noise reduction circuit 14 can be an attenuator or comprise one designed to attenuate the RF signal, in particular the CW signal, generated by the signal source 62.

[0191] The noise reduction circuit 14 can, for example, be designed to attenuate the RF signal by 50 dB or more, so that essentially only noise remains of the RF signal generated by the signal source 62.

[0192] With an intermediate noise circuit 14, the above can be considered in relation to the Fig. Measurements 1 to 3 described above will be carried out.

[0193] If the noise suppression circuit 14 is bypassed, another set of measurements can be performed, for example a measurement of the gain of the test object 12.

[0194] Fig. Figure 6 schematically shows a fourth variant of the testing and / or measuring system 10, whereby only the differences compared to the one above are described below with reference to Fig. The second variant described in section 4 will be explained.

[0195] In this variant, the signal source 62 can be connected to the first receiver circuit 16 via the coupling circuit 20.

[0196] The circuit 64 can be designed to selectively connect the signal source (via the coupling circuit 20) or the noise circuit 14 to the first terminal 22.

[0197] The circuit 64 can be provided between the signal source 62 and the first terminal 22, in particular between the coupling circuit 20 and the first terminal 22.

[0198] The noise circuit 14 can have a resistor 66 which is connected to a reference potential, in particular to an earth potential.

[0199] Resistor 66 has a predetermined resistance value of, for example, 50 ohms.

[0200] At a given temperature, the resistor 66 generates a predetermined thermal noise signal, which can be transmitted to the test object 12 via the first connection 22.

[0201] If the noise circuit 14 is connected to the first terminal 22, the above can be applied accordingly with reference to the Fig. Measurements 1 to 3 described above will be carried out.

[0202] In this case, however, the noise signal is not forwarded to the first receiver circuit 16 for analysis. Instead, the signal power of the noise signal generated by the noise circuit 14 can be calculated based on the temperature and the resistance value of the resistor 66, rather than being measured by the first receiver circuit 16.

[0203] When the signal source 62 is connected to the first terminal 22, a further set of measurements can be performed, e.g., a measurement of the gain of the test object 12. Certain embodiments disclosed herein, in particular the respective module(s) and / or unit(s), use circuit arrangements (e.g., one or more circuits) to implement standards, protocols, methodologies, or technologies disclosed herein, to effectively couple two or more components, to generate information, process information, analyze information, generate signals, encode / decode signals, convert signals, transmit and / or receive signals, control other devices, etc. Circuit arrangements of any type may be used.

[0204] In one embodiment, the circuit arrangement comprises, among other things, one or more computing devices such as a processor (e.g., a microprocessor), a central processing unit (CPU), a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), a system-on-a-chip (SoC), or the like, or any combination thereof, and may include discrete digital or analog circuit elements or electronics, or combinations thereof. In one embodiment, the circuit arrangement comprises hardware circuit implementations (e.g., implementations in an analog circuit arrangement, implementations in a digital circuit arrangement, and the like, as well as combinations thereof).

[0205] In one embodiment, the circuit arrangement comprises combinations of circuits and computer program products with software or firmware instructions stored on one or more computer-readable memories, which interact to cause a device to execute one or more protocols, methodologies, or technologies described herein. In one embodiment, the circuit arrangement comprises circuits, such as microprocessors or parts of microprocessors, that require software, firmware, and the like for operation. In another embodiment, the circuit arrangement comprises one or more processors or parts thereof and associated software, firmware, hardware, and the like.

[0206] This application may refer to quantities and numbers. Unless expressly stated otherwise, such quantities and numbers are not to be considered limiting, but rather as examples of the possible quantities or numbers associated with this application. In this context, this application may also use the term "several" to denote a quantity or number. In this context, "several" means any number greater than one, such as two, three, four, five, etc. The terms "about," "approximately," "close," etc., mean plus or minus 5% of the stated value.

Claims

[1] Test and / or measurement system, wherein the test and / or measurement system (10) comprises a noise circuit (14), a first terminal (22), a second terminal (24), at least one receiver circuit (16, 18) and at least one processing circuit (36, 50, 52), wherein the noise circuit (14) is designed to generate a noise signal wherein the noise signal has a frequency spectrum extending over a predetermined frequency band of interest, wherein the noise circuit (14) is connected to the first terminal (22) and wherein the first terminal (22) can be connected to a first DUT terminal of a test object (12) so that the noise signal can be supplied to the test object (12), wherein the second terminal (24) can be connected to a second DUT terminal of the test object (12) so that a test signal is received from the test object (12), wherein at least one receiver circuit (18) is connected to the second terminal (24) so ​​that the test signal is received, wherein the at least one receiver circuit (18) is designed to digitize the test signal, thereby obtaining a digitized test signal, wherein the at least one processing circuit (50) is designed to transform the digitized test signal into a frequency domain, thereby obtaining a transformed test signal with multiple frequency bins, and wherein the at least one processing circuit (50) is designed to determine a signal power of the transformed test signal for at least two frequency bins of the several frequency bins simultaneously. [2] Test and / or measurement system according to claim 1, wherein the at least one processing circuit (52) is designed to subtract a signal power of the noise signal from the determined signal power of the transformed test signal for each of the at least two frequency bins. [3] Test and / or measurement system according to one of the preceding claims, wherein the at least one receiver circuit (16) is designed to digitize the noise signal, thereby obtaining a digitized noise signal, wherein the at least one processing circuit (36) is designed to transform the digitized noise signal into a frequency domain, thereby obtaining a transformed noise signal with several frequency bins, and wherein the at least one processing circuit (36) is designed to determine a signal power of the transformed noise signal for the at least two frequency bins of the several frequency bins simultaneously. [4] Test and / or measurement system according to claim 3, further comprising a coupling circuit (20), wherein the coupling circuit (20) is connected between the noise circuit (14) and the first terminal (22), wherein the coupling circuit (20) is further connected to the at least one receiver circuit (16), and wherein the coupling circuit (20) is designed to transmit the noise signal to both the first terminal (22) and the at least one receiver circuit (16). [5] Test and / or measurement system according to one of the preceding claims, further comprising a memory (34) wherein a signal power of the noise signal for the several frequency bins is stored in the memory (34). [6] Test and / or measurement system according to one of the preceding claims, wherein the at least one receiver circuit (18) is a broadband receiver circuit such that the digitized test signal has a frequency spectrum which extends at least partially over the frequency band of interest, in particular wherein the at least one processing circuit (50) is designed to determine a signal power of the transformed test signal for at least a part of the several frequency bins simultaneously, wherein the part of the several frequency bins extends at least partially over the frequency band of interest. [7] Test and / or measurement system according to one of the preceding claims, wherein the receiver circuit (16, 18) is tunable to different parts of the frequency band of interest. [8] Test and / or measurement system according to one of the preceding claims, wherein the at least one receiver circuit (18) has a mixing circuit (40), wherein the mixing circuit (40) is designed to mix the test signal with a local oscillator signal, thereby converting the test signal into an intermediate frequency IF, in particular wherein the at least one receiver circuit (18) has at least one filter circuit (44) connected downstream of the mixing circuit (40). [9] Test and / or measurement system according to one of the preceding claims, wherein the at least one receiver circuit (18) comprises at least one analog-to-digital converter (46), ADC, wherein the at least one ADC (46) is designed to digitize the test signal, wherein the at least one ADC (46) is connected to the second terminal (24), wherein a signal path between the second terminal (24) and the at least one ADC (46) comprises a mixing circuit (40) or does not comprise a mixing circuit. [10] Test and / or measurement system according to claim 9, further comprising a data storage circuit (48), wherein the data storage circuit is connected to the at least one ADC (46) and wherein the data storage circuit (48) is designed to store the digitized test signal, in particular wherein the processing circuit (50) is designed to load the digitized test signal from the data storage circuit (48). [11] Test and / or measurement system according to one of the preceding claims, wherein the processing circuit (50) is designed to weight the digitized test signal with a window function and / or wherein the processing circuit (50) is designed to determine a squared quantity for each of the at least two frequency bins of the transformed test signal, thereby obtaining the signal power. [12] Test and / or measurement system according to any of the preceding claims, wherein the multiple frequency bins comprise interpolated frequency bins. [13] Test and / or measurement system according to one of the preceding claims, wherein the at least one receiver circuit (18) is designed to repeatedly digitize the test signal, wherein the processing circuit (50) is designed to repeatedly determine the signal power, and wherein the processing circuit (50) is designed to determine an average signal power corresponding to the time-averaged signal power of the test signal. [14] Testing and / or measuring system according to any of the preceding claims, wherein the digitized test signal comprises IQ data relating to the test signal. [15] Test and / or measurement system according to one of the preceding claims, wherein a signal path between the noise circuit (14) and the first terminal (22) does not have an amplifier. [16] Test and / or measurement system according to one of the preceding claims, wherein the noise circuit (14) is an active noise circuit or a passive noise circuit and / or wherein the noise circuit (14) comprises a signal generator, an attenuator and / or a resistor (66) with a predefined resistance value. [17] Testing and / or measuring procedure for testing an object under test, wherein the testing and / or measuring procedure comprises the following steps: - Generating a noise signal using a noise circuit (14), wherein the noise signal has a frequency spectrum extending over a predetermined frequency band of interest, - Feeding a test object (12) with the noise signal via a first connection (22), - Receiving a test signal corresponding to the noise signal from the object under test (12) via a second connection (24), - Digitizing the test signal by at least one receiver circuit (18), thereby obtaining a digitized test signal, - Transforming the digitized test signal into a frequency domain by at least one processing circuit (50), thereby obtaining a transformed test signal with multiple frequency bins, and - Determining a signal power of the transformed test signal for at least two frequency bins of the several frequency bins simultaneously by the at least one processing circuit (50).

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