SEMICONDUCTOR DEVICE

Abstract

Semiconductor device (100), comprising: a semiconductor substrate (10) of a first conductivity type; a drift layer (14) of the first conductivity type arranged in the semiconductor substrate (10); and a buffer region (20) of the first conductivity type arranged in the drift layer (14), wherein the buffer region (20) has a plurality of peaks (40) of a doping concentration, wherein the buffer area (20) has: a first tip (40-1) which has a predetermined doping concentration and is located closest to a rear surface of the semiconductor substrate of the plurality of tips (40); a high-concentration tip which has a higher doping concentration than the first tip (40-1) and is located closer to a top surface of the semiconductor substrate than the first tip (40-1); and a low concentration tip which has a lower doping concentration than the high concentration tip and which is located closer to the top surface of the semiconductor substrate than the high concentration tip, wherein: The high concentration tip is a second tip (40-2) located second after the first tip (40-1) on the rear surface of the semiconductor substrate, among the multitude of tips (40). a ratio (N1 / N V12 ) a doping concentration N1 of the first tip to a doping concentration N v12 a doping concentration valley between the first tip (40-1) and the second tip (40-2) is greater than a ratio (N2 / N1) of a doping concentration N2 of the second tip to the doping concentration N1 of the first tip.

Description

BACKGROUND 1. TECHNICAL AREA

[0001] The present invention relates to a semiconductor device. 2. STATE OF THE ART

[0002] A semiconductor device in which a field-stop region with a multitude of impurity density peaks is formed is conventionally known (see, for example, patent documents 1, 2 and 3). List of printed materials and patent literature Patent Document 1: US Patent Application Publication No. US 2016 / 172 438 A1 Patent Document 2: US Patent Application Publication No. US 2008 / 001 257 A1 Patent document 3: WO 2016 / 120 999 A1 SHORT DESCRIPTION

[0003] Since the defect densities of the respective peaks gradually decrease from the back of the semiconductor substrate in the conventional field-stop region, the conventional field-stop layer cannot adequately serve as a field-stop region designed to stop a barrier layer with optimized device properties.

[0004] A first aspect of the present invention may provide a semiconductor device comprising a semiconductor substrate of a first conductivity type; a first-type conductivity drift layer arranged in the semiconductor substrate; and A first-type conductivity buffer region arranged in the drift layer, wherein the buffer region contains a plurality of peaks of a doping concentration. The buffer region may include a first peak having a predetermined doping concentration and located closest to a rear surface of the semiconductor substrate among the plurality of peaks; and a high concentration tip which has a higher doping concentration than the first tip and is located closer to a top surface of the semiconductor substrate than the first tip.

[0005] The buffer region may also contain a low concentration peak, which has a lower doping concentration than the high concentration peak and which is located closer to the top surface of the semiconductor substrate than the high concentration peak.

[0006] The high concentration peak can be a second peak, which is located second closest to the first peak among the multitude of peaks on the back surface of the semiconductor substrate.

[0007] The second peak can have the highest concentration of all the peaks.

[0008] The second tip can be located at a position between 1 µm and 12 µm, inclusive, from the back surface of the semiconductor substrate.

[0009] The doping concentration of a doping concentration valley between the first peak and the second peak can be 10 times higher than the substrate concentration of the semiconductor substrate or even higher.

[0010] A doping concentration ratio N2 / N1 of a doping concentration N2 of the second tip to a doping concentration N1 of the first tip can satisfy 1 < N2 / N1 ≤ 100.

[0011] The first peak can be a peak which, out of the multitude of peaks, has the second highest concentration after the second peak.

[0012] The semiconductor substrate can have a doping concentration distribution in which a multitude of valleys are arranged between the multitude of peaks, and doping concentrations of the multitude of valleys gradually decrease from a back side of the semiconductor substrate to a top side.

[0013] A ratio (N1 / N V12 ) a doping concentration N1 of the first tip to a doping concentration N V12 The doping concentration valley between the first tip and the second tip can be greater than the ratio (N2 / N1) of the doping concentration N2 of the second tip to the doping concentration N1 of the first tip.

[0014] The semiconductor device can contain a transistor section and a diode section. The diode section can contain a floating layer of a second conductivity type, which differs from the first conductivity type, and the floating layer is located closer to the back surface of the semiconductor substrate than the first tip.

[0015] The semiconductor device can include a collector area of ​​the second conductivity type on the rear surface of the transistor section.

[0016] Furthermore, the integrated concentration from the collector area to the second tip can be higher than half of a critical integrated concentration of the semiconductor substrate.

[0017] The buffer region may further contain a third tip, which is located third from the second tip among the multitude of tips on the back surface of the semiconductor substrate. The doping concentration N3 of the third tip may be lower than the doping concentration N. V12 a doping concentration valley between the first peak and the second peak.

[0018] A distance X2 - X1 in a depth direction between the second tip and the first tip can be smaller than a depth X1 from a back surface of the semiconductor substrate to the first tip.

[0019] A depth X0 from the back surface of the semiconductor substrate to a boundary position between the first tip and the collector region can be smaller than a distance X1 - X0 in a depth direction between (i) the first tip and (ii) the boundary position between the first tip and the collector region.

[0020] A depth X0 from the back surface of the semiconductor substrate to a boundary position between the first tip and the collector region can be greater than a distance X1 - X0 in a depth direction between (i) the first tip and (ii) the boundary position between the first tip and the collector region.

[0021] A distance X b The distance from the back surface of the semiconductor substrate to a boundary position between the first tip and the floating layer can be smaller than a distance X1 - X bbetween (i) the first peak and (ii) the boundary position between the first peak and the suspended layer.

[0022] A second aspect of the present invention provides for a semiconductor device containing a semiconductor substrate of a first conductivity type; a first-type conductivity drift layer arranged in the semiconductor substrate; and A buffer region of the first conductivity type arranged in the drift layer, wherein the buffer region contains a plurality of peaks of a doping concentration. The plurality of peaks can be n peaks P n a doping concentration distribution (n is an integer greater than or equal to 2). The semiconductor device can contain a peak-trough pair. which NP i / NB i+1 ≤ 10 is satisfied, where NP is a doping concentration of an i-th tip P i the top P ndesignated from a rear surface of the semiconductor substrate and NB i a doping concentration of a valley B l denotes which is closer to the back surface of the semiconductor substrate than the i-th tip P l .

[0023] The multitude of peaks can result in a multitude of peak-valley pairs, which are national parks. l / NB l+1 ≤ 10 are included.

[0024] An envelope connecting all doping concentrations NB of valleys can be drawn from valley B1 to valley B1. n+1 decrementally or more moderately than an exponential function.

[0025] All doping concentrations NB i The envelope connecting valleys can recede convexly towards a side where the doping concentration is lower.

[0026] The short description does not necessarily describe all the necessary features of the embodiments of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS Fig. Figure 1A is a sectional view showing a semiconductor device 100 according to one embodiment in a concise form. Fig. Figure 1B is a sectional view showing a semiconductor device 100 according to one embodiment in brief. Fig. Figure 2 shows an example of a doping concentration distribution of a semiconductor substrate 10 according to one embodiment. Fig. Figure 3 shows an example of a doping concentration distribution of a semiconductor substrate according to the comparative example 1. Fig. Figure 4A shows an example of a more detailed doping concentration distribution of a semiconductor substrate 10 according to an embodiment. Fig. Figure 4B shows an example of a more detailed doping concentration distribution of a semiconductor substrate 10 according to one embodiment. Fig. Figure 4C shows an example of a more detailed doping concentration distribution of a semiconductor substrate 10 according to one embodiment. Fig. Figure 5 shows an example of a configuration of a semiconductor device 100 with a floating layer 66. Fig. Figure 6A shows an example of a doping concentration distribution of a semiconductor substrate 10 with a floating layer 66. Fig. Figure 6B shows an example of a doping concentration distribution of a semiconductor substrate 10 with a floating layer 66. Fig. Figure 6C shows an example of a doping concentration distribution of a semiconductor substrate 10 with a floating layer 66. Fig. Figure 6D shows an example of a doping concentration distribution of a semiconductor substrate 10 with a floating layer 66. Fig. Figure 7 shows an example of a more detailed doping concentration distribution of a semiconductor substrate 10 according to one embodiment. DESCRIPTION OF EXAMPLE FORMS OF EXECUTION

[0027] In this description, one side in a direction parallel to a depth direction of a semiconductor substrate is referred to as the "top" side, and the other side is referred to as the "bottom" side. One of two principal surfaces of a substrate, layer, or other element is referred to as the top surface, and the other surface is referred to as the bottom surface. The directions "top," "bottom," "front," and "back" are not limited to the direction of gravity or the direction of attachment to a substrate or the like at the time of assembly of a semiconductor device.

[0028] Although in each embodiment shown the first conductivity type is the N-type and the second conductivity type is the P-type, the first conductivity type can also be the P-type and the second conductivity type can also be the N-type. In this case, the conductivity types of substrates, layers, regions, and the like have opposite polarities in each embodiment.

[0029] In this description, it is meant that the electrons or holes in the layers or regions marked N or P are majority carriers. Furthermore, the "+" and "-" appended to "N" and "P" respectively indicate that the doping concentration is higher or lower than in a layer or region where these are not attached.

[0030] Fig. Figure 1A is a sectional view showing a semiconductor device 100 according to one embodiment in simplified form. The semiconductor device 100 is a vertical semiconductor device in which an electrode is formed on a top and a back side of a semiconductor substrate 10, and current flows in the thickness direction of the semiconductor substrate 10. In the present example, a freewheeling diode (FWD) is shown as an example of the semiconductor device 100. The semiconductor device 100 comprises the semiconductor substrate 10, a top electrode 102, and a back electrode 104.

[0031] The top electrode 102 is positioned closer to the top surface of the semiconductor substrate 10. The top electrode 102 of the present example has a planar shape. However, the top electrode 102 of another example may have a trench shape. If the semiconductor device 100 is the FWD, the top electrode 102 is an anode electrode.

[0032] The backside electrode 104 is located on the back side of the semiconductor substrate 10. If the semiconductor device is the FWD, the backside electrode 104 is a cathode electrode.

[0033] The semiconductor substrate 10 is formed from a semiconductor material such as silicon or a compound semiconductor. The semiconductor substrate 10 is doped with foreign atoms in a given concentration. The semiconductor substrate 10 is of a first conductivity type. For example, the semiconductor substrate 10 is of the N-type. In the present example, the first conductivity type is described as N-type, while the second conductivity type is described as P-type. However, the first conductivity type could also be P-type, while the second conductivity type could be N-type. The semiconductor substrate 10 contains a top-side region 12, a drift region 14, a buffer region 20, and a cathode region 21. The buffer region 20 can act as a field-stop layer, which suppresses expansion of the depletion region.

[0034] The drift region 14 is of the first conductivity type. That is, the drift region 14 of the present example is of the same conductivity type as the semiconductor substrate 10. The drift region 14 of the present example is of the N- type.

[0035] The top-side region 12 is located on the top side of the semiconductor substrate 10 and is doped with foreign atoms of a conductivity type different from that of the drift region 14. In the present example, the top-side region 12 is of the p-type. If the semiconductor device 100 is the FWD, the top-side region 12 functions as an anode region.

[0036] The cathode region 21 is located on the back side of the semiconductor substrate 10. The cathode region 21 is of the first conductivity type. The cathode region 21 of the present example is of the N+ type. The cathode region 21 is an example of a back side region located between the buffer region 20 and the back side electrode 104.

[0037] The buffer region 20 is located on the back side of the semiconductor substrate 10. The buffer region 20 is of the same conductivity type as the drift region 14 and is doped with foreign atoms at a higher concentration than the drift region 14. In the present example, the buffer region 20 is of the N+ type. The buffer region 20 has a plurality of peaks 40. The buffer region 20 of the present example has six peaks 40-1, 40-2, 40-3, 40-4, 40-5, and 40-6 corresponding to the doping concentration. However, the number of peaks 40 contained in the buffer region 20 is not limited to this. The plurality of peaks 40 can be formed by implanting foreign atoms with different acceleration energies from the back side of the semiconductor substrate 10. Furthermore, by implanting protons and varying the implantation quantity per unit area, the doping concentration can be adjusted according to the position of the protons.Here, the doping concentration refers to the concentration of electrically activated dopants, either N-type or P-type.

[0038] Furthermore, the buffer region 20 prevents the barrier layer, which extends from an interface between the top surface region 12 and the drift region 14, from reaching the back surface region of the semiconductor substrate 10. The buffer region 20 is formed by implanting protons from the back surface of the semiconductor substrate 10 and performing a heat treatment. The tips 40 are formed by implanting low-mass foreign atoms, such as hydrogen ions or protons, from the back surface of the semiconductor substrate 10. By using light foreign atoms such as protons, the positions of the tips 40 can be controlled with high precision. The foreign atoms are preferably substances with a lower mass than phosphorus and selenium.For example, in an area where protons are implanted, a high concentration N+ layer is formed by hydrogen-induced donors, in which the complex defects due to the implanted hydrogen ions and defects and the like of the semiconductor substrate become 10 donors.

[0039] Fig. Figure 1B is a sectional view showing a semiconductor device 100 according to one embodiment in simplified form. The semiconductor device 100 of the present example contains a transistor section 50 and a diode section 70.

[0040] Transistor section 50 and diode section 70 are arranged adjacent to each other. Transistor section 50 of this example contains an insulated-gate bipolar transistor (IGBT). The same configuration as in Fig. The configuration shown in Figure 1A is represented with the same reference numerals unless otherwise specified. It should be noted that if the semiconductor device 100 is the IGBT, the top electrode 102 is an emitter electrode and the back electrode 104 is a collector electrode.

[0041] It should be noted that the present example describes a backward-conducting IGBT containing a diode section 70, but the semiconductor device can also be an IGBT without a diode section 70. The embodiment described below has the same effect with the IGBT without a diode section 70.

[0042] The semiconductor substrate 10 of this example contains a P-top region 12, which acts as a base region, an N-drift region 14, a buffer region 20, a collector region 52, and a cathode region 64. The semiconductor substrate 10 of this example contains a gate trench 54, an emitter trench 56, and an N+ emitter region 58 on the top side. Along the longitudinal direction of the gate trench 54 or the emitter trench 56, the emitter region 58 and the P+ contact region (not shown) are arranged alternately. The contact region has a higher doping concentration than the top region 12.

[0043] The transistor section 50 comprises a plurality of gate grooves 54 and a plurality of emitter grooves 56, extending from the top surface of the semiconductor substrate 10 to the drift region 14. A gate electrode G is arranged in the gate groove 54, to which a gate voltage is applied. An emitter electrode E is arranged in the emitter groove 56 and is electrically connected to a top electrode 102, which also functions as an emitter electrode. A P+ collector region 52 is arranged on the back side corresponding to the transistor section 50.

[0044] Collector region 52 is a backside region located between buffer region 20 and backside electrode 104. Collector region 52 has a conductivity type different from that of the semiconductor substrate 10. Collector region 52 in this example is of the P+ type.

[0045] The insulating film 68 is arranged on the semiconductor substrate 10. In the present example, the insulating film 68 is positioned between the gate electrode G and the emitter electrode E and the top electrode 102. Furthermore, a through-hole is formed in some areas of the insulating film 68 to connect the emitter electrode E and the top electrode 102.

[0046] In the diode section 70, a top-side region 12 of the P type, which functions as a base region, a drift region 14 of the N- type, a buffer region 20, and a cathode region 64 of the N+ type are provided, starting from the top surface of the semiconductor substrate 10. A plurality of emitter grooves 56 are provided in the diode section 70, extending from the top surface of the semiconductor substrate 10 to the drift region 14. It should be noted that the back-side electrode 104 is in contact with the collector region 52 and the cathode region 64 on the back surface of the semiconductor substrate 10.

[0047] Fig. Figure 2 shows an example of a doping concentration distribution of the buffer region 20 of doping concentration distributions of a semiconductor substrate 10 according to Fig. 1A or Fig. Figure 1B of an embodiment. The horizontal axis indicates the depth from the rear surface of the semiconductor substrate 10, and the vertical axis indicates the doping concentration. A representation of the cathode region 64, which is the outermost layer on the rear surface, is omitted here.

[0048] The doping concentration distribution of the present example contains six peaks at which the doping concentration reaches its local maximum, meaning that the doping concentration locally transitions from an increase to a decrease (peaks 40-1 to 40-6). These six peaks, 40-1 to 40-6, are arranged in this order starting from the back side of the semiconductor substrate 10. Peak 40-1 is an example of the first peak. Peak 40-2 is an example of the second peak.

[0049] Tip 40-1 has a predetermined doping concentration and, of the plurality of tips 40, is located closest to a rear surface of the semiconductor substrate 10. Tip 40-1 of the present example has a lower concentration than tip 40-2.

[0050] Tip 40-2 has a higher doping concentration than tip 40-1. Tip 40-2 is positioned closer to the top surface of the semiconductor substrate 10 than tip 40-1. Tip 40-2 is an example of tip P. H high concentration. Tip 40-2 may be the tip with the highest concentration out of the multitude of tips 40.

[0051] The top P H High concentration refers to the peak with the highest concentration out of the multitude of peaks 40. The peak P HThe high concentration of the multiple tips 40 is located closer to the upper surface of the semiconductor substrate 10 than tip 40-1. Tip P H The high concentration of the present example is, of the multitude of tips 40, located on the back side of the semiconductor substrate 10, second only to tip 40-1. That is, in the present example, the second tip is tip P. H high concentration.

[0052] Tips 40-3 to 40-6 are positioned closer to the top surface than tip 40-2. Tips 40-3 to 40-6 have lower doping concentrations than tip P. H high concentration. Tips 40-3 and 40-4 are positioned closer to the upper surface of the semiconductor substrate 10 than tip P. H high concentration. Peaks 40-3 to 40-6 are examples of low concentration peaks.

[0053] This means that in the semiconductor substrate 10 of the present example, the doping concentration at tip 40-2 is higher than the doping concentration at tip 40-1 and the doping concentrations at tips 40-3 to 40-6. Accordingly, the semiconductor substrate 10 has an upwardly convex doping concentration distribution. In the present example, the case was described in which the doping concentration at tip 40-2 exceeds that of tip P. H high concentration. However, as long as the semiconductor substrate 10 has an upwardly convex doping concentration distribution, the tip 40, which is located closer to the top surface than the tip 40-2, can be the tip P. H high concentration. It should be noted that in the present example, the doping concentration of tip 40-6 is higher than the doping concentration of tip 40-5.

[0054] In the present example, tip 40-1 has the second highest concentration after tip 40-2, which is tip P. H high concentration. That is, tip 40-1 has a higher doping concentration than tips 40-3 to 40-6. This enables tip 40-1 to reliably stop the expansion of the depletion region from the top of the semiconductor substrate 10. This increases the breakdown voltage of the semiconductor device 100.

[0055] From the perspective of the manufacturing process, the semiconductor substrate 10 can preferably exhibit a doping concentration distribution in which the plurality of peaks 40 are arranged in an upwardly convex manner. For example, in the peak formation step when implanting ions into a region at a shallow position on the back side of the semiconductor substrate 10, the acceleration energy at the time of implantation is reduced compared to the case where ions are implanted into a region at a deep position. If the acceleration energy at implantation is low, the number of ions that can be implanted within a given time period is small.For this reason, the processing time of the step of forming the high-concentration tip 40 in a shallow area on the back side of the semiconductor substrate 10 is increased, and in some cases, the manufacturing efficiency of the semiconductor device 100 is reduced. In the semiconductor device 100 of the present example, since the shallowest tip 40-1 has a lower concentration than tip 40-2, the processing time for forming the tips 40 can be shortened. Accordingly, this improves the manufacturing efficiency of the semiconductor device 100.

[0056] Furthermore, from the perspective of optimizing device properties, the semiconductor substrate 10 may preferably have a doping concentration distribution in which the plurality of tips 40 are arranged in an upwardly convex manner. For example, if a tip 40 of high concentration is formed in a region near the back surface of the semiconductor substrate 10, this can affect the number of holes implanted from the back surface of the semiconductor substrate 10. Since the semiconductor device 100 of the present example keeps the doping concentration of tip 40-1 low near the back surface of the semiconductor substrate 10, the effects of the fluctuations occurring in the process steps on the device properties are small.On the other hand, by increasing the doping concentration in a region at a deep position from the back surface of the semiconductor substrate 10, the function as a field-stop layer for suppressing the depletion region extending from the top of the semiconductor substrate 10 can be maintained. This allows the semiconductor device 100 to suppress the leakage current.

[0057] The acceleration energy with which the semiconductor substrate 10 is irradiated with hydrogen ions can have such a value that the hydrogen ions do not pass through (or penetrate) the semiconductor substrate 10.

[0058] Conventionally, an energy-absorbing element is installed between a hydrogen ion accelerator and a semiconductor substrate, and irradiation with a high acceleration energy (for example, 10 MeV or higher) is performed, causing the hydrogen ions to penetrate the semiconductor substrate. In this case, the position at which the hydrogen ions stop in the semiconductor substrate (i.e., the depth of the hydrogen ions) is adjusted by changing the thickness or other properties of the energy-absorbing element, which is configured to absorb the energy of the hydrogen ions.

[0059] When hydrogen ions are irradiated with such high acceleration energies, the damage to the semiconductor substrate becomes too extensive, and the half-width of the hydrogen ions reaches several dozen micrometers or more, thus increasing the distribution width of lattice defects relative to the thickness of the semiconductor substrate. In contrast, if the semiconductor substrate is irradiated with hydrogen ions at an acceleration energy sufficient for the hydrogen ions to stop within the semiconductor substrate without the use of an energy-absorbing element, hydrogen-induced donors can be formed without causing excessive damage (i.e., disorder).

[0060] If no energy-absorbing element is used and the semiconductor substrate is irradiated with hydrogen ions, the acceleration energy can be set as follows. If the semiconductor substrate is made of silicon, the relationship of the following equation (1) can be satisfied. y=−0.0047x4+0.0528x3−0.2211x2+0.9923x+5.0474

[0061] Here, Rp denotes the range of hydrogen ions in the semiconductor substrate (that is, the position at which the concentration of hydrogen ions culminates), E denotes the acceleration energy of hydrogen ions, x denotes the log (Rp), which is the logarithm of the range Rp of hydrogen ions, and y denotes the log (E), which is the logarithm of the acceleration energy E of hydrogen ions.

[0062] It should be noted that the acceleration energy E of hydrogen ion irradiation can be calculated from the mean range Rp of the desired hydrogen ions (calculated value E) using the curve-fitting equation above. When hydrogen ions are implanted into the silicon substrate with the calculated acceleration energy E, the relationship between the actual acceleration energy E' and the mean range Rp' (hydrogen ion peak position) actually obtained by secondary ion mass spectrometry (SIMS) and the like can be considered as follows. If the actual acceleration energy E' is within a range of approximately ±10% of the calculated value E, then the actual mean range Rp' will also fall within a range of approximately ±10% of the desired mean range Rp, thus remaining within tolerance.For this reason, the effects of deviations between the actual mean range Rp' and the desired mean range Rp on the electrical properties of IGBTs, diodes, and the like are sufficiently small, of negligible magnitude. Therefore, if the actual acceleration energy E' lies within ±5% of the calculated value E, the actual mean range Rp' can be determined to be essentially equal to the mean range Rp as set. Alternatively, there is no problem if the actual mean range Rp' lies within ±10% of the mean range Rp, which is substituted into equation (1) above to obtain the actual acceleration energy E'.

[0063] In the actual accelerator, since both the acceleration energy E and the mean range Rp can lie within the above range (±10%), the following consideration poses no problem at all: the actual acceleration energy E' and the actual mean range Rp' correspond to the curve-fitting equation mentioned above, which is expressed by a desired mean range Rp and the calculated value E. Furthermore, the range of variation or error can be less than or equal to the aforementioned ±10% with respect to the mean range Rp, and preferably it can lie within ±5% of it. If the above condition is met, it can be considered that Rp' sufficiently corresponds to the above equation (1). Using the above equation (1), the acceleration energy E of hydrogen ions required to achieve the desired range Rp can be calculated.

[0064] Furthermore, if no energy-absorbing element is used and hydrogen ions are implanted with such acceleration energy to such an extent that hydrogen ions remain in the semiconductor substrate, the half-width ΔRp of hydrogen in the implantation direction can satisfy the following equation (2). y=−0.00135x6+0.01761x5−0.07529x4+0.21880x2+0.41061x−0.98152

[0065] Here, x denotes the log (Rp), which is the logarithm of the range Rp of hydrogen ions, and y denotes the log ΔRp, which is the logarithm of the half-width (ΔRp).

[0066] Furthermore, if heat treatment at approximately 300 °C to 450 °C is performed after the implantation of hydrogen ions, the implanted hydrogen ions diffuse into the semiconductor substrate. For this reason, each peak 40 of the buffer region 20 can exhibit a doping concentration distribution with a full width at half maximum (FWHM) ΔRp' whose value is 5 to 20 times (preferably 7 to 10 times) larger than a FWHM ΔRp satisfying equation (2). That is, if the doping concentration of the buffer region 20, measured by diffusion resistance profiling, the capacitance-voltage method (CV method), or the like, corresponds to ΔRp', the implanted hydrogen ions can be considered to have been implanted with such an acceleration energy that ions irradiated with the semiconductor substrate do not pass through (or penetrate) the semiconductor substrate 10.

[0067] Alternatively, if the half-width ΔD around the doping concentration of each tip 40 is less than or equal to 20%, preferably less than or equal to 10% of the depth D from the back surface of each tip 40, the implanted hydrogen ions can be considered to be implanted more simply than by an acceleration energy of such a value that hydrogen ions with which irradiation occurs do not pass through (or penetrate) the semiconductor substrate 10.

[0068] As mentioned above, in the semiconductor device 100 of the present example, the tip P H high concentration arranged closer to the top surface of the semiconductor substrate 10 than the tip 40-1, wherein the tip P HThe concentration at the tip 40-1, which is closest to the rear surface of the semiconductor substrate 10, is higher than that at the tip. This enables the semiconductor device 100 to improve manufacturing efficiency and optimize device characteristics. For example, the semiconductor device 100 of the present example can optimize the forward voltage and tail current when the semiconductor device is switched off, and the like.

[0069] Fig. Figure 3 shows an example of a doping concentration distribution of a semiconductor substrate according to comparison example 1. The horizontal axis indicates the depth from the back surface of the semiconductor substrate, and the vertical axis indicates the doping concentration.

[0070] The doping concentration distribution of the present example contains six peaks 540-1 to 540-6. These six peaks are arranged in this order starting from the back side of the semiconductor substrate 10. The semiconductor device of the present example has a doping concentration distribution in which the peaks 540 decrease successively from the back side of the semiconductor substrate. Peak 540-1 has a higher doping concentration than peak 540-2. Therefore, peak 540-1 is peak P. H high concentration.

[0071] When ion implanting protons into a part at a shallow location through the back surface of the semiconductor substrate, it is necessary to reduce the acceleration energy. Since the number of ions that can be ion-implanted within a given time decreases, the manufacturing efficiency can deteriorate with a doping concentration distribution where the doping concentration in a part at a shallow location through the back surface of the semiconductor substrate is high.

[0072] Furthermore, the number of holes implanted from the back surface of the semiconductor substrate is adjusted to optimize the properties of the semiconductor device. Additionally, the protons at a shallow position near the back-side boron on the back surface of the semiconductor substrate can significantly influence the number of holes implanted from the back surface. For this reason, it is necessary to appropriately control the proton dosage. If the proton dosage closest to the back surface is reduced to optimize the properties of the semiconductor device, the overall dosage of the entire proton layer becomes small in the doping concentration distribution, where peak concentrations gradually decrease. Therefore, peaks may not be able to serve as the buffer region for halting deposition.Furthermore, if the total dosage of protons is small, free bonds of silicon atoms in a lattice defect region created by ion implantation cannot be completely bound with hydrogen, and the leakage current can increase.

[0073] Fig. Figure 4A shows an example of a more detailed doping concentration distribution of a semiconductor substrate 10 according to one embodiment. The doping concentration distribution of the present example shows the doping concentration distribution in the depth direction of the semiconductor substrate 10 in the transistor section 50. For this reason, a doping concentration C N of the collector area 52 on the back side of the semiconductor substrate 10 is shown.

[0074] The doping concentration distribution of the present example contains seven peaks, 40-1 to 40-7. These seven peaks are arranged in this order, starting from the back side of the semiconductor substrate 10. The substrate concentration N0 refers to the doping concentration of the semiconductor substrate 10. The doping concentration N2 of peak 40-2 is higher than the doping concentration N1 of peak 40-1. Furthermore, the peaks 40-3 to 40-6 have a doping concentration distribution in which the doping concentrations of peaks 40-3 to 40-6 gradually decrease from the back side to the top side of the semiconductor substrate 10. However, the doping concentration N7 of peak 40-7 in the present example is higher than the doping concentration N6 of peak 40-6.

[0075] Tip 40-1 is located at depth X1 from the back surface of the semiconductor substrate 10. Tip 40-2 is located at depth X2 from the back surface of the semiconductor substrate 10. That is, X1 < X2. The depths of the plurality of tips 40 can be suitably varied according to the design of the semiconductor device 100 and the like. In one example, the depth X2 of tip 40-2 is between 1 µm and 12 µm, inclusive. Furthermore, the depth X2 of tip 40-2 can be between 2 µm and 5 µm, inclusive.

[0076] The distance X2 - X1 in the depth direction between tip 40-2 and tip 40-1 can be smaller than the depth X1 from the back surface of the semiconductor substrate 10 of tip 40-1. In this case, X2 - X1 < X1. This makes it more difficult to change the rate at which the junction expands and can suppress the oscillation.

[0077] Furthermore, the depth X0 from the back surface of the semiconductor substrate 10 at the boundary position between the tip 40-1 and the collector region 52 can be smaller than the distance X1 - X0 in the depth direction between the tip 40-1 and the boundary position between the tip 40-1 and the collector region 52. In this case, X0 < X1 - X0. This can reduce fluctuations in the forward voltage Von.

[0078] The semiconductor substrate 10 has a doping concentration N v a valley of a doping concentration distribution between the peaks of the plurality of peaks 40. In the present description, the valley of the doping concentration distribution refers to the part in which the doping concentration distribution exhibits the local minimum. The semiconductor substrate 10 of the present example has a plurality of valleys. For example, the doping concentration N refers to V12to the doping concentration of the doping concentration valley between tip 40-1 and tip 40-2. Furthermore, the doping concentration N refers to v23 on the doping concentration of the doping concentration valley between tip 40-2 and tip 40-3. The doping concentration N v12 The doping concentration of the present example is greater than the substrate concentration N0 of the semiconductor substrate 10. In one example, the doping concentration N v12 10 times higher than a substrate concentration N0 of the semiconductor substrate 10 or even higher. This suppresses the propagation of the depletion layer. Furthermore, the doping concentration N v12 be lower than the doping concentration N3 of the tip 40-3.

[0079] The N2 / N1 concentration ratio refers to the ratio of the doping concentration of tip 40-2 to the doping concentration of tip 40-1. For example, 1 < N2 / N1 ≤ 100 for the N2 / N1 concentration ratio. Furthermore, the upper limit of the N2 / N1 concentration ratio can be less than or equal to 10, or it can be less than or equal to 5. For instance, if the lower limit of the N2 / N1 concentration ratio is too low, impurities may remain too numerous. Conversely, if the N2 / N1 concentration ratio is too high, the forward voltage Von may fluctuate in relation to the impurities forming the collector region 52 if the concentration deviates.

[0080] The doping concentrations N v The numerous valleys gradually slope from the back to the top of the semiconductor substrate 10. That is, for the doping concentrations N V12 to N V67of the six valleys between each of the seven peaks 40-1 - 40-7 are N V12 > N V23 , N V23 > N V34 , N V34 > N V43 , N V43 > N V56 , and N V56 > N V67 fulfilled. It should be noted that in Fig. 4A N V34 , N V45 , N V56 and N V67 They have been omitted to simplify the drawing.

[0081] Here N1 / N V12 be smaller than N2 / N1. This allows the barrier layer, if it exceeds X2, to be suppressed between X1 and X2. Furthermore, N1 / N V12 greater than or equal to N2 / N1. Or N1 / N V12 can be larger than N2 / N1. This can facilitate the implantation of holes from the collector area 52 and keep the deviation of the forward voltage low.

[0082] Here is the integrated concentration n pfrom the position of the end at the top of the collector region 52 on the rear surface of the semiconductor substrate 10 to the tip 40-2 greater than half of the critical integrated concentration n c of the semiconductor substrate 10. In addition, the integrated concentration n p also greater than the critical integrated concentration n c be. For example, the critical integrated concentration n c given by the following equation from the Poisson equation. nc=εs⋅Ec / q

[0083] Here is ε s The dielectric constant of the semiconductor, q is the elementary charge, and E is the electric charge. c The electric field strength for dielectric breakdown of the semiconductor. For example, in the case of silicon, n c equal to 1.2E12 to 1.6E12 ( / cm²) 2 ), because E c is equal to 1.8E5 to 2.5E5 (V / cm).

[0084] As mentioned above, in the semiconductor device 100 of the present example, by arranging a tip 40-1 closer to the rear surface of the semiconductor substrate 10 than the tip P H High concentration, defects on the back side of the semiconductor substrate 10 are finally bound. On the other hand, if the tip 40-1 is on the back side of the tip P H Since high concentrations are not present, areas with many defects remain. For example, the doping concentrations of tip 40-1 and tip 40-2 are preferably between 1 x 15 cm⁻¹. -3 and 1E16 cm -3 , each inclusive. Note that E represents a power of 10, for example 1E15 cm. -3 1 × 10 15 cm -3 means.

[0085] Fig. Figure 4B shows an example of a more detailed doping concentration distribution of a semiconductor substrate 10 according to one embodiment. The doping concentration distribution of the present example differs from the doping concentration distribution according to Figure 4B. Fig. 4A, as a doping concentration N3 of the tip 40-3 lower than a doping concentration N V12 a doping concentration valley exists between tip 40-1 and tip 40-2. That is, N3 < N V12 . As a result, the base doping concentrations of tip 40-1 and tip 40-2 are high, and the barrier layer, which extends from the top of the semiconductor substrate 10, can be easily stopped in tip 40-1 and tip 40-2.

[0086] Fig. Figure 4C shows an example of a more detailed doping concentration distribution of a semiconductor substrate 10 according to an embodiment. The doping concentration distribution of the present example differs from the doping concentration distribution according to Fig. 4A, when a distance X0 of a boundary position between the tip 40-1 and the collector region 52 from the back surface of the semiconductor substrate 10 is greater than a distance X1 - X0 in a depth direction between the tip 40-1 and a boundary position between the tip 40-1 and the collector region 52. That is, X0 > X1 - X0. In this way, by deepening the region in which the collector region 52 is formed, the implantation of holes can be prevented.

[0087] Fig. Figure 5 shows an example of a configuration of a semiconductor device 100 with a floating layer 66. The semiconductor device 100 of the present example differs from the semiconductor device 100 in that Fig. 1B, when it contains a floating layer 66 in the diode section 70.

[0088] The floating layer 66 is located on the side of the cathode region 64 of the diode section 70. In this example, the floating layer 66 is located closer to the back surface of the semiconductor substrate 10 than the tip 40-1. Here, the position of the floating layer 66 can be determined by a tip F. PThe concentration at which the doping concentration of the floating layer 66 reaches its maximum is determined as a reference. The floating layer 66 has a conductivity type different from that of the plurality of peaks 40. The conductivity type of the floating layer 66 in this example is the P+ type. The floating layer 66 is positioned so that it does not cover the plurality of peaks 40. In this way, by shifting the floating layer 66 and the peaks of the buffer region 20, the influence of the buffer region 20 on the floating layer 66 is reduced. This reduces the influence on the device properties, even if fluctuations occur in the doping concentration distribution due to process influences.

[0089] Fig. Figure 6A shows an example of a doping concentration distribution of a semiconductor substrate 10 with a floating layer 66. The doping concentration distribution of the present example shows the doping concentration distribution in the depth direction of the semiconductor substrate 10 in the diode section 70. For this reason, the doping concentration C N of collector area 52 and the doping concentration F P shown the floating layer 66 on the back side of the semiconductor substrate 10.

[0090] The doping concentration of the floating layer 66 is preferably higher than the doping concentration of the tip 40-1. By increasing the doping concentration of the floating layer 66 to a high value, the influence of the multiple tips 40 on the forward voltage of the semiconductor device 100 can be reduced. Then the doping concentration of the floating layer 66 can be higher than that of the tip P. H high concentration. This can further reduce the influence of the multitude of tips 40 on the device properties of the semiconductor device 100. Furthermore, the doping concentration of the floating layer 66 can be higher than the doping concentration of tip 40-2.

[0091] Furthermore, helium can be implanted on the back side of the semiconductor substrate 10 for lifetime control. In this case, helium is preferably implanted on the back side, avoiding the peak position of the doping concentration distribution. In one example, the back-side helium is implanted between the floating layer 66 and the tip 40-1. The back-side helium can also be implanted between the tip 40-1 and the tip 40-2. Additionally, the back-side helium can be placed closer to the top side of the semiconductor substrate 10 than the tip P. H High concentrations can be implanted. This can reduce the effects of implanting helium on the device properties of the semiconductor device 100.

[0092] Fig. Figure 6B shows an example of a doping concentration distribution of a semiconductor substrate 10 with a floating layer 66. The doping concentration distribution of the present example differs from the doping concentration distribution according to Fig. 6A, when a doping concentration N3 of the tip 40-3 is lower than a doping concentration N V12 a doping concentration valley exists between tip 40-1 and tip 40-2. That is, N3 < N V12 . As a result, the base doping concentrations of tip 40-1 and tip 40-2 are high and the barrier layer, which extends from the top of the semiconductor substrate 10, can be easily stopped in tip 40-1 and tip 40-2.

[0093] Fig. Figure 6C shows an example of a doping concentration distribution of a semiconductor substrate 10 with a floating layer 66. The doping concentration distribution of the present example differs from the doping concentration distribution according to Fig. 6A, when a distance X0 of a boundary position between the tip 40-1 and the collector region 52 from the back surface of the semiconductor substrate 10 is greater than a distance X1 - X0 between the tip 40-1 and a boundary position between the tip 40-1 and the collector region 52. That is, X0 > X1 - X0. In this way, by deepening the region in which the collector region 52 is formed, the implantation of holes can be prevented.

[0094] Fig. Figure 6D shows an example of a doping concentration distribution of a semiconductor substrate 10 with a floating layer 66. The doping concentration distribution of the present example differs from the doping concentration distribution according to Fig. 6A, as a distance X b a boundary position between the tip 40-1 and the floating layer 66 from the rear surface of the semiconductor substrate 10 is smaller than a distance X1 - X b between the peak 40-1 and a boundary position between the peak 40-1 and the suspended layer 66. That is, X1 < X1 - X b This can easily stop the expansion of the barrier layer from the top of the semiconductor substrate 10 at tip 40-1.

[0095] Fig.Figure 7 shows an example of a more detailed doping concentration distribution of a semiconductor substrate 10 according to one embodiment. The doping concentration distribution of the present example shows the doping concentration distribution in the depth direction of the semiconductor substrate 10 in the transistor region 50. For this reason, the doping concentration of the collector region 52 on the back side of the semiconductor substrate 10 is shown.

[0096] The buffer region 20 of the present example has n peaks P1 to P n (n is an integer greater than or equal to 2) in the doping concentration distribution. From n tips P1 to P n is a doping concentration of the i-th tip P i from the back side of the semiconductor substrate 10 a doping concentration NP iThe present example shows the case n = 7. However, the present invention is not limited to this case. It should be noted that i is an integer greater than or equal to 1.

[0097] Furthermore, the buffer area contains 20 n+1 valleys B1 to B n+1 in the doping concentration distribution. The valleys B1 to B n are arranged closer to the back surface of the semiconductor substrate 10 than n tips P1 to P n Furthermore, B n+1 located closer to the upper surface of the semiconductor substrate 10 than the nth tip P n . From the n+1 valleys B1 to B n+1 is a doping concentration of the i-th Tals B i a doping concentration from one back side of the semiconductor substrate 10 NB i The doping concentration NB n+1 of the n+1th valley B n+1 can be the same as the doping concentration of drift area 14.

[0098] Here, buffer zone 20 of the present example contains a pair of a peak and a valley with NP i / NB i+1 ≤ 10. That is, the doping concentration NP of the i-th tip P i can be less than or equal to 10 times the doping concentration. NB i+1 closer than the top P i first valley B located on the upper surface of the semiconductor substrate 10 i+1 be. In this way, by changing the doping concentration ratio of a doping concentration NP, the tip P can be i to the doping concentration NB i+1 of the first valley B i+1 , which is closer to the upper surface of the semiconductor substrate 10 than the tip P iThe propagation of a space charge region is smoothed when the semiconductor device is switched off and during the reverse recovery time, provided that the value is less than or equal to 10. This results in a smooth switching of the semiconductor device 100.

[0099] Furthermore, buffer zone 20 can accommodate a large number of peak-valley pairs, which are NP i / NB i+1 ≤ 10 are included. For example, there are four or more pairs of peaks P. n and valleys B i+1 with NP i / NB i+1 ≤ 10. Furthermore, it can also have five or more pairs of peaks. i and valleys B i+1 with NP i / NB i+1 Give ≤ 10. Note that the present example uses NP. i / NB i+1 ≤ 10 was described, but the condition also includes NP. i / NB i+1 It can be less than 10.

[0100] Valley B1 is the valley closest to the back side of the semiconductor substrate 10. If the semiconductor device 100 is the IGBT, the boundary between valley B1 and the p-collector region 52 is a pn junction. Therefore, the doping concentration of the shallowest valley B1 is theoretically zero. Consequently, with respect to the doping concentration of valley B1 at a boundary formed in this way by regions of different conductivity types, a donor concentration (or acceptor concentration) at a position where the donor concentration of an n-region (the valley B1 of buffer region 20 in this example) and the acceptor concentration of a p-region (the collector region 52 in this example) are equal, can be a doping concentration NB1 of valley B1.

[0101] In the distribution of the electric field strength in the space charge region, the decrease in electric field strength at a given depth position is based on the doping concentration NP, the tip P i and the arrangement of the tip P i determined. On the other hand, the decrease in the mean electric field strength along the entire depth direction of the semiconductor substrate 10 is determined based on the doping concentration NB, the valley B. i and the arrangement of valley B, in addition to the doping concentration NP, the peak P i determined. That is, if the applied voltage is high and the collector-emitter voltage (or the cathode-anode voltage) is high, not only the doping concentration of the tip, but also the doping concentration of the valley and its distribution and arrangement contribute to the degree of suppression of the space charge region propagation.

[0102] Therefore, all doping concentrations NB, of the valley B i The connecting envelope E preferentially slopes moderately. For example, an envelope E preferentially slopes from valley B1 to valley B. n+1The envelope E may exhibit a distribution more exponentially or moderately than an exponential function. Furthermore, the envelope E may exhibit a distribution more closely resembling an exponential function than a Gaussian function. The envelope E may show a distribution that is convex towards the side with low doping concentration (the lower side of the graph) if the vertical axis is logarithmically divided and the horizontal axis is linearly divided. This can gradually enhance the suppression of space charge region propagation towards the rear surface of the semiconductor substrate 10 (i.e., the collector region 52 or the cathode region 64) when the semiconductor device is switched off and during reverse recovery. Consequently, the signal waveform of the switching process of the semiconductor device 100 becomes smooth, and soft switching of the semiconductor device 100 is achieved.

[0103] The operations, procedures, steps, and phases of each process performed by an apparatus, system, program, and method shown in the claims, embodiments, or drawings may be performed in any order, unless the order is expressly specified by "before," "before," or the like, and provided that the output from a previous process is not used in a subsequent process. Even if the process sequence is described in the claims, embodiments, or drawings using phrases such as "first" or "then," this does not necessarily mean that the process must be performed in that order. REFERENCE MARK LIST 10 Semiconductor substrate 12 Upper surface area 14 Drift area 20 buffer zone 21 Cathode area 40 peak 50 transistor section 52 Collector area 54 Gate Trench 56 Emitter Trench 58 emitter area 64 Cathode area 66 suspended layer 68 insulating film 70 diode section 100 semiconductor devices 102 Top side electrode 104 Backside electrode 540 peak

Claims

[1] Semiconductor device (100) comprising: a semiconductor substrate (10) of a first conductivity type; a drift layer (14) of the first conductivity type arranged in the semiconductor substrate (10); and a buffer region (20) of the first conductivity type arranged in the drift layer (14), wherein the buffer region (20) has a plurality of peaks (40) of a doping concentration, wherein the buffer area (20) has: a first tip (40-1) which has a predetermined doping concentration and is located closest to a rear surface of the semiconductor substrate of the plurality of tips (40); a high-concentration tip which has a higher doping concentration than the first tip (40-1) and is located closer to a top surface of the semiconductor substrate than the first tip (40-1); and a low concentration tip which has a lower doping concentration than the high concentration tip and which is located closer to the top surface of the semiconductor substrate than the high concentration tip, wherein: The high concentration tip is a second tip (40-2) located second after the first tip (40-1) on the rear surface of the semiconductor substrate, among the multitude of tips (40). a ratio (N1 / N V12 ) a doping concentration N1 of the first tip to a doping concentration N v12 a doping concentration valley between the first tip (40-1) and the second tip (40-2) is greater than a ratio (N2 / N1) of a doping concentration N2 of the second tip to the doping concentration N1 of the first tip. [2] Semiconductor device (100) according to claim 1, wherein the second tip (40-2) has the highest concentration of the plurality of tips (40). [3] Semiconductor device (100) according to claim 1 or 2, wherein the second tip (40-2) is arranged at a position between 1 µm and 12 µm, inclusive, from the rear surface of the semiconductor substrate. [4] Semiconductor device (100) according to any one of claims 1 to 3, wherein a doping concentration of a doping concentration valley between the first tip (40-1) and the second tip (40-2) is 10 times higher than a substrate concentration of the semiconductor substrate or higher. [5] Semiconductor device (100) according to any one of claims 1 to 4, wherein the doping concentration ratio N2 / N1 of a doping concentration N2 of the second tip to a doping concentration N1 of the first tip satisfies 1 < N2 / N1 ≤ 100. [6] Semiconductor device (100) according to any one of claims 1 to 5, wherein the first tip (40-1) is a tip which has the second highest concentration after the second tip (40-2) among the plurality of tips (40). [7] Semiconductor device (100) according to one of claims 1 to 6, wherein the semiconductor substrate (10) has a doping concentration distribution in which a plurality of valleys are arranged between the plurality of peaks (40) and doping concentrations of the plurality of valleys gradually decrease from a back side of the semiconductor substrate to a top side. [8] Semiconductor device (100) according to any one of claims 1 to 7, comprising a transistor section (50) and a diode section (70), wherein the diode section (70) comprises a floating layer (66) of a second conductivity type which is different from the first conductivity type and the floating layer (66) is located closer to the rear surface of the semiconductor substrate than the first tip (40-1). [9] Semiconductor device (100) according to claim 8, comprising a collector region (52) of the second conductivity type on the rear surface of the transistor section, wherein an integrated concentration from the collector region (52) to the second tip (40-2) is higher than half of a critical integrated concentration of the semiconductor substrate. [10] Semiconductor device (100) according to any one of claims 1 to 9, wherein the buffer region (20) further includes a third tip which is arranged third nearest to the second tip (40-2) of the plurality of tips (40) of the rear surface of the semiconductor substrate, wherein a doping concentration N3 of the third tip lower than the doping concentration N v12 of the doping concentration valley between the first peak (40-1) and the second peak (40-2). [11] Semiconductor device (100) according to any one of claims 1 to 10, wherein a distance X2 - X1 in a depth direction between the second tip (40-2) and the first tip (40-1) is smaller than a depth X1 from the rear surface of the semiconductor substrate to the first tip (40-1). [12] Semiconductor device (100) according to claim 9, wherein a depth X0 from the rear surface of the semiconductor substrate to a boundary position between the first tip (40-1) and the collector region (52) is smaller than a distance X1-X0 in a depth direction between (i) the first tip (40-1) and (ii) the boundary position between the first tip (40-1) and the collector region (52). [13] Semiconductor device (100) according to claim 9, wherein a depth X0 from the rear surface of the semiconductor substrate to a boundary position between the first tip (40-1) and the collector region (52) is greater than a distance X1 - X0 in a depth direction between (i) the first tip (40-1) and (ii) the boundary position between the first tip (40-1) and the collector region (52). [14] Semiconductor device (100) according to claim 8, wherein a distance X bfrom the back surface of the semiconductor substrate to a boundary position between the first tip (40-1) and the floating layer (66) is smaller than a distance X1 - X b between (i) the first peak (40-1) and (ii) the boundary position between the first peak (40-1) and the suspended layer (66). [15] Semiconductor device (100) comprising: a semiconductor substrate (10) of a first conductivity type; a drift layer (14) of the first conductivity type arranged in the semiconductor substrate (10); and a buffer region (20) of the first conductivity type arranged in the drift layer (14), wherein the buffer region (20) has a plurality of peaks (40) of a doping concentration, wherein the multitude of peaks (40) n peaks P n a doping concentration distribution, where n is an integer greater than or equal to 5, the semiconductor device (100) contains five or more pairs of a peak and a valley, which NP i / NB i+1 ≤ 10, where NP i a doping concentration of an i-th tip P i the top P n designated from a rear surface of the semiconductor substrate and NB i a doping concentration of a valley B i , which is closer to the back surface of the semiconductor substrate than the i-th tip P i , denoted, whereby all doping concentrations NB i The envelope curve connecting valleys recedes convexly towards a side where the doping concentration is lower. [16] Semiconductor device (100) according to claim 15, wherein all doping concentrations NB i Envelope connecting valleys from valley B1 to valley B n+1 decrementally or more moderately than an exponential function.

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