Flexible organic substrate assembly for rigid probes

Abstract

Wafer testing unit, comprising: a first laminate structure (240) with a first contact field (265); a second laminate structure (220) arranged for coupling to a microcircuit (110) of the wafer, the second laminate structure having a second contact field (265); and a compliant layer (230) between the first laminate structure and the second laminate structure, wherein the compliant layer contains a spring (250) and an elastomer (270) exhibiting compliance within a limited range of movement, wherein the spring is soldered to the first contact field of the first laminate structure on a first side of the spring and to the second contact field of the second laminate structure on a second side, opposite the first side, of the spring, wherein the compliant layer is compressed to ensure independent deflection of the second laminate structure relative to the first laminate structure.

Description

BACKGROUND

[0001] The present invention relates to wafer testing, in particular a flexible organic substrate assembly for rigid probes.

[0002] A wafer is a semiconductor layer used for the fabrication of integrated circuits. The wafer serves as a substrate for microcircuits of microelectronic units, which are built into and onto the wafer and form the integrated circuits. During fabrication, wafer testing is performed to detect functional defects in the microelectronic units. A probe unit, which can be called a wafer probe, is used to perform automated testing. For electrical testing, a set of contacts or probes of the probe unit is brought into electrical contact with contact points or solder pads on the microelectronic units, one after the other. After completion of the testing, individual integrated circuits are obtained through a process called "dicing." Dicing separates each microcircuit into a die, which is then packaged as an integrated circuit.

[0003] Common probe units include those with vertical probes, such as needles on flexible supports. The probe unit, which can be called a probe card, has a large number of these needles with tapered or flat ends. When a load is applied to bring the probe card into contact with a microcircuit on the wafer, each needle bends by an amount independent of the movement of the other needles. Each needle of the probe card comes into contact with and deforms a corresponding solder bump on the microcircuit. The probe card provides an electrical path between the test system and a given microcircuit on the wafer. The wafer can be moved relative to the probe unit to test all microcircuits sequentially.

[0004] Another well-known type of probe assembly is rigid. An array of rigid probes is mounted on a rigid substrate. The probes are generally made of copper and may be plated (e.g., nickel or gold). Unlike compliant (i.e., individually bending) vertical probes, rigid probes are not limited in the power they can transfer to the microelectronic units of each microcircuit on the wafer. Furthermore, the cost of manufacturing a rigid probe assembly is lower than the cost of manufacturing, for example, a vertical probe board. This is because, unlike vertical probes, rigid probes can be fabricated using photolithography. While rigid probes allow for the transfer of more power than flexible vertical probes, the lack of deformation in any view of the probe assembly can lead to coupling problems with uneven solder beads.The shape of solder beads is generally characterized by their height, diameter, and volume (e.g., of tin). The tin thickness of solder beads generally decreases (e.g., from 55 micrometers to 17 micrometers), and there can be contact points on the order of 20,000 to 30,000 solder beads on a given microcircuit. Therefore, increased tolerances due to the shape of the solder beads can make achieving electrical contact with the entire set of solder beads in the microcircuit problematic.

[0005] The publication DE 697 37 599 T2 concerns structures for the investigation of electronic units, such as integrated circuit units and other electronic elements, as well as methods for their manufacture and devices for their use, and in particular the investigation of integrated circuit units with rigid contact surfaces and of multi-chip components with high-density contact surfaces.

[0006] Document US 2006 / 0249857A1 relates to an assembly for testing microelectronic devices. The assembly comprises a microelectronic device with faces and contacts, a flexible substrate spaced from and superimposed on a first face of the microelectronic device, and a plurality of conductive posts extending from the flexible substrate and projecting from the first face of the microelectronic device, with at least some of the conductive posts being electrically connected to the microelectronic device. The assembly also includes several support elements positioned between the microelectronic device and the substrate to support the flexible substrate over the microelectronic device. At least some of the conductive posts are offset relative to the support elements. SUMMARY

[0007] The present invention relates to a wafer testing unit according to claim 1. The wafer testing unit comprises a first laminate structure and a second laminate structure arranged for coupling to a microcircuit of the wafer. A compliant layer between the first laminate structure and the second laminate structure contains an elastomer exhibiting compliance within a limited range of motion.

[0008] Furthermore, the present invention relates to a method according to claim 9 for assembling a wafer testing unit. The method includes forming a first laminate structure and arranging a second laminate structure, which is arranged for coupling to a microcircuit of the wafer. A compliant layer is arranged between the first laminate structure and the second laminate structure. The compliant layer contains an elastomer that exhibits compliance within a limited range of motion. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The examples described in this document will be better understood with the help of the drawings and descriptions below. The components in the figures are not necessarily to scale. In the figures, identical reference numbers denote corresponding parts in the different views. Fig. Figure 1 shows a wafer and a corresponding wafer tester according to one or more embodiments of the invention; Fig. Figure 2 is a sectional view of appearances of the test connector according to one or more embodiments of the invention; Fig. 3A, Fig. 3B and Fig. Figure 3C illustrates the need for a compliant organic substrate assembly for rigid probes according to one or more embodiments, wherein: Fig. 3A shows a solder bump with a height of 55 micrometers; Fig. 3B shows a solder bump with a height of 40 micrometers; Fig. 3C shows a solder bump with a height of 17 micrometers; Fig. Figure 4 illustrates a concave profile of an arrangement of solder bumps, for which a compliant organic substrate assembly for rigid probes is required according to one or more embodiments; and Fig. Figure 5 is a block diagram of appearances of the test device used with a compliant organic substrate assembly for rigid probes according to one or more embodiments. DETAILED DESCRIPTION

[0010] As described above, the rigid probes of a rigid probe assembly can transfer more power to the contact points of microelectronic units on a wafer under test than the flexible probe needles of a vertical probe assembly. A rigid probe assembly typically contains two laminate structures with a layer of copper spheres soldered between them to increase the rigidity of the laminate support structure. The rigid probes are formed on the laminate support structure by photolithography, specifically on the surface of one of the laminate structures opposite the surface to which the copper spheres are soldered. As also noted previously, achieving proper contact with each contact point of each microcircuit on a wafer under test can be challenging with the right probe assembly.Lower solder bead heights in general, and uneven solder bead heights across the microelectronic units of a microcircuit, can lead to insufficient contact between some rigid probes and corresponding solder beads. Adequate contact requires approximately 10 to 15 micrometers of solder bead deformation. The solder beads of a given microcircuit may generally have a concave shape, as those at the edge of each microcircuit are comparatively taller (e.g., 8 micrometers taller) than those closer to the center. However, the rigid laminate structure supporting the rigid probes results in all rigid probes being at the same uniform height above the microcircuit. While this height may be sufficient to make contact with and deform many of the solder beads (e.g., those at the edge of the microcircuit), it may not be sufficient to make contact with all of them (e.g., those at the edge of the microcircuit).(those closer to the center of the microcircuit). An error in forming suitable contact between a rigid probe and its corresponding solder bead can lead to inadequate wafer testing and inaccurate results.

[0011] Embodiments of the invention relate to a compliant organic substrate assembly for rigid probes. While the performance and capabilities of the rigid probes are maintained, the support structure is made more compliant in a specific way. The laminate structure on which the rigid probes are formed can be deflected relative to the other laminate structure. This independent deflection of the two laminate structures results from the fact that the soldered copper spheres between the two laminate structures are replaced by a compliant layer, as described in detail. This means that the ability of the compliant layer between the laminate structures to be deformed or compressed can lead to the different degrees of deflection of the two laminate structures. The laminate structure on which the rigid probes are formed can be deflected to conform to the contour (e.g.,The concave shape of the solder bump arrangement on the chip must conform to the shape of the probe assembly, while the other laminate structure of the substrate can remain unchanged or be deformed to a different degree. The load applied to the probe assembly to achieve the improved contact between the rigid probes and the solder bumps is unchanged compared to the load required for a completely rigid probe assembly.

[0012] Fig. Figure 1 shows a wafer 100 and corresponding wafer test components 130 according to one or more embodiments of the invention. A wafer 100 can have several microcircuits 110, which are tested sequentially. A microcircuit 110 can be on the order of, for example, 1 square inch and is shown with a plurality of solder bumps 120, which serve as contact points for testing the microcircuit 110. The wafer 100 can be carried and moved into position for testing by a wafer tester (not shown). The wafer test components 130 include a test connector 200, which serves as an electrical and mechanical interface between the microcircuit 110 under test and the test device 140, which controls the test. This means that the test device 140 determines and controls the test structures that are applied to the microcircuit 110 under test by the test connector 200.The test connector 200 has a thin, flexible laminate structure 220 and a thicker, rigid laminate structure 240, which are connected by a compliant layer 230. Rigid probes 210 project from the laminate structure 220 to couple to the solder lugs 120 of the microcircuit 110 under test. Movable pins 145 (e.g., pogo pins or spring-loaded pins) project from the laminate structure 240 and couple, as shown, to a printed circuit board (PCB) 135. The test fixture 140 couples to the PCB 135.

[0013] In state-of-the-art wafer tester connectors (i.e., rigid probe units) that are completely rigid, the laminate structures can be connected by a layer of copper spheres soldered to opposite sides of the laminate structures, with an epoxy filling further stiffening the test connector. As for Fig. As described in Section 2, the compliant layer 230 according to one or more embodiments of the invention enables independent bending capability for each of the laminate structures 220, 240. The compliant layer 230 is designed or adjusted for a specific wafer 100. This achieves the compliance required for the compliant layer 230 to allow deformation of solder bumps 120 with a given tolerance.

[0014] The test device 140 refers to the processor, memory, and other components that control the test patterns implemented on each microcircuit 110 under test. For example, the test device 140 may include an automatic test pattern generator (ATPG) that applies a sequence of signals to the microcircuit 110 under test via the test connector 200. The test device 140 distinguishes between correct circuit behavior induced by the sequence of signals and faulty behavior indicating defects in the microcircuit 110 under test. As previously described, the test device 140 can be connected to a PCB 135, which couples to the test connector 200. The test device 140 can control the signals output to the microcircuit 110 under test via the test connector 200, in particular any rigid probe 210.

[0015] The laminate structure 220 corresponds in size approximately to each microcircuit 110 of the wafer 100. The laminate structure 240 can have a larger area than a microcircuit 110 and allow for a change in scale, so that the PCB 135, which is larger than a microcircuit 110, can be coupled to the microcircuit 110 via the test connector 200. The movable pins 145, which protrude from a surface of the laminate structure 240 of the test connector 200, enable coupling between the test connector 200 and the PCB 135. The rigid probes 210, which protrude from the laminate structure 220 of the test connector 200, enable coupling between the test connector 200 and the microcircuit 110 under test. Each solder bump 120 of the microcircuit 110 is contacted and deformed by a rigid probe 210.

[0016] Generally, the wafer 100 is moved to perform a wafer test, in order to establish contact between the solder pads 120 of a microcircuit 110 and the rigid probes 210 of the test connector 200. For the test to be carried out accurately, electrical contact must be established between each solder pad 120 of the microcircuit 110 and each corresponding rigid probe 210 of the test connector 200. In particular, each rigid probe 210 must make contact with the corresponding solder pad 120 and deform it. As the pitch (i.e., the distance between the centers of adjacent solder pads 120) and the size of the solder pads 120 decrease in practice, establishing sufficient electrical contact becomes increasingly difficult.According to one or more embodiments of the invention, the compliant layer 230 is manufactured such that the rigid probes 210, or areas of rigid probes 210 supported by the compliant layer 230, can move independently of one another and not as a single rigid layer. Thus, during the process of bringing the wafer 100 into contact with the wafer test elements 130, it can be moved towards the wafer test elements 130 until the smallest or furthest solder bumps 120 make contact with their corresponding rigid probe 210. The compliance in the compliant layer 230 allows rigid probes 210, which have already come into contact with larger or closer solder bumps 120, to be deflected (i.e. moved back) based on the compression of the compliant layer 230 in the area of ​​these rigid probes 210 with the laminate structure 220.

[0017] Fig. Figure 2 is a sectional view of appearances of the test connector 200 according to one or more embodiments of the invention. Fig. Figure 2 shows details of an exemplary flexible layer 230 of the test connector 200. A spring 250 is bonded to the laminate structures 220, 240 on opposite sides with solder 260. In an exemplary embodiment of the invention, the spring 250 can be made of copper. Contact fields 265 (e.g., gold-plated contact fields) on the laminate structures 220, 240 improve conductivity and solderability. An elastomer 270 is used as a filler between and within the springs 250. Thus, instead of the inflexible copper spheres and epoxy filler used in the prior art technology of rigid wafer probes, the exemplary embodiment of the flexible layer 230 contains springs 250 and elastomer 270 as a filler. The elastomer 270 has higher elasticity than epoxy but is not permanently deformed.As a result, elastomer 270 allows a degree of compliance beyond which it exhibits stiffness, and this degree of compliance can be adjusted. That is, elastomer 270 is compliant within a limited, adjustable range of motion and rigid outside of this range. In other words, the load required for compliance (i.e., compression) of elastomer 270 increases exponentially outside a given range of motion, and the elastomer material can be selected to define the range beyond which this exponential increase in load occurs.

[0018] As already noted, the compliant layer 230 is designed or set for a specific wafer 100. The shape and tolerance of the solder bumps 120 of each microcircuit 110 (e.g., concave shape) are two of the parameters associated with a wafer 100 that influence the required compliance. This is discussed with reference to Fig. 3 and Fig. 4 explained in more detail. The required compliance refers to the flexibility required in the test connector 200 to ensure that all of the solder bumps 120 of each microcircuit 110 of the wafer 100 are sufficiently deformed by corresponding rigid probes 210 to form electrical contact. Exemplary parameters set in the compliant layer 230 include the dimensions of the spring 250 and the thickness and hardness of the elastomer 270. For example, the spring 250 may be a copper spring with a diameter on the order of 0.1 millimeters (mm). An exemplary elastomer 270 may have a thickness of 0.508 mm and a hardness of 90 on the Shore A scale.

[0019] Fig. 3A, Fig. 3B and Fig. Figures 3C illustrate one of the factors that leads to the need for a compliant organic substrate assembly for rigid probes 210 according to one or more embodiments. Each figure shows a solder bump 120 and a corresponding rigid probe 210. As shown, each rigid probe 210 contains three cutting edges 310. When the microcircuit 110 is moved into contact with the wafer test elements 130, the cutting edges 310 of each rigid probe 210 make contact with and deform the corresponding solder bump 120 to form an electrical contact. The Fig. 3A, Fig. 3B and Fig. The solder bumps shown in Figure 3C have different shapes (i.e., height / diameter) and can be arranged with different grid dimensions. Fig. Figure 3A shows an example of a solder bump 120 with a grid spacing of 150 micrometers. The height of the solder bump 120 is 55 micrometers. Fig. Figure 3B shows an example of a solder bump 120 with a height of 40 micrometers. Fig. 3C shows an example of a 120 solder bump with a pitch of 50 micrometers. The height of the 120 solder bump is 17 micrometers.

[0020] With the in Fig. The exemplary soldering lug 120 shown in 3C makes electrical contact more difficult than with the one in Fig. To achieve the exemplary soldering bump 120 shown in 3A. For example, the cutting edges 310 of the in Fig. The rigid probe 210 shown in Figure 3A deforms the solder bump 120 by up to 20 micrometers to ensure sufficient contact. The Fig. In contrast, the solder bump 120 shown in 3C is initially only 17 micrometers high. Therefore, the area for forming contact with solder bumps 120 with heights on the order of those shown in Fig. The height shown in Figure 3C is much narrower. This means that small variations in the solder bumps 120 with heights in the 17-micrometer range can lead to gaps between slightly shorter solder bumps 120 and their corresponding rigid probes 210 if all rigid probes 210 are held in the same plane. The height of the solder bumps 120 of a microcircuit 110, for example, can vary by approximately 8 micrometers. Thus, the compliant layer 230 according to one or more embodiments of the invention, which allows independent deflection in regions of the compliant layer 230 based on different degrees of compression and thus independent deflection of corresponding rigid probes 210, improves the possibility of establishing contact despite this narrower range.

[0021] Fig. Figure 4 illustrates a further factor that leads to the need for a compliant organic substrate assembly for rigid probes 210 according to one or more embodiments. For illustrative purposes, three exemplary solder bumps 120 of a microcircuit 110 are shown. As indicated by the breaks, the Fig. The four solder lugs 120 shown are not necessarily adjacent. The two solder lugs 120 at the ends represent solder lugs 120 at the edge of the microcircuit 110, and the solder lug 120 in the middle represents a solder lug 120 in a central area of ​​the microcircuit 110. How Fig. Figure 4 shows that the solder bumps 120 of a microcircuit 110 generally have a concave shape. This is because the electroplating process that forms the solder bumps 120 typically results in a greater height of the solder bumps 120 near the edge of the microcircuit 110. The result is a concave shape within the solder bumps 120 of a given microcircuit 110. The exemplary solder bumps 120 are all shown in contact with the corresponding rigid probes 210.

[0022] Fig. Figure 4 shows a sectional view of an exemplary flexible layer 230 of the test connector 200 without the laminate structures 220, 240, which are rigid (i.e., cannot be compressed). As already explained, the laminate structures 220, 240 can be deflected differently in these different areas based on the compression of one or more regions of the flexible layer 230 between the laminate structures 220, 240. Without the compression enabled by the flexible layer 230 according to one or more embodiments of the invention, the deflection alone cannot achieve the coupling between the rigid probes 210 and the solder lugs 120 enabled according to one or more embodiments of the invention. The distance between each rigid probe 210 and the flexible layer 230 above it is the same to show that this space would be filled with the laminate structure 220, the thickness of which would not change (i.e.,No compression of the laminate structure 220 occurs, regardless of compression in the compliant layer 230 itself. Furthermore, the laminate structure 240 is not compressed but can also be deflected. In . Fig. 4. The compliance of the portion of the compliant layer 230 corresponding to each rigid probe 210 is of interest and is therefore shown in isolation. In particular, the compression of the portion of the compliant layer 230 corresponding to each rigid probe 210 after contact is formed between the rigid probes 210 and the solder bumps 120 is shown. Fig. Figure 4 shows that the compliant layer 230 is deformed (i.e., compressed) more strongly at the edge of the rigid probes 210 than at the center. This uneven deformation of the compliant layer 230 enables contact between all of the rigid probes 210 and their corresponding solder bumps 120, despite the concave shape of the solder bumps 120 on the surface of the microcircuit 110.

[0023] Fig.Figure 5 is a block diagram of various configurations of the test device 140. As already explained, the test device 140 generates the test structures used to test the microcircuit 110, to which the test device 140 is coupled via the test connector 200. The test device 140 comprises one or more central processing units (processors) 21a, 21b, 21c, etc. (collectively or generically referred to as processor(s) 21 and / or processing unit(s)). In one or more embodiments of the present invention, each processor 21 can comprise a microprocessor of a reduced instruction set computer (RISC). The processors 21 are coupled via a system bus 33 to a system memory (e.g., random access memory (RAM) 24) and various other components.A read-only memory (ROM) 22 is coupled to the system bus 33 and may have a basic input / output system (BIOS) that controls certain basic functions of the test device 140.

[0024] Furthermore, an input / output (I / O) adapter 27 and a data transfer adapter 26 are shown coupled to the system bus 33. The I / O adapter 27 can be a Small Computer System Interface (SCSI) adapter that exchanges data with a hard disk 23 and / or a tape drive 25 or another similar component. The I / O adapter 27, the hard disk 23, and the tape drive 25 are collectively referred to herein as mass storage 34. An operating system 40 can be stored in the mass storage 34 for execution on the processing system 110. The RAM 22, the ROM 24, and the mass storage 34 are examples of the memory 19 of the processing system 110. A network adapter 26 connects the system bus 33 to an external network 36 to enable data exchange between the test device 140 and other such systems.

[0025] A display (e.g., a display monitor) 35 is connected to the system bus 33 via a display adapter 32, which may include a graphics adapter to improve the performance of graphics-intensive applications and a video controller. In one or more embodiments of the present invention, the adapters 26, 27, and / or 32 can be connected to one or more I / O buses, which are connected to the system bus 33 via an intermediate bus bridge (not shown). Suitable I / O buses for connecting peripheral devices, such as hard disk controllers, network adapters, and graphics adapters, typically use common protocols, such as Peripheral Component Interconnect (PCI). Additional input / output devices are shown as being connected to the system bus 33 via the user interface adapter 28 and the display adapter 32.A keyboard 29, a mouse 30 and a speaker 31 can be connected to the system bus 33 via the user interface adapter 28, which may, for example, contain a super I / O chip that integrates several unit adapters into a single integrated circuit.

[0026] In one or more embodiments of the present invention, the test device 140 comprises a graphics processing unit 37. The graphics processing unit 37 is a specialized electronic circuit designed to manipulate and modify memory contents in order to accelerate the generation of images in a raster buffer intended for output to a display. In general, the graphics processing unit 37 is very effective for manipulating computer graphics and for image processing and has a highly parallel structure, which makes it more powerful than general-purpose CPUs for algorithms in which the processing of large blocks of data is performed in parallel.

[0027] As configured here, the test device 140 thus has processing capability in the form of processors 21, storage capacity including system memory (e.g., RAM 24) and mass storage 34, input means such as a keyboard 29 and mouse 30, and output capacity including a speaker 31 and display 35. In one or more embodiments of the present invention, a portion of the system memory (e.g., RAM 24) and the mass storage 34 jointly store an operating system, such as the AIX® operating system from IBM Corporation, to coordinate the functions of the various components shown for the test device 140.

[0028] Various embodiments of the invention are described herein with reference to the corresponding drawings. Alternative embodiments of the invention can be developed without departing from the scope of the present invention. In the following description and in the drawings, various connections and positional relationships (e.g., above, below, adjacent, etc.) are mentioned. These connections and / or positional relationships can be direct or indirect unless otherwise specified, and the present invention is not intended to be limiting in this respect. Accordingly, a coupling of units can refer to a direct or an indirect coupling, and a positional relationship between units can be a direct or indirect positional relationship.Furthermore, the various tasks and procedural steps described herein may be incorporated into a more comprehensive process or procedure with additional steps or functionalities that are not described in detail herein.

[0029] One or more of the methods described herein can be implemented using one or a combination of the following technologies, all of which are well known in the field: a discrete logic circuit(s) with logic gates for implementing logic functions on data signals, an application-specific integrated circuit (ASIC) with suitable combinational logic gates, a programmable gate array(s) (PGA), a field-programmable gate array (FPGA), and so on.

[0030] For the sake of brevity, conventional methods associated with the manufacture and use of manifestations of the invention may or may not be described in detail herein. In particular, various manifestations of data processing systems and specific computer programs for implementing the various technical elements described herein are well known. Accordingly, for the sake of brevity, many conventional implementation details are only briefly mentioned herein or omitted entirely, without specifying the well-known system and / or process details.

[0031] In some embodiments, various functions or actions can be performed at a given location and / or in connection with the operation of one or more devices or systems. In some embodiments, part of a given function or action can be performed at a first unit or location, and the remainder of the functions or actions can be performed at one or more further units or locations.

[0032] The terminology used herein serves only to describe certain embodiments and is not intended to be limiting. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms unless the context clearly indicates otherwise. Furthermore, it should be noted that the terms "indicates" and / or "indicating," when used in this description, indicate the presence of specified features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0033] The corresponding structures, materials, measures, and equivalents of all means or step-plus-function elements in the following claims are intended to include each structure, material, or measure for performing the function in combination with other claimed elements, as specifically claimed. The present invention has been set forth for illustrative and descriptive purposes but is neither intended to be exhaustive nor limited to the disclosed form. Numerous modifications and variations will be obvious to those skilled in the art without departing from the scope of the invention. The embodiments have been selected and described to best explain the basic ideas of the invention and its practical application, and to enable other skilled persons to understand the invention for various embodiments with different modifications, as suitable for the particular use under consideration.

[0034] The diagrams shown herein are for illustrative purposes only. Numerous variations of the diagram or the steps (or processes) described herein are possible without deviating from the scope of the invention. For example, the actions may be performed in a different sequence, or actions may be added, omitted, or modified. Furthermore, the term "coupled" describes the existence of a signal path between two elements and does not imply a direct connection between the elements without any intervening elements / connections. All such variations are considered to be part of the present invention.

[0035] The following definitions and abbreviations are to be used in the interpretation of the claims and the description. As used herein, the terms "has," "incorporating," "includes," "including," "has," "contains," or "containing," or any other variations thereof, are to cover non-exclusive inclusion. For example, a composition, mixture, process, method, article, or apparatus that has a group of elements is not necessarily limited to only those elements but may also include other elements not expressly listed or inherent in that composition, mixture, process, method, article, or apparatus.

[0036] Furthermore, the term "exemplary" is used herein to mean "serving as an example, case, or illustration." Any embodiment or configuration described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments or configurations. The terms "at least one" and "one or more" are to be construed as including any integer greater than or equal to one, i.e., one, two, three, four, and so on. The term "a plurality" is to include any integer greater than or equal to two, i.e., two, three, four, five, and so on. The term "connection" may include an indirect "connection" and a direct "connection."

[0037] The terms "approximately", "essentially", "about" and variations thereof are intended to cover the degree of error associated with measuring the respective quantity using the equipment available at the time the application was filed. For example, "approximately" may include a range of ± 8%, 5%, or 2% of a given value.

[0038] The present invention may comprise a system, a method, and / or a computer program product with any level of integration of technical details. The computer program product may include a computer-readable storage medium (or media) containing computer-readable program instructions to induce a processor to execute manifestations of the present invention.

[0039] A computer-readable storage medium can be a physical unit capable of retaining and storing instructions for use by a system to execute instructions. For example, a computer-readable storage medium can be an electronic storage unit, a magnetic storage unit, an optical storage unit, an electromagnetic storage unit, a semiconductor storage unit, or any suitable combination thereof, without limitation. A non-exhaustive list of more specific examples of computer-readable storage media includes the following: a removable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), and erasable programmable read-only memory (EPROM).Flash memory), static random-access memory (SRAM), removable compact storage disk-read-only memory (CD-ROM), a DVD (digital versatile disc), a memory stick, a floppy disk, a mechanically coded unit such as punched cards or raised structures in a groove on which instructions are stored, and any suitable combination thereof. A computer-readable storage medium shall not, in its use herein, be understood as volatile signals per se, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through a waveguide or other transmission medium (e.g., light pulses traveling through an optical fiber cable), or electrical signals transmitted by a wire.

[0040] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to individual data processing units or, via a network such as the internet, a local area network, a wide area network, and / or a wireless network, to an external computer or external storage device. The network may include copper transmission cables, fiber optic transmission lines, wireless transmission, routing computers, firewalls, switching units, gateway computers, and / or edge servers. A network adapter card or network interface in each data processing unit receives computer-readable program instructions from the network and forwards them for storage on a computer-readable storage medium within the respective data processing unit.

[0041] Computer-readable program instructions for executing work steps of the present invention may be assembler instructions, ISA (Instruction Set Architecture) instructions, machine instructions, machine-dependent instructions, microcode, firmware instructions, state-setting data, configuration data for integrated circuits, or either source code or object code written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Smalltalk, C++, etc., as well as conventional procedural programming languages ​​such as the programming language "C" or similar programming languages.The computer-readable program instructions can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on the remote computer or server. In the latter case, the remote computer can be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection can be established with an external computer (for example, via the internet using an internet service provider).In some embodiments, electronic circuits, including, for example, programmable logic circuits, field programmable gate arrays (FPGAs), or programmable logic arrays (PLAs), can execute computer-readable program instructions by using state information from the computer-readable program instructions to personalize the electronic circuits to perform manifestations of the present invention.

[0042] Manifestations of the present invention are described herein with reference to flowcharts and / or block diagrams of processes, devices (systems), and computer program products according to embodiments of the invention. It is noted that each block of the flowcharts and / or block diagrams, as well as combinations of blocks in the flowcharts and / or block diagrams, can be executed by means of computer-readable program instructions.

[0043] These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or any other programmable data processing device to create a machine, such that the instructions executed by the processor of the computer or other programmable data processing device generate means for implementing the functions / steps specified in the block(s) of the flowcharts and / or block diagrams.These computer-readable program instructions may also be stored on a computer-readable storage medium capable of controlling a computer, programmable data processing device and / or other units to function in a particular manner, such that the computer-readable storage medium on which instructions are stored has a manufactured product, including instructions which implement manifestations of the function / step specified in the block(s) of the flowchart and / or block diagrams.

[0044] The computer-readable program instructions can also be loaded onto a computer, other programmable data processing device or other unit to cause the execution of a series of process steps on the computer or other programmable device or other unit in order to generate a process executed on a computer, such that the instructions executed on the computer, other programmable device or other unit implement the functions / steps specified in the block(s) of the flowcharts and / or block diagrams.

[0045] The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, processes, and computer program products according to various embodiments of the present invention. In this context, each block in the flowcharts or block diagrams can represent a module, segment, or part of instructions that includes one or more executable instructions for performing the specific logical function(s). In some alternative embodiments, the functions specified in the block may occur in a different order than shown in the figures. For example, two blocks shown consecutively may in reality be executed essentially simultaneously, or the blocks may sometimes be executed in reverse order, depending on the corresponding functionality.It should also be noted that each block of the block diagrams and / or flowcharts, as well as combinations of blocks in the block diagrams and / or flowcharts, can be implemented by special hardware-based systems that perform the specified functions or steps, or execute combinations of special hardware and computer instructions.

[0046] The descriptions of the various embodiments of the present invention are given for illustrative purposes and are not intended to be exhaustive or limited to the disclosed form. Numerous modifications and variations will be readily apparent to those skilled in the art without deviating from the scope of the described embodiments. The terminology used herein has been chosen to best describe the basic concepts of the embodiments, their practical application, or the technical improvements over technologies already on the market, or to enable other skilled individuals to understand the embodiments described herein.

Claims

[1] Wafer inspection unit comprising: a first laminate structure (240) with a first contact field (265); a second laminate structure (220) arranged for coupling to a microcircuit (110) of the wafer, the second laminate structure having a second contact field (265); and a compliant layer (230) between the first laminate structure and the second laminate structure, wherein the compliant layer contains a spring (250) and an elastomer (270) exhibiting compliance within a limited range of movement, wherein the spring is soldered to the first contact field of the first laminate structure on a first side of the spring and to the second contact field of the second laminate structure on a second side, opposite the first side, of the spring, wherein the compliant layer is compressed to ensure independent deflection of the second laminate structure relative to the first laminate structure. [2] Wafer testing unit according to claim 1, wherein the first contact field of the first laminate structure and the second contact field of the second laminate structure are gold-plated contact fields, such that the spring is soldered to the gold-plated contact field of the first laminate structure on the first side and to the gold-plated contact field of the second laminate structure on the second side. [3] Wafer testing unit according to claim 1, further comprising a test device coupled to the first laminate structure, wherein the test device is designed to generate test structures that are applied to the microcircuit. [4] Wafer testing unit according to claim 3, further comprising movable pins (145) designed to couple the testing device to the first laminate structure. [5] Wafer testing unit according to claim 1, further comprising rigid probes (210) designed to couple the microcircuit to the second laminate structure. [6] Wafer testing unit according to claim 5, wherein the rigid probes are spaced apart such that each rigid probe couples with a solder bump (120) of the microcircuit. [7] Wafer testing unit according to claim 1, wherein the elastomer of the compliant layer exhibits compliance in a certain range of motion and stiffness outside the range of motion. [8] Wafer testing unit according to claim 7, wherein a material of the elastomer determines the specified range of motion. [9] Method for assembling a wafer testing unit, the method comprising: Forming a first laminate structure with a first contact area; Arranging a second laminate structure for coupling to a microcircuit of the wafer, wherein the second laminate structure has a second contact field; and Arranging a compliant layer between the first laminate structure and the second laminate structure, wherein the compliant layer contains a spring and an elastomer that exhibits compliance within a limited range of movement, and soldering the spring to the first contact field of the first laminate structure on a first side of the spring and to the second contact field of the second laminate structure on a second side, opposite the first side of the spring, and Compressing the flexible layer to ensure independent deflection of the second laminate structure relative to the first laminate structure. [10] Method according to claim 9, wherein the first contact field and the second contact field are gold-plated contact fields on the first laminate structure and the second laminate structure, and the soldering further comprises soldering the spring on the first side to the gold-plated contact field of the first laminate structure and on the second side to the gold-plated contact field of the second laminate structure. [11] Method according to claim 9, further comprising coupling the first laminate structure to a test device, wherein the test device is designed to generate test structures to which the microcircuit is applied. [12] Method according to claim 11, wherein the coupling of the first laminate structure to the test device is carried out using movable pins. [13] Method according to claim 9, further comprising attaching rigid probes to the second laminate structure to couple the microcircuit to the second laminate structure. [14] Method according to claim 13, wherein the rigid probes are spaced apart such that each rigid probe couples with a solder bump of the microcircuit. [15] Method according to claim 9, further comprising shapes of the elastomer of the flexible layer to exhibit flexibility in a certain range of motion and stiffness outside the range of motion. [16] Method according to claim 15, wherein shaping the elastomer includes selecting a material of the elastomer to control the specified range of motion.

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