Method, device, system for resetting a device and electronic device

Abstract

The present application relates to a method, a device, a system for resetting a device and an electronic device, wherein the method comprises: receiving a restart signal from a first host, wherein the restart signal carries port identifications of the first host; determining from preset configuration information corresponding to the port identifications of the first host, the destination switch domain information from preset configuration information, wherein the configuration information comprises port identifications of various hosts and the switch domain information corresponding to the respective port identifications.This technical solution pre-configures configuration information for an uplink port of the switch connected to a host port and for devices connected to the corresponding downlink ports; upon receiving a restart signal from a host, the electronic device, based on the pre-bound switch domain information, accurately assesses which uplink ports of the switch connected to the host ports and which devices connected to the uplink ports need to be reset, and sends reset signals to the corresponding ports and devices connected to the uplink port, thus ensuring the normal operation of the other uplink ports of the switches connected to the host and the devices connected to the uplink port.

Description

[0001] The present application claims priority from the Chinese patent application filed with the Chinese Patent Office on July 31, 2024, under application number 202411044178.6, entitled “Method, device, system for resetting a device and electronic device”, the entire contents of which are hereby incorporated into the present application by reference. Technical field

[0002] The present application relates to the technical field of the Internet, in particular to a method, a device, a system for resetting a device and an electronic device. State of the art

[0003] In the technical field of the Internet, there is one or more central processing units (CPUs) chips in a host, and a variety of serial high-speed computer expansion bus standard (Peripheral Component Interconnect Express, PCIe) devices establish a connection to at least one host via an uplink port of at least one PCIe switch.

[0004] If a particular host requires a direct current (DC) restart, all switches connected to the host can be reset, causing all PCIe devices connected to the switches' downlink ports to be restarted or reset. This will also cause the uplink ports of switches not connected to target hosts, as well as their associated PCIe devices, to be restarted or reset, interrupting any running services.

[0005] Therefore, how to avoid restarting or resetting non-relevant devices on a host during a host restart has become an urgent technical problem that needs to be solved. Content of the invention

[0006] An embodiment of the present application provides a method, a device, a system for resetting a device and an electronic device to solve the prior art technical problem of resetting or restarting non-relevant devices in a host during a restart of that host.

[0007] In a first aspect, an embodiment of the present application provides a method for resetting a device, comprising: Receiving a restart signal from a first host, where the restart signal carries port identifications of the first host; Determining destination switch domain information corresponding to the port identifications of the first host from preset configuration information, wherein the configuration information includes port identifications of various hosts and corresponding switch domain information for each port identification, with each piece of switch domain information including: uplink port identifications of a switch corresponding to a host port identification, downlink port identifications of the switch corresponding to the switch uplink port identifications, and device identifications corresponding to the switch downlink port identifications; and Sending a reset signal to target switches and target devices affected by the target switch domain information to reset the uplink ports of the target switches and the target devices.

[0008] In one possible implementation for the first aspect, the procedure includes, before determining the target switch domain information corresponding to the port identifications of the first host from the preset configuration information, furthermore: Obtaining uplink port identifications of each switch, the corresponding downlink port identifications and port identifications of a host, as well as a device identification corresponding to each downlink port identification; Creating the configuration information according to the uplink port identifications of each switch, the host port identifications corresponding to the uplink port identifications of each switch, the downlink port identifications corresponding to the uplink port identifications of each switch, and the device identification corresponding to each downlink port identification; and Saving the configuration information.

[0009] In another possible implementation for the first aspect, storing the configuration information includes: Generating a register value for each port identification in each host according to the switch's uplink port identifications corresponding to the port identification and the device identification corresponding to the downlink port identifications; and Configuring a register address for port identification in the electronic device and storing the register value at the register address, the register value at the register address being used to represent the switch domain information.

[0010] In another possible embodiment for the first aspect, generating the register value according to the uplink port identification of the switch and the device identifications corresponding to the uplink port identifications of the switch includes: Determining the first N bits in the register value according to a serial number corresponding to the uplink port identification of the switch among all uplink ports in the switch, where N is an integer greater than 0; and Determine the N+1 to M bits in the register value according to the serial numbers of the device identifications corresponding to the downlink port identifications of the switch among all downlink ports of the switch, where M is an integer greater than N+1.

[0011] In one possible implementation for the first aspect, this involves determining the target switch domain information corresponding to the port identifications of the first host from the preset configuration information: Determine a target registry address from at least one registry address according to the port identification of the first host; Determining a target register value at the target register address; and Determining the target switch domain information based on the target registry value.

[0012] In another possible embodiment for the first aspect, an information transmission mode between the electronic device and a switch is an integrated circuit bus I. 2 C.

[0013] In a second aspect, an embodiment of the present application provides a device for resetting a device, comprising: a maintenance module for receiving a restart signal from a first host, wherein the restart signal carries port identifications of the first host; A determination module for determining destination switch domain information corresponding to the port identifications of the first host from preset configuration information, wherein the configuration information includes port identifications of various hosts and corresponding switch domain information, each switch domain information comprising: uplink port identifications of a switch corresponding to a host port identification, downlink port identifications of the switch corresponding to the switch uplink port identifications, and device identifications corresponding to the switch downlink port identifications; and a transmitting module for sending a reset signal to target switches and target devices affected by the target switch domain information, in order to reset the uplink ports of the target switches and the target devices.

[0014] In one possible embodiment for the second aspect, the maintenance module, prior to determining the target switch domain information corresponding to the port identifications of the first host from the preset configuration information, is further used to obtain uplink port identifications of each switch, downlink port identifications and port identifications of a host corresponding to the uplink port identifications of each switch, as well as a device identification corresponding to each downlink port identification; The creation module is used to generate the configuration information according to the uplink port identifications of each switch, the host port identifications corresponding to the uplink port identifications of each switch, the downlink port identifications corresponding to the uplink port identifications of each switch, and the device identification corresponding to each downlink port identification; and The memory module is used to store configuration information.

[0015] In another possible configuration for the second aspect, the memory module stores the configuration information, and is specifically used for this purpose: To generate a register value for each port identification in each host according to the uplink port identifications of the switch corresponding to the port identification and the device identifications corresponding to the downlink port identifications; To configure a register address for port identification in the electronic device and store the register value under the register address, the register value under the register address being used to represent the switch domain information.

[0016] In a further possible embodiment for the second aspect, the creation module generates the register value according to the uplink port identifications of the switch corresponding to the port identification and the device identifications corresponding to the downlink port identifications of the switch, whereby it is specifically used for: Determining the first N bits in the register value according to a serial number corresponding to the uplink port identification of the switch among all uplink ports in the switch, where N is an integer greater than 0; and Determine the N+1 to M bits in the register value according to the serial numbers of the device identifications corresponding to the downlink port identifications of the switch among all downlink ports of the switch, where M is an integer greater than N+1.

[0017] In one possible implementation for the second aspect, the determination module determines the target switch domain information corresponding to the port identifications of the first host from the preset configuration information, and is specifically used for this purpose: Determine the target registry address from at least one registry address according to the port identification of the first host; Determining a target register value at the target register address; Determining the target switch domain information based on the target registry value.

[0018] In another possible embodiment for the second aspect, an information transmission mode between the electronic device and a switch is an integrated circuit bus I. 2 C.

[0019] In the third aspect, an embodiment of the present application provides a system for resetting a device, comprising an electronic device, at least one host, at least one switch, and at least one device; wherein a first host in which at least one host sends a reset signal to the electronic device in response to a reset request, the reset signal carrying port identifications of the first host; and the electronic device is used to carry out the procedure according to the above to perform the first aspect or one of the above-mentioned forms in order to reset the uplink ports of the target switch in the at least one switch and the target device in the at least one device.

[0020] In a fourth aspect, an embodiment of the present application provides an electronic device comprising a processor and a memory communicating with the processor; wherein the memory stores computer-executable instructions; wherein the processor executes the computer-executable instructions stored in memory to implement the procedure according to the first aspect mentioned above or one of the forms mentioned above.

[0021] In a fifth aspect, an embodiment of the present application provides a computer-readable storage medium, wherein computer-executable instructions are stored in the computer-readable storage medium, wherein the computer-executable instructions, when executed by a processor, implement the method according to the first aspect mentioned above or one of the forms mentioned above.

[0022] In a sixth aspect, an embodiment of the present application provides a computer program product comprising a computer program stored in a computer-readable storage medium, wherein at least one processor can read the computer program from the computer-readable storage medium, and the at least one processor can implement the method according to the first aspect mentioned above or one of the forms mentioned above when executing the computer program.

[0023] In the method, device, system for resetting a device, and electronic device provided by the embodiments of the present application, the method comprises: receiving a restart signal from a first host, wherein the restart signal carries port identifications of the first host; determining from preset configuration information corresponding to the port identifications of the first host, wherein the configuration information comprises port identifications of various hosts and switch domain information corresponding to the respective port identifications, each of the switch domain information comprising: uplink port identifications of a switch corresponding to a host port identification, downlink port identifications of the switch corresponding to the switch uplink port identifications, and device identifications corresponding to the switch downlink port identifications;and sending a reset signal to target switches and target devices affected by the target switch domain information to reset the target switch uplink ports and the target devices. In this technical solution, the configuration information for a switch's uplink port connected to a host port and the devices connected to that port's corresponding downlink ports is preset. Upon receiving the host's restart signal, the system accurately assesses, based on the pre-bound switch domain information, which of the switch's uplink ports and which of the devices connected to the host's downlink ports need to be reset. The reset signal is then sent to the appropriate ports and devices connected to the downlink ports, ensuring the normal operation of other uplink ports in the switches connected to the host and the devices connected to the downlink ports. Description of the attached drawings Fig. Figure 1 shows a schematic representation of a restart in a distributed system provided by the state of the art; Fig. Figure 2 shows a schematic flowchart I of the method for resetting a device provided by an embodiment of the present application; Fig. Figure 3 shows a schematic representation of the interaction in the distributed system provided by an embodiment of the present application; Fig. Figure 4 shows a schematic flowchart II of the method for resetting a device provided by an embodiment of the present application; Fig. Figure 5 shows a schematic flowchart III of the method for resetting a device provided by an embodiment of the present application; Fig. Figure 6 shows a schematic representation of the structure of the device for resetting a device provided by an embodiment of the present application; Fig. Figure 7 shows a schematic representation of the structure of an electronic device provided by an embodiment of the present application. Specific embodiments

[0024] To clarify the problem, the technical solutions, and the advantages of the embodiments of the present application, the technical solutions in the embodiments of the present application are described clearly and completely below with reference to the accompanying drawings. It is obvious that the described embodiments represent a subset of the embodiments of the present application, not all of them. All other embodiments that a person skilled in the art in this technical field could obtain from the embodiments in the present application without any creative work fall within the scope of protection of the present application.

[0025] First, the terms affected by the embodiments of the present application are explained: Host: A computer or device on which network services, applications, or data are run. It can refer to a specific server or computer system to which a domain name points. A variety of serial high-speed computer expansion bus standards (Peripheral Component Interconnect express, PCle): A primary expansion interface standard in computer systems, a system bus for connecting expansion cards (e.g., graphics cards, network adapters, memory controllers, or the like) to the motherboard. It provides fast, low-latency data transmission channels for devices.

[0026] PCIe switch (English: Switch): A hardware device used to manage and extend connections for PCIe bus devices in a computer system.

[0027] Uplink port: A port that describes the connection of a device to a higher-level network structure (e.g., a core network or another switch).

[0028] Domain: the host's port, uplink ports and downlink ports of a PCIe switch and the connected devices assigned to them (i.e., downlink devices) form a domain.

[0029] Before presenting the embodiments of the present application, the application background of the embodiments of the present application will first be explained: In large-scale AI training, a device connected to a PCIe switch may be subjected to a remote device reset due to software errors, communication disruptions, or routine maintenance. A device reset procedure allows administrators to remotely trigger restarts or initializations of devices, either directly or through automated management systems, to address technical issues such as troubleshooting, system reliability maintenance, resource reallocation and load balancing, firmware updates and configuration changes, system debugging and diagnostics, or similar tasks.

[0030] Currently, PCIe switches are primarily used in single-uplink scenarios where the computing power of a single host may be insufficient to process complex models and large datasets. Due to the rapid development of training large models, the multi-uplink functionality of PCIe switches is quickly gaining traction. By utilizing the multi-uplink functionality of PCIe switches to distribute the downlink traffic of the connected PCIe devices, the switch's downlink devices are evenly distributed across different uplink ports and corresponding host ports.

[0031] In certain application scenarios that require centralized management and high-performance computing, it is necessary to control multiple PCIe switches through a single host to increase CPU utilization, reduce cross-host transfer, and achieve resource sharing within the host to improve data interaction performance.

[0032] Furthermore, in certain application scenarios that require distributed resource management and redundant access, multiple hosts can be used to cross-control different PCIe switches, such as in GPU box products.

[0033] However, the following technical problems can occur in the application scenarios mentioned above: If multiple hosts cross-control different PCIe switches, a coupling occurs between the different PCIe switches and hosts; if a host requires a DC restart, all PCIe switches connected to it can be reset, and devices mounted below them can restart and be reset simultaneously. This inevitably leads to service interruptions for both the uplink ports and PCIe devices connected to the downlink ports within the domain of other hosts, resulting in irreparable losses.

[0034] That means, Fig. Figure 1 is a schematic representation of a restart in a distributed system provided by the state of the art, as in Fig. As shown in section 1, the existing technical problems in the state of the art are presented: The application scenario includes: multiple hosts, multiple switches, and multiple downlink devices (in the embodiments of the present application, it is described using the example of a host 101, a host 102, a host 103, a switch 201, a switch 202, a switch 203, a device 301, a device 302, ... a device 312; in practice, the number of entities of each type is determined based on predefined business requirements).

[0035] Using host 101 as an example, after receiving a restart signal, host 101 sends the restart signal to switch 201 and switch 202 via their respective ports port0 and port1.

[0036] At this point, according to the restart signal, the switch 201 sends a restart command to devices 301, 302, 303 and 304, which correspond to the DS0, DS1, DS2 and DS3 ports under the switch 201, i.e., the switch 201 is reset and devices 301, 302, 303 and 304 are restarted.

[0037] Furthermore, according to the restart signal, the switch 202 sends a restart command to devices 305, 306 and 307, which correspond to the DS0, DS1 and DS2 ports under the switch 202 respectively, i.e., the switch 202 is reset and devices 305, 306 and 307 are restarted.

[0038] The implementation in Fig. However, 1 contradicts the original restart intention of host 101, i.e., the target of the restart of host 101 is a UP0 port in switch 201, devices 301 and 302, which correspond respectively to the UP0 port DS0 and DS1; and a UP0 port in switch 202, devices 305 and 306, which correspond respectively to the UP0 port DS0 and DS1.

[0039] This means that the uplink ports of switches that did not originally require a reset will be reset, and downlink devices that did not require a restart will be restarted, which severely impacts the current task processes on the affected devices for which no operation is required.

[0040] In view of the technical problems in the prior art, the inventors of the present application have developed the following technical concept: A mapping relationship between uplink ports (connected to corresponding host ports) and downlink ports (connected to corresponding downlink devices) within a PCIe switch can be designed and stored in an electronic device; when any host requires a DC restart, the electronic device, after receiving the restart signal, can locate the uplink port of the corresponding PCIe switch and the downlink device connected to the downlink port having the mapping relationship to the uplink port, and then send a reset signal to both the uplink port of the corresponding PCIe switch and the device connected to the downlink port in order to perform the reset operation;During this process, the normal operation of other PCI switches and other downlink devices remains unaffected.

[0041] The technical solution of the present application is described in detail below with reference to specific embodiments. It is noteworthy that the following specific embodiments can be combined with one another, and that the same or a similar concept or process may not be repeated in certain embodiments.

[0042] It is noteworthy that the field of application of the method, apparatus, device and storage medium relating to the embodiments of the present application is not limited.

[0043] It should be understood that the implementing entity of the embodiments of the present application is an electronic device and may in particular be any server, administration and control server, as well as a computing device in a distributed system, such as CPLD.

[0044] Fig. Figure 2 is a schematic flowchart I of the method for resetting a device provided by an embodiment of the present application; as shown in Fig. As shown in 2, the procedure can include the following steps: The in Fig. The embodiment shown in 2 is used in connection with Fig. 3 explained, Fig. Figure 3 shows a schematic representation of the interaction in a distributed system provided by the embodiment of the present application; as in Fig. As shown in section 3, the schematic representation is based on Fig. 1. CPLD.

[0045] Step 21: Receiving a restart signal from the first host.

[0046] The restart signal carries the port identifications of the first host.

[0047] In this step, if the first host needs to be restarted according to the settings of a user or system, the first host sends a restart signal to an electronic device, and the electronic device receives the restart signal and analyzes the identifications of the first host.

[0048] In one possible implementation, the host receives 101, with reference to Fig. 3, a restart command from the user and generates a DC signal based on the restart command.

[0049] Step 22: Determine the target switch domain information corresponding to the port identifications of the first host from preset configuration information.

[0050] The configuration information includes port identifications of various hosts and corresponding switch domain information for each port identification, with each of the switch domain information including: uplink port identifications of a switch corresponding to a host port identification, downlink port identifications of the switch corresponding to the switch's uplink port identifications, and device identifications corresponding to the switch's downlink port identifications.

[0051] In this step, the configuration information records the port identifications of various hosts; after obtaining the port identifications of the first host as described above, the port identifications of the various hosts that match the port identifications of the first host can be determined, and the switch domain information corresponding to the matching port identifications is used as the target switch domain information, i.e., the configuration information actually provides a mapping relationship based on the switch domain information corresponding to the port identifications of the various hosts.

[0052] Furthermore, the target switch domain information includes uplink port identifications of a switch corresponding to the port identifications of the first host, downlink port identifications of the switch corresponding to the uplink port identifications of the switch, and device identifications corresponding to the downlink port identifications of the switches.

[0053] The process of determining the configuration information can be based on the information in Fig. The implementation can be carried out as described in the exemplary embodiment 4 below, which is not described again here.

[0054] Step 23: Send a reset signal to target switches and target devices affected by the target switch domain information to reset the uplink ports of the target switches and the target devices.

[0055] In this step, after the above-mentioned determination of the uplink ports of the switches affected by the restart of the first host (referred to as target switches) and the devices corresponding to the affected downlink ports (referred to as target devices), the reset signal is sent to the target switches and the target devices respectively.

[0056] After the reset signal is received by the target devices, a restart process is performed; after the reset signal is received by the target switches, a reset process is performed on the corresponding uplink ports in the target switches.

[0057] With reference to Fig. 3. In one possible implementation, the reset signal could be an A signal (e.g., PERST signal) sent by the CPLD.

[0058] Optionally, an information transfer mode between the electronic device and the switch can be the serial peripheral interface (Inter-Integrated Circuit, I2C). 2 C) be.

[0059] This is the I 2 C-Bus is a serial communication protocol that enables communication between devices with a small number of pins and lines, while also supporting connections between multiple masters and multiple slaves (e.g., multiple switches), allowing different devices to interact conveniently with each other.

[0060] In the method for resetting a device provided by the embodiments of the present application, the restart signal of the first host is received, wherein the restart signal carries the port identifications of the first host; the destination switch domain information corresponding to the port identifications of the first host is determined from the preset configuration information, wherein the configuration information includes port identifications of various hosts and corresponding switch domain information, each of the switch domain information comprising: the uplink port identifications of the switch corresponding to the port identification of the host, the downlink port identifications of the switch corresponding to the uplink port identifications of the switch, and the device identifications corresponding to the downlink port identifications of the switch;The reset signal is sent to the target switches and devices affected by the target switch domain information to reset the target switches' uplink ports and the target devices. In this technical solution, the configuration information for a switch's uplink port connected to a host port and the devices connected to that port's corresponding downlink ports is pre-configured. Upon receiving the host's restart signal, the system accurately assesses, based on the pre-bound switch domain information, which uplink ports of the switch connected to the host ports and which devices connected to the downlink ports need to be reset. The reset signal is then sent to the appropriate ports and devices connected to the downlink ports, ensuring the normal operation of other uplink ports on the switches connected to the host and the devices connected to the downlink ports.

[0061] Based on the above-mentioned embodiment, it shows Fig. 4 a schematic flowchart II of a method for resetting a device provided by an embodiment of the present application; as in Fig. As shown in Figure 4, the procedure prior to the above-mentioned step 22 may further include the following steps: Step 41: Obtaining uplink port identifications of each switch, the corresponding downlink port identifications and port identifications of a host, and a device identification corresponding to each downlink port identification.

[0062] In this step, it is necessary to obtain in advance the uplink port identifications of a switch that correspond to the host, the downlink port identifications that correspond to the uplink port identifications of the switch, and the downlink devices that are connected to the affected downlink port identifications, so that the electronic device can determine the specific downlink devices to be restarted and the ports of the switch to be reset after receiving the restart signal.

[0063] Subsequently, for each host, the aforementioned relevant identifications and devices corresponding to the host are recorded.

[0064] With reference to the Fig. 1 and Fig. 3 explains how to obtain: Using host 101 as an example, port 0 and port 1 of host 101 are each connected to a port UP0 of switch 201 and a port UP0 of switch 202.

[0065] Furthermore, port UP0 of switch 201 corresponds to downlink ports DS0 and DS1, and port UP0 of switch 202 corresponds to downlink ports DS0 and DS1. Downlink ports DS0 and DS1 of switch 201 are connected to devices 301 and 302, respectively; downlink port DS0 of switch 202 is connected to device 305, and port DS1 is connected to device 306.

[0066] The above-mentioned equivalent can be a port mapping, e.g. the mapping of an uplink port in a switch to a downlink port of the switch.

[0067] Step 42: Create configuration information according to the uplink port identifications of each switch, the host port identifications corresponding to the uplink port identifications of each switch, the downlink port identifications corresponding to the uplink port identifications of each switch, and the device identification corresponding to each downlink port identification.

[0068] In this step, it is necessary to classify the aforementioned port and device identifications among the ports that correspond to the respective host, in order to quickly determine the uplink and downlink ports of the switches that correspond to the host, as well as the devices that correspond to the downlink ports, when the host is restarted.

[0069] With reference to the Fig. 3, using the example of ports Port0 and Port1 of host 101, CPLD receives ports UP0 and UP1 of switch 201, whereby with regard to port UP0 of switch 201 its configuration information can be the downlink ports DS0 and DS1 of switch 201 as well as the devices 301 and 302 connected to DS0 and DS1 respectively; the same applies to port UP1 of switch 201, which will not be described again here.

[0070] Step 43: Saving the configuration information.

[0071] In this step, the configuration information obtained above is saved.

[0072] Optionally, step 43 can be implemented as follows: Step 1: Generate a register value for each port identification in each host according to the corresponding uplink port identifications of the switch and the device identifications corresponding to the respective downlink port identifications.

[0073] In this implementation, the switch and the electronic device transmit the configuration information via I 2 C, wherein the electronic device stores the configuration information in the form of registers. Table 1 shows a register value correspondence table provided by the present application, as shown below: Table 1 DC-Signal-Steuern Pin Host Registeradresse(Hexadezimal) Registerwert(Binär) Switch-ID Index Port GPIO0 0 0 0xA1 0000 1101 0 1 0xA2 0000 1101 1 GPIO1 1 0 0xA3 0011 0010 0 1 0xA4 0000 1101 2 GPIO2 2 0 0xA5 0001 0010 1 1 OxA6 0111 0010 2

[0074] The implementation of the embodiments of the present application is described with reference to Table 1 and Fig. 1 described in detail.

[0075] For example: First, the first N bits in the register value can be determined among all uplink ports in the switch according to a serial number corresponding to the port identification of the switch, where N is an integer greater than 0.

[0076] In one possible implementation, a switch has two uplink ports, and it may be provided that the first N bits from the first byte correspond to the uplink ports of the switch, i.e., the first N bits indicate that the switch has N uplink ports.

[0077] Optionally, the minimum transmission data size for the I 2 C transmission uses one byte, namely 8 bits, meaning the register value is in an 8-bit binary format.

[0078] That is, referring to the switch with 2 uplink ports in the application scenario of Fig. 1. If the serial number of the uplink port identification is the first among all uplink ports in the switch, then the first bit in the byte is set to 1; if the serial number of the uplink port identification is the second among all uplink ports in the switch, then the second bit in the byte is set to 1; if it does not exist, it is set to 0.

[0079] It goes without saying that if the switch has 3 uplink ports, then N equals 3, and so on. The identifications of the first N bits of the register value correspond one-to-one to the uplink ports of the switch.

[0080] Secondly, the N+1 to M bits in the register value are determined according to the serial numbers of the device identifications corresponding to the downlink port identifications of the switch among all downlink ports of the switch, where M is an integer greater than N+1.

[0081] In one possible implementation, multiple devices could be connected to the switch's downlink ports, and an 8-bit register could cover all of them. Depending on the actual scenario and the number of devices, the CPLD controller could select a register with more bits.

[0082] This means that after all the uplink bits, the subsequent bits are intended for downlink devices within the switch domain, with all bits corresponding to devices connected to the downlink ports within the same switch domain as the uplink ports being set to 1, and the values ​​of the other bits being set to 0, indicating that they are not within the same switch domain.

[0083] In particular, if the serial number of the uplink port identification is the first among all uplink ports in the switch, and the corresponding downlink ports are the first and second among all downlink ports, then the values ​​of the N+1 and N+2 bits are both 1, and the values ​​of the N+3 to M bits are all 0.

[0084] That is, with reference to Table 1 and Fig. 1 is an implementation as follows: Using the example of the first domain 0 of switch 201, the value of the first bit represents port UP0 in switch 201; the mapping relationship between UP0 and DS0, DS1 indicates that port UP0 is in the first domain 0 of switch 201, so the value of the first bit is 1; the value of the second bit represents port UP1 in switch 201, where port UP1 is not in the first domain 0 of switch 201, so the value of the second bit is 0; the values ​​of the third and fourth bits represent devices 301 and 302 connected to the downlink ports DS0 and DS1 of switch 201, so the values ​​of the third and fourth bits are 1. Since there is no other connected device in the first domain 0 of switch 201, the values ​​of bits four through eight are 0. Therefore, the register value of the first domain 0 of switch 201 can be obtained as 0000 1101.

[0085] Step 2: Configure a register address for port identification in the electronic device and store the register value under the register address.

[0086] The register value at the register address is used to represent the switch domain information.

[0087] In this implementation, based on the configuration mentioned above, after obtaining the host's port identification, a corresponding register address can be found directly, and the register value used to represent the switch domain information can be obtained from the register address.

[0088] In the method for resetting a device provided by the embodiments of the present application, the uplink port identifications of each switch, the corresponding downlink port identifications and host port identifications, and the corresponding device identification are obtained; configuration information is created according to the uplink port identifications of each switch, the corresponding host port identifications, the corresponding downlink port identifications, and the corresponding device identification; and the configuration information is stored.In the technical solution, the electronic device creates the configuration information according to the received uplink port identifications of the switch, the downlink port identifications and port identifications of the hosts corresponding to the uplink port identifications of each switch, and the device identification corresponding to each downlink port identification, and stores the configuration information in a register-based manner so that the uplink ports of the switches corresponding to the host and the devices corresponding to the downlink ports can subsequently be quickly determined.

[0089] Based on the above-mentioned examples, Fig. 5 a schematic flowchart III of the method for resetting a device provided by an embodiment of the present application; as in Fig. As shown in point 5, the above-mentioned step 22 can include the following steps: Step 51: Determine a target register address from at least one register address according to the port identification of the first host.

[0090] In this step, the electronic device receives the DC signal sent by the first host, with reference to the above-mentioned embodiments, the electronic device can pull up a pin of a corresponding general purpose input / output (GPIO), and the electronic device determines a destination register address according to the port identification of the first host.

[0091] GPIO is a common interface standard in single-chip microcomputers and embedded systems. It allows the chip to exchange digital signals with external devices and can be used either as an input to receive external signals or as an output to send signals to external devices.

[0092] Step 52: Determine a target register value under the target register address.

[0093] In this implementation, after receiving the target register address, the electronic device can obtain a register value from the target register address and use the register value as the target register value.

[0094] For example, the registry values ​​corresponding to the switch domains in which the ports Port0 and Port1 of the first host are located are 00001101 and 00001101, respectively.

[0095] Step 53: Determining the target switch domain information based on the target registry value.

[0096] In this step, the device identifications represented by the respective positions in the target register value, as well as the uplink port identification of the switch, namely the target switch domain information, can be read after obtaining the target register value.

[0097] This facilitates sending a reset signal to the corresponding destination switch and the downlink devices (namely the destination devices) to reset the uplink port of the destination switch and the destination devices.

[0098] For example, CPLD looks up the register values ​​00001101 and 00001101 in the preset Table 1 and can obtain the corresponding destination switch domain information, which specifically includes: the port Port0 of the first host, the respective uplink ports UP0 of switch 201 and switch 202, device 301 and device 302 connected to the downlink ports DS0 and DS1 of switch 201, device 305 and device 306 connected to the downlink ports DS0 and DS1 of switch 202, with corresponding switch IDs of 0 and 1, respectively.

[0099] In the method for resetting a device provided by the embodiments of the present application, the target register address is determined from at least one register address according to the port identification of the first host; the target register value is determined from the target register address; and the target switch domain information is determined based on the target register value. In this technical solution, the register address can be quickly determined according to the port identification of the first host, the register value can be extracted from the register address, and the uplink port of the switch to be reset and the downlink devices connected to the downlink ports corresponding to the uplink port to be restarted can be directly determined.

[0100] The following describes an embodiment of the apparatus of the present application, which can be used to carry out the embodiments of the method of the present application. For details not disclosed in the embodiment of the apparatus of the present application, reference may be made to the embodiments of the method of the present application.

[0101] Fig. Figure 6 is a schematic representation of the structure of the device for resetting a device provided by an embodiment of the present application. As in Fig. As shown in 6, this device includes: a maintenance module 61, for receiving a restart signal from a first host, wherein the restart signal carries port identifications of the first host; A determination module 62 for determining destination switch domain information corresponding to the port identifications of the first host from preset configuration information, wherein the configuration information includes port identifications of various hosts and corresponding switch domain information for each port identification, each switch domain information comprising: uplink port identifications of a switch corresponding to a host port identification, downlink port identifications of the switch corresponding to the switch uplink port identifications, and device identifications corresponding to the switch downlink port identifications; and a transmitting module 63, for sending a reset signal to target switches and target devices affected by the target switch domain information, in order to reset the uplink ports of the target switches and the target devices.

[0102] In one possible embodiment, the maintenance module 61 is further used to obtain, prior to determining the destination switch domain information corresponding to the port identifications of the first host from the preset configuration information, the uplink port identifications of each switch, the downlink port identifications corresponding to the uplink port identifications of each switch, the host port identifications, and a device identification corresponding to each downlink port identification;

[0103] A creation module for creating the configuration information according to the uplink port identifications of each switch, the host port identifications corresponding to the uplink port identifications of each switch, the downlink port identifications corresponding to the uplink port identifications of each switch, and the device identification corresponding to each downlink port identification;

[0104] A memory module for storing configuration information.

[0105] In one possible embodiment, the memory module that stores the configuration information is specifically used to to generate a register value for each port identification in each host according to the uplink port identifications of the switch corresponding to the port identification and the device identifications corresponding to the respective downlink port identifications; and to configure a register address in the electronic device for port identification and to store the register value under the register address, the register value under the register address being used to represent the switch domain information.

[0106] In one possible embodiment, the creation module, which generates the register value according to the uplink port identifications of the switch corresponding to the port identification and the device identifications corresponding to the downlink port identifications of the switch, is specifically used to to determine the first N bits in the register value according to a serial number corresponding to the uplink port identification of a switch among all uplink ports in the switch, where N is an integer greater than 0; and to determine the N+1 to M bits in the register value according to the serial numbers of the device identifications corresponding to the respective uplink port identifications of the switch among all downlink ports in the switch, where M is an integer greater than N+1.

[0107] In one possible embodiment, the determination module 62, which determines the destination switch domain information corresponding to the port identifications of the first host in the preset configuration information, is specifically used to to determine a target registry address in at least one registry address according to the port identification of the first host; to determine a target register value under the target register address; and to determine the target switch domain information based on the target registry value.

[0108] In one possible embodiment, an information transfer mode between the electronic device and a switch is an integrated circuit bus I. 2 C.

[0109] The device for resetting a device provided by the embodiments of the present application can be used to carry out the determination method according to one of the above-mentioned embodiments, with similar implementation principles and technical effects that are not described here repeatedly.

[0110] It should be noted that the individual modules of the aforementioned device are subdivided according to a functional logic only, and in the actual implementation, they may all or some be integrated on a single physical entity or be physically separate. Furthermore, these modules may all be implemented as software called by a processing element; all be implemented as hardware; or some be implemented as software called by a processing element and some as hardware. Additionally, these modules may all or some be integrated with one another or implemented independently. The processing element described here may be an integrated circuit with signal processing capabilities.During implementation, the respective steps of the above-mentioned procedure or the above-mentioned modules can be executed by integrated logic circuits of the hardware in the processor element or by instructions in the form of software.

[0111] Fig. Figure 7 is a schematic representation of the structure of an electronic device provided by an embodiment of the present application; as shown in Fig. As shown in Figure 7, the electronic device can comprise: a processor 71, a memory 72 and computer program instructions which are stored in the memory 72 and can be executed on the processor 71, wherein the processor 71, in carrying out the computer program instructions, implements the method provided by one of the preceding embodiments.

[0112] Optionally, the above-mentioned individual components of the electronic device can be interconnected via a system bus.

[0113] The memory 72 can be a separate memory unit or a memory unit integrated into the processor 71. The number of processors 71 can be one or more.

[0114] It is understood that the processor 71 can be a central processing unit (CPU) or another general-purpose processor 71, a digital signal processor (DSP) 71, an application-specific integrated circuit (ASIC), etc. The general-purpose processor 71 can be a microprocessor 71, or the processor 71 can also be any conventional processor 71 or the like. The steps of the method disclosed in the present application can be executed directly by the hardware processor 71 or by a combination of hardware and software modules in the processor 71.

[0115] The system bus can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. The system bus can be subdivided into an address bus, a data bus, a control bus, etc. For simplicity, only a thick line is shown in the figure; however, this does not imply that only one bus or bus type is present. The memory 72 can include random access memory (RAM) 72 and also non-volatile memory (NVM) 72, for example, at least one magnetic disk storage device 72.

[0116] All or some of the steps for implementing the foregoing embodiments of the method can be performed by program instruction-related hardware. The foregoing program can be stored in a readable memory 72. During its execution, the program performs the steps of the foregoing embodiments of the method; the foregoing memory 72 (storage medium) comprises: a read-only memory 72 (ROM), a RAM, a flash memory 72, a hard disk, a solid-state drive, a magnetic tape, a floppy disk, an optical disc, and any combination thereof.

[0117] The electronic device provided by the embodiments of the present application can be used to perform the method for resetting a device provided by one of the above-mentioned embodiments of the method, with similar implementation principles and technical effects that are not described here repeatedly.

[0118] A system for resetting a device provided by an embodiment of the present application comprises: an electronic device, at least one host, at least one switch and at least one device; wherein a first host in which at least one host sends a reset signal to the electronic device in response to a reset request, the reset signal carrying port identifications of the first host; and the electronic device is used to perform the method for resetting a device provided by one of the embodiments of the method, in order to reset uplink ports of the target switch in the at least one switch and the target device in the at least one device.

[0119] In the system for resetting a device provided by the embodiments of the present application, the electronic device in the system can be used to perform the method for resetting a device provided by one of the above-mentioned embodiments of the method, with similar implementation principles and technical effects that are not described here repeatedly.

[0120] One embodiment of the present application provides a computer-readable storage medium in which computer instructions are stored which, when executed on a computer, cause the computer to perform the method for resetting a device provided by one of the above-mentioned embodiments.

[0121] Regarding the aforementioned computer-readable storage medium, the aforementioned readable storage medium can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random-access memory, electrically erasable programmable read-only memory, erasable programmable read-only memory, programmable read-only memory, read-only memory, magnetic memory, flash memory, magnetic disk, or optical disk. The readable storage medium can be any available medium accessible to a general-purpose or specialized computer.

[0122] Optionally, the readable storage medium is coupled to the processor, allowing the processor to read information from and write information to the readable storage medium. Of course, the readable storage medium can also be a component of the processor itself. The processor and the readable storage medium can be integrated into an application-specific integrated circuit (ASIC). Alternatively, the processor and the readable storage medium can also be implemented as discrete components within the device.

[0123] An embodiment of the present application further provides a computer program product comprising a computer program, wherein the computer program is stored in a computer-readable storage medium, at least one processor can read the computer program from the computer-readable storage medium, and the at least one processor can implement the method for resetting a device according to one of the above-mentioned embodiments when executing the computer program.

[0124] It is understood that the present disclosure is not limited to the exact structures described above and illustrated in the figures, and that various modifications and changes may be made without altering its scope. The scope of the present disclosure is defined solely by the accompanying claims. QUOTES INCLUDED IN THE DESCRIPTION

[0000] This list of documents cited by the applicant was automatically generated and is included solely for the reader's convenience. The list is not part of the German patent or utility model application. The DPMA accepts no liability for any errors or omissions. Cited patent literature

[0000] CN 202411044178.6

[0001]

Claims

[1] A method for resetting a device, characterized by that it is used for an electrical device, the process includes: Receiving a restart signal from a first host, where the restart signal carries port identifications of the first host; Determining destination switch domain information corresponding to the port identifications of the first host from preset configuration information, wherein the configuration information includes port identifications of various hosts and corresponding switch domain information for each port identification, with each piece of switch domain information including: uplink port identifications of a switch corresponding to a host port identification, downlink port identifications of the switch corresponding to the switch uplink port identifications, and device identifications corresponding to the switch downlink port identifications; and Sending a reset signal to target switches and target devices affected by the target switch domain information to reset the uplink ports of the target switches and the target devices. [2] The method according to claim 1, characterized by , that the procedure further includes, prior to determining the target switch domain information corresponding to the port identifications of the first host from the preset configuration information: Obtaining uplink port identifications of each switch, the corresponding downlink port identifications and port identifications of a host, as well as a device identification corresponding to each downlink port identification; Creating the configuration information according to the uplink port identifications of each switch, the host port identifications corresponding to the uplink port identifications of each switch, the downlink port identifications corresponding to the uplink port identifications of each switch, and the device identification corresponding to each downlink port identification; and Saving the configuration information. [3] The method according to claim 1 or 2, characterized by , that includes saving the configuration information: Generating a register value for each port identification in each host according to the switch's uplink port identifications corresponding to the port identification and the device identifications corresponding to the downlink port identifications; and Configuring a register address for port identification in the electronic device and storing the register value at the register address, the register value at the register address being used to represent the switch domain information. [4] The method according to any one of claims 1 to 3, characterized by , that generating the register value according to the uplink port identifications of the switch corresponding to the port identification and the device identifications corresponding to the downlink port identifications includes: Determining the first N bits in the register value according to a serial number corresponding to the uplink port identification of the switch among all uplink ports in the switch, where N is an integer greater than 0; and Determine the N+1 to M bits in the register value according to the serial numbers of the device identifications corresponding to the downlink port identifications of the switch among all downlink ports of the switch, where M is an integer greater than N+1. [5] The method according to any one of claims 1 to 4, characterized by , that determining the target switch domain information corresponding to the port identifications of the first host from the preset configuration information includes: Determine a target registry address from at least one registry address according to the port identification of the first host; Determining a target register value at the target register address; Determining the target switch domain information based on the target registry value. [6] The method according to any one of claims 1 to 5, characterized by, that an information transfer mode between the electronic device and a switch is an integrated circuit bus I 2 C is. [7] A device for resetting a device, characterized by that it is used for an electrical device, the device comprising: a maintenance module for receiving a restart signal from a first host, wherein the restart signal carries port identifications of the first host; A determination module for determining destination switch domain information corresponding to the port identifications of the first host from preset configuration information, wherein the configuration information includes port identifications of various hosts and corresponding switch domain information, each switch domain information comprising: uplink port identifications of a switch corresponding to a host port identification, downlink port identifications of the switch corresponding to the switch uplink port identifications, and device identifications corresponding to the switch downlink port identifications; and a transmitting module for sending a reset signal to target switches and target devices affected by the target switch domain information, in order to reset the uplink ports of the target switches and the target devices. [8] A system for resetting a device, characterized by, that the system comprises: an electronic device, at least one host, at least one switch and at least one device; a first host in which at least one host sends a reset signal to the electronic device in response to a reset request, the reset signal carrying port identifications of the first host; and the electronic device is used to perform the method according to any one of claims 1 to 6 above in order to reset uplink ports of the target switch in the at least one switch and the target device in the at least one device. [9] An electronic device, characterized by , that it includes a processor and a memory that communicates with the processor; wherein the memory stores computer-executable instructions; wherein the processor executes the computer-executable instructions stored in memory to implement the method according to any one of claims 1 to 6 above. [10] A computer-readable storage medium, characterized by , that computer-executable instructions are stored in the computer-readable storage medium, wherein the computer-executable instructions, when executed by a processor, implement the method according to any one of claims 1 to 6 above. [11] A computer program, characterized by , that the computer program product comprises a computer program stored in a computer-readable storage medium, wherein at least one processor can read the computer program from the computer-readable storage medium, and the at least one processor can implement the method according to one of the above claims 1 to 6 when executing the computer program.

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