Pixel structure, display panel and display device

Abstract

A pixel structure comprising a plurality of pixel groups arranged in a matrix-like manner and thus forming a matrix structure, wherein each of the pixel groups comprises a first subpixel, a second subpixel and a third subpixel, and in each of the pixel groups the numbers of the first subpixel, the second subpixel and the third subpixel are in a ratio of 1:1:1; wherein, in each of the pixel groups, connecting lines of the centers of the first subpixel, the second subpixel, and the third subpixel form a first virtual isosceles right-angled triangle; wherein the second subpixel forms the vertex of the right angle of the first virtual isosceles right-angled triangle, and in the individual pixel group, the first subpixel, the second subpixel, and the third subpixel are arranged in the same way; wherein, for any two adjacent pixel groups in one and the same row of the matrix-like structure, connecting lines between the centers of the second subpixel and the third subpixel in one of the pixel groups and of the first subpixel in the other pixel group form a second virtual isosceles right-angled triangle; while for any two adjacent pixel groups in one and the same column of the matrix-like structure, connecting lines between the centers of the first subpixel and the second subpixel in one of the pixel groups and of the third subpixel in the other pixel group form a third virtual isosceles right-angled triangle.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of display technology, specifically to a pixel structure, a display panel and a display device. STATE OF THE ART

[0002] For COB (chip-on-board) display panels currently available on the market, the pitch between pixels is typically 2 mm. To increase the resolution of a display panel, the pitch between pixels must be reduced, which requires increasing the number of pixels used, resulting in increased costs. Furthermore, a dot pitch below 0.9 mm is difficult to achieve with conventional technology. CONTENT OF THIS APPLICATION

[0003] The present application provides a high resolution pixel structure, a display panel and a display device.

[0004] In one embodiment, a pixel structure is provided. It comprises a plurality of pixel groups arranged in a matrix-like manner, thus forming a matrix structure, wherein each of the pixel groups comprises a first subpixel, a second subpixel, and a third subpixel, and in each of the pixel groups, the numbers of the first subpixel, the second subpixel, and the third subpixel are in a ratio of 1:1:1; wherein, in each of the pixel groups, connecting lines of the centers of the first subpixel, the second subpixel, and the third subpixel form a first virtual isosceles right-angled triangle; wherein the second subpixel forms the vertex of the right angle of the first virtual isosceles right-angled triangle, and in the individual pixel group, the first subpixel, the second subpixel, and the third subpixel are arranged in the same way.wherein, for any two adjacent pixel groups in one and the same row of the matrix-like structure, connecting lines between the centers of the second subpixel and the third subpixel in one of the pixel groups and the first subpixel in the other pixel group form a second virtual isosceles right-angled triangle; while for any two adjacent pixel groups in one and the same column of the matrix-like structure, connecting lines between the centers of the first subpixel and the second subpixel in one of the pixel groups and the third subpixel in the other pixel group form a third virtual isosceles right-angled triangle.

[0005] The above pixel structure uses "virtual pixel" technology (the technology that uses time-multiplexing of physical pixels to reproduce more virtual pixels based on the phenomenon of human eye inertia). When the above pixel structure is applied to a display panel, the resolution of such a display panel is four times that of a display panel with physical pixels, with the same number of subpixels, thereby increasing the resolution of the display panel and thus reducing the cost of the display panel.

[0006] In one of the embodiments, a display panel is provided comprising a pixel structure as described above.

[0007] In one embodiment, a display panel is provided comprising a circuit board and a plurality of pixel groups arranged in a matrix to form a matrix-like structure; wherein each of the pixel groups comprises first chips, a second chip, and a third chip, the numbers of which are in a ratio of 2:1:1, and the first chips, the second chip, and the third chip are formed on one and the same side of the circuit board; wherein in each of the pixel groups, the first chips, the second chip, and the third chip are located at four corners of a virtual square, and all of the first chips are located at two corners on a diagonal of the virtual square; and wherein in the single pixel group, the first chips, the second chip, and the third chip are arranged in the same manner.

[0008] In one of the embodiments, a display device is further provided which comprises a display panel as described above. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] In it show Fig. 1 a schematic representation of a pixel structure according to an embodiment of the present application; Fig. 2 is a schematic representation of the pixel structure according to another embodiment of the present application; Fig. 3 a schematic representation of the pixel structure of a display panel according to an embodiment of the present application; Fig. 4 is a schematic diagram of the pixel structure of the display panel according to another embodiment of the present application; Fig. 5 is a schematic representation of a solid-state welding structure according to an embodiment of the present application; Fig. 6 a schematic representation of the solid-state welding structure according to an embodiment of the present application. DETAILED DESCRIPTION

[0010] To better understand the objects, technical embodiments, and advantages of the present application, the present application will be described in more detail below with reference to specific embodiments and the accompanying drawings. It should be understood that the specific embodiments described herein serve only to explain the present application and do not limit the scope of protection of the application.

[0011] Unless otherwise defined, all technical and scientific terms used herein are intended to have the same meanings as commonly understood by those skilled in the art. The terms used in the description of this application are intended to describe specific embodiments only, without limiting the application. The term "and / or" as used herein includes any and all combinations of one or more of the listed elements.

[0012] The terms “first” and “second” in the present application do not indicate a specific number or order but rather serve to distinguish the designations.

[0013] As in Fig. 1, one embodiment of the present application relates to a pixel structure 10 comprising a plurality of pixel groups 100 arranged in a matrix. Each of the pixel groups 100 comprises a first subpixel 110, a second subpixel 120, and a third subpixel 130, and in each of the pixel groups 100, the numbers of the first subpixel 110, the second subpixel 120, and the third subpixel 130 are in a ratio of 1:1:1. In detail, in one embodiment, the first subpixel 110, the second subpixel 120, and the third subpixel 130 are each provided in a number of one in each of the pixel groups 100. The first subpixel 110, the second subpixel 120 and the third subpixel 130 are each one of the components red light emitting chip, blue light emitting chip and green light emitting chip and the first subpixel 110, the second subpixel 120 and the third subpixel 130 emit differently colored light.It is understood that light emitted by the first subpixel 110, the second subpixel 120, or the third subpixel 130 may also have a color other than red, blue, and green.

[0014] In each of the pixel groups 100, the first subpixel 110 and the second subpixel 120 are arranged along a first direction, while the second subpixel 120 and the second subpixel 130 are arranged along a second direction. Connecting lines of the center points of the first subpixel 110, the second subpixel 120, and the third subpixel 130 form a first virtual isosceles right-angled triangle 200. In detail, the center points of the first subpixel 110, the second subpixel 120, and the third subpixel 130 represent the three corners of the first virtual isosceles right-angled triangle 200. The second subpixel 120 represents the vertex of the right angle of the first virtual isosceles right-angled triangle 200.

[0015] In this case, for two adjacent pixel groups 100 in one and the same row of the matrix-like structure, connecting lines of the center points of the second subpixel 120 and the third subpixel 130 in one of the pixel groups 100 as well as of the first subpixel 110 in the other pixel group 100 form a second virtual isosceles right-angled triangle 210, while for two adjacent pixel groups 100 in one and the same column of the matrix-like structure, connecting lines of the center points of the first subpixel 110 and the second subpixel 120 in one of the pixel groups 100 as well as of the third subpixel 130 in the other pixel group 100 form a third virtual isosceles right-angled triangle 220.Understandably, connecting lines of the center points of the second subpixel 120 of one of the pixel groups 100, of the first subpixel 110 of a pixel group 100 adjacent in the row direction of the matrix-like structure of this pixel group 100, and of the third subpixel 130 of a pixel group 100 adjacent in the column direction of the matrix-like structure of this pixel group 100 form a fourth virtual isosceles right-angled triangle 230.

[0016] In detail, the following applies to the example of the pixel structure 10 according to Fig. 1: The connecting lines of the first subpixel 110, the second subpixel 120, and the third subpixel 130 in the pixel group 100 located in a first row and a first column form the first virtual isosceles right-angled triangle 200. The connecting lines of the center points of the second subpixel 120 and the third subpixel 130 in the pixel group 100 located in the first row and the first column, as well as the first subpixel 110 in the pixel group 100 located in the first row and a second column, form the second virtual isosceles right-angled triangle 210.The connecting lines of the center points of the first subpixel 110 and the second subpixel 120 in the pixel group 100 located in the first row and the first column, as well as the third subpixel 130 in the pixel group 100 located in a second row and the first column, form the third virtual isosceles right-angled triangle 220. The connecting lines of the center points of the second subpixel 120 in the pixel group 100 located in the first row and the first column, the first subpixel 110 in the pixel group 100 located in the first row and the second column, and the third subpixel 130 in the pixel group 100 located in the second row and the first column, form the fourth virtual isosceles right-angled triangle 230.

[0017] The above pixel structure uses "virtual pixel" technology (that is, the technology that reproduces more virtual pixels by time-multiplexing physical pixels based on the phenomenon of eye inertia of the human eye). In the above pixel structure 10, when the first subpixel 110, the second subpixel 120, and the third subpixel 130 are illuminated, the circumcenter of the first virtual isosceles right triangle 200 forms a first pixel point 201, the circumcenter of the second virtual isosceles right triangle 210 forms a second pixel point 211, the circumcenter of the third virtual isosceles right triangle 220 forms a third pixel point 221, and the circumcenter of the fourth virtual isosceles right triangle 230 forms a fourth pixel point 231.When the above pixel structure 10 is applied to a display panel, if the display panel and a display panel with physical pixels have the same number of subpixels, the resolution of such a display panel can be increased, thus reducing the cost of the display panel.

[0018] In one embodiment, the plurality of pixel groups 100 are arranged in a matrix-like manner, thus forming a matrix structure. All of the pixel groups 100 of the matrix-like structure are arranged at equal spacing in the row direction, and all of the pixel groups 100 of the matrix-like structure are arranged at equal spacing in the column direction. Thus, all of the pixel groups 100 are arranged evenly throughout the pixel structure 10, thus ensuring uniform light emission.

[0019] In detail, the first direction corresponds to the row direction of the matrix-like structure, while the second direction corresponds to the column direction of the matrix-like structure. The first subpixels 110 and the second subpixels 120 of all the pixel groups 100 in the same row of the matrix-like structure lie on the same straight line, and the third subpixels 130 of all the pixel groups 100 in the same row lie on the same straight line. The second subpixels 120 and the third subpixels 130 of all the pixel groups 100 in the same column of the matrix-like structure lie on the same straight line, and the first subpixels 110 of all the pixel groups 100 in the same column lie on the same straight line. The circumcenters of all the first virtual isosceles right-angled triangles 200 in the same row of the matrix-like structure lie on the same straight line.The circumcenters of all the first virtual isosceles right-angled triangles 200 in the same column of the matrix-like structure lie on the same straight line. Thus, all of the first pixel points 201 that can be formed on the pixel structure 10 are arranged in a matrix-like manner, and the first pixel points 201 located in the same row on the pixel structure 10 lie on the same straight line, while the first pixel points 201 located in the same column lie on the same straight line. The uniform distribution of the first pixel points 201 ensures the uniformity of the light emission.

[0020] Furthermore, it is provided that the length of the connecting line between the circumcenters of any two adjacent first virtual isosceles right-angled triangles 200 in one and the same row of the matrix-like structure is uniform; while the length of the connecting line between the circumcenters of any two adjacent first virtual isosceles right-angled triangles 200 in one and the same column of the matrix-like structure is uniform. Thus, the distance between any two adjacent first pixel points 201 is uniform among all first pixel points 201 located in one and the same row on the pixel structure 10, while the distance between any two adjacent first pixel points 201 is uniform among all first pixel points 201 located in one and the same column on the pixel structure 10.Thus, the uniformity of the distribution of the first pixel points 201 can be ensured and thus the uniformity of the light emission can be ensured.

[0021] Furthermore, it is provided that the length of the connecting line of the circumcenters of any two adjacent first virtual isosceles right-angled triangles 200 in one and the same row of the matrix-like structure corresponds to twice the leg length of the right angle of the first virtual isosceles right-angled triangle 200. Therefore, for any two adjacent pixel groups 100 in one and the same row, the connecting lines of the centers of the second subpixel 120 and the third subpixel 130 in the left pixel group 100 as well as of the first subpixel 110 in the right pixel group 100 can form the second virtual isosceles right-angled triangle 210, and the second pixel point 211 can be formed at the circumcenter of the second virtual isosceles right-angled triangle 210.The length of the connecting line between the circumcenters of any two adjacent first virtual isosceles right-angled triangles 200 in the same column of the matrix-like structure corresponds to twice the leg length of the right angle of the first virtual isosceles right-angled triangle. Therefore, for any two adjacent pixel groups 100 in the same column, the connecting lines between the centers of the first subpixel 110 and the second subpixel 120 in the upper pixel group 100, as well as the third subpixel 130 in the lower pixel group 100, can form the third virtual isosceles right-angled triangle 220, and the third pixel point 221 can be formed at the circumcenter of the third virtual isosceles right-angled triangle 220.

[0022] The above pixel structure uses "virtual pixel" technology (namely, the technology that reproduces more virtual pixels by time-multiplexing physical pixels based on the phenomenon of eye inertia of the human eye). In the above pixel structure 10, the circumcenter of the first virtual isosceles right triangle 200 forms a first pixel point 201, the circumcenter of the second virtual isosceles right triangle 210 forms a second pixel point 211, the circumcenter of the third virtual isosceles right triangle 220 forms a third pixel point 221, and the circumcenter of the fourth virtual isosceles right triangle 230 forms a fourth pixel point 231.When the above pixel structure 10 is applied to a display panel, if the display panel and a display panel with physical pixels have the same number of subpixels, the resolution of such a display panel can be increased, thus reducing the cost of the display panel.

[0023] As can be seen from Fig. 2, each of the pixel groups in one of the embodiments may further comprise a fourth subpixel 140, wherein the centers of the first subpixel 110, the second subpixel 120, the third subpixel 130, and the fourth subpixel 140 are located at four corners of a virtual square, and the subpixels at two corners on one of the diagonals of the virtual square emit equally colored light. In the present embodiment, for example, the second subpixel 120 and the fourth subpixel 140 emit equally colored light.

[0024] The above pixel structure uses "virtual pixel" technology (that is, the technology that reproduces more virtual pixels by time-multiplexing physical pixels based on the phenomenon of human eye inertia). In the above pixel structure 10, when the first subpixel 110, the second subpixel 120, the third subpixel 130, and the fourth subpixel 140 are illuminated, the first pixel point 201 is located approximately at the geometric center of a virtual square whose vertices are the first subpixel 110, the second subpixel 120, the third subpixel 130, and the fourth subpixel 140.

[0025] Furthermore, the first subpixel 110, the second subpixel 120, and the third subpixel 130 are each a red light-emitting chip, a blue light-emitting chip, and a green light-emitting chip. The first subpixel 110, the second subpixel 120, and the third subpixel 130 emit light of different colors, while the second subpixel 120 and the fourth subpixel 140 emit light of the same color. Therefore, when the pixel structure 10 displays a single color, the display is in the form of a straight line. Center points for mixed light of any two colors are displayed in the form of a straight line. Mixed points for mixed light of three colors are arranged in an orderly manner. In a pixel group 100, the subpixels that emit light of the same color and are located at two corners on one of the diagonals of the virtual square do not need to light up at the same time.By controlling the time division multiplexing of the individual subpixels in pixel group 100, more pixel points are displayed.

[0026] Furthermore, it is provided that the side length d0 of the virtual square, whose corners are the first subpixel 110, the second subpixel 120, the third subpixel 130, and the fourth subpixel 140, is in the range of 0.4 to 3 mm. Since the distance between the geometric centers of two adjacent pixel groups 100 corresponds to twice the side length of the virtual square, the minimum distance between physical pixel points can be 0.8 mm and thus less than 0.9 mm, thereby achieving a smaller distance.

[0027] An embodiment of the present application further relates to a display panel comprising a pixel structure 10 described above.

[0028] Optionally, the display panel can be an OLED (Organic Light-Emitting Diode) display panel, a COB display panel, an LED (Light-Emitting Diode) display panel, etc.

[0029] In detail, the display panel is a COB display panel, and the first subpixel 110, the second subpixel 120, and the third subpixel 130 may each be a light-emitting chip formed as a wire bond structure or a light-emitting chip formed as a flip chip.

[0030] As in Fig. 3, an embodiment of the present application further relates to a display panel. The display panel includes a circuit board and a plurality of pixel groups arranged in a matrix to form a matrix-like structure. Each of the pixel groups includes first chips, a second chip, and a third chip, the numbers of which are in a ratio of 2:1:1, and the first chips, the second chip, and the third chip are formed by compression molding on one and the same side of the circuit board. In each of the pixel groups, the first chips, the second chip, and the third chip are located at four corners of a virtual square, and all of the first chips are located at two corners on one diagonal of the virtual square. In the single pixel group, the first chips, the second chip, and the third chip are arranged in the same manner.

[0031] For example, the board can be a printed circuit board on which several pixel groups with the same internal arrangement are provided. Fig. 3 shows a schematic representation of the pixel structure in the display panel according to an embodiment. Fig. Figure 4 shows a schematic representation of the pixel structure in the display panel according to another embodiment. As can be seen from Fig. 3 and Fig. 4, in each of the pixel groups 100, the first chips 111 are provided in a number of two, and both the second chip 112 and the third chip 113 are each provided in a number of one. In another embodiment, in each of the pixel groups 100, the first chips 111 are provided in a number of four, and both the second chip 112 and the third chip 113 are each provided in a number of two, as long as it is ensured that the numbers of the first chips 111, the second chip 112, and the third chip 113 are in a ratio of 2:1:1. The first chips 111, the second chip 112, and the third chip 113 may each be one of the red light-emitting chip, the blue light-emitting chip, and the green light-emitting chip, and the first chips 111, the second chip 112, and the third chip 113 emit differently colored light.

[0032] For example, the single first chip 111 is a green light-emitting chip, the second chip 112 is a red light-emitting chip, and the third chip 113 is a blue light-emitting chip. In each of the pixel groups 100, the ratio of the numbers of the green light-emitting chip, the red light-emitting chip, and the blue light-emitting chip is 2:1:1. It should be understood that, alternatively, the second chip 112 may be a blue light-emitting chip and the third chip 113 may be a red light-emitting chip.

[0033] For example, the single first chip 111 is a red light-emitting chip, the second chip 112 is a green light-emitting chip, and the third chip 113 is a blue light-emitting chip. In each of the pixel groups 100, the ratio of the numbers of the red light-emitting chip, the green light-emitting chip, and the blue light-emitting chip is 2:1:1. It should be understood that, alternatively, the second chip 112 may be a blue light-emitting chip and the third chip 113 may be a green light-emitting chip.

[0034] For example, the single first chip 111 is a blue light-emitting chip, the second chip 112 is a red light-emitting chip, and the third chip 113 is a green light-emitting chip. In each of the pixel groups 100, the ratio of the numbers of the blue light-emitting chip, the red light-emitting chip, and the green light-emitting chip is 2:1:1. It should be understood that, alternatively, the second chip 112 may be a green light-emitting chip and the third chip 113 may be a red light-emitting chip.

[0035] It is understood that alternatively, the single first chip 111, the second chip 112 and the third chip 113 may be light-emitting chips of other colors.

[0036] In each of the pixel groups 100, the first chips 111, the second chip 112, and the third chip 113 arranged in the respective pixel group are formed by compression molding on one and the same plate of the circuit board. Two first chips 111, one second chip 112, and one third chip 113 are located at four corners of a virtual square. The two first chips 111 are located at two corners on one diagonal of the virtual square. The second chip 112 and the third chip 113 are located at two corners on the other diagonal of the virtual square. In a pixel group, the two first chips 111 do not light up at the same time. By controlling the time division multiplexing of the individual chips in the pixel group 100, more pixel points can be displayed.

[0037] It will be Fig. 3. For two adjacent pixel groups 100 in the same row, each of the pixel groups 100 can display a first virtual pixel point 114 by controlling the illumination of the one first chip 111, the one second chip 112, and the one third chip 113 arranged in the respective pixel group. The first virtual pixel point 114 is located approximately at the geometric center of the virtual square, the corners of which are the two first chips 111, the second chip 112, and the third chip 113, in the pixel group 100. Furthermore, the two adjacent pixel groups 100 can display a second virtual pixel point 115 by multiplexing a physical pixel point, for example, by illuminating the first chip 111 and the third chip 113 of the left pixel group 100 and illuminating the second chip 112 of the right pixel group 100.The second virtual pixel point 115 can be located approximately at the circumcenter of a virtual triangle whose corners are the three chips. Of course, the second virtual pixel point 115 can also be located within the virtual triangle.

[0038] Similarly, for two adjacent pixel groups 100 in the same column, each of the pixel groups 100 can display the first virtual pixel point 114 by controlling the illumination of the one first chip 111, the one second chip 112, and the one third chip 113 arranged in the respective pixel group. The first virtual pixel point 114 is located approximately at the geometric center of the virtual square, the corners of which are the two first chips 111, the second chip 112, and the third chip 113, in the pixel group 100. Furthermore, the two adjacent pixel groups 100 can display the second virtual pixel point 115 by multiplexing a physical pixel point, for example, by illuminating the first chip 111 and the second chip 112 of the upper pixel group 100 and illuminating the third chip 113 of the lower pixel group 100.The second virtual pixel point 115 can be located approximately at the circumcenter of a virtual triangle whose corners are the three chips. Of course, the second virtual pixel point 115 can also be located within the virtual triangle.

[0039] The above display panel uses "virtual pixel" technology (namely, the technology that reproduces more virtual pixels by time-division multiplexing physical pixels based on the phenomenon of eye inertia of the human eye). In the above display panel, two adjacent pixel groups 100 in the same row or column can form a first virtual pixel point 114, and by multiplexing the chips in the two adjacent pixel groups 100, a second virtual pixel point 115 can be further formed between the two pixel groups 100. Thus, when the display panel and a display panel using physical pixels have the same number of subpixels, the resolution of such a display panel can be increased, thus reducing the cost of the display panel. Furthermore, by using the virtual pixel points, user fatigue during viewing can be reduced.

[0040] If the first chips 111 are provided in a number of two for each of the pixel groups 100, and the second chips 112 and the third chips 113 are each provided in a number of one, and a sufficient number of pixel groups 100 are present in a pixel matrix, the display effect of the display panel can be equivalent to the display effect with four times the number of physical pixels with the same number of chips. This means that with the same resolution, the display panel can save half the number of chips compared to a conventional display panel, which can also reduce the use of a driver chip.

[0041] Optionally, when time-multiplexing physical pixels, the sharpness of the edge of a displayed image on the display panel can be reduced using a subpixel algorithm.

[0042] In one embodiment, all of the pixel groups 100 in one and the same row of the matrix-like structure are evenly spaced, and all of the pixel groups 100 in one and the same column of the matrix-like structure are evenly spaced. Thus, a more uniform overall distribution of the first virtual pixel point 114 and the second virtual pixel point 115 on the display panel is achieved, further reducing user fatigue while viewing.

[0043] In detail, Fig. 3. In the row direction of the matrix-like structure, the third chip 113 and one of the first chips 111 of the pixel group 100 are located in the same row, while the second chip 112 and the other first chip 111 of the pixel group 100 are located on the same row. In the column direction of the matrix-like structure, the second chip 112 and one of the first chips 111 of the pixel group are located in the same column, while the third chip 113 and the other first chip 111 of the pixel group 100 are located on the same column.

[0044] Furthermore, it is provided that the distance d1 between the geometric centers of two adjacent pixel groups 100 corresponds to twice the side length d0 of the virtual square. This means that the distance between two closest chips of two adjacent pixel groups 100 is equal to the distance between two closest chips of a pixel group 100. In the present embodiment, some of the first chips 111 of the individual pixel groups 100 of the matrix-like structure lie on a straight line, and some of the second chips 112 and the third chips 113 of the individual pixel groups 100 also lie on a straight line. Furthermore, the first virtual pixel point 114 and the second virtual pixel point 115 are arranged at a distance from one another, and the distance between the first virtual pixel point 114 and the second virtual pixel point 115, which are adjacent to one another, is the same.This results in a more even overall distribution of the virtual pixel points on the display panel.

[0045] For example, the side length d0 of the virtual square, whose corners are the first two chips 111, the second chip 112, and the third chip 113 of the pixel group 100, is in the range of 0.4 to 3 mm. Thus, the distance between the centers of two adjacent pixel groups 100, namely between mixed light centers, corresponds to twice this range, so the minimum distance between physical pixel points can be 0.8 mm.

[0046] In one embodiment, the single first chip 111, the second chip 112, and the third chip 113 each comprise a light-emitting wire bond chip or a light-emitting flip chip. Depending on the actual needs, a light-emitting wire bond chip or a light-emitting flip chip can be selected.

[0047] As in Fig. 5, in one embodiment, in a pixel group 100, the first subpixel 110, the second subpixel 120, and the third subpixel 130 are each a wire bond structure. The first subpixel 110, the second subpixel 120, and the third subpixel 130 are fixed to a common electrode 300 by means of chip bonding adhesive. A first welding wire region 310, a second welding wire region 320, and a third welding wire region 330 are each arranged at a distance from the common electrode 300. The first subpixel 110 and the first welding wire region 310 are electrically connected to one another via a first bond wire 340. The second subpixel 120 and the second welding wire region 320 are electrically connected to one another via a second bond wire 350. The third subpixel 130 and the third welding wire region 330 are electrically connected to one another via a third bond wire 360.Thus, the positions of the individual welding wire area and the chip bonding adhesive are spaced from each other, which is useful for ensuring the welding wire quality.

[0048] As in Fig.6, in another embodiment, in a pixel group 100, the first chips 111, the second chip 112, and the third chip 113 are each a wire bond structure. The two first chips 111 are fixed to a common electrode 121 by means of chip bonding adhesive. A first welding wire region 122 is arranged between a first chip 111 and the third chip 113. A second welding wire region 123 is arranged between the other first chip 111 and the second chip 112. The two first chips 111 are each connected to the first welding wire region 122 and the second welding wire region 123, respectively, via a bond wire 124. Both the second chip 112 and the third chip 113 are connected to the common electrode 121 via the bond wire 124.In the present embodiment, the first welding wire portion 122 and the second welding wire portion 123 are located on two sides of the chip bonding adhesive, so that the positions of the single welding wire portion and the chip bonding adhesive are spaced from each other, which is convenient for ensuring the welding wire quality.

[0049] Based on the same concept as the pixel structure 10 and the display panel, an embodiment further relates to a display device including the display panel described above.

[0050] Optionally, the display device may be a display screen, a mobile phone, a tablet, a palmtop, a smart watch, or another digital device.

[0051] The technical features of the above embodiments can be combined arbitrarily, and for the sake of brevity, a description of all possible combinations of the individual technical features in the above embodiments is omitted here. As long as the combination of these technical features is not contradictory, it should be considered part of the scope of the present description.

[0052] The above exemplary embodiments describe in detail only some embodiments of the present application and should therefore not be construed as limiting the scope of the application. It should be noted that various variants and developments are possible for those of ordinary skill in the art without departing from the basic idea of the present application, which are intended to be within the scope of protection of the application. With regard to the scope of protection of the present application, the appended claims are decisive.

Claims

[1] A pixel structure comprising a plurality of pixel groups arranged in a matrix-like manner and thus forming a matrix structure, wherein each of the pixel groups comprises a first subpixel, a second subpixel and a third subpixel, and in each of the pixel groups the numbers of the first subpixel, the second subpixel and the third subpixel are in a ratio of 1: 1: 1; wherein, in each of the pixel groups, connecting lines of the centers of the first subpixel, the second subpixel, and the third subpixel form a first virtual isosceles right-angled triangle; wherein the second subpixel forms the vertex of the right angle of the first virtual isosceles right-angled triangle, and in the individual pixel group, the first subpixel, the second subpixel, and the third subpixel are arranged in the same way; wherein, for any two adjacent pixel groups in one and the same row of the matrix-like structure, connecting lines between the centers of the second subpixel and the third subpixel in one of the pixel groups and of the first subpixel in the other pixel group form a second virtual isosceles right-angled triangle; while for any two adjacent pixel groups in one and the same column of the matrix-like structure, connecting lines between the centers of the first subpixel and the second subpixel in one of the pixel groups and of the third subpixel in the other pixel group form a third virtual isosceles right-angled triangle. [2] The pixel structure according to claim 1, wherein all of the pixel groups of the matrix-like structure are arranged equally spaced in the row direction and all of the pixel groups of the matrix-like structure are arranged equally spaced in the column direction. [3] A pixel structure according to claim 2, wherein the first subpixels and the second subpixels of all the pixel groups in one and the same row of the matrix-like structure lie on one and the same straight line and the third subpixels of all the pixel groups in one and the same row lie on one and the same straight line; while the second subpixels and the third subpixels of all the pixel groups in one and the same column of the matrix-like structure lie on one and the same straight line and the first subpixels of all the pixel groups in one and the same column lie on one and the same straight line. [4] A pixel structure according to claim 1, wherein the circumcenters of all the first virtual isosceles right-angled triangles in one and the same row of the matrix-like structure lie on one and the same straight line; while the circumcenters of all the first virtual isosceles right-angled triangles in one and the same column of the matrix-like structure lie on one and the same straight line. [5] Pixel structure according to claim 4, wherein the length of the connecting line of the circumcenters of any two adjacent first virtual isosceles right-angled triangles in one and the same row of the matrix-like structure is uniform; while the length of the connecting line of the circumcenters of any two adjacent first virtual isosceles right-angled triangles in one and the same column of the matrix-like structure is uniform. [6] Pixel structure according to claim 5, wherein the length of the line connecting the circumcenters of any two adjacent first virtual isosceles right-angled triangles in one and the same row of the matrix-like structure corresponds to twice the leg length of the right angle of the first virtual isosceles right-angled triangle; while the length of the line connecting the circumcenters of any two adjacent first virtual isosceles right-angled triangles in one and the same column of the matrix-like structure corresponds to twice the leg length of the right angle of the first virtual isosceles right-angled triangle. [7] A pixel structure according to any one of claims 1 to 6, wherein the first subpixel, the second subpixel and the third subpixel in each of the pixel groups are each provided in a number of one. [8] The pixel structure according to any one of claims 1 to 6, wherein the first subpixel, the second subpixel, and the third subpixel are each one of the red light-emitting chip, the blue light-emitting chip, and the green light-emitting chip, and wherein the first subpixel, the second subpixel, and the third subpixel emit differently colored light. [9] The pixel structure of any one of claims 1 to 8, wherein each of the pixel groups further comprises a fourth subpixel, wherein the centers of the first subpixel, the second subpixel, the third subpixel and the fourth subpixel are located at four corners of a virtual square, and the subpixels emit equally colored light at two corners on one of the diagonals of the virtual square. [10] The pixel structure of claim 9, wherein the virtual square has a side length of 0.4 to 3 mm. [11] A display panel comprising a pixel structure according to any one of claims 1 to 10. [12] A display panel comprising a circuit board and a plurality of pixel groups arranged in a matrix to form a matrix-like structure; each of the pixel groups comprises first chips, a second chip and a third chip, the numbers of which are in a ratio of 2:1:1, and the first chips, the second chip and the third chip are formed on one and the same side of the circuit board; wherein in each of the pixel groups, the first chips, the second chip, and the third chip are located at four corners of a virtual square, and all of the first chips are located at two corners on a diagonal of the virtual square; and wherein in the single pixel group, the first chips, the second chip, and the third chip are arranged in the same manner. [13] A display panel according to claim 12, wherein all of the pixel groups of the matrix-like structure are arranged equally spaced in the row direction and all of the pixel groups of the matrix-like structure are arranged equally spaced in the column direction. [14] The display panel according to claim 12, wherein the side length of the virtual square is in the range of 0.4 to 3 mm. [15] The display panel according to claim 12, wherein the first chips, the second chip and the third chip are each one of the red light emitting chip, the blue light emitting chip and the green light emitting chip, and wherein the first chips, the second chip and the third chip emit differently colored light. [16] A display device comprising a display panel according to any one of claims 11 to 15.

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