Multilayer electrical component

Abstract

Multilayer ceramic capacitor, comprising: a dielectric body; first and second conductive terminals, separated from each other by the dielectric body; a multitude of parallel plate-shaped internal electrodes forming a stack of electrode layers embedded in the dielectric body; first and second groups of inner electrodes from the plurality of parallel plate inner electrodes, each group comprising a first inner electrode and a separate, adjacent second inner electrode, wherein a first gap of the first inner electrode is offset relative to a second gap of the separate, adjacent second inner electrode in a first direction between the first and the second conductive terminal, wherein a section of the first inner electrode overlaps a section of the second inner electrode to form capacitance regions in each group of inner electrodes; and a set of at least two third inner electrodes from the plurality of parallel plate inner electrodes arranged between the first and second group of inner electrodes, wherein at least two third inner electrodes are stacked next to each other and form a region with negligible capacitance.

Description

AREA

[0001] The present disclosure relates generally to multilayer electrical components, such as capacitors and varistors, which exhibit improved robustness and performance. BACKGROUND

[0002] Multilayer ceramic capacitors (MLCCs) generally comprise a multitude of parallel plate electrodes, also referred to here as "electrodes," embedded in a dielectric body. Sections of the dielectric body separate adjacent electrodes, which are connected by conductive terminals of opposite polarity that cover the end sections of the dielectric body. MLCC capacitors can be surface-mounted onto a printed circuit board using reflow soldering or other surface-mount technology for use in various applications, including high-voltage and high-frequency applications.

[0003] The state of the art in Fig. Figure 1 shows an MLCC 100 comprising several parallel plate electrodes embedded in a dielectric body 102 covered by conductive terminals 104, 106. Each electrode comprises a plurality of electrically insulated plate sections 108, 110 lying in a common plane. An outermost plate electrode of the odd-numbered electrodes is connected to terminal 104, and an outermost plate electrode of the even-numbered electrodes is connected to the other terminal 106. Overlapping plate sections of adjacent electrodes form a series connection of capacitors (for example, C1, C3, and C5) between the terminals in parallel with another series connection of capacitors (for example, C2, C4, and C6) between the terminals. Each series capacitor reduces a portion of the voltage applied to the conductive terminals.

[0004] These and other MLCCs are susceptible to stress cracking due to piezoelectric or electrostrictive forces along common boundaries between adjacent series capacitors (for example, boundaries between capacitors C1, C3, and C5, aligned with the boundaries between capacitors C2, C4, and C6), where the boundaries are connected to columns 111 that separate the plate sections in a common plane. The occurrence of stress cracking is increased in applications where the MLCC is subjected to higher voltages and higher frequencies.

[0005] For example, alternating electrodes create overlapping areas that generate capacitance, such as capacitors C1-C6. These capacitance areas create a stress, especially when high-voltage pulses are applied to the MLCC 100. This stress can lead to piezoelectric cracks.

[0006] More specifically, the problem is that in situations where a ceramic capacitor is subjected to a sudden applied voltage, a common failure mode is due to the piezoelectric properties of the ceramic. The sudden dimensional change caused by the piezoelectric effect leads to high internal stress buildup, resulting in cracks in or near the center of the MLCC. A pulse test for safety capacitors is one such test, in which a sudden voltage pulse is applied. The capacitance density in an MLCC increases the risk of piezoelectric cracking, and this problem limits the maximum capacitance that can pass the test.

[0007] Extra-thick dielectrics can be inserted between sets of electrode layers to create vertical gaps that prevent local voltage buildup. Unfortunately, these vertical gaps do not optimally prevent voltage buildup. Furthermore, these vertical gaps must be many times thicker than those of conventional dielectrics to be effective, which requires additional space. Therefore, there is a desire to develop multilayer capacitors with improved robustness and performance.

[0008] The approaches described in this section are those that could be pursued, but not necessarily those that have been previously conceived or pursued. Therefore, unless otherwise stated, the approaches described in this section should not be considered background simply because they are included here. Furthermore, the approaches described in this section should not be assumed to be well understood, routine, or conventional simply because they are included here. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] To describe how the advantages and features of the disclosure can be achieved, the disclosure is described with reference to specific embodiments illustrated in the accompanying drawings. These drawings show only exemplary embodiments of the disclosure and are therefore not to be considered as limiting its scope. The drawings may have been simplified for clarity and are not necessarily to scale. Fig. Figure 1 is a schematic sectional view of a multilayer ceramic capacitor according to the state of the art. Fig. Figure 2 is a sectional view of a multilayer electrical component with a plurality of capacitive layers according to one possible embodiment. Fig. Figure 3 is a schematic sectional view of a multilayer electrical component comprising several capacitive layers, according to one possible embodiment. Fig. Figure 4 is a sectional view of a multilayer electrical component comprising several capacitive layers, according to one possible embodiment. Fig. Figure 5 is a schematic sectional view of a multilayer electrical component comprising several capacitive layers, according to one possible embodiment. Fig. Figure 6 is a schematic sectional view of a multilayer electrical component comprising several capacitive layers, according to one possible embodiment. DETAILED DESCRIPTION

[0010] The disclosure relates generally to multilayer electrical components, such as capacitors and varistors, that exhibit improved robustness and performance. The multilayer electrical component generally comprises a dielectric body separating conductive terminals connected to multiple parallel plate electrodes embedded within the dielectric body. Representative implementations are further described herein.

[0011] The dielectric composition is typically selected based on the operating temperature range, temperature stability, energy density, loss factor, and relative permittivity, as well as other requirements or specifications of the multilayer electrical component. Suitable dielectrics include ceramics and porcelains, along with other known and emerging materials. One representative ceramic includes barium titanate and additives such as glass and rare-earth materials. Another representative ceramic includes bismuth ferrite, strontium titanate, and additives such as barium titanate, along with other elements and compounds. Other representative ceramics may include magnesium titanate, neodymium titanate, strontium titanate, or calcium zirconate, along with other compounds. Ceramics are currently preferred due to their ability to be formed by sintering a composition powder during the fabrication of the electrical component.

[0012] The electrodes can be made of a noble or base metal. The conductive terminals can be designed as caps formed on opposite sides or end sections of the dielectric body. The terminals can also comprise a base or noble metal. Representative examples include, but are not limited to, electroplated silver, copper, and palladium / silver, as well as other metals and alloys. The terminals can also comprise metal and non-metal material compositions. The multilayer electrical component (e.g., capacitor, varistor, etc.) can be configured for surface mounting with or without leads, for through-hole mounting, or for any other known or future mounting technology. OVERVIEW

[0013] At least some embodiments employ a paired electrode distribution for piezoelectric crack resistance. The electrodes are paired in the stacking direction of an MLCC. The paired electrodes are two electrodes with the same polarity, thus preventing any significant piezoelectric effect within the ceramic. In one implementation, the paired electrodes are distributed at regular intervals in a regular internal pattern stack of inner electrodes.

[0014] Electrode pairs forming regions of negligible capacitance can be positioned arbitrarily between electrode pairs forming capacitance regions within the dielectric body. Other paired electrodes can also be used on the top and bottom surfaces of MLCC structures to prevent flashover. Vertical gaps, such as a larger distance between vertically stacked electrodes in the structure, have a similar effect but are less effective and less volumetrically efficient than the electrode pairs forming capacitance regions.

[0015] The embodiments apply to all MLCCs that exhibit pulse test performance, as well as other MLCCs. Tests show a significant improvement in pulse performance compared to current standard designs where the paired electrode assembly exhibits piezoelectric properties. The embodiments achieve higher capacitances than are possible with current technology, for example, for safety capacitors. The embodiments also improve reliability in applications where fast transients occur.

[0016] According to one possible embodiment, a multilayer capacitance capacitor (MLCC) comprises a dielectric body. The MLCC includes first and second conductive terminals separated from each other by the dielectric body. The MLCC comprises a plurality of parallel-plate inner electrodes forming a stack of electrode layers embedded in the dielectric body. The MLCC includes a first and a second group of inner electrodes of the plurality of parallel-plate inner electrodes. Each group comprises a first inner electrode and a separate, adjacent second inner electrode. A first gap of the first inner electrode is offset relative to a second gap of the second inner electrode in a first direction between the first and second conductive terminals. A portion of the first inner electrode overlaps a portion of the second inner electrode to form a capacitance region in each group of inner electrodes.The MLCC comprises a set of at least two third inner electrodes from the plurality of parallel plate inner electrodes located between the first and second groups of inner electrodes. These at least two third inner electrodes are stacked side by side and form a region of negligible capacitance. VERTICAL GAPS

[0017] Fig. Figure 2 is a sectional view of a multilayer electrical component 200, for example an MLCC, comprising several capacitive layers according to one possible embodiment. Alternating electrodes 202 have overlapping regions 210 that generate capacitance. The capacitance regions 210 generate a voltage that can lead to piezoelectric cracks. Vertical gaps, such as the gap 220, in the electrode layers reduce the voltage.

[0018] Fig. Figure 3 is a schematic sectional view of a multilayer electrical component 300, such as the MLCC 200, which comprises a plurality of capacitive layers according to one possible embodiment. The MLCC 300 comprises sets of first and second inner electrodes 302 and 304, dielectrics 306, and capacitance regions. The first inner electrodes 302 can be inner electrodes of a first type 1, for example, with a first voltage potential and / or a first polarity. The second inner electrodes 304 can be inner electrodes of a second type 2, for example, with a second voltage potential and / or a second polarity. The dielectrics 306 can be ceramic layers located vertically between the inner electrodes 302 and 304. Sections of the first inner electrodes 302 that overlap with sections of the second inner electrodes 304 form the capacitance regions RC.

[0019] The capacitance regions RC generate a load, especially when high-voltage pulses are applied to the MLCC 300. At least one particularly thick dielectric layer 308, for example a vertical gap, between sets of first and second inner electrodes 302 and 304 prevents local voltage buildup. Such vertical gaps do not optimally prevent voltage buildup and must be many times thicker than usual dielectric layers to be effective, which requires additional space. MULTI-PLATE ELECTRODES

[0020] Fig. Figure 4 is a sectional view of a multilayer electrical component 400, for example an MLCC, comprising several capacitive layers according to one possible embodiment. The MLCC 400 comprises stacked inner electrodes 402, a dielectric body 404, and conductive terminals 406 and 408. Groups of inner electrodes 402 overlap and generate capacitance regions 410.

[0021] By incorporating paired inner electrodes 412 throughout the structure, the capacitance regions 410 are reduced in the stacking direction, thus preventing local stress buildup that would otherwise lead to piezoelectric cracking. The paired inner electrodes 412 are located between the capacitance regions 410. Due to their design, the paired inner electrodes 412 do not generate capacitance.

[0022] Fig. Figure 5 is a schematic sectional view of a multilayer electrical component 500, such as the MLCC 400, which comprises a plurality of capacitive layers according to one possible embodiment. The MLCC comprises a dielectric body 502, conductive terminals 504 and 506, internal electrodes 510, 520, 530, and 580, capacitance regions RC, and regions with negligible capacitance R-NC. Dielectrics 570, such as ceramic layers, are located between adjacent electrodes. The conductive terminals 504 and 506 are external electrodes. The internal electrodes 510 and 530 can be internal electrodes of a first type 1, for example, with a first voltage potential and / or a first polarity. The internal electrodes 520 and 580 can be internal electrodes of a second type 2, for example, with a second voltage potential and / or a second polarity.At least one set of electrodes 530 and / or 580 is paired by repeating electrodes of the same type to create the regions with negligible capacitance R-NC.

[0023] According to one possible embodiment, the MLCC 500 comprises a dielectric body 502. The MLCC 500 also comprises a first and a second conductive terminal 504, 506, which are separated from each other by the dielectric body 502. The MLCC 500 further comprises a plurality of parallel plate inner electrodes 510, 520, 530, which form a stack of electrode layers embedded in the dielectric body 502. Each of the parallel plate inner electrodes comprises plate sections 514, 524, which are electrically isolated from each other by at least one gap 512, 522.

[0024] The MLCC 500 comprises a first and a second group 542, 544 of internal electrodes of the plurality of parallel plate internal electrodes. A first gap 512 in a first internal electrode 510 is offset relative to a second gap 522 in a separate adjacent second internal electrode 520 in each group 542, 544 in a first direction 562 between the first and second conductive terminals 504, 506. The plurality of parallel plate internal electrodes 510, 520, 530 form a stack of internal electrodes in a second direction 564 perpendicular to the first direction 562. The first and second directions can also be considered the first and second dimensions. Sections of the plate sections of the first internal electrode 510 overlap 560 sections of the plate sections of the second internal electrode 520 to form capacitance regions RC in each group of internal electrodes 542, 544.

[0025] The MLCC 500 comprises a set 546 of at least two third inner electrodes 530 from the plurality of parallel plate inner electrodes. The set 546 of at least two third inner electrodes 530 is located between the first and second groups of inner electrodes 542, 544. The at least two third inner electrodes 530 are stacked side by side and form regions with negligible capacitance R-NC.

[0026] There can be many gaps between the individual electrode layers. For example, there can be 2, 3, 5, 8, 16, or any other number of gaps in each electrode layer. There can also be many electrode layers.

[0027] According to one possible implementation, the first inner electrodes 510 have a different polarity than the second inner electrodes 520. The third inner electrodes 530 all have the same polarity. For example, the first inner electrodes 510 have a different voltage potential than the second inner electrodes 520, and the third inner electrodes 530 all have the same voltage potential. In one implementation, the third inner electrodes 530 have the same polarity and / or the same voltage potential as the first inner electrodes 510.

[0028] According to one possible implementation, the third inner electrodes 530 in the set 546 each include a gap 532 which overlaps with a gap 532 of the other third inner electrode 530 to form overlapping plate sections 534 with the regions of negligible capacitance R-NC in between.

[0029] According to one possible implementation, the first inner electrode 510 alternates with immediately adjacent second inner electrode n 520 in the first and second groups of inner electrodes 542, 546. For example, individual first inner electrode n 510 can alternate with individual second inner electrode n 520 in the groups of inner electrodes.

[0030] In one possible embodiment, columns 512 in at least one first inner electrode 510 of the upper layer are offset relative to columns 512 in at least one first inner electrode 510 of the lower layer, and columns 532 in the upper and lower second inner electrodes 520 are similarly offset to form offset plate sections.

[0031] According to one possible implementation, the interaction between the plate sections of the first and second inner electrodes 510, 520, which are stacked in adjacent layers, generates a piezoelectric effect that exhibits a corresponding internal voltage in the MLCC 500. The stacked third inner electrodes 530 reduce this corresponding internal voltage.

[0032] According to one possible implementation, the inner electrodes of the plurality of parallel plate inner electrodes are separated from each other by a dielectric layer 570.

[0033] According to one possible implementation, the first and second groups 542, 544 of internal electrodes are a plurality of first and second groups of internal electrodes. The set 546 of at least two third internal electrodes 546 is a plurality of sets of at least two third internal electrodes 546. Each set 546 of at least two third internal electrodes 530 is located between the respective first and second groups 542, 544 of internal electrodes.

[0034] The MLCC 500 can include additional sets of paired internal electrodes, for example, fourth internal electrodes 580. The paired fourth internal electrodes 580 are located between further groups of first and second internal electrodes 510 and 520, forming additional areas with negligible capacitance R-NC to reduce internal loading. The paired third internal electrodes 530 can be of the same type 1 as the first internal electrodes 510, and the paired fourth internal electrodes 580 can be of the same type 2 as the second internal electrodes 520. PAIRED ELECTRODES WITH SINGLE PLATE SECTIONS

[0035] Fig.Figure 6 is a schematic sectional view of a multilayer electrical component 600, for example an MLCC, comprising a plurality of capacitive layers according to one possible embodiment. The MLCC 600 has the features of the MLCC 500, and the features of the MLCC 600 can also be used with the MLCC 500.

[0036] According to one possible embodiment, the MLCC 600 comprises a dielectric body 602. The MLCC 600 also comprises a first and a second conductive terminal 604, 606, which are separated from each other by the dielectric body 602. The MLCC 600 further comprises a plurality of parallel plate-shaped inner electrodes 610, 620, 630, which form a stack of electrode layers embedded in the dielectric body 602.

[0037] The MLCC 600 comprises a first and a second group 642, 644 of internal electrodes from the plurality of parallel plate internal electrodes. Each group 642, 644 comprises a first internal electrode 610 and a separate, adjacent second internal electrode 620. Each first and second group 642, 644 can comprise a plurality of the first and second internal electrodes 610, 620.

[0038] A first gap 612 of the first inner electrode 610 is offset relative to a second gap 622 of the separate, adjacent second inner electrode in a first direction 662 between the first and second conductive terminals 604, 606. The gaps 612 and 614 can be located between an inner electrode and at least one of the conductive terminals 604, 606 and / or be a gap between plate sections of an inner electrode, as shown in the MLCC 500. A section of the first inner electrode 610 overlaps 660 a section of the second inner electrode 620 to form capacitance regions in each group of inner electrodes 642, 644.

[0039] The MLCC 600 comprises a set 646 of at least two third inner electrodes 630 from the plurality of parallel plate inner electrodes arranged between the first and second groups 642, 644 of inner electrodes. The at least two third inner electrodes 630 are stacked side by side and form a region with negligible capacitance R-NC.

[0040] Capacitance is defined as the essential capacitance for the operation of a capacitor. Negligible capacitance is defined as capacitance that is minimal compared to the operating capacitance of a capacitor, for example, a range between 5%, 1%, 0.1%, 0.01%, or less than the operating capacitance. For example, regions with negligible capacitance may include regions with no significant capacitance and / or regions with essentially no capacitance, which is effectively zero compared to the operating capacitance. It should be noted that absolute zero capacitance may not be physically possible, as a small amount of stray capacitance may always be present.

[0041] Embodiments are shown in which the columns and sections of electrodes of a certain type lie directly above one another. Embodiments can also be used with offset electrodes, in which the columns and sections of electrodes of a certain type are offset relative to each other in the first direction 662. For example, the columns and sections of an upper inner electrode of the first type 1 can be offset relative to the columns and sections of a lower inner electrode of the first type 1.

[0042] According to one possible implementation, the first inner electrodes 610 can be of type 1, exhibiting a different voltage potential than the second inner electrodes 620 of type 2. The third inner electrodes 630 can have the same voltage potential as each other. The third inner electrodes 630 can be of type 1 or type 2. For example, the third inner electrodes 630 can have the same voltage potential as the first inner electrodes 610.

[0043] According to one possible implementation, the third inner electrodes 630 each include a gap 632 that overlaps with a gap 632 of the other third inner electrode 630 in the first direction 662 to form overlapping plate sections with the regions of negligible capacitance R-NC between them. The gap 632 of the third inner electrodes 630 can overlap with the gap 612 of the first inner electrode 610. Alternatively, the gap of the third inner electrodes can overlap with the gap 622 of the second inner electrode 620, or additional inner electrodes 680 can be paired, with the gaps of the additional inner electrodes 680 overlapping with each other and with the gap 622 of the second inner electrode 620.

[0044] According to one possible implementation, the interaction between the plate sections of the first and second inner electrodes 610, 620, which are stacked in adjacent layers, generates a piezoelectric effect that exhibits a corresponding internal voltage in the MLCC 600. The stacked third inner electrodes 630 reduce this corresponding internal voltage. For example, the piezoelectric effect can lead to an accumulation of internal voltage within the MLCC 600, causing it to rupture. The regions with negligible capacitance R-NC of the paired additional electrodes 680 also reduce the internal voltage.

[0045] According to one possible implementation, the numerous parallel plate-shaped inner electrodes 610, 620, 630 form a stack of inner electrodes in a second direction 664 perpendicular to the first direction 662. According to another possible implementation, the numerous parallel plate-shaped inner electrodes 610, 620, 630 are separated from one another by a dielectric 670. The dielectric layers between all electrodes are of equal size in the second direction, for example, substantially equal. According to another possible implementation, at least one of the parallel plate-shaped inner electrodes 610, 620, 630 comprises plate sections that are electrically isolated from one another in the first direction by at least one gap, as shown, for example, in the MLCC 500.

[0046] In various implementations, the MLCC 400 and the MLCC 500 are not limited to a specific number of groups or sets of internal electrodes, or to a specific number of internal electrodes in each group or set. For example, the first and second groups of internal electrodes can comprise a plurality of first groups of internal electrodes and a plurality of second groups of internal electrodes. The set of at least two third internal electrodes can comprise a plurality of sets of at least two third internal electrodes. Each set of at least two third internal electrodes can be positioned between each respective first group of internal electrodes and each respective second group of internal electrodes.In another example, each group comprises a plurality of first inner electrodes stacked with a plurality of second inner electrodes, with at least one first inner electrode alternating with at least one second inner electrode.

[0047] In another example, an MCLL comprises a plurality of groups of internal electrodes. Each group of internal electrodes includes the first group of internal electrodes, the second group of internal electrodes, and at least one further group of internal electrodes. The at least one further group of internal electrodes may include at least a fourth internal electrode and a separate, adjacent at least fifth internal electrode stacked with the fourth internal electrode in a second direction perpendicular to the first direction. Furthermore, exemplary exemplary forms of implementation

[0048] According to a first additional example embodiment, a multilayer ceramic capacitor comprises: a dielectric body; first and second conductive connections, such as external electrodes, which are separated from each other by the dielectric body; parallel-plate first inner electrodes embedded in the dielectric body, wherein at least one first gap in each first inner electrode forms first plate sections that are electrically insulated from each other; parallel-plate second inner electrodes embedded in the dielectric body, wherein at least one second gap in each second inner electrode forms second plate sections that are electrically insulated from each other; wherein the at least one second gap is offset from the at least one first gap in a first longitudinal direction extending between the first and the second conductive terminal, wherein the second plate sections overlap with the at least one first gap and the first plate sections overlap with the at least one second gap; a first group of electrodes comprising a first set of first inner electrodes and a second set of second inner electrodes, wherein each first inner electrode of the first set of first inner electrodes is separated from each second inner electrode of the second set of second inner electrodes by a dielectric; a second group of electrodes comprising a third set of first inner electrodes and a fourth set of second inner electrodes, wherein each first inner electrode of the third set of first inner electrodes is separated from each second inner electrode of the fourth set of second inner electrodes by a dielectric; and a fifth set, for example the set of third inner electrodes of the first inner electrodes, which are separated from each other by a dielectric, where the fifth set of first inner electrodes is located between the first group of electrodes and the second group of electrodes.

[0049] In one possible implementation, in the first group and the second group, a specific first inner electrode is separated from a specific second inner electrode by a dielectric.

[0050] In an implementation of the multilayer ceramic capacitor of the first additional exemplary embodiment, a first plate section of the first inner electrodes overlaps with the at least one second gap and a second plate section of the second inner electrodes overlaps with the at least one first gap in a lateral direction perpendicular to the first direction.

[0051] In one implementation of the multilayer ceramic capacitor of the first exemplary embodiment, sections of the first plate segments overlap with sections of the second plate segments in the respective first and second groups of electrodes to form capacitance regions. Sections of the first plate segments that overlap with other sections of the first plate segments in the fifth group form a region with negligible capacitance.

[0052] In an implementation of the multilayer ceramic capacitor of the first exemplary embodiment, wherein the fifth set of first inner electrodes is located between the first group of electrodes and the second group of electrodes in a second direction perpendicular to the first direction, and wherein the fifth set of first inner electrodes are parallel to each other and separated from each other in the second direction.

[0053] In an implementation of the multilayer ceramic capacitor of the first exemplary embodiment, wherein at least one first plate section comprises a floating electrode which is electrically isolated from other first plate sections in the first direction by first slits on each side of the floating electrode.

[0054] In one implementation, the multilayer ceramic capacitor of the first exemplary embodiment further comprises: a third group of electrodes comprising first inner electrodes alternating with second inner electrodes; a fourth group of electrodes comprising first inner electrodes alternating in parallel with second inner electrodes; and a sixth set of second inner electrodes separated from each other by a dielectric, wherein the sixth set of second inner electrodes is arranged between the third group of electrodes and the fourth group of electrodes, and the sixth set of second inner electrodes forms regions with negligible capacitance.

[0055] The number of paired electrodes with negligible capacitance is unlimited. For example, there can be repeating groups of electrodes with capacitance ranges and repeating sets of electrodes with regions of negligible capacitance between them. Different numbers of electrodes are possible in the groups and sets. Furthermore, different patterns of groups and sets are also possible.

[0056] In one implementation of the multilayer ceramic capacitor of the first exemplary embodiment, each first inner electrode of the first set of first inner electrodes is adjacent to and parallel to each second inner electrode of the second set of second inner electrodes and separated from it, and each first inner electrode of the first set of first inner electrodes is separated from each second inner electrode of the second set of second inner electrodes by a single dielectric layer.

[0057] In an implementation of the multilayer ceramic capacitor of the first exemplary embodiment, wherein the interaction between the plate sections of the first and second inner electrodes exhibits a piezoelectric effect with a corresponding internal voltage in the multilayer ceramic capacitor, and wherein the fifth set of first inner electrodes reduces the corresponding internal voltage.

[0058] According to a second additional example embodiment, a multilayer ceramic capacitor comprises: a dielectric body; first and second conductive connections, for example external electrodes, which are separated from each other by the dielectric body; parallel-plate first inner electrodes embedded in the dielectric body, wherein a first gap in each first inner electrode forms first plate sections that are electrically insulated from each other; parallel-plate second inner electrodes in the form of parallel plates embedded in the dielectric body, wherein a second gap in each second inner electrode forms second plate sections that are electrically insulated from each other; wherein the second gap is offset in a first longitudinal direction between the first and the second conductive terminal from the first gap, wherein a second plate section of the second plate sections overlaps the first gap and a first plate section of the first plate sections overlaps the second gap; Capacity areas between sections of the second plate sections that overlap the sections of the first plate sections; a first group of inner electrodes comprising a first set of first inner electrodes and a second set of second inner electrodes stacked in a second direction perpendicular to the first direction; a second group of inner electrodes comprising a third set of the first inner electrodes and a fourth set of the second inner electrodes stacked in the second direction; and a set of parallel third inner electrodes embedded in the dielectric body, wherein at least one third gap in each third inner electrode forms third plate sections that are electrically insulated from each other, at least two third inner electrodes that lie next to each other and form regions with negligible capacitance, where the set of third internal electrodes lies between the first and second group of internal electrodes.

[0059] In an implementation of the multilayer ceramic capacitor of the second additional example embodiment, wherein the first gap comprises a plurality of first gaps in the first inner electrodes and the second gap comprises a plurality of second gaps in the second inner electrodes.

[0060] Features of the first and second additional example embodiments can be incorporated into any and / or all other disclosed embodiments.

[0061] Although this disclosure presents specific embodiments, it is obvious that experts in the field will be able to devise many alternatives, modifications, and variations. For example, various components of the embodiments can be exchanged, added, or replaced in the other embodiments. Furthermore, not all elements of each figure are necessary for the operation of the disclosed embodiments. For instance, an expert in the field of the disclosed embodiments would be able to create and utilize the teachings of the disclosure simply by using the elements of the independent claims. Accordingly, the embodiments of the disclosure set forth herein are to be understood as illustrative and not as limiting. Various modifications can be made without departing from the spirit and scope of the disclosure.

[0062] In this document, relational terms such as "first," "second," and the like may be used solely to distinguish one entity or action from another, without necessarily requiring or implying any actual relationship or order between those entities or actions. The expressions "at least one of," "at least one selected from the group of," or "at least one selected from," followed by a list, are defined to mean one, some, or all, but not necessarily all, of the items in the list.The terms “comprises,” “comprehensive,” “including,” or other variations thereof are intended to cover non-exclusive inclusion, such that a procedure, method, article, or apparatus comprising a list of elements may include not only those elements but also other elements not expressly listed or inherent in that procedure, method, article, or apparatus. An element preceded by “a,” “an,” or similar prefix does not, without further restrictions, preclude the existence of additional identical elements in the procedure, method, article, or apparatus comprising the element. Furthermore, the term “another” is defined as at least one second or more. The terms “including,” “with,” and similar prefixes, as used herein, are defined as “comprehensive.”Approximation terms such as "approximately," "close," "essentially," and / or other related terms are, unless otherwise defined, defined as a range within + / - 5% of the approximate element, a range within + / - 10% of the approximate element, and / or a range close enough to the approximate element to achieve an intended result. All elements of the disclosed embodiments may be modified by such terms. Furthermore, the background section is not recognized as prior art but corresponds to the inventor's understanding of the context of some embodiments at the time of filing and includes the inventor's own knowledge of any problems with existing technologies and / or problems encountered in the inventor's own work.

Claims

[1] Multilayer ceramic capacitor comprising: a dielectric body; first and second conductive terminals, separated from each other by the dielectric body; a multitude of parallel plate-shaped internal electrodes forming a stack of electrode layers embedded in the dielectric body; first and second groups of inner electrodes from the plurality of parallel plate inner electrodes, each group comprising a first inner electrode and a separate, adjacent second inner electrode, wherein a first gap of the first inner electrode is offset relative to a second gap of the separate, adjacent second inner electrode in a first direction between the first and the second conductive terminal, wherein a section of the first inner electrode overlaps a section of the second inner electrode to form capacitance regions in each group of inner electrodes; and a set of at least two third inner electrodes from the plurality of parallel plate inner electrodes arranged between the first and second group of inner electrodes, wherein at least two third inner electrodes are stacked next to each other and form a region with negligible capacitance. [2] Multilayer ceramic capacitor according to claim 1, wherein the first inner electrodes have a different voltage potential than the second inner electrodes and where the third inner electrodes have the same voltage potential. [3] Multilayer ceramic capacitor according to claim 2, wherein the third inner electrodes have the same voltage potential as the first inner electrodes. [4] Multilayer ceramic capacitor according to claim 1, wherein the third inner electrodes in the set of at least two third inner electrodes each comprise a gap which overlaps with a gap of the other third inner electrode in the first direction to form overlapping plate sections with the areas of negligible capacitance in between. [5] Multilayer ceramic capacitor according to claim 4, wherein the gap of the third inner electrode overlaps with the gap of the first inner electrode. [6] Multilayer ceramic capacitor according to claim 1, wherein the interaction between the first and second inner electrodes, which are stacked in adjacent layers, exhibits a piezoelectric effect with a corresponding internal voltage in the multilayer ceramic capacitor, and where stacked third inner electrodes reduce the corresponding internal voltage. [7] Multilayer ceramic capacitor according to claim 1, wherein a plurality of parallel plate inner electrodes form a stack of inner electrodes in a second direction perpendicular to the first direction. [8] Multilayer ceramic capacitor according to claim 1, wherein each inner electrode of the plurality of parallel plate inner electrodes is separated from each other by a dielectric layer. [9] Multilayer ceramic capacitor according to claim 1, wherein at least one of the parallel plate inner electrodes comprises plate sections which are electrically isolated from each other by at least one gap in the first direction. [10] Multilayer ceramic capacitor according to claim 1, wherein the first and second groups of internal electrodes comprise a plurality of first groups of internal electrodes and a plurality of second groups of internal electrodes, and wherein the set of at least two third inner electrodes comprises a plurality of sets of at least two third inner electrodes, wherein each set of at least two third inner electrodes is arranged between each respective first group of inner electrodes and each respective second group of inner electrodes. [11] Multilayer ceramic capacitor according to claim 1, wherein each group comprises a plurality of first inner electrodes stacked with a plurality of second inner electrodes in a second direction perpendicular to the first direction, wherein at least one first inner electrode alternates with at least one second inner electrode in the second direction. [12] Multilayer ceramic capacitor according to claim 1, further comprising a plurality of groups of internal electrodes, comprising: the first group of internal electrodes, the second group of internal electrodes and at least one further group of internal electrodes. [13] Multilayer ceramic capacitor according to claim 12, wherein the at least one further group of inner electrodes comprises at least a fourth inner electrode and a separate, adjacent at least fifth inner electrode, which is stacked with the fourth inner electrode in a second direction perpendicular to the first direction. [14] Multilayer ceramic capacitor comprising: a dielectric body; first and second conductive terminals, separated from each other by the dielectric body; a plurality of parallel plate inner electrodes forming a stack of electrode layers embedded in the dielectric body, each of the parallel plate inner electrodes comprising plate sections electrically isolated from each other by at least one gap; first and second group of inner electrodes of the plurality of parallel plate inner electrodes, wherein a first gap in a first inner electrode is offset relative to a second gap in a separate adjacent second inner electrode in each group, wherein sections of the plate segments of the first inner electrode overlap with sections of the plate segments of the second inner electrode to form capacitance regions in each group of inner electrodes; and a set of at least two third inner electrodes of the plurality of parallel plate inner electrodes, wherein the set of at least two third inner electrodes is arranged between the first and the second group of inner electrodes, wherein at least two third inner electrodes are stacked next to each other and form regions with negligible capacitance. [15] Multilayer ceramic capacitor according to claim 14, wherein the first inner electrodes have a different polarity than the second inner electrodes and the third inner electrodes have the same polarity to each other. [16] Multilayer ceramic capacitor according to claim 15, wherein the third inner electrodes have the same polarity as the first inner electrodes. [17] Multilayer ceramic capacitor according to claim 14, wherein the third inner electrodes in the set of at least two third inner electrodes each comprise a gap which overlaps with a gap of the other third inner electrode to form overlapping plate sections with the areas between them whose capacitance is negligible. [18] Multilayer ceramic capacitor according to claim 14, wherein first inner electrodes alternate with immediately adjacent second inner electrodes of the first and second group of inner electrodes. [19] Multilayer ceramic capacitor according to claim 14, wherein the interaction between the plate sections of the first and second inner electrodes, which are stacked in adjacent layers, exhibits a piezoelectric effect with a corresponding internal voltage in the multilayer ceramic capacitor, and where stacked third inner electrodes reduce the corresponding internal voltage. [20] Multilayer ceramic capacitor comprising: a dielectric body; first and second conductive terminals, separated from each other by the dielectric body; parallel-plate first inner electrodes embedded in the dielectric body, wherein at least one first gap in each first inner electrode forms first plate sections that are electrically insulated from each other; parallel-plate second inner electrodes embedded in the dielectric body, wherein at least one second gap in each second inner electrode forms second plate sections that are electrically insulated from each other; wherein the at least one second slit is offset from the at least one first slit in a first direction extending between the first and the second conductive terminal, wherein the second plate sections overlap the at least one first slit and the first plate sections overlap the at least one second slit; a first group of electrodes comprising a first set of first inner electrodes and a second set of second inner electrodes, wherein each first inner electrode of the first set of first inner electrodes is separated from each second inner electrode of the second set of second inner electrodes by a dielectric; a second group of electrodes comprising a third set of first inner electrodes and a fourth set of second inner electrodes, wherein each first inner electrode of the third set of first inner electrodes is separated from each second inner electrode of the fourth set of second inner electrodes by a dielectric; and a fifth set of the first inner electrodes, separated from each other by a dielectric, wherein the fifth set of first inner electrodes is arranged between the first group of electrodes and the second group of electrodes.

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