ROBUSTNESS TEST PROCEDURE, ROBUSTNESS TEST CIRCUIT, ROBUSTNESS TEST APPARATUS

Description

[0001] The invention relates to a robustness test method, a robustness test circuit, and a robustness test device.

[0002] Generally, methods are known for testing a motor vehicle or a component of a motor vehicle (e.g., a control unit). This can be done, for example, on a test bench.

[0003] Such procedures can be internationally standardized, such as in ISO 26262.

[0004] Furthermore, from the published patent application DE 10 2009 034 242 A1, a method for testing a control unit of a vehicle is known, wherein a rule is provided which is suitable for determining whether the control unit is operating properly only as a function of an output signal of the control unit.

[0005] From the published patent application DE 103 42 909 A1, a simulator for at least one control unit software module is known, which has a first interface to the simulator for a first identification of a sequence control and a second interface to the simulator for a second identification of a communication of the at least one control unit software module, wherein the simulator simulates the at least one control unit software module depending on data from at least one data source and the first and second identification.

[0006] The published patent application DE 10 2017 111 455 A1 describes a method for testing a machine controlled by a control unit, wherein an adjustment device is connected between the control unit and the machine, wherein a fault is simulated and wherein a reaction of the machine and the control device to the simulated fault is tested.

[0007] However, these known methods do not send any test data that corrupts at least one bit.

[0008] Furthermore, a method for testing the susceptibility of an electronic control unit to failure is known from the published patent application DE 10 2007 042 016 A1.

[0009] The published patent application US 2005 / 0262402 A1 describes a system for randomly distributing error patterns.

[0010] Furthermore, the patent US 5,910,907 describes an apparatus and a method for generating a k-bit pseudorandom number.

[0011] The object of the present invention is to provide a robustness test method, a robustness test circuit, and a robustness test device which at least partially overcome the above-mentioned disadvantages.

[0012] This object is achieved by the robustness test method according to the invention according to claim 1, by the robustness test circuit according to the invention according to claim 7 and by the robustness test device according to the invention according to claim 8.

[0013] Further advantageous embodiments of the invention emerge from the subclaims and the following description of preferred embodiments of the present invention.

[0014] As already discussed, methods for robustness testing, e.g. of a control unit, are known.

[0015] However, it has been recognized that standardized procedures may not cover all possible scenarios that could cause a failure in or through an ECU (or in a vehicle component in general). Thus, despite successfully passing (known) tests, field failures of motor vehicles (or their components) may occur.

[0016] The reason for this may be that such procedures are designed based on requirements and provide for a limited number of scenarios.

[0017] Therefore, it was recognized that it is desirable to increase the number of test scenarios and, in particular, to cover them completely.

[0018] It was recognized that this enables systematic, complete robustness testing by applying white noise to sensor values ​​that provide sensor data for a component of a motor vehicle to be tested and dividing the white noise (or pseudorandom values) into excitation sequences.

[0019] Therefore, some embodiments relate to a robustness test method for a motor vehicle, comprising: sending test data for a component of the motor vehicle to be tested such that at least one bit of a specified bit sequence of the component to be tested is corrupted.

[0020] The robustness test procedure can be carried out, for example, on a test bench, etc., but generally in a situation where it may be important that a vehicle component is to be tested for functionality, for example when it is exposed to different situations.

[0021] Furthermore, a robustness test method according to the invention can be implemented in a software test environment such as SIL (Software-in-the-Loop), in a virtual control unit, etc. Furthermore, the present invention is not limited to vehicles, as it can also be applied in aircraft construction, wind power, medical technology, and the like.

[0022] In a robustness test method according to the invention, test data for a component to be tested can be sent.

[0023] In this context, a component to be tested can be any control unit (or several control units) which is configured, for example, to detect a fault (or error) based on sensor data.

[0024] The component to be tested can be controlled via an external interface of a control unit, however, the present invention is not limited to such a case. For example, an internal signal, an electronic (internal) component, can also be controlled, for example, using a tracer and / or debugger.

[0025] This makes it advantageous to introduce and test an error in a targeted manner.

[0026] In addition, a component to be tested may include a central on-board computer, a security system, and the like.

[0027] In this context, the test data can, for example, simulate sensor data or be applied to sensor data so that the sensor data is changed on a bit level (compared to a normal case).

[0028] In this case, a bit sequence can be defined which is (typically) sent from the sensor to the control unit or which is relevant for the control unit (without limiting the present invention to this, since any bit sequence, even one that is not relevant per se, can be defined), in which at least one bit is falsified (or changed with respect to a normal state) in such a way that, for example, an error in the sensor's measurement can be simulated. It is also possible for the falsification to simulate a specific environmental situation (e.g., a specific air pressure, an oil pressure (of an engine), a lighting condition, and the like), without the environmental situation having to be predetermined or known in advance.

[0029] Rather, an advantage of the present invention is that the environmental influence that led to the error or malfunction can be determined from the detected fault or error that the control unit outputs.

[0030] Furthermore, the method according to the invention can advantageously reduce the number of field failures (of a vehicle or the component to be tested) and advantageously increase user satisfaction.

[0031] In some embodiments, the robustness testing method further comprises: determining the bit sequence based on a pseudorandom polynomial sequence.

[0032] According to the invention, the pseudorandom polynomial sequence is complete.

[0033] Thus, any combination and any division of the bit sequence into subsequences can advantageously be considered.

[0034] For example, the polynomial can come from a polynomial group 2 n < -1, which is typically complete. This means that every subset (subsequence) can also be complete. This has the advantage that a search space for bit sequences completely encompasses all possible bit sequences, allowing every excitation scenario for a system of bit sequences under test to be fully simulated.

[0035] The search space can also be limited by (at least) one system boundary of the component to be tested, so that the polynomials from the polynomial group can advantageously be mapped to the system boundaries.

[0036] Furthermore, a given bit sequence can be further subdivided using the polynomials to simulate a new excitation scenario. This can advantageously simulate a time delay (as described below).

[0037] Furthermore, it is advantageous that reproducibility is achieved, since pseudorandomness allows for a systematic approach.

[0038] A stimulus can be calculated from the polynomial sequence, ie which bits of the bit sequence should be corrupted or affected.

[0039] Here, the bit sequence determined from the polynomial sequence (at least one) can be divided into subsequences (or at least one subsequence can be determined from the polynomial sequence), whereby each subsequence (or each bit of the subsequence) can represent an excitation (or corruption) of the bit sequence, so that an excitation mapping between the polynomial sequence and the bit sequence can take place.

[0040] Therefore, in some embodiments, the pseudorandom polynomial sequence comprises a complete set of subsequences that define a search space for the specified bit sequence.

[0041] In some embodiments, the complete series of subsequences is indicative of a time delay of sending the test data.

[0042] For example, an error or fault may not occur when sensor events (e.g. measurements) occur simultaneously, whereas it may occur when the sensor events occur consecutively.

[0043] This allows a time dimension to be advantageously included in the robustness test, thereby expanding the possibilities for robustness testing.

[0044] In some embodiments, the pseudorandom polynomial sequence is based on a generator polynomial.

[0045] As is well known, a generator polynomial can be based on a feedback polynomial, which defines a class of polynomials coupled with exclusive or exclusive-or operations (XOR).

[0046] Advantageously, a generator polynomial is typically complete. Furthermore, a generator polynomial can be used to generate (white) noise, which advantageously allows for the calculation of additional excitation scenarios.

[0047] In some embodiments, the robustness test method further comprises: applying a noise signal to the component of the motor vehicle to be tested.

[0048] The noise signal can be generated using a generator polynomial, as discussed, but the present invention is not limited thereto.

[0049] In some embodiments, the transmission of the test data is based on a motor vehicle condition.

[0050] The motor vehicle state can, for example, be an activation state of a specific part of the motor vehicle (e.g. engine, specific control unit, and the like) or a combination of parts of the motor vehicle (e.g. simultaneous activation of an air conditioning control unit and an engine), whereby all possible parts of the motor vehicle can also be activated (or deactivated).

[0051] The vehicle state can also be simulated by falsifying at least one bit.

[0052] This allows several robustness tests to be carried out advantageously.

[0053] In some embodiments, the component to be tested comprises at least one of a sensor, a control unit, a safety system, and an on-board computer.

[0054] A sensor may, for example, be provided for monitoring or enabling a motor vehicle function, a motor vehicle condition, and the like.

[0055] For example, the sensor may include a distance sensor (e.g., radar, lidar), a temperature sensor, a tire pressure sensor, a rain sensor, a light sensor, a safety sensor (e.g., airbag sensor), and the like.

[0056] As is well known, an error message can be generated based on a measured sensor value.

[0057] The control unit may include any control unit in the motor vehicle, such as an airbag control unit, an infotainment control unit, a climate control unit, a door lock control unit, an engine control unit, and a distance control unit, and the like.

[0058] The safety system may include, for example, an alarm system, an automatic distance control, an emergency shutdown function, and the like.

[0059] Some embodiments relate to a robustness test circuit which is configured to carry out a robustness test method according to the invention.

[0060] The robustness test circuit may include a processor (e.g., a CPU (Central Processing Unit), GPU (Graphic Processing Unit)), an FPGA (Field Programmable Gate Array), a computer, a server, and the like. Generally, a combination of several of the aforementioned elements may also be provided as a robustness test circuit according to the invention (e.g., two CPUs and an FPGA).

[0061] The robustness test circuit can be included in a robustness test device according to the invention.

[0062] Therefore, some embodiments relate to a robustness test device comprising a robustness test circuit according to the invention.

[0063] The robustness test device can, for example, comprise one (or more) computers and the like, and can be connected to a motor vehicle via an interface. The robustness test device can also be present in a mobile device, so that a robustness test method according to the invention can advantageously also be carried out outside of a test bench, a factory, and the like (e.g., field testing).

[0064] The interface can be any known interface, e.g. a bus (e.g. CAN (Controller Area Network), MIPI (Mobile Industry Processor Interface), USB (Universal Serial Bus), a network interface (e.g. LAN (Local Area Network), WLAN (Wireless LAN)), a sensor-specific interface, and the like.

[0065] Embodiments of the invention will now be described by way of example and with reference to the accompanying drawings, in which: Fig. 1schematically shows an embodiment of a robustness test method according to the invention in a block diagram; Fig. 2 schematically shows an embodiment of a robustness test circuit according to the invention and a robustness test device according to the invention in a block diagram; and Fig. 3 schematically shows a further embodiment of a robustness test method according to the invention in a flow chart.

[0066] An embodiment of a robustness test method 1 according to the invention is shown in Fig. 1 shown in a block diagram.

[0067] In 2, test data for a component of a motor vehicle to be tested is transmitted such that at least one bit of a specified bit sequence of the component to be tested is corrupted, as described herein.

[0068] In particular, in this embodiment, a steering system 10 of a motor vehicle 11 is tested, as in Fig. 2For this purpose, the method according to the invention is implemented in such a way that various bit sequences are first identified which are representative of various sensor values ​​of the steering system.

[0069] In Fig. 2 such bit sequences A k , A k-1 , A k-2 , and A k-3 are shown in the steering system 10, where A k represents an excitation of a steering torque, A k-1 a link angular velocity, A k-2 a Flexray sensor value, and A k-2 a voltage.

[0070] In addition, Fig. 2 a robustness test circuit 12 according to the invention of a robustness test device 13 according to the invention is shown.

[0071] In this exemplary embodiment, the robustness test circuit 12 is a CPU, and the robustness test device 13 is a computer connected to the steering system 10 via a USB interface (not shown). For this purpose, the motor vehicle 11 also has a USB interface (not shown).

[0072] However, the present invention is not limited to a USB interface, since any conceivable interface can be considered, such as Ethernet, serial, CAN FD (Controller Area Network with Flexible Data-Rate), Flexray, CAN (Controller Area Network), debug / trace interface, and the like, whereby several (different or identical) interfaces can also be considered simultaneously.

[0073] The robustness test circuit 12 first identifies the aforementioned bit sequences. The robustness test circuit 12 then determines at least one position of at least one of the bit sequences A k - A k-3 according to a generator polynomial as described herein and corrupts it by applying white noise.

[0074] In this embodiment, for example, the bit sequence A k is assigned a value of seven, which means that three bits of the bit sequence are corrupted, or, in other words, that the stimulus specified by the bit sequence A k is excited. If a bit sequence is assigned the value zero, no excitation or corruption occurs.

[0075] Fig. 3 shows a further embodiment of a robustness test method 20 according to the invention in a flow chart.

[0076] In 21, a test system (such as the steering system 10 described above, or, as described herein, a component to be tested) is initialized. Relevant bit sequences are also identified during this process.

[0077] In 22 a polynomial value is loaded and / or calculated.

[0078] In 23 a stimulus is determined from the polynomial value.

[0079] In 24, the calculated stimulus is applied to at least one bit sequence of the test system (ie, test data is sent as described herein).

[0080] In 25 a response from the test system is read out.

[0081] In 26 it is determined whether the applied stimulus has caused an error in the test system.

[0082] If an error has been generated, 27 determines whether the error is deleted or whether it remains for the rest of the test.

[0083] At step 28, whether a predetermined number of test cycles has been reached, both if no error has been generated and if an error has been generated, is determined. If the predetermined number of test cycles has not been reached (step 29), a new cycle is initiated starting at step 22 (since the test system is already initialized). If the predetermined number of test cycles has been reached, the method ends at step 30.

[0084] The present invention has been described herein in connection with a motor vehicle by way of example. However, the present invention is not intended to be limited to a motor vehicle. In general, a method according to the invention can be used in any technical environment in which an error can be generated based on sensor data, such as in the aviation industry, medical technology, aviation, the wind power industry, shipbuilding, the electrical industry, and the like. List of reference symbols

[0085] 1Robustness test procedure 2Sending test data 10Steering system 11Motor vehicle 12Robustness test circuit 13Robustness test device 20Robustness test procedure 21Initializing test system 22Loading / calculating polynomial value 23Determining stimulus from polynomial value 24Applying stimulus to bit sequence 25Reading response 26Determining whether error was generated 27Determining whether error is cleared 28Determining whether predetermined number of test cycles reached 29Predetermined number of test cycles not reached 30End of procedure

Claims

1. Robustness test method (1; 20) for a motor vehicle, comprising: transmitting (2) test data for a motor vehicle component to be tested such that at least one bit of a specified bit sequence of the component to be tested is corrupted; and specifying the bit sequence (Ak, Ak-1, Ak-2, Ak-3) based on a pseudorandom polynomial sequence, characterized in that the pseudorandom polynomial sequence has a complete series of subsequences which define a search space for the specified bit sequence.

2. Robustness test method (1; 20) according to claim 1, wherein the complete series of subsequences is indicative of a time delay of the transmission of the test data.

3. Robustness test method (1; 20) according to claim 1 or 2, wherein the pseudorandom polynomial sequence is based on a generator polynomial.

4. Robustness test method (1; 20) according to any of the preceding claims, further comprising: applying (24) a noise signal to the motor vehicle component to be tested.

5. Robustness test method (1; 20) according to any of the preceding claims, wherein the transmission of the test data is based on a motor vehicle condition.

6. Robustness test method (1; 20) according to any of the preceding claims, wherein the component to be tested comprises at least one of a sensor, a control unit, a safety system, and an on-board computer.

7. Robustness test circuit (12) comprising a CPU which is set up to carry out a robustness test method (1; 20) according to any of the preceding claims.

8. Robustness test device (13) comprising a computer which comprises a robustness test circuit (12) according to claim 7.