GENERATIVE MODEL FOR THE INVERSE DESIGN OF MATERIALS, DEVICES AND STRUCTURES

DE602022012261T2Active Publication Date: 2025-03-26MITSUBISHI ELECTRIC CORP
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Patent Information

Application Number
DE602022012261
Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
Priority Date
2021-05-03
Filing Date
2022-02-02
Publication Date
2025-03-26
Estimated Expiration
2042-02-02

AI Technical Summary

Technical Problem

Current methods for designing materials and devices face challenges in optimizing multiple parameters simultaneously due to time-consuming simulations and experiments, and existing inverse neural networks are limited in handling complex optimization problems, often resulting in narrower bandwidth and semi-optimized results.

Method used

A Conditional Variational Autoencoder (CVAE) system with adversarial censoring and active learning is developed to generate device designs, utilizing a network structure with two encoders, two decoders, and two adversarial blocks to efficiently optimize device parameters, enabling the generation of devices with arbitrary splitting ratios and improved performance across a broad bandwidth.

Benefits of technology

The CVAE system significantly reduces design time by instantly generating devices with high transmission efficiency (around 93%) across a broad bandwidth, outperforming conventional methods like Direct Binary Search, and allows for compact, ultra-wide bandwidth operation, making it suitable for optical communication chips.

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Description

[Technical Field]

[0001] The invention generally related to method and system for training a device design network for use conditional variational autoencoder to randomly generate materials, device, or structural designs.[Background Art]

[0002] In many areas of materials, devices, and structures, designing is a challenge because tens, hundreds, or even more parameters need to be optimized simultaneously, and each simulation or experiment to verify the updated chracteristics for new parameter sets takes a long time. So efficient optimization methods are desired.

[0003] Inverse design of optical devices using deep neural network for regression in forward or inverse directions have been done before. (Tahersima et al., Scientific Reports). Once the inverse model is fully trained, it can theoretically generate the design parameters for us. However, the previous inverse neural network model is for optimizing the binary structrue (such as 0 or 1), which reduce the dimension of the actual optimization problem. This may bring up some limiations such as narrower bandwidth and semi optimized result which requires to be further optmized. There is a neeed to construct a better generative model to be used for more sophisticated optimization problems.

[0004] Yingheng Tang et. al.: "Generative Deep Learning Model for a Multi-level Nano-Optic Broadband Power Splitter", ArXiv.org, 8 March 2020, proposes a Conditional Variational Autoencoder (CVAE) model, enhanced with adversarial censoring and active learning, for the generation of 550 nm broad bandwidth (1250 nm to 1800 nm) power splitters with arbitrary splitting ratio.

[0005] KOJIMA KEISUKE ET AL: "Deep Neural Networks for Inverse Design of Nanophotonic Devices", JOURNAL OF LIGHTWAVE TECHNOLOGY, IEEE, USA, vol. 39, no. 4, 8 January 2021 (2021-01-08), pages 1010-1019,ISSN: 0733-8724, DOI: 10.1109 / JLT.2021.3050083 [retrieved on 2021-02-04] describes using deep learning for designing photonic devices, including nanostructured photonics.[Summary of Invention]

[0006] The scope of the invention is defined by the appended claims.

[0007] The presently disclosed embodiments will be further explained with reference to the attached drawings. The drawings shown are not necessarily to scale, with emphasis instead generally being placed upon illustrating the principles of the presently disclosed embodiments.[Brief Description of Drawings]

[0008] [Fig. 1] FIG. 1 shows the overall configuration of system, according to embodiments of the present invention. [Fig. 2] FIG. 2 shows the general adversarial CVAE network, according to embodiments of the present invention. [Fig. 3] FIG. 3 shows the detailed structure of the CVAE encoder block, according to embodiments of the present invention. [Fig. 4] FIG. 4 shows the detailed structure of the CVAE decoder block, according to embodiments of the present invention. [Fig. 5] FIG. 5 shows the detailed structure of the adversarial block, according to embodiments of the present invention. [Fig. 6] FIG. 6 shows the flowchart of the training process for the model, according to embodiments of the present invention. [Fig. 7] FIG. 7 shows the input data preprocess steps, according to embodiments of the present invention. [Fig. 8] FIG. 8 shows the detailed data flow through the CVAE model, according to embodiments of the present invention. [Fig. 9] FIG. 9 shows the active learning process for generating the final model, according to embodiments of the present invention. [Fig. 10] FIG. 10 shows the flowchart of the mapping algorithm of drawing the layout, according to embodiments of the present invention. [Fig. 11a] FIG. 11a shows overall device structure introduction, according to embodiments of the present invention. [Fig. 11b] FIG. 11b shows overall device cross section structure, according to embodiments of the present invention. [Fig. 11c] FIG. 11c shows mode profile at the device cross section, according to embodiments of the present invention. [Fig. 12a] FIG.12a shows the generated device with the splitting ratio of 5:5, according to embodiments of the present invention. [Fig. 12b] FIG. 12b shows the simulation result for the generated 5:5 splitter, according to embodiments of the present invention. [Fig. 12c] FIG. 12c shows the simulation result for the generated 5:5 splitter, according to embodiments of the present invention. [Fig. 12d] FIG. 12d shows the simulation result for the generated 5:5 splitter, according to embodiments of the present invention. [Fig. 13a] FIG.13a shows the generated device with the splitting ratio of 6:4, according to embodiments of the present invention. [Fig. 13b] FIG. 13b shows the simulation result for the generated 6:4 splitter, according to embodiments of the present invention. [Fig. 13c] FIG. 13c shows the simulation result for the generated 5:5 splitter, according to embodiments of the present invention. [Fig. 13d] FIG. 13d shows the simulation result for the generated 5:5 splitter, according to embodiments of the present invention. [Fig. 14a] FIG. 14a shows the generated device with the splitting ratio of 7:3, according to embodiments of the present invention. [Fig. 14b] FIG. 14b shows the simulation result for the generated 7:3 splitter, according to embodiments of the present invention. [Fig. 14c] FIG. 14c shows the simulation result for the generated 5:5 splitter, according to embodiments of the present invention. [Fig. 14d] FIG. 14d shows the simulation result for the generated 5:5 splitter, according to embodiments of the present invention. [Fig. 15a] FIG. 15a shows the generated device with the splitting ratio of 8:2, according to embodiments of the present invention. [Fig. 15b] FIG. 15b shows the simulation result for the generated 8:2 splitter, according to embodiments of the present invention. [Fig. 15c] FIG. 15c shows the simulation result for the generated 5:5 splitter, according to embodiments of the present invention. [Fig. 15d] FIG. 15d shows the simulation result for the generated 5:5 splitter, according to embodiments of the present invention. [Fig. 16] FIG. 16 shows the data process procedure before feeding into decoder #2, according to embodiments of the present invention. [Fig. 17] Fig. 17 shows the properties of transmission loss of optical fibers as a function of wavelengths. [Description of Embodiments]

[0009] Furthermore, embodiments of the subject matter disclosed may be implemented, at least in part, either manually or automatically. Manual or automatic implementations may be executed, or at least assisted, through the use of machines, hardware, software, firmware, middleware, microcode, hardware description languages, or any combination thereof. When implemented in software, firmware, middleware or microcode, the program code or code segments to perform the necessary tasks may be stored in a machine readable medium. A processor(s) may perform the necessary tasks.

[0010] Fig. 1 is the general structure of the system 100 including a neural network modules trained to provide a layout of a device. The system 100 includes an interface 115, a processor 120, a storage 104, a memory 106. The storage 104 includes a device generating module 200 that includes encoder network modules 301 and 301', decoder network modules 401 and 401' and adversarial module (blocks) 501 and 501'. The storage 104 may include a mapping algorithm 108 configured to generate a layout of an actual device 109, or the mapping algorithm 108 may be stored into another memory (not shown). The interface 115 is configured to communicate between the memory 106, the storage 104, the processor 120 and the mapping algorithm 108. The interface 115 is also configured to receive input data including a user-desired transmission information 101 and a Gaussian distribution 102 via an input device outside the system 100. In some cases, the user-desired transmission information 101 and Gaussian distribution 102 may be stored into the memory 106 or the storage 104. The desired transmission information (101) and the standard Gaussian distribution (102) are fed to the encoder and decoder neural network modules 301, 301', 401 and 401' via an interface. The neural network modules 301, 301', 401, 401', 501 and 501' are pretrained, such that the system 100 can generate the corresponding hole vector pattern (107) of the device. The system 100 applies the mapping algorithm (1000), to draw / generate a layout of the actual device. Such network has been verified under a square based splitter model (1100) as one of embodiments of the present invention. Although the following embodiments of the present invention exemplary show the square based splitter model, it should be noted that the shape of the splitter (model) is not limited to a square. For instance, other shapes including rectangular, circular, oval, symmetry shapes, asymmetry shapes or an arbitrary shape that includes any of them may be used. In this case, such a splitter is configured to include an input port configured to receive an input beam having an input power, a power splitter including perturbation segments arranged in a first region and a second region of a guide material having a first refractive index, each segment having a second refractive index, wherein the first region is configured to split the input beam into a first beam and a second beam, wherein and the second region is configured to separately guide the first and second beams, wherein the first refractive index is greater than the second refractive index, and output ports including first and second output ports connected the power splitter to respectively receive and transmit the first and second beams.

[0011] Once the neural network modules are fully trained, the system can generate the splitter with any arbitrary splitting ratio the users want instantly. Some results using the system 100 indicate that those devices have the overall transmission at around 93% across a very broadband, which is really hard (in terms of time and efficiency) to get by using conventional methods such as Direct Binary Search (DBS). Comparing with a previous result obtained by our previous system that is not part of the present invention and only includes the encoder network module-1 301, decoder network module-1 401 and the adversarial module-1 501 for training process, but does not include the encoder network module-2 301', decoder network module-2 401' adversarial module-2 501', the results according to the present invention show a significant improvement from our previous system.

[0012] Fig. 2 shows the overall structure of the neural network model (device generating module) 200. The model 200 is constructed with six parts: two encoders (301, 301'), two decoders (401, 401') and two adversarial blocks (501, 501') (as shown in the figure 1). Encoder #1 and #2 (30) have the same structure and share the same weighs. Decoder #1 and #2 (401) have the same structure and share the same weights. Same standard applies to the adversarial blocks (501) as well. The encoder #1 (301) is configured to extract the input pattern features (801) and represent it using probability distribution which is defined as latent variable (806). The decoder #1 (401) has the similar structure to the encoder #1 (301) but in a reverse order. The decoder #1 is configured to generate the device pattern with the latent variable and the encoded condition (807). For the second decoder-encoder set: The decoder #2 (401') takes the standard Gaussian samples along with the encoded condition (801) to generate a second output patter (811) which will be used later in the loss function. The encoder #2 (301) then takes the second output pattern (811) to generate the second latent variable set (506). Output pattern #2 and Latent Variable #2 are only used for the training (to calculate the loss function). For the final model, we will use the trained decoder (401).

[0013] Fig. 3 shows the detailed structure of the encoders 301, 301', in which the encoders 301 and 301' have an identical structure. The encoder 301 is constructed by two convolutional layers (303 & 304), (one has 8 channel the second one has 16 channel), followed by two parallel Multilayer Perceptron (MLP) layer (304 & 305). Each of the two parallel MLP layers may be parallel fully connected layers. In some cases, each of the two parallel MLP layers includes more than two inputs. For instance, the two parallel MLP layers are configured to have 800 -> 60 input -> output dimensions, to generate the extracted pattern (mean (µ) and covariance (σ) for the Gaussian distribution). In order to get the latent variable, the re-parametrization (306) of the mean and the covariance needs to be applied. The equation of the re-parameterization is shown below in Equation 1: Latent Variable = μ + e σ 2 ∗ N , where the N is the random number which obey the standard Gaussian distribution (with mean of 0 and covariance of 1).

[0014] Fig. 4 shows the detailed structure of the decoders 401 and 401', in which the decoders have an identical structure. The latent variable from the encoder (806) and the encoded condition data (807) are concatenated to form the input for the decoder (808). Then the combined data are fed into the decoder to generate the pattern. The decoder is combined with one Multilayer perceptron (MLP) layer (402) and two convolutional layers (403 & 404). The MLP layer has the input -> output dimension of 69 -> 800. In some cases, each of the two convolutional layers may be designed to have more than 2 channels. For instance, the two convolutional layers have the following specs: first one (403) has 8 channel the second one (404) has 16 channels. The output of second convolutional layer is the generated (or reconstructed) pattern (107). The final model used to generate different devices.

[0015] Fig. 5 shows the detailed structure of the adversarial blocks 501 and 501', in which the adversarial blocks have an identical structure. The adversarial block 501 has two MLP layers (502 & 503) (the first one has 60 -> 100 input -> output dimensions and the second one has 100 -> 60 input -> output dimension). The output of the adversarial block is the adversarial condition (504). We add the adversarial block to isolate the latent variable from the conditions in order to fit the device distribution better.

[0016] Fig. 6 shows the detailed training process for the conditional Variational Autoencoder (CVAE) model 600 according to some embodiments of the present invention. First the data (input pattern and input condition) are taken from the dataset (601), then we process them into two channel input (301) and fed into the network. The process step is shown in 700. The complete training iteration include two part. Update the CVAE network (602) and update the adversarial block (606). The first loss function, Loss1 is calculated (603) after the process described above. In the meanwhile, the second loss function Loss 3 (Equation 4) is calculated after the second process: the random Gaussian sampling data (809) is later processed (1800) and then fed into the decoder encoder block (400) to get the second latent variable (506). The final loss will be the sum of the two loss functions (Loss1 and Loss3) and it will be used to update the encoder and decoder blocks (604). The second loss function (Loss 2) is calculated (607) after every three updates of the encoders and decoders. It is used to update the adversarial blocks only (608) (shown in Equation 3). Loss 1 = − y n logx n + 1 − y n log 1 − x n + 1 2 ∑ j = 1 J 1 + log σ zj 2 2 − μ zj 2 − σ zj 2 − βMSE _ LOSS s s ¯ Loss 2 = MSE _ LOSS s s ¯ + MSE _ LOSS s , s ¯ ′ Loss 3 = MSE _ LOSS z z ¯ − αMSE _ LOSS s , s ¯ ′ Where, MSE _ LOSS x y = x − y 2

[0017] For Loss1, the first portion is the Binary cross entropy loss, the second part is the KL divergence loss and the third part is the Mean Square Error multiplied by a constant β to reach a training balance between the first adversarial block and the main model (encoder #1 - decoder #1). For Loss3 (third loss function), the first term is the MSE loss between the normal gaussian sampling variable (809) and the second latent variable (506). The second term is the Mean Square Error multiplied by a constant α to reach a training balance between the second adversarial block and the main model (decoder #2 -encoder #2). For Loss2, the loss function is the MSE loss between s and s̅, and that between s and s̅'. The network update in phase 1 is based on Loss1 and Loss3. By update the weight in the encoders and the decoders, we want to minimize Binary Cross Entropy Loss between the input (702) and the output pattern (107). We also want to minimize the MSE loss between the Standard Gaussian samples (809) and the latent variable #2 (812) In the meantime, the difference between the condition (701) and the two adversarial conditions (505) (506) needs to be maximized so that the encoder only extracted the pattern of the input pattern. The network update in phase 2 is based on Loss2. In this phase, only the encoder blocks and the adversarial blocks are used and only the weight parameters in the adversarial blocks is updated (608). Here the loss is the MSE Loss between the between the condition (701) and the adversarial conditions (505), (506). By updating the adversarial blocks, we want to minimize the MES loss to form an adversarial relation between the two blocks. In order to achieve the balance between the two phases, Phase 1 updates three times while Phase 2 updates once. In order to do that, we introduce a variable n with initial value of 0. Every time the CVAE block is finished update (604), we check the n value (605). If n is smaller than 3, we add 1 to n and go back to step. If the n is 3, we feed data to update the adversarial blocks (606) and rest n to 0 (through 609). In other words, the first loss function may be expressed by combination of the binary crossentropy (BCE) Loss of between the input (801) and output (107) of the first encoder decoder set and the Kullback-Leibler Divergence (KL-Divergence) between the encoded latent (806) and the standard Gaussian Distribution and the encoded latent (806) and the output of the fist adversarial block (505). Further, the second loss function may be expressed by combination of Mean Square Root Loss (Mean Squared Error Loss: MSE Loss) between the encoded latent (806) and the output from the first adversarial block (505) and the MSE loss between the condition between the encoded latent (812) and the output from the second adversarial block (813), and the third loss function may be expressed by combination of the MSE Loss between the standard gaussian samples (810) and the second latent variables (812) and the MSE loss between the encoded laten (812) and the output of the adversarial block (813).

[0018] Fig. 7 shows the details to process the input data. The input data fed into the network (please express by a specific name of the network) (ACVAE with cycle consistency) are constructed by two channels (two 20x20 matrix) (801), the first one is the 20x20 input pattern (702) and the second is the decoded (3x20) input condition (701).

[0019] Fig. 8 shows the dataflow 800 within the network according to some embodiments of the present invention. The input pattern data (702) and the input condition data (803) forms a 2-channel input into the CVAE encoder (301). The encoder #1 then generates the latent variable #1 with dimension of 60. Then the latent variable is concatenated with the encoded condition (807) (with dimension of 9) to form the input to the decoder #1(808). After being processed by the decoder #1, the generated (or reconstructed) pattern #1 (107) is the output. In the meanwhile, the encoded condition is concatenated with Random gaussian sampling (809) through (1700) and is fed into decoder #2 to get the output pattern #2 (811). Then output pattern #2 will be the input of encoder #2 to get the latent variable #2.

[0020] In order to fully train the Neural network model 200 (if number is wrong, please express by a specific name of the network) (ACVAE with cycle consistency). We used the concept of active learning. Fig. 9 shows the flowchart of that process. What we are doing is to train a preliminary use the original 15,000 binary training data. After finishing the first model. We use it to generate 1,000 devices with different holes sizes and label them with their spectrum at each port (condition) through the FDTD simulation. After that, we combine the new generated data along with the existing data to form a new 16,000 dataset and retrain the model. Then the second model is the final one that is used for the device generation.

[0021] Fig. 10 shows a mapping algorithm 1,000 for drawing a layout of the actual device. The CVAE generated pattern (generated hole vector 107) is a 20x20 floating point matrix. Each point represents the Bernoulli distribution for each position point. So, the final generated patterns use the variable size instead of binary data to better represent the hole pattern and each floating number in the matrix will be treated as differential hole diameters. For instance, the maximum diameter of the hole may be 76.5 nm. For easier fabrication, a threshold 0.3 may be set to eliminate any holes that have the diameter below ( 90 ∗ 0.85 ∗ 0.3 nm) in step (1004). Once the matrix is generated and retrieved (1001), the mapping algorithm 1000 is configured to create two indexes i and j to sweep through the entire matrix (starting from i=j=0). Then the algorithm 1000 goes to the element in the matrix A ij (1002) and check if the value is smaller than 0.3 (1003), if it is smaller, then no holes will be created. Otherwise, a hole with the diameter of: 90 ∗ 0.85 ∗ A ij nm will be created on the layout of the device. We will first do the column sweeping (1005) then the row sweeping (1006) to finish the complete process. Once the sweep is done, the final layout will be the output (109).

[0022] Figs. 11a-11c show an optical device 110 obtained by using the system 100 according to some embodiments of the present invention. The optical device 110 is a square based optical power splitter. The mechanism of splitting the power (of an optical beam) is to draw different holes and use the difference in the refractive index to guide the light propagation. The device 110 is designed for TE0 mode use. The square structure has footprint of 2.5 um x 2.5 um with the oxide cladding. The waveguide has a width of 500 nm and the height of 220 nm. The hole spacing is 130 nm, and the minimum and maximum hole diameter are 76.5 nm, and 42 nm, respectively.

[0023] The power splitter 110 is formed of nanostructured segments that are arranged in the guide material to effectively guide the input optical beam along predesigned beam paths toward the output ports. In this case, the nanostructured segments are the nanostructured hole that have a refractive index being less than that of the guide material of the power splitter. The Waveguide of the power splitter 110 is Silicon and the material of the nanostructured hole is Silicon Dioxide (SiO 2 ).

[0024] Fig. 12a, Fig. 13a, Fig. 14a and Fig. 15a show schematics illustrating the power splitters with different splitting ratios (5:5, 6:4, 7:3, and 8:2) that are generated by the fully trained model. As shown in the figures, the splitters include an input port configured to receive an input beam having an input power, a power splitter including perturbation segments arranged in a first region and a second region of a guide material having a first refractive index, each segment having a second refractive index, wherein the first region is configured to split the input beam into a first beam and a second beam, wherein and the second region is configured to separately guide the first and second beams, wherein the first refractive index is greater than the second refractive index, and output ports including first and second output ports connected the power splitter to respectively receive and transmit the first and second beams.

[0025] Fig. 12b, Fig. 13b, Fig. 14b and Fig. 15b show the beam propagation through the devices. We consider the total power at port 1 and port 2 is 100%. The 5:5 splitter meaning port 1 holds 50% of the total output power and the port 2 holds 50% of the total output power. The 6:4 splitter meaning port 1 holds 60% of the total output power and the port 2 holds 40% of the total output power. The 7:3 splitter meaning port 1 holds 70% of the total output power and the port 2 holds 30% of the total output power. The 8:2 splitter meaning port 1 holds 80% of the total output power and the port 2 holds 20% of the total output power.

[0026] Figs. 12c-12d, Figs. 13c-13d, Figs. 14c-14d and Figs. 15c-15d show the spectrum response of those devices. The devices that are generated through our Adversarial Conditional Autoencoder have very good performance (with around 90% in total transmission) across the 550 nm bandwidth (from 1250 nm to 1800 nm).

[0027] Fig. 16 shows a computer-implemented method 1600 for designing a device according to some embodiments of the present invention. The method 1600 includes the data process procedure of the input condition 701 (input data / parameters) before feeding into decoder #2. The Random Gaussian sampling variables (809) is concatenated with the encoded condition (807) to form a 3x24 matrix(1601) and it will be fed into decoder #2 (301).

[0028] According to some embodiments of the present invention, there are the following advantages with respect to the device generated from the model.The devices can be manufactured in very compact sizes. For instance, the footprint can be only 2.25 um x 2.25 um or less, which is the smallest splitter according to our knowledge. With such compact size, it has the potential to be massively integrated in optical communication chips with relatively low area budget.

[0029] The devices designed according to embodiments of the present invention can operate on an ultra-wide bandwidth (from 1250 nm to 1800 nm) while maintaining an excellent performance (around 90% transmission). Accordingly, the devices can cover all the optical communication band (From O band to L band corresponding to wavelengths ranging from 1260 nm to 1625 nm). See Fig. 17. The figure indicates the properties of transmission loss of optical fibers as a function of wavelengths.

[0030] The model has been proved to generate any devices that the user wants instantly without further optimization, which significantly saves the designing time.

Claims

1. A system (100) including neural network modules trainable to provide a layout of a nanophotonic device (110) with periodic holes, to be manufactured, wherein the device has a desired transmission efficiency, and wherein the layout comprises a hole vector pattern, the system comprising: an interface (115) configured to acquire input data of a device, wherein the input data comprises user-desired transmission information (101) given as a condition, and a Gaussian distribution (102); a memory (106) to store the neural network modules including a first encoder neural network module (301) and a second (301') encoder neural network module, a first decoder neural network module (401) and a second (401') decoder neural network module, and first (501) and second (501') adversarial block neural network modules, wherein the first and second encoder neural network modules have the same structure and share the same weights, the first and second decoder neural network modules have the same structure and share the same weights, and the first and second adversarial block neural network modules have the same structure and share the same weights; wherein the first encoder neural network module is configured to receive an input pattern and a decoded input condition generated from the input condition, extract the input pattern features and represent it using a first latent variable (806), the first decoder neural network module is configured to generate a first output pattern (107) using as an input the first latent variable concatenated with an encoded condition generated from the input condition, the second decoder neural network module is configured to generate a second output pattern (811) using standard Gaussian samples concatenated with the encoded condition, the second encoder neural network module is configured to generate a second latent variable (812) using the second output pattern, the first adversarial block neural network module is configured to output a first adversarial condition (505) based on the first latent variable, and the second adversarial block neural network module is configured to output a second adversarial condition (813) based on the second latent variable, wherein the second output pattern and the second latent variable are only used for training; and a processor (120), in connection with the memory, configured to: train the neural network modules using training data including an input pattern, wherein the input pattern is a hole vector pattern, and an input condition, wherein the input condition is a transmission efficiency; update the weights in the first and second encoder neural network modules and the first and second decoder neural network modules based on a sum of a first loss function and a third loss function to reduce a difference between the input pattern and output pattern of the first and second decoder neural network modules; update the weights in the first and second adversarial block neural network modules by minimizing a second loss function, wherein the second loss function is expressed by combination of the MSE Loss between the first latent variable and the output from the first adversarial block and the MSE loss between the second latent variable and the output from the second adversarial block: and generate the layout of the nanophotonic device with periodic holes using the second decoder by feeding into the second decoder the standard Gaussian samples concatenated with an encoded condition generated from the input condition of the input data to generate the hole vector pattern; wherein: the first loss function is expressed by combination of a binary cross entropy Loss between the input pattern of the first encoder neural network model and the output pattern of the first decoder neural network module and the Kullback-Leibler Divergence between the first latent variable and the Gaussian Distribution and the first latent variable and the output of the first adversarial block neural network module; and the third loss function is expressed by combination of a MSE Loss between the standard Gaussian samples and the second latent variable and the MSE loss between the second latent variable and the output of the second adversarial block neural network module.

2. The system (100) of claim 1, wherein the first (301) and second (301') encoder neural network modules are constructed by at least one convolutional layer followed by at least one parallel fully connected layer to extract features of a layout of the device (110).

3. The system (100) of claim 2, wherein each of the at least one convolutional layer includes more than two channels.

4. The system (100) of claim 2, wherein each of the at least one parallel fully connected layer includes two input / output dimensions.

5. The system (100) of claim 1, wherein the device is an optical power splitter, wherein the extracted pattern features are mean (µ) and covariance (σ) for the Gaussian distribution (102).

6. The system (100) of claim 1, wherein the device (110) is a power splitter, or a wavelength splitter, or a mode converter.

7. The system (100) of claim 1, wherein the training data comprises of device structures optimized by an adjoint method.

8. The system (100) of claim 3, wherein the two convolutional layers include 8 channels and 16 channels, respectively.

9. The system (100) of claim 4, wherein each of the two parallel fully connected layer include 800 input / output dimensions and 60 input / output dimensions, respectively.

10. A computer-implemented training method for training neural network modules of a system (100) including neural network modules trainable to provide a layout of a nanophotonic device (110) with periodic holes , to be manufactured, having a desired transmission efficiency, wherein the layout comprises a hole vector pattern, wherein the neural network modules include a first encoder neural network module (301) and a second (301') encoder neural network module, a first decoder neural network module (401) and a second (401') decoder neural network module, and first (501) and second (501') adversarial block neural network modules, and wherein the method comprising steps of: train the neural network modules using training data including an input pattern, wherein the input pattern is a hole vector pattern, and an input condition, wherein the input condition is a transmission efficiency ; update the weights in the first (301) and second (301') encoder neural network modules and first (401) and second (401') decoder neural network modules based on the sum of a first loss function and a third loss function to reduce a difference between the input pattern and output pattern of the first and second decoder neural network modules; and update the weights in the first (501) and second (501') adversarial block neural network modules by minimizing a second loss function, wherein the second loss function is expressed by combination of the MSE Loss between the first latent variable and the output from the first adversarial block and the MSE loss between the second latent variable and the output from the second adversarial block; wherein the first and second encoder neural network modules have the same structure and share the same weights, the first and second decoder neural network modules have the same structure and share the same weights, and the first and second adversarial block neural network modules have the same structure and share the same weights; wherein the first encoder neural network module is configured to receive an input pattern and a decoded input condition generated from the input condition, extract the input pattern features and represent it using a first latent variable (806), the first decoder neural network module is configured to generate a first output pattern (107) using as an input the first latent variable concatenated with an encoded condition generated from the input condition, the second decoder neural network module is configured to generate a second output pattern (811) using standard Gaussian samples and concatenated with encoded condition, the second encoder neural network module is configured to generate a second latent variable (812) using the second output pattern, the first adversarial block neural network module is configured to output a first adversarial condition (505) based on the first latent variable, and the second adversarial block neural network module is configured to output a second adversarial condition (813) based on the second latent variable, wherein the second output pattern and the second latent variable are only used for training; and wherein: the first loss function is expressed by combination of a binary cross entropy Loss between the input of the first encoder neural network model and the output of the first decoder neural network module and the Kullback-Leibler Divergence between the first latent variable and the Gaussian Distribution and the first latent variable and the output of the first adversarial block neural network module; the third loss function is expressed by combination of a MSE Loss between the standard Gaussian samples and the second latent variable and the MSE loss between the second latent variable and the output of the second adversarial block neural network module; and wherein the trained system is configured to generate the layout of the nanophotonic device with periodic holes from input data comprising user-desired transmission information given as a condition and a Gaussian distribution using the second decoder by feeding into the second decoder the standard Gaussian samples concatenated with an encoded condition generated from an input condition to generate the hole vector pattern.

11. The method of claim 10, wherein the first (301) and second (301') encoder neural network modules are constructed by at least one convolutional layer followed by at least one parallel fully connected layer to extract features of a layout of the device (110).

12. The method of claim 11, wherein each of the at least one convolutional layer includes more than two channels.

13. The method of claim 11, wherein each of the at least one parallel fully connected layer includes two input / output dimensions.

14. The method of claim 10, wherein the first loss function is expressed by combination of BCE Loss of between the input and output of the first encoder (301) and decoder (401) neural network module set and the KL-Divergence between the encoded latent, the standard Gaussian Distribution (102), the encoded latent and the output of the first adversarial block neural network module (501), wherein the second loss function is expressed by combination of Mean Square Root Loss (MSE Loss) between the encoded latent and the output (505) from the first adversarial block neural network module and the MSE loss between the condition between the encoded latent and the output (813) from the second adversarial block neural network module (501'), wherein the third loss function is expressed by combination of the MSE Loss between the standard gaussian samples and the second latent variables (812), and the MSE loss between the encoded latent and the output of the adversarial block neural network module.

15. A computer-implemented method for generating a layout of a nanophotonic device (110) with periodic holes , to be manufactured, having a desired transmission efficiency, wherein the layout comprises a hole vector pattern, using a system including neural network modules trainable to provide the layout of the nanophotonic device , the method comprising steps: training the neural network modules of the system using the method of claim 10: acquiring input data of the device via an interface (115), wherein the input data comprises user-desired transmission information (101) given as a condition, and a Gaussian distribution (102); generating the layout of the nanophotonic device with periodic holes using the second decoder by feeding into the second decoder the standard Gaussian samples concatenated with an encoded condition generated from the input condition to generate the hole vector pattern and storing the layout data into a memory (106).