Integration of a device on a read-out matrix

Abstract

The invention relates to an optoelectronic device comprising: - at least one pixel comprising • an absorption layer made of a first material and arranged on a first face of a first substrate, the absorption layer being intended to convert an incident ray into electric charges; • a lower electrode for collecting the electric charges; • and an upper electrode arranged on the absorption layer; - a read-out circuit arranged on a second substrate and comprising at least one read-out electrode dedicated to the pixel. The first substrate comprises at least one via starting from a second face of the first substrate opposite the first face, said via being electrically connected to the lower electrode and also to at least one hybridization connector for electrically and mechanically coupling the pixel to the read-out electrode dedicated to said pixel.

Description

[0001] DESCRIPTION Title of the invention: Integration of a device on a reading matrix

[0001] The invention relates to hybrid systems, i.e. systems consisting of two separate parts assembled by an assembly layer, each part being made of a different material. These systems can be optical, electronic or optoelectronic depending on the characteristics of the assembled parts. The invention particularly relates to the integration of at least one photodetector structure based on a photoconductive material on a matrix of pixels so as to form an imaging device.

[0002] Hybrid systems allow two functionalities made from different materials to be combined. For example: - a detector, in which the sensitive part is associated with a reading circuit for collecting and processing the signal to be detected, - a display, for example of the electroluminescent type, in which the emitting part is associated with a circuit for generating electrical signals suitable for emission.

[0003] More particularly, the technical field concerned is the production of optoelectronic hybrid systems, comprising: a photo-conversion part based on at least one photosensitive element making it possible to generate electric charge carriers from incident photons; and an electronic part consisting of a reading circuit mounted totally or partially on a substrate and making it possible to individually read the signal of each pixel of the photo-conversion part. In general, the photo-conversion part comprises an absorption layer confined between two electrodes. The absorption layer converts the flux of incident photons with a wavelength ^ into negative charge carriers "electrons" in the conduction band and positive charges "holes" in the valence band.The materials used to make the absorption layer and the thickness of the absorption layer determine the frequency and amount of radiation absorbed.

[0004] Optoelectronic devices for the direct detection of ionizing radiation (X-rays) require absorption layers with larger lateral dimensions (width, length) than other optical detection devices. Conventional materials used to make absorption layers in this field are either not compatible with these large dimensions and reasonable manufacturing costs (monocrystalline CdTe or Zn-doped monocrystalline CdTe for example), or are limited in absorption for the high energies required for radiography (amorphous selenium for example).

[0005] In this context, semiconductor materials with a perovskite-type crystalline structure present emerging solutions for the realization of absorption and photo-conversion structures in optoelectronic devices. This type of material allows the realization of absorption layers with lateral dimensions greater than 10 cm while maintaining photo-conversion performances comparable to those of conventional materials. However, the coupling of a photo-conversion part based on an absorption layer having a perovskite-type crystalline structure with the electronic part presents several technical problems arising from the mechanical, chemical and thermal specificities related to perovskites.In the context of the description of the invention, coupling is understood to mean the set of specific operations and techniques for combining two parts having different functions (for example, the reading circuit and the photodetector matrix). In the context of the description of the invention, the term "perovskite layer" is understood to mean a layer made of a material having a crystalline structure of the perovskite type or related to perovskites. In the context of the invention, the perovskites used may be 0D perovskites, 1D perovskites, 2D perovskites, 3D perovskites, or a mixture of these different perovskites.

[0006] A 0D perovskite is a crystalline perovskite material with a zero-dimensional nanoscale structure. This means that the atoms in the crystal structure are uniformly arranged in a nanoscale configuration. 0D perovskites are often referred to as nanoparticles, nanocrystals, or nanocomposites.

[0007] A 1D perovskite is a crystalline perovskite material with a one-dimensional linear structure. This means that the atoms in the crystal structure are arranged uniformly along a single direction. 1D perovskites can take the form of nanowires, nanotubes, or nanofibers.

[0008] A 2D perovskite is a crystalline perovskite material with a two-dimensional planar structure. This means that the atoms in the crystal structure are arranged uniformly on a flat surface. 2D perovskites can take the form of ultrathin sheets or membranes.

[0009] A 3D perovskite is a crystalline perovskite material with a three-dimensional structure. This means that the atoms in the crystal structure are arranged uniformly in three-dimensional space. 3D perovskites can take the form of bulk crystals or crystalline powders.

[0010] The integration of a thick layer with a perovskite-type crystalline structure on a substrate, particularly the electronic part in a hybrid system, presents several technical constraints. Indeed, there is currently no coupling technology that can be industrialized in large dimensions, at a competitive cost, and which allows the integration of this type of material in a hybrid system without degrading the mechanical, and / or optical and / or electronic characteristics of the hybrid system.

[0011] Generally speaking, two types of conventional integration techniques are used to assemble a photoconductive layer on a readout matrix: "direct" integration and "indirect" integration (or hybridization). "Direct" integration consists of directly depositing an absorption layer on the readout circuit. Direct integration in this case induces several technological issues. For example, the high thermal budget required for the deposition of a perovskite absorption layer by vacuum or fused deposition induces a reduction in the robustness of the electronic components of the readout circuit (transistors, metal tracks, etc.). In addition, the temperatures applied during deposition generate a differential thermal expansion between the absorption layer and the substrate of the electronic part of the optoelectronic device.This leads to a weakening of the mechanical structure of the absorption layer and adhesion problems at the interfaces of said layer. In addition, direct deposition can cause chemical reactivity problems between the metal tracks of the reading circuit and the deposited perovskite absorption layer. Thus, direct integration is not the preferred solution for the integration of a perovskite-based photodetector structure on a reading circuit.

[0012] Indirect integration (or hybridization) consists of producing the electronic part and the photo-conversion part separately and subsequently assembling them using hybridization means (also called coupling techniques). The hybridization of an optoelectronic system involves the following interdependent technological issues: - the assembly of the photo-conversion part and the electronic part mechanically without affecting the optoelectronic and / or electrical performance of the hybrid device. - the interconnection consisting of the creation of an electrical interconnection architecture between each of the pixels of the reading matrix and the opposite detector device.

[0013] Thus, the present invention proposes an indirect integration technique making it possible to solve the problems linked to the coupling of a thick perovskite layer on a reading circuit. The presentation of the invention, detailed in the remainder of the description, on the basis of a perovskite layer is given for illustrative purposes and is not limiting. The invention extends to materials other than perovskites such as cadmium telluride (CdTe), cadmium telluride doped with zinc (CZT), amorphous selenium (Se), lead oxide (PbO), mercury iodide (HgI2) and lead iodide (PbI2). These materials can be in monocrystalline and / or polycrystalline form.

[0014] To better understand the problem raised by the invention, we will begin by describing the structure of a radiation detection device manufactured by hybridization according to the state of the art. For this, we take the case of a perovskite hybridized on a matrix of pixels manufactured on a CMOS circuit.

[0015] Figure 1 illustrates a partial cross-sectional view of a state-of-the-art optoelectronic hybrid system having an optoelectronic part comprising a perovskite absorption layer.

[0016] The optoelectronic device D0 illustrated in Figure 1 is an ionizing radiation detector. It consists of a photo-conversion part D0_opt comprising at least one pixel Pxl0 and an electronic part D0_elec comprising a reading circuit ROIC and a plurality of reading electrodes EL_lect connected to a reading circuit ROIC.

[0017] The ROIC readout integrated circuit is made using at least one transistor and thin layers of conductive, semiconductor or dielectric materials using CMOS (Complementary Metal-Oxide-Semiconductor) technology on a sub2 substrate. For each pixel Pxl0, a readout electrode EL_lect is associated to read the signals generated by the photo charge carriers generated by the photodetector structure of a pixel Pxl0.

[0018] Concerning the photo-conversion part of the device, it comprises for each pixel an absorption and photo-conversion layer CA common to all pixels, an upper electrode EL2 common to all pixels, and a lower electrode EL1 to collect the generated charges. In the case of the architecture described in Figure 1, the hybridization is carried out for each pixel by means of a CEM metal ball which electrically connects the reading electrode EL_lect to the lower electrode EL1 associated exclusively with the same pixel. The CEM ball is for example, achievable with Indium balls or copper micro-pillars allowing each pixel to have an individualized contact with the reading circuit ROIC.

[0019] In the case of a perovskite absorption layer deposited over a large area, the perovskite surface on which the EL1 lower electrodes are deposited is rough. In addition, this surface is not perfectly flat because the surface condition of the thick perovskite layers is difficult to control during manufacturing. In addition, the manufacturing of conductive EL1 lower electrodes, at a small matrix pitch (~50-200µm), on large areas and on perovskite materials that are chemically sensitive to the resins, solvents and etching agents used in photolithography, is very difficult. For these reasons, it is on the one hand difficult to envisage depositing the EL1 lower electrodes on the perovskite surface and on the other hand difficult to carry out the hybridization step as described previously, on the perovskite surface due to chemical, topological, thermal and mechanical constraints.These problems related to the condition of the surface on which the lower electrodes EL1 (roughness, non-uniform flatness) limit the spatial resolution of the detector because the spacing between the lower electrodes EL1 is no longer controlled.

[0020] Thus, we have demonstrated that the state-of-the-art technical solutions for pixelation, assembly and interconnection methods on a readout circuit are not optimal for an optoelectronic system based on a perovskite absorption layer. The same problems related to chemical, thermal and mechanical incompatibility are also present in the following photodetection materials: cadmium telluride (CdTe), zinc-doped cadmium telluride (CZT), amorphous selenium (Se), lead oxide (PbO), mercury iodide (HgI2) and lead iodide (PbI2). These materials can be in mono- and / or polycrystalline form.

[0021] The scientific publication "High-sensitivity high-resolution X-ray imaging with soft-sintered metal halide perovskites" by "Deumel et al" describes a process for manufacturing perovskite pellets by compacting powder at low temperature. The described process includes an assembly layer manufactured by liquefying a MAPbI3 powder. The disadvantage of the described solution is that the composition of the assembly layer used impacts the optoelectronic performance of the absorption layer. The nature, morphology, and contact surface with the substrate of the assembly layer modify the optoelectronic characteristic of the detector as a whole. In addition, the MAPbI3 liquefaction operation is not well controlled, which makes this process incompatible with industrial-scale production and the large surface areas targeted for detectors.Several problems arise relating to the too rapid drying of the liquefied layer and the lack of material linked to the evacuation of the solvent during the drying stage.

[0022] To overcome the limitations of existing solutions regarding the hybridization of an optoelectronic device comprising at least one photodetector structure connected to a single reading electrode of a reading circuit, the invention proposes several embodiments of an architecture of an assembled hybrid system. More particularly, the invention proposes an integration mode by indirect coupling adapted to the constraints of integration of thick absorption photodetector layers used for direct detectors for ionizing radiation.

[0023] The device according to the invention is based on the fabrication of a thick absorption photodetector layer on a first substrate compatible with the fabrication conditions of said layer. The photodetector layer is made of perovskite or cadmium telluride (CdTe) or cadmium telluride doped with zinc (CZT), or amorphous selenium (Se), or lead oxide (PbO), or mercury iodide (HgI2) or lead iodide (PbI2). The first substrate according to the invention makes it possible to ensure mechanical assembly and electrical continuity between the electronic part and the photoconversion part.

[0024] The invention makes it possible to decorrelate the manufacturing constraints of the absorption layer and the mechanical, thermal, chemical and electrical constraints linked to the materials and hybridization processes on the reading circuit and its substrate.

[0025] Furthermore, the invention makes it possible to use a substrate for the growth (or deposition) of the thick absorption layer with suitable properties (mechanical, thermal, chemical, electrical) to facilitate the direct deposition of said layer.

[0026] The invention also makes it possible to overcome the problems of chemical compatibility, surface condition, flatness, and roughness of the thick absorption layers encountered in hybridization solutions according to the state of the art. This also offers the possibility of reducing the lateral distance separating the lower electrodes and thus reducing the pixelation pitch so as to increase the resolution of the detector.

[0027] More generally, the use of indirect integration according to the invention is considered advantageous from an industrial point of view because it makes it possible to dissociate certain critical steps linked to the manufacturing technology of the reading circuit, from the steps for manufacturing the photodetector structure (EL1, CA, EL2). Each of these two technological bricks can be manufactured, characterized and tested separately before assembly.

[0028] The subject of the invention is an optoelectronic device comprising: - at least one pixel comprising: o an absorption layer made of a first material and arranged on a first face of a first substrate, the absorption layer being intended to convert an incident ray into electrical charges; o a lower electrode for collecting the electrical charges; o and an upper electrode arranged on the absorption layer; - a reading circuit arranged on a second substrate and comprising at least one reading electrode dedicated to the pixel; the first substrate comprising at least one via starting from a second face of the first substrate opposite said first face; said via being electrically connected on the one hand to the lower electrode and on the other hand to at least one hybridization connector for electrically and mechanically coupling the pixel to the reading electrode dedicated to said pixel.

[0029] According to a particular aspect of the invention, the first material is a perovskite or cadmium telluride or cadmium telluride doped with zinc or amorphous selenium or lead oxide or mercury iodide or lead iodide.

[0030] According to a particular aspect of the invention, the via opens from the second face of the first substrate to the first face of the first substrate.

[0031] According to a particular aspect of the invention, the pixel further comprises for each via an electrically conductive upper interface layer deposited on the first face of the first substrate; the upper interface layer being confined between the end of the associated via and a volume of the absorption layer.

[0032] According to a particular aspect of the invention, at least the via and / or the upper interface layer constitutes a blocking layer to a predetermined type of charge carriers.

[0033] According to a particular aspect of the invention, the pixel further comprises for each via an electrically conductive lower interface layer deposited on the second face of the first substrate; the lower interface layer being in contact with the lower end of the associated via.

[0034] According to a particular aspect of the invention, the width of the lower interface layer is less than the separation distance between two adjacent reading electrodes.

[0035] According to a particular aspect of the invention, the via is filled with a second electrically conductive material.

[0036] According to a particular aspect of the invention, the internal walls of the via are covered by a second electrically conductive material.

[0037] According to a particular aspect of the invention, the via is filled with a dielectric material.

[0038] According to a particular aspect of the invention, the assembly formed by the upper interface layer, the via and the lower interface layer, forms a capacitive element capable of storing the generated electrical charges.

[0039] According to a particular aspect of the invention, the via is filled by a stack comprising a dielectric material confined between two electrically conductive materials so as to form a capacitive element in the via capable of storing the generated electrical charges.

[0040] According to a particular aspect of the invention, the via does not open onto the first face of the first substrate from the second face of the first substrate. The first substrate being made of a dielectric or semiconducting material; the via being conductive.

[0041] According to a particular aspect of the invention, the first substrate has a crystalline structure in lattice agreement with that of the first material.

[0042] According to a particular aspect of the invention, the first substrate is opaque to wavelengths in the visible range and / or to X-rays or gamma rays.

[0043] According to a particular aspect of the invention, the first material is CsPbBr3 perovskite.

[0044] The invention also relates to a matrix image sensor comprising an optoelectronic device according to the invention.

[0045] Other features and advantages of the present invention will become more apparent upon reading the following description in relation to the following appended drawings.

[0046] [Fig.1] Figure 1 illustrates a cross-sectional view of an example of hybridization of an optoelectronic device according to the state of the art. This figure has already been described.

[0047] [Fig.2a] Figure 2a illustrates a sectional view of an example of hybridization of an optoelectronic device according to a first embodiment of the invention.

[0048] [Fig.2b] Figure 2b illustrates a sectional view of an example of hybridization of an optoelectronic device according to a second embodiment of the invention.

[0049] [Fig.2c] Figure 2c illustrates a sectional view of an example of hybridization of an optoelectronic device according to a third embodiment of the invention.

[0050] [Fig.2d] Figure 2d illustrates a sectional view of an example of hybridization of an optoelectronic device according to a fourth embodiment of the invention.

[0051] [Fig.2e] Figure 2e illustrates a sectional view of an example of hybridization of an optoelectronic device according to a fifth embodiment of the invention.

[0052] [Fig.3] Figure 3 illustrates a sectional view of an example of hybridization of an optoelectronic device according to a sixth embodiment of the invention.

[0053] [Fig.4] Figure 4 illustrates a sectional view of an example of hybridization of an optoelectronic device according to a seventh embodiment of the invention.

[0054] [Fig.5] Figure 5 illustrates a sectional view of an example of hybridization of an optoelectronic device according to an eighth embodiment of the invention.

[0055] [Fig.6] Figure 6 illustrates the steps of a method of manufacturing an optoelectronic device according to the invention.

[0056] Figure 2a illustrates a sectional view of an example of hybridization of an optoelectronic device D1 according to a first embodiment of the invention. The optoelectronic device D1 is intended to detect ionizing radiation, as an illustrative example. We emphasize that the various characteristics of the invention are not limited to the application described and remain compatible with all hybrid devices requiring the assembly of a layer to the electronic part of said hybrid device.

[0057] The optoelectronic device D1 comprises a photo-conversion part D1_opt based on at least one pixel Pxl for generating electric charge carriers from incident photons; and an electronic part D1_elec consisting of a reading circuit ROIC comprising a plurality of reading electrodes EL_lect for individually reading the signal of each pixel Pxl of the photo-conversion part.

[0058] The ROIC reading circuit consists of a transistor-based processing chain implemented entirely on the second substrate sub2. Alternatively, the ROIC reading circuit is partially implemented on the second substrate sub2; for example, only the selection transistors associated with each pixel are implemented on the second substrate sub2. The electrical signals generated by photo-conversion are propagated to an external processing chain implemented on another substrate (not shown). Alternatively, the second substrate sub2 supports only conductive transmission lines intended to propagate the generated electrical signals to an external processing chain implemented on another substrate (not shown). The invention is compatible with the three aforementioned implementation configurations of the ROIC reading circuit.

[0059] Each pixel Pxl comprises an absorption layer CA, an upper electrode EL2, and a lower electrode EL1 for collecting the generated charges. The absorption layer CA is made of a first perovskite material and arranged on a first face of a first substrate sub1.

[0060] The absorption layer CA is intended to convert an incident ray into electrical charges. In the illustrated case and without loss of generality, the absorption layer is common to all the pixels Pxl of the optoelectronic device D1. Alternatively, it is possible to delimit the absorption layer CA for each pixel by introducing dielectric separation structures to delimit each absorption layer CA of a pixel Pxl, or by localizing the layer by lithography techniques for example. The materials used to produce the absorption layer CA and its thickness determine the frequency and the quantity of radiation absorbed by said absorption layer. When the device D1 is intended for the detection of ionizing radiation (X-rays, gamma rays, ionizing particles, etc.), the first material is for example a material from the perovskite family or perovskite derivatives. The first material is a compound material ABX 3,with: - A selected from a first set of elements among: • inorganic cations such as cesium Cs, rubidium Rb, potassium K, sodium Na, or lithium Li; • organic cations such as MA (methylammonium) = CH3-NH3 + , FA (formamidinium)=CH5N2 + , GA (guanidinium)=CH6N3 + ; EA (ethylammonium)=CH3CH2NH3 + ; DMA (dimethylammonium)=C2H6NH2 + ; AC (acetamidinium) = C2H3N2H4 + ; AZ (azetidinium)=C3H6NH2 + ; TBA (tetrabutylammonium) = C4H9NH3 + ; PYRI (pyridium)= C5H5NH + ; PYRO (pyrrolidium)= C4H8NH2 + ; isoP (iso-propylammonium)=C3H7NH3 + ; PIP (piperidium) = C5H 10 NH2 +• or an alloy of said elements of the first set of elements; - B selected from a second group of elements among: • inorganic cations such as lead Pb, tin Sn, germanium Ge, silicon Si, strontium Sr, barium Ba, europium Eu, thulium Tm, ytterbium Yb, mercury Hg; • organic cations such as MDABCO=N-methyl-1,4-diazabicyclo[2.2.2]octane, ODABC=N-hydroxy-N^-diazabicyclo[2.2.2]octonium; • or an alloy of said elements of the second set of elements; - X selected from a third set of elements among halogens such as bromine Br, iodine I, chlorine Cl, fluorine F or an alloy of said elements of the third set of elements.

[0061] Alternatively, the first material is a perovskite with the formula A2C 1+ D 3+ X 6,with: - A, X selected respectively from the first set of elements and the third set of elements; - C selected from a fourth group of elements from: • inorganic cations such as gold Au, silver Ag, copper Cu, thallium Tl, lithium Li; cesium Cs, sodium Na, rubidium Rb, potassium K; • or an alloy of said elements from the fourth set of elements; - D selected from a fifth group of elements from: • inorganic cations such as gold Au, aluminum Al, gallium Ga, indium In, tin Sn, bismuth Bi, antimony Sb; • or an alloy of said elements from the fourth set of elements;

[0062] Alternatively, the first material is a perovskite with the formula A2B 4+ X6 or A3B2 3+ X9 with A, B, X selected from the first element set, second element set and third element set respectively.

[0063] Alternatively, the first material is a chalcogenide or a rudorffites.

[0064] The first material is from the perovskite family and can have a structure in 0 dimensions, 1 dimension, 2 dimensions or 3 dimensions.

[0065] At least one of the lateral dimensions (length, width) of the CA absorption layer is greater than 0.1 cm, preferably greater than 1 cm, and even more preferably greater than 10 cm. More particularly, the CA absorption layer has a surface area greater than 0.01 cm², preferably greater than 1 cm² and even more preferably greater than 100 cm 2 The thickness of the CA absorption layer is between a few hundred nm and several mm, for example 10mm.

[0066] As an example for the field of medical radiography and using a CsPbBr3 type perovskite composition, we will use: - a layer of CsPbBr3 with a thickness between 100 µm and 400 µm for X-ray mammography, - a layer of CsPbBr3 with a thickness greater than 0.65 mm for X-ray radiography (range 30 to 70 keV) to have >90% absorption, - a layer of CsPbBr3 with a thickness greater than 1.4 mm for X-ray radiography (range 40 to 120 keV) to have >90% absorption.

[0067] The upper electrode EL2 is deposited on the absorption layer CA. In the illustrated case and without loss of generality, the upper electrode EL2 is made by a conductive layer common to all the pixels Pxl. Alternatively, it is conceivable to produce a plurality of upper electrodes EL2 made by several distinct electrically conductive layers deposited on the absorption layer CA. The upper electrode EL2 may consist of a layer or a stack of layers. It may also consist of at least one blocking layer making it possible to minimize the dark current. This blocking layer may be of a semiconducting or insulating nature.This blocking layer can be, for example, made of dielectric polymer (polyester, polyimide, polycarbonate, PMMA, parylene, PVC) or semiconducting (poly-(3-hexylthiophene) also called P3HT, poly(triaryl amine) also called PTAA, Poly(9,9-dioctylfluorene-alt-N-(4-sec-butylphenyl)-diphenylamine also called TFB).

[0068] In the illustrated example, the ROIC readout integrated circuit is made using a plurality of transistors and thin layers of conductive, semiconductor or dielectric materials using CMOS (Complementary Metal-Oxide-Semiconductor) technology or amorphous silicon or IGZO or organic TFT (OTFT) technology, on a second sub2 substrate. For each pixel Pxl, a readout electrode EL_lect is associated to read the signals generated by the photo charge carriers generated by the CA absorption layer of a pixel Pxl.

[0069] The device D1 further comprises a plurality of EMC hybridization connectors. For example, the hybridization is carried out for each pixel Pxl by means of a EMC metal ball electrically connected to the reading electrode EL_lect associated exclusively with the same pixel. The EMC ball is, for example, achievable with Indium balls or copper micro-pillars allowing each pixel to have individualized contact with the reading circuit. It is possible to use other hybridization means to produce the EMC hybridization connectors such as, but not limited to: - solder balls with at least one metal element (Bump in English) made of Pb, Sn, Ag, Au, Cu, Bi, In, deposited by evaporation, screen printing, lithography, laser ablation, electrolytic deposition, or ball placement then assembled by soldering, by welding, by crosslinking under light flux, or by thermocompression;- polymer bumps deposited by screen printing and / or assembled by crosslinking under light or by thermocompression; - Au, Cu or Ni stud bumps assembled by thermocompression, - Cu pillars assembled by soldering, - a conductive adhesive layer (e.g. carbon-based adhesive) sized to efficiently collect charges in the axis normal to the first substrate sub1 and minimize electrical leakage in the plane parallel to the first substrate sub1; - An anisotropic conductive adhesive film (ACF) or an anisotropic conductive adhesive ink. More particularly, a film or ink based on magnetic beads that can be oriented under a magnetic field.

[0070] The first substrate sub1 is placed between the CA absorption layer and the plurality of EMC hybridization connectors. The first substrate sub1 comprises for each pixel Pxl at least one via V1 starting from the second face of the first substrate sub1 opposite the first face on which the CA absorption layer rests. The via V1 is a via opening through the substrate sub1. For each pixel Pxl, the at least via V1 is an electrically conductive via having a lower end in contact with the EMC hybridization connector and another end in contact with the CA absorption layer. The at least via V1 is filled with a second electrically conductive material.

[0071] Alternatively, the inner walls of via V1 are covered by a second electrically conductive material. In the illustrated embodiment, via V1 acts as the lower electrode EL1. For each pixel Pxl, via V1 ensures electronic continuity between the absorption layer CA and the reading electrode EL_lect dedicated to said pixel through the CEM hybridization connector. The opening of a via V1 may be circular, parallelepipedal, triangular or any other shape. The surface area of ​​the opening of a via V1 of a pixel Pxl is preferably less than or equal to that of the reading electrode EL_lect associated with said pixel Pxl. In the case of a cylindrical via, the diameter of a via V1 is between 100nm and 10mm.The second conductive material can be a metal (In, Bi, Sn, Pb, Cr, Pt, Ag, Au, Ti), a conductive organic material (polymer, graphene ink, carbon black ink, carbon nanotube ink), an ink based on silver particles Ag, a conductive oxide (ITO, SnO2, TiO2).

[0072] An electrical voltage is applied between the upper electrode EL2 and the lower electrode EL1 to move the generated charges to the lower electrode EL1. The amount of generated charge carriers collected by the lower electrode EL1 determines the amplitude of the read signal associated with the pixel Pxl.

[0073] The first substrate sub1 is made of an inorganic, organic or hybrid material. For example, the substrate sub1 is made of glass, plastic, silicon or ceramic. The first substrate sub1 may be a single-layer substrate or a stack of several layers of several materials. The thickness of the first substrate sub1 is between 1 µm and 10 mm.

[0074] Advantageously, the sub1 substrate has a regular, smooth and flat lower surface to facilitate indirect coupling with the electronic part. This offers the advantage of overcoming the problems of surface condition, flatness and roughness of the surface of the thick perovskite layers encountered in hybridization solutions according to the state of the art. In addition, this offers the possibility of reducing the lateral distance separating the lower electrodes and thus reducing the pixel pitch so as to increase the resolution of the detector.

[0075] Advantageously, the substrate sub1 is made of a material having a coefficient of thermal expansion in the following range [CTE-50%, CTE+50%] with CTE the coefficient of thermal expansion of the absorption layer CA. As an example for an absorption layer in CsPbBr3, the thermal coefficient of the substrate sub1 is between 1.5.10 -5 °K -1 and 4.5.10 -5 °K -1 This solves the problems of differential thermal expansion encountered during high-temperature deposition of the CA absorption layer. This results in an improvement in the mechanical robustness of the CA absorption layer and avoids the phenomena of bending or cracking following deposition and due to differential thermal expansion.

[0076] Generally speaking, the sub1 substrate has chemical, thermal, mechanical and electronic characteristics adapted to the conditions of the perovskite layer deposition process. The sub1 substrate plays a dual role: - an electrical role: by ensuring localized electrical continuity between these two faces in order to connect the absorption layer CA (source of the generated charges) to the associated reading electrode EL_lect. - A mechanical role: by acting as a mechanical support for the absorption layer compatible with the particular constraints of perovskite deposition (high temperatures, chemically inert, etc.) and the constraints linked to hybridization techniques.

[0077] Advantageously, the use of the first substrate sub1 with the vias V1 makes it possible to decorrelate the manufacturing constraints of the perovskite CA absorption layer and the mechanical, thermal, chemical and electrical resistance constraints of the ROIC reading circuit.

[0078] Advantageously, the upper surface of the first substrate sub1 comprises a seed layer made of a perovskite material so as to promote the growth by epitaxy or heteroepitaxy of the absorption layer CA. Alternatively, the first substrate sub1 has a crystalline structure in lattice agreement with that of the first material composing the absorption layer CA.

[0079] For example, if the material of the CA absorption layer is CsPbBr3, it would be advantageous to carry out heteroepitaxy on a first substrate sub1, in PbS, FeS2 (pyrite), mica (for example Muscovite), PbSnSe, or GaAs. If the material of the first substrate sub1 does not allow direct heteroepitaxy of the CA absorption layer, it is possible to go through an intermediate step by growing a surface layer by heteroepitaxy on the first substrate sub1 and then carrying out heteroepitaxy of the perovskite on this surface layer. For example, lead chalcogenides are compatible with heteroepitaxy of perovskites, however they are difficult to access in wafer type substrates.Thus, it is possible to grow a lead chalcogenide layer on the first sub1 substrate (for example by molecular beam epitaxy) and then to grow the perovskite absorption layer on the lead chalcogenide layer.

[0080] Advantageously, the first substrate sub1 is made totally or partially of a material opaque to wavelengths in the visible, ultraviolet or near infrared range or to X-rays or gamma rays. This makes it possible to form a localized or generalized optical shielding protecting the components of the ROIC reading circuit sensitive to light. For example, the performance of certain transistor technologies degrades under the effect of exposure to light or radiation. Examples include transistors based on amorphous silicon or based on Indium gallium zinc oxide IGZO, for example. Optical shielding can be achieved by using an opaque layer in the structure of the first substrate sub1 or by integrating pigments into the volume of the first substrate sub1 (carbon black) or by introducing atoms of an element with a high atomic number (Bi carboxylate, for example) on the surface or in the volume of the substrate sub1.In the case of local optical shielding, it is preferable to place the transistors of the reading circuit under the shielded areas of the first substrate sub1.

[0081] Figure 2b illustrates a sectional view of an example of hybridization of an optoelectronic device D1 according to a second embodiment of the invention. In the illustrated embodiment, the optoelectronic device D1 further comprises for each via V1 an electrically conductive upper interface layer C1 deposited on the first face of the first substrate sub1. The upper interface layer C1 is confined between the end of the associated via V1 and a volume of the absorption layer CA. Each upper interface layer C1 is thus deposited on the upper face of the substrate sub1. Each via V1 opens onto the upper interface layer C1 associated with it.In a non-exhaustive manner, the upper interface layer can be made by a metal (In, Bi, Sn, Pb, Cr, Pt), a conductive organic material (polymer, graphene ink, carbon black-based ink, carbon nanotube-based ink), Ag-based ink, a conductive oxide (ITO, SnO2, TiO2) or any other conductive material.

[0082] In the case where via V1 is a conductive via, the lower electrode EL1 is formed by at least one via V1 and the upper interface layer C1 associated with it. This variant has the advantage of increasing the charge collection surface between the absorption layer CA and via V1 and thus improving the collection and transfer of the generated charges.

[0083] Alternatively, the upper interface layer C1 alone, or the assembly formed by the upper interface layer C1 and the second material filling each via V1, are made up of at least one material acting as a blocking layer (the material may be different between the upper interface layer C1 and the vias V1). Thus, the assembly plays the role of a blocking layer to a type of charge carriers (holes or electrons).

[0084] In the case where the blocking layer must block the injection of electrons, in the dark, from the lower electrode EL1 to the absorption layer CA, it must have an energy barrier of at least 0.4 eV. In the case where the blocking layer is a metal, this barrier is defined between the work function of the metal and the bottom of the conduction band of the semiconductor material of the absorption layer CA. In the case where the blocking layer is a semiconductor, this barrier is defined between the work function of the electrode metal and the bottom of the conduction band of said semiconductor (also called LUMO, for Lowest Unoccupied Molecular Orbital, in the case of organic semiconductors. We also speak of electron affinity).

[0085] In the case where the blocking layer must block the injection of holes, in the dark, from the lower electrode EL1 to the absorption layer CA, it must have an energy barrier of at least 0.4 eV. In the case where the blocking layer is a metal, this barrier is defined between the work function of the metal and the top of the valence band of the semiconductor material of the absorption layer CA. In the case where the blocking layer is a semiconductor, this barrier is defined between the work function of the conductive electrode and the top of the valence band of said semiconductor (also called HOMO, for Highest Occupied Molecular Orbital, in the case of organic semiconductors. We also speak of ionization potential). This variant has the advantage of minimizing the dark current of the detector device D1.

[0086] Among the materials used to act as a blocking layer, we can cite, but not limited to, organic, inorganic or hybrid organic / inorganic dielectrics such as: SiO2, HfO2, Al2O3, LiF, MgF2, polymers such as polyimide, PVC, PMMA, parylene, PC, PVDF, PVDF-TrFE, ceramics, perovskites. Alternatively, the materials used to act as blocking layers are organic, inorganic or hybrid organic / inorganic semiconductors such as silicon, SnO2, TiO2, NiOx, PTAA, TFB, P3HT, perylene diimide, acene diimide, fullerene and fullerene derivatives, perovskites.

[0087] Figure 2c illustrates a cross-sectional view of an example of hybridization of an optoelectronic device D1 according to a third embodiment of the invention. Compared to the first embodiment, the optoelectronic device D1 further comprises for each via V1 an electrically conductive lower interface layer C2 deposited on the second face of the first substrate sub1. The lower interface layer C2 is in contact with the lower end of the associated via V1 and with the associated EMC hybridization connector. The lower interface layer C2 can be made of a metal (In, Bi, Sn, Pb, Cr, Pt), a conductive organic material (polymer, graphene ink, carbon black-based ink, carbon nanotube-based ink), Ag-based ink, a conductive oxide (ITO, SnO2, TiO2) or any other conductive material.

[0088] In the case where via V1 is a conductive via, the lower electrode EL1 is formed by at least one via V1 and the associated lower interface layer C2. This variant has the advantage of improving the contact surface between via V1 and the EMC hybridization connector. The improvement of the contact surface makes it possible to minimize the electrical resistance for the transfer of charges from the absorption layer CA to the reading electrode El_lect.

[0089] Alternatively, the second material filling each via V1, or the assembly formed by the second material filling each via V1 and the lower interface layer C2, comprise at least one material acting as a blocking layer (the material may be different between the lower interface layer C2 and the vias V1). Thus, the assembly plays the role of a blocking layer for a type of charge carriers (holes or electrons). The blocking layer in this variant can be produced in a similar manner to the blocking layer described for the embodiment of FIG. 2b.

[0090] Figure 2d illustrates a sectional view of an example of hybridization of an optoelectronic device D1 according to a fourth embodiment of the invention. The device D1 comprises the upper interface layer C1 and the lower interface layer C2 as described previously.

[0091] If via V1 is conductive, the lower electrode EL1 is formed by combining via V1 with the associated upper interface layer C1 and lower interface layer C2.

[0092] Alternatively, the upper interface layer C1, or the assembly formed by the upper interface layer C1 and the second material filling each via V1, or the assembly formed by the upper interface layer C1 and the second material filling each via V1 and the lower interface layer C2, comprise at least one material acting as a blocking layer (the material may be different between the upper interface layer C1, the lower interface layer C2 and the vias V1). Thus, the assembly acts as a blocking layer for a type of charge carriers (holes or electrons). The blocking layer in this variant can be produced in a similar manner to the blocking layer described for the embodiment of FIG. 2b. This variant has the advantage of minimizing the dark current of the detector device D1. Alternatively, the second material filling each via V1 is a dielectric.The assembly of the upper interface layer C1, the via V1 and the lower interface layer C2, forms a capacitive element Cap1 capable of storing the generated electric charges. This has the advantage of realizing a storage capacity integrated in the first substrate sub1 to accumulate the generated charges. It is thus possible to realize optoelectronic devices with an accumulation function of the generated charges. The upper interface layer C1 simultaneously plays the role of the lower electrode EL1 of the photodetector structure and the role of the first conductive plate of the capacitive element Cap1. The lower interface layer C1 plays the role of the second conductive plate of the capacitive element Cap1. The via V1 filled with a dielectric plays the role of the insulating volume of the capacitive element Cap1.The dielectric material preferably has a dielectric permittivity greater than 10 and may be selected from a composite with ceramic fillers such as ZrO2, TiO2 or PZT, a polymer (PVDF) or a ceramic.

[0093] Figure 2e illustrates a sectional view of an example of hybridization of an optoelectronic device D1 according to a fifth embodiment of the invention. The capacitive element Cap1 inside the via V1 through the following stack: electrical conductor M2 / dielectric M1 / ​​electrical conductor M2'. The functionality of the via V1 as a capacitive element by an internal stack is compatible with all the embodiments of the invention previously described.

[0094] Figure 3 illustrates a cross-sectional view of an example of hybridization of an optoelectronic device D1 according to a sixth embodiment of the invention. The first substrate sub1 is made of a dielectric or semiconductor material. The via V1 does not open onto the upper face of the first substrate sub1 from the lower face of the first substrate sub1. The via V1 is electrically conductive. The confined volume between the upper end of the via V1 and the upper face of the first substrate has a thickness d1 less than or equal to 100 µm, preferably less than 50 µm and even more preferably less than 10 µm. When the device is not exposed to radiation, the confined volume acts as a blocking layer for the injection of charges from the lower electrode. This makes it possible to reduce the dark current in the optoelectronic device D1.When the CA absorption layer is exposed to an incident ray, the dielectric zone d1 allows all or part of the electric field to propagate in the CA absorption layer either by becoming slightly conductive under the flow of incident radiation, or by trapping charges at the interface between Sub1 and the CA absorption layer. The generated charges can then be read by capacitive effect.

[0095] Figure 4 illustrates a sectional view of an example of hybridization of an optoelectronic device D1 according to a seventh embodiment of the invention. The EMC hybridization connector is an anisotropic conductive layer. Preferably, the reading electrode EL_lect has an outgoing topology relative to the surface of the second substrate sub2. The anisotropic conductive layer is for example an epoxy resin comprising conductive microbeads. Once shaped by compression, it is then electrically conductive only in the direction normal to the surface of the first substrate sub1. The diameter of at least one crushed bead is at least less than the inter-pixel distance L2. For each pixel Pxl, the electrode EL1 comprises a via V1 and preferably a lower interface layer C2. Each lower interface layer C2 has a width L1 less than the separation distance L2 between two adjacent reading electrodes EL_lect.This allows indirect coupling to be achieved without the need for an alignment step. Indeed, even if a lower interface layer C2 is not aligned with a reading electrode EL_lect, there is no risk of short-circuiting between two adjacent reading electrodes EL_lect by inserting an unaligned lower interface layer C2.

[0096] Alternatively, each lower interface layer C2 has a width L1 less than the sum of the inter-pixel distance L2 and the width of the reading electrode EL_lect.

[0097] Figure 5 illustrates a sectional view of an example of hybridization of an optoelectronic device D1 according to an eighth embodiment of the invention. The CEM hybridization connector is an anisotropic conductive layer. Preferably, the reading electrode EL_lect has an outgoing topology relative to the surface of the second substrate Sub2. The diameter of at least one crushed ball is at least less than the inter-pixel distance L2. For each pixel Pxl, the lower electrode EL1 is formed by a plurality of adjacent vias V1. Multiplying the number of vias makes it possible to improve the conductivity of the lower electrode EL1 and thus to promote the collection of the charges generated in the detection device D1. The surface area of ​​the opening of a via V1 of a pixel Pxl is less than or equal to that of the reading electrode EL_lect associated with said pixel Pxl.The distance separating two V1 vias is less than the distance separating two adjacent reading electrodes EL_lect. .

[0098] Figure 6 illustrates the steps of a method P1 for manufacturing an optoelectronic device D1 according to the invention.

[0099] The first step consists of manufacturing a first substrate sub1 comprising a plurality of vias V1. The first substrate sub1 has a first face and a second opposite face. The vias V1 may or may not be through-holes starting from the second face. According to a first variant, this step is carried out by drilling the first substrate sub1. The drilling operation can be carried out by a subtractive method, for example chemical or physical etching or laser ablation. A laser beam is applied to a single point on the second face of the substrate sub1 in order to drill a hole by melting and evaporation. Drilling with nanometric precision can be carried out by adapting the wavelength and the emission power according to the material of the first substrate sub1. The laser beam scans the selected area to cut a hole in the volume of the first substrate sub1.For example, for a first polyimide substrate, a laser with a wavelength of 532 nm is suitable for producing a series of V1 vias with a diameter between 100 nm and 1000 µm. Laser technology has several advantages over conventional methods: speed, precision, flexibility and economy. In addition, laser drilling reduces the sensitivity to burns of the first sub1 substrate so as not to impact the mechanical robustness of the sub1 substrate.

[0100] Alternatively, it is possible to manufacture the first substrate sub1 comprising a plurality of vias V1 by filling a thermosetting resin in a fakir mat type mold.

[0101] Once the drilled structure is obtained, the holes are filled completely or partially with one or more materials depending on the embodiment of the invention manufactured. The filling can be complete or consist of a deposit on the internal walls. The materials inside a V1 via can be conductive, insulating or a stack of several different materials.

[0102] The second step ii) consists of depositing a CA absorption layer on a first face of the first substrate sub1 as described previously. The CA absorption layer is made of a material having a perovskite crystalline structure. The deposition of the absorption layer can be carried out by direct or indirect integration. Advantageously, the absorption layer is deposited by direct integration. In this case and in a non-exhaustive manner, the following techniques can be used: liquid crystal growth, liquefaction, sputtering, fused deposition, powder sintering, near-field sublimation vacuum deposition (CSS for Close Space Sublimation), evaporative vacuum deposition, microcrystal paste spreading, epitaxy and heteroepitaxy.

[0103] The third step iii) consists of depositing an upper electrode EL2 on the absorption layer CA. This step can be carried out using standard deposition techniques for thin metallic layers or conductive inks.

[0104] The fourth step iv) consists of manufacturing a ROIC reading circuit on a second substrate sub2. The ROIC reading circuit has on its upper face a plurality of distinct reading electrodes EL_lect. Each reading electrode EL_lect is dedicated to a pixel Pxl. The manufacturing of the plurality of distinct reading electrodes EL_lect is carried out, for example, by one or more sequences of deposition of conductive layers, lithography and etchings used in the micro and nanotechnology industry. The fourth step iv) is independent of the preceding steps. The fourth step iv) can be carried out upstream or simultaneously with steps i to iii).

[0105] At the end of steps i) to iii) the manufacture of the photoconversion part D1_opt of the device D1 according to the invention is completed. At the end of the fourth step iv) the manufacture of the electronic part D1_elec of the device D1 according to the invention is completed.

[0106] The fifth step v) consists in assembling the photo-conversion part D1_opt with the electronic part D1_elec via hybridization connectors. The assembly is carried out in such a way as to electrically connect for each pixel Pxl, at least one via V1 to the dedicated reading electrode El_lect through at least one hybridization connector CEM. Optionally, an alignment sub-step is carried out during the assembly in order to precisely align the photo-conversion part D1_opt with respect to the electronic part D1_elec.It is possible to use different hybridization means to produce EMC hybridization connectors such as, but not limited to: - metal solder balls (Bump in English) assembled by soldering, welding or thermocompression; - polymer balls (Polymer bump in English) deposited by screen printing and assembled by crosslinking under light flux or by thermocompression; - a conductive adhesive layer sized to efficiently collect charges in the axis normal to the first substrate sub1 and minimize electrical leakage in the plane parallel to the first substrate sub1; - An anisotropic conductive adhesive film (ACF for Anisotropic conductive film) or an anisotropic conductive adhesive ink.

[0107] To produce the device D1 according to figures 2b and 2d, the method P1 further comprises a step ii') of depositing a plurality of upper interface layers C1 on the first face of the first substrate sub1 aligned with the upper ends of the vias V1. This step ii') must be carried out before step ii) of depositing the absorption layer CA.

[0108] To produce the device D1 according to figures 2c and 2d, the method P1 further comprises a step ii'') of depositing a plurality of lower interface layers C2 on the second face of the first substrate sub1 aligned with the lower ends of the vias V1. This step ii'') must be carried out before the assembly step v).

[0109] Alternatively, step ii) of depositing the absorption layer CA on the first substrate sub1 is carried out before the step of manufacturing the vias V1 in said first substrate sub1.

Claims

CLAIMS 1. Optoelectronic device (D1) comprising: - at least one pixel (Pxl) comprising: o an absorption layer (CA) made of perovskite and arranged on a first face of a first substrate (sub1), the absorption layer being intended to convert an incident ray into electrical charges; o a lower electrode (EL1) for collecting the electrical charges; o and an upper electrode (EL2) arranged on the absorption layer (CA); - a reading circuit (ROIC) arranged on a second substrate (sub2) and comprising at least one reading electrode (EL_lect) dedicated to the pixel (Pxl); the first substrate (sub1) comprising at least one via (V1) starting from a second face of the first substrate (sub1) opposite said first face; said via (V1) being electrically connected on the one hand to the lower electrode (EL1) and on the other hand to at least one hybridization connector (CEM) for electrically and mechanically coupling the pixel (Pxl) to the reading electrode (EL_lect)dedicated to said pixel (Pxl).

2. Optoelectronic device (D1) according to claim 1 wherein the via (V1) opens from the second face of the first substrate (sub1) to the first face of the first substrate (sub1).

3. Optoelectronic device (D1) according to any one of claims 1 or 2 wherein the pixel (Pxl) further comprises for each via (V1) an electrically conductive upper interface layer (C1) deposited on the first face of the first substrate (sub1), the upper interface layer (C1) being confined between the end of the associated via (V1) and a volume of the absorption layer (CA).

4. Optoelectronic device (D1) according to claim 3 wherein at least the via (V1) and / or the upper interface layer (C1) constitutes a blocking layer to a predetermined type of charge carriers.

5. Optoelectronic device (D1) according to any one of claims 2 to 4 in which the pixel (Pxl) further comprises for each via(V1) an electrically conductive lower interface layer (C2) deposited on the second face of the first substrate (sub1); the lower interface layer (C2) being in contact with the lower end of the associated via (V1).

6. Optoelectronic device (D1) according to claim 5 wherein the width (L1) of the lower interface layer (C2) is less than the separation distance (L2) between two adjacent reading electrodes (EL_lect).

7. Optoelectronic device (D1) according to any one of claims 1 to 6 wherein: the via (V1) is filled with a second electrically conductive material; or the internal walls of the via (V1) are covered with a second electrically conductive material. 8.Optoelectronic device (D1) according to any one of claims 5 or 6 in combination with claim 4 in which the via (V1) is filled with a dielectric material; the assembly formed by the upper interface layer (C1), the via (V1) and the lower interface layer (C2), forming a capacitive element (Cap1) capable of storing the generated electrical charges.

9. Optoelectronic device (D1) according to any one of claims 1 to 6 in which the via (V1) is filled with a stack comprising a dielectric material (M1) confined between two electrically conductive materials (M2, M2') so as to form a capacitive element (Cap1) in the via capable of storing the generated electrical charges. 10.Optoelectronic device (D1) according to claim 1 in which the via (V1) does not open onto the first face of the first substrate (sub1) from the second face of the first substrate (sub1); the first substrate being made of a dielectric or semiconducting material; the via (V1) being conductive.

11. Optoelectronic device (D1) according to any one of the preceding claims in which the first substrate (sub1) has a crystalline structure in lattice agreement with that of the first material.

12. Optoelectronic device (D1) according to any one of the preceding claims in which the first substrate (sub1) is opaque to wavelengths in the visible range and / or to X or gamma radiation.

13. Optoelectronic device (D1) according to any one of the preceding claims in which the first material is the perovskite CsPbBr3.

14. Matrix image sensor comprising an optoelectronic device according to any one of the preceding claims.

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