Photovoltaic cell manufacturing process

By replacing native edges of photovoltaic cells with passivation layers of lower surface recombination velocity, particularly using aluminum oxide, the method improves passivation quality and efficiency of photovoltaic subcells.

FR3143856B1Active Publication Date: 2025-11-21COMMISSARIAT A LENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES
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Patent Information

Application Number
FR2022013602
Authority / Receiving Office
FR · FR
Patent Type
Patents
Current Assignee / Owner
Filing Date
2022-12-16
Publication Date
2025-11-21
Estimated Expiration
2042-12-16

AI Technical Summary

Technical Problem

The performance of photovoltaic subcells, particularly those with reduced formats compatible with shingle interconnection technology, is limited by the quality of passivation at native edges, which are susceptible to defects and reduce efficiency.

Method used

A method involving the removal and replacement of native edges of photovoltaic cells with passivation layers having lower surface recombination velocities, specifically using aluminum oxide for improved passivation quality.

Benefits of technology

Enhances the passivation quality of photovoltaic subcells, leading to potential efficiency gains of 0.1% per replaced native edge and reduces electrical shading losses.

✦ Generated by Eureka AI based on patent content.

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Abstract

A method for manufacturing a photovoltaic cell, comprising the steps: a) using an initial photovoltaic cell, comprising: - a substrate (1), based on crystalline silicon, and having: first and second opposing lateral edges, third and fourth opposing lateral edges, connecting the first and second lateral edges; - a stack (2) of active layers (20), formed around the substrate (1), and comprising an initial passivation layer (P0) having an effective surface recombination velocity, denoted SRV0; the stack (2) having: first and second lateral parts, extending respectively over the first and second lateral edges of the substrate (1), third and fourth lateral parts, extending respectively over the third and fourth lateral edges of the substrate (1); b1) removing the first lateral part of the stack (2) of active layers (20) so as to reach the first lateral edge of the substrate (1);c1) form a first passivation layer (P1) on the first lateral edge of the substrate (1) reached at the end of step b1), the first passivation layer (P1) having an effective surface recombination velocity strictly less than SRV0. Figure 12;
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Description

Title of the invention: Method for manufacturing a photovoltaic cell technical field

[0001] The invention relates to the technical field of photovoltaic cells, in particular photovoltaic cells having a passivated contact on each of the substrate surfaces.

[0002] Passivation of substrate surfaces is a major challenge in the photovoltaic sector, as it limits recombination between minority and majority carriers, thereby increasing the number of carriers collected and resulting in a significant improvement in efficiency. "Passivation" refers to the neutralization of electrically active defects on substrate surfaces. Indeed, the surface of a crystalline silicon substrate exhibits a density of defects (e.g., dangling bonds, impurities, crystal discontinuities, etc.) that can lead to significant losses due to surface carrier recombination in a photovoltaic application.

[0003] There are several types of passivated contacts. Examples include a passivated contact based on hydrogenated amorphous silicon, or a passivated contact comprising a tunnel oxide film and a layer of doped polycrystalline silicon.

[0004] The invention finds particular application in the manufacture of heterojunction silicon photovoltaic cells (i.e., amorphous silicon / crystalline silicon heterojunction). However, other photovoltaic cell architectures are conceivable, for example, a TOPCon (“Tunnel Oxide Passivated Contact”) architecture where the passivated contact comprises a tunnel oxide film and a doped polycrystalline silicon layer, or a monolithic multijunction architecture (e.g., a silicon / perovskite tandem cell). State of the art

[0005] A method for manufacturing a photovoltaic cell known from the prior art comprises the following steps: A) use an initial photovoltaic cell, comprising: - a substrate, based on crystalline silicon, and having: first and second opposite lateral edges, third and fourth opposite lateral edges, connecting the first and second lateral edges; - a stack of active layers, formed around the substrate, and comprising an initial passivation layer, the stack exhibiting: the first and second lateral parts, extending respectively over the first and second lateral edges of the substrate, of the third and fourth lateral parts, extending respectively over the third and fourth lateral edges of the substrate; B) cut the substrate along at least one cutting line extending into a central region of the substrate so as to obtain at least two photovoltaic subcells; C) coat each cut edge [at the end of step B)] of the photovoltaic sub-cells with a dedicated passivation layer.

[0006] The first lateral edge of the substrate and the first lateral portion of the active layer stack constitute a so-called native edge of the initial photovoltaic cell. The second lateral edge of the substrate and the second lateral portion of the active layer stack also constitute a native edge of the initial photovoltaic cell. Similarly, the third lateral edge of the substrate and the third lateral portion of the active layer stack constitute a native edge of the initial photovoltaic cell. Finally, the fourth lateral edge of the substrate and the fourth lateral portion of the active layer stack constitute a native edge of the initial photovoltaic cell.

[0007] Such a prior art method is not entirely satisfactory insofar as the simulated performance of the photovoltaic subcells, in terms of efficiency, decreases as the final dimensions of the photovoltaic subcell are reduced. These performance losses are particularly detrimental to photovoltaic subcells with a reduced format, compatible with shingle interconnection technology. Description of the invention

[0008] The invention aims to remedy, in whole or in part, the aforementioned drawbacks. To this end, the invention relates to a method for manufacturing a photovoltaic cell, comprising the following steps: a) use an initial photovoltaic cell, comprising: - a substrate, based on crystalline silicon, and having: first and second opposite lateral edges, third and fourth opposite lateral edges, connecting the first and second lateral edges; - a stack of active layers, formed around the substrate, and comprising an initial passivation layer having an effective surface recombination velocity, denoted SRV0; the stack exhibiting: of the first and second lateral parts, extending respectively over the first and second lateral edges of the substrate, of the third and fourth lateral parts, extending respectively over the third and fourth lateral edges of the substrate; bi) remove the first lateral part of the stack of active layers so as to reach the first lateral edge of the substrate; Ci) form a first passivation layer on the first lateral edge of the substrate reached at the end of step bj, the first passivation layer having an effective surface recombination velocity strictly less than SRV0.

[0009] Thus, such a process according to the invention makes it possible to improve the passivation quality of the photovoltaic subcells obtained after step cj, thanks to steps bi) and cj which replace the native edge of the initial photovoltaic cell, formed by the first lateral edge of the substrate and the first lateral part of the active layer stack. The first passivation layer, having an effective surface recombination velocity strictly lower than SRV0, is of better quality than the initial passivation layer.

[0010] Indeed, the inventors have surprisingly observed that the performance of photovoltaic subcells is limited by the quality of the passivation of the native edges of the initial photovoltaic cell. However, those skilled in the art typically retain the native edges of the initial photovoltaic cell and focus on passivating the cut edges when obtaining functional photovoltaic subcells. Yet, the native edges of the initial photovoltaic cell are relatively sensitive and susceptible to shocks or scratches that can impair the passivation quality and thereby reduce the efficiency of the photovoltaic subcells. Furthermore, the native edges of the initial photovoltaic cell generally exhibit an intrinsic passivation quality lower than that of the upper and lower surfaces of the substrate (deposition quality, layer uniformity, etc.).

[0011] The method according to the invention may include one or more of the following features.

[0012] According to one feature of the invention, the process comprises the following steps: b2) remove the second lateral part of the stack of active layers so as to reach the second lateral edge of the substrate; c2) form a second passivation layer on the second lateral edge of the substrate reached at the end of step b2), the second passivation layer having an effective surface recombination velocity strictly less than SRV0.

[0013] Thus, one advantage provided is to improve the passivation quality of the photovoltaic subcells obtained after step c2), thanks to steps b2) and c2), which allow the native edge of the initial photovoltaic cell, formed by the second lateral edge of the substrate and the second lateral part of the active layer stack.

[0014] According to one feature of the invention, the process comprises the following steps: b3) remove the third lateral part of the stack of active layers so as to reach the third lateral edge of the substrate; c3) form a third passivation layer on the third lateral edge of the substrate reached at the end of step b3), the third passivation layer having an effective surface recombination velocity strictly less than SRV0.

[0015] Thus, one advantage provided is to improve the passivation quality of the photovoltaic subcells which will be obtained after step c3), and this thanks to steps b3) and c3) allowing to replace the native edge of the initial photovoltaic cell, formed by the third lateral edge of the substrate and the third lateral part of the stack of active layers.

[0016] According to one feature of the invention, the process comprises the following steps: b4) remove the fourth lateral part of the active layer stack so as to reach the fourth lateral edge of the substrate; c4) form a fourth passivation layer on the fourth lateral edge of the substrate reached at the end of step b4), the fourth passivation layer having an effective surface recombination velocity strictly less than SRV0.

[0017] Thus, one advantage provided is the improvement of the passivation quality of the photovoltaic subcells obtained after step c4), thanks to steps b4) and c4), which allow the replacement of the native edge of the initial photovoltaic cell, formed by the fourth lateral edge of the substrate and the fourth lateral part of the active layer stack. The inventors observed, through simulation, a potential increase of 0.1% in the efficiency of the initial photovoltaic cell (before the formation of photovoltaic subcells) per native edge replaced.

[0018] According to a feature of the invention: - step a) is executed so that the stack of active layers includes a surface transparent conductive oxide layer having an initial step, set back from each lateral edge of the substrate, the initial step being preferably obtained by contouring; - step bi) is executed by a first cut of the substrate adjusted to remove the first lateral part of the stack of active layers and a first lateral area of ​​the substrate, so that the first lateral edge of the substrate reached at the end of the first cut faces the initial detachment of the surface conductive transparent oxide layer.

[0019] Thus, one advantage provided is to improve the performance of the initial photovoltaic cell by completely eliminating the initial dropout (classically a clipping zone) which is a source of electrical losses (electrical shading), especially for a silicon heterojunction architecture.

[0020] According to a feature of the invention, step b2) is performed by a second cut of the substrate fitted to remove the second lateral part of the stack of active layers and a second lateral area of ​​the substrate, so that the second lateral edge of the substrate reached at the end of the second cut faces the initial detachment of the surface conductive transparent oxide layer.

[0021] Thus, one advantage provided is to improve the performance of the initial photovoltaic cell by completely eliminating the initial step (classically a trim zone) which is a source of electrical losses (electrical shading), in particular for a silicon heterojunction architecture.

[0022] According to a feature of the invention, step b3) is performed by a third cut of the substrate fitted to remove the third lateral part of the stack of active layers and a third lateral area of ​​the substrate, so that the third lateral edge of the substrate reached at the end of the third cut faces the initial detachment of the surface conductive transparent oxide layer.

[0023] Thus, one advantage provided is to improve the performance of the initial photovoltaic cell by totally eliminating the initial step (classically a trim zone) which is a source of electrical losses (electrical shading), in particular for a silicon heterojunction architecture.

[0024] According to one feature of the invention, step b4) is performed by a fourth cut of the substrate fitted to remove the fourth lateral part of the stack of active layers and a fourth lateral area of ​​the substrate, so that the fourth lateral edge of the substrate reached at the end of the fourth cut faces the initial detachment of the surface conductive transparent oxide layer.

[0025] Thus, one advantage provided is to improve the performance of the initial photovoltaic cell by totally eliminating the initial step (classically a trim zone) which is a source of electrical losses (electrical shading), in particular for a silicon heterojunction type architecture.

[0026] According to one feature of the invention, the substrate of the initial photovoltaic cell used in step a) has: - a central region, - a peripheral region, extending around the central region, comprising the first and second lateral borders as well as the third and fourth lateral borders; the process includes a step d) consisting of cutting the substrate along at least one cutting line extending into the central region so as to obtain at least two photovoltaic subcells.

[0027] According to a feature of the invention, said at least two photovoltaic subcells have edges cut at the end of step d); the process comprising a step e) consisting of coating each edge cut at the end of step d) with a passivation layer having an effective surface recombination velocity strictly less than SRV0.

[0028] According to one feature of the invention, step a) is carried out so that the initial passivation layer is made in hydrogenated amorphous silicon; and step Ci) is carried out so that the first passivation layer is made in aluminum oxide.

[0029] Thus, although hydrogenated amorphous silicon generally has a higher passivation potential than aluminum oxide, the presence of hydrogenated amorphous silicon on a lateral edge of the substrate leads to lower intrinsic passivation quality (e.g., limitations in terms of deposition and uniformity) and greater susceptibility to shocks, degradation, and contamination. The use of aluminum oxide therefore reduces the effective surface recombination rate compared to hydrogenated amorphous silicon present on a lateral edge. Furthermore, the use of optically transparent aluminum oxide is advantageous from an integration standpoint because aluminum oxide can be deposited without affecting the entire lateral surface of the photovoltaic cell, unlike amorphous silicon.Furthermore, localized deposits for aluminium oxide are also possible, which is much more complex to implement for amorphous silicon, requiring external masking.

[0030] Definitions

[0031] - By "substrate", we mean a physical, self-supporting support intended for manufacturing of a photovoltaic cell. The substrate can be a wafer cut from a crystalline silicon ingot.

[0032] - By "crystalline silicon", we mean the multicrystalline form or the form monocrystalline silicon, therefore excluding amorphous silicon.

[0033] - By "based on", it is meant that crystalline silicon is the main material and ma joritaire component of the substrate.

[0034] - By "active layer", we mean a layer having a role in the function function of the photovoltaic cell, for example a role of charge separation, a role of charge collection, a role of electrical passivation of the surfaces of the substrate, an optical role of anti-reflections, a role of sub-cell (other than crystalline silicon) in the case of a multi-junction etc.

[0035] - By "layer", we mean a layer or a plurality of sub-layers of the same nature.

[0036] - By "passivation" we mean the neutralization of electrically active defects in substrate surfaces. Indeed, the surfaces of a crystalline silicon substrate have a density of defects (e.g., dangling bonds, impurities, crystal discontinuity...) which can lead to significant losses related to surface recombination of carriers in the case of a photovoltaic application.

[0037] - By "effective surface recombination velocity" ("effective surface re- combination velocity » in English), we mean the recombination speed of charge carriers for a flux of charge carriers crossing an effective surface (i.e. surface 'seen' by solar radiation).

[0038] - By "so as to achieve", it is understood that steps b1, b2), b3) and b4) are executed so that the corresponding lateral edge (or possibly a portion adjoining the lateral edge) is exposed at the end of the corresponding step.

[0039] - By "photovoltaic subcell", we mean a photovoltaic cell obtained at starting from a cut in a central region of the substrate of the initial photovoltaic cell. Brief description of the drawings

[0040] Other features and advantages will become apparent in the detailed description of different embodiments of the invention, the description being accompanied by examples and references to the accompanying drawings.

[0041] [Fig.1] is a schematic top view, illustrating a substrate of an initial photovoltaic cell used in step a).

[0042] [Fig.2] is a schematic top view, analogous to [Fig.1], illustrating a region central and peripheral region of a substrate of an initial photovoltaic cell used in step a).

[0043] [Fig.3] is a schematic cross-sectional view (so as to show the first and second lateral edges of the substrate), illustrating a stack of active layers formed around a substrate of an initial photovoltaic cell used in step a). Some parts of the stack (in particular the upper and lower parts) may include additional active layers which are not shown for the sake of simplicity.

[0044] [Fig.4] is a schematic cross-sectional view, analogous to [Fig.3], illustrating step bi).

[0045] [Fig.5] is a schematic cross-sectional view, analogous to [Fig.4], illustrating the presence of a superficial, cut-out transparent conductive oxide layer, belonging to the lower part of the stack.

[0046] [Fig.6] is a schematic cross-sectional view, illustrating step Ci).

[0047] [Fig.7] is a schematic cross-sectional view, illustrating step Ci) in the presence of a Surface layer of transparent conductive oxide with outline cut off.

[0048] [Fig.8] is a schematic cross-sectional view, illustrating steps bi) and b2).

[0049] [Fig.9] is a schematic cross-sectional view, illustrating steps bi) and b2), in the presence of a superficial layer of transparent conductive oxide that has been outlined.

[0050] [Fig. 10] is a schematic cross-sectional view, illustrating steps Ci) and c2).

[0051] [Fig. 11] is a schematic cross-sectional view, illustrating steps Ci) and c2), in the presence of a superficial layer of transparent conductive oxide that has been outlined.

[0052] [Fig. 12] is a schematic cross-sectional view, illustrating a first mode of implementation of step d) in conjunction with steps bj, b2), Ci), c2).

[0053] [Fig. 13] is a schematic cross-sectional view, illustrating a photovoltaic subcell obtained at the end of step d) illustrated in [Fig.12], the cut edge being covered with a passivation layer.

[0054] [Fig. 14] is a schematic cross-sectional view (so as to show the third and fourth lateral edges of the substrate), illustrating a stack of active layers formed around a substrate of an initial photovoltaic cell used in step a). Some parts of the stack (in particular the upper and lower parts) may include additional active layers which are not shown for simplicity.

[0055] [Fig.15] is a schematic cross-sectional view, analogous to [Fig.14], illustrating step b 3)-

[0056] [Fig.16] is a schematic cross-sectional view, analogous to [Fig.15], illustrating the presence of a superficial transparent conductive oxide layer outlined, belonging to the lower part of the stack.

[0057] [Fig. 17] is a schematic cross-sectional view, illustrating step c3).

[0058] [Fig. 18] is a schematic cross-sectional view, illustrating step c3) in the presence of a Surface layer of transparent conductive oxide with outline cut off.

[0059] [Fig. 19] is a schematic cross-sectional view, illustrating steps b3) and b4).

[0060] [Fig.20] is a schematic cross-sectional view, illustrating steps b3) and b4), in the presence of a superficial layer of transparent conductive oxide that has been outlined.

[0061] [Fig.21] is a schematic cross-sectional view, illustrating steps c3) and c4).

[0062] [Fig.22] is a schematic cross-sectional view, illustrating steps c3) and c4), in the presence of a superficial layer of transparent conductive oxide that has been outlined.

[0063] [Fig.23] is a schematic cross-sectional view, illustrating one implementation method of step d) in conjunction with steps b3), b4), c3), c4)

[0064] [Fig.24] is a schematic cross-sectional view, analogous to [Fig.23], illustrating another method of implementation of step d).

[0065] [Fig.25] is a schematic cross-sectional view, analogous to [Fig.20], illustrating a mode implementation of step d) after steps bi) and b2) [or also after steps b3) and b4)] but before steps Ci) and c2) [or also before steps c3) and c4)].

[0066] It should be noted that the drawings described above are schematic and are not necessarily to scale for the sake of legibility and to simplify their understanding. The sections are made along the normal to the upper and lower surfaces of the substrate. Detailed description of the implementation methods

[0067] Identical elements or elements performing the same function shall bear the same references for the different embodiments, for the sake of simplification.

[0068] An object of the invention is a method for manufacturing a photovoltaic cell, comprising the following steps: a) use an initial photovoltaic cell, comprising: - a substrate 1, based on crystalline silicon, and having: first and second lateral edges 10, 11 opposite, third and fourth lateral edges 12, 13 opposite, connecting the first and second lateral edges 10, 11; - a stack 2 of active layers 20, formed around substrate 1, and comprising an initial passivation layer PO having an effective surface recombination velocity, denoted SRV0; stack 2 exhibiting: of the first and second lateral parts 2a, 2b, extending respectively over the first and second lateral edges 10, 11 of the substrate 1, of the third and fourth lateral parts 2c, 2d, extending respectively over the third and fourth lateral edges 12, 13 of the substrate 1; bi) remove the first lateral part 2a of the stack 2 of active layers 20 so as to reach the first lateral edge 10 of the substrate 1; Ci) form a first PI passivation layer on the first lateral edge 10 of the substrate 1 reached at the end of step bi), the first PI passivation layer having an effective surface recombination velocity strictly less than SRVo.

[0069] Initial photovoltaic cell

[0070] The initial photovoltaic cell comprises a substrate 1 having: - of the first and second lateral edges 10, 11 opposite, - the third and fourth lateral edges 12, 13 opposite, connecting the first and second lateral edges 10, 11 to each other.

[0071] The substrate 1 is based on crystalline silicon. The substrate 1 is advantageously made of monocrystalline silicon, preferably n-doped. The substrate 1 has an opposing upper edge 14 and lower edge 15, connecting the lateral edges 10, 11, 12, 13. The upper edge 14 and / or the lower edge 15 are intended to be exposed to light radiation. The upper edge 14 may form the front face of the photovoltaic cell, while the lower edge 15 may to be intended to form the back face of the photovoltaic cell.

[0072] The initial photovoltaic cell further comprises a stack 2 of active layers 20, formed around the substrate 1. The stack 2 of active layers 20 includes an initial passivation layer PO having an effective surface recombination velocity, denoted SRV0. The initial passivation layer PO is formed on the first and second lateral edges 10, 11, on the third and fourth lateral edges 12, 13, as well as on the upper and lower edges 14, 15. By way of non-limiting example, the initial passivation layer PO can be made of hydrogenated amorphous silicon, denoted a-Si:H. The hydrogenated amorphous silicon is intrinsic.

[0073] The stacking 2 of active layers 20 has: - the first and second lateral parts 2a, 2b, extending respectively over the first and second lateral edges 10, 11 of the substrate 1, - the third and fourth lateral parts 2c, 2d, extending respectively over the third and fourth lateral edges 12, 13 of the substrate 1; - upper and lower parts 2e, 2f, extending respectively over the upper and lower edges 14, 15 of substrate 1.

[0074] The initial passivation layer PO of the upper and lower parts 2e, 2f of the stack 2 of active layers 20 may have an effective surface recombination rate slightly lower than that of the lateral parts 2a, 2b, 2c, 2d.

[0075] The stack 2 of active layers 20 may include a charge-separation layer formed on the initial passivation layer PO. The charge-separation layer of the upper part 2e of the stack 2 is doped with a first type. The charge-separation layer of the lower part 2f of the stack 2 is doped with a second type, opposite to the first type. By way of non-limiting example, the charge-separation layer may be made of α-Si:H. The upper and lower parts 2e, 2f of the stack 2 may include additional active layers 20 (not shown), such as transparent conductive oxides (e.g., indium tin oxide ITO), metallic pads forming electrodes, anti-reflective layers, etc.

[0076] Step a) can be carried out so that the lower part 2f of the stack 2 comprises a surface transparent conductive oxide layer 200 having an initial step, set back from each lateral edge 10, 11, 12, 13 of the substrate 1. The initial step is preferably obtained by contouring. The initial step can be on the order of 1 mm. By way of non-limiting example, the surface transparent conductive oxide layer 200 can be made of indium tin oxide (ITO).

[0077] The substrate 1 of the initial photovoltaic cell used in step a) has: - a central region Rc, - a peripheral region Rp, extending around the central region Rc.

[0078] The peripheral region Rp includes the first and second lateral edges 10, 11 of the substrate 1, as well as the third and fourth lateral edges 12, 13 of the substrate 1. The peripheral region Rp also includes the upper and lower edges 14, 15 of the substrate 1.

[0079] The first lateral edge 10 of the substrate 1 and the first lateral portion 2a of the stack 2 of active layers 20 constitute a so-called native edge of the initial photovoltaic cell. The second lateral edge 11 of the substrate 1 and the second lateral portion 2b of the stack 2 of active layers 20 also constitute a native edge of the initial photovoltaic cell. Similarly, the third lateral edge 12 of the substrate 1 and the third lateral portion 2c of the stack 2 of active layers 20 constitute a native edge of the initial photovoltaic cell. Finally, the fourth lateral edge 13 of the substrate 1 and the fourth lateral portion 2d of the stack 2 of active layers 20 constitute a native edge of the initial photovoltaic cell.

[0080] The upper and lower edges 14, 15 of the substrate 1 have upper and lower surfaces, respectively. The upper and lower surfaces may be flat. The upper and lower surfaces may be textured to reduce the reflection coefficient and optical losses in the initial photovoltaic cell.

[0081] Withdrawal of native edge(s)

[0082] The method includes a step bi) consisting of removing the first lateral part 2a of the stack 2 of active layers 20 so as to reach the first lateral edge 10 of the substrate 1. Step bj is advantageously carried out by a first cut DI of the substrate 1 fitted to remove the first lateral part 2a of the stack 2 of active layers 20. The first cut DI is made in the peripheral region Rp of the substrate 1. The first cut DI is accompanied by the removal of a first lateral zone ZL1 of the substrate 1 extending into the peripheral region Rp of the substrate 1. Thus, the first lateral edge 10 of the substrate 1 reached at the end of step bi) does not perfectly coincide with the initial first lateral edge 10. As a non-limiting example, the distance between the first initial lateral edge 10 and the first lateral edge 10 reached at the end of step bj can be between 250 pm and 1.5 mm for a substrate 1 of 300 mm on each side.The first cut DI is adjusted so that the first lateral zone ZL1 has the smallest possible area. When the lower part 2f of the stack 2 includes a superficial transparent conductive oxide layer 200 with an initial step, step bi) is advantageously carried out by a first cut DI of the substrate 1 adjusted to remove the first lateral part 2a of the stack 2 of active layers 20 and a first lateral zone ZL1 of the substrate 1, so that the first lateral edge 10 of the substrate 1 reached at the end of the first cut DI faces the initial step of the oxide layer. transparent conductive 200 surface. By way of non-limiting examples, the first DI cut can be executed by a laser cleavage technique (LDC for "Laser Direct Cleavage" in English), or by a thermal laser separation technique (TLS for "Thermal Laser Separation" in English), these techniques being known to those skilled in the art.

[0083] The method advantageously includes a step b2) consisting of removing the second lateral part 2b of the stack 2 of active layers 20 so as to reach the second lateral edge 11 of the substrate 1. Step b2) is advantageously carried out by a second cut D2 of the substrate 1 fitted to remove the second lateral part 2b of the stack 2 of active layers 20. The second cut D2 is made in the peripheral region Rp of the substrate 1. The second cut D2 is accompanied by the removal of a second lateral zone ZL2 of the substrate 1 extending into the peripheral region Rp of the substrate 1. Thus, the second lateral edge 11 of the substrate 1 reached at the end of step b2) does not perfectly coincide with the initial second lateral edge 11.By way of non-limiting example, the distance between the initial second lateral edge 11 and the second lateral edge 11 reached after step b2) can be between 250 µm and 1.5 mm for a substrate 1 with a side of 300 mm. The second cut D2 is adjusted so that the second lateral zone ZL2 has the smallest possible surface area. When the lower part 2f of the stack 2 includes a superficial conductive transparent oxide layer 200 with an initial step, step b2) is advantageously performed by a second cut D2 of the substrate 1 adjusted to remove the second lateral part 2b of the stack 2 of active layers 20 and a second lateral zone ZL2 of the substrate 1, so that the second lateral edge 11 of the substrate 1 reached after the second cut D2 faces the initial step of the superficial conductive transparent oxide layer 200.By way of non-limiting examples, the second cut D2 can be executed by a laser cleavage technique (LDC for "Laser Direct Cleavage" in English), or by a thermal laser separation technique (TLS for "Thermal Laser Separation" in English), these techniques being known to those skilled in the art.

[0084] The method advantageously includes a step b3) consisting of removing the third lateral portion 2c of the stack 2 of active layers 20 so as to reach the third lateral edge 12 of the substrate 1. Step b3) is advantageously carried out by a third cut D3 of the substrate 1 fitted to remove the third lateral portion 2c of the stack 2 of active layers 20. The third cut D3 is made in the peripheral region Rp of the substrate 1. The third cut D3 is accompanied by the removal of a third lateral zone ZL3 of the substrate 1 extending into the peripheral region Rp of the substrate 1. Thus, the third lateral edge 12 of the substrate 1 reaches The outcome of step b3) does not perfectly coincide with the initial third lateral edge 12. By way of non-limiting example, the distance between the initial third lateral edge 12 and the third lateral edge 12 reached at the end of step b3) can be between 250 µm and 1.5 mm for a substrate 1 with a side of 300 mm. The third cut D3 is adjusted so that the third lateral zone ZL3 has the smallest possible area. By way of non-limiting example, the third cut D3 can be made using a laser direct cleavage (LDC) technique or a thermal laser separation (TLS) technique, both of which are known to those skilled in the art.

[0085] The method advantageously includes a step b4) consisting of removing the fourth lateral part 2d of the stack 2 of active layers 20 so as to reach the fourth lateral edge 13 of the substrate 1. Step b4) is advantageously carried out by a fourth cut D4 of the substrate 1 fitted to remove the fourth lateral part 2d of the stack 2 of active layers 20. The fourth cut D4 is made in the peripheral region Rp of the substrate 1. The fourth cut D4 is accompanied by the removal of a fourth lateral zone ZL4 of the substrate 1 extending into the peripheral region Rp of the substrate 1. Thus, the fourth lateral edge 13 of the substrate 1 reached at the end of step b4) does not perfectly coincide with the initial fourth lateral edge 13.By way of non-limiting example, the distance between the initial fourth lateral edge 13 and the fourth lateral edge 13 reached at the end of step b4) can be between 250 µm and 1.5 mm for a substrate 1 with a side of 300 mm. The fourth cut D4 is adjusted so that the fourth lateral zone ZL4 has the smallest possible area. By way of non-limiting example, the fourth cut D4 can be made by a laser cleavage technique (LDC for "Laser Direct Cleavage"), or by a thermal laser separation technique (TLS for "Thermal Laser Separation"), these techniques being known to those skilled in the art.

[0086] The order of execution of steps b1, b2), b3), and b4) is irrelevant. In other words, the order of execution of steps b1, b2), where "i" is an integer between 2 and 4 depending on the number of native edges removed, is irrelevant.

[0087] Furthermore, all or part of steps bi), b2), b3), and b4) can be executed concurrently. In other words, at least two of the steps b;), where "i" is an integer between 2 and 4 depending on the number of native edges removed, can be executed concurrently.

[0088] Formation of passivation layer(s)

[0089] The process includes a step Ci) consisting of forming a first passivation layer PI on the first lateral edge 10 of the substrate 1 reached at the end of step bi). The first passivation layer PI has an effective surface recombination velocity strictly lower than SRV0. More precisely, the first passivation layer PI has an effective surface recombination velocity strictly lower than that of the initial passivation layer PO of the lateral parts 2a, 2b, 2c, 2d of stack 2. It should be noted that the effective surface recombination velocity of the first passivation layer PI depends on the technique of the first cut DI of step bi). As a non-limiting example, when the initial passivation layer PO is made in hydrogenated amorphous silicon, step Ci) can be carried out so that the first passivation layer PI is made in aluminum oxide.Step Ci) is performed by a deposition technique adapted to the material of the first passivation layer PL. By way of non-limiting example, when the first passivation layer PI is made in an aluminum oxide, step Ci) can be performed by atomic layer deposition (ALD) with thermal annealing at a temperature between 100°C and 600°C. By way of non-limiting example, the first lateral edge 10 of the substrate 1 reached at the end of step bi), passivated by the first passivation layer PI, can have a defect density at the interface (Dit, density of interface states) less than or equal to 109.

[0090] The process advantageously includes a step c2) consisting of forming a second passivation layer P2 on the second lateral edge 11 of the substrate 1 reached at the end of step b2). The second passivation layer P2 has an effective surface recombination rate strictly lower than SRV0. More precisely, the second passivation layer P2 has an effective surface recombination rate strictly lower than that of the initial passivation layer PO of the lateral parts 2a, 2b, 2c, 2d of the stack 2. It should be noted that the effective surface recombination rate of the second passivation layer P2 depends on the technique of the second cut D2 of step b2). As a non-limiting example, when the initial passivation layer PO is made in hydrogenated amorphous silicon, step c2) can be carried out so that the second passivation layer P2 is made in aluminum oxide.Step c2) is carried out by a deposition technique adapted to the material of the second passivation layer P2. By way of non-limiting example, when the second passivation layer P2 is made of an aluminum oxide, step c2) can be carried out by atomic layer deposition (ALD) with thermal annealing at a temperature between 100°C and 600°C. By way of non-limiting example, the second lateral edge 11 of the substrate 1 reached at the end of step b2), passivated by the second passivation layer P2, can have a defect density at the interface (Dit, density of interface states) less than or equal to 109.

[0091] The process advantageously includes a step c3) consisting of forming a third passivation layer P3 on the third lateral edge 12 of the substrate 1 reached at the end of step b3). The third passivation layer P3 has an effective surface recombination rate strictly lower than SRV0. More precisely, the third passivation layer P3 has an effective surface recombination rate strictly lower than that of the initial passivation layer PO of the lateral parts 2a, 2b, 2c, 2d of the stack 2. It should be noted that the effective surface recombination rate of the third passivation layer P3 depends on the technique of the third cut D3 of step b3). As a non-limiting example, when the initial passivation layer PO is made in hydrogenated amorphous silicon, step c3) can be carried out so that the third passivation layer P3 is made in aluminum oxide.Step c3) is carried out by a deposition technique adapted to the material of the third passivation layer P3. By way of non-limiting example, when the third passivation layer P3 is made of an aluminum oxide, step c3) can be carried out by atomic layer deposition (ALD) with thermal annealing at a temperature between 100°C and 600°C. By way of non-limiting example, the third lateral edge 12 of the substrate 1 reached at the end of step b3), passivated by the third passivation layer P3, can have a defect density at the interface (Dit, density of interface states) less than or equal to 109.

[0092] The process advantageously includes a step c4) consisting of forming a fourth passivation layer P4 on the fourth lateral edge 13 of the substrate 1 reached at the end of step b4). The fourth passivation layer P4 has an effective surface recombination rate strictly lower than SRV0. More precisely, the fourth passivation layer P4 has an effective surface recombination rate strictly lower than that of the initial passivation layer PO of the lateral parts 2a, 2b, 2c, 2d of the stack 2. It should be noted that the effective surface recombination rate of the fourth passivation layer P4 depends on the technique of the fourth cut D4 of step b4). As a non-limiting example, when the initial passivation layer PO is made in hydrogenated amorphous silicon, step c4) can be carried out so that the fourth passivation layer P4 is made in aluminum oxide.Step c4) is performed using a deposition technique adapted to the material of the fourth passivation layer P4. By way of non-limiting example, when the fourth passivation layer P4 is made of an aluminum oxide, step c4) can be performed by atomic layer deposition (ALD) with thermal annealing at a temperature between 100°C and 600°C. By way of non-limiting example, the fourth lateral edge 13 of the substrate 1 reached at the end of step b4) . passivated by the fourth passivation layer P4, may exhibit a defect density at the interface (“Dit”, interface state density) less than or equal to 109.

[0093] The order of execution of steps c1, c2), c3) and c4) is indifferent. In other words, the order of execution of steps c0, where "i" is an integer between 2 and 4 depending on the number of native edges removed, is indifferent.

[0094] Furthermore, all or part of steps C1), c2), c3), and c4) can be executed concurrently. In other words, at least two steps from among steps Cj), where "i" is an integer between 2 and 4 depending on the number of native edges removed, can be executed concurrently.

[0095] The materials of the first, second, third and fourth passivation layers PI, P2, P3, P4 are advantageously identical.

[0096] Obtaining photovoltaic subcells

[0097] The process advantageously includes a step d) consisting of cutting the substrate 1 along at least one cutting line L1, L2 extending into the central region Rc so as to obtain at least two photovoltaic subcells C. By way of non-limiting example, step d) can be carried out by a laser cleavage technique (LDC for "Laser Direct Cleavage") or by a thermal laser separation technique (TLS for "Thermal Laser Separation"), these techniques being known to those skilled in the art. Step d) is advantageously carried out so as to obtain at least two photovoltaic subcells C having identical surface areas.

[0098] Step d) is advantageously carried out so that said at least one cutting line L1, L2 is parallel to the normal to the upper and lower surfaces of the substrate 1.

[0099] The number of cutting lines L1, L2 will be chosen according to the number of photovoltaic sub-cells C desired and their desired format.

[0100] Step d) is advantageously executed after steps bj, b2), b3) and b4). In other words, step d) is advantageously executed after steps b;), where "i" is an integer between 1 and 4 depending on the number of native edges removed.

[0101] Step d) is advantageously executed before steps Ci), c2), c3) and c4). In other words, step d) is advantageously executed before steps cO, "i" being an integer between 1 and 4 depending on the number of native edges removed.

[0102] Said at least two photovoltaic subcells C have edges cut at the end of step d). The process advantageously includes a step e) consisting of coating each edge cut at the end of step d) with a passivation layer P' having an effective surface recombination velocity strictly less than SRV0. More precisely, the passivation layer P' has an effective surface recombination velocity strictly less than that of the pas- initial sivation PO of the lateral parts 2a, 2b, 2c, 2d of stack 2.

[0103] When step d) is carried out before steps cj, c2), c3) and c4), then step e) is advantageously carried out concurrently with steps cj, c2), c3) and c4). The passivation layer P' of step e) is advantageously made of the same material as the first, second, third and fourth passivation layers PI, P2, P3, P4.

[0104] The invention is not limited to the embodiments described. A person skilled in the art is able to consider their technically operative combinations, and to substitute equivalents for them.

Claims

Demands

1. A method for manufacturing a photovoltaic cell, comprising the steps: a) using an initial photovoltaic cell, comprising: - a substrate (1), based on crystalline silicon, and having: first and second lateral edges (10, 11) opposite, third and fourth lateral edges (12, 13) opposite, connecting the first and second lateral edges (10, 11); - a stack (2) of active layers (20), formed around the substrate (1), and comprising an initial passivation layer (PO) having an effective surface recombination velocity, denoted SRV0; the stack (2) having: first and second lateral parts (2a, 2b), extending respectively over the first and second lateral edges (10, 11) of the substrate (1), third and fourth lateral parts (2c, 2d), extending respectively over the third and fourth lateral edges (12, 13) of the substrate (1);bi) remove the first lateral part (2a) of the stack (2) of active layers (20) so as to reach the first lateral edge (10) of the substrate (1); Ci) form a first passivation layer (PI) on the first lateral edge (10) of the substrate (1) reached at the end of step bj, the first passivation layer (PI) having an effective surface recombination velocity strictly less than SRV0.;

2. A method according to claim 1, comprising the steps: b2) removing the second lateral part (2b) of the stack (2) of active layers (20) so as to reach the second lateral edge (11) of the substrate (1); c2) forming a second passivation layer (P2) on the second lateral edge (11) of the substrate (1) reached at the end of step b2), the second passivation layer (P2) having an effective surface recombination velocity strictly less than SRV0.

3. Method according to claim 1 or 2, comprising the steps: b3) remove the third lateral part (2c) of the stack (2) of active layers (20) so as to reach the third lateral edge (12) of the substrate (1); c3) form a third passivation layer (P3) on the third lateral edge (12) of the substrate (1) reached at the end of step b3), the third passivation layer (P3) having an effective surface recombination velocity strictly less than SRV0.

4. A method according to any one of claims 1 to 3, comprising the steps: b4) removing the fourth lateral part (2d) of the stack (2) of active layers (20) so as to reach the fourth lateral edge (13) of the substrate (1); c4) forming a fourth passivation layer (P4) on the fourth lateral edge (13) of the substrate (1) reached at the end of step b4), the fourth passivation layer (P4) having an effective surface recombination velocity strictly less than SRV0.

5. A method according to any one of claims 1 to 4, wherein: - step a) is carried out so that the stack (2) of active layers (20) comprises a surface transparent conductive oxide layer (200) having an initial step, set back from each lateral edge (10, 11, 12, 13) of the substrate (1), the initial step being preferably obtained by contouring; - step bi) is carried out by a first cut (Dl) of the substrate (1) fitted to remove the first lateral part (2a) of the stack (2) of active layers (20) and a first lateral zone (ZL1) of the substrate (1), so that the first lateral edge (10) of the substrate (1) reached at the end of the first cut (Dl) faces the initial step of the surface transparent conductive oxide layer (200).

6. A method according to claim 5 in combination with claim 2, wherein step b2) is performed by a second cut (D2) of the substrate (1) fitted to remove the second lateral part (2b) of the stack (2) of active layers (20) and a second lateral zone (ZL2) of the substrate (1), such that the second lateral edge (11) of the substrate (1) reached at the end of the second cut (D2) faces the initial detachment of the surface transparent conductive oxide layer (200).

7. A method according to claim 5 or 6 in combination with claim 3, wherein step b3) is performed by a third cut (D3) of the substrate (1) fitted to remove the third lateral portion (2c) of the stack (2) of active layers (20) and a third lateral zone (ZL3) of the substrate (1), such that the third lateral edge (12) of the substrate (1) is reached at the end of the third cut (D3) faces the initial detachment of the superficial transparent conductive oxide layer (200).

8. A method according to any one of claims 5 to 7 in combination with claim 4, wherein step b4) is performed by a fourth cut (D4) of the substrate (1) fitted to remove the fourth lateral part (2d) of the stack (2) of active layers (20) and a fourth lateral zone (ZL4) of the substrate (1), such that the fourth lateral edge (13) of the substrate (1) reached at the end of the fourth cut (D4) faces the initial detachment of the surface transparent conductive oxide layer (200).

9. A method according to any one of claims 1 to 8, wherein the substrate (1) of the initial photovoltaic cell used in step a) has: - a central region (Rc), - a peripheral region (Rp), extending around the central region (Rp), comprising the first and second lateral edges (10, 11) as well as the third and fourth lateral edges (12, 13); the method comprising a step d) of cutting the substrate (1) along at least one cutting line (L1, L2) extending into the central region (Rc) so as to obtain at least two photovoltaic subcells (C).

10. A method according to claim 9, wherein said at least two photovoltaic subcells (C) have edges cut at the end of step d); the method comprising a step e) consisting of coating each edge cut at the end of step d) with a passivation layer (P') having an effective surface recombination velocity strictly less than SRV0.

11. A method according to any one of claims 1 to 10, wherein step a) is carried out so that the initial passivation layer (PO) is made in hydrogenated amorphous silicon; and step Ci) is carried out so that the first passivation layer (PI) is made in aluminum oxide.