Generation of physical random values ​​using a resistive memory device

Abstract

Generation of physical random values ​​using a resistive memory device. This description relates to a device configured to generate a random value, the device comprising: a resistive memory device (102) capable of being programmed incrementally; and a control circuit (104) configured to: - perform a first programming operation with first programming parameters in order to generate a first conductance variation of a first polarity in the resistive memory device; - perform a second programming operation with second programming parameters in order to generate a second conductance variation of a second polarity, opposite to the first polarity, in the resistive memory device; and - generate the random value by reading a conductance value from the resistive memory device after the first and second programming operations.Figure for the abridged version: Fig. 1.

Description

Title of the invention: Generation of physical random values ​​using a resistive memory device. Technical field

[0001] The present description generally relates to the field of electronic devices, and in particular to the generation of physical random values ​​or numbers, as well as machine learning using such generation of physical random values ​​or numbers. Previous technique

[0002] Random number generation is used in various applications, ranging from cryptography to machine learning. Some solutions for generating random numbers are based on physical devices with variable behavior. However, the physical devices proposed in the past for random number generation present a difficulty: they tend to lack scalability for applications in which a relatively large number of random numbers need to be generated in parallel, and / or they are limited in terms of tuning the parameters of the probability distribution of the generated random numbers, such as the mean and standard deviation of the probability distribution.

[0003] There is therefore a need in the art for a solution for generating physical random values ​​or numbers which at least partially overcomes one or more drawbacks of the prior art. Summary of the invention

[0004] According to one aspect, a device configured to generate a random value is provided, the device comprising: a resistive memory device capable of being programmed incrementally; and a control circuit configured to: perform a first programming operation of the resistive memory device with the first programming parameters in order to generate a first conductance variation of a first polarity in the resistive memory device; perform a second programming operation of the resistive memory device with the second programming parameters in order to generate a second conductance variation of a second polarity in the resistive memory device, the second polarity being the polarity opposite to the first polarity; and generate the random value by reading a conductance value from the resistive memory device following the first and second programming operations.

[0005] According to one embodiment, the control circuit is further configured to perform an analog-to-digital conversion on the read conductance value in order to generate a random digital value.

[0006] According to one embodiment, the amplitude of the first programming parameters is different from the amplitude of the second programming parameters.

[0007] According to one embodiment, the resistive memory device is a domain wall device, and a pulse width, or number of pulses, applied to the domain wall device during the first programming operation is different from a pulse width, or number of pulses, applied to the domain wall device during the second programming operation.

[0008] According to one embodiment, the control circuit is configured to implement a Bayesian model update operation, wherein the amplitude of one of the first or second programming operations is based on the amplitude of a Langevin gradient, and the polarity of said one of the first and second programming operations is based on the sign of the Langevin gradient.

[0009] According to one embodiment, the amplitude of said first or second programming operation is proportional to a programming amplitude equal to:

[0010] programming - - (p ( j1V eÂA ( 9t ) j )

[0011] where [Math.5] is a Langevin gradient, [Math.5] is a learning rate, and [Math.5] <P is a function that converts the noise introduced by the application of the Langevin gradient into a programming amplitude.

[0012] According to one embodiment, a value of the first programming parameters is identical to a value of the second programming parameters, the control circuit being further configured to perform a third programming operation of the resistive memory device before the first programming operation or after the second programming operation.

[0013] According to one embodiment, the control circuit is configured to implement an update operation of the Bayesian model, in which the amplitude of said third programming operation is based on the amplitude of a Langevin gradient, and the polarity of the third programming operation is based on the sign of the Langevin gradient.

[0014] According to another aspect, a method for generating random values ​​is provided, the method comprising: the execution, by a control circuit, of a first programming operation of a resistive memory device with first programming parameters in order to generate a first conductance variation of a first polarity in the resistive memory device, the resistive memory device being able to be programmed incrementally; the execution, by the control circuit, of a second programming operation of the resistive memory device with the second programming parameters in order to generate a second conductance variation of a second polarity in the resistive memory device, the second polarity being the polarity opposite to the first polarity;and the generation of the random value by reading, via the control circuit, a conductance value from the resistive memory device following the first and second programming operations.

[0015] According to one embodiment, the method further comprises performing an analog-to-digital conversion on the read conductance value in order to generate a random digital value.

[0016] According to one embodiment, the amplitude of the first programming parameters is different from the amplitude of the second programming parameters.

[0017] According to one embodiment, the resistive memory device is a domain wall device, and a pulse width, or number of pulses, applied to the domain wall device during the first programming operation is different from a pulse width, or number of pulses, applied to the domain wall device during the second programming operation.

[0018] According to another aspect, a method for implementing an update operation of a Bayesian model is provided comprising the above method, wherein the amplitude of one of the first or second programming operations is based on the amplitude of a Langevin gradient, and the polarity of said first and second programming operations is based on the sign of the Langevin gradient.

[0019] According to one embodiment, an amplitude of the first programming parameters is the same as an amplitude of the second programming parameters, the method further comprising the execution, by the control circuit, of a third programming operation of the resistive memory device before the first programming operation or after the second programming operation.

[0020] According to yet another aspect, a method for implementing an update operation of a Bayesian model is provided comprising the above method, wherein the amplitude of said third programming operation is based on the amplitude of a Langevin gradient, and the polarity of the third programming operation is based on the sign of the Langevin gradient. Brief description of the drawings

[0021] These features and advantages, as well as others, will be described in detail in the following description of particular embodiments, given by way of non-limiting example, in relation to the accompanying figures, among which:

[0022] Fig. 1 schematically illustrates a device for generating random values ​​according to an example of an embodiment of the present description;

[0023] Fig. 2 shows graphs illustrating an example of conductance variations of a resistive memory device of the device of Fig. 1;

[0024] The [Fig.3] is a graph illustrating an example of probability distribution for a change in position of a domain wall of the resistive memory device of the [Fig.1];

[0025] Fig. 4 is a flowchart illustrating the operations of a process for generating a random value according to an example of an embodiment of the present description;

[0026] Fig. 5 represents graphs illustrating an example of a probability distribution for a change in position of a domain wall in the case where programming operations of opposite polarities are applied to the resistive memory device;

[0027] Fig. 6 represents graphs illustrating another example of probability distribution for a change in position of a domain wall in the case where programming operations of opposite polarities are applied to the resistive memory device;

[0028] Fig. 7 represents graphs illustrating another example of probability distribution for a change in position of a domain wall in the case where programming operations of opposite polarities, and an additional programming operation, are applied to the resistive memory device;

[0029] Fig. 8 represents graphs illustrating another example of probability distribution for a change in position of a domain wall in the case where programming operations of opposite polarities and different durations are applied to the resistive memory device;

[0030] Fig. 9 is a graph illustrating an example of an SGLD algorithm (from the English "Stochastic Gradient Langevin Dynamics") involving random sampling;

[0031] Fig. 10 schematically illustrates a device capable of machine learning according to an example of an embodiment of the present description;

[0032] Fig. 11 A is a flowchart illustrating the operations of a process for putting into implementation of an SGLD model update operation according to an example of an embodiment of this description;

[0033] Fig. 1 IB represents graphs illustrating an operation to update the SGLD model according to an example of an embodiment of the present description;

[0034] The [Fig. 12] is a graph representing examples of Langevin gradient and Gaussian samples according to an example of an embodiment of the present description;

[0035] Fig. 13 schematically illustrates a network of domain wall resistive memory devices according to an example of an embodiment of the present description;

[0036] The [Fig. 14] is a graph representing discrete level probability distributions of a domain wall device;

[0037] The [Fig. 15] is a flowchart illustrating operations of a machine learning algorithm based on an MCMC according to a specific example in which it is implemented using a domain wall device;

[0038] Fig. 16 is a flowchart illustrating a method for generating a prediction according to an example of an embodiment of the present description;

[0039] Figure 17 illustrates an example of input and output data of the distribution;

[0040] Figure 18 is a graph representing results as a function of the accuracy of a DW device;

[0041] Figure 19 is a graph illustrating the effect of the size of a table; and

[0042] Figure 20 is a graph illustrating the performance of input detection and the output of the distribution of a model. Description of the implementation methods

[0043] The same elements have been designated by the same reference numerals in the different figures. In particular, the structural and / or functional elements common to the different embodiments may have the same reference numerals and may have identical structural, dimensional and material properties.

[0044] Unless otherwise specified, when referring to two elements connected between them, this means directly connected without intermediate elements other than conductors, and when referring to two connected elements (in English "coupled") between them, this means that these two elements can be connected or linked via one or more other elements.

[0045] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "superior", "inferior", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made, unless otherwise specified, to the orientation of the figures.

[0046] Unless otherwise specified, the expressions "approximately", "about", "Approximately" and "on the order of" mean within 10%, preferably within 5%.

[0047] Figure 1 schematically illustrates a random value generation device 100 according to an example embodiment of the present description. The device 100 comprises, for example, a resistive memory device 102 and a control circuit 104 (CTRL CIRCUIT).

[0048] The resistive memory device 102 is, for example, of the type that can be programmed incrementally. This means, in particular, that a programming operation can be used to modify the conductance from an initial conductance value, and that the resulting conductance is a function of the amplitude and polarity of a given parameter of the programming operation and also of the initial conductance value. Examples of resistive memory devices having this property include the following: 1) Domain wall (DW) magnetic devices, described for example in the publications: Kumar, Durgesh, et al. "Domain wall memory: Physics, materials, and devices". Physics Reports 958 (2022): 1-35; and Sbiaa, R., and SN Piramanayagam. "Multi-level domain wall memory in constricted magnetic nanowires". Applied Physics A 114 (2014): 1347-1351; and 2) Phase change memory as described in the publication: La Barbera, Selina, et al. "Narrow Heater Bottom Electrode-Based Phase Change Memory as a Bidirectional Artificial Synapse", Adv. Electron. Mater. 2018, 4, 1800223.

[0049] Figure 1 illustrates an example in which the device 102 is a DW device, which comprises, for example, two stacked magnetic layers 106 and 108. A DW device is a non-volatile memory that can be multi-level. The device has three electrodes 110, 112, 114, each of which is, for example, connected to the control circuit 104.

[0050] The electrode 110 is in contact with the upper "pinched" layer 106, which comprises only the high magnetic spin, represented by upward-pointing arrows in layer 106. For example, the electrode 110 is in contact with an upper surface of layer 106.

[0051] The electrodes 112, 114 are in contact with the lower "free" layer 108 and, for example, with the lateral ends of the lower layer 108. The lower layer 108 comprises a high-spin magnetic region, represented by upward-pointing arrows in the layer 108, and a low-spin magnetic region, represented by downward-pointing arrows in the layer 108. A domain wall (DW) corresponds to the interface between the high-spin and low-spin regions. In the example of [Fig. 1], the high-spin magnetic region extends from electrode 112 to the domain wall DW, and the low-spin magnetic region extends from electrode 114 to the domain wall DW.

[0052] By passing, using the control circuit 104, at least one electrical current pulse between electrodes 112 and 114, in either direction, the position of the domain wall DW between the high-spin and low-spin magnetic portions can be moved linearly towards electrode 112, or symmetrically towards electrode 114. In particular, the polarity of this at least one current pulse determines the direction in which the domain wall DW moves. For example, during a write operation, the control circuit 104 is configured to connect electrode 114 to ground, to leave electrode 110 floating or at high impedance, and to apply at least one positive or negative write current pulse to electrode 112.

[0053] By applying a voltage between one of the electrodes 112, 114 and the upper electrode 110 using the control circuit 104, it is possible to read the current flowing through the DW device. This current depends on the amplitude of the tunneling magnetoresistance (TMR) between the two layers 106, 108. The TMR itself depends on the ratio between the high spin in the upper fixed layer 106 and the high spin in the lower free layer 108. Therefore, by moving the position of the DW domain wall, the conductance of the device can be changed linearly. This allows the device to store data in a non-volatile manner. For example, to perform a read operation, the control circuit 104 is configured to connect the upper electrode 110 to ground, to leave electrode 114 floating or at high impedance, and to apply a read pulse to electrode 112.The conductance of the device between electrode 112 and the upper electrode 110 is then, for example, proportional to the reading current.

[0054] For example, assuming that the domain wall DW is in an initial position represented by a dashed line in Figure 1, applying a current pulse between electrodes 112 and 114 causes, for example, a displacement AX of the domain wall, and this displacement can be positive or negative depending on the polarity of the current. For example, a positive current pulse applied through layer 108 from electrode 112 to electrode 114 causes the wall to be displaced from the DW domain towards electrode 114, and a negative current pulse applied through layer 108 from electrode 112 to electrode 114, which is equivalent to a positive current pulse applied from electrode 114 to electrode 112, causes the DW domain wall to move towards electrode 112.

[0055] Fig. 2 is a graph illustrating an example of variations in the conductance (g) of a resistive memory device of the device of Fig. 1 as a function of time t, and in response to current pulses applied to the device.

[0056] For example, the conductance g of device 102 is initially at a level gl. At time t1, a negative current pulse pl is applied to electrode 112, causing the wall of domain DW to move towards electrode 112, and thus decreasing the conductance to a level g2. At time t2, a negative current pulse p2, whose amplitude and width are similar to those of the pulse pl, is applied to electrode 112, causing a further displacement of the wall of domain DW towards electrode 112, and thus decreasing the conductance to a level g3. At time t3, a positive current pulse p3 is applied to electrode 112, causing the wall of domain DW to move towards electrode 114, and increasing the conductance.For example, the p3 pulse has a similar amplitude to the pl and p2 pulses, but twice as wide, and the conductance therefore increases to a level close to the initial conductance level gl.

[0057] However, the change in position of the DW domain wall in response to a current pulse is subject to various sources of variability. It is therefore more accurate to describe the change in position, and thus the change in conductance, using a probability distribution, as will be described with reference to [Fig. 3].

[0058] Figure 3 is a graph illustrating an example of a probability distribution p(AX) for a change in position AX of the wall of the DW domain of the resistive memory device 102 of Figure 1 in response to a positive current pulse of a given pulse width and amplitude. The distribution may, for example, extend between a minimum displacement AXmin and a maximum displacement AXmax and exhibit a single peak at a displacement AXpeak.

[0059] It has been observed that the shape of the probability distribution is influenced by the width and amplitude of the programming current pulse. For example, for a given programming current intensity, the greater the pulse width, the greater the width of the probability distribution; in other words, the greater the distance between AXmin and AXmax.

[0060] It has also been found that the probability distribution is symmetrical with respect to the polarity of the current pulse. In other words, the same distribution The probability will be obtained for a negative impulse than for a positive impulse, the difference being that the displacement of the domain wall will be by a negative shift rather than a positive one.

[0061] Figure 4 is a flowchart illustrating the operations of a method 400 for generating a random value, centered on a current value, according to an example embodiment of the present description. The method in Figure 4 is, for example, implemented by the control circuit 104 connected to the resistive memory device 102.

[0062] In operation 401, a first programming operation of the resistive memory device 102 is performed based on initial programming parameters to create a conductance variation of a first polarity. The term "polarity" is used in reference to the conductance variation to denote an increase or decrease in conductance. For example, in the case of the domain wall device, the programming parameters define the pulse width, amplitude, and polarity of the current pulse, and in some cases the number of current pulses, applied between the electrodes 112 and 114 of the device, and the conductance variation is the result of the variation in the position of the domain wall. In other resistive memory technologies, the programming parameters may define other variables, such as the voltage amplitude.

[0063] In operation 402, a second programming operation of the resistive memory device 102 is performed based on second programming parameters in order to create a conductance variation of a second polarity opposite to the first polarity. In other words, if the conductance variation of the first polarity is an increase in conductance (corresponding to a decrease in resistance), the conductance variation of the second polarity is a decrease in conductance (corresponding to an increase in resistance), and vice versa. In some embodiments, the first and second programming parameters are equal and opposite, so that the probability distributions are also equal and opposite.For example, in the case of a DW device, the first and second programming operations are both based on current pulses of the same width and amplitude, but one of the pulses is positive and the other negative. Furthermore, as described in more detail below, in some embodiments, there may be a shift between the first and second programming parameters in order to achieve a desired distortion between the conductance variations.

[0064] In operation 403, the programmed conductance of the resistive memory device 102 is read in order to generate a random value. In some embodiments, the random value read is converted from an analog value, such as a

[0065]

[0066]

[0067]

[0068]

[0069] voltage or current level, into a numerical value by an analog-to-digital converter (not shown) which, for example, is part of the control circuit 104. Advantageously, this random value will be a function of a probability distribution having the form of a normal distribution, in other words a Gaussian distribution, with a mean value and a standard deviation which can be controlled independently using the first and second programming parameters, as will be described in more detail with reference to Figures 5 to 8. Figures 5 through 8 illustrate probability distribution graphs resulting from the example of programming a domain-walled memory device with a variable-width current pulse. It is obvious to those skilled in the art that similar effects can be achieved using other types of resistive memory devices capable of incremental programming, such as the PCM devices mentioned above. Figure 5 shows graphs illustrating an example of a probability distribution for a change in the position of a domain wall when programming operations of opposite polarities are applied to the resistive memory device. Furthermore, the programming parameters are substantially equal and opposite, and in particular, the widths and amplitudes of the current pulses are substantially the same.In particular, Figure 5 shows a graph 502 of the probability density function associated with the first programming operation based on a positive current pulse, which causes a positive displacement (AX+) of the domain wall; a graph 504 of the probability density function associated with the second programming operation based on a negative current pulse, which causes a negative displacement (AX-) of the domain wall, the negative pulse having the same pulse width and amplitude as the positive current pulse; and a graph 506 representing the resulting probability distribution of the two programming operations, which corresponds to the normal summation law. In particular, this probability distribution p(AX) is centered around zero, which implies that the average displacement is the initial position of the domain wall. For example, the position of the wall of the sampled domain x can be expressed as follows: P(X) ~ / OR [Math.l] x + And [Math.l] x. are the means of the normal distributions of the positive and negative displacement of the domain wall, respectively, [Math.l] a(T) is a function giving the standard deviation of the normal depending on the pulse width T, and [Math.l] x0 is the original position of the domain wall.

[0070] By varying the pulse widths T used for the positive and negative pulse pairs, it is possible to determine the standard deviation of the probability distribution used to generate the random number. It is important to note that this standard deviation can be defined independently of the mean of the distribution.

[0071] Furthermore, for small values ​​of T, the ratio of the device conductance range divided by the minimum achievable standard deviation with the shortest pulse width is likely to be relatively high. This allows, for example, tighter distributions with a lower standard deviation, which is useful for certain applications. For example, according to the SGLD (Stochastic Gradient Langevin Dynamics) algorithm described below, the optimal ratio is generally relatively low.

[0072] Figure 6 shows graphs illustrating another example of a probability distribution for a change in the position of a domain wall when programming operations of opposite polarities are applied to the resistive memory device. Graphs 602, 604, and 606 in Figure 6 are similar to graphs 502, 504, and 506 in Figure 5, except that the positive and negative current pulses have a larger pulse width in the example in Figure 6, and therefore the resulting probability distribution p(AX) is also wider, with a mean still equal to zero.

[0073] In some cases, it may be desirable for the random value to be selected from a probability distribution exhibiting a mean shift from the initial value. Solutions for generating such a shift are described with reference to Figures 7 and 8.

[0074] Figure 7 shows graphs illustrating another example of a probability distribution for a change in the position of a domain wall in the case where programming operations of opposite polarities, and an additional programming operation, are applied to the resistive memory device. In particular, graphs 702 and 704 illustrate the probability distributions for a positive and a negative current pulse, respectively, similar to graphs 502 and 504 in Figure 5. Furthermore, after performing the first and second programming operations, a third programming operation is performed, represented by graph 706, involving the application of a new current pulse that shifts the resulting probability distribution by an amount delta 5. In the example in Figure 7, the third programming operation consists of applying a new negative current pulse. As graph 708 shows, the resulting probability distribution is the sum of the probability distributions of the three graphs 702, 704, and 706, and therefore the offset 5 shifts the probability distribution in the negative direction.

[0075] Figure 8 shows graphs illustrating another example of a probability distribution for a change in the position of a domain wall when programming operations of opposite polarities and different durations are applied to the resistive memory device. In the example in Figure 8, only two programming operations are applied, but the pulse widths during the first and second programming operations are different. Figure 8 specifically illustrates an example of a current pulse 802 (PUSH) applied during the first programming operation, and an example of a current pulse 804 (PULL) applied during the second programming operation. The current pulses 802 and 804 have, for example, the same amplitude. The current pulse 802, for example, has a pulse width of s and the current pulse 804, for example, has a pulse width of s + L.The portion of the pulse width e that is common to both pulses 802 and 804 leads, for example, to a symmetric distribution, centered on the current value (e.g., a normal probability distribution p(ε)) represented by graph 806. The additional portion L of pulse 804, for example, leads to a probability distribution p(L) represented by graph 808, which modifies the overall probability distribution in a similar way to that illustrated in graph 708 of [Fig. 7].

[0076] The possibility of defining the standard deviation of the probability distribution independently of the mean of the distribution makes the solution described here particularly advantageous in Markov chain Monte Carlo machine learning processes. Indeed, the probability distribution is the same regardless of the current position of the domain wall. Examples of the application of the described solution to MCMC processes will now be described in more detail with reference to Figures 9 to 15.

[0077] Figure 9 is a graph illustrating an example of the SGLD algorithm, which involves random sampling. In particular, this algorithm is a type of Markov Chain Monte Carlo (MCMC) sampling approach widely applied in machine learning. It is a probabilistic alternative to approaches involving learning maximum likelihood models entirely based on the gradient.

[0078] According to gradient-based learning, the algorithm is based on a loss function, and the objective is to determine an optimal model that minimizes the loss. One of the main drawbacks of loss-based approaches is that, in the case of low-precision model parameters or parameter updates, the algorithm may not converge to the optimal model. This is often the case when learning using a resistive memory-based model.

[0079] In contrast, according to MCMC learning, the objective is to estimate the probability density of a posterior distribution. In particular, as shown in Figure 9, MCMC learning is based on determining an approximation of the posterior distribution of the probability density of the model S. To do this, starting from an initial model, a chain of random samples is generated using localized random jumps guided by the Langevin gradient. Figure 9 illustrates an example of the first random sampling operation in which a calculated weight gradient is added to the initial model, and the weight sample corresponds to random sampling around the new model.This process is repeated, for example on the basis of an update equation of the SGLD algorithm, until an approximation of the posterior distribution has been generated. In some cases, the approximation is further facilitated by rejection steps according to the Metropolis-adjusted Langevin algorithm (MALA).

[0080] One advantage of the approach represented by [Fig.9] is that the resulting a posteriori approximation can be used to make accurate predictions, especially with a small amount of noisy training data, in addition to providing well-calibrated uncertainty estimates related to these predictions.

[0081] Figure 10 schematically illustrates a Bayesian machine learning device 1000 according to an example embodiment of the present description. For example, the device 1000 comprises a resistive memory array 1002, which is an array of resistive memory devices 102 as described herein. The array 1002 is, for example, connected to a processing device 1004, which is configured to control read and write operations on the memory devices. resistive matrix 1002. The processing device 1004 is also connected, for example, to another memory 1006 (MEMORY), implemented by one or more non-volatile memory devices, such as a hard drive and / or Flash memory, and / or by one or more volatile memory devices, such as RAM (Random Access Memory). For example, the processing device 1004 includes one or more processors configured to execute instructions stored in memory 1006 and perform calculations such as calculating the partial derivative of a parameter and converting it to pulse width, which can be used to program a device. In addition, or alternatively, the functions of the processing device 1004 could be at least partially implemented by hardware, for example, by one or more ASICs (Application-Specific Integrated Circuits)..

[0082] Memory 1006 is also configured, for example, to store a training dataset 1008 used for training a Bayesian neural network model. In some cases, memory 1006 can also store a Bayesian neural network model 1010 resulting from the training operation, for example, where resistive memory array 1002 is used to generate the samples for the model, and then an ADC is used to store these samples in memory 1010. The Bayesian neural network model, for example, also stores parameters related to Bayesian neural networks, such as activation vectors calculated by applying activation functions to the currents produced internally by the network, or the activation mean and standard deviations used to perform batch normalization.

[0083] In some embodiments, the processing device 1004 is also connected to a control interface 1012 (CTRL INTERFACE). For example, after training, the device 1000 is configured to perform inference using the trained Bayesian NN model 1010. The control interface 1012 is, for example, connected to one or more sensors (not shown) and / or one or more actuators (also not shown). The one or more sensors include, for example, one or more image sensors, depth sensors, heat sensors, microphones, or any other type of sensor. For example, the one or more sensors 320 include an image sensor with a linear or two-dimensional pixel array.The image sensor is, for example, a visible light image sensor, an infrared image sensor, an ultrasonic image sensor, or an image depth sensor, such as a LIDAR image sensor (Light Detection and Ranging, or laser remote sensing or laser distance detection and estimation). In this case, the input data samples captured by the sensors and provided to the processing device 1004 are images, and the processing device 1004 is... configured to perform image processing on images to determine one or more actions to be applied via actuators. The one or more actuators include, for example, a robotic system, such as a robotic arm trained to pull weeds or pick ripe fruit from a tree, an automatic steering or braking system in a vehicle, or an electronic actuator, which is configured, for example, to control the operation of one or more circuits, such as waking a circuit from sleep mode, activating a circuit in sleep mode, generating text by a circuit, performing a data encoding or decoding operation, etc. As another example, the one or more sensors are indoor and / or outdoor temperature sensors for a building's heating and / or cooling system, which may include a heat pump as the primary energy source.In this case, the one or more actuators are, for example, activation circuits that activate heating or cooling systems.

[0084] Although [Fig. 10] illustrates an example in which learning and inference are implemented by the same device, in other embodiments these functions could be implemented by separate devices, one device being used for learning in order to generate the NN 1010 model, and the other device receiving the trained NN 1010 model, and performing the inference on the basis of this model.

[0085] Figure 11A is a flowchart illustrating operations of a process 1100 of Implementation of an SGLD model update operation according to an example embodiment of this description. The process 1100 is for example implemented by device 1000 of [Fig. 10].

[0086] According to the embodiments described here, an SGLD model update operation is, for example, implemented on the basis of the following equation: [OO87] =

[0088] where [Math.2] is the updated model, [Math.2] is the current model, [Math.2] is a Langevin gradient of the model, calculated, for example, from a dataset with respect to a set of labels. The term [Math.2] is generally the sum of a likelihood term and the prior distribution of the model. For a classification problem, the likelihood might be the cross-entropy over a mini-lot of labeled data, and the prior could be defined as a Gaussian distribution. The Langevin gradient is also commonly multiplied by a factor when used in the context of a mini-lot, for example, equal to N / n, where N is the number of data points in a training set and n is the size of the mini-lot. In practice, these quantities are, for example, calculated in the logarithmic domain, which transforms multiplications into sums and avoids numerical underflow problems. The symbol [Math.2] is a learning rate, for example between le-5 and le-3, and [Math.2] is a unit Gaussian sample. In some cases, the learning rate, and therefore the standard deviation of the Gaussian samples, is reduced exponentially. Alternatively, the standard deviation of the Gaussian sample e is maintained at a fixed value or is controlled to move from a lower value to a higher value by following a cosine function.

[0089] In an operation 1101, the Langevin gradient ÂA ( ) is for example calculated as the derivative of the following equation:

[0090] aa (^) = rlogp (y fa) - logX^)

[0091] where the hyperparameter [Math.3] allows the likelihood contribution to be scaled in order to compensate for the noise of stochastic gradients, [Math.3] is the likelihood of the model [Math.3] on the data from a mini-batch [Math.3] of the training dataset, which includes for example mini-batches containing d data points, and [Math.3] logX^) is the prior assumption about the model parameters.

[0092] After operation 1101, a parameter update operation is performed on each parameter of the model based on the Langevin gradient calculated during operation 1101. For example, this operation is carried out using three programming steps 1103, 1104 and 1105 performed on each parameter.

[0093] In the programming step 1103, a resistive memory device 102 of the matrix 1002 storing the parameter is programmed based on initial programming parameters to create a conductance variation of a first amplitude that is proportional to the Langevin gradient, and of a first polarity that is a function of the sign of the Langevin gradient. For example, in the case of the domain wall device, the amplitude is defined by the pulse width, and the polarity of the current pulse applied between the electrodes 112 and 114 of the device defines the sign.

[0094] During programming step 1104, following programming step 1103, a second programming operation of the resistive memory device 102 is performed based on second programming parameters in order to create a second conductance variation of a second polarity and a second amplitude. For example, the second polarity may be the same as or opposite to the first polarity.

[0095] During programming step 1105, following programming step 1104, a third programming operation of the resistive memory device 102 is performed based on third programming parameters in order to create a conductance variation of a third polarity opposite to the second polarity. In other words, if the conductance variation of the second polarity is an increase in conductance, the conductance variation of the third polarity is a decrease in conductance, and vice versa. The second and third programming parameters are, for example, equal and opposite, so that the probability distributions will also be equal and opposite. For example, in the case of a DW device, the second and third programming operations are both based on current pulses of the same width and amplitude, but one of the pulses is positive and the other negative.

[0096]

[0097]

[0098] The second and third programming operations 1104 and 1105 are, for example, used to apply the sampling noise of the operation of SGLD model update. For example, in the case of programming a domain-walled memory device with a variable-width current pulse, the amplitude of the pulse widths of the second and third programming operations is, for example, proportional to • In some modes In practice, it would also be possible to reduce the pulse widths of the second and third programming operations by the amount of noise in the pulse width of the first programming operation. In other words, assuming that the total noise part corresponds to a pulse width E, if the amplitude of the part of the Langevin gradient results in noise corresponding to a pulse width of 1, the pulse widths applied during the second and third programming operations will generate a noise contribution equal to (E1). This is illustrated in more detail in [Fig. 1 IB]. Figure [Fig.llB] represents graphs illustrating an operation to update the SGLD model according to an example of an embodiment of the present description. The principle of SGLD is illustrated by the graph on the left side of Figure 1 IB showing the probability density function p(g) of a model g, where samples (crosses) are generated by moving along a Langevin gradient (arrow L), and then perturbing this update with a sample from a unitary noise distribution (distribution fe). The graphs on the right side of Figure 1 IB illustrate how this update can be achieved by a pair of out-of-phase push-pull current pulses ("push", "pull"), which provide a sample from the distribution Σ as well as the Langevin gradient V ^^( 1¾ ) • In particular, in In the example shown in Figure 1 IB, the "push" current pulse implements the second programming operation 1104, and the "pull" pulse implements the first and third programming operations 1103 and 1105 in the form of a single "pull" current pulse. For example, the duration of the TpUSh pulse of the push current pulse is equal to: [00991 ^ = ^-^(5(7^(9,)1)

[0100] where [Math.4] <p is a function that converts the noise introduced by applying the Langevin gradient into a pulse width, and this part [Math.4] I) represents the quantity 1 by which pulse widths can be shortened. Pulse duration [Math.4] TpuU the traction current impulse is, for example, equal to [Math.4] T pull = T push + TL Or [Math.4] Tl is proportional to the Lange gradient [Math.4]

[0101] More generally, whether or not the programming operations are performed by current pulses or by other means, one of the programming operations has, for example, an amplitude proportional to a programming amplitude equal to:

[0102] programming = ^2^ - (p ( j | V pÂA ( Qt ) | )

[0103] where [Math.5] <p is now a function that converts the noise introduced by the application of the Langevin gradient into a corresponding programming amplitude.

[0104] Referring again to [Fig. 11 A], in some embodiments, a random value is generated by reading the programmed conductance of the resistive memory device 102 following the programming operation 1105. In addition, this random value is for example converted from an analog value, such as a voltage or a current level, into a digital value by an analog-to-digital converter (not shown) which is for example part of the control circuit 104.

[0105] In alternative embodiments, it would be possible to perform the first programming operation 1103 after the second and third programming operations 1104, 1105, or after the second programming operation 1104 and before the third programming operation 1105, and / or to combine the first programming operation with the second or third programming operation.

[0106] One advantage of the method in Figure 1 IA for implementing the SGLD is that any lack of precision available in the programming of a resistive memory device, such as a DW device, is effectively masked by the random sampling processing or even absorbed by the noise generated by the two programming operations, which are equal and opposite. For example, assuming that the learning factor is less than 1, which is generally the case, the square root operation ensures that Gaussian noise contributes more to the update on average than the Langevin gradient. This phenomenon is illustrated in [Fig. 12].

[0107] Figure 12 is a graph representing examples of the Langevin gradient term VyÂ^( (¾) and Gaussian samples according to an example embodiment of the present description. In particular, [Fig. 12] illustrates examples based on a typical SGLD update step, and the weight update histogram for all synapses in a layer is shown. It can be observed that, in most cases, the noise from the Gaussian sampling dominates the deterministic updates, which generally corresponds to 95% of cases. For the remaining cases, typically equal to about 5% of cases, although the Langevin update is larger than the Gaussian noise update, because the gradient is actually so large, it is easy to obtain an update step in the correct direction despite the variability associated with the device programming.

[0108] Figure 13 schematically illustrates a matrix 1300 of domain-walled resistive memory devices 102 according to an example embodiment of the present description. This DW 1300 memory matrix is, for example, part of the resistive memory matrix 1002 of Figure 10.

[0109] The DW 1300 memory matrix comprises M columns (M COLUMNS), M being equal to 4 in the example in [Fig. 13], and N rows (N ROWS), N being equal to 3 in the example in [Fig. 13]. In some embodiments, each row of the DW 1300 memory matrix acts as a sample of the parameters of a neuron in a Bayesian neural network. A fully connected neural network layer can be composed of a number of these Bayesian neurons in one layer, and then of several such layers. Each Bayesian neuron can be stored and sampled using a separate matrix, or several Bayesian neurons can share the same physical matrix in which the different neurons use different row index ranges to store their samples. According to one embodiment, Several matrices such as matrix 1300 can be used as multiple samples of a complete layer in the neural network model.

[0110] Each device 102 is part of a cross-dot cell in the matrix 1300 which also includes a transistor 1302 and a transistor 1304.

[0111] An input voltage line Vin[0] to Vin[M1] is, for example, associated with each column and is connected, for example, via a control line corresponding to the electrode 112 of each of the devices 102 in its corresponding column. The electrode 114 of each of the devices 102 in a given column is, for example, connected, via the main conducting nodes of its corresponding transistor 1302, to a programming voltage Vprg[0] to Vprg[M1] supplied on a corresponding column line by a pulse generation unit (PULSE GEN). The gates of the transistors 1302 in each line are, for example, connected to a corresponding programming line selection signal Vsp[0] to Vsp[N1] supplied on a corresponding control line.The upper electrode 110 of each of the devices 102 in a given row is, for example, connected, via the main conducting nodes of its corresponding transistor 1304 and the main conducting nodes of a column output transistor 1306, to a corresponding line current output providing an output current iout[0] to iout[Nl]. The gates of the transistors 1304 in a given column are, for example, connected to a corresponding column read-select signal Vsr[0] to Vsr[Ml] supplied on a corresponding control line. The gates of the transistors 1306 are, for example, controlled by a corresponding N-select signal Vsn[0] to Vsn[Nl] supplied on a corresponding control line.

[0112] The example in [Fig. 13] will be described assuming unsigned parameters, i.e., a single positive conductance per parameter, and a matrix configuration that does not support multiplication and accumulation. In the case of signed parameters, i.e., the subtraction of two positive conductances per parameter, two such matrices could be used and the currents produced by each could be subtracted, for example, using a simple circuit based on two stacked current mirrors. A person skilled in the art will understand how these principles can be extended to signed cross-points, with a pair of devices and matrices capable of MAC.

[0113] In the case of the Bayesian neuron where a matrix stores samples of its input weights, each column of the matrix 1300 stores, for example, all the samples of a parameter, with N samples being generated per parameter. In read mode, the voltage Vin is applied to one of the columns. This voltage corresponds, for example, to an input data characteristic. The signal of The selection signal Vsr is applied to the gates of the 1304 transistors in this column, resulting in a current output, iout, on the right side of the matrix. This output corresponds to the multiplication of the input data value by each sample of a parameter. By iterating over all columns, it is possible to access the stored samples of all N rows. It would also be possible to read a device from one row at a time—this is what would be done during the model training phase. This can be achieved, for example, by selecting a single row using the selection signal Vsn.

[0114] During the writing phase, i.e., the model learning by the SGLD algorithm, the pulse generation unit is, for example, connected to one of the N lines corresponding to the current sample by setting the appropriate programming selection signal Vsp. In this case, the input voltage Vin serves as the reference voltage or virtual ground. The pulse generation unit is, for example, configured to calculate, for each of the M parameters, the programming pulse sequence to be applied, where the pulse width and polarity determine, for example, the extent to which the domain wall will be displaced. In some embodiments, the pulses are applied in parallel for all the M parameters of the network line being programmed. All other selection signals are grounded.

[0115] In some embodiments, a procedure for thinning samples on the fly is possible. According to this procedure, instead of advancing from one row to the next, many samples are produced in each row before moving on to the next. Consequently, only the last sample in each row is stored in the array, the others having been thinned on the fly. When moving from one row to the next, a calibration step is performed, for example, to bring the devices in row n as close as possible to the corresponding devices in row n-1. This can be done, for example, by reading a device in row n-1 and applying a pulse to the device in row n to reduce the difference between their conductances, and repeating these steps until the conductance difference is within an acceptable tolerance.This can introduce a slight error between the last sample of row n-1 and the initial sample of row n. However, in practice, this perturbation has proven beneficial for the performance of the model trained by the SGLD, as it facilitates better exploration of the model a posteriori, especially if it has many modes.

[0116] In certain embodiments, in order for the DW-SGLD to operate continuously, instead of stopping when the process reaches the last row of the table, it is possible to return to the first row, thereby overwriting the sample that was previously stored in the first row. This solution is interesting from the perspective of continuous learning and changes in domain distribution.

[0117] Figure 14 is a graph representing the probability distributions (Probability, p( A$T, P)) of discrete domain-wall changes (Domain-wall change, AX (pm)) of a domain-wall device. In the example in [Fig. 14], a case is illustrated in which each domain-wall device 102 can be programmed to have one of 10 distinguishable discrete levels with positive and negative pulses of durations T = 10, 20, 30, 40 and 50 ns, and it is therefore possible to generate at least 14 non-overlapping Gaussians. In practice, it was found that the 102-domain wall device could be programmed to have at least one of the 256 distinguishable discrete levels, which allows at least 256 non-overlapping Gaussians to be generated - corresponding to an 8-bit memory element.

[0118] The [Fig. 15] is a flowchart illustrating operations of a machine learning algorithm 1500 based on MCMC according to a specific example in which it is implemented using the device 1000 of the [Fig. 10] and the domain wall matrix 1300 of the [Fig. 13].

[0119] In a 1501 operation, a variable n is, for example, set to 0, and a count value C is set to an initial value thinning_ratio, for example, 256 or some other value. The thinning ratio is used to reduce memory requirements and improve the "mixing" of the chain. In particular, instead of storing all the samples, thinning is performed by storing, for example, every 1000 samples.

[0120] In an operation 1502, for example, for each epoch e among one or more epochs, and for example, for each batch b among one or more batches, an operation 1503 is implemented. Operation 1503 consists of performing, for each data point d of the batch, a series of operations 1504 to 1511.

[0121] Operation 1504 involves, for example, for each column c of the set of columns in the resistive memory array, the activation of the N-select signal Vsn[n] and the read-select signal Vsr[c], and the setting of Iout[n] = Vin[c] * G[n,c], where G[n,c] is the single device selected for reading, which may have been previously written. The output current Iout[n,c] is, for example, read by a DAC and other peripheral circuits known to those skilled in the design of resistive memory arrays.

[0122] Operation 1505 consists for example of calculating the Langevin gradient A(8t) for G[n].

[0123] Operation 1506 consists for example of converting gradients into pulse widths T(ÀA( ) and into pulse polarities sign(V^L).

[0124] Operation 1507 consists, for example, of disabling the selection signal n Vsn[n] and the read selection signal Vsr[c],

[0125] Operation 1508 consists, for example, of activating the programming selection signal Vsp[n] and applying the calculated pulses to the M devices of the matrix line in parallel.

[0126] Operation 1509 consists, for example, of applying the same pair of positive and negative polarity pulses T(°) to each of the M devices.

[0127] Operation 1510 consists, for example, of decrementing the count value C (C=C-1).

[0128] Operation 1511 consists, for example, of determining whether C is equal to 0 (C==0) and, if so, whether n is equal to the maximum number of rows MAX_R0WS, in other words, if it is the last row of the matrix, the variable n is reset to zero; otherwise, n is incremented and C is reset to thinning_ratio, and a calibration of row n is performed. For example, if one moves from row n to row n+1, a device in row n+1 will be read by activating the corresponding Vsr column. Based on the difference between the conductances of these two devices, a pulse width, or a fixed number of pulses, is calculated to move the device from row n+1 to the one in row n. This pulse is applied, for example, by selecting the correct row using the Vsp signal, and then applying the calculated pulse to the device.This operation is performed, for example, for each device until a maximum number of iterations has been reached or the conductance difference falls within a tolerable margin of error. Another solution is to read all the devices on a line and then program them in parallel.

[0129] The [Fig. 16] is a flowchart illustrating a method 1600 for generating a prediction implemented using the device 1000 of the [Fig. 10] and the domain wall matrix 1300 of the [Fig. 13], according to an example of an embodiment of the present description.

[0130] In an operation 1601, all selection signals n Vsn are for example activated and all selection programming signals Vsp are for example deactivated.

[0131] In an operation 1602 following operation 1701, for each column c, the read selection signal Vsr[c] is, for example, activated, an output current Iout[:] is, for example, defined as Vin[c]*G[:c], and the output current Iout[:] is, for example, stored, for example, after an analog-to-digital conversion. This value is, for example, the prediction distribution of a parameter.

[0132] In some embodiments, operation 1602 further includes a step in which the values ​​of the output currents lout are added together, for example using a battery. This sum is then, for example, processed by a activation in order to calculate the activation vectors sequentially for each neuron in a neural network, and then to calculate the outputs.

[0133] In an operation 1603, statistics are generated for example, such as distribution means (for predictions) and entropy.

[0134] In the case where the model is a single neuron, for example a logistic regression model, the statistics are calculated directly in iout. In other cases, one evaluates, for example, how the currents add up to form activation vectors and how these activation vectors propagate forward through the model, for example by generating voltages for other networks that store the parameters of these neurons and subsequent layers. For example, the entropy of the summed predictions of each sample is used to quantify the uncertainty of the model.

[0135] Figures 17 to 20 illustrate the results obtained using the method described herein. In particular, the described algorithm was implemented using a device model that limits the conductance range and models Langevin updates as Gaussian samples within a given bit precision range, i.e., two 4-bit devices mean that an update can land anywhere in a Gaussian distribution that is 1 / 32 of the conductance range (i.e., to three standard deviations, the value is 1 / 32 of the conductance range).The model is evaluated in terms of out-of-distribution detection of MNIST (Mixed National Institute of Standards and Technology) and KMNIST digits on its ability to correctly classify unseen MNIST digits and to detect the presence of digits that do not fit the classes (those of the KMNIST) observed in its training set - an example of data with and without distribution is shown in [Fig. 17].

[0136] Figure 18 shows the results (outcome – "SCORE / 1.0" as a function of the number of bits per device – "NO. BITS PER DEVICE") when the accuracy of the DW device increases from 3 bits to 11 bits, and quantifies the impact of the Langevin update accuracy. The results show the impact on accuracy (curve 1802) and out-of-distribution detection (curve 1804) when the DW device accuracy decreases from 11 bits to 3 bits. Above 3 bits, the impact on accuracy is negligible, while the lower accuracy actually appears to favor the distribution error detection capabilities. Region 1806 of the curve shows where the absence of gradient update skipping (i.e., not programming the device if the update is below a certain threshold) was important for sampler convergence.

[0137] Figure 19 shows the result ("SCORE / 1.0") as a function of the number of samples ("NO. SAMPLES"), and shows the effect of the matrix size (i.e., the number of samples stored—corresponding either to the number of rows or to the number of matrices if one matrix per layer sample is used) for a ratio The data shows a clearing ratio of 256 (curve 1902) and a clearing ratio of 50 (curve 1904). The diminishing benefit of a larger sample size is clearly visible, as is the importance of high on-the-fly clearing ratios for the model's ability to detect out-of-distribution data. Accuracy is not shown here, but the effect of the number of samples did not have a significant impact beyond 8 samples.

[0138] Figure 20 shows sensitivity and specificity curves representing the in- and out-of-distribution detection accuracy (IN DIST. ACC. / OUT DIST. ACC.), as the entropy threshold is increased, of the 128-sample model and 4-bit Langevin updates compared to a deterministic floating-point accuracy model. Curve 2002 represents an EPI (epistemic uncertainty) Bayesian neural network, while curve 2004 represents a Det (deterministic) neural network. Here, a comparison is made for a 32-bit floating-point accuracy model, which demonstrates that the SGLD model, even at 4 bits, is significantly better at recognizing out-of-distribution data than a stochastic gradient descent-trained deterministic model.A 2006 data point on the 2006 curve represents an AUC reading of LAMA = 0.974, where AUC stands for "Area Under Curve," and a 2108 data point on the 2002 curve represents an AUC reading of det = 0.915. The epistemic uncertainty of each unseen data point is calculated and compared to a threshold value. This curve is generated by scanning values ​​for the threshold value, and then by summing the values ​​under the curve, it is possible to determine the AUC_ number.

[0139] One advantage of the embodiments described here is that the solution based on resistive memory devices for generating random values ​​is easily scalable for applications in which a relatively large number of random numbers need to be generated in parallel. Furthermore, it is possible to adjust the parameters of the probability distribution of the generated random numbers, such as the mean and standard deviation of the probability distribution, and in particular, it is possible to decouple the setting of the standard deviation of the probability distribution from the mean of the probability distribution.

[0140] Various embodiments and variations have been described. Those skilled in the art will understand that certain features of these various embodiments and variations could be combined, and other variations will be apparent to them. For example, updates to the domain wall could be performed on the basis of pulse counts instead of pulse width. In this case, a fixed pulse is applied, for example, with a certain polarity, a certain number of times, and a very large number of matrix arrangements and read / write strategies could be used.

[0141] Furthermore, the thinning could be achieved in a different way than sampling and counting. For example, a metric combining the sample likelihood and the Euclidean distance between internal representations of the model, i.e., at the penultimate layer of the model, could be used to reduce the total number of samples to be stored.

[0142] Furthermore, instead of using the SGLD, one could use the Metropolis-adjusted Langevin algorithm (MALA), in which an acceptance / rejection step is added after each sample. This acceptance is, for example, calculated based on the product of the likelihood ratios and the priorities of the proposed and previously accepted models. However, in MALA, sampling is performed each time from the same starting point, whereas some resistive memory technologies, such as DW devices, do not offer a way to store this value, which will therefore be forgotten after the first generation of random numbers, and the more the model is sampled after rejection steps, the further it will deviate from the starting point.Therefore, a mitigation strategy could involve limiting the number of samples where, for example, the probability threshold is reduced to a smaller number as the number of rejections increases.

[0143] It should also be noted that calculating the prior is a relatively expensive process since it requires reading each parameter in every mini-batch. It can also, in some cases, lead to a high rejection rate, which can negatively impact the algorithm's efficiency. In any case, the physical limitations of conductance naturally dictate that a prior on the parameters must have uniform truncation. In the case of such a uniform prior, since all parameters are equally probable, it is not necessary to calculate the prior. Therefore, in some embodiments, it may be preferable to use a uniform prior (in fact, no prior) on the model if this is not important for the task.

[0144] In addition, non-symmetric pulse pairs could be applied to take account of non-linear changes in conductance, which can occur in technologies such as PCM, and by introducing asymmetry in this way, it is ensured that the noise distribution is symmetric and centered on the current value.

[0145] Finally, the practical implementation of the embodiments and variants described is within the reach of a person skilled in the art, based on the functional indications given above.

Claims

Demands

1. A device configured to program a random value, the device comprising: a resistive memory device (102) capable of being programmed incrementally; and a control circuit (104) configured to program the resistive memory device (102) with the random value, the control circuit (104) being configured to: - perform a first programming operation of the resistive memory device with first programming parameters in order to generate a first conductance variation of a first polarity in the resistive memory device; - perform a second programming operation of the resistive memory device with second programming parameters in order to generate a second conductance variation of a second polarity in the resistive memory device, the second polarity being the polarity opposite to the first polarity;and in which either: - an amplitude of the first programming parameters is different from an amplitude of the second programming parameters, and the control circuit (104) is further configured to read the random value programmed into the resistive memory device by reading a programmed conductance value from the resistive memory device after the first and second programming operations;either - an amplitude of the first programming parameters is the same as an amplitude of the second programming parameters, the control circuit (104) being further configured to perform a third programming operation of the resistive memory device before the first programming operation or after the second programming operation, and to read the random value programmed into the resistive memory device by reading a programmed conductance value from the resistive memory device after the first, second and third programming operations.;

2. Device according to claim 1, wherein the control circuit (104) is further configured to perform a analog-to-digital conversion of the read conductance value to generate a random digital value.

3. Device according to claim 1 or 2, wherein the resistive memory device is a domain wall device, and a pulse width, or pulse count, applied to the domain wall device during the first programming operation is different from a pulse width, or pulse count, applied to the domain wall device during the second programming operation.

4. Device according to any one of claims 1 to 3, wherein the amplitude of the first programming parameters is different from the amplitude of the second programming parameters, and the control circuit (104) is configured to implement a Bayesian model update operation, wherein the amplitude of one of the first or second programming operations is based on the amplitude and sign of a Langevin gradient.

5. Device according to claim 4, wherein the amplitude of said first or second programming operation is proportional to a programming amplitude equal to: Programming amplitude = - <p(j | V0ÂA( ^ ) 1 ) où [Math.5] est un gradient de Langevin, [Math.5] est un taux d'apprentissage, et [Math.5] V est une fonction qui convertit le bruit introduit par l'application du gradient de Langevin en une amplitude de programmation.

6. A device according to any one of claims 1 to 5, wherein the control circuit (104) is configured to implement a Bayesian model update operation, wherein the amplitude of said third programming operation is based on the amplitude of a Langevin gradient, and the polarity of

7. The third programming operation is based on the sign of the Langevin gradient. A method for programming and reading a random value, the method comprising: programming, by a control circuit (104), a resistive memory device (102) with a random value, the resistive memory device being capable of being programmed incrementally, wherein the programming of the resistive memory device comprises: - the execution, by the control circuit (104), of a first programming operation of a resistive memory device (102) with first programming parameters in order to generate a first conductance variation of a first polarity in the resistive memory device; - the execution, by the control circuit (104), of a second programming operation of the resistive memory device (102) with the second programming parameters in order to generate a second conductance variation of a second polarity in the resistive memory device, the second polarity being the opposite polarity to the first polarity; and wherein: - an amplitude of the first programming parameters is different from an amplitude of the second programming parameters, and the method further includes reading the random value programmed in the resistive memory device by reading, through the control circuit (104), a conductance value of the resistive memory device following the first and second programming operations;either - an amplitude of the first programming parameters is the same as an amplitude of the second programming parameters, the method further comprising the execution, by the control circuit (104), of a third programming operation of the resistive memory device before the first programming operation or after the second programming operation, the random value programmed in the resistive memory device being read by reading, by the control circuit (104), a programmed conductance value of the resistive memory device after the first, second and third programming operations.;

8. A method according to claim 7, further comprising performing an analog-to-digital conversion on the read conductance value in order to generate a random digital value.

9. A method according to claim 7 or 8, wherein the resistive memory device is a domain wall device, and a pulse width, or number of pulses, applied to the domain wall device during the first programming operation is different from a pulse width, or number of pulses, applied to the domain wall device during the second programming operation.

10. A method for implementing an update operation of a Bayesian model comprising the method according to any one of claims 7 to 9, wherein the amplitude of one of the first or second programming operations is based on the amplitude and sign of a Langevin gradient.

11. A method for implementing an update operation of a Bayesian model comprising the method of any one of claims 7 to 10, wherein the amplitude of said third programming operation is based on the amplitude of a Langevin gradient, and the polarity of the third programming operation is based on the sign of the Langevin gradient.