Electronic device for capturing and displaying images

Abstract

Electronic Image Capture and Display Device This description relates to an electronic image capture and display device (100) comprising a plurality of pixels (PIX) formed in and on a semiconductor substrate (101), each pixel comprising: – a detection element (103) for a first radiation (105), located on the side of a first face (101F) of the semiconductor substrate (101); – an emission element (107) for a second radiation (109), located on the side of a second face (101R) of the semiconductor substrate opposite the first face; and – a circuit located in and on the semiconductor substrate and connecting the detection element to the emission element. Figure for the abstract: Fig. 1

Description

Title of the invention: Electronic device for capturing and displaying images technical field

[0001] This description relates generally to electronic devices, and in particular to electronic devices for capturing and displaying images. Previous technique

[0002] Electronic devices capable of implementing image capture and display functions have been proposed. Such devices typically include an image sensor, comprising an image capture pixel array, and an image display, comprising an image display pixel array distinct from the image capture pixels.Depending on the application, the image capture and display pixel arrays of the device may be located on one side of the same face of a semiconductor substrate, for example in the case of a mobile phone, smartwatch or tablet computer including a display screen incorporating an image sensor for acquiring a user's fingerprints, or may be located on opposite sides of the semiconductor substrate, for example in the case of a head-mounted display, head-up display or smart glasses including one or more display screens intended to be placed each in front of a user's eye and one or more image sensors facing outwards.

[0003] Existing electronic image capture and display devices, however, suffer from various drawbacks. In particular, in these devices, the pixels of the image sensor are typically connected to a control circuit and a readout circuit, and the pixels of the image display are connected to a control circuit different from the control and readout circuits for the pixels of the image sensor. These circuits, which are, for example, located on the periphery of the pixel arrays of the sensor and the image display, implement addressing functions for the pixel arrays to which they are respectively connected, and the images acquired by the sensor are, for example, stored in a memory circuit before being displayed, possibly after processing. This introduces an undesirable latency between the acquisition of an image by the sensor and the display of the corresponding image by the display.Furthermore, existing electronic image capture and display devices are complex, bulky, heavy, energy-intensive, and expensive to manufacture. Summary of the invention

[0004] It would be desirable to overcome all or part of the drawbacks of existing electronic image capture and display devices. In particular, there is a need to reduce the weight, size, complexity, energy consumption, manufacturing costs and / or latency of these devices.

[0005] To this end, one embodiment provides an electronic image capture and display device comprising a plurality of pixels formed in and on a semiconductor substrate, each pixel comprising: - a detection element for a first radiation, located on the side of a first face of the semiconductor substrate; - a second radiation emission element, located on the side of a second face of the semiconductor substrate opposite the first face; and - a circuit located in and on the semiconductor substrate and connecting the sensing element to the emitting element.

[0006] According to one embodiment, the circuit comprises: - an acquisition circuit located in and on the semiconductor substrate and adapted to provide an acquisition signal representative of the intensity of the first radiation received by the pixel's detection element; and - a control circuit located in and on the semiconductor substrate and adapted to apply a control signal to the emitting element of the pixel.

[0007] According to one embodiment, the acquisition circuit and the control circuit are analog circuits.

[0008] According to one embodiment: - each detection element includes a photodetector; - each acquisition circuit includes a comparator having an inverting input connected to a conduction electrode of the photodetector; and - each control circuit includes an inverter having an input connected to an output of the comparator and an output connected to a gate of a MOS transistor, the MOS transistor having a conduction electrode connected to the emitting element.

[0009] According to one embodiment: - each detection element includes a single-photon avalanche diode; - each acquisition circuit includes a Schmitt flip-flop with an input connected to a conduction electrode of the single-photon avalanche diode; and - each control circuit includes an inverter having an input connected to an output of the Schmitt flip-flop and an output connected to a gate of a MOS transistor, the MOS transistor having a conduction electrode connected to the emitting element.

[0010] According to one embodiment, the detection elements are located opposite the emission elements.

[0011] According to one embodiment, the detection elements and the emission elements are arranged respectively in first and second matrices, the first and second matrices having substantially identical steps.

[0012] According to one embodiment, the first and second radiations are visible light.

[0013] According to one embodiment, each emission element comprises at least one light-emitting diode.

[0014] According to one embodiment, the light-emitting diode is controlled by a control signal having an average value substantially proportional to an intensity of the first radiation detected by the detection element.

[0015] According to one embodiment, the light-emitting diode is controlled by a control signal having pulses repeating at a frequency substantially proportional to an intensity of the first radiation detected by the detection element.

[0016] According to one embodiment, the device comprises as many detection elements as emission elements.

[0017] One embodiment provides an electronic device comprising: - a power supply circuit; and - at least one device as described above.

[0018] One embodiment provides a method for manufacturing a device as described above, the method comprising a step of transferring, by molecular bonding, a structure comprising the detection elements and the circuits onto another structure comprising the emission elements. Brief description of the drawings

[0019] These features and advantages, as well as others, will be described in detail in the following description of particular embodiments, given by way of non-limiting example, in relation to the accompanying figures, among which:

[0020] [Fig.1] is an isometric, schematic and partial view of an image capture and display device according to one embodiment;

[0021] [Fig.2] is an equivalent electrical diagram of a pixel of the device of [Fig.1] according to one embodiment;

[0022] [Fig.3] is an equivalent electrical diagram of a pixel of the device of [Fig.1] according to another embodiment;

[0023] [Fig.4] is a chronogram illustrating, schematically and partially, an example of the operation of the pixel of [Fig.3];

[0024] [Fig.5] is an equivalent electrical diagram of a pixel of the device of [Fig. 1] according to yet another embodiment;

[0025] [Fig.6] is a chronogram illustrating, schematically and partially, an example of the operation of the pixel of [Fig.5];

[0026] [Fig.7A], [Fig.7B], [Fig.7C], [Fig.7D], [Fig.7E], [Fig.7F], [Fig.7G], [Fig.7H] and [Fig.7I] illustrate, by schematic and partial cross-sectional views, structures obtained at the end of steps in a manufacturing process of the device of [Fig.1] according to an embodiment;

[0027] [Fig.8A], [Fig.8B], [Fig.8C], [Fig.8D] and [Fig.8E] illustrate, by means of schematic and partial cross-sectional views, structures obtained at the end of successive stages of a manufacturing process of the device of [Fig.1] according to another embodiment;

[0028] [Fig. 9] is a schematic and partial side view of an example of the implementation of the device of [Fig. 1] in an electronic device; and

[0029] [Fig. 10] is a schematic and partial side view of another example of the implementation of the device of [Fig. 1] in an electronic device. Description of embodiments

[0030] The same elements have been designated by the same reference numerals in the different figures. In particular, structural and / or functional elements common to the different embodiments may have the same reference numerals and may have identical structural, dimensional and material properties.

[0031] For the sake of clarity, only the steps and elements useful for understanding the described embodiments have been shown and are detailed. In particular, the various applications of the electronic image capture and display devices in this description will not be detailed, as the described embodiments are compatible with all or most applications that could benefit from an electronic image capture and display device, possibly with adaptations that are understandable to a person skilled in the art upon reading this description.

[0032] Unless otherwise specified, when referring to two elements connected together, this means directly connected without intermediate elements other than conductors, and when referring to two elements coupled together, this means that these two elements can be connected or linked through one or more other elements.

[0033] In the following description, when referring to absolute positional qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative positional qualifiers, such as the terms "above", "below", "superior", "lower", ", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made, unless otherwise specified, to the orientation of the figures.

[0034] Unless otherwise specified, the expressions "approximately", "about", "substantially", and "in the order of" mean within 10%, preferably within 5%.

[0035] In the following description, the terms "insulating" and "conducting" mean, unless otherwise specified, electrically insulating and electrically conductive respectively.

[0036] The term "transmittance of a layer" refers to the ratio of the intensity of radiation exiting the layer to the intensity of radiation entering the layer. In the following description, a layer is said to be opaque to radiation when its transmittance for that radiation is strictly less than 40%, preferably less than or equal to 25%, and more preferably less than or equal to 10%. Conversely, a layer is said to be transparent to radiation when its transmittance for that radiation is greater than or equal to 40%, preferably greater than or equal to 75%, and more preferably greater than or equal to 90%. The preceding definitions of the terms opaque and transparent are not limited to the case of a single layer, but apply more generally to any element that may be exposed to radiation, for example, a substrate, a region, a stack of several layers, etc.

[0037] In this description, the term "visible light" refers to electromagnetic radiation with a wavelength between 400 nm and 700 nm. Furthermore, the term "infrared radiation" refers to electromagnetic radiation with a wavelength between 700 nm and 1 mm. In the infrared range, near-infrared radiation has a wavelength between 700 nm and 1.7 μm.

[0038] The [Fig.1] is an isometric, schematic and partial view of an image capture and display device 100 according to one embodiment.

[0039] According to this embodiment, the image capture and display device 100 comprises a plurality of PIX pixels formed in and on a semiconductor substrate 101.

[0040] Each pixel PIX of the device 100 comprises a detection element 103 for radiation 105 and, associated with the detection element 103, an emission element 107 for radiation 109. The detection elements 103 and emission elements 107 are located on opposite sides of the semiconductor substrate 101, respectively. More precisely, in the illustrated example, the detection elements 103 are located on the side of a face 101F of the substrate 101, and the emission elements 107 are located on the side of a face 101R of the substrate 101, opposite face 101F. For the sake of simplifying the drawing, each detection element 103 and each emission element 107 has been symbolized in [Fig. 1] by a parallelepiped having, in top view, a perimeter of approximately square shape. This example is not, however, limiting; each detection element 103 or emission element 107 may, as an alternative, have any shape, for example cylindrical.

[0041] In the illustrated example, the PIX pixels of the device 100 are arranged in a matrix of rows and columns. More precisely, in this example, the detection elements 103 are arranged in a matrix of rows and columns. Similarly, the emission elements 107 are, in this example, arranged in a matrix of rows and columns. In each of these matrices, the rows are, for example, substantially orthogonal to the columns. This example is not, however, limiting; the rows may, alternatively, not be orthogonal to the columns.

[0042] By way of example, the device 100 comprises as many detection elements 103 as emission elements 107.

[0043] In the example shown, the emission element matrix 107 has a pitch, that is, a center-to-center distance between two adjacent emission elements 107, substantially equal to the pitch of the detection element matrix 103, that is, substantially equal to a center-to-center distance between two adjacent detection elements 103. Furthermore, in this example, the emission elements 107 are located opposite the detection elements 103. In the illustrated example, the center of each emission element 107 is located substantially directly above the center of the opposite detection element 103. The emission elements 107, for example, have, in a top view, lateral dimensions that are substantially equal, within manufacturing variations, to those of the detection elements 103.This example is not limiting, however, as the emission elements 107 may, as an alternative, have different lateral dimensions, for example larger or smaller, than those of the detection elements 103. The respective dimensions, for example the respective surfaces, of the detection elements 103 and emission elements 107 are chosen for example according to a desired sensitivity on the side of the detection elements 103 and / or an intensity to be achieved on the side of the emission elements 107.

[0044] By way of example, the radiation 105 captured by the detection elements 103 is visible light. Furthermore, the radiation 109 emitted by the emission elements 107 is, for example, visible light.

[0045] The [Fig.2] is an equivalent electrical diagram of a pixel PIX of the device 100 of the [Fig.1] according to one embodiment.

[0046] In the example shown, the detection element 103 of pixel PIX includes a photodetector 201 adapted to capture the radiation 105. The photodetector 201 is, for example, adapted to produce, under the effect of the incident radiation 105, a current Iph, also called a photocurrent. The photocurrent Iph is, for example substantially proportional to the intensity, or flux, of the radiation 105 captured by the photodetector 201. In the illustrated example, the photodetector 201 has a first conduction terminal, for example an anode electrode, connected to a node 203 for applying a reference potential, for example ground. The photodetector 201 also has, in this example, a second conduction terminal, for example a cathode electrode, connected to a circuit 205. By way of example, the photodetector 201 is a photosensitive diode, or photodiode.

[0047] In the illustrated example, the circuit 205 includes an acquisition circuit 207, also called a conditioner or conditioning circuit. The acquisition circuit 207 is, for example, adapted to provide an acquisition signal representative of the intensity of the radiation 105 captured by the photodetector 201. The acquisition signal produced by the acquisition circuit 207 is, for example, a function of the photocurrent Iph, for example, substantially proportional to the photocurrent Iph. Alternatively, the acquisition signal is a function of a voltage across the photodetector 201, for example, substantially proportional to this voltage.

[0048] The acquisition circuit 207 allows, for example, the amplification of the photocurrent Iph and the provision of a drive voltage for the emitting element 107. For these purposes, the acquisition circuit 207 includes, for example, an amplifier symbolized in [Fig. 2] by a transistor. As an example, the amplifier is of the CTIA type (from the English "Capacitive Trans-Impedance Amplifier").

[0049] In the example shown, the PIX pixel circuit 205 further includes a control circuit 209, or driving circuit. The control circuit 209 is, for example, adapted to apply a control signal to the transmitting element 107. The control signal provided by the control circuit 209 is, for example, a function of the acquisition signal, for example, substantially proportional to the acquisition signal.

[0050] In the example shown, the acquisition circuit 207 and the control circuit 209 each receive a calibration signal cal. The calibration signal cal allows, for example, compensation for manufacturing variations between the pixels PIX of the image capture and display device 100, for example, manufacturing variations affecting the detection element 103 and / or the emission element 107 of the pixels PIX. In practice, the acquisition circuit 207 receives, for example, a calibration signal different from that received by the control circuit 209. The calibration signal cal has, for example, a determined value for each pixel PIX, following a calibration step subsequent to the manufacturing steps of the image capture and display device 100. Alternatively, the calibration signal cal can be omitted.

[0051] In the illustrated example, the emitting element 107 of the pixel PIX comprises a light-emitting diode 211 adapted to emit radiation 109. The diode The LED 211 is, for example, more specifically adapted to emit the radiation 109 when a driven current flows through it, corresponding, for example, to the control signal applied by the control circuit 209. The driven current has, for example, an intensity substantially proportional to that of the photocurrent Iph, for example, substantially proportional to the intensity of the radiation 105 captured by the photodetector 201. In the example illustrated in [Fig. 2], the LED 211 has a first conduction terminal, for example, an anode electrode, connected to the circuit 205, for example, to an output of the control circuit 209. The LED 211 also has, in this example, a second conduction terminal, for example, a cathode electrode, connected to a node 213 for the application of a potential -Vk, for example, a low potential. The LED 211 is, for example, an organic LED.As an alternative, the light-emitting diode 211 can be an inorganic light-emitting diode. The diode 211 is, for example, a micro-LED, meaning it has micrometer-sized dimensions. In the case where both the captured radiation 105 and the emitted radiation 109 are visible light, the light-emitting diode 211 is, for example, fitted with a color converter corresponding to the same wavelength range, or the same color, as that transmitted by a filter above the photodetector 201.

[0052] In the case where the lied current has an intensity substantially proportional to that of the photocurrent Iph, the acquisition circuit 207 and control circuit 209 are, for example, analog circuits. In this case, the circuit 205 is notably devoid of an analog-to-digital converter.

[0053] Figure 3 is an equivalent electrical circuit of a PIX pixel of the device 100 of Figure 1 according to another embodiment. The equivalent electrical circuit illustrated in Figure 3 corresponds more precisely to a case in which the circuit 205 of the PIX pixel is adapted to control the emitting element 107 by a pulsed signal.

[0054] The diagram in [Fig. 3] includes elements in common with the diagram in [Fig. 2]. These common elements will not be detailed again below. In particular, the detection element 103 and the emission element 107 of the diagram in [Fig. 3] are, for example, identical to those of the diagram in [Fig. 2].

[0055] In the example shown, the acquisition circuit 207 of the PIX pixel includes a comparator 301 having an inverting input (-) connected to a node 303 of the acquisition circuit 207, a non-inverting input (+) connected to a node 305 for applying a reference potential Vref, and an output connected to a node 307 of the acquisition circuit 207. In the illustrated example, the cathode of the photodetector 201 is connected to node 303. Nodes 303 and 307 of the acquisition circuit 207 constitute, for example, input and output terminals of the acquisition circuit 207. In the illustrated example, nodes 303 and 307 have Vsn and Vo potentials respectively.

[0056] In the example shown, the acquisition circuit 207 further includes a capacitive element 309, for example a capacitor, connecting node 303 to another node 311 for applying a reference potential, for example ground. The capacitor can be replaced or supplemented by a parasitic capacitance of node 303. In the illustrated example, the acquisition circuit 207 further includes a transistor 313, for example a MOS (Metal-Oxide-Semiconductor) transistor. In this example, the transistor 313 is more precisely an N-type MOS transistor (NMOS transistor). In the example shown, transistor 313 includes a conduction terminal, for example a source electrode, connected to node 303, another conduction terminal, for example a drain electrode, connected to a node 315 applying a supply potential Vdd, and a control terminal, for example a gate electrode, connected to node 307.The potential Vdd, for example, is strictly greater than the potential Vref.

[0057] In the illustrated example, the control circuit 209 comprises an inverter 317 and a transistor 319. The inverter 317 comprises, for example, an input connected to node 307 of the acquisition circuit 207 and an output connected to a control terminal, for example, a gate electrode, of the transistor 319. The transistor 319 is, for example, more specifically a P-type MOS transistor (PMOS transistor). In the example shown, the PMOS transistor 319 comprises a conduction terminal, for example, a drain electrode, connected to the anode of the light-emitting diode 211 and another conduction terminal, for example, a source electrode, connected to a node 321 for applying a supply potential Va.

[0058] By way of example, the light-emitting diode 211 is controlled by a control signal having an average value substantially proportional to the intensity of the radiation 105.

[0059] Figure 4 is a timing diagram illustrating, schematically and partially, an example of the operation of the PIX pixel of Figure 3. The timing diagram of Figure 4 includes curves 401 and 403 illustrating an example of the evolution, as a function of time (t), of the potentials Vsn and Vo, respectively.

[0060] Between a time t0 and a time t1, subsequent to time t0, the photodetector 201 is exposed to 105 radiation and produces the photocurrent Iph. During this period, the photocurrent Iph is integrated by the capacitive element 309. The charges photogenerated by the photodetector 201 accumulate at node 303, thus causing a decrease in the potential Vsn. In the illustrated example, the potential Vsn of node 303 has, between times t0 and t1, a value between that of the potential Vdd and that of the potential Vref. Between times tO and tl, the potential Vo of node 307 connected to the output of comparator 301 is for example at a low level.

[0061] At time t1, the potential Vsn reaches a value approximately equal to that of the reference potential Vref. This causes the output of comparator 301 to switch, thus transitioning the potential Vo from a low level to a high level. Transistor 313 is then switched on, which connects node 303 to node 315. The photogenerated charges accumulated at node 303 between times t0 and t1 are thus discharged to node 315. This tends to bring the potential Vsn back to a value approximately equal to that of the supply potential Vdd.

[0062] At a time t2, later than time t1, the potential Vsn again becomes greater than the potential Vref. This causes the output of comparator 301 to switch, resulting in a transition of the potential Vo from the high level to the low level. Curve 403 thus illustrates a pulse of the potential Vo between times t1 and t2.

[0063] Between time t2 and a time t3, subsequent to time t2, curve 403 illustrates several other pulses of the potential Vo similar to that present between times t1 and t2. These pulses result, as explained above, from successive charges and discharges of the capacitive element 309 when the photodetector 201 is subjected to radiation 105 and produces the photocurrent Iph. The pulses comprising curve 403 between times t0 and t3 are repeated, for example, periodically, for example at a frequency fh.

[0064] Between an instant t4, subsequent to the instant t3, and an instant t5, subsequent to the instant t4, the curve 403 illustrates further impulses of the potential Vo, for example analogous to the impulses present between the instants t0 and t3.

[0065] The potential pulses Vo between times t4 and t5 differ, for example, from the potential pulses Vo between times t0 and t3 in that they repeat periodically at a frequency fl strictly lower than the frequency fh. This arises, for example, from the fact that the photodetector 201 produces, during an LF phase between times t4 and t5, a weaker photocurrent Iph, for example resulting from a decrease in the intensity of the radiation 105, than during another HF phase between times t0 and t3.

[0066] In the example shown, the frequencies fh and fl are representative of the photocurrent Iph, for example, substantially proportional to the photocurrent Iph. The frequencies fh and fl are, for example, substantially proportional to the intensity, or flux, of the radiation 105 captured by the photodetector 201. The light-emitting diode 211 is, for example, thus controlled by a periodic signal with a frequency substantially proportional to the intensity of the radiation 105 captured by the photodetector 201.

[0067] By way of example, the sensitivity of the PIX pixel is adjusted by modifying the value of the reference potential Vref, which limits the range of variation of the potential Vsn. In the example shown, for the same radiation intensity value 105, the closer the value of the potential Vref is to that of the potential Vdd, the higher the frequency of variation of the potential Vo. Conversely, the further the value of the potential Vref is from that of the potential Vdd, the lower the frequency of variation of the potential Vo.

[0068] The embodiments of the PIX pixel circuit 205 are not limited to the examples of the detection circuit 207 and control circuit 209 shown, and a person skilled in the art can, based on the information in this description, provide detection and control circuits different from those shown in relation to Figures 3 and 4. By way of example, a counter or a frequency divider can be provided in the control circuit 209 to allow adjustment of the frequency of variation of the potential Vo for each PIX pixel independently of the other PIX pixels. The adjustment is then carried out, for example, at the factory, for example, after manufacturing steps of the device 100, and involves, for example, a step of storing calibration values ​​in memory circuits of the device 100, for example, ROM (Read-Only Memory) or flash memory circuits.This avoids the need for addressing circuits in device 100. Other types of circuits, for example logarithmic response circuits, could also be used.

[0069] Figure 5 is an equivalent electrical circuit of a PIX pixel of the device 100 of Figure 1 according to yet another embodiment. The equivalent electrical circuit illustrated in Figure 5 corresponds more precisely to a case in which the detection element 103 of the PIX pixel comprises a single-photon avalanche diode 501, also called a SPAD (Single-Photon Avalanche Diode). The diode 501 is adapted to detect photons of the 105 radiation. The circuit in Figure 5 corresponds, for example, to a case where the 105 radiation has a very low intensity.

[0070] In the example shown, the diode 501 has a first conduction terminal, for example an anode electrode, connected to a node 503 of the sensing element 103, and a second conduction terminal, for example a cathode electrode, connected to a node 505 for applying a potential Vsp.

[0071] In the illustrated example, the sensing element 103 further comprises a resistive element 507, for example a resistor, connecting node 503 to another node 509 for the application of a reference potential, for example ground. The resistive element 507 allows quenching of the avalanche phenomenon each time diode 501 is triggered. In this example, the sensing element 103 further includes a capacitive element 511, for example a capacitor, connecting node 503 to a node 513 applying a reference potential, for example ground.

[0072] In the example shown, the detection circuit 207 includes a Schmitt flip-flop 515 with inverted hysteresis. In this example, the Schmitt flip-flop 515 has an input connected to node 503 and an output connected to the input of the control circuit 209. In the illustrated example, the control circuit 209 of the PIX pixel in [Fig. 5] is identical or analogous to the control circuit 209 of the PIX pixel in [Fig. 3], the output of the Schmitt flip-flop 515 being connected to the input of the inverter 317.

[0073] In the example illustrated in [Fig.5], potentials Vsn' and Vo' are respectively present at node 503 and at the output of the Schmitt flip-flop 515.

[0074] As an alternative, the Schmitt flip-flop 515 can be replaced by a comparator having an adjustable threshold and / or counters allowing adjustment of the intensity range of the light-emitting diode 211 of the emitting element 107. This makes it possible, for example, to reduce or avoid the presence of parasitic pulses due to a dark current.

[0075] Furthermore, although not detailed in the drawing, circuit 205 of the diagram in [Fig.5] may also include sensitivity and / or saturation adjustment elements.

[0076] Figure 6 is a timing diagram illustrating, schematically and partially, an example of the operation of the PIX pixel of Figure 5. The timing diagram of Figure 6 includes curves 601 and 603 illustrating an example of the evolution, as a function of time (t), of the potential Vsn' present at node 503 and the current flowing through the light-emitting diode 211, respectively.

[0077] Between a time t0' and a time tl', subsequent to time t0', the potential Vsn' present at node 503 is equal to a minimum value Vmin. The current lied is, for example, at a low level, for example practically zero, between times t0' and tl'. This corresponds, for example, to a period during which no photon is detected by diode 501.

[0078] In the example shown, at time tl', at least one photon is detected by diode 501. The charges produced by the avalanche generated in diode 501 then accumulate across the capacitive element 511, causing an increase in the potential Vsn' to a maximum value Vmax, strictly greater than the value Vmin. This causes a switching of the output potential Vo' of the Schmitt flip-flop 515. The current flowing through the LED 211 then switches from a low level to a high level.

[0079] Between time t1' and a time t2', subsequent to time t1', the avalanche phenomenon is extinguished by the action of resistor 507, and the capacitive element 511 discharges through resistor 507. This causes, between times t1' and t2', a switching of the output potential Vo' of the Schmitt flip-flop 515 to a low level. The current flowing through the LED 211 then switches from the high level to the low level by the action of inverter 317 and transistor 319.

[0080] Similar to curve 403 between times t2 and t3, curve 603 illustrates, between time t2' and a time t3' subsequent to time t2', several other pulses of the current similar to that present between times t1' and t2'. These pulses result, as explained above, from successive charges and discharges of the capacitive element 511 when the diode 501 captures at least one photon of the radiation 105. The pulses that make up curve 603 between times t0' and t3' are repeated, for example, periodically, for example at a frequency fh'.

[0081] Between an instant t4', subsequent to the instant t3', and an instant t5', subsequent to the instant t4', the curve 603 illustrates further impulses of the lied current, for example analogous to the impulses present between the instants t0' and t3'.

[0082] The pulses of the current between times t4' and t5' differ, for example, from the pulses of the current between times t0' and t3' in that they repeat periodically at a frequency fl' strictly lower than the frequency fh'. This arises, for example, from the fact that diode 501 captures, during an LF' phase between times t4' and t5', a smaller number of photons, for example resulting from a decrease in the intensity of the radiation 105, than during another HF' phase between times t1' and t3'.

[0083] In the example shown, the frequencies fh' and fl' represent the number of photons captured by the diode 501, for example, substantially proportional to the number of photons captured by the diode 501. The frequencies fh' and fl' are, for example, substantially proportional to the intensity, or flux, of the radiation 105 captured by the diode 501. The light-emitting diode 211 is, for example, thus controlled by a periodic signal with a frequency substantially proportional to the intensity of the radiation 105 captured by the diode 501.

[0084] In the examples set out above, the image capture and display device 100 is devoid of addressing circuits for the detection element matrices 103 and emission elements 107. The device 100 is further devoid of circuits and components for storing, or memorizing, images acquired by the detection elements 103 or images to be displayed by the emission elements 107.

[0085] One advantage of device 100 lies in the fact that it has a weight, size, complexity, energy consumption, manufacturing costs and / or a lower latency times than existing image capture and display devices.

[0086] Fig. 7A, Fig. 7B, Fig. 7C, Fig. 7D, Fig. 7E, Fig. 7F, Fig. 7G, Fig. 7H and Fig. 71 illustrate, by schematic and partial cross-sectional views, structures obtained at the end of steps in a manufacturing process of device 100 of Fig. 1 according to an embodiment.

[0087] Fig. 7A illustrates more precisely a structure obtained at the end of a step of forming the photodetectors 201 and the circuits 205 of the PIX pixels of the device 100. The technological process leading to obtaining the structure illustrated in Fig. 7A is for example of the type of the process known under the English name "CMOS front-side" (from the English "Complementary Metal-Oxide-Semiconductor front-side").

[0088] In the example shown, the structure includes a support substrate 701. By way of example, the support substrate 701 is a wafer or a piece of wafer made of a semiconductor material, for example silicon.

[0089] The support substrate 701 is, for example, coated on one of its faces with an insulating layer 703. In the example shown, the insulating layer 703 is located on and in contact with a face 701T of the support substrate 701 (the upper face of the substrate 701, in the orientation of [Fig. 7A]). By way of example, the insulating layer 703 is made of an oxide, for example silicon dioxide.

[0090] The insulating layer 703 is, for example, coated with a semiconductor layer 705, for example a silicon layer. In the example shown, the semiconductor layer 705 is located on and in contact with a face of the insulating layer 703 opposite the support substrate 701.

[0091] By way of example, the support substrate 701, the insulating layer 703, and the semiconductor layer 705 are part of a SOI (Silicon On Insulator) type substrate. In this case, the insulating layer 703 corresponds to the buried oxide layer (BOX) of the SOL substrate.

[0092] In the illustrated example, the photodetectors 201 are located in the semiconductor layer 705. By way of example, the photodetectors 201 are formed by ion implantation on the side of the face 701T of the semiconductor substrate 701.

[0093] Moreover, in this example, the circuits 205 are located on the side of the face 701T of the semiconductor substrate 701. By way of example, the circuits 205 are formed in and on the semiconductor layer 705.

[0094] In the example shown, the structure further comprises an interconnect stack or network 707 located on the semiconductor layer 705. In the example shown, the interconnect stack 707 comprises a stack of alternating conductive and insulating layers. The conductive layers of The interconnect stack 707, symbolized by hatched rectangles 709 in [Fig. 7A], are, for example, metallic layers, also called metallization levels. Although not detailed in the drawings, the interconnect stack 707 includes, for example, conductive tracks formed in the conductive layers and conductive vias, for example, metallic vias, interconnecting conductive tracks located in different conductive layers.

[0095] In the example shown, the conductive layer 709 of the interconnect stack 707 furthest from the support substrate 701, called the last metallization level, is not flush with the face of the interconnect stack 707 opposite the support substrate 701 (the upper face of the interconnect stack 707, in the orientation of [Fig. 7A]). In this example, the last metallization level is covered by an insulating layer of the interconnect stack 707.

[0096] The semiconductor layer 705 of the structure illustrated in [Fig.7A] corresponds for example to the semiconductor substrate 101 of the device 100 of [Fig.1].

[0097] Although [Fig. 7A] illustrates an example in which the photodetectors 201 and the circuits 205 are formed in and on a SOI-type substrate, this example is not limiting. As an alternative, the photodetectors 201 and the circuits 205 may be formed in and on a bulk semiconductor substrate, for example identical or analogous to the support substrate 701 of [Fig. 7A].

[0098] Fig. 7B illustrates more precisely a structure obtained after a further thinning step of the structure previously shown in relation to Fig. 7A on the side of face 701T of support substrate 701.

[0099] In the example illustrated in [Fig. 7B], the last metallization level is flush with the face of the interconnect stack 707 opposite the support substrate 701 (the upper face of the interconnect stack 707, in the orientation of [Fig. 7B]). This amounts to eliminating the insulating layer of the interconnect stack 707 coated with the last metallization level.

[0100] Thinning is for example carried out by CMP (from the English "Chemical and Mechanical Polishing").

[0101] Figure 7C illustrates more precisely a structure obtained after a step of forming an active stack of light-emitting diodes 711, or active LED stack, on the side of a face 713T of a substrate 713 (the upper face of the substrate 713, in the orientation of Figure 7C). The step described in relation to Figure 7C can be carried out interchangeably before, during, or after the steps previously described in relation to Figures 7A and 7B.

[0102] The substrate 713 is, for example, a wafer or a piece of wafer made of a semiconductor material, for example silicon. By way of example, the substrate 713 is a single-crystal silicon wafer having a diameter of approximately 200 mm. By way of alternative, the substrate 713 may be made of corundum (sapphire) or gallium nitride (GaN).

[0103] In the example shown, a semiconductor layer 715 doped with a first type of conductivity, for example type N, covers the face 713T of the substrate 713. The semiconductor layer 715 is, for example, more precisely located on and in contact with the face 713T.

[0104] In the example shown, the semiconductor layer 715 is coated with an active layer 717. The active layer 717 is, in this example, located on and in contact with a face of the semiconductor layer 715 opposite the substrate 713 (the upper face of the layer 715, in the orientation of [Fig. 7C]). By way of example, the layer 717 includes quantum boxes or wells.

[0105] In the illustrated example, the active layer 717 is coated with another semiconductor layer 719. In this example, the semiconductor layer 719 is located on and in contact with a face of the active layer 717 opposite the substrate 713 (the upper face of the layer 717, in the orientation of [Fig. 7C]). The semiconductor layer 719 is, for example, doped with a second type of conductivity opposite to the first type of conductivity. In this example, the semiconductor layer 719 is of type P.

[0106] In the illustrated example, the semiconductor layer 715, the active layer 717 and the semiconductor layer 719 form the active stack of light-emitting diode 711.

[0107] By way of example, the semiconductor layer 715, the active layer 717 and the semiconductor layer 719 are formed successively by epitaxial growth from the face 713T of the substrate 713.

[0108] Fig. 7D illustrates more precisely a structure obtained at the end of a step of forming light-emitting diodes 211 from the structure described above in relation to Fig. 7C.

[0109] In the illustrated example, conduction electrodes 721 of the light-emitting diodes 211 are formed on the side of the face 713T of the substrate 713. The conduction electrodes 721 are, for example, more precisely, anode electrodes of the light-emitting diodes 211. In the example shown, the conduction electrodes 721 cover a face of the active stack of light-emitting diodes 711 opposite the substrate 713 (the upper face of the stack 711, in the orientation of [Fig. 7D]). The conduction electrodes 721 are, for example, located on and in contact with a face of the semiconductor layer 719 opposite the substrate 713 (the upper face of layer 719, in the orientation of [Fig. 7D]). The conduction electrodes 721 may, for example, have any shape in top view, such as rectangular, oval, square, circular, etc. For example, the conduction electrodes 721 may be made of a conductive material, such as a metal or a metal alloy.

[0110] Furthermore, during this step, peripheral isolation trenches 723 are formed in the thickness of the active LED stack 711. In the example shown, each peripheral isolation trench 723 extends vertically in the thickness of the active LED stack 711, from the face of the semiconductor layer 719 opposite the substrate 713 and passes through the semiconductor layer 719 and the active layer 717. In this example, each peripheral isolation trench 723 is interrupted in the thickness of the semiconductor layer 715, i.e., the peripheral isolation trenches 723 do not open onto the face 713T of the substrate 713.

[0111] In the illustrated example, each peripheral insulation trench 723 presents an annular shape surrounding, or bordering, a part of the active layer 717 corresponding to an active region of the light-emitting diode 211. Each peripheral insulation trench 723 further surrounds the conduction electrode 721 of the light-emitting diode 211.

[0112] The peripheral insulation trenches 723 form, for example, in top view, a grid in which each square laterally delimits a light-emitting diode 211.

[0113] By way of example, each peripheral insulation trench 723 includes a conductive region 725 whose side walls, or flanks, are coated with an insulating layer 727, the insulating layer 727 being for example located on and in contact with the flanks of the conductive region 725.

[0114] Furthermore, at least one connecting element 729 (a single connecting element 729 in the example shown) of a common conducting electrode, for example a cathode electrode, of the light-emitting diodes 211 is formed during this step. By way of example, each connecting element 729 comprises a conducting region 731 whose lateral walls, or flanks, are coated with an insulating layer 733, the insulating layer 733 being, for example, situated on and in contact with the flanks of the conducting region 731.

[0115] Fig. 7E illustrates more precisely a structure obtained at the end of a subsequent formation step, on the side of face 713T of substrate 713, of contact resumption elements 735.

[0116] In the example shown, each contact resumption element 735 is located on and in contact with one of the conduction electrodes 721, or on and in contact with the conductive region 731 of the contact element 729. In this example, insulating regions 737 extend laterally between the contact elements 735. In the illustrated example, the contact elements 735 are flush with the upper face of the insulating regions 737.

[0117] By way of example, the contact resumption elements 735 and the insulating regions 737 are obtained by implementing a damascene technique.

[0118] Fig. 7F illustrates more precisely a structure obtained as a result of a subsequent step of transferring the structure previously described in relation to Fig. 7E onto the structure previously described in relation to Fig. 7B.

[0119] By way of example, the structure previously described in relation to [Fig. 7E] is inverted with respect to the orientation of [Fig. 7E] and then brought into contact, by the faces of the contact elements 735 and the insulating regions 737 opposite the substrate 713 (the lower faces of the contact elements 735 and the insulating regions 737, in the orientation of [Fig. 7F]), with the face of the interconnect stack 707 opposite the support substrate 701 (the upper face of the interconnect stack 707, in the orientation of [Fig. 7F]). During this step, the structure comprising the substrate 713 and the active LED stack 711 is fixed to the interconnect stack 707.

[0120] By way of example, the fixation is achieved by molecular bonding between the two surfaces brought into contact. The molecular bonding is, for example, more precisely of the hybrid type, each surface comprising conductive elements, for example metallic, and insulating elements, for example oxide.

[0121] Fig. 7G more precisely illustrates a structure obtained after a further step of removing the substrate 713 and forming color converters 739 directly above the active regions of at least some light-emitting diodes 211.

[0122] The substrate 713 is for example totally eliminated, for example by grinding the structure previously described in relation to [Fig.7F] on the side of face 701T of substrate 701.

[0123] In the example shown, insulating regions 741 extend laterally between the color converters 739. In the illustrated example, the color converters 739 are flush with the face of the insulating regions 741 opposite the substrate 701 (the upper face of the regions 741, in the orientation of [Fig.7G]).

[0124] In the case where the device 100 is adapted to capture and display color images, the light-emitting diodes 211 emit, for example, predominantly blue light. In this case, the active regions of the blue emitting elements 103 of the device 100 are not covered by any color converter 739, and the active regions of the green and red emitting elements 103 are covered by converters of 739 different colors. Each 739 color converter includes, for example, quantum dots, for example, semiconductor nanocrystals, whose average size is chosen so as to allow a conversion of the blue light emitted by the 211 light-emitting diodes into green or red light.

[0125] Fig. 7H illustrates more precisely a structure obtained after a subsequent step of transferring the structure previously described in relation to Fig. 7G onto a substrate 743 and then removing the support substrate 701.

[0126] The substrate 743 is transparent to the radiation 109 emitted by the light-emitting diodes 211, for example transparent to visible light. By way of example, the substrate 743 is made of glass.

[0127] By way of example, the structure previously described in relation to [Fig. 7G] is inverted with respect to the orientation of [Fig. 7G] and then brought into contact, by the faces of the color converters 739 and the insulating regions 741 opposite the substrate 701 (the lower faces of the color converters 739 and the insulating regions 741, in the orientation of [Fig. 7H]), with a face 743T of the transparent substrate 743 (the upper face of the substrate 743, in the orientation of [Fig. 7H]). During this step, the structure comprising the photodetectors 201 and the light-emitting diodes 211 is fixed to the transparent substrate 743. By way of example, the fixing is achieved by molecular bonding between the two surfaces brought into contact.

[0128] The support substrate 701 is, for example, completely removed, for example by grinding the side of the face 743T of the substrate 743. Using an SOI type substrate has the advantage of facilitating the removal of the support substrate 701 during this step, for example by allowing a stop on the insulating layer 703.

[0129] Fig. 71 illustrates more precisely a structure obtained at the end of a further step of forming colour filters 745 and lenses 747 directly above each photodetector 201.

[0130] In the example shown, the color filters 745 are located on and in contact with the face of the insulating layer 703 opposite the transparent substrate 743 (the upper face of the insulating layer 703, in the orientation of [Fig. 7I]). Each color filter 745 has, for example, in top view, a shape and lateral dimensions substantially identical to those of the underlying photodetector 201.

[0131] In the illustrated example, the lenses 747 are located on and in contact with the face of the underlying color filter opposite the transparent substrate 743 (the upper face of the color filter 745, in the orientation of [Fig. 7I]). The lenses 747 allow, for example, the radiation 105 to be focused into an active region of the underlying photodetector 201.

[0132] Fig. 8A, Fig. 8B, Fig. 8C, Fig. 8D and Fig. 8E illustrate, by means of schematic and partial cross-sectional views, structures obtained at the end of the following steps successive steps of a manufacturing process of device 100 of [Fig.1] according to another embodiment.

[0133] Figure [Fig. 8A] illustrates more precisely a structure obtained at the end of a step of formation of the photodetectors 201 and the circuits 205 of the PIX pixels of the device 100. The technological process leading to the obtaining of the structure illustrated in [Fig.8A] is for example of the type of the process known under the English name "CMOS back-side" (from the English "Complementary Metal-Oxide-Semiconductor back-side").

[0134] The structure of [Fig. 8A] is obtained, for example, by transferring the structure previously described in relation to [Fig. 7A] onto a support substrate 801, or handle. By way of example, the support substrate 801 is a wafer or a piece of wafer made of a semiconductor material, for example silicon.

[0135] The structure previously described in relation to [Fig. 7A] is, for example, first inverted with respect to the orientation of [Fig. 7A] and then brought into contact, by the face of the interconnect stack 707 opposite the substrate 701 (the lower face of the interconnect stack 707), with a face 801T of the support substrate 801 (the upper face of the substrate 801, in the orientation of [Fig. 8A]). During this step, the structure comprising the support substrate 701, the photodetectors 201, and the interconnect stack 707 is fixed to the support substrate 801. By way of example, the fixation is achieved by molecular bonding between the two surfaces brought into contact.

[0136] The support substrate 701 and the insulating layer 703 are then completely removed, for example by grinding the side of the face 801T of the support substrate 801.

[0137] In the example shown, the color filters 745 are located on and in contact with the face of the photodetectors 201 opposite the support substrate 801 (the upper face of the photodetectors 201, in the orientation of [Fig. 8A]). Furthermore, in the illustrated example, the lenses 747 are located on and in contact with the face of the underlying color filter opposite the support substrate 801 (the upper face of the color filter 745, in the orientation of [Fig. 8A]).

[0138] Fig. 8B illustrates more precisely a structure obtained after a subsequent step of depositing a layer of glue 803 on the upper face side of the structure of Fig. 8A and of gluing a substrate 805 onto the lenses 747.

[0139] In the example shown, the glue layer 803 is flush with the face of the lenses 747 opposite the support substrate 801 (the upper face of the lenses 747, in the orientation of [Fig.8B]).

[0140] In the illustrated example, the substrate 805 covers the face of the adhesive layer 803 opposite the support substrate 801 (the upper face of the layer 803, in the orientation of [Fig. 8B]). The substrate 805 is transparent to the 105 radiation captured by the photodetectors 201, for example, transparent to visible light. As an example, the substrate 805 is made of glass. The substrate 805 is, for example, analogous or identical to the transparent substrate 743 previously described in relation to [Fig. 7I].

[0141] [Fig.8C] illustrates more precisely a structure obtained after a further step of removing the support substrate 801 and then thinning the structure previously shown in relation to [Fig.8B] on the side of a face of the interconnection stack 707 opposite the transparent substrate 805. The structure previously described in relation to [Fig.8B] is, for example, first flipped over with respect to the orientation of [Fig.8B].

[0142] The support substrate 801 is for example totally removed, for example by grinding the side of a face of the structure opposite the transparent substrate 805.

[0143] In the example illustrated in [Fig. 8C], the last metallization layer is flush with the face of the interconnect stack 707 opposite the transparent substrate 805 (the upper face of the interconnect stack 707, in the orientation of [Fig. 8C]). This amounts to removing the insulating layer of the interconnect stack 707 coated with the last metallization layer. The thinning is achieved, for example, by CMP, for example in a manner analogous to that described previously in relation to [Fig. 7B].

[0144] [Fig.8D] illustrates more precisely a structure obtained at the end of a subsequent step of transferring the structure previously described in relation to [Fig.7E] onto the structure previously described in relation to [Fig.8C].

[0145] By way of example, the structure previously described in relation to [Fig. 7E] is inverted with respect to the orientation of [Fig. 7E] and then brought into contact, by the faces of the contact elements 735 and the insulating regions 737 opposite the substrate 713 (the lower faces of the contact elements 735 and the insulating regions 737, in the orientation of [Fig. 8D]), with the face of the interconnect stack 707 opposite the support substrate 701 (the upper face of the interconnect stack 707, in the orientation of [Fig. 8D]). During this step, the structure comprising the substrate 713 and the active LED stack 711 is fixed to the interconnect stack 707.

[0146] By way of example, the fixation is achieved by molecular bonding between the two surfaces brought into contact. The molecular bonding is, for example, more precisely of the hybrid type, each surface comprising conductive elements, for example metallic, and insulating elements, for example oxide.

[0147] Figure 8E illustrates more precisely a structure obtained after a subsequent step of removing the substrate 713 and forming the color converters 739 directly above the active regions of at least some of the light-emitting diodes. 211, for example in the same or analogous way as has been set out above in relation to [Fig.7G]. In the illustrated example, the color converters 739 are separated laterally from each other by the insulating regions 741.

[0148] Fig. 9 is a schematic, partial side view of an example of implementation of device 100 of Fig. 1 in an electronic device 900. By way of example, device 900 is a pair of connected glasses or a head-mounted display intended to be placed in front of a user's eyes, for example, an augmented reality or mixed reality headset or glasses.

[0149] Although only one device 100 placed opposite one eye 901 has been symbolized in [Fig. 9], the electronic device 900 may of course include another device 100 placed opposite the user's other eye. In the illustrated example, the majority of the radiation, for example visible light, reaching the eye 901 comes from the device 100.

[0150] In the example shown, the electronic device 900 includes, in addition to the image capture and display device 100, a power supply circuit 903 and focusing elements 905, for example two convex lenses, located on either side of the device 100. By way of example, the power supply circuit 903 includes a battery.

[0151] In the illustrated example, the focusing element 905 interposed between the device 100 and the eye 901 is adapted to focus, on the eye 901, the radiation 109 produced by the emission elements 107. Furthermore, in this example, the focusing element 905 located between the device 100 and the outside is adapted to focus the incident radiation 105 on the detection elements 103.

[0152] The electronic device 900, for example, is devoid of addressing circuits and / or analog-to-digital converters.

[0153] Fig. 10 is a schematic and partial side view of another example of implementation of device 100 of Fig. 1 in an electronic device 1000. By way of example, device 1000 is a pair of glasses for assisting visually impaired persons, a pair of glasses for assisting a driver of a motor vehicle or a head-up display device, for example integrated into a motor vehicle such as a car, a truck, etc.

[0154] The electronic device 1000 is, for example, adapted to superimpose, onto an image of a scene seen by the eye 901, an image produced by the device 100, for example, an image of a contour or an intensified image of an object in the scene. In the case of an intensified image, the device 100 further includes, for example, an image processing circuit adapted to implement this function. By way of example, the device 1000 is used in image intensification or brightness amplification applications, or in vision applications in dimly lit environments, for example, night vision applications.

[0155] The electronic device 1000 of [Fig. 10] includes elements in common with the electronic device 900 of [Fig. 9]. These common elements will not be detailed again below.

[0156] The electronic device 1000 of [Fig. 10] differs from the electronic device 900 of [Fig. 9] in that, in the device 1000, the device 100 is not placed opposite the eye 901. In the illustrated example, the majority of the radiation, for example visible light, reaching the eye 901 comes from the scene and the majority of the incident radiation 105 reaches the eye 901 without being captured by the device 100.

[0157] In the illustrated example, the electronic device 1000 includes an optical waveguide 1001 comprising an input face arranged opposite the device 100, for example opposite the emitting elements 107, and an output face arranged opposite the eye 901. In this example, the optical waveguide 1001 is adapted to transmit, in the direction of the eye 901, the radiation 109 emitted by the device 100.

[0158] An advantage of integrating one or more devices 100 into the device 900 or 1000 is that it allows these devices to have a lower weight, size, complexity, energy consumption, manufacturing costs and / or latency than similar devices incorporating image capture and display devices including readout and control circuits implementing sensor and display addressing functions to which they are connected, and in which the images acquired by the sensor are for example stored in a memory circuit before being displayed, possibly after processing.

[0159] Various embodiments and variants have been described. Those skilled in the art will understand that certain features of these various embodiments and variants could be combined, and other variants will become apparent to those skilled in the art. In particular, although the described embodiments take as an example a case in which the arrays of sensing elements 103 and display elements 107 have a substantially identical pitch, those skilled in the art can predict, from the indications in this description, that the display element array 107 of the device 100 has a different, for example, larger, pitch than the sensing element array 103.

[0160] Furthermore, although the present description details embodiments where the radiation 105 captured by the detection elements 103 of the device 100 is visible light and where the radiation 109 emitted by the emission elements 107 is visible light, the embodiments are not limited to these examples but apply more generally to any type of radiation 105, for example infrared radiation, X-ray radiation, etc., and to any type of radiation 105. Depending on the type of radiation captured 105 and / or the radiation emitted 109, the element 107 emission of each pixel PIX of the device 100 can include more than one light-emitting diode 211.

[0161] Moreover, the embodiments are not limited to the display, by the matrix of emission elements 107, of color images in the case where the radiation 109 is visible light, but also apply to a case where monochrome or greyscale images are displayed by the emission elements 107.

[0162] Finally, the practical implementation of the described embodiments and variants is within the reach of a person skilled in the art, based on the functional indications given above. In particular, the described embodiments are not limited to the specific examples of materials and dimensions mentioned in this description.

Claims

Demands

1. Electronic device (100) for capturing and displaying images comprising a plurality of pixels (PIX) formed in and on a semiconductor substrate (101; 705), each pixel comprising: - a detection element (103) for a first radiation (105), located on the side of a first face (101F) of the semiconductor substrate (101); - an emission element (107) for a second radiation (109), located on the side of a second face (101R) of the semiconductor substrate opposite to the first face and comprising at least one light-emitting diode (211); and - a circuit (205) located in and on the semiconductor substrate and connecting the detection element to the emission element, in which said at least one light-emitting diode (211) is controlled by a control signal having pulses repeating at a frequency substantially proportional to an intensity of the first radiation (105) detected by the detection element (103).

2. Device (100) according to claim 1, wherein the circuit (205) comprises: - an acquisition circuit (207) located in and on the semiconductor substrate (101; 705) and adapted to provide an acquisition signal representative of an intensity of the first radiation (105) received by the detection element (103) of the pixel (PIX); and - a control circuit (209) located in and on the semiconductor substrate and adapted to apply a control signal to the emission element (107) of the pixel.

3. Device (100) according to claim 2, wherein the acquisition circuit (207) and the control circuit (209) are analog circuits.

4. Device (100) according to claim 2, wherein: - each detection element (103) comprises a photodetector (201); - each acquisition circuit (207) comprises a comparator (301) having an inverting input connected to a conduction electrode of the photodetector; and - each control circuit (209) includes an inverter (317) having an input connected to an output of the comparator and an output connected to a gate of a MOS transistor (319), the MOS transistor having a conduction electrode connected to the emission element (107).

5. Device (100) according to claim 2, wherein: - each sensing element (103) comprises a single-photon avalanche diode (501); - each acquisition circuit (207) comprises a Schmitt flip-flop (515) having an input connected to a conduction electrode of the single-photon avalanche diode; and - each control circuit (209) comprises an inverter (317) having an input connected to an output of the Schmitt flip-flop and an output connected to a gate of a MOS transistor (319), the MOS transistor comprising a conduction electrode connected to the emitting element (107).

6. Device (100) according to any one of claims 1 to 5, wherein the sensing elements (103) are located opposite the emitting elements (107).

7. Device (100) according to any one of claims 1 to 6, wherein the sensing elements (103) and the emitting elements (107) are arranged respectively in first and second matrices, the first and second matrices having substantially identical pitches.

8. Device (100) according to any one of claims 1 to 7, wherein the first and second radiations (105, 109) are visible light.

9. Device (100) according to any one of claims 1 to 8, comprising as many detection elements (103) as emission elements (107).

10. Electronic device (900; 1000) comprising: - a power supply circuit (903); and - at least one device (100) according to any one of claims 1 to 9.

11. A method for manufacturing a device (100) according to any one of claims 1 to 9, comprising a step of transferring, by molecular bonding, a structure comprising the detection elements (103) and the circuits (205) on another structure comprising the emission elements (107).

Images