REACTION CIRCUIT TO A NEGATIVE VOLTAGE ON AN ELECTRICAL LINE

Abstract

According to one aspect, an integrated circuit is proposed comprising a negative average voltage feedback circuit (CORC) including: - a low-pass filter (LPF) with an input connected to a power line (E_L) to be monitored, and an output configured to deliver a voltage corresponding to the average voltage on the power line (E_L) to be monitored, - a transistor (CM) connected to the low-pass filter (LPF) configured to receive the voltage of the signal flowing on the power line (E_L), the transistor (CM) being configured to conduct when the voltage delivered by the low-pass filter (LPF) is negative so as to create a current path from a node of the integrated circuit to the power line (E_L). Figure for the abstract: Figure 1

Description

Title of the invention: REACTION CIRCUIT TO A NEGATIVE VOLTAGE ON AN ELECTRICAL LINE

[0001] Embodiments and implementation methods relate to integrated circuits, and in particular to integrated circuits using an electrical line as a means of communication.

[0002] There are many applications in which an electrical line is subjected to a positive voltage, particularly for communicating data between two electronic devices. In these applications, an undesirable negative average voltage (i.e., the direct current (DC) component of the voltage on the electrical line) may appear under certain specific conditions.

[0003] It is therefore important to propose a solution to limit the occurrence of such an undesirable negative average voltage. Tests can be carried out to verify the state of the circuit when it is subjected to these conditions.

[0004] For example, the LIN protocol (short for Local Interconnect Network) is a communication protocol used in the automotive industry for non-critical functions. The LIN protocol is often used for applications such as window control, door locks, rearview mirrors, and climate control. It operates according to a master-slave architecture, where a single master can communicate with multiple slaves. The LIN protocol uses a single-wire communication bus connected to the various devices of the LIN network.

[0005] The "LIN" protocol is subject to various certifications, including those to guarantee electromagnetic compatibility (EMC) and immunity to radio frequency (RF) interference, as specified by the SAE J2962-1 standard. These certifications are essential to ensure the reliability and security of communications in vehicles.

[0006] In particular, the SAE J2962-1 standard requires a radio frequency interference immunity test “BCI” (abbreviation for “Bulk Current Injection”).

[0007] This test evaluates the system's ability to withstand electromagnetic interference by injecting an RF current through the communication bus. The "BCI" test verifies that the bus can maintain acceptable voltage levels, even under the influence of strong RF signals. More specifically, the test ensures that the average voltage in the bus's dominant mode does not fall below -5V.

[0008] Thus, it is necessary to propose a solution to prevent the voltage on the "LIN" communication bus from being less than -5V.

[0009] Furthermore, there are immunity tests to transient disturbances on a power line, for example on a "LIN" communication bus. These immunity tests to transient disturbances can lead to negative average voltages that should be avoided on the power line.

[0010] Thus, it is necessary to propose a solution to avoid negative average voltages on an electrical line during immunity tests to transient disturbances.

[0011] More generally, there is a need to propose a solution to limit the occurrence of negative average voltage on an electrical line, particularly during specific tests subjecting an electrical line to disturbances.

[0012] According to one aspect, an integrated circuit is proposed comprising a negative average voltage feedback circuit including: - a low-pass filter having an input connected to a power line to be monitored, and an output configured to deliver a voltage corresponding to the average voltage (i.e., the DC component of the voltage) on the power line to be monitored, - a transistor connected to the low-pass filter configured to receive the voltage of the signal flowing on the power line, the transistor being configured to be conducting when the voltage delivered by the low-pass filter is negative, in particular less than a voltage opposite to the threshold voltage of the transistor in the feedback circuit, so as to create a current path from a node of the integrated circuit to the power line.

[0013] Such a feedback circuit makes it possible to limit the appearance of negative average voltage on the power line, and in particular the impact of such voltage on the operation of the power line, by creating a current path between said node of the integrated circuit and the power line.

[0014] In an advantageous embodiment, disturbances can be injected into the power line to be monitored, the low-pass filter of the feedback circuit being configured to filter these disturbances.

[0015] Preferably, the transistor in the feedback circuit is a metal-oxide gate field-effect transistor, in particular high-voltage, capable of withstanding stresses that may be present on the power line, for example capable of withstanding a drain-source voltage of up to 50 Volts.

[0016] Advantageously, the transistor of the feedback circuit has a source connected to the output of the low-pass filter, a drain connected to said node from which a current path is created, and a gate connected to ground.

[0017] Advantageously, the feedback circuit transistor is configured to draw a current from said node from which the current path is created when the gate-source voltage of the feedback circuit transistor is greater than a voltage threshold voltage of this transistor. Such a gate-source voltage is obtained when the average voltage on the power line is negative.

[0018] In an advantageous embodiment, the feedback circuit comprises a first diode having a cathode connected to the drain of the transistor of the feedback circuit and a configured anode connected to said node from which a current path is created.

[0019] Preferably, the feedback circuit includes a second diode with a cathode connected to the gate of the feedback circuit transistor and an anode connected to ground. This second diode prevents current from being injected into ground. The second diode may also meet certain standardized test requirements.

[0020] Advantageously, the feedback circuit includes a resistive element between the gate and the source of the feedback circuit transistor.

[0021] In an advantageous embodiment, the electrical line to be monitored is a “LIN” bus.

[0022] In one embodiment, the integrated circuit further comprises a main transistor configured to control the "LIN" bus, the main transistor having a drain connected to the "LIN" bus via a diode, a source connected to ground and a gate configured to receive a control signal, the feedback circuit transistor having a drain connected to the gate of the main transistor.

[0023] In this embodiment, the feedback circuit creates a current path between the gate of the main transistor and the "LIN" bus when the average voltage on the "LIN" bus is negative and when the "LIN" bus is in a dominant operating mode, with the main transistor conducting. This raises the voltage on the "LIN" bus. The feedback circuit thus limits the occurrence of a negative average voltage on the "LIN" bus when it is in a dominant operating mode.

[0024] Advantageously, the drain of the feedback circuit transistor has a drain connected to the gate of the main transistor via the first diode. This first diode prevents current from being injected into the control circuit of the main transistor when the "LIN" bus is in a recessive operating mode.

[0025] In addition, said second diode makes it possible to avoid injecting a current into the ground when the "LIN" bus is in a recessive operating mode.

[0026] In one embodiment, the drain of the feedback circuit transistor is connected, in particular via said first diode, to an output of at least one electrostatic discharge protection circuit and to a node between a main power line control transistor, for example a "LIN" bus, and a diode through which the drain of the main transistor is connected to the power line.

[0027] In such an embodiment, when said at least one discharge protection circuit is not triggered and the power line has been previously brought to a positive voltage (for example, when the power line is in a recessive state or after a positive pulse injected during a transient disturbance immunity test), the node connected to the output of said at least one protection circuit becomes floating, as does the node between the drain of the main transistor and said diode connecting the main transistor to the power line. The feedback circuit then makes it possible to create a current path between these nodes and the power line.

[0028] Other advantages and features of the invention will become apparent upon examination of the detailed description of embodiments, which are by no means limiting, and the accompanying drawings in which:

[0029] [Fig.1]

[0030] [Fig.2]

[0031] [Fig.3] ; and

[0032] [Fig.4] illustrate embodiments and implementations of the invention.

[0033] Fig. 1 illustrates an integrated circuit IC comprising a feedback CORC circuit configured to monitor an electrical line E_L.

[0034] The power line E_L is configured to carry an electrical signal having a positive or zero voltage under normal operating conditions. The power line E_L may be subject to disturbances that could affect the voltage on the power line E_L.

[0035] For example, there are tests, such as radio frequency interference immunity tests "BCI" (short for "Bulk Current Injection") or transient pulse immunity tests, in which disturbances can be injected on the power line in order to evaluate the behavior of the integrated circuit IC in the face of these disturbances.

[0036] The CORC feedback circuit is connected on one side to the power line E_L to be monitored and on the other side to a node of the integrated circuit. The CORC feedback circuit is configured to create a current path between said node and the power line E_L to be monitored when the average voltage (i.e., the DC component of the voltage) on this power line E_L is negative, in particular below a negative threshold.

[0037] The CORC feedback circuit includes an LPF low-pass filter and a CM transistor. The LPF low-pass filter has an input connected to the E_L power line and an output connected to the CM transistor.

[0038] The LPF low-pass filter is configured to filter disturbances injected on the power line E_L to be monitored so as to deliver at the output the average voltage on the power line E_L.

[0039] The CM transistor is an insulated-gate field-effect transistor (also designated by the abbreviation "MOSFET" from the English "Metal-Oxide-Semiconductor Field-Effect Transistor"), particularly high-voltage, capable of withstanding stresses that may be present on the power line, for example capable of withstanding a drain-source voltage of up to 50 Volts. In particular, the CM transistor may be an "NMOS" transistor, having an n-type channel.

[0040] The CM transistor has a source connected to the output of the LPF low-pass filter. The CM transistor has a drain configured to be connected to a node of the integrated circuit (IC) from which a current path is created when the average voltage on the power line is negative, in particular below a negative threshold, for example below the opposite value of a threshold voltage of the CM transistor. The CM transistor also has a gate connected to ground (GND).

[0041] The CM transistor is configured to draw a current I when the gate-source voltage VGs of the CM transistor is greater than a threshold voltage VT of this transistor. Such a gate-source voltage VGS is obtained when the average voltage on the power line E_L is negative. This creates a current path I between the node to which the drain of the CM transistor is connected and the power line E_L.

[0042] Fig. 2 illustrates an advantageous embodiment of a CORC reaction circuit.

[0043] In this embodiment, the LPF low-pass filter is a second-order low-pass filter comprising two cascaded RC cells. Each cell comprises a resistive element RF and a capacitive element CF. The resistive element RF is placed in series with respect to the input of the LPF low-pass filter, and the capacitive element CF is placed in parallel with respect to the output of the LPF low-pass filter. Alternatively, a low-pass filter with a single RC cell may be used.

[0044] Furthermore, the CORC feedback circuit also includes a resistor RGS between the drain and source of the CM transistor. This resistor RGS prevents the CM transistor from remaining on—due to a stored charge on a capacitor CGS (not shown) between the gate and source of the CM transistor—when the average voltage on the electrical line E_L becomes positive again because the DGND diode is reverse-biased. The resistor RGS discharges the capacitor CGS so that the voltage VGS of the CM transistor returns to zero.

[0045] The value of the capacitive elements CF and the resistive elements RF of the low-pass filter LPF, as well as the value of the resistance RGS between the source and the gate of the transistor allow adjustment of the discharge of the electrical line E_L, the filtering effect of the low-pass filter LPF and the reaction time of the CORC circuit.

[0046] Furthermore, in this embodiment, the feedback CORC circuit also includes a DCM diode connected to the drain of the CM transistor and configured to receive the current I.

[0047] In particular, the DCM diode has a cathode connected to the drain of the CM transistor and an anode configured to receive the current I. This DCM diode makes it possible to protect the voltage on a source from the current I to the negative average voltage that may appear on the electrical line E_L.

[0048] The CORC feedback circuit also includes a DGND diode between ground (GND) and the gate of the CM transistor. This DGND diode has an anode connected to ground and a cathode connected to the gate of the CM transistor. This DGND diode prevents a direct resistive impedance between the electrical line E_L to be monitored and ground (GND).

[0049] Fig. 3 illustrates an embodiment of an integrated circuit IC in which the electrical line E_L to be monitored is a "LIN" bus (abbreviation for "Local Interconnect Network").

[0050] The integrated circuit IC includes a COM circuit for controlling the "LIN" bus. The COM circuit for controlling the "LIN" bus corresponds to an output stage of a transmitter.

[0051] The COM circuit for controlling the "LIN" bus includes a main transistor PM associated with the "LIN" bus. The main transistor PM is a MOSFET. The main transistor PM may, for example, be an NMOS transistor. This main transistor PM has a drain connected to the "LIN" bus via a diode DD. In particular, the cathode of diode DD is connected to the drain of the NMOS transistor and the anode of diode DD is connected to the "LIN" bus.

[0052] The COM control circuit of the “LIN” bus also includes a resistor RG.

[0053] The COM control circuit of the “LIN” bus further includes an SCOM control signal generator circuit configured to generate a control signal to control the main transistor PM.

[0054] In particular, the control signal upstream of the resistor RG is configured to present a voltage V1 enabling the main transistor PM to switch into dominant mode, and to present a voltage of 0 Volt enabling the transistor PM to switch into recessive mode.

[0055] The "LIN" bus is powered by a power supply VBAT. In particular, the "LIN" bus is connected to the power supply VBAT via a pull-up resistor RS and a diode DS connected in series. In particular, the diode DS has an anode connected to the power supply VBAT, and a cathode connected to one terminal of the pull-up resistor RS. The pull-up resistor RS has a second terminal connected to the "LIN" bus.

[0056] The "LIN" bus can be subject to disturbances, particularly during radio frequency interference immunity "BCI" tests. As explained previously, these disturbances can lead to a negative average voltage on the "LIN" bus, especially when the "LIN" bus is in a dominant mode.

[0057] In order to limit the impact of such disturbances, the CORC reaction circuit is connected to the "LIN" bus so that it can be monitored and the control of the "LIN" bus adapted when a negative average voltage on the "LIN" bus is detected.

[0058] As described previously, the feedback CORC circuit includes an LPF low-pass filter and a CM transistor, in particular a “MOSFET” transistor.

[0059] The LPF low-pass filter has an input connected to the “LIN” bus and an output connected to the CM transistor.

[0060] The CM transistor has a drain connected to the gate of the main transistor PM, a source connected to the output of the low-pass filter LPF and a gate connected to ground GND.

[0061] Preferably, the drain of the CM transistor is connected to the gate of the main PM transistor via a DCM diode and the gate of the CM transistor is connected to ground via a DGND diode, as described in [Fig.2].

[0062] The DCM diode then protects the voltage on the gate of the main PM transistor from the voltage that may appear on the “LIN” bus.

[0063] The DGND diode prevents a direct resistive impedance between the "LIN" bus and ground (GND). The DGND diode prevents current from being injected into ground.

[0064] The CORC feedback circuit makes it possible to limit the impact of electromagnetic disturbances on the "LIN" bus, in particular during radio frequency interference immunity tests.

[0065] In particular, the CORC feedback circuit allows the gate voltage of the main PM transistor of the COM control circuit to be lowered when the average voltage on the "LIN" bus is negative, especially when the average voltage on the "LIN" bus is less than the opposite value of the threshold voltage of the CM transistor (i.e., VL1N DC <-VT). This is because, when the CM transistor is conducting, a feedback current is drawn from the gate of the main PM transistor.

[0066] The CORC feedback circuit thus makes it possible to modify the behavior of the control COM circuit when the average voltage on the "LIN" bus is negative and the "LIN" bus is in a dominant mode due to the action of the control COM circuit making the main PM transistor conduct, in particular so that the average voltage on the “LIN” bus remains within a range conforming to the SAE J2962-1 standard (greater than -5 Volts).

[0067] Such a CORC feedback circuit has no impact on the performance of the "LIN" bus. Furthermore, such a CORC feedback circuit is simple, occupies little space in the integrated circuit IC, and does not require additional power consumption.

[0068] In addition, such a CORC circuit complies with other standard tests, such as current leakage tests in cases of mass loss or battery loss, for example.

[0069] Figure 4 illustrates another embodiment in which the CORC feedback circuit is used to provide transient pulse immunity in an integrated circuit IC.

[0070] In particular, the integrated circuit IC includes an electrical line E_L to be monitored. This electrical line E_L can be a "LIN" bus, for example.

[0071] The electrical line E_L is powered by a power supply VBAT. In particular, the electrical line E_L is connected to the power supply VBAT via a diode DS and a resistor RS connected in series. Diode DS has an anode connected to the power supply VBAT and a cathode connected to one terminal of resistor RS. Resistor RS has a second terminal connected to the electrical line E_L.

[0072] The integrated circuit IC also has a COM control circuit for controlling the electrical line E_L.

[0073] In particular, the COM control circuit includes a PM transistor for controlling the E_L power line. The PM transistor is a "MOSFET" type transistor, for example an NMOS transistor.

[0074] This PM transistor has a gate configured to receive a control signal CSG, a source connected to ground GND, and a drain connected to the power line E_L via a diode DA of the control circuit COM. This diode DA has a cathode connected to the drain of the PT transistor and an anode connected to the power line E_L. A node A is defined between the PT transistor and the diode DA.

[0075] The integrated circuit IC also includes a diode DB between a voltage source VS and the power line E_L. This diode DB has a cathode connected to the voltage source via a node B and an anode connected to the power line E_L. The voltage source VS is a positive floating rail for protection against electrostatic discharge.

[0076] The integrated circuit includes various electrostatic discharge protection circuits ESDI, ESD2. These protection circuits may be based on a Darlington configuration.

[0077] In particular, a first ESDI circuit for protection against electrostatic discharge is disposed between the voltage source VS and a ground GND. This first ESDI protection circuit is equivalent to a diode when the first ESDI protection circuit is not triggered.

[0078] This diode has a cathode connected to the voltage source VS and an anode connected to ground GND. Node B is defined between the first ESDI discharge protection circuit and the voltage source VS. When the first ESDI protection circuit is not triggered, this first ESDI protection circuit, which is then equivalent to a diode, makes node B float.

[0079] A second ESD2 circuit for protection against electrostatic discharge is disposed between the "LIN" bus and ground (GND). In particular, this second ESD2 protection circuit is equivalent to a DC diode when the second protection circuit is not triggered. This DC diode has an anode connected to the "LIN" bus and a cathode connected to ground via a diode DG.

[0080] This diode DG has a cathode connected to the cathode of the second ESD2 electrostatic discharge protection circuit, and an anode connected to ground. A node C is defined between the second ESD2 electrostatic discharge protection circuit and the diode DG. When the second ESD2 protection circuit is not triggered, this second ESD2 protection circuit, which then functions as a diode, makes node C float.

[0081] As part of transient disturbance immunity tests, disturbances are injected onto the E_L power line. These disturbances correspond to pulses injected onto the E_L power line. These pulses can cause a negative average voltage on the E_L power line. Furthermore, these pulses are not fast enough to trigger the ESDI and ESD2 protection circuits. Thus, nodes A, B, and C are floating when these pulses are injected onto the E_L power line.

[0082] In particular, nodes A, B, and C are floating when the power line E_L has been previously held at a positive voltage (for example, in a recessive state or after a positive pulse injected during a transient disturbance immunity test). More specifically, initially, nodes A, B, and C follow the voltage on the power line E_L through the diode. When the signal on the power line E_L falls back down, diodes DA, DB, and DC are reverse-biased, and nodes A, B, and C are then floating. Depending on the positive pulse injected during a transient disturbance immunity test, the average voltage of the power line E_L may subsequently fall into negative territory. If this average voltage becomes too negative, since nodes A, B, and C remain charged to a high value, diodes DA, DB, and DC may experience a higher reverse voltage. under maximum conditions that can be supported by these diodes (these conditions can be designated by the abbreviation "AMR" from the English "Absolute Maximum Rating").

[0083] It is therefore necessary to prevent the reverse voltage across diodes DA, DB, and DC from exceeding the maximum conditions that these diodes can withstand. These maximum conditions are not met when the average voltage on the power line does not fall below a negative voltage threshold.

[0084] The CORC feedback circuit is used to create a discharge path at nodes A, B, and C when the average voltage on the power line E_L becomes negative. The CORC feedback circuit prevents the average voltage on the power line from falling below this negative voltage threshold.

[0085] More specifically, the CORC feedback circuit includes a CM transistor and a DCM diode for each node A, B and C. Each DCM diode has a cathode connected to the drain of a CM transistor and an anode connected to nodes A, B or C.

[0086] Such a feedback CORC circuit makes it possible to create an efficient discharge path on nodes A, B and C when the power line voltage becomes negative, in particular when the power line voltage becomes less than the opposite of the threshold voltage of the CM transistor of the feedback CORC circuit.

[0087] Such a CORC reaction circuit makes it possible to reduce the risk of exceeding an absolute maximum rating that may appear during immunity tests to transient disturbances.

[0088] As seen previously, such a feedback CORC circuit is simple, occupies little space in the integrated circuit IC and does not require additional power consumption.

[0089] Of course, the CORC feedback circuit can be used in other applications requiring monitoring of a negative average voltage on a power line, to create a current path from a node of the integrated circuit to the power line when the average voltage on the power line is negative, in particular below a negative threshold.

Claims

Demands

1. Integrated circuit comprising a negative average voltage reaction circuit (CORC) having: - a low-pass filter (LPF) having an input connected to a power line (E_L) to be monitored, and an output configured to deliver a voltage corresponding to the average voltage on the power line (E_L) to be monitored, - a transistor (CM) connected to the low-pass filter (LPF) configured to receive the voltage of the signal flowing on the power line (E_L), the transistor (CM) being configured to be conducting when the voltage delivered by the low-pass filter (LPF) is negative so as to create a current path from a node of the integrated circuit to the power line (E_L).

2. Integrated circuit according to claim 1 in which disturbances can be injected into the power line (E_L) to be monitored, the low-pass filter (LPF) of the feedback circuit (CORC) being configured to filter these disturbances.

3. Integrated circuit according to any one of claims 1 or 2, wherein the transistor (DM) of the feedback circuit (CORC) is a metal-oxide gate field-effect transistor.

4. Integrated circuit according to claim 3, wherein the feedback circuit transistor (CM) has a source connected to the output of the low-pass filter (LPF), a drain connected to said node from which a current path is created, and a gate connected to ground (GND).

5. Integrated circuit according to claim 4, wherein the feedback circuit (CORC) comprises a first diode (DCM) having a cathode connected to the drain of the transistor (CM) of the feedback circuit (CORC) and an anode connected to said node from which a current path is created.

6. Integrated circuit according to any one of claims 4 or 5, wherein the feedback circuit (CORC) comprises a second diode (DGND) having a cathode connected to the gate of the transistor (CM) of the feedback circuit (CORC) and an anode connected to ground (GND).

7. Integrated circuit according to any one of claims 4 to 6, wherein the feedback circuit (CORC) comprises a resistive element (RGS) between the gate and the source of the transistor (CM) of the feedback circuit (CORC).

8. Integrated circuit according to any one of claims 1 to 7, wherein the power line (E_L) to be monitored is a “LIN” bus.

9. Integrated circuit according to claim 8, further comprising a main transistor (PM) configured to control the "LIN" bus, the main transistor having a drain connected to the "LIN" bus via a diode, a source connected to ground (GND) and a gate configured to receive a control signal, the feedback circuit (CORC) transistor (CM) having a drain connected to the gate of the main transistor (PM).

10. Integrated circuit according to any one of claims 1 to 9, wherein the drain of the feedback circuit transistor (CM) is connected, in particular via said first diode (DCM), to an output of at least one electrostatic discharge protection circuit (CORC) and to a node between a main power line control transistor (PM) and a diode (DCM) through which the drain of the main transistor is connected to the power line (E_L).