Photodiode electronic device

Abstract

Photodiode Electronic Device This description relates to a photodiode electronic device (20) comprising: - at least one photodiode (200) formed in a silicon substrate (110) comprising a front face (110A) and a rear face (110B), each photodiode having a first height (H1) in the substrate and comprising at least one first semiconducting region (114) of the substrate, of a first type of conductivity; - at least one insulation trench (220) extending from the rear face (110B) over a second height (H2) in the substrate (110), the second height (H2) being at least equal to the first height (H1); each insulation trench comprising: a first epitaxial layer (224) of silicon coating doped with the second type of conductivity opposite to the first type of conductivity on said side wall; and a second layer (222) of silicon oxide in said insulation trench. Figure for the summary: Fig. 2

Description

Title of the invention: Electronic device with photodiode technical field

[0001] This description relates generally to electronic devices and more specifically to electronic devices comprising one or more photodiodes, or electrical devices with photodiodes.

[0002] The present description relates in particular to photodiode pixels.

[0003] The present description relates in particular to semiconductor photodiodes.

[0004] The electronic devices may be image sensors comprising a plurality of photodiode pixels. Previous technique

[0005] An image sensor can comprise several pixels arranged in an array, for example in a matrix, each pixel comprising at least one photodetector adapted to capture light radiation (photons) and convert it into charge carriers, i.e., electrons or holes. This can thus be referred to as photoconversion, or photoelectric conversion. The generated charge carriers can be transferred to one (or more) circuit(s), such as a readout circuit, adapted to convert them into electrical signals. The pixel array is generally associated with various readout, control, power supply, etc. circuits.

[0006] Several photodetectors can be integrated into and onto the same semiconductor substrate, for example, a silicon substrate. The semiconductor substrate can comprise one or more semiconductor layers. The photodetectors can be isolated from each other by insulating structures, for example, insulating trenches, which extend through all or part of the thickness of the semiconductor substrate. By way of example, each photodetector comprises a photosensitive region integrated into the semiconductor substrate, which can be designated as the "active region." This active region corresponds to a region in which charge carriers are generated by conversion of light radiation and stored. The active region can be a depletion region of the semiconductor substrate.

[0007] A photodetector can be a photodiode, which is a semiconductor component having at least one PN junction, generally formed by an N-type semiconductor region in contact with a P-type semiconductor region. In operation, the photodiode is in reverse bias mode. When the reverse-biased photodiode is exposed to photons, electron-hole pairs can be generated around the PN junction of the photodiode.

[0008] For example, the photodiode may be a pinned photodiode. A pinned photodiode can be defined as a photodiode in which the active region comprises an N-type or P-type semiconductor region surrounded by several P-type or N-type semiconductor regions. For example, the N-type or P-type active region is entirely depleted by heavily doped P-type or N-type semiconductor regions. In the case of an N-type active region, electrons generated by the conversion of light radiation are stored in this active region, while holes are removed from the heavily doped P-type semiconductor regions.In the case of a P-type active region, depleted by heavily N-doped semiconductor regions, holes are stored in this active region, while electrons are evacuated into the heavily N-doped semiconductor regions.

[0009] It may be sought to improve the performance of a pixel, for example the improvement of the quantum efficiency of a photodiode, or QE for Quantum Efficiency in English, that is to say the ratio between the number of electronic charges collected and the number of incident photons and / or the reduction of the dark current, that is to say the residual electric current of the photodiode in the absence of light illumination, which is a source of noise that we seek to reduce. Summary of the invention

[0010] There is a need for a photodiode electronic device whose performance is improved, in particular whose dark current can be reduced.

[0011] An embodiment overcomes all or part of the drawbacks of known photodiode devices.

[0012] An embodiment provides for a photodiode electronic device comprising: - at least one photodiode formed in a silicon substrate comprising a front face and a rear face opposite the front face, the at least one photodiode being configured to capture light radiation by the rear face; the at least one photodiode having a first height in the substrate and comprising at least a first semiconductor region of the substrate, the first semiconductor region being of a first type of conductivity; - at least one isolation trench around at least one photodiode, the at least one isolation trench extending from the rear face to a second height in the substrate, the second height being at least equal to the first height; each isolation trench being delimited in the substrate by a side wall and comprising: a first layer of silicon coating doped with the second type of conductivity opposite to the first type of conductivity on said side wall, said first layer being an epitaxial layer; and a second layer of silicon oxide in said insulation trench, the first layer being between the second layer and the substrate.

[0013] According to one embodiment, each insulation trench further comprises a third layer of alumina between the first layer and the second layer.

[0014] According to one embodiment, the second layer of each insulation trench forms a silicon oxide filling layer of said insulation trench.

[0015] According to one embodiment, each insulation trench further comprises a fourth layer of a conductive or semiconducting material, forming a filling layer of said insulation trench.

[0016] An embodiment provides a method for manufacturing a photodiode electronic device, the method comprising, starting from a structure comprising at least one photodiode formed in a silicon substrate comprising a front face and a rear face opposite the front face, the at least one photodiode being configured to capture light radiation by the rear face; the at least one photodiode having a first height in the substrate and comprising at least one first semiconductor region of the substrate, the first semiconductor region being of a first type of conductivity: - the formation of at least one trench around at least one photodiode, said at least one trench extending from the rear face to a second height in the substrate, the second height being at least equal to the first height; each trench being delimited in the substrate by a lateral wall; - the formation by epitaxial growth at a temperature below 600°C, for example less than or equal to 500°C, of ​​a first layer of silicon doped with the second type of conductivity on the side wall of each trench; then - the deposition of a second layer of silicon oxide in each trench, so that the first layer is between the second layer and the substrate.

[0017] According to one embodiment, the manufacturing process further comprises, before the deposition of the second layer: - the deposition of a third layer of alumina, so that the third layer is between the first layer and the second layer.

[0018] According to one embodiment, the second layer fills each trench to form an insulation trench.

[0019] According to one embodiment, the manufacturing process further comprises, after the deposition of the second layer: - the deposition of a fourth layer of a conductive or semiconducting material so as to fill each trench to form an insulation trench.

[0020] According to one embodiment, at least one insulation trench or the trench has a height-to-width ratio greater than 30.

[0021] According to one embodiment, the first semiconductor region of each photodiode forms the active region of said photodiode, the first semiconductor region being weakly doped, for example having a doping concentration of less than 1016 at / cm3.

[0022] According to one embodiment, each photodiode further comprises a second semiconductor region of the substrate, said second semiconductor region being of the second type of conductivity, and extending from the rear face to the first semiconductor region.

[0023] According to one embodiment, the second semiconductor region forms the active region of the photodiode, the second semiconductor region being weakly doped, for example having a doping concentration of less than 1016 at / cm3.

[0024] According to one embodiment, each photodiode comprises a fourth semiconductor region of the substrate, said fourth semiconductor region being doped with the second type of conductivity and extending from the front face to the first semiconductor region; the fourth semiconductor region being heavily doped, for example having a doping concentration greater than or equal to 1018 at / cm3.

[0025] According to one embodiment, the first layer: - has a thickness between 4 and 10 nanometers; and / or - is heavily doped, for example has a doping concentration greater than or equal to 1.1018 at / cm3.

[0026] According to one embodiment, the electronic device is an image sensor, and each photodiode is contained within a pixel of said image sensor. Brief description of the drawings

[0027] These features and advantages, as well as others, will be described in detail in the following description of particular embodiments, given by way of non-limiting example, in relation to the accompanying figures, among which:

[0028] [Fig.1] is a simplified cross-sectional view illustrating an example of an electronic device with photodiodes;

[0029] [Fig.2] is a simplified cross-sectional view illustrating an electronic photodiode device according to one embodiment;

[0030] [Fig. 3] is a simplified cross-sectional view illustrating a photodiode electronic device according to another embodiment; and

[0031] [Fig.4A], [Fig.4B], [Fig.4C], [Fig.4D], [Fig.4E], [Fig.4F] and [Fig.4G] are simplified cross-sectional views illustrating structures obtained at the end of steps in a manufacturing process of a photodiode electronic device according to an embodiment. Description of the implementation methods

[0032] The same elements have been designated by the same reference numerals in the different figures. In particular, the structural and / or functional elements common to the different embodiments may have the same reference numerals and may have identical structural, dimensional and material properties.

[0033] For the sake of clarity, only the steps and elements necessary for understanding the described embodiments have been shown and are detailed. In particular, not all the circuits of a pixel, for example a memory and / or a read circuit, are detailed, as the embodiments are compatible with all or most pixel circuits, possibly with adaptations within the grasp of a person skilled in the art upon reading this description. Furthermore, pixels comprising a single photodiode are primarily shown, although a pixel may comprise one or more photodiodes. In addition, not all applications of photodiode devices are detailed.

[0034] Unless otherwise specified, when referring to two elements connected together, this means directly connected without intermediate elements other than conductors, and when referring to two elements connected (in English "coupled") together, this means that these two elements can be connected or linked through one or more other elements.

[0035] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "superior", "inferior", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made, unless otherwise specified, to the orientation of the figures.

[0036] In the following description, a height or a depth corresponds to a dimension taken in the Z direction, which can correspond to a vertical direction, and a width corresponds to a dimension taken in the X direction, which can correspond to a horizontal direction.

[0037] Unless otherwise specified, the expressions "approximately", "roughly", and "on the order of" mean to within 10% or 10°, preferably to within 5% or 5°.

[0038] In the following description, when a region is referred to, unless otherwise specified, it refers to a semiconductor region. In the description In the following, when referring to a substrate, unless otherwise specified, it refers to a semiconductor substrate. In the description that follows, when referring to a charge, unless otherwise specified, it refers to a charge carrier, that is, an electron or a hole.

[0039] In the following description, when reference is made to an epitaxial or epitaxial layer, reference is made to a layer formed by epitaxial growth.

[0040] In the following description, the expression "active region" of a photodiode refers to a region from which the majority of the light radiation received by the photodiode is captured.

[0041] In the examples given below, it is assumed that the first type of conductivity is of type N and that the second type of conductivity is of type P, but the examples can also apply if the types of conductivity are reversed, i.e. that the first type of conductivity is of type P and the second type of conductivity is of type N.

[0042] The present description relates to photodiodes, for example planar type photodiodes or volumetric, or pinched photodiodes.

[0043] Figure 1 is a simplified cross-sectional view illustrating an example of a photodiode electronic device 10. The illustrated electronic device 10 comprises two photodiodes 100 formed in a semiconductor substrate 110, generally silicon (Si). The electronic device 10 can be contained within an image sensor, or form an image sensor. Each photodiode 100 is contained within a pixel 101, which generally includes circuitry that is not detailed. In the example shown, two photodiodes 100 and two pixels 101 are depicted, it being understood that the electronic device 10 could comprise an array of more than two pixels 101, for example, a pixel matrix 101.

[0044] In the example shown, the photodiodes 100 are of the BSI type, from the English Back Side Illumination, or Back Illuminated, that is to say, illuminated by the rear face 110B, or backlit. The rear face 110B corresponds to the rear face of the substrate 110 in which the photodiodes 100 are formed, this rear face being opposite the front face 110A, which is the face of the substrate 110 on which electronic circuits are formed, including, for example, transistors, as well as generally an interconnection structure. Thus, each photodiode 110 is configured to capture light radiation (photons) by the rear face 110B of the substrate 110 and to convert them into charge carriers, that is to say, electrons or holes.

[0045] The front face 110A is shown at the bottom of [Fig.1] and the rear face 110B of the substrate 110 is shown at the top of [Fig.1].

[0046] The electronic device 10 shown comprises on each rear face 110B a lens 130, for example a microlens. The electronic device 10 could also include one or more filters on the rear panel 110B. Although not shown, an interconnection structure is usually formed on the front panel 110A.

[0047] Each photodiode 100 comprises, in the substrate 110, a semiconductor region 114 doped with a first type of conductivity, in this example type N, and a semiconductor region 112 doped with a second type of conductivity, in this example type P. The semiconductor regions 112 and 114 are in contact with each other, thus forming a PN junction. This forms a photodiode that can be designated a planar photodiode.

[0048] The P-doped semiconductor region 112 can form an active region, that is, a region in which charge carriers are generated by conversion of light radiation. The semiconductor region 112 is lightly doped (P-), for example, has a doping concentration less than 10¹⁶ at / cm³, for example, approximately 10¹⁵ at / cm³.

[0049] The N-doped semiconductor region 114 forms, for example, an electron collection and storage area. In other words, electrons resulting from light radiation striking the photodiode 100 can be accumulated in the N-type region 114. The semiconductor region 114 is, for example, heavily doped, more heavily doped (N+) than the semiconductor region 112, for example, has a doping concentration greater than 10¹⁶ at / cm³, for example, equal to about 10¹⁷ at / cm³.

[0050] Each photodiode 100 further comprises, in the substrate 110, a semiconductor region 116 doped with the second type of conductivity, in this example of type P. The semiconductor region 116 is flush with the front face 110A of the substrate 110. The semiconductor region 114 is located between the semiconductor region 112 and the semiconductor region 116. The semiconductor region 116 is heavily doped with P (P+), more heavily doped than the semiconductor region 112, for example has a doping concentration between approximately 1018 and 1019 at / cm3.

[0051] By way of example, the height H1 of each photodiode 100 is within the range of 7 to 13 pm, inclusive, and in some cases is approximately 10 pm. The width 11 of each photodiode 100 is, for example, approximately 3 pm or less than 3 pm. In some embodiments, the height H1 and the width 11 are such that the photodiode has an aspect ratio greater than 3.

[0052] Each photodiode 100 may include structural motifs 115 in the substrate 110 extending from the illuminated face, which is the rear face 110B in this example. The structural motifs 115 are, for example, made of carbon dioxide. silicon (SiO2) and have the function of increasing the sensitivity of the photodiode to light, and thus increasing quantum efficiency.

[0053] The photodiodes 100 are laterally isolated, and in particular are isolated from each other, by isolation trenches 120 which extend from the rear face 110B deep into the substrate 110, in the example shown over the entire height H1 of the photodiodes 100. Each photodiode 100 can be delimited, or isolated, by a continuous isolation trench 120 all around this photodiode, or by several isolation trenches.

[0054] In the following description, we can speak interchangeably of an insulation trench or an insulating trench.

[0055] By way of example, the width 12 of each insulating trench 120 is approximately 340 nm. The height H2 (or depth) of each insulating trench 120 in the substrate 110 is, in this example, equal to the height H1 of each photodiode 100, i.e., approximately 10 pm. The insulating trench 120 thus exhibits a high height-to-width ratio.

[0056] Each insulating trench 120 is defined laterally by a side wall 120L, or flank. Depending on the shape of the insulating trench, this may be a single side wall (for example, for a cylindrical shape) or several contiguous side walls (for example, for a parallelepiped shape). In the following description, a side wall will be used to refer to one or more insulating walls of an insulating trench.

[0057] In the example shown, each insulating trench 120 comprises, from the side wall 120L towards the center of this insulating trench: - a layer 121 of alumina (A12O3) coating the lateral wall 120L (side) of trench 120; - a layer 122 of silicon dioxide (SiO2) coating the alumina layer; and - a layer 123 of a conductive or semiconducting material, for example aluminium (Al) filling the remainder of the trench 120.

[0058] The insulating trenches 120 can thus form capacitive deep trench insulation (CDTI). In the example shown, we can refer to this as BDTI, for Backside Deep Trench Insulation: these are insulating trenches formed from the back face 110B of the substrate 110. The insulating trenches 120 can be polarized. For example, a polarization adapted to deplete, that is, reduce the semiconductor region 112, can be applied.

[0059] The alumina layer 121 forms a passivation layer of the insulating trench 120. The alumina layer 121 contains negatively fixed charges, which attract positive charges (h+) around the insulating trench 120 over the entire height H1 of the photodiode 100, creating a passivation effect. This allows Reducing dark current. Indeed, the entire active region in Si can be a source of dark current, and in particular the interfaces between Si and SiO2 are potentially significant sources of dark current. By inserting this alumina layer 121 between the silicon and the SiO2 layer 122, this interface can be eliminated and the dark current reduced.

[0060] However, despite the presence of the alumina layer in the example of [Fig.1], it will be desirable to further reduce the dark current of each photodiode and to improve the non-uniformity in terms of dark current from one photodiode to another.

[0061] The inventors propose a photodiode electronic device and a method for manufacturing such an electronic device that meets the improvement needs described above and overcomes all or part of the drawbacks of the photodiode electronic devices described above. In particular, the inventors propose a photodiode electronic device and a method for manufacturing such an electronic device that further reduces dark current.

[0062] Embodiments of photodiode electronic devices and a corresponding manufacturing method will be described below. The embodiments described are not limiting, and various variations will become apparent to those skilled in the art from the indications in this description.

[0063] Fig. 2 is a simplified cross-sectional view illustrating an electronic device 20 with photodiodes according to one embodiment.

[0064] The illustrated electronic device 20 comprises two photodiodes 200 formed in a semiconductor substrate 110, generally made of silicon (Si). The electronic device 20 may be contained within an image sensor, or be an image sensor. In the example shown, two photodiodes 200 are depicted, although the electronic device 20 could comprise one or more than two photodiodes. Each photodiode 200 is contained within a pixel 201, which generally includes circuitry that is not detailed. In the example shown, the photodiodes 200 are of the BSI type, i.e., back-illuminated by the rear face 110B, or back-illuminated. The front face 110A of the substrate 110 is shown at the bottom of [Fig. 2] and the rear face 110B of the substrate 110 is shown at the top of [Fig. 2].

[0065] The electronic device 20, the photodiodes 200 and the pixels 201 include many elements in common with those of [Fig.1], these common elements retain the same numerical references and will not be detailed again in what follows.

[0066] Similar to each photodiode 100 of [Fig. 1], each photodiode 200 of [Fig. 2] comprises, in the substrate 110: the semiconductor region 112 (active region) lightly doped with the second type of conductivity, in this example of the type P (P-), the heavily doped semiconductor region 114 of the first type of conductivity, in this example of type N (N+), and the heavily doped semiconductor region 116 of the second type of conductivity, in this example of type P (P+). These semiconductor regions can have the same characteristics as those described in connection with [Fig. 1].

[0067] The photodiodes 200 are laterally isolated, and in particular are isolated from each other, by insulation trenches 220 (or insulating trenches), extending from the rear face 110B deep into the substrate 110, in the example shown over the entire height H1 of the photodiode 200.

[0068] The insulating trenches 220 can form capacitive deep trench insulation (CDTI). In the example shown, this can be referred to as BDTI, for Backside Deep Trench Insulation. These are insulating trenches formed from the back face 110B. The insulating trenches 220 can be polarized, for example, to deplete the semiconductor region 112.

[0069] The electronic device 20 of [Fig.2] differs from the electronic device 10 of [Fig.1] essentially in that each insulating trench 220 further comprises a layer 224 of doped silicon between the photodiode 200 and the alumina layer 221, i.e. between the substrate 110 and the alumina layer 221.

[0070] Thus, each insulating trench 220 comprises, from the side wall 220L towards the center of this insulating trench: - a layer 224, or lining layer (liner in English), of doped silicon coating the lateral wall 220L (side) of the trench 220; - a 221 layer of alumina (Al2O3) on the 224 layer of doped silicon; - a layer 222 of silicon dioxide (SiO2) on the layer 221 of alumina; and - a layer 223 of a conductive or semiconducting material, for example aluminium (Al) filling the remainder of the trench 220.

[0071] Layer 224 is a silicon epitaxial layer doped with the second type of conductivity, in this example type P. The doping is, for example, boron. In other examples, the doping is type n. This epitaxial layer is formed by a low-temperature epitaxial growth process, typically at a temperature below 600°C, preferably less than or equal to 500°C, for example between 400 and 500°C.

[0072] The thickness of the doped silicon layer 224 is for example less than 10 nanometers (nm), for example between 4 and 10 nm.

[0073] The doped silicon layer 224 is heavily doped, typically it has a doping concentration greater than or equal to 1.1018 at / cm3, for example equal to about 1.1020 at / cm3.

[0074] The P-doped silicon layer 224 allows more positive charges (h+) to be attracted to the entire side wall 220L of the insulating trench 220, for example over the entire height H2 of it, i.e. in this example over the entire height H1 of the photodiode 100, increasing the passivation effect, and thus reducing the dark current.

[0075] Thus, the presence of the doped silicon layer 224 on the side wall 220L of the insulating trench 220 all around the photodiode 200 makes it possible to reduce the dark current, in this respect, without it being necessary to bias the insulating trench 220. This forms a passive solution, which does not require additional power consumption, to reduce the dark current.

[0076] Alternatively, the insulating trenches 220 might not include the alumina layer 221. Indeed, the presence of the doped silicon layer 224 increases the passivation effect, making the alumina layer 221 unnecessary.

[0077] Alternatively, the insulating trenches 220 could not include the layer 223 made of the conductive or semiconducting material, and be filled, for example, only with the layer 222 made of SiO2.

[0078] For example, the insulating trenches 220 could each comprise the layer 224 of doped silicon on the side wall 220L and the layer 222 of SiO2 forming a filling layer.

[0079] Preferably, the insulating trenches 220 have a high aspect ratio, i.e. a length-to-width ratio greater than 30. This increases the sensitivity of the photodiode to light.

[0080] Fig. 3 is a simplified cross-sectional view illustrating an electronic device 30 with photodiodes according to another embodiment.

[0081] The illustrated electronic device 30 comprises two photodiodes 300 formed in a semiconductor substrate 110, generally made of silicon (Si). The electronic device 30 may be contained within an image sensor, or be an image sensor. In the example shown, two photodiodes 300 are depicted, although the electronic device 30 could comprise one or more than two photodiodes. Each photodiode 300 is contained within a pixel 301, which generally includes circuitry that is not detailed. In the example shown, the photodiodes 300 are of the BSI type, i.e., back-illuminated. The front face 110A of the substrate 110 is shown at the bottom of [Fig. 3] and the rear face 110B of the substrate 110 is shown at the top of [Fig. 3].

[0082] The electronic device 30, the photodiodes 300 and the pixels 301 include many elements in common with those of [Fig.2], these common elements retain the same numerical references and will not be detailed again in what follows.

[0083] The electronic device 30 of [Fig. 3] is distinct from the electronic device 20 of [Fig. 2] essentially differs in that each photodiode 300 comprises, within the substrate 110, an active semiconductor region 312 that is lightly doped with the first type of conductivity, in this example of the N-doped type, and in that the N-doped semiconductor region 114 of [Fig. 2] is not present. The active region 312 has, for example, a doping concentration less than 10¹⁷ at / cm³, for example, approximately 10¹⁶ at / cm³. Thus, volumetric photodiodes 300 are formed, as opposed to the planar photodiodes 200 of [Fig. 2]. Each photodiode 300 is of the pinned photodiode type, the N-doped active region 312 being sandwiched (or pinched) between portions of the P-doped silicon layer 224, forming several PN junctions.

[0084] The presence of the doped silicon layer has the advantage of being able to form a photodiode depleted throughout almost its entire volume (active region completely depleted).

[0085] Each photodiode 300 can comprise, similarly to the photodiodes 200 of [Fig.2], a heavily doped P(P+) semiconductor region 116 at the front face 110A.

[0086] [Fig.4A], [Fig.4B], [Fig.4C], [Fig.4D], [Fig.4E], [Fig.4F] and Figures 4A to 4G illustrate simplified cross-sectional views of structures obtained at the end of steps in a manufacturing process for a photodiode electronic device according to one embodiment. Figures 4A to 4G show a manufacturing process for obtaining the photodiode electronic device 20 of Figure 2, and those skilled in the art can adapt this process to obtain the photodiode electronic device of Figure 3 or any other photodiode electronic device according to one embodiment.

[0087] [Fig.4A] illustrates a starting structure comprising a photodiode 200, similar to the photodiodes 200 of [Fig.2], formed in the substrate 110, comprising the weakly doped P-type (P-) semiconductor region 112 (active region), the strongly doped N-type (N+) semiconductor region 114, and the strongly doped P-type (P+) semiconductor region 116.

[0088] Furthermore, a hard mask layer 401, for example of silicon nitride or silicon oxynitride (SiON), is formed on the rear face 110B of the substrate 110, and a photosensitive resin layer 402 is formed on the hard mask layer 401. The photosensitive resin layer 402 has an opening 403 which extends substantially all around the photodiode 200, for the formation of the future deep insulating trench 420 (illustrated in [Fig.4G]) around photodiode 200. Instead of one opening 403, there may be several openings 403.

[0089] Fig. 4B illustrates a structure obtained after etching the hard mask layer 401 through the opening 403 in the photosensitive resin layer 402, so as to form an opening 404 in the hard mask layer 401 opposite the opening 404. Instead of one opening 404, there may be several openings 404.

[0090] The 402 layer of photosensitive resin is then removed.

[0091] Figure 4C illustrates a structure obtained after etching the substrate 110, from the rear face 110B, and through the opening 404 in the hard mask layer 401. This etching forms a trench 405 around the photodiode 200. For example, as illustrated, the trench 405 extends to the front face 110A. The trench 405 is defined laterally by a side wall 405L, or flank.

[0092] The 401 hard mask layer is then removed.

[0093] Fig. 4D illustrates a structure obtained after the formation by epitaxial growth of a layer 424 of silicon doped with the second type of conductivity, in this example of type P, on the lateral wall 405L of the trench 405. Epitaxial growth is preferably carried out at low temperature, typically a temperature below 600°C, preferably less than or equal to 500°C, for example between 400 and 500°C.

[0094] This epitaxial growth step can generate a portion of a doped silicon layer on the rear face 110B. This portion of the doped silicon layer is then removed by a planarization technique, for example by chemical mechanical polishing (CMP), before the next step or later, for example, simultaneously with the portions of the layers formed in the following steps. In other embodiments, it may also be possible for the portion of the doped silicon layer generated on the rear face 110B to remain on this surface.

[0095] A layer 424 of doped silicon similar to layer 224 of [Fig.2] is thus formed.

[0096] The thickness of the doped silicon layer 424 is, for example, between 4 and 10 nanometers (nm). The doped silicon layer 424 is heavily doped, typically having a doping concentration greater than 1 x 10¹⁸ at / cm³, for example, approximately 1 x 10²⁰ at / cm³.

[0097] Figure 4E illustrates a structure obtained after the formation of an alumina (Al₂O₃) layer 421 on a doped silicon layer 424, for example, by an atomic layer deposition (ALD) technique. For example, the alumina layer 421 has a thickness of approximately 13 nm. Instead of an alumina layer, it can be a layer of another dielectric material, for example another high-k material, i.e. a material with a dielectric constant higher than that of SiO2.

[0098] This forms a layer 421 in alumina similar to layer 221 of [Fig.2].

[0099] Alternatively, the manufacturing process does not include layer formation 421.

[0100] Figure 4F illustrates a structure obtained after the formation of a 422 SiO2 layer on the 421 alumina layer, for example by a plasma-enhanced atomic layer deposition (PEALD) technique. For example, the 422 SiO2 layer has a thickness of approximately 150 nm. This 422 layer also covers, for example, the rear face 110B.

[0101] This forms a 422 layer in SiO2 similar to the 222 layer of [Fig.2].

[0102] Figure 4G illustrates a structure obtained after filling the remainder of the The layer 405 is covered by a layer 423 made of a conductive and / or semiconducting material, for example, aluminum (Al). The layer 423 can be formed by chemical vapor deposition (CVD). To form an aluminum layer, one can start with an aluminum precursor, such as a titanium-aluminum alloy. For example, the layer 423 has a thickness of approximately 170 nm.

[0103] This forms a filling layer 423 similar to layer 223 of [Fig.2],

[0104] This also forms a deep 420 type BDTI insulation trench similar to the 220 type insulation trenches of [Fig.2].

[0105] This filling step can also form a portion of the layer 423 on the back face 110B, for example on portions of the previously deposited layers. This portion of the aluminum layer is then removed by a planarization technique, for example by CMP, on the back face 110B and stops, for example, in the previously deposited SiO2 layer 422. In other examples, the planarization step simultaneously removes the SiO2 layer 422 as well as portions of other previously deposited layers.

[0106] Alternatively, the manufacturing process does not include the formation of layer 423, and for example, it is layer 422 in SiO2 that fills trench 405.

[0107] It is clear from this example of a manufacturing process that the formation of the doped silicon layer is part of a standard process in microelectronics, and that it only requires an additional epitaxial growth step.

[0108] Many applications are likely to benefit from the advantages provided by the photodiode electronic device according to the embodiments, the device Photodiode electronics can be integrated into various types of devices where imaging is used. The photodiode electronic device can be, or be included in, an image sensor. The image sensor can be adapted to operate in the infrared (IR), for example, the near-infrared.

[0109] By way of example, the electronic photodiode device can be integrated into a device intended for the automotive industry, for example in driver assistance or driving automation.

[0110] By way of example, the photodiode electronic device can be integrated into a device intended for industry, for example in the field of the Internet of Things or in the field of connected homes.

[0111] By way of example, the photodiode electronic device can be integrated into a device intended for use in personal electronics, for example a smartphone, a tablet...

[0112] Various embodiments and variations have been described. A person skilled in the art will understand that certain features of these various embodiments and variations could be combined, and other variations will become apparent to a person skilled in the art.

[0113] Finally, the practical implementation of the embodiments and variants described is within the reach of a person skilled in the art, based on the functional indications given above.

Claims

Demands

1. Electronic device (20; 30) with a photodiode comprising: - at least one photodiode (200; 300) formed in a silicon substrate (110) comprising a front face (110A) and a rear face (110B) opposite the front face, the at least one photodiode being configured to capture light radiation by the rear face (110B); the at least one photodiode having a first height (Hl) in the substrate and comprising at least a first semiconductor region (114; 312) of the substrate, the first semiconductor region being of a first type of conductivity; - at least one isolation trench (220) around at least one photodiode, the at least one isolation trench extending from the rear face (110B) to a second height (H2) in the substrate (110), the second height (H2) being at least equal to the first height (H1);each insulation trench being delimited in the substrate by a side wall (220L) and comprising: a first layer (224) of silicon coating doped with the second type of conductivity opposite to the first type of conductivity on said side wall, said first layer (224) being an epitaxial layer; and a second layer (222) of silicon oxide in said insulation trench, the first layer (224) being between the second layer (222) and the substrate (110).

2. Electronic device (20; 30) according to claim 1, wherein each insulation trench (220) further comprises a third layer (221) of alumina between the first layer (224) and the second layer (222).

3. Electronic device according to claim 1 or 2, wherein the second layer (222) of each insulation trench forms a silicon oxide filling layer of said insulation trench.

4. Electronic device (20; 30) according to claim 1 or 2, wherein each insulation trench (220) further comprises a fourth layer (223) of a conductive or semiconducting material, forming a filling layer of said insulation trench.

5. Method of manufacturing a photodiode electronic device, the method comprising, from a structure comprising at least one photodiode (200; 300) formed in a silicon substrate (110) comprising a front face (110A) and a rear face (110B) opposite the front face, the at least one photodiode being configured to capture light radiation by the rear face (110B); at least one photodiode having a first height (Hl) in the substrate and comprising at least a first semiconducting region (114; 312) of the substrate, the first semiconducting region being of a first type of conductivity: - the formation of at least one trench (405) around the at least one photodiode, said at least one trench extending from the rear face (110B) over a second height (H2) in the substrate (110), the second height (H2) being at least equal to the first height (Hl);each trench being delimited in the substrate by a lateral wall (405L); - the formation by epitaxial growth at a temperature below 600°C, for example less than or equal to 500°C, of ​​a first layer (424) of silicon doped with the second type of conductivity on the lateral wall (405L) of each trench (405); then - the deposition of a second layer (422) of silicon oxide in each trench (405), so that the first layer (424) is between the second layer (422) and the substrate (110).

6. A manufacturing process according to claim 5, further comprising, before the deposition of the second layer (222): - the deposition of a third layer (221) of alumina, so that the third layer is between the first layer (224) and the second layer.

7. A manufacturing method according to claim 5 or 6, wherein the second layer (222) fills each trench to form an insulation trench.

8. A manufacturing method according to claim 5 or 6, further comprising, after the deposition of the second layer (222): - the deposition of a fourth layer (223) of a conductive or semiconducting material so as to fill each trench (405) to form an insulation trench (420).

9. Electronic device (20; 30) according to any one of claims 1 to 4, wherein there is at least one insulation trench (220; 420) or trench (405) has a height-to-width ratio greater than 30.

10. Electronic device (30) according to any one of claims 1 to 4 and 9, wherein the first semiconductor region (312) of each photodiode (300) forms the active region of said photodiode, the first semiconductor region being weakly doped, for example having a doping concentration of less than 1016 at / cm3.

11. Electronic device (20) according to any one of claims 1 to 4 and 9, wherein each photodiode (200) further comprises a second semiconductor region (112) of the substrate (110), said second semiconductor region being of the second type of conductivity, and extending from the rear face (110B) to the first semiconductor region (114).

12. Electronic device according to claim 11, wherein the second semiconductor region (112) forms the active region of the photodiode (200), the second semiconductor region being weakly doped, for example having a doping concentration of less than 1016 at / cm3.

13. Electronic device according to any one of claims 1 to 4 and 9 to 12, wherein each photodiode (200; 300) comprises a fourth semiconductor region (116) of the substrate (110), said fourth semiconductor region being doped with the second type of conductivity and extending from the front face (110A) to the first semiconductor region (114; 312); the fourth semiconductor region being heavily doped, for example having a doping concentration greater than or equal to 1018 at / cm3.

14. Electronic device according to any one of claims 1 to 4 and 9 to 13, wherein the first layer (224; 424): - has a thickness between 4 and 10 nanometers; and / or - is heavily doped, for example has a doping concentration greater than or equal to 1.1018 at / cm3.

15. Electronic device according to any one of claims 1 to 4 and 9 to 14, the electronic device being an image sensor, and each photodiode (200; 300) being contained in a pixel (202; 301) of said image sensor.

Images