Device and method for compensating voltage drop in display panel driven by multiple display drivers
Patent Information
- Application Number
- JP2022123769
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2021-08-16
- Filing Date
- 2022-08-03
- Publication Date
- 2025-08-06
AI Technical Summary
Display panels, such as OLED panels, experience display unevenness due to voltage drops in power supply lines, leading to reduced pixel brightness and mura (display defects) due to IR drops, especially in large panels driven by multiple display drivers.
A display system with multiple display drivers that exchange total current data between them to perform IR drop compensation, adjusting voltage levels based on estimated pixel currents and panel positions to mitigate unevenness.
The system effectively compensates for IR drops across the display panel, improving brightness uniformity and reducing display mura by accurately adjusting voltage levels based on total current data and pixel positions.
Smart Images

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Abstract
Description
Technical Field
[0001] The disclosed technology generally relates to a display driver, a display module, and a method for driving a display panel.
Background Art
[0002] Some display panels, such as, for example, an organic light-emitting diode (OLED) display panel, are configured to supply a power voltage to each pixel via a power line. A display panel configured in this way may exhibit display unevenness in a displayed image due to a voltage drop in the power line of the display panel.
Summary of the Invention
[0003] This summary is provided to introduce, in a concise form, a selection of concepts that are further described below in the detailed description of the invention. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to limit the scope of the claimed subject matter.
[0004] In one or more embodiments, a display system is provided. The display system includes a display panel, a first display driver, and a second display driver. The display panel has a first region and a second region. The first display driver is configured to generate first region total current data corresponding to the sum of the estimated pixel currents of each pixel in the first region. The second display driver is configured to generate second region total current data corresponding to the sum of the estimated pixel currents of each pixel in the second region. The first display driver is further configured to receive the second region total current data from the second display driver, receive first image data corresponding to the first region, generate first voltage data based on the first image data, and update the first region of the display panel based on the first voltage data. Generating the first voltage data includes IR drop compensation based on the first region total current data and the second region total current data.
[0005] In one or more embodiments, a display driver is provided. The display driver includes an image processing circuit unit, a driver circuit unit, and a communication circuit unit. The image processing circuit unit is configured to receive image data corresponding to a first region of a display panel and generate first region total current data corresponding to the sum of the estimated pixel currents of each pixel in the first region. The image processing circuit unit is further configured to generate voltage data from the image data corresponding to the first region. The driver circuit unit is configured to update the first region based on the voltage data. The communication circuit unit is configured to receive second region total current data from a second display driver. The second region total current data corresponds to the sum of the estimated pixel currents of each pixel in a second region of the display panel. Generating the voltage data includes IR drop compensation based on the first region total current data and the second region total current data.
[0006] In one or more embodiments, a method of driving a display panel is provided. The method includes generating, by a first display driver, first region total current data corresponding to the sum of the estimated pixel currents of each pixel in a first region of the display panel. The method further includes generating, by a second display driver, second region total current data corresponding to the sum of the estimated pixel currents of each pixel in a second region of the display panel. The method further includes transmitting the second region total current data from the second display driver to the first display driver and generating, by the first display driver, first voltage data based on first image data corresponding to the first region. Generating the first voltage data includes IR drop compensation based on the first region total current data and the second region total current data. The method further includes updating the first region based on the first voltage data.
[0007] Other aspects of the embodiments will become apparent from the following description and the appended claims.
Brief Description of the Drawings
[0008] To enable a detailed understanding of the features of this disclosure, a more specific description of this disclosure, which is briefly summarized above, may be given with reference to embodiments. Some of these embodiments are illustrated in the accompanying drawings. However, it should be noted that the accompanying drawings only illustrate exemplary embodiments of this disclosure, and since this disclosure allows for other equally valid embodiments, they should not be considered to limit the scope of the invention.
[0009] [Figure 1] Figure 1 illustrates an exemplary configuration of a display panel according to one or more embodiments.
[0010] [Figure 2] Figure 2 illustrates the total current of an exemplary display panel according to one or more embodiments.
[0011] [Figure 3] Figure 3 illustrates an exemplary pixel brightness reduction according to one or more embodiments.
[0012] [Figure 4] Figure 4 illustrates an exemplary configuration of a display system according to one or more embodiments.
[0013] [Figure 5] Figure 5 illustrates an exemplary implementation of a display system according to one or more embodiments.
[0014] [Figure 6] Figure 6 illustrates exemplary configurations of a first display driver and a second display driver according to one or more embodiments.
[0015] [Figure 7A] Figure 7A illustrates an exemplary configuration of the image processing circuit section of the first display driver according to one or more embodiments.
[0016] [Figure 7B]Figure 7B illustrates an exemplary configuration of the image processing circuit section of the second display driver according to one or more embodiments.
[0017] [Figure 8] Figure 8 illustrates an exemplary configuration of the first and second regions of a display panel according to one or more embodiments.
[0018] [Figure 9A] Figure 9A illustrates exemplary updates of the segments of the first and second regions of a display panel according to one or more embodiments. [Figure 9B] Figure 9B illustrates exemplary updates of the segments of the first and second regions of a display panel according to one or more embodiments.
[0019] [Figure 10A] Figure 10A illustrates an exemplary configuration of the compensation circuit section of the first display driver according to one or more embodiments.
[0020] [Figure 10B] Figure 10B illustrates an exemplary configuration of the compensation circuit section of the second display driver according to one or more embodiments.
[0021] [Figure 11] Figure 11 illustrates an exemplary transaction between a first display driver and a second display driver according to one or more embodiments.
[0022] [Figure 12] Figure 12 illustrates an exemplary method for driving a display panel according to one or more embodiments.
[0023] For ease of understanding, where possible, the same reference numerals are used to indicate identical elements common to the drawings. Elements disclosed in one embodiment are expected to be usefully used in other embodiments, even without specific mention. Reference numerals may be subscripted to distinguish identical elements from one another. Drawings referenced herein should not be understood to be dimensional unless otherwise noted. Also, for clarity of presentation and explanation, drawings are often simplified by omitting details or components. The drawings and discussions are intended to illustrate the principles discussed below, and similar numerals indicate similar elements. [Modes for carrying out the invention]
[0024] The detailed description below is essentially illustrative and is not intended to limit the Disclosure or its applications and uses. Furthermore, it is not intended to be bound by any explicit or implicit theories presented in the preceding background, summary, or the detailed description below.
[0025] For example, certain display panels, such as organic light-emitting diode (OLED) panels, are configured to supply a power voltage to each pixel via power lines. For example, in embodiments where pixels include current-driven light-emitting elements (e.g., OLED elements), the display panel may be configured to supply a power voltage to each pixel to drive the current-driven light-emitting elements.
[0026] Figure 1 illustrates an exemplary configuration of a display panel according to one or more embodiments. The display panel in Figure 1 is configured as an organic light-emitting diode (OLED) display panel, where each pixel is an OLED, which is a type of current-driven element. To drive the OLED, the display panel is configured to supply or distribute a power supply voltage ELVDD to each pixel via a power line. "ELVSS" in Figure 1 refers to the ground voltage.
[0027] In a display panel configured in this way, display irregularities may occur in the displayed image due to voltage drops in the power lines of the display panel. This voltage drop is caused by the current flowing through the power lines, which act as resistors, and is sometimes called IR drop. IR drop in the power lines can reduce the brightness of pixels depending on their position on the display panel, which can lead to display irregularities.
[0028] The decrease in pixel brightness due to IR drop depends on at least two factors: the total current of the display panel and the position of the pixel on the display panel. Referring to Figure 2, the total current as used herein may be the sum of the currents flowing through all pixels (three are shown in Figure 2). As the total current of the display panel increases, the voltage drop along the path distributing the power supply voltage to the pixels increases, reducing the brightness of the pixels. Furthermore, as illustrated in Figure 3, the decrease in brightness caused by IR drop depends on the position of the pixel on the display panel. The length of the path through which the power supply voltage ELVDD is supplied to the pixel depends on the position of the pixel. Pixels located farther from the power supply may experience greater IR drop along the power line. A larger IR drop can reduce the current flowing through the pixel, potentially leading to a greater decrease in brightness.
[0029] One method to mitigate display unevenness caused by IR drop in display panels is to use a display driver (e.g., a display driver integrated circuit (DDIC)) configured to compensate for IR drop by performing image processing on the image data. This image processing to compensate for IR drop will be referred to as IR drop compensation below. IR drop compensation may modify the image data depending on the expected brightness reduction of each pixel caused by IR drop. To effectively suppress display unevenness, IR drop compensation may be based on the total current of the display panel and / or the location of the affected pixel.
[0030] On the other hand, a display device may be configured to drive a single display panel with multiple display drivers. The use of multiple display drivers is a common technique for driving large display panels (e.g., center information displays (CIDs) and foldable display panels for automotive applications). For example, in embodiments where the display panel is large and has a large number of source lines (or data lines), two or more display drivers are used to drive the source lines of the display panel due to the constraint of the maximum number of outputs for each display driver. This disclosure provides various techniques for efficiently performing IR drop compensation for display devices configured to drive a single display panel with multiple display drivers.
[0031] Figure 4 illustrates an exemplary configuration of a display system 1000 according to one or more embodiments. The display system 1000 is configured to display an image on a display panel 100 under the control of a controller 300. In the illustrated embodiment, the display system 1000 comprises a first display driver 200-1 and a second display driver 200-2. The display panel 100 comprises a first region 102-1 and a second region 102-2 adjacent to each other at a boundary 104. The first display driver 200-1 is configured to receive first image data corresponding to the first region 102-1 from the controller 300 and update the pixels of the first region 102-1 based on the first image data. The second display driver 200-2 is configured to receive second image data corresponding to the second region 102-2 from the controller 300 and update the pixels of the second region 102-2 based on the second image data. In Figure 4, the first display driver 200-1, located on the left side, is sometimes referred to as the "left driver," and the second display driver 200-2, located on the right side of Figure 4, is sometimes referred to as the "right driver."
[0032] The first display driver 200-1 and the second display driver 200-2 are coupled to communicate with each other via a communication bus 202. In one or more embodiments, the first display driver 200-1 and the second display driver 200-2 are configured to exchange information and / or data via the communication bus 202. As will be described in detail later, the first display driver 200-1 may be configured to generate first region total current data corresponding to the subtotal of the estimated pixel current of each pixel in the first region 102-1 and to transmit the first region total current data to the second display driver 200-2 via the communication bus 202. Furthermore, the second display driver 200-2 may be configured to generate second region total current data corresponding to the subtotal of the estimated pixel current of each pixel in the second region 102-2 and to transmit the second region total current data to the first display driver 200-1 via the communication bus 202. The first display driver 200-1 and the second display driver 200-2 may be configured to perform IR drop compensation based on the total current data of the first domain and the total current data of the second domain, respectively.
[0033] Figure 5 illustrates an exemplary implementation of the display system 1000 according to one or more embodiments. In the illustrated implementation, the display panel 100 is collapsible at the boundary 104 between the first region 102-1 and the second region 102-2. The use of two display drivers (e.g., a first display driver 200-1 and a second display driver 200-2) facilitates the design of the display system 1000 having the collapsible feature.
[0034] Figure 6 illustrates exemplary configurations of a first display driver 200-1 and a second display driver 200-2 according to one or more embodiments. In the illustrated embodiments, the first display system 200-1 and the second display driver 200-2 are identically configured. In other embodiments, the first display driver may have a configuration different from that of the second display driver. The first display driver 200-1 includes an instruction control circuit unit 212-1, an image processing circuit unit 214-1, a source driver circuit unit 216-1, a gate driver circuit unit 218-1, a timing controller 220-1, and a communication circuit unit 222-1, while the second display driver 200-2 includes an instruction control circuit unit 212-2, an image processing circuit unit 214-2, a source driver circuit unit 216-2, a gate driver circuit unit 218-2, a timing controller 220-2, and a communication circuit unit 222-2.
[0035] The instruction control circuit unit 212-1 of the first display driver 200-1 is configured to receive first image data corresponding to the first region 102-1 of the display panel 100 from the controller 300 and transfer the first image data to the image processing circuit unit 214-1. The first image data may include the gradation of pixels in the first region 102-1 of the display panel 100. The instruction control circuit unit 212-1 is further configured to receive control data from the controller 300 and control the operation of the first display driver 200-1.
[0036] Similarly, the instruction control circuit unit 212-2 of the second display driver 200-2 is configured to receive second image data corresponding to the second area 102-2 of the display panel 100 from the controller 300 and transfer the second image data to the image processing circuit unit 214-2. The second image data may include the gradation of pixels in the second area 102-2 of the display panel 100. The instruction control circuit unit 212-2 is further configured to receive control data from the controller 300 and control the operation of the second display driver 200-2.
[0037] The image processing circuit 214-1 of the first display driver 200-1 is configured to process first image data and generate first voltage data corresponding to the first region 102-1 of the display panel 100 based on the first image data. The first voltage data corresponding to the first region 102-1 may include the voltage level at which the pixels of the first region 102-1 of the display panel 100 should be updated. As will be described in detail later, the image processing performed by the image processing circuit 214-1 includes IR drop compensation for the pixels of the first region 102-1.
[0038] Similarly, the image processing circuit 214-2 of the second display driver 200-2 is configured to process the second image data and generate second voltage data corresponding to the second region 102-2 of the display panel 100 based on the second image data. The second voltage data corresponding to the second region 102-2 may include the voltage level at which the pixels of the second region 102-2 of the display panel 100 should be updated. The image processing performed by the image processing circuit 214-2 includes IR drop compensation for the pixels of the second region 102-2.
[0039] The source driver circuit 216-1 of the first display driver 200-1 is configured to update the pixels of the first region 102-1 based on first voltage data received from the image processing circuit 214-1. The source driver circuit 216-1 may also be configured to generate a drive voltage having a voltage level specified by the first voltage data, and to update or program the corresponding pixels of the first region 102-1 with the drive voltage thus generated.
[0040] Similarly, the source driver circuit 216-2 of the second display driver 200-2 is configured to update the pixels of the second region 102-2 based on the second voltage data received from the image processing circuit 214-2. The source driver circuit 216-2 may also be configured to generate a drive voltage having a voltage level specified by the second voltage data, and to update or program the corresponding pixels of the second region 102-2 with the drive voltage thus generated.
[0041] The gate driver circuit section 218-1 of the first display driver 200-1 and the gate driver circuit section 218-2 of the second display driver 200-2 are jointly configured to drive or scan the gate lines (sometimes called scan lines) of the display panel 100. In some implementations, the gate driver circuit section 218-1 may be configured to drive every other gate line, and the gate driver circuit section 218-2 may be configured to drive the remaining every other gate line. In other implementations, the gate driver circuit section 218-1 may be configured to drive all gate lines from left to right, and the gate driver circuit section 218-2 may be configured to drive all gate lines from right to left.
[0042] The timing controller 220-1 of the first display driver 200-1 is configured to control the operation timing of the first display driver 200-1 based on control data received from the instruction control circuit unit 212-1. Similarly, the timing controller 220-2 of the second display driver 200-2 is configured to control the operation timing of the second display driver 200-2 based on control data received from the instruction control circuit unit 212-2.
[0043] The communication circuit section 222-1 of the first display driver 200-1 and the communication circuit section 222-2 of the second display driver 200-2 are configured to provide data communication between the first display driver 200-1 and the second display driver 200-2 via the communication bus 202. In one implementation, serial data communication may be used for communication between the first display driver 200-1 and the second display driver 200-2. In one or more embodiments, as will be described in detail later, data used for IR drop compensation is exchanged between the first display driver 200-1 and the second display driver 200-2 using the communication circuit sections 222-1 and 222-2.
[0044] Figure 7A illustrates an exemplary configuration of the image processing circuit section 214-1 of the first display driver 200-1 according to one or more embodiments. In the illustrated embodiment, the image processing circuit section 214-1 includes a digital gamma circuit section 224-1, a compensation circuit section 226-1, and a correction circuit section 228-1.
[0045] In one or more embodiments, the digital gamma circuit unit 224-1 is configured to perform a gamma conversion on the first image data to generate first gamma voltage data. The first gamma voltage data may specify the voltage level of the drive voltage for each pixel in the first region 102-1 of the display panel 100 so as to display an image corresponding to the first image data in the first region 102-1 with specified gamma characteristics.
[0046] The compensation circuit 226-1 and the correction circuit 228-1 are configured to jointly generate first voltage data supplied to the source driver circuit 216-1 (as shown in Figure 6) by performing IR drop compensation on the first gamma voltage data generated by the digital gamma circuit 224-1. As discussed above, the IR drop compensation is configured to compensate for IR drop in the power lines of the display panel 100. More specifically, the compensation circuit 226-1 is configured to generate compensation data used for IR drop compensation, and the correction circuit 228-1 is configured to generate first voltage data by correcting the first gamma voltage data based on the compensation data. In one or more embodiments, the compensation data generated by the compensation circuit 226-1 may include a compensation gain, and the correction circuit 228-1 may be configured to generate first voltage data by multiplying the first gamma voltage data by the compensation gain. In an embodiment in which the first gamma voltage data includes the voltage level of the drive voltage to which each pixel of the first region 102-1 should be updated, the correction circuit 228-1 may be configured to generate the first voltage data to include a product obtained by multiplying the voltage level of the drive voltage of the first gamma voltage data by a compensation gain.
[0047] In one or more embodiments, as shown in Figure 7B, the image processing circuit section 214-2 of the second display driver 200-2 is configured similarly to the image processing circuit section 214-1 of the first display driver 200-1 shown in Figure 7A. In the illustrated embodiments, the image processing circuit section 214-2 of the second display driver 200-2 includes a digital gamma circuit section 224-2, a compensation circuit section 226-2, and a correction circuit section 228-2. The digital gamma circuit section 224-2, the compensation circuit section 226-2, and the correction circuit section 228-2 correspond to the digital gamma circuit section 224-1, the compensation circuit section 226-1, and the correction circuit section 228-1 in Figure 7A. In one or more embodiments, the digital gamma circuit section 224-2 is configured to perform a gamma conversion on the second image data to generate second gamma voltage data. The compensation circuit section 226-2 and the correction circuit section 228-2 are configured to jointly generate second voltage data supplied to the source driver circuit section 216-2 (as shown in Figure 6) by performing IR drop compensation on the second gamma voltage data generated by the digital gamma circuit section 224-2. More specifically, the compensation circuit section 226-2 is configured to generate compensation data used for IR drop compensation, and the correction circuit section 228-2 is configured to generate second voltage data by correcting the second gamma voltage data based on the compensation data.
[0048] In one or more embodiments, the compensation data used for IR drop compensation for the image data of a target pixel may be generated based on the position of the target pixel. As described above in relation to Figure 3, the reduction in brightness of a target pixel due to IR drop in a power line may depend on the position of the target pixel. Therefore, generating compensation data based on the position of the target pixel effectively improves the accuracy of IR drop compensation.
[0049] In one or more embodiments, compensation data for IR drop compensation may be generated based on the estimated total current of the display panel 100. As described above, the brightness reduction caused by IR drop in the power lines may depend on the total current of the display panel 100, and therefore, generating compensation data based on the estimated total current of the display panel 100 effectively improves the accuracy of IR drop compensation.
[0050] One problem is that the image processing circuit 214-1 of the first display driver 200-1 is configured to receive only first image data corresponding to the first region 102-1, while the image processing circuit 214-2 of the second display driver 200-2 is configured to receive only second image data corresponding to the second region 102-2. The first image data alone does not provide enough information to determine the estimated total current of the display panel 100. The same applies to the image processing circuit 214-2 of the second display driver 200-2, which is configured to receive only second image data corresponding to the second region 102-2.
[0051] To address this problem, in one or more embodiments, the compensation circuit unit 226-1 of the first display driver 200-1 may be configured to generate first region total current data based on first image data corresponding to the first region 102-1 and transmit it to the compensation circuit unit 226-2 of the second display driver 200-2 via the communication circuit unit 222-1. The first region total current data may correspond to the sum of the estimated pixel currents of each pixel in the first region 102-1. In one implementation, the compensation circuit unit 226-1 may be configured to determine the estimated pixel current of each pixel in the first region 102-1 based on first image data corresponding to the first region 102-1, and to determine the total for the first region 102-1 by summing the estimated pixel currents of each pixel in the first region 102-1. In one implementation, the first image data may include the gradation of the pixels in the first region 102-1, and the compensation circuit unit 226-1 may be configured to identify the estimated pixel current based on the gradation of the pixels. The estimated pixel current of a given pixel may be specified such that the estimated pixel current increases as the grayscale of that pixel increases. The estimated pixel current of each pixel may further be based on a display brightness value (DBV) that indicates a specified brightness level of the display panel 100. The brightness level of the display panel 100 as used herein may be the brightness level of the entire image displayed on the display panel 100. In one implementation, the controller 300 is configured to supply the DBV to the first display driver 100-1 to control the overall brightness level of the displayed image. The estimated pixel current of each pixel may increase as the DBV increases.
[0052] Furthermore, the compensation circuit section 226-2 of the second display driver 200-2 may be configured to generate second region total current data based on second image data corresponding to the second region 102-2 and transmit it to the compensation circuit section 226-1 of the first display driver 200-1 via the communication circuit section 222-2. The generation of the second region total current data may be performed in the same manner as the generation of the first region total current data, except that the second region total current data is generated from second image data of the second region 102-2. The second region total current data may correspond to the sum of the estimated pixel currents of each pixel in the second region 102-2. In one implementation, the compensation circuit section 226-2 may be configured to determine the estimated pixel current of each pixel in the second region 102-2 based on second image data corresponding to the second region 102-2, and to determine the total for the second region 102-2 by summing the estimated pixel currents of each pixel in the second region 102-2. The estimated pixel current of each pixel may further be based on DBV.
[0053] As shown in Figure 7A, the compensation circuit section 226-1 of the first display driver 200-1 may be configured to receive the total current data for the second region from the compensation circuit section 226-2 of the second display driver 200-2 and to store the total current data for the first region and the total current data for the second region in the memory 230-1. Similarly, as shown in Figure 7B, the compensation circuit section 226-2 of the second display driver 200-2 may be configured to receive the total current data for the first region from the compensation circuit section 226-1 of the first display driver 200-1 and to store the total current data for the first region and the total current data for the second region in the memory 230-2.
[0054] Referring to Figure 7A, the compensation circuit 226-1 of the first display driver 200-1 may further be configured to determine the estimated total current of the display panel 100 based on first region total current data generated by itself and second region total current data received from the compensation circuit 226-2 of the second display driver 200-2. The compensation circuit 226-1 may further be configured to generate compensation data for IR drop compensation based on the estimated total current of the display panel 100.
[0055] Similarly, as illustrated in Figure 7B, the compensation circuit 226-2 of the second display driver 200-2 may be further configured to determine the estimated total current of the display panel 100 based on the first region total current data received from the compensation circuit 226-1 of the first display driver 200-1 and the second region total current data generated by itself. The compensation circuit 226-2 may further be configured to generate compensation data for IR drop compensation based on the estimated total current of the display panel 100.
[0056] In one or more embodiments, as illustrated in Figure 8, the first region 102-1 and the second region 102-2 may each be divided into M segments #0 to #M-1, where M is an integer of 2 or more. In Figure 8, the X-axis is defined in the direction in which the gate lines of the display panel 100 extend, and the direction of the X-axis may be referred to as the "horizontal direction". The Y-axis is defined in the direction in which the source lines of the display panel 100 extend, and the direction of the Y-axis may be referred to as the "vertical direction". Each of the segments #0 to #M-1 comprises one or more rows of pixels arranged horizontally. In one or more embodiments, the segments #0 to #M-1 of the first region 102-1 are arranged vertically to form the first region 102-1, and the segments #0 to #M-1 of the second region 102-2 are arranged vertically to form the second region 102-2. Segments #i in the first region 102-1 and the second region 102-2 are arranged so as to be adjacent to each other horizontally, where i is any integer from 0 to M-1.
[0057] In an embodiment where the first region 102-1 is divided into M segments #0 to #M-1, as illustrated in Figure 8, the compensation circuit section 226-1 of the first display driver 200-1 may be configured to determine (e.g., calculate) the subtotal of the estimated pixel current for each segment #0 to #M-1 of the first region 102-1, and then sum the subtotals determined for each segment #0 to #M-1 to determine the total estimated pixel current for the first region 102-1. Similarly, in an embodiment where the second region 102-2 is divided into M segments #0 to #M-1, as illustrated in Figure 8, the compensation circuit section 226-2 of the second display driver 200-2 may be configured to determine (e.g., calculate) the subtotal of the estimated pixel current for each segment #0 to #M-1 of the second region 102-2, and then sum the subtotals determined for each segment #0 to #M-1 to determine the total estimated pixel current for the second region 102-2.
[0058] Figures 9A and 9B illustrate exemplary updates of segments #0 to #M-1 according to one or more embodiments. In the illustrated embodiments, the first display driver 200-1 and the second display driver 200-2 are configured to sequentially update segments #0 to #M-1 in each frame. Furthermore, the first display driver 200-1 and the second display driver 200-2 are configured to simultaneously update the corresponding segments #i in the first region 102-1 and the second region 102-2. Here, i is an integer from 0 to M-1. For example, segments #0 in the first region 102-1 and the second region 102-2 are updated simultaneously, and segments #1 in the first region 102-1 and the second region 102-2 are updated simultaneously. The same applies to other segments. The period during which segments #i in the first region 102-1 and the second region 102-2 are updated may hereafter be referred to as segment update period #i. For example, the first display driver 200-1 and the second display driver 200-2 may be configured to update segment #0 of the first area 102-1 and the second area 102-2 during segment update period #0, and to update segment #1 of the first area 102-1 and the second area 102-2 during segment update period #1.
[0059] The compensation circuit section 226-1 of the first display driver 200-1 and the compensation circuit section 226-2 of the second display driver 200-2 may be configured to determine the subtotal of the estimated pixel current of each segment immediately after updating each segment. In Figure 9A, “LSS i j " indicates the subtotal of the estimated pixel current of segment #i in the first region 102-1 immediately after the update of segment #i in the first region 102-1 in frame #j, and "RSS i j " indicates the subtotal of segment #i of the second region 102-2 immediately after the update of segment #i of the second region 102-2 in frame #j. For example, the compensation circuit section 226-1 of the first display driver 200-1 calculates the subtotal LSS0 of the estimated pixel current of segment #0 of the first region 102-1 immediately after the update of segment #0 of the first region 102-1. N The second display driver 200-2 may be configured to calculate the subtotal RSS0 of the estimated pixel current of segment #0 of the second region 102-2 immediately after updating segment #0 of the second region 102-2. N It may be configured to calculate the following.
[0060] Figure 10A illustrates an exemplary configuration of a compensation circuit unit 226-1 of a first display driver 200-1 configured to determine the subtotal of estimated pixel currents for segments #0 to #M-1 of a first region 102-1, and to determine the subtotal of estimated pixel currents for the first region 102-1 by summing these subtotals for segments #0 to #M-1 of the first region 102-1, according to one or more embodiments. In the illustrated embodiment, the compensation circuit unit 226-1 comprises a current accumulation circuit unit 232-1, a current segmentation memory 234-1, a current addition circuit unit 236-1, a total panel current calculation circuit unit 238-1, and a compensation data generation circuit unit 240-1.
[0061] The current accumulation circuit unit 232-1 is configured to determine the estimated pixel current of each pixel in each segment of the first region 102-1 based on the first image data and DBV corresponding to the first region 102-1, and to determine the subtotal LSS of the estimated pixel currents of each segment of the first region 102-1. In one embodiment, the current accumulation circuit unit 232-1 may be configured to determine the estimated pixel current of a certain pixel by calculating the brightness of the pixel based on the grayscale of the pixel, and calculating the estimated pixel current of the pixel as the product of the brightness of the pixel multiplied by a coefficient that depends on the DBV. The current accumulation circuit unit 232-1 may further be configured to determine the subtotal of the estimated pixel currents of each segment of the first region 102-1 by summing the estimated pixel currents of each segment. The current accumulation circuit unit 232-1 may further be configured to send the subtotal LSS of the estimated pixel currents of each segment to the current segmentation memory 234-1. The current segmentation memory 234-1 is configured to store the subtotal LSS of the estimated pixel currents for segments #0 to #M-1 of the first region 102-1.
[0062] The current summing circuit 236-1 is configured to determine the subtotal LTSS of the estimated pixel currents in the first region 102-1 based on the subtotal LSS of the estimated pixel currents of segments #0 to #M-1 of the first region 102-1 stored in the current segmentation memory 234-1. In one implementation, the current summing circuit 236-1 is configured to calculate the subtotal LTSS by summing the subtotal LSS of the estimated pixel currents of segments #0 to #M-1 of the first region 102-1. The subtotal LTSS of the estimated pixel currents in the first region 102-1 determined in this way is used as the total current data for the first region.
[0063] The panel total current calculation circuit unit 238-1 is configured to determine the estimated total current TPS of the display panel 100 based on the first region total current data received from the current summing circuit unit 236-1 and the second region total current data received from the compensation circuit unit 226-2 of the second display driver 200-2 via the communication circuit unit 222-1. In one implementation, the first region total current data corresponds to the subtotal LTSS of the estimated pixel currents in the first region 102-1, and the second region total current data corresponds to the subtotal RTSS of the estimated pixel currents in the second region 102-2. Note that the subtotal RTSS of the estimated pixel currents in the second region 102-2 is determined by the compensation circuit unit 226-2 of the second display driver 200-2. The total panel current calculation circuit 238-1 may be configured to determine the estimated total current TPS of the display panel 100 as the sum of the subtotal LTSS of the estimated pixel currents in the first region 102-1 and the subtotal RTSS of the estimated pixel currents in the second region 102-2. The total panel current calculation circuit 238-1 may also include a total current memory 242-1 configured to store the estimated total current TPS of the display panel 100.
[0064] The compensation data generation circuit 240-1 is configured to generate compensation data for each pixel in the first region 102-1 based on the estimated total current TPS of the display panel 100 and the position (X,Y) of each pixel. In some embodiments, the compensation data generation circuit 240-1 may include a LUT 244-1 that describes the correspondence between the data values of the compensation data and the estimated total current TPS of the display panel 100 and the position (X,Y) of each pixel. In such embodiments, the compensation data generation circuit 240-1 may be configured to generate the compensation data by a table lookup to the LUT 244-1. In embodiments where the compensation data includes a compensation gain, the LUT 244-1 may describe the correspondence between the compensation gain and the estimated total current TPS of the display panel 100 and the position (X,Y) of each pixel.
[0065] The compensation data generated by the compensation data generation circuit 240-1 is transferred to the correction circuit 228-1 (shown in Figure 7A) in order to perform IR drop compensation for pixels in the first region 102-1.
[0066] In one or more embodiments, as shown in Figure 10B, the compensation circuit section 226-2 of the second display driver 200-2 is configured similarly to the compensation circuit section 226-1 of the first display driver 200-1 shown in Figure 10A. In the illustrated embodiments, the compensation circuit section 226-2 includes a current accumulation circuit section 232-2, a current segmentation memory 234-2, a current addition circuit section 236-2, a total panel current calculation circuit section 238-2, and a compensation data generation circuit section 240-2. The current accumulation circuit unit 232-2, current segmentation memory 234-2, current addition circuit unit 236-2, total panel current calculation circuit unit 238-2, and compensation data generation circuit unit 240-2 correspond to the current accumulation circuit unit 232-1, current segmentation memory 234-1, current addition circuit unit 236-1, total panel current calculation circuit unit 238-1, and compensation data generation circuit unit 240-1.
[0067] The current accumulation circuit unit 232-2 is configured to determine the estimated pixel current of each pixel in each segment of the second region 102-2 based on the second image data and DBV corresponding to the second region 102-2, and to determine the subtotal RSS of the estimated pixel currents of each segment of the second region 102-2. The current segmentation memory 234-2 is configured to store the subtotal RSS of the estimated pixel currents of segments #0 to #M-1 of the second region 102-2.
[0068] The current summing circuit 236-2 is configured to determine the subtotal RTSS of the estimated pixel currents in the second region 102-2 based on the subtotal RSS of the estimated pixel currents of segments #0 to #M-1 of the second region 102-2 stored in the current segmentation memory 234-2. In one implementation, the current summing circuit 236-2 is configured to calculate the subtotal RTSS by summing the subtotal RSS of the estimated pixel currents of segments #0 to #M-1 of the second region 102-2. The subtotal RTSS of the estimated pixel currents in the second region 102-2 determined in this way is used as the total current data for the second region.
[0069] The panel total current calculation circuit unit 238-2 is configured to determine the estimated total current TPS of the display panel 100 based on the first region total current data received from the compensation circuit unit 226-1 of the first display driver 200-1 via the communication circuit unit 222-2 and the second region total current data received from the current summing circuit unit 236-2. Note that the first region total current data corresponds to the subtotal LTSS of the estimated pixel currents in the first region 102-1, and the second region total current data corresponds to the subtotal RTSS of the estimated pixel currents in the second region 102-2. The panel total current calculation circuit unit 238-2 may also be configured to determine the estimated total current TPS of the display panel 100 as the sum of the subtotal LTSS of the estimated pixel currents in the first region 102-1 and the subtotal RTSS of the estimated pixel currents in the second region 102-2. The panel total current calculation circuit unit 238-2 may include a total current memory 242-2 configured to store the estimated total current TPS of the display panel 100.
[0070] The compensation data generation circuit 240-2 is configured to generate compensation data for each pixel in the second region 102-2 based on the estimated total current TPS of the display panel 100 and the position (X,Y) of each pixel. The compensation data generation circuit 240-2 may be configured and operated similarly to the compensation data generation circuit 240-1 (illustrated in Figure 10A). In some embodiments, the compensation data generation circuit 240-2 may include a LUT 244-2 that describes the correspondence between the data values of the compensation data and the estimated total current TPS of the display panel 100 and the position (X,Y) of each pixel. In such embodiments, the compensation data generation circuit 240-2 may be configured to generate compensation data by a table lookup to the LUT 244-2.
[0071] The compensation data generated by the compensation data generation circuit 240-2 is transferred to the correction circuit 228-2 (shown in Figure 7B) in order to perform IR drop compensation for pixels in the second region 102-2.
[0072] FIG. 11 illustrates an exemplary transaction between a first display driver 200-1 (referred to as the "left driver" in FIG. 11) and a second display driver 200-2 (referred to as the "right driver" in FIG. 11) according to one or more embodiments. In FIG. 11, "LSS i j " represents the sum of the estimated pixel currents of segment #i of the first region 102-1 immediately after the update of segment #i of the first region 102-1 in frame #j, and "RSS i j " represents the sum of segment #i of the second region 102-2 immediately after the update of segment #i of the second region 102-2 in frame #j. "LTSS i j " represents the sum of the estimated pixel currents of segment #i of the first region 102-1 immediately after the update of segment #i of the first region 102-1 in frame #j, and "RTSS i j " represents the sum of the estimated pixel currents of segment #i of the second region 102-2 immediately after the update of segment #i of the second region 102-2 in frame #j. Further, "TPS i j " represents the estimated total current of the entire display panel 100 immediately after the update of segment #i of the first region 102-1 and the second region 102-2 in frame #j.
[0073] The compensation circuit portion 226-1 of the first display driver 200-1 (i.e., the left driver) is configured to determine the sum LSS of the estimated pixel currents of each segment of the first region 102-1 immediately after the update of each segment of the first region 102-1, and the compensation circuit portion 226-2 of the second display driver 200-2 (i.e., the right driver) is configured to determine the sum RSS of the estimated pixel currents of each segment of the second region 102-2 immediately after the update of each segment of the second region 102-2.
[0074] Furthermore, the compensation circuit unit 226-1 of the first display driver 200-1 (i.e., the left driver) is configured to determine and update the subtotal LTSS of the estimated pixel currents in the first region 102-1 in accordance with the update of each segment of the first region 102-1, and to generate first region total current data showing the subtotal LTSS of the estimated pixel currents in the first region 102-1. The compensation circuit unit 226-1 is further configured to transmit the first region total current data to the compensation circuit unit 226-2 of the second display driver 200-2. Similarly, the compensation circuit unit 226-2 of the second display driver 200-2 (i.e., the right driver) is configured to determine and update the subtotal RTSS of the estimated pixel currents in the second region 102-2 immediately after the update of each segment of the second region 102-2, and to generate second region total current data showing the updated subtotal RTSS of the estimated pixel currents in the second region 102-2. The compensation circuit unit 226-2 is further configured to transmit the total current data of the second region to the compensation circuit unit 226-1 of the first display driver 200-1.
[0075] Similarly, the compensation circuit section 226-2 of the second display driver 200-2 (i.e., the right driver) is configured to update the subtotal RTSS of the estimated pixel currents in the second region 102-2 in accordance with the update of each segment in the second region 102-2, and to generate second region total current data that shows the updated subtotal RTSS of the estimated pixel currents in the second region 102-2.
[0076] The compensation circuit section 226-1 of the first display driver 200-1 and the compensation circuit section 226-2 of the second display driver 200-2 are further configured to update the estimated total current TPS of the display panel 100 based on the total current data of the first region 102-1 and the total current data of the second region, in accordance with the updates of each segment of the first region 102-1 and the second region 102-2. As described above, the estimated total current TPS of the display panel 100 may be determined as the sum of the subtotal LTSS of the estimated pixel currents of the first region 102-1 and the subtotal RTSS of the estimated pixel currents of the second region 102-2.
[0077] In the illustrated embodiment, the subtotal of the estimated pixel current for each segment determined during each segment update period is reflected in the determination of the estimated total current TPS with a delay of two segment update periods. One of these two segment update periods is used to determine and exchange the total current data for the first and second regions, and the other is used to determine the estimated total current TPS based on the total current data for the first and second regions. Below, exemplary determinations of the subtotal LTSS of the estimated pixel current for the first region 102-1, the subtotal RTSS of the estimated pixel current for the second region 102-2, and the estimated total current TPS of the display panel 100 are described.
[0078] (1) Segment update period for frame #N #0 In one implementation, the estimated total current TPS M-2 N-1 However, this is used for IR drop compensation of pixels in segment #0 of the first region 102-1 and the second region 102-2 during segment update period #0. Here, TPS M-2 N-1 This is the estimated total current of the display panel 100 immediately after the update of segment #M-2 in the first region 102-1 and the second region 102-2 in frame #N-1. Estimated total current TPS M-2 N-1 This refers to the LTSS that was exchanged between the first display driver 200-1 and the second display driver 200-2 during the last segment update period #M-1 of frame #N-1. M-2 N-1 and RTSS M-2 N-1 It is calculated as the sum of [the specified values]. M-2 N-1 This is the subtotal of the estimated pixel currents in the first region 102-1 immediately after the update of segment #M-2 in the first region 102-1 and second region 102-2 in frame #N-1, and is RTSS. M-2 N-1 This is the subtotal of the estimated pixel currents of the second region 102-2 immediately after the update of segment #M-2 in the first region 102-1 and the second region 102-2 in frame #N-1. In one implementation, LTSS M-2 N-1 This may be determined according to the following formula (1a), RTSSM-2 N-1 This may be determined according to the following formula (1b).
number
[0079] (2) Segment update period for frame #N #1 In one implementation, the estimated total current TPS M-1 N-1 However, this is used for IR drop compensation of pixels in segment #1 of the first region 102-1 and the second region 102-2 during segment update period #1. Here, TPS M-1 N-1 This is the estimated total current of the display panel 100 immediately after the update of segment #M-1 in the first region 102-1 and the second region 102-2 in frame #N-1. Estimated total current TPS M-1 N-1 This refers to the LTSS exchanged between the first display driver 200-1 and the second display driver 200-2 during segment update period #0 of frame #N. M-1 N-1 and RTSS M-1 N-1 It is calculated as the sum of. In one implementation, LTSS M-1 N-1 This may be determined according to the following formula (2a), RTSS M-1 N-1 This may be determined according to the following formula (2b).
number
[0080] (3) Segment update period for frame #N: #2 to #M-1 In one implementation, the estimated total current TPS k-2 N However, this is used for IR drop compensation of pixels in segment #k of the first region 102-1 and the second region 102-2 during segment update period #k. k is an integer from 2 to M-1. Here, TPS k-2 N This is the estimated total current of the display panel 100 immediately after the update of segments #k-2 in the first region 102-1 and the second region 102-2 in frame #N. The parameter "k-2" is due to the delay of the two-segment update period. Estimated total current TPS k-2 N This refers to the LTSS exchanged between the first display driver 200-1 and the second display driver 200-2 during segment update period #k-1 of frame #N. k-2 N and RTSS k-2 N It is calculated as the sum of. In one implementation, LTSS k-2 N This may be determined according to the following formula (3a), RTSS k-2 N This may be determined according to the following formula (3b).
number
[0081] For example, for segment update period #2 of frame #N, the estimated total current TPS0 used for IR drop compensation of pixels in segment #2 of the first region 102-1 and the second region 102-2 is... N However, LTSS0 N and RTSS0 N It is determined as the sum of LTSS0. N This is the subtotal of the estimated pixel currents of the first region 102-1 immediately after the update of segment #0 in the first region 102-1 and the second region 102-2 in frame #N, and RTSS0 NThis is the subtotal of the estimated pixel currents of the second region 102-2 immediately after the update of segment #0 in the first region 102-1 and the second region 102-2 in frame #N. In one implementation, LTSS0 N This may be determined according to the following formula (4a), and RTSS0 N This may be determined according to the following formula (4b).
number
[0082] The scheme described above enables the determination of the estimated total current of the display panel 100 based on the subtotal of estimated pixel currents corresponding to the images actually displayed for at least M-2 of the M segments in each of the first region 102-1 and the second region 102-2, thereby providing improved accuracy in IR drop compensation. For example, immediately after the update of segment #2 in the first region 102-1 and the second region 102-2 in frame #N, the images displayed in segments #0 to #2 are based on image data corresponding to frame #N, and the images displayed in segments #3 to #M-1 are based on image data corresponding to frame #N-1. Equations (4a) and (4b) above are used in LTSS0 N and RTSS0 N However, this means that for each of the first region 102-1 and the second region 102-2, the images are generated to reflect the images that are actually displayed in the M segments other than segments #1 and #2 (i.e., the images displayed in segments #0 and segments #3 to #M-1). The same applies to the other segments in the first region 102-1 and the second region 102-2.
[0083] The above description relating to the attached drawings is based on a display device in which the display panel is driven by two display drivers, but those skilled in the art will understand that the technical concepts of this disclosure also apply to display devices having three or more display drivers. For example, in an embodiment in which the display panel is driven by q (where q is a natural number greater than or equal to 3) display drivers, the display panel may be divided into q regions, and each of the q display drivers is configured to update a corresponding region among the q regions. Each of the q display drivers may be configured to generate region total current data corresponding to the subtotal of the estimated pixel current of each pixel in the corresponding region. The q display drivers may further be configured to share the region total current data of the q regions via a communication bus, and each of the q display drivers may be configured to receive region total current data from other display drivers. Each of the q display drivers may further be configured to receive image data of the corresponding region, generate voltage data based on the image data, and update the corresponding region based on the voltage data. Each of the q display drivers may further be configured to perform IR drop compensation in the generation of voltage data based on the region total current data generated by each display driver. In one implementation, each of the q display drivers may be further configured to determine an estimated total current of the display panel based on region total current data generated by each display driver, and IR drop compensation may be based on the estimated total current of the display panel.
[0084] Method 1200 in Figure 12 illustrates the steps for driving a display panel (for example, the display panel 100 shown in Figures 4-6). One or more steps shown in Figure 12 may be omitted, repeated, and / or performed in an order different from that shown in Figure 12. Also, two or more steps may be performed simultaneously.
[0085] Method 1200 includes, in step 1202, generating first region total current data corresponding to the subtotal of the estimated pixel current of each pixel in a first region of the display panel (e.g., first region 102-1) using a first display driver (e.g., first display driver 200-1 as illustrated in Figures 4-6). Method 1200 further includes, in step 1204, generating second region total current data corresponding to the subtotal of the estimated pixel current of each pixel in a second region of the display panel (e.g., second region 102-2) using a second display driver (e.g., second display driver 200-2). Method 1200 further includes, in step 1206, transmitting the first region total current data from the first display driver to the second display driver, and in step 1208, transmitting the second region total current data from the second display driver to the first display driver. Method 1200 further includes, in step 1210, a first display driver generating first voltage data based on first image data corresponding to a first region. Generating the first voltage data includes IR drop compensation based on the total current data of the first region and the total current data of the second region. Method 1200 further includes, in step 1212, a second display driver generating second voltage data based on second image data corresponding to a second region. Generating the second voltage data includes IR drop compensation based on the total current data of the first region and the total current data of the second region. Method 1200 further includes, in step 1214, a first display driver updating the first region based on the first voltage data, and in step 1216, a second display driver updating the second region based on the second voltage data.
[0086] Although many embodiments have been described, those skilled in the art who benefit from this disclosure will understand that other embodiments can be devised that do not deviate from the technical scope. Accordingly, the technical scope of the invention should be limited only by the appended claims.
Claims
1. a display panel having a first region and a second region; a first display driver configured to generate first region total current data corresponding to a subtotal of estimated pixel currents for each pixel in the first region; a second display driver configured to generate second region total current data corresponding to a subtotal of estimated pixel currents for each pixel in the second region; Equipped with The first display driver further comprises: receiving the second region total current data from the second display driver; receiving first image data corresponding to the first region; generating first voltage data based on the first image data; configured to update the first region of the display panel based on the first voltage data; Generating the first voltage data includes IR drop compensation based on the first region total current data and the second region total current data. Display system.
2. the first display driver is further configured to determine an estimated total current of the display panel based on the first region total current data and the second region total current data; The IR drop compensation is based on the estimated total current of the display panel. The display system of claim 1 .
3. the first region includes a plurality of first segments; generating the first region total current data; determining a subtotal of estimated pixel current for each of the plurality of first segments; generating the first region total current data based on a sum of the subtotals determined for the plurality of first segments; Contains The display system of claim 1 .
4. the second region includes a plurality of second segments; generating the second region total current data; determining a subtotal of estimated pixel current for each of the plurality of second segments; generating the second region total current data based on a sum of the subtotals determined for the plurality of second segments; Contains The display system of claim 3 .
5. receiving image data corresponding to a first region of the display panel; generating first region total current data corresponding to a subtotal of estimated pixel currents for each pixel in the first region based on the image data; an image processing circuit configured to generate voltage data from the image data corresponding to the first region; driver circuitry configured to update the first region based on the voltage data; communication circuitry configured to receive second region total current data from the second display driver; Equipped with the second region total current data corresponds to a subtotal of estimated pixel currents for each pixel in the second region of the display panel; Generating the voltage data includes IR drop compensation based on the first region total current data and the second region total current data. Display driver.
6. the first region comprises a plurality of first segments; generating the first region total current data; determining a subtotal of estimated pixel current for each of the plurality of first segments; generating the first region total current data based on a sum of the subtotals determined for the plurality of first segments; Contains 6. The display driver according to claim 5.
7. Generating the first region total current data includes generating the first region total current data based on the sum of the subtotals determined for the plurality of first segments in response to updating each of the plurality of first segments.
7. A display driver according to claim 6.
8. generating, by a first display driver, first region total current data corresponding to a subtotal of estimated pixel currents for each pixel in a first region of the display panel; generating, by a second display driver, second region total current data corresponding to a subtotal of estimated pixel currents for each pixel in a second region of the display panel; transmitting the second region total current data from the second display driver to the first display driver; generating first voltage data based on first image data corresponding to the first region by the first display driver; updating the first region based on the first voltage data; Including, generating the first voltage data includes IR drop compensation based on the first region total current data and the second region total current data; method.
9. the first region includes a plurality of first segments; generating the first region total current data; determining a subtotal of estimated pixel current for each of the plurality of first segments; generating the first region total current data based on a sum of the subtotals determined for the plurality of first segments; Contains The method of claim 8.
10. the second region includes a plurality of second segments; generating the second region total current data; determining a subtotal of estimated pixel current for each of the plurality of second segments; generating the second region total current data based on a sum of the subtotals determined for the plurality of second segments; Contains The method of claim 8.