Photoelectric conversion device, photoelectric conversion system, and moving body

JP2023125844A5Pending Publication Date: 2025-03-04CANON KK
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Patent Information

Application Number
JP2022030180
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2022-02-28
Publication Date
2025-03-04

AI Technical Summary

Technical Problem

Fluctuations in reference voltage due to incident light cause bias voltage fluctuations, degrading image quality in imaging devices.

Method used

A photoelectric conversion device with separate voltage supply lines and pads for aperture and light-shielded pixels, along with a bias circuit that isolates the reference voltage supply, stabilizing the bias voltage against light fluctuations.

Benefits of technology

Reduces variations in bias voltage due to incident light, thereby improving image quality by preventing fluctuations in the bias voltage supplied to current sources.

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Abstract

To provide a technique advantageous in reducing fluctuation of a bias voltage caused by incident light.SOLUTION: A photoelectric conversion device includes: a pixel array having aperture pixels arranged so as to form rows and columns; signal lines arranged in the pixel array so as to read signals from the aperture pixels; current sources connected to the respective signal lines; a first voltage supply line configured to supply a first reference voltage to the aperture pixels; a first pad connected to the first voltage supply line; a bias circuit configured to supply a bias voltage to the current sources; a second voltage supply line electrically separated from the first voltage supply line, and configured to supply a second reference voltage to the bias circuit; and a second pad connected to the second voltage supply line.SELECTED DRAWING: Figure 4
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Description

Technical Field

[0001] The present invention relates to a photoelectric conversion device, a photoelectric conversion system, and a moving body.

Background Art

[0002] Patent Document 1 describes an imaging device that reduces image quality degradation caused by fluctuations in the reference voltage due to incident light. The imaging device described in Patent Document 1 may include a first pad and a second pad. The first pad supplies a reference voltage supplied from the outside to pixels arranged in an aperture pixel region. The second pad supplies a reference voltage supplied from the outside to pixels arranged in a light-shielding pixel region.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In the configuration described in Patent Document 1, when strong light is incident on the aperture pixel region, the voltage of the vertical signal line passing through the aperture pixel region fluctuates greatly, which can cause the reference voltage to fluctuate. The fluctuation of the reference voltage is a factor that causes the bias voltage applied to the current source connected to each signal line to fluctuate, which may deteriorate the image quality.

[0005] An object of the present invention is to provide an advantageous technique for reducing fluctuations in the bias voltage due to incident light.

Means for Solving the Problems

[0006] One aspect of the present invention relates to a photoelectric converter, the photoelectric converter comprising: a pixel array including a plurality of aperture pixels arranged to constitute a plurality of rows and a plurality of columns; a plurality of signal lines arranged in the pixel array to enable reading of signals from the plurality of aperture pixels; a plurality of current sources connected to each of the plurality of signal lines; a first voltage supply line supplying a first reference voltage to the plurality of aperture pixels; a first pad connected to the first voltage supply line; a bias circuit supplying a bias voltage to the plurality of current sources; a second voltage supply line electrically isolated from the first voltage supply line and supplying a second reference voltage to the bias circuit; and a second pad connected to the second voltage supply line. [Effects of the Invention]

[0007] According to the present invention, an advantageous technique is provided for reducing fluctuations in bias voltage due to incident light. [Brief explanation of the drawing]

[0008] [Figure 1] A diagram illustrating the basic configuration of a photoelectric conversion device according to the first embodiment. [Figure 2] A schematic diagram showing the reference voltage distribution circuit in the photoelectric converter of the first embodiment. [Figure 3] A diagram showing an example of the pixel configuration in the photoelectric conversion device of the first embodiment. [Figure 4] A diagram illustrating the main components of the photoelectric conversion device according to the first embodiment. [Figure 5] A diagram showing an example configuration of the current source and bias circuit in the photoelectric conversion device of the first embodiment. [Figure 6] A diagram illustrating the main components of the photoelectric conversion device according to the second embodiment. [Figure 7] A diagram showing an example of the configuration of a clip circuit in a photoelectric conversion device according to the second embodiment. [Figure 8] A diagram illustrating the main components of the photoelectric conversion device according to the third embodiment. [Figure 9] A diagram illustrating the main components of the photoelectric conversion device according to the fourth embodiment. [Figure 10]A diagram illustrating the main components of the photoelectric conversion device according to the fifth embodiment. [Figure 11] A diagram illustrating the configuration of a photoelectric conversion system. [Figure 12] A diagram illustrating the configuration of a photoelectric conversion system and a mobile device. [Figure 13] A diagram illustrating the operation of a photoelectric conversion system. [Modes for carrying out the invention]

[0009] The embodiments will be described in detail below with reference to the attached drawings. Note that the following embodiments do not limit the invention as defined in the claims. While the embodiments describe multiple features, not all of these features are essential to the invention, and the features may be combined in any way. Furthermore, in the attached drawings, identical or similar configurations are given the same reference numerals, and redundant descriptions are omitted.

[0010] Figure 1 illustrates the basic configuration of a photoelectric converter PECD of a first embodiment. The photoelectric converter PECD can be configured, for example, as a solid-state imaging device or as a device including a solid-state imaging device. The solid-state imaging device is, for example, a CMOS image sensor. Multiple components constituting the photoelectric converter PECD can be arranged on a semiconductor substrate 1. The photoelectric converter PECD includes a pixel array 100. The pixel array 100 includes multiple pixels 101 (101-1, 101-2) arranged to constitute multiple rows (V1 to Vn) and multiple columns (C1 to Cm). Microlenses and / or color filters may be arranged on the pixel array 100.

[0011] The pixel array 100 includes an aperture pixel array 120. The aperture pixel array 120 includes multiple aperture pixels 101 arranged to form multiple rows (V1 to Vn) and multiple columns (C3 to Cm in the example in Figure 1). Here, the multiple rows are aligned in a first direction D1, and each row extends parallel to a second direction D2 that intersects or is perpendicular to the first direction D1. The multiple columns are aligned in a second direction D2, and each column extends parallel to the first direction D1.

[0012] An aperture pixel 101 is configured such that incident light to the photoelectric converter PECD is incident on the photoelectric conversion element of the aperture pixel 101. In the aperture pixel 101, light is typically incident on the photoelectric conversion element through an aperture provided in the light-shielding film. The photoelectric converter PECD may include a plurality of vertical signal lines 105-1 (signal lines) arranged in the pixel array 100 to enable the readout of signals from a plurality of aperture pixels 101-1. An aperture pixel 101-1 may be configured to output a pixel signal through the corresponding vertical signal line 105-1, corresponding to the amount of light incident on its photoelectric conversion element.

[0013] The pixel array 100 may further include a light-shielding pixel array 130. The light-shielding pixel array 130 includes a plurality of rows (V1 to Vn) and a plurality of light-shielding pixels 101-2 arranged to form one or more columns (in the example of FIG. 1, C1, C2). The light-shielding pixels 101-2 have a light-shielding film that blocks incident light so that the incident light does not enter the photoelectric conversion elements of the light-shielding pixels 101-2. The photoelectric conversion device PECD may include one or more second vertical signal lines (105-1) arranged in the pixel array 100 to enable reading of signals from the plurality of light-shielding pixels 101-2. The light-shielding pixels 101-2 may be configured to output a dark signal corresponding to a noise component generated and accumulated in their photoelectric conversion elements through the corresponding second vertical signal lines 105-2. The light-shielding pixel array 130 may be arranged in a direction parallel to the second direction D2 as viewed from the aperture pixel array 120. Such a light-shielding pixel array 130 may form a horizontal optical black region. The light-shielding film may be formed of a metal material such as copper or aluminum, for example. The pixel array 100 may include other pixels, for example, dummy pixels that do not output signals, and / or pixels for focus detection. Hereinafter, when the vertical signal line 105 and the second vertical signal line 105-2 are not distinguished from each other, they will be referred to as the vertical output line

[0014] The photoelectric conversion device PECD may include a vertical scanning circuit 102, a control circuit 103, a plurality of drive signal line groups 104, a plurality of vertical output lines <0>

[0015] ​​The plurality of vertical output lines 105 may include a plurality of vertical signal lines 105-1 and one or more second vertical signal lines 105-2. The plurality of vertical signal lines 105-1 and one or more second vertical signal lines 105-2 are connected to a readout circuit 106 (off-pixel readout circuit) disposed outside the pixel array 100. In this specification, connection means electrical connection unless otherwise inconsistent with the context. A current source 110-1 may be connected to each of the plurality of vertical signal lines 105-1. A second current source 110-2 may be connected to each of the one or more second vertical signal lines 105-2. Hereinafter, when expressing the current source 110-1 and the current source 110-2 without distinguishing them from each other, they are expressed as the current source 110. The current source 110 may form a source follower circuit together with an amplification transistor of each pixel 101 described later.

[0016] The readout circuit 106 performs a process of reading signals from the pixels 101 of each row through the vertical output lines 105 (105-1, 105-2). The readout circuit 106 may include, for example, a differential amplification circuit, a sample and hold circuit, an AD conversion circuit, a memory, etc. The differential amplification circuit may amplify the signals output from the pixels 101 of each row through the vertical output lines 105. The sample and hold circuit may sample and hold the output of the differential amplification circuit. The AD conversion circuit may perform AD conversion on the output of the sample and hold. The memory may temporarily hold the output of the AD conversion circuit.

[0017] The horizontal scanning circuit 107 supplies a transfer control signal for sequentially transferring a plurality of signals processed by the readout circuit 106 to the output circuit 108 to the readout circuit 106. The output circuit 108 outputs the signals transferred from the readout circuit 106 to a signal processing unit outside or inside the photoelectric conversion device PECD. The control circuit 103 generates a plurality of control signals for controlling the operations of the vertical scanning circuit 102, the readout circuit 106, the horizontal scanning circuit 107, and the output circuit 108. At least one of the plurality of control signals may be supplied from outside the photoelectric conversion device PECD.

[0018] In the photoelectric converter PECD configured as described above, the dark signal obtained from each row of the light-shielding pixel array 130 can be used, for example, for correction processing to correct the pixel signal obtained from the aperture pixel array 120 of that row. The correction processing may be performed inside the photoelectric converter PECD or outside. If the correction processing is performed inside the photoelectric converter PECD, the photoelectric converter PECD is equipped with a correction circuit for performing the correction processing.

[0019] Figure 2 schematically shows the reference voltage distribution circuit in the PECD photoelectric converter of the first embodiment. The reference voltage is a voltage with a constant nominal value, and its concept includes, for example, the ground voltage, a constant voltage higher than the ground voltage (e.g., a positive power supply voltage), and a constant voltage lower than the ground voltage. The positive power supply voltage may be denoted as VDD. The nominal value means the voltage ignoring unintended fluctuations due to noise or parasitic resistance, etc. Below, an example in which the reference voltage is a positive power supply voltage will be described, but the present invention is also applicable when the reference voltage is something other than a positive power supply voltage.

[0020] In the example in Figure 2, for the sake of simplicity, the pixel array 100 includes a plurality of pixels 101 arranged to form 6 rows and 8 columns. The aperture pixel array 120 also includes a plurality of pixels 101 (specifically aperture pixels 101-1) arranged to form 6 rows and 6 columns, and the light-shielding pixel array 130 includes a plurality of pixels 101 (specifically light-shielding pixels 101-2) arranged to form 6 rows and 2 columns.

[0021] The photoelectric converter PECD may include a voltage supply line 200-1 (first voltage supply line) that supplies a first reference voltage (VDD) to a plurality of aperture pixels 101-1, and pads 201 and 202 (first pads) connected to the voltage supply line 200-1 (first voltage supply line). The photoelectric converter PECD may also include a voltage supply line 200-3 (third voltage supply line) that supplies a second reference voltage (VDD) having the same nominal value as the first reference voltage (VDD) to a plurality of light-shielding pixels 101-2. The photoelectric converter PECD may also include pads 203 and 204 (second pads) connected to the voltage supply line 200-3 (third voltage supply line). The voltage supply line 200-3 (third voltage supply line) is electrically isolated from the voltage supply line 200-1 (first voltage supply line). Pads 203 and 204 (second pads) are electrically isolated from pads 201 and 202 (first pads) and are positioned at a distance from pads 201 and 202 (first pads).

[0022] The voltage supply lines 200-1 and 200-3 may be conductive patterns arranged on the surface of the semiconductor substrate 1 via an insulating film, or they may be impurity semiconductor regions such as wells in the semiconductor substrate 1. In the example of Figure 2, one voltage supply line 200-1 (first voltage supply line) is provided for one row, but multiple voltage supply lines 200-1 (first voltage supply lines) may be provided for one row. In this case, the multiple voltage supply lines 200-1 (first voltage supply lines) may have equal nominal values, or they may include at least two voltage supply lines with different nominal values. Also, in the example of Figure 2, one voltage supply line 200-3 (third voltage supply line) is provided for one row, but multiple voltage supply lines 200-3 (third voltage supply lines) may be provided for one row. In this case, the multiple voltage supply lines 200-3 (third voltage supply lines) may have equal nominal values, or they may include at least two voltage supply lines with different nominal values.

[0023] In the example shown in Figure 2, pads 201 and 203 are positioned in the positive direction of the first direction D1 as viewed from the pixel array 100, and pads 202 and 204 are positioned in the negative direction of the first direction D1. Here, pads 201 and 202 (first pads) are connected to both ends of a plurality of voltage supply lines 200-1 for the aperture pixel array 120, supplying a first reference voltage (VDD) supplied from outside the semiconductor substrate 1 to a plurality of aperture pixels 101-1. Pads 203 and 204 (second pads) are connected to both ends of one or more voltage supply lines 200-3 for the light-shielding pixel array 130, supplying a second reference voltage (VDD) supplied from outside the semiconductor substrate 1 to a plurality of light-shielding pixels 101-2.

[0024] Multiple voltage supply lines 200-1 for the aperture pixel array 120 may be connected by wiring patterns 205 and 206. Multiple pads 201 may be interconnected by wiring pattern 205. Multiple pads 202 may be interconnected by wiring pattern 206. The number of pads 201 is any number including 1, and the number of pads 202 is also any number including 1. It is preferable that the number of pads 201 and the number of pads 202 are the same. It is preferable that wiring patterns 205 and 206 have the same structure.

[0025] Multiple voltage supply lines 200-3 for the light-shielding pixel array 130 may be connected by wiring patterns 207 and 208. Multiple pads 203 may be provided, in which case the multiple pads 203 may be connected by wiring pattern 207. Similarly, multiple pads 204 may be provided, in which case the multiple pads 204 may be connected by wiring pattern 208. The number of pads 203 is any number including 1, and the number of pads 204 is also any number including 1. It is preferable that the number of pads 203 and the number of pads 204 are the same. It is preferable that wiring patterns 207 and 208 have the same structure.

[0026] Figure 3 shows an example configuration of pixels 101 (101-1, 101-2). Pixel 101 includes a photodiode 301 (photoelectric conversion element). Pixel 101 may also include, for example, a transfer transistor 302, a reset transistor 303, an amplification transistor 304, and a selection transistor 305. The drains of the reset transistor 303 and the amplification transistor 304 may be connected to a voltage supply line to which a reference voltage (VDD) is supplied. Specifically, the drains of the reset transistor 303 and the amplification transistor 304 of aperture pixel 101-1 may be connected to voltage supply line 200-1. The drains of the reset transistor 303 and the amplification transistor 304 of light-shielding pixel 101-2 may be connected to voltage supply line 200-3.

[0027] The transfer transistor 302 transfers the signal charge generated by the photodiode 301 to the floating diffusion (FD) 306. The amplification transistor 304 outputs an output corresponding to the potential of the FD 306 to the vertical output line 105 via the selection transistor 305. The amplification transistor 304 can form a source follower circuit together with the current source 110. The gate of the amplification transistor 304 is connected to the FD 306. The reset transistor 303 resets the node connected to the gate of the amplification transistor 304, i.e., the FD 306, to a predetermined potential (reset potential). The signal of the pixel 101 of the row selected by the vertical scanning circuit 102 is output to the vertical output line 105. Here, the vertical output line 105 is connected to the readout circuit 106. The current source 110 is also connected to the vertical output line 105, and the current source 110 supplies a constant bias current to the amplification transistor 304 via the vertical output line 105.

[0028] Here, if strong light is incident on aperture pixel 101-1 of aperture pixel array 120, the voltage of vertical output line 105 (vertical signal line 105-1) drops significantly, which can cause the voltage of voltage supply line 200-1 for aperture pixel array 120 to fluctuate. However, on the semiconductor substrate 1, voltage supply line 200-3 for light-shielding pixel array 130 is electrically isolated from voltage supply line 200-1 for aperture pixel array 120. Therefore, the effect of voltage fluctuations in voltage supply line 200-1 for aperture pixel array 120 on the voltage of voltage supply line 200-3 for light-shielding pixel array 130 is negligible. Thus, even if strong light is incident on aperture pixel 101-1 of aperture pixel array 120, the dark signal obtained from light-shielding pixel 101-2 of light-shielding pixel array 130 will not be affected by fluctuations in voltage supply line 200-3 for light-shielding pixel array 130. However, when strong light is incident on aperture pixel 101-1 of aperture pixel array 120, if the bias voltage supplied to the current source 110 (110-1, 110-2) fluctuates, the signal output from pixel array 100 may be affected, potentially degrading image quality.

[0029] Figure 4 illustrates a configuration for reducing the influence of strong light incident on aperture pixels 101-1 of the aperture pixel array 120 on the bias voltage supplied to the current source 110. As illustrated in Figure 4, the photoelectric converter PECD includes a bias circuit 400 that supplies a bias voltage to the current sources 110 (110-1, 110-2). The bias voltage generated by the bias circuit 400 is supplied to the current sources 110 of each row via a bias line 401.

[0030] The bias circuit 400 is connected to the pad 204 (second pad) via the voltage supply line 200-2 (second voltage supply line). The second reference voltage (VDD) supplied to the pad 203 or 204 (second pad) from outside the semiconductor substrate 1 is supplied to the bias circuit 400 via the voltage supply line 200-2 (second voltage supply line). Therefore, even if the voltage of the voltage supply line 200-1 of the aperture pixel array 120 fluctuates due to strong light incident on the aperture pixel 101-1 of the aperture pixel array 120, the voltage of the voltage supply line 200-2 is not affected. Thus, even if strong light is incident on the aperture pixel 101-1 of the aperture pixel array 120, fluctuations in the bias voltage supplied to the current source 110 (110-1, 110-2) are suppressed.

[0031] Figure 5 shows an example configuration of the current source 110 and the bias circuit 400. The current source 110 (110-1, 110-2) may include, for example, a load transistor 500. However, this is just one example, and the current source 110 may include, for example, a gate-grounded transistor and a transistor that controls the current path, in addition to the load transistor 500. The bias circuit 400 may include, for example, a transistor 501 that forms a current mirror circuit together with the load transistor 500 of the current source 110.

[0032] If a first reference voltage (VDD) is supplied to the bias circuit 400 via pad 201 or 202, then if the first reference voltage of the voltage supply line 200-1 fluctuates due to strong incident light, the bias voltage generated by the bias circuit 400 may fluctuate. However, in this embodiment, a second reference voltage (VDD) is supplied to the bias circuit 400 via pad 203 or 204 on the semiconductor substrate 1, which is electrically isolated from pad 201 or 202. Therefore, even if the first reference voltage of the voltage supply line 200-1 fluctuates due to strong incident light, the bias voltage generated by the bias circuit 400 is less affected, and thus, a decrease in image quality can be suppressed.

[0033] In the example shown in Figure 5, the bias circuit 400 has only the transistor 501 that constitutes a current mirror circuit, but this is merely illustrative. For example, if gate-grounded transistors are placed in the current sources 110 of each column, the bias circuit 400 may include a configuration that generates a bias voltage for those transistors. Alternatively, a reference current may be supplied from outside the semiconductor substrate 1, and the bias circuit 400 may generate a bias voltage for the load transistor 500 and / or gate-grounded transistors in a current mirror circuit configuration.

[0034] As mentioned above, the reference voltage may be, for example, the ground voltage (for example, the voltage of the well region of the semiconductor substrate 1). Furthermore, the pixel array 100 may have a vertical optical black region for a correction purpose separate from the light-shielding pixel array 130, which may be configured as a horizontal optical black region. Regarding the arrangement of the light-shielding pixel array 130, if the number of rows in the light-shielding pixel array 130 is sufficiently large, such as several hundred rows, then, for example, several dozen rows of aperture regions may be included within the light-shielding pixel region.

[0035] Figure 6 illustrates the configuration of a photoelectric converter PECD of a second embodiment. Matters not mentioned as part of the second embodiment may conform to the first embodiment. The photoelectric converter PECD of the second embodiment may include a plurality of clipping circuits 600 that limit the voltage amplitude of a plurality of vertical signal lines 105-1, respectively. The photoelectric converter PECD of the second embodiment may further include a plurality of clipping circuits 600 that limit the voltage amplitude of a plurality of second vertical signal lines 105-2, respectively. The nominal value of the reference voltage (VDD_VCLIP) may be equal to the reference voltage (VDD), in which case the plurality of clipping circuits 600 may be supplied with the reference voltage (VDD) from pads 201 or 202 for the aperture pixel array 120.

[0036] Figure 7 shows an example configuration of the clipping circuit 600. The clipping circuit 600 may include a clipping transistor 700. A clipping control voltage VCLIP is supplied to the gate of the clipping transistor 700, and the clipping transistor 700 may be configured to limit (clip) the voltage amplitude of the vertical output lines 105 (105-1, 105-2) according to the clipping control voltage VCLIP. The reference voltage VCLIP may be set so that current flows from the pixel 101 to the current source 110 under normal incident light conditions, that is, so as not to compress the dynamic range. When strong light is incident, the supply of current from the reference voltage (VDD) to the vertical output lines 105 through the clipping transistor 700 prevents the current in the current source 110 from being cut off. However, when current flows from the reference voltage (VDD) to the vertical output lines 105 through the clipping transistor 700, the voltage of the voltage supply line 200-1 may fluctuate. In this case as well, the bias circuit 400 is supplied with a reference voltage (VDD) via pads 203 or 204, so the bias circuit 400 is not affected by fluctuations in the voltage of the voltage supply line 200-1.

[0037] Figure 8 illustrates the configuration of the photoelectric converter PECD of the third embodiment. Matters not mentioned as belonging to the third embodiment may follow those of the first or second embodiment. The photoelectric converter PECD of the third embodiment includes a voltage supply line 802 (second voltage supply line) connected to the bias circuit 400, and a pad 800 or 801 (second pad) connected to the voltage supply line 802 (second voltage supply line). A second reference voltage (VDD) supplied from outside the semiconductor substrate 1 to the pad 800 or 801 (second pad) is supplied to the bias circuit 400 via the voltage supply line 802 (second voltage supply line).

[0038] The photoelectric converter PECD of the third embodiment may include pads 203', 204' (third pads) for the light-shielding pixel array 130. The pads 203', 204' (third pads) are connected to both ends of one or more voltage supply lines 200-3 for the light-shielding pixel array 130 and supply a third reference voltage (VDD) supplied from outside the semiconductor substrate 1 to a plurality of light-shielding pixels 101-2. The third reference voltage (VDD) is a voltage having the same nominal value as the first reference voltage (VDD) for the aperture pixel array 120. The pads 203', 204' (third pads) are electrically isolated from and positioned at a distance from the pads 201, 202 (first pads).

[0039] Pads 203' and 204' (third pads) may be connected to pads 800 or 801 (second pads) or wiring patterns 207 or 208 by connecting lines 805. Pads 203' and 204' (third pads) may be omitted, in which case pads 800 and 801 (second pads) supply a second reference voltage (VDD) supplied from outside the semiconductor substrate 1 to a plurality of light-shielding pixels 101-2.

[0040] The pixel array 100 has a rectangular shape, and a plurality of light-shielding pixels 101-2 may be arranged along a first side S1 (a side parallel to the first direction D1) that is parallel to a plurality of columns among the four sides of the rectangle. Pads 800 or 801 (second pads) may be arranged between a virtual line including the first side S1 and a side SS1 on the semiconductor substrate 1 that is parallel to the virtual line. Pads 203', 204' (third pads) may be arranged between a second side S2 adjacent to the first side S1 and a side SS2 on the semiconductor substrate 1 that is parallel to the second side S2.

[0041] Figure 9 illustrates the configuration of the photoelectric converter PECD of the fourth embodiment. Matters not mentioned as the fourth embodiment may follow those of the third embodiment. The photoelectric converter PECD of the fourth embodiment has a configuration in which the connecting line 805 is removed from the photoelectric converter PECD of the third embodiment. In the photoelectric converter PECD of the fourth embodiment, the nominal value of the third reference voltage supplied to pads 203' and 204' (third pad) can be made different from the nominal value of the second reference voltage supplied to pad 800 or 801 (second pad). Alternatively, the photoelectric converter PECD of the fourth embodiment offers increased flexibility in the arrangement of the pads.

[0042] Figure 10 illustrates a portion of the configuration of the PECD photoelectric converter according to the fifth embodiment. Matters not mentioned as part of the fifth embodiment may follow those of the first to fourth embodiments. In the PECD photoelectric converter according to the fifth embodiment, the bias circuit 400 in the PECD photoelectric converter according to the first to fourth embodiments is replaced by the bias circuit 1000.

[0043] The bias circuit 1000 supplies a bias voltage to a plurality of current sources 110 (110-1, 110-2) via a bias line 1002. The photoelectric converter PECD of the fifth embodiment may further include one or more additional bias circuits 1001. The additional bias circuits 1001 may be configured to supply the same voltage to the bias line 1002 as the bias voltage generated by the bias circuit 1000. The bias circuit 1000 and the one or more additional bias circuits 1001 may be supplied with a reference voltage VDD_SUB (second reference voltage) via one or more pads 1010 and a voltage supply line 1011 (second voltage supply line). The reference voltage VDD_SUB may have the same nominal value as the reference voltage (VDD) supplied to the pixels 101 of the pixel array 100, or it may have a different nominal value than the reference voltage (VDD) supplied to the pixels 101 of the pixel array 100. An additional bias circuit 1001 may be placed between the pixel array 100 and the readout circuit 106. One or more additional bias circuits 1001 may act to supplement the driving capability of the bias line 1002 by the bias circuit 1000. One or more additional bias circuits 1001 may have a load transistor 1003.

[0044] The bias circuit 1000 supplies a bias voltage for the additional bias circuit 1001 to the gate of the load transistor 1003 of the additional bias circuit 1001 via the bias line 1004. The bias circuit 1000 also supplies a bias voltage for the current source 110 to the gate of the load transistor 500 of the current source 110 via the bias line 1002.

[0045] The additional bias circuit 1001 may include, for example, a common-gate transistor, in which case the bias circuit 1000 can supply a bias voltage to the common-gate transistor via the bias line 1004.

[0046] Even with this configuration, if the first reference voltage of the voltage supply line 200-1 for the aperture pixel array 120 fluctuates due to strong incident light, the impact on the bias voltage supplied to the current source 110 can be reduced, thereby suppressing a decrease in image quality.

[0047] The following describes an example of a photoelectric conversion system using the photoelectric conversion device of each embodiment described above.

[0048] Figure 11 is a block diagram showing the configuration of the photoelectric conversion system 1200 according to this embodiment. The photoelectric conversion system 1200 of this embodiment includes a photoelectric conversion device 1215. Here, the photoelectric conversion device 1215 can be any of the photoelectric conversion devices described in the above embodiments. The photoelectric conversion system 1200 can be used, for example, as an imaging system. Specific examples of imaging systems include digital still cameras, digital camcorders, and surveillance cameras. In Figure 11, an example of a digital still camera is shown as the photoelectric conversion system 1200.

[0049] The photoelectric conversion system 1200 shown in Figure 11 includes a photoelectric conversion device 1215, a lens 1213 that forms an optical image of the subject onto the photoelectric conversion device 1215, an aperture 1214 for varying the amount of light passing through the lens 1213, and a barrier 1212 for protecting the lens 1213. The lens 1213 and aperture 1214 form an optical system that focuses light onto the photoelectric conversion device 1215.

[0050] The photoelectric conversion system 1200 has a signal processing unit 1216 that processes the output signal output from the photoelectric conversion device 1215. The signal processing unit 1216 performs signal processing operations that perform various corrections and compressions on the input signal as needed before outputting it. The photoelectric conversion system 1200 further has a buffer memory unit 1206 for temporarily storing image data, and an external interface unit (external I / F unit) 1209 for communicating with an external computer or the like. Furthermore, the photoelectric conversion system 1200 has a recording medium 1211 such as a semiconductor memory for recording or reading imaging data, and a recording medium control interface unit (recording medium control I / F unit) 1210 for recording or reading from the recording medium 1211. The recording medium 1211 may be built into the photoelectric conversion system 1200 or it may be detachable. In addition, communication from the recording medium control I / F unit 1210 to the recording medium 1211 and communication from the external I / F unit 1209 may be performed wirelessly.

[0051] Furthermore, the photoelectric conversion system 1200 includes an overall control and calculation unit 1208 that performs various calculations and controls the entire digital still camera, and a timing generation unit 1217 that outputs various timing signals to the photoelectric conversion device 1215 and the signal processing unit 1216. Here, the timing signals and the like may be input from an external source, and the photoelectric conversion system 1200 only needs to include at least the photoelectric conversion device 1215 and the signal processing unit 1216 that processes the output signals output from the photoelectric conversion device 1215. As described in the fourth embodiment, the timing generation unit 1217 may be mounted on the photoelectric conversion device. The overall control and calculation unit 1208 and the timing generation unit 1217 may be configured to perform some or all of the control functions of the photoelectric conversion device 1215.

[0052] The photoelectric converter 1215 outputs an image signal to the signal processing unit 1216. The signal processing unit 1216 performs predetermined signal processing on the image signal output from the photoelectric converter 1215 and outputs image data. The signal processing unit 1216 also generates an image using the image signal. The signal processing unit 1216 may also perform distance measurement calculations on the signal output from the photoelectric converter 1215. The signal processing unit 1216 and the timing generation unit 1217 may be mounted on the photoelectric converter. In other words, the signal processing unit 1216 and the timing generation unit 1217 may be provided on the substrate on which the pixels are arranged, or they may be provided on a separate substrate. By configuring an imaging system using the photoelectric converters of each embodiment described above, an imaging system capable of acquiring higher quality images can be realized.

[0053] The photoelectric conversion system and mobile unit of this embodiment will be described with reference to Figures 12 and 13. Figure 12 is a schematic diagram showing an example configuration of the photoelectric conversion system and mobile unit according to this embodiment. Figure 13 is a flowchart showing the operation of the photoelectric conversion system according to this embodiment. In this embodiment, an example of an in-vehicle camera is shown as the photoelectric conversion system.

[0054] Figure 12 shows an example of a vehicle system and a photoelectric conversion system mounted thereon for imaging. The photoelectric conversion system 1301 includes a photoelectric converter 1302, an image preprocessing unit 1315, an integrated circuit 1303, and an optical system 1314. The optical system 1314 forms an optical image of the subject on the photoelectric converter 1302. The photoelectric converter 1302 converts the optical image of the subject formed by the optical system 1314 into an electrical signal. The photoelectric converter 1302 is one of the photoelectric converters in each of the embodiments described above. The image preprocessing unit 1315 performs predetermined signal processing on the signal output from the photoelectric converter 1302. The functions of the image preprocessing unit 1315 may be incorporated into the photoelectric converter 1302. The photoelectric conversion system 1301 is provided with at least two sets of optical systems 1314, photoelectric conversion devices 1302, and image preprocessing units 1315, and the output from each set of image preprocessing units 1315 is input to the integrated circuit 1303.

[0055] The integrated circuit 1303 is an integrated circuit for imaging system applications and includes an image processing unit 1304 with memory 1305, an optical distance measuring unit 1306, a distance measurement calculation unit 1307, an object recognition unit 1308, and an anomaly detection unit 1309. The image processing unit 1304 performs image processing such as development and defect correction on the output signal of the image preprocessing unit 1315. The memory 1305 stores the primary storage of the captured image and the location of defects in the captured pixels. The optical distance measuring unit 1306 focuses on the subject and measures the distance. The distance measurement calculation unit 1307 calculates distance measurement information from multiple image data acquired by multiple photoelectric converters 1302. The object recognition unit 1308 recognizes subjects such as cars, roads, signs, and people. When the anomaly detection unit 1309 detects an anomaly in the photoelectric converter 1302, it alerts the main control unit 1313 to the anomaly.

[0056] The integrated circuit 1303 may be implemented by specially designed hardware, by a software module, or by a combination of these. It may also be implemented by an FPGA (Field Programmable Gate Array), an ASIC (Application Specific Integrated Circuit), or a combination of these.

[0057] The main control unit 1313 coordinates and controls the operation of the photoelectric conversion system 1301, vehicle sensor 1310, control unit 1320, etc. Alternatively, there may be no main control unit 1313, and the photoelectric conversion system 1301, vehicle sensor 1310, and control unit 1320 may each have their own communication interfaces and send and receive control signals via a communication network (e.g., CAN standard).

[0058] The integrated circuit 1303 has the function of receiving control signals from the main control unit 1313 or transmitting control signals and set values ​​to the photoelectric converter 1302 via its own control unit.

[0059] The photoelectric conversion system 1301 is connected to the vehicle sensor 1310 and can detect the vehicle's driving conditions, such as vehicle speed, yaw rate, and steering angle, as well as the external environment and the state of other vehicles and obstacles. The vehicle sensor 1310 also serves as a distance information acquisition means for acquiring distance information to objects. Furthermore, the photoelectric conversion system 1301 is connected to the driver assistance control unit 1311, which performs various driver assistance functions such as automatic steering, automatic cruising, and collision avoidance. In particular, regarding the collision judgment function, it determines whether a collision with another vehicle or obstacle has occurred and estimates a collision based on the detection results of the photoelectric conversion system 1301 and the vehicle sensor 1310. This enables avoidance control when a collision is estimated and activation of safety devices in the event of a collision.

[0060] Furthermore, the photoelectric conversion system 1301 is also connected to a warning device 1312 that issues a warning to the driver based on the judgment result of the collision judgment unit. For example, if the collision judgment unit determines that there is a high probability of collision, the main control unit 1313 performs vehicle control to avoid a collision or mitigate damage by applying the brakes, releasing the accelerator, or suppressing engine output. The warning device 1312 warns the user by sounding an alarm, displaying warning information on a display screen such as the car navigation system or instrument panel, or vibrating the seat belt or steering wheel.

[0061] The invention is not limited to the embodiments described above, and various modifications and variations are possible without departing from the spirit and scope of the invention. Accordingly, claims are attached to disclose the scope of the invention. [Explanation of symbols]

[0062] PECD: Photoelectric converter, 100: Pixel array, 101: Pixel, 101-1: Aperture pixel, 101-2: Shaded pixel, 105: Vertical output line, 110: Current source, 120: Aperture pixel array, 130: Shaded pixel array, 200: Voltage supply line, 201, 202, 203, 204: Pad, 400: Bias circuit

Claims

1. a pixel array including a plurality of aperture pixels and a plurality of light-shielding pixels arranged in a plurality of rows and a plurality of columns; a plurality of signal lines arranged in the pixel array to enable readout of signals from the plurality of aperture pixels; a plurality of current sources respectively connected to the plurality of signal lines; a first voltage supply line that supplies a first reference voltage to the plurality of aperture pixels; a first pad connected to the first voltage supply line; a bias circuit for supplying a bias voltage to the plurality of current sources; a second voltage supply line electrically isolated from the first voltage supply line and supplying a second reference voltage to the bias circuit; a second pad connected to the second voltage supply line; a second signal line disposed in the pixel array to enable readout of signals from the light-shielded pixels; a third voltage supply line that supplies the second reference voltage to the plurality of light-shielded pixels; the third voltage supply line is connected to the second pad; A photoelectric conversion device comprising:

2. a second current source connected to the second signal line; the second voltage supply line supplies the second reference voltage to the second current source in addition to the plurality of current sources; 2. The photoelectric conversion device according to claim 1.

3. the pixel array, the plurality of signal lines, the plurality of current sources, the first voltage supply line, the first pad, the second voltage supply line, the second pad, the third voltage supply line, the second signal line, and the second current source are disposed on a semiconductor substrate; the pixel array has a rectangular outer shape, and the light-shielding pixels are arranged along a first side of the rectangle that is parallel to the columns, among four sides of the rectangle; the second pad is disposed between a second side adjacent to the first side and a side of the semiconductor substrate parallel to the second side; 3. The photoelectric conversion device according to claim 2.

4. the nominal value of the first reference voltage and the nominal value of the second reference voltage are equal to each other; 4. The photoelectric conversion device according to claim 1, wherein the first and second electrodes are arranged in a first direction.

5. a second current source connected to the second signal line; the second voltage supply line supplies the second reference voltage to the second current source in addition to the plurality of current sources; 5. The photoelectric conversion device according to claim 1, wherein the first and second electrodes are arranged in a first direction.

6. The signal line may further include a plurality of clip circuits each of which limits a voltage amplitude of the signal lines.

6. The photoelectric conversion device according to claim 1,

7. the first reference voltage is supplied to the plurality of clip circuits from the first pad; 7. The photoelectric conversion device according to claim 6.

8. the bias circuit supplies the bias voltage to the current sources via a bias line; the photoelectric conversion device further includes an additional bias circuit, the additional bias circuit supplying a voltage equal to the bias voltage to the bias line; 8. The photoelectric conversion device according to claim 1, wherein the first and second electrodes are arranged in a first direction.

9. a readout circuit configured to read out signals from the pixel array via the signal lines; the additional bias circuit is disposed between the pixel array and the readout circuit; 9. The photoelectric conversion device according to claim 8.

10. The photoelectric conversion device according to claim 1 , a signal processing unit that processes a signal output from the photoelectric conversion device; A photoelectric conversion system comprising:

11. The photoelectric conversion device according to claim 1 , a distance information acquisition means for acquiring distance information to an object from distance measurement information based on a signal from the photoelectric conversion device, A moving body further comprising a control means for controlling the moving body based on the distance information.