Encoding method and device

Abstract

To provide a video decoding method.SOLUTION: An encoding method includes the steps of parsing a received bitstream to obtain CU prediction information, obtaining a target transform mode for the residual TU, parsing the received bitstream to obtain a transform coefficient of the residual TU, applying inverse quantization to the transform coefficient of the residual TU to obtain an inverse quantized coefficient, applying an inverse transform to the dequantized coefficient on the basis of the target transform mode to obtain a residual block of the residual TU, obtaining a prediction block of the CU on the basis of the prediction information, obtaining a video block on the basis of the residual block and the prediction block, and outputting a video sequence including a video frame containing the video block.SELECTED DRAWING: Figure 12

Description

[Technical field]

[0001] [Related Applications] This application claims priority to U.S. Patent Application No. 62 / 634,613, filed in the U.S. Patent Office on February 23, 2018, U.S. Patent Application No. 62 / 678,738, filed in the U.S. Patent Office on March 31, 2018, and U.S. Patent Application No. 62 / 572,987, filed in the U.S. Patent Office on October 16, 2017, and PCT / CN2018 / 102524, filed in the China Patent Office on August 27, 2018.

[0002] [Technical field] The present invention relates to the field of communications, and in particular to an encoding method and device. [Background technology]

[0003] The amount of video data required to render even a relatively short video can be substantial. This can pose challenges when the data is streamed or communicated across communication networks with limited bandwidth capabilities. Therefore, video data is typically compressed before being communicated across today's communication networks. When the video is stored on a storage device, the size of the video can also be an issue since memory resources may be limited. Video compression devices often use software and / or hardware to encode the video data at the source before transmission or storage, thereby reducing the amount of data required to represent a digital video image. The compressed data is then received at the destination by a video decompressor device, which decodes the video data.

[0004] With limited network resources and ever-increasing demand for higher video quality, improved compression and decompression techniques that increase compression ratios with little or no sacrifice in image quality are desirable. Summary of the Invention

[0005] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention provides an encoding method and apparatus capable of performing an appropriate quantization bit allocation for the spectral coefficients of an audio signal, thereby improving the quality of the signal obtained by the decoder upon decoding.

[0006] In order to achieve the aforementioned objectives, the following technical solutions are used in the embodiments of the present invention.

[0007] According to a first aspect, an embodiment of the present invention is a video decoding method, comprising: Parsing the received bitstream to obtain prediction information for a coding unit (CU); When the CU has only one residual transform unit (TU) and the size of the residual TU is smaller than the size of the CU, obtaining a target transform mode of the residual TU, where the target transform mode specifies a TU partition mode of the CU, a position of the residual TU, and a transform type of the residual TU; Parsing the received bitstream to obtain transform coefficients of the residual TU; applying inverse quantization to the transform coefficients of the residual TU to obtain inverse quantized coefficients; applying an inverse transform to the dequantized coefficients based on the target transform mode to obtain a residual block of the residual TU; obtaining a predicted block of the CU based on the prediction information; obtaining a video block based on the residual block and the prediction block; outputting a video sequence, the video sequence including video frames including the video blocks; The present invention provides a method comprising:

[0008] The target transform mode can specify the TU partition mode of a CU, the position of the residual TU, and the transform type of the residual, so that not only can the decoding efficiency be improved, but also the decoding quality can be improved; and the above-mentioned information can be specified for the target transform mode, thus reducing the bits required to transmit the above-mentioned information, and saving transmission resources, such as bandwidth, for transmitting encoded audio data.

[0009] In a first possible implementation method of the first aspect, the size of the CU is indicated by W×H, and the target transformation mode of the residual TU is one of the following modes: A transform mode Q0, in which the TU partition mode of the CU specifies that the CU is divided into four TUs of size (W / 2)×(H / 2), the position of the residual TU is the top left, and the transform type specifies that the horizontal transform of the residual TU is DCT-8 and the vertical transform of the residual TU is DCT-8; A transform mode Q1, in which the TU partition mode of the CU specifies that the CU is divided into four TUs of size (W / 2)×(H / 2), the position of the residual TU is in the upper right corner, and the transform type specifies that the horizontal transform of the residual TU is DST-7 and the vertical transform of the residual TU is DCT-8; A transform mode Q2, in which the TU partition mode of the CU specifies that the CU is divided into four TUs of size (W / 2)×(H / 2), the position of the residual TU is the bottom left, and the transform type specifies that the horizontal transform of the residual TU is DCT-8 and the vertical transform of the residual TU is DST-7; A transform mode Q3, in which the TU partition mode of the CU specifies that the CU is divided into four TUs of size (W / 2)×(H / 2), the position of the residual TU is at the bottom right, and the transform type specifies that the horizontal transform of the residual TU is DST-7 and the vertical transform of the residual TU is DST-7; A transform mode QH0, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, two of the three TUs are on the top and have a size of (W / 2)×(H / 2), and the other of the three TUs is on the bottom and has a size of W×(H / 2), the position of the residual TU is at the top left, and the transform type specifies that the horizontal transform of the residual TU is DCT-8 and the vertical transform of the residual TU is DCT-8; A transform mode QH1, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, two of the three TUs are on the top and have a size of (W / 2)×(H / 2), and the other of the three TUs is on the bottom and has a size of W×(H / 2), the position of the residual TU is on the top right, and the transform type specifies that the horizontal transform of the residual TU is DST-7 and the vertical transform of the residual TU is DCT-8; a transform mode QH2, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, two of the three TUs are at the bottom and have a size of (W / 2)×(H / 2), and the other of the three TUs is at the top and has a size of W×(H / 2), the position of the residual TU is at the bottom left, and the transform type specifies that the horizontal transform of the residual TU is DCT-8 and the vertical transform of the residual TU is DST-7; A transform mode QH3, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, two of the three TUs are at the bottom and have a size of (W / 2)×(H / 2), the other of the three TUs is at the top and has a size of W×(H / 2), the position of the residual TU is at the bottom right, and the transform type specifies that the horizontal transform of the residual TU is DST-7 and the vertical transform of the residual TU is DST-7; a transform mode QV0, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, two of the three TUs are on the left and have a size of (W / 2)×(H / 2), and the other of the three TUs is on the right and has a size of (W / 2)×H, the position of the residual TU is top-left, and the transform type specifies that the horizontal transform of the residual TU is DCT-8 and the vertical transform of the residual TU is DCT-8; a transform mode QV1, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, two of the three TUs are on the right and have a size (W / 2)×(H / 2), the other of the three TUs are on the left and have a size (W / 2)×H, the position of the residual TU is on the top right, and the transform type specifies that the horizontal transform of the residual TU is DST-7 and the vertical transform of the residual TU is DCT-8; a transform mode QV2, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, two of the three TUs are on the left and have a size (W / 2)×(H / 2), and the other of the three TUs are on the right and have a size (W / 2)×H, the position of the residual TU is at the bottom left, and the transform type specifies that the horizontal transform of the residual TU is DCT-8 and the vertical transform of the residual TU is DST-7; a transform mode QV3, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, two of the three TUs are on the right and have a size (W / 2)×(H / 2), and the other of the three TUs are on the left and have a size (W / 2)×H, the position of the residual TU is on the bottom right, and the transform type specifies that the horizontal transform of the residual TU is DST-7 and the vertical transform of the residual TU is DST-7; A transform mode HQ0, in which the TU partition mode of the CU specifies that the CU is divided into two TUs, the size of the upper TU is smaller than the size of the lower TU, the position of the residual TU is up, and the transform type specifies that the horizontal transform of the residual TU is DST-7 or DCT-2, and the vertical transform of the residual TU is DCT-8; A transform mode HQ1, in which the TU partition mode of the CU divides the CU into two TUs, the size of the lower UT is smaller than the size of the upper TU, the position of the residual TU is lower, and the transform type specifies that the horizontal transform of the residual TU is DST-7 or DCT-2, and the vertical transform of the residual TU is DST-7; A transform mode VQ0, in which the TU partition mode of the CU specifies that the CU is divided into two TUs, the size of the left TU is smaller than the size of the right TU, the position of the residual TU is left, and the transform type specifies that the horizontal transform of the residual TU is DCT-8, and the vertical transform of the residual TU is DCT-7 or DCT-2; A transform mode VQ1, in which the TU partition mode of the CU specifies that the CU is divided into two TUs, the size of the right TU is smaller than the size of the left TU, the position of the residual TU is right, and the transform type specifies that the horizontal transform of the residual TU is DST-7, and the vertical transform of the residual TU is DST-7 or DCT-2; a transform mode HH0, in which the TU partition mode of the CU specifies that the CU is divided into two TUs, the size of the upper TU is equal to the size of the lower TU, the position of the residual TU is up, and the transform type specifies that the horizontal transform of the residual TU is DCT-7 or DCT-2, and the vertical transform of the residual TU is DCT-8; a transform mode HH1, in which the TU partition mode of the CU specifies that the CU is divided into two TUs, the size of the upper TU is equal to the size of the lower TU, the position of the residual TU is lower, and the transform type specifies that the horizontal transform of the residual TU is DST-7 or DCT-2, and the vertical transform of the residual TU is DST-7; a transform mode HH2, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, a size of the upper TU is equal to a size of the lower TU, the size of the upper TU is smaller than a size of a middle TU, the position of the residual TU is the center, and the transform type specifies that the horizontal transform of the residual TU is DST-7 and the vertical transform of the residual TU is DCT-2, or the horizontal transform of the residual TU is DST-7 and the vertical transform of the residual TU is DST-1; a transform mode VH0, in which the TU partition mode of the CU specifies that the CU is divided into two TUs, the size of the left TU is equal to the size of the right TU, the position of the residual TU is left, and the transform type specifies that the horizontal transform of the residual TU is DCT-8, and the vertical transform of the residual TU is DCT-7 or DCT-2; A transform mode VH1, in which the TU partition mode of the CU specifies that the CU is divided into two TUs, the size of the left TU is equal to the size of the right TU, the position of the residual TU is right, and the transform type specifies that the horizontal transform of the residual TU is DST-7, and the vertical transform of the residual TU is DST-7 or DCT-2; or A transform mode VH2, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, the size of the left TU is equal to the size of the right TU, the size of the left TU is smaller than the size of the center TU, the position of the residual TU is center, and the transform type specifies that the horizontal transform of the residual TU is DCT-2 and the vertical transform of the residual TU is DST-7, or the horizontal transform of the residual TU is DST-1 and the vertical transform of the residual TU is DST-7; in alternative implementation methods, DST-7 may be replaced by DST-4 and DCT-8 may be replaced by DCT-4 throughout this disclosure. Thus, in another possible implementation method of the first aspect, the size of the CU is indicated by W×H, and the target transform mode of the residual TU is one of the following modes: A transform mode Q0, in which the TU partition mode of the CU specifies that the CU is divided into four TUs of size (W / 2)×(H / 2), the position of the residual TU is the top left, and the transform type specifies that the horizontal transform of the residual TU is DCT-4 and the vertical transform of the residual TU is DCT-4; A transform mode Q1, in which the TU partition mode of the CU specifies that the CU is divided into four TUs of size (W / 2)×(H / 2), the position of the residual TU is in the upper right corner, and the transform type specifies that the horizontal transform of the residual TU is DST-4 and the vertical transform of the residual TU is DCT-4; A transform mode Q2, in which the TU partition mode of the CU specifies that the CU is divided into four TUs of size (W / 2)×(H / 2), the position of the residual TU is the bottom left, and the transform type specifies that the horizontal transform of the residual TU is DCT-4 and the vertical transform of the residual TU is DST-4; A transform mode Q3, in which the TU partition mode of the CU specifies that the CU is divided into 4 TUs of size (W / 2)×(H / 2), the position of the residual TU is at the bottom right, and the transform type specifies that the horizontal transform of the residual TU is DST-4 and the vertical transform of the residual TU is DST-4; A transform mode QH0, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, two of the three TUs are on the top and have a size of (W / 2)×(H / 2), and the other of the three TUs are on the bottom and have a size of W×(H / 2), the position of the residual TU is at the top left, and the transform type specifies that the horizontal transform of the residual TU is DCT-4 and the vertical transform of the residual TU is DCT-4; A transform mode QH1, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, two of the three TUs are on the top and have a size of (W / 2)×(H / 2), and the other of the three TUs is on the bottom and has a size of W×(H / 2), the position of the residual TU is on the top right, and the transform type specifies that the horizontal transform of the residual TU is DST-4 and the vertical transform of the residual TU is DCT-4; a transform mode QH2, in which the TU partition mode of the CU divides the CU into three TUs, two of the three TUs are at the bottom and have a size of (W / 2)×(H / 2), the other of the three TUs is at the top and has a size of W×(H / 2), the position of the residual TU is at the bottom left, and the transform type specifies that the horizontal transform of the residual TU is DCT-4 and the vertical transform of the residual TU is DST-4; A transform mode QH3, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, two of the three TUs are at the bottom and have a size of (W / 2)×(H / 2), and the other of the three TUs is at the top and has a size of W×(H / 2), the position of the residual TU is at the bottom right, and the transform type specifies that the horizontal transform of the residual TU is DST-4 and the vertical transform of the residual TU is DST-4; a transform mode QV0, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, two of the three TUs are on the left and have a size of (W / 2)×(H / 2), and the other of the three TUs are on the right and have a size of (W / 2)×H, the position of the residual TU is at the top left, and the transform type specifies that the horizontal transform of the residual TU is DCT-4 and the vertical transform of the residual TU is DCT-4; a transform mode QV1, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, two of the three TUs are on the right and have a size (W / 2)×(H / 2), and the other of the three TUs are on the left and have a size (W / 2)×H, the position of the residual TU is on the top right, and the transform type specifies that the horizontal transform of the residual TU is DST-4 and the vertical transform of the residual TU is DCT-4; a transform mode QV2, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, two of the three TUs are on the left and have a size (W / 2)×(H / 2), and the other of the three TUs are on the right and have a size (W / 2)×H, the position of the residual TU is at the bottom left, and the transform type specifies that the horizontal transform of the residual TU is DCT-4 and the vertical transform of the residual TU is DST-4; a transform mode QV3, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, two of the three TUs are on the right and have a size (W / 2)×(H / 2), and the other of the three TUs are on the left and have a size (W / 2)×H, the position of the residual TU is on the bottom right, and the transform type specifies that the horizontal transform of the residual TU is DST-4 and the vertical transform of the residual TU is DST-4; A transform mode HQ0, in which the TU partition mode of the CU specifies that the CU is divided into two TUs, the size of the upper TU is smaller than the size of the lower TU, the position of the residual TU is up, and the transform type specifies that the horizontal transform of the residual TU is DST-4 or DCT-2, and the vertical transform of the residual TU is DCT-4; A transform mode HQ1, in which the TU partition mode of the CU divides the CU into two TUs, the size of the lower UT is smaller than the size of the upper TU, the position of the residual TU is lower, and the transform type specifies that the horizontal transform of the residual TU is DST-4 or DCT-2, and the vertical transform of the residual TU is DST-4; a transform mode VQ0, in which the TU partition mode of the CU specifies that the CU is divided into two TUs, the size of the left TU is smaller than the size of the right TU, the position of the residual TU is left, and the transform type specifies that the horizontal transform of the residual TU is DCT-4, and the vertical transform of the residual TU is DCT-4 or DCT-2; a transform mode VQ1, in which the TU partition mode of the CU specifies that the CU is divided into two TUs, the size of the right TU is smaller than the size of the left TU, the position of the residual TU is right, and the transform type specifies that the horizontal transform of the residual TU is DST-4, and the vertical transform of the residual TU is DST-4 or DCT-2; a transform mode HH0, in which the TU partition mode of the CU specifies that the CU is divided into two TUs, the size of the upper TU is equal to the size of the lower TU, the position of the residual TU is up, and the transform type specifies that the horizontal transform of the residual TU is DCT-4 or DCT-2, and the vertical transform of the residual TU is DCT-4; a transform mode HH1, in which the TU partition mode of the CU specifies that the CU is divided into two TUs, the size of the upper TU is equal to the size of the lower TU, the position of the residual TU is lower, and the transform type specifies that the horizontal transform of the residual TU is DST-4 or DCT-2, and the vertical transform of the residual TU is DST-4; a transform mode HH2, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, a size of the upper TU is equal to a size of the lower TU, the size of the upper TU is smaller than a size of a middle TU, the position of the residual TU is the center, and the transform type specifies that the horizontal transform of the residual TU is DST-4 and the vertical transform of the residual TU is DCT-2, or the horizontal transform of the residual TU is DST-4 and the vertical transform of the residual TU is DST-1; a transform mode VH0, in which the TU partition mode of the CU specifies that the CU is divided into two TUs, the size of the left TU is equal to the size of the right TU, the position of the residual TU is left, and the transform type specifies that the horizontal transform of the residual TU is DCT-4, and the vertical transform of the residual TU is DCT-4 or DCT-2; A transform mode VH1, in which the TU partition mode of the CU specifies that the CU is divided into two TUs, the size of the left TU is equal to the size of the right TU, the position of the residual TU is right, and the transform type specifies that the horizontal transform of the residual TU is DST-4, and the vertical transform of the residual TU is DST-4 or DCT-2; or A mode that specifies that the transform mode is VH2, the TU partition mode of the CU divides the CU into three TUs, the size of the left TU is equal to the size of the right TU, the size of the left TU is smaller than the size of the center TU, the position of the residual TU is center, and the transform type is that the horizontal transform of the residual TU is DCT-2 and the vertical transform of the residual TU is DST-4, or the horizontal transform of the residual TU is DST-1 and the vertical transform of the residual TU is DST-4.

[0010] With reference to the first aspect or the first possible implementation method of the first aspect, in a second possible implementation method, the step of obtaining the target transformation mode of the residual TU includes: Parsing the bitstream to obtain a mode index indicating the target transform mode of the residual TU; and obtaining the target transformation mode of the residual TU based on the mode index.

[0011] The target transform mode can be indexed by the mode index, thus improving the decoding efficiency as only one index needs to be obtained.

[0012] With reference to the second possible implementation method of the first aspect, in a third possible implementation method, before the step of parsing the bitstream to obtain a mode index indicating the target transform mode of the residual TU, the method includes: determining a candidate target transformation mode for the residual TU based on a size of the CU; The step of parsing the bitstream to obtain a mode index indicating the target transform mode of the residual TU includes: The method includes parsing the bitstream to obtain a mode index indicating the target transformation mode of the residual TU based on the candidate target transformation modes of the residual TU.

[0013] Determining the candidate target transform modes can reduce the number of candidate target transform modes for the residual TU, thereby reducing the bits required to transmit the mode index.

[0014] With reference to the third possible implementation method of the first aspect, in a fourth possible implementation method, the step of determining a candidate target transformation mode of the residual TU based on a size of the CU includes at least one of the following: When the width of the CU is in the range of [Th1×2, Th3] and the height of the CU is in the range of [Th1×2, Th3], the candidate target transformation modes include transformation mode Q0, transformation mode Q1, transformation mode Q2, and transformation mode Q3; When the width of the CU is in the range of [Th1×4, Th3] and the height of the CU is in the range of [Th1, Th2], the candidate target transformation modes include a transformation mode VQ0, a transformation mode VQ1, and a transformation mode VH2; When the width of the CU is in the range of [Th1×2, Th2] and the height of the CU is in the range of [Th1, Th2], the candidate target transformation modes include a transformation mode VH0 and a transformation mode VH1; When the height of the CU is in the range of [Th1×4,Th3] and the width of the CU is in the range of [Th1,Th2], the candidate target transformation modes include a transformation mode HQ0, a transformation mode HQ1, and a transformation mode HH2; When the height of the CU is in the range of [Th1×2, Th2] and the width of the CU is in the range of [Th1, Th2], the candidate target transformation modes include a transformation mode HH0 and a transformation mode HH1; When the width of the CU is in the range of [Th1×2, Th2] and the height of the CU is in the range of [Th1×2, Th2], the candidate target transformation modes include transformation mode Q0, transformation mode Q1, transformation mode Q2, and transformation mode Q3; When the width of the CU is in the range of [Th1×4, Th2] and the height of the CU is in the range of [Th1, Th2], the candidate target transformation modes include a transformation mode VQ0, a transformation mode VQ1, and a transformation mode VH2; When the width of the CU is in the range of [Th1×2, Th2] and the height of the CU is in the range of [Th1, Th2], the candidate target transformation modes include a transformation mode VH0 and a transformation mode VH1; When the height of the CU is in the range of [Th1×4,Th2] and the width of the CU is in the range of [Th1,Th2], the candidate target transformation modes include a transformation mode HQ0, a transformation mode HQ1, and a transformation mode HH2; or When the height of the CU is in the range of [Th1×2, Th2] and the width of the CU is in the range of [Th1, Th2], the candidate target transformation modes include a transformation mode HH0 and a transformation mode HH1; Th1, Th2, and Th3 are predetermined integer values.

[0015] With reference to the first aspect or the first possible implementation method of the first aspect, in a fifth possible implementation method, the step of obtaining the target transformation mode of the residual TU includes: Parsing the bitstream to obtain a group index indicating a mode group to which the target conversion mode belongs; parsing the bitstream to obtain a mode index indicating the target conversion mode within the mode group; obtaining the target transformation mode according to the group index and the mode index; Includes.

[0016] The transform modes are pre-grouped, and thus the number of transform modes suitable for one CU can be reduced, which not only improves the decoding efficiency but also saves transmission resources.

[0017] With reference to the fifth possible implementation method of the first aspect, in a sixth possible implementation method, the target conversion mode belongs to any one of the following mode groups: a mode group including conversion mode HH0, conversion mode HH1, conversion mode HH2, conversion mode VH0, conversion mode VH1, and conversion mode VH2; a mode group including conversion mode Q0, conversion mode Q1, conversion mode Q2, conversion mode Q3, conversion mode HQ0, conversion mode HQ1, conversion mode VQ0, and conversion mode VQ1; A mode group including conversion modes HH0, HH1, HH2, VH0, VH1, and VH2; a mode group including conversion mode Q0, conversion mode Q1, conversion mode Q2, conversion mode Q3, conversion mode HQ0, conversion mode HQ1, conversion mode VQ0, and conversion mode VQ1; a mode group including conversion mode QH0, conversion mode QH1, conversion mode QH2, conversion mode QH3, conversion mode HQ0, conversion mode HQ1, conversion mode VQ0, and conversion mode VQ1; a mode group including conversion mode QV0, conversion mode QV1, conversion mode QV2, conversion mode QV3, conversion mode HQ0, conversion mode HQ1, conversion mode VQ0, and conversion mode VQ1; a mode group including conversion mode Q0, conversion mode Q1, conversion mode Q2, conversion mode Q3, conversion mode HQ0, conversion mode HQ1, conversion mode VQ0, conversion mode VQ1, conversion mode HH0, conversion mode HH1, conversion mode VH0, and conversion mode VH1; a mode group including conversion mode Q0, conversion mode Q1, conversion mode Q2, conversion mode Q3, conversion mode HQ0, conversion mode HQ1, conversion mode VQ0, conversion mode VQ1, conversion mode HH0, conversion mode HH1, conversion mode HH2, conversion mode VH0, conversion mode VH1, and conversion mode VH2; a mode group including conversion mode QH0, conversion mode QH1, conversion mode QH2, conversion mode QH3, conversion mode HQ0, conversion mode HQ1, conversion mode VQ0, conversion mode VQ1, conversion mode HH0, conversion mode HH1, conversion mode HH2, conversion mode VH0, conversion mode VH1, and conversion mode VH2; a mode group including conversion mode HH0, conversion mode HH1, conversion mode VH0, and conversion mode VH1; a mode group including conversion mode Q0, conversion mode Q1, conversion mode Q2, and conversion mode Q3; or A mode group including conversion mode HQ0, conversion mode HQ1, conversion mode VQ0, and conversion mode VQ1.

[0018] With reference to the fifth possible implementation method of the first aspect, in a seventh possible implementation method, before the step of parsing the bitstream to obtain a group index indicating a mode group to which the target conversion mode belongs, the method further comprises: determining at least one candidate mode group for the residual TU based on a size of the CU; The step of parsing the bitstream to obtain a group index indicating a mode group to which the target conversion mode belongs includes: The method includes parsing the bitstream based on the at least one candidate mode group of the residual TU to obtain a group index indicating a mode group to which the target transform mode belongs.

[0019] Determining the candidate target transform modes can reduce the number of candidate target transform modes for the residual TU, thereby reducing the bits required to transmit the mode index.

[0020] With reference to the seventh possible implementation method of the first aspect, in an eighth possible implementation method, the step of determining at least one candidate mode group for the residual TU based on a size of the CU includes at least one of the following: When the width of the CU is in the range of [Th1×2, Th3] and the height of the CU is in the range of [Th1×2, Th3], the candidate mode group includes a mode group including a transformation mode Q0, a transformation mode Q1, a transformation mode Q2, and a transformation mode Q3; When the width of the CU is in the range of [Th1×4, Th3] and the height of the CU is in the range of [Th1, Th2], the candidate mode group includes a mode group including a transformation mode VQ0, a transformation mode VQ1, and a transformation mode VH2; When the width of the CU is in the range of [Th1×2, Th2] and the height of the CU is in the range of [Th1, Th2], the candidate mode group includes a mode group including a transformation mode VH0 and a transformation mode VH1; When the height of the CU is in the range of [Th1×4, Th3] and the width of the CU is in the range of [Th1, Th2], the candidate mode group includes a mode group including a transformation mode HQ0, a transformation mode HQ1, and a transformation mode HH2; When the height of the CU is in the range of [Th1×2, Th2] and the width of the CU is in the range of [Th1, Th2], the candidate mode group includes a mode group including a transformation mode HH0 and a transformation mode HH1; When the width of the CU is in the range of [Th1×2, Th2] and the height of the CU is in the range of [Th1×2, Th2], the candidate mode group includes a mode group including a transformation mode Q0, a transformation mode Q1, a transformation mode Q2, and a transformation mode Q3; When the width of the CU is in the range of [Th1×4, Th2] and the height of the CU is in the range of [Th1, Th2], the candidate mode group includes a mode group including a transformation mode VQ0, a transformation mode VQ1, and a transformation mode VH2; When the width of the CU is in the range of [Th1×2, Th2] and the height of the CU is in the range of [Th1, Th2], the candidate mode group includes a mode group including a transformation mode VH0 and a transformation mode VH1; When the height of the CU is in the range of [Th1×4,Th2] and the width of the CU is in the range of [Th1,Th2], the candidate mode group includes a mode group including a transformation mode HQ0, a transformation mode HQ1, and a transformation mode HH2; or When the height of the CU is in the range of [Th1×2, Th2] and the width of the CU is in the range of [Th1, Th2], the candidate mode group includes a mode group including a transformation mode HH0 and a transformation mode HH1; Th1, Th2, and Th3 are predetermined integer values.

[0021] With reference to the fourth possible implementation method or the eighth possible implementation method of the first aspect, in a ninth possible implementation method, Th1 is 4, 8, or 16, Th2 is 32, 64, or 128, or Th3 is 64, 128, or 256.

[0022] With reference to the first aspect or any of the first to ninth possible implementation methods of the first aspect, in a tenth possible implementation method, before the step of obtaining the target transformation mode of the residual TU, the method further includes a step of determining whether to obtain the target transformation mode of the residual TU based on the prediction information of the CU.

[0023] With reference to the tenth possible implementation method of the first aspect, in an eleventh possible implementation method, the step of determining whether to obtain the target transformation mode of the residual TU based on the prediction information of the CU includes at least one of the following: determining, when a prediction mode of the CU is an intra prediction mode, to obtain the target transformation mode of the residual TU; determining, when a prediction mode of the CU is an inter prediction mode, to obtain the target transformation mode of the residual TU; determining to obtain the target transformation mode of the residual TU when the prediction method of the CU is a preset positive prediction method; or determining not to obtain the target transformation mode of the residual TU when the prediction method of the CU is a preset negative prediction method;

[0024] With reference to the eleventh possible implementation method of the first aspect, in a twelfth possible implementation method, the preset positive prediction method includes the following: A motion compensation method based on a translational model; Merge prediction methods; An advanced motion vector prediction method with 1 / 4-pel motion vector difference prediction; or Merge prediction methods with merge index less than 2; Includes at least one of the following:

[0025] With reference to the eleventh or twelfth possible implementation method of the first aspect, in a thirteenth possible implementation method, the preset negative prediction method includes the following: Affine model based motion compensation method; Affine merge prediction method; Affine inter prediction mode; Advanced motion vector prediction methods with 1-pel or 4-pel motion vector difference accuracy; or Merge prediction method with merge index not less than 2; Includes at least one of the following:

[0026] With reference to the first aspect or any of the first to thirteenth possible implementation methods of the first aspect, in a fourteenth possible implementation method, before the step of obtaining the target transformation mode of the residual TU, the method further includes a step of determining whether to obtain the target transformation mode of the residual TU based on the size of the CU.

[0027] With reference to the fourteenth possible implementation method of the first aspect, in a fifteenth possible implementation method, the step of determining whether to obtain the target transformation mode of the residual TU based on the size of the CU includes at least one of the following: determining not to obtain the target transformation mode of the residual TU when the width or height of the CU is greater than a preset CU threshold; determining not to obtain the target transformation mode of the residual TU when the width or height of the TU of the CU is smaller than a preset minimum TU threshold; or When the width or height of a TU of the CU is greater than a preset maximum TU threshold, it is determined not to obtain the target transformation mode of the residual TU.

[0028] With reference to the 15th possible implementation method of the first aspect, in a 16th possible implementation method, the preset CU threshold is 32 luma pixels, 64 luma pixels, or 128 luma pixels, or the preset minimum TU threshold is 4 luma pixels, 8 luma pixels, or 16 luma pixels, or the preset maximum TU threshold is 32 luma pixels, 64 luma pixels, or 128 luma pixels.

[0029] According to a second aspect, an embodiment of the present invention is a video decoder comprising: an entropy decoding unit configured to parse a received bitstream to obtain prediction information of a coding unit (CU); when a residual transform unit (TU) is only a residual TU of the CU and the size of the residual TU is smaller than the size of the CU, obtain a target transform mode of the residual TU, where the target transform mode specifies a TU partition mode of the CU, a position of the residual TU, and a transform type of the residual TU; and parse the received bitstream to obtain transform coefficients of the residual TU. an inverse quantization processing unit configured to apply inverse quantization to the transform coefficients of the residual TU to obtain inverse quantized coefficients; an inverse transform processing unit configured to apply an inverse transform to the dequantized coefficients based on the target transform mode to obtain a residual block of the residual TU; A prediction processing unit configured to obtain a prediction block of the CU based on the prediction information; a reconstruction unit configured to obtain a video block based on the residual block and the prediction block; an output configured to output a video sequence, the video sequence including a video frame including the video block; and The present invention provides a video decoder including:

[0030] In a first possible implementation method of the second aspect, the size of the CU is indicated by W×H, and the target transformation mode of the residual TU is one of the following modes: A transform mode Q0, in which the TU partition mode of the CU specifies that the CU is divided into four TUs of size (W / 2)×(H / 2), the position of the residual TU is the top left, and the transform type specifies that the horizontal transform of the residual TU is DCT-8 and the vertical transform of the residual TU is DCT-8; A transform mode Q1, in which the TU partition mode of the CU specifies that the CU is divided into four TUs of size (W / 2)×(H / 2), the position of the residual TU is in the upper right corner, and the transform type specifies that the horizontal transform of the residual TU is DST-7 and the vertical transform of the residual TU is DCT-8; A transform mode Q2, in which the TU partition mode of the CU specifies that the CU is divided into four TUs of size (W / 2)×(H / 2), the position of the residual TU is the bottom left, and the transform type specifies that the horizontal transform of the residual TU is DCT-8 and the vertical transform of the residual TU is DST-7; A transform mode Q3, in which the TU partition mode of the CU specifies that the CU is divided into four TUs of size (W / 2)×(H / 2), the position of the residual TU is at the bottom right, and the transform type specifies that the horizontal transform of the residual TU is DST-7 and the vertical transform of the residual TU is DST-7; A transform mode QH0, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, two of the three TUs are on the top and have a size of (W / 2)×(H / 2), and the other of the three TUs is on the bottom and has a size of W×(H / 2), the position of the residual TU is at the top left, and the transform type specifies that the horizontal transform of the residual TU is DCT-8 and the vertical transform of the residual TU is DCT-8; A transform mode QH1, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, two of the three TUs are on the top and have a size of (W / 2)×(H / 2), and the other of the three TUs is on the bottom and has a size of W×(H / 2), the position of the residual TU is on the top right, and the transform type specifies that the horizontal transform of the residual TU is DST-7 and the vertical transform of the residual TU is DCT-8; a transform mode QH2, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, two of the three TUs are at the bottom and have a size of (W / 2)×(H / 2), and the other of the three TUs is at the top and has a size of W×(H / 2), the position of the residual TU is at the bottom left, and the transform type specifies that the horizontal transform of the residual TU is DCT-8 and the vertical transform of the residual TU is DST-7; A transform mode QH3, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, two of the three TUs are at the bottom and have a size of (W / 2)×(H / 2), the other of the three TUs is at the top and has a size of W×(H / 2), the position of the residual TU is at the bottom right, and the transform type specifies that the horizontal transform of the residual TU is DST-7 and the vertical transform of the residual TU is DST-7; a transform mode QV0, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, two of the three TUs are on the left and have a size of (W / 2)×(H / 2), and the other of the three TUs is on the right and has a size of (W / 2)×H, the position of the residual TU is top-left, and the transform type specifies that the horizontal transform of the residual TU is DCT-8 and the vertical transform of the residual TU is DCT-8; a transform mode QV1, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, two of the three TUs are on the right and have a size (W / 2)×(H / 2), the other of the three TUs are on the left and have a size (W / 2)×H, the position of the residual TU is on the top right, and the transform type specifies that the horizontal transform of the residual TU is DST-7 and the vertical transform of the residual TU is DCT-8; a transform mode QV2, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, two of the three TUs are on the left and have a size (W / 2)×(H / 2), and the other of the three TUs are on the right and have a size (W / 2)×H, the position of the residual TU is at the bottom left, and the transform type specifies that the horizontal transform of the residual TU is DCT-8 and the vertical transform of the residual TU is DST-7; a transform mode QV3, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, two of the three TUs are on the right and have a size (W / 2)×(H / 2), and the other of the three TUs are on the left and have a size (W / 2)×H, the position of the residual TU is on the bottom right, and the transform type specifies that the horizontal transform of the residual TU is DST-7 and the vertical transform of the residual TU is DST-7; A transform mode HQ0, in which the TU partition mode of the CU specifies that the CU is divided into two TUs, the size of the upper TU is smaller than the size of the lower TU, the position of the residual TU is up, and the transform type specifies that the horizontal transform of the residual TU is DST-7 or DCT-2, and the vertical transform of the residual TU is DCT-8; A transform mode HQ1, in which the TU partition mode of the CU divides the CU into two TUs, the size of the lower UT is smaller than the size of the upper TU, the position of the residual TU is lower, and the transform type specifies that the horizontal transform of the residual TU is DST-7 or DCT-2, and the vertical transform of the residual TU is DST-7; A transform mode VQ0, in which the TU partition mode of the CU specifies that the CU is divided into two TUs, the size of the left TU is smaller than the size of the right TU, the position of the residual TU is left, and the transform type specifies that the horizontal transform of the residual TU is DCT-8, and the vertical transform of the residual TU is DCT-7 or DCT-2; A transform mode VQ1, in which the TU partition mode of the CU specifies that the CU is divided into two TUs, the size of the right TU is smaller than the size of the left TU, the position of the residual TU is right, and the transform type specifies that the horizontal transform of the residual TU is DST-7, and the vertical transform of the residual TU is DST-7 or DCT-2; a transform mode HH0, in which the TU partition mode of the CU specifies that the CU is divided into two TUs, the size of the upper TU is equal to the size of the lower TU, the position of the residual TU is up, and the transform type specifies that the horizontal transform of the residual TU is DCT-7 or DCT-2, and the vertical transform of the residual TU is DCT-8; a transform mode HH1, in which the TU partition mode of the CU specifies that the CU is divided into two TUs, the size of the upper TU is equal to the size of the lower TU, the position of the residual TU is lower, and the transform type specifies that the horizontal transform of the residual TU is DST-7 or DCT-2, and the vertical transform of the residual TU is DST-7; a transform mode HH2, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, a size of the upper TU is equal to a size of the lower TU, the size of the upper TU is smaller than a size of a middle TU, the position of the residual TU is the center, and the transform type specifies that the horizontal transform of the residual TU is DST-7 and the vertical transform of the residual TU is DCT-2, or the horizontal transform of the residual TU is DST-7 and the vertical transform of the residual TU is DST-1; a transform mode VH0, in which the TU partition mode of the CU specifies that the CU is divided into two TUs, the size of the left TU is equal to the size of the right TU, the position of the residual TU is left, and the transform type specifies that the horizontal transform of the residual TU is DCT-8, and the vertical transform of the residual TU is DCT-7 or DCT-2; A transform mode VH1, in which the TU partition mode of the CU specifies that the CU is divided into two TUs, the size of the left TU is equal to the size of the right TU, the position of the residual TU is right, and the transform type specifies that the horizontal transform of the residual TU is DST-7, and the vertical transform of the residual TU is DST-7 or DCT-2; or a transform mode VH2, a transform mode HH2, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, a size of the left TU is equal to a size of the right TU, the size of the left TU is smaller than a size of the center TU, the position of the residual TU is the center, and the transform type specifies that the horizontal transform of the residual TU is DCT-2 and the vertical transform of the residual TU is DST-7, or the horizontal transform of the residual TU is DST-1 and the vertical transform of the residual TU is DST-7; In alternative implementations, DST-7 may be replaced by DST-4 and DCT-8 may be replaced by DCT-4 throughout this disclosure. Thus, in another possible implementation of the second aspect, the size of the CU is indicated by W×H, and the target transform mode of the residual TU is one of the following modes: A transform mode Q0, in which the TU partition mode of the CU specifies that the CU is divided into four TUs of size (W / 2)×(H / 2), the position of the residual TU is the top left, and the transform type specifies that the horizontal transform of the residual TU is DCT-4 and the vertical transform of the residual TU is DCT-4; A transform mode Q1, in which the TU partition mode of the CU specifies that the CU is divided into four TUs of size (W / 2)×(H / 2), the position of the residual TU is in the upper right corner, and the transform type specifies that the horizontal transform of the residual TU is DST-4 and the vertical transform of the residual TU is DCT-4; A transform mode Q2, in which the TU partition mode of the CU specifies that the CU is divided into four TUs of size (W / 2)×(H / 2), the position of the residual TU is the bottom left, and the transform type specifies that the horizontal transform of the residual TU is DCT-4 and the vertical transform of the residual TU is DST-4; A transform mode Q3, in which the TU partition mode of the CU specifies that the CU is divided into 4 TUs of size (W / 2)×(H / 2), the position of the residual TU is at the bottom right, and the transform type specifies that the horizontal transform of the residual TU is DST-4 and the vertical transform of the residual TU is DST-4; A transform mode QH0, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, two of the three TUs are on the top and have a size of (W / 2)×(H / 2), and the other of the three TUs are on the bottom and have a size of W×(H / 2), the position of the residual TU is at the top left, and the transform type specifies that the horizontal transform of the residual TU is DCT-4 and the vertical transform of the residual TU is DCT-4; A transform mode QH1, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, two of the three TUs are on the top and have a size of (W / 2)×(H / 2), and the other of the three TUs is on the bottom and has a size of W×(H / 2), the position of the residual TU is on the top right, and the transform type specifies that the horizontal transform of the residual TU is DST-4 and the vertical transform of the residual TU is DCT-4; a transform mode QH2, in which the TU partition mode of the CU divides the CU into three TUs, two of the three TUs are at the bottom and have a size of (W / 2)×(H / 2), the other of the three TUs is at the top and has a size of W×(H / 2), the position of the residual TU is at the bottom left, and the transform type specifies that the horizontal transform of the residual TU is DCT-4 and the vertical transform of the residual TU is DST-4; A transform mode QH3, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, two of the three TUs are at the bottom and have a size of (W / 2)×(H / 2), and the other of the three TUs is at the top and has a size of W×(H / 2), the position of the residual TU is at the bottom right, and the transform type specifies that the horizontal transform of the residual TU is DST-4 and the vertical transform of the residual TU is DST-4; a transform mode QV0, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, two of the three TUs are on the left and have a size of (W / 2)×(H / 2), and the other of the three TUs are on the right and have a size of (W / 2)×H, the position of the residual TU is at the top left, and the transform type specifies that the horizontal transform of the residual TU is DCT-4 and the vertical transform of the residual TU is DCT-4; a transform mode QV1, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, two of the three TUs are on the right and have a size (W / 2)×(H / 2), and the other of the three TUs are on the left and have a size (W / 2)×H, the position of the residual TU is on the top right, and the transform type specifies that the horizontal transform of the residual TU is DST-4 and the vertical transform of the residual TU is DCT-4; a transform mode QV2, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, two of the three TUs are on the left and have a size (W / 2)×(H / 2), and the other of the three TUs are on the right and have a size (W / 2)×H, the position of the residual TU is at the bottom left, and the transform type specifies that the horizontal transform of the residual TU is DCT-4 and the vertical transform of the residual TU is DST-4; a transform mode QV3, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, two of the three TUs are on the right and have a size (W / 2)×(H / 2), and the other of the three TUs are on the left and have a size (W / 2)×H, the position of the residual TU is on the bottom right, and the transform type specifies that the horizontal transform of the residual TU is DST-4 and the vertical transform of the residual TU is DST-4; A transform mode HQ0, in which the TU partition mode of the CU specifies that the CU is divided into two TUs, the size of the upper TU is smaller than the size of the lower TU, the position of the residual TU is up, and the transform type specifies that the horizontal transform of the residual TU is DST-4 or DCT-2, and the vertical transform of the residual TU is DCT-4; A transform mode HQ1, in which the TU partition mode of the CU divides the CU into two TUs, the size of the lower UT is smaller than the size of the upper TU, the position of the residual TU is lower, and the transform type specifies that the horizontal transform of the residual TU is DST-4 or DCT-2, and the vertical transform of the residual TU is DST-4; a transform mode VQ0, in which the TU partition mode of the CU specifies that the CU is divided into two TUs, the size of the left TU is smaller than the size of the right TU, the position of the residual TU is left, and the transform type specifies that the horizontal transform of the residual TU is DCT-4, and the vertical transform of the residual TU is DCT-4 or DCT-2; a transform mode VQ1, in which the TU partition mode of the CU specifies that the CU is divided into two TUs, the size of the right TU is smaller than the size of the left TU, the position of the residual TU is right, and the transform type specifies that the horizontal transform of the residual TU is DST-4, and the vertical transform of the residual TU is DST-4 or DCT-2; a transform mode HH0, in which the TU partition mode of the CU specifies that the CU is divided into two TUs, the size of the upper TU is equal to the size of the lower TU, the position of the residual TU is up, and the transform type specifies that the horizontal transform of the residual TU is DCT-4 or DCT-2, and the vertical transform of the residual TU is DCT-4; a transform mode HH1, in which the TU partition mode of the CU specifies that the CU is divided into two TUs, the size of the upper TU is equal to the size of the lower TU, the position of the residual TU is lower, and the transform type specifies that the horizontal transform of the residual TU is DST-4 or DCT-2, and the vertical transform of the residual TU is DST-4; a transform mode HH2, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, a size of the upper TU is equal to a size of the lower TU, the size of the upper TU is smaller than a size of a middle TU, the position of the residual TU is the center, and the transform type specifies that the horizontal transform of the residual TU is DST-4 and the vertical transform of the residual TU is DCT-2, or the horizontal transform of the residual TU is DST-4 and the vertical transform of the residual TU is DST-1; a transform mode VH0, in which the TU partition mode of the CU specifies that the CU is divided into two TUs, the size of the left TU is equal to the size of the right TU, the position of the residual TU is left, and the transform type specifies that the horizontal transform of the residual TU is DCT-4, and the vertical transform of the residual TU is DCT-7 or DCT-2; A transform mode VH1, in which the TU partition mode of the CU specifies that the CU is divided into two TUs, the size of the left TU is equal to the size of the right TU, the position of the residual TU is right, and the transform type specifies that the horizontal transform of the residual TU is DST-4, and the vertical transform of the residual TU is DST-7 or DCT-2; or a transform mode VH2, a transform mode HH2, in which the TU partition mode of the CU specifies that the CU is divided into three TUs, a size of the left TU is equal to a size of the right TU, the size of the left TU is smaller than a size of the center TU, the position of the residual TU is the center, and the transform type specifies that the horizontal transform of the residual TU is DCT-2 and the vertical transform of the residual TU is DST-4, or the horizontal transform of the residual TU is DST-1 and the vertical transform of the residual TU is DST-4;

[0031] With reference to the first possible implementation method of the first aspect or the second aspect, in a second possible implementation method, the entropy decoding unit: Parsing the bitstream to obtain a mode index indicating the target transform mode of the residual TU; The transform mode selector 200 is further configured to obtain the target transform mode of the residual TU based on the mode index.

[0032] With reference to the second possible implementation method of the second aspect, in a third possible implementation method, the entropy decoding unit determines a candidate target transformation mode of the residual TU based on a size of the CU; The method is configured to parse the bitstream based on the candidate target transformation modes of the residual TU to obtain a mode index indicating the target transformation mode of the residual TU.

[0033] With reference to the third possible implementation method of the second aspect, in a fourth possible implementation method, the entropy decoding unit is further configured to determine a candidate target transformation mode of the residual TU according to at least one of the following: When the width of the CU is in the range of [Th1×2, Th3] and the height of the CU is in the range of [Th1×2, Th3], the candidate target transformation modes include transformation mode Q0, transformation mode Q1, transformation mode Q2, and transformation mode Q3; When the width of the CU is in the range of [Th1×4, Th3] and the height of the CU is in the range of [Th1, Th2], the candidate target transformation modes include a transformation mode VQ0, a transformation mode VQ1, and a transformation mode VH2; When the width of the CU is in the range of [Th1×2, Th2] and the height of the CU is in the range of [Th1, Th2], the candidate target transformation modes include a transformation mode VH0 and a transformation mode VH1; When the height of the CU is in the range of [Th1×4,Th3] and the width of the CU is in the range of [Th1,Th2], the candidate target transformation modes include a transformation mode HQ0, a transformation mode HQ1, and a transformation mode HH2; When the height of the CU is in the range of [Th1×2, Th2] and the width of the CU is in the range of [Th1, Th2], the candidate target transformation modes include a transformation mode HH0 and a transformation mode HH1; When the width of the CU is in the range of [Th1×2, Th2] and the height of the CU is in the range of [Th1×2, Th2], the candidate target transformation modes include transformation mode Q0, transformation mode Q1, transformation mode Q2, and transformation mode Q3; When the width of the CU is in the range of [Th1×4, Th2] and the height of the CU is in the range of [Th1, Th2], the candidate target transformation modes include a transformation mode VQ0, a transformation mode VQ1, and a transformation mode VH2; When the width of the CU is in the range of [Th1×2, Th2] and the height of the CU is in the range of [Th1, Th2], the candidate target transformation modes include a transformation mode VH0 and a transformation mode VH1; When the height of the CU is in the range of [Th1×4,Th2] and the width of the CU is in the range of [Th1,Th2], the candidate target transformation modes include a transformation mode HQ0, a transformation mode HQ1, and a transformation mode HH2; or When the height of the CU is in the range of [Th1×2, Th2] and the width of the CU is in the range of [Th1, Th2], the candidate target transformation modes include a transformation mode HH0 and a transformation mode HH1; Th1, Th2, and Th3 are predetermined integer values.

[0034] With reference to the second aspect or the first possible implementation method of the second aspect, in a fifth possible implementation method, the entropy decoding unit: Parsing the bitstream to obtain a group index indicating a mode group to which the target conversion mode belongs; Parsing the bitstream to obtain a mode index indicating the target conversion mode within the mode group; The method is further configured to obtain the target transformation mode based on the group index and the mode index.

[0035] With reference to the fifth possible implementation method of the second aspect, in a sixth possible implementation method, the target conversion mode belongs to any one of the following mode groups: a mode group including conversion mode HH0, conversion mode HH1, conversion mode HH2, conversion mode VH0, conversion mode VH1, and conversion mode VH2; a mode group including conversion mode Q0, conversion mode Q1, conversion mode Q2, conversion mode Q3, conversion mode HQ0, conversion mode HQ1, conversion mode VQ0, and conversion mode VQ1; A mode group including conversion modes HH0, HH1, HH2, VH0, VH1, and VH2; a mode group including conversion mode Q0, conversion mode Q1, conversion mode Q2, conversion mode Q3, conversion mode HQ0, conversion mode HQ1, conversion mode VQ0, and conversion mode VQ1; a mode group including conversion mode QH0, conversion mode QH1, conversion mode QH2, conversion mode QH3, conversion mode HQ0, conversion mode HQ1, conversion mode VQ0, and conversion mode VQ1; a mode group including conversion mode QV0, conversion mode QV1, conversion mode QV2, conversion mode QV3, conversion mode HQ0, conversion mode HQ1, conversion mode VQ0, and conversion mode VQ1; a mode group including conversion mode Q0, conversion mode Q1, conversion mode Q2, conversion mode Q3, conversion mode HQ0, conversion mode HQ1, conversion mode VQ0, conversion mode VQ1, conversion mode HH0, conversion mode HH1, conversion mode VH0, and conversion mode VH1; a mode group including conversion mode Q0, conversion mode Q1, conversion mode Q2, conversion mode Q3, conversion mode HQ0, conversion mode HQ1, conversion mode VQ0, conversion mode VQ1, conversion mode HH0, conversion mode HH1, conversion mode HH2, conversion mode VH0, conversion mode VH1, and conversion mode VH2; a mode group including conversion mode QH0, conversion mode QH1, conversion mode QH2, conversion mode QH3, conversion mode HQ0, conversion mode HQ1, conversion mode VQ0, conversion mode VQ1, conversion mode HH0, conversion mode HH1, conversion mode HH2, conversion mode VH0, conversion mode VH1, and conversion mode VH2; a mode group including conversion mode HH0, conversion mode HH1, conversion mode VH0, and conversion mode VH1; a mode group including conversion mode Q0, conversion mode Q1, conversion mode Q2, and conversion mode Q3; or A mode group including conversion mode HQ0, conversion mode HQ1, conversion mode VQ0, and conversion mode VQ1.

[0036] With reference to the fifth possible implementation method of the second aspect, in a seventh possible implementation method, the entropy decoding unit: determining at least one candidate mode group for the residual TU based on a size of the CU; The bitstream may be further configured to parse the bitstream based on the at least one candidate mode group of the residual TU to obtain a group index indicating a mode group to which the target transform mode belongs.

[0037] With reference to the seventh possible implementation method of the second aspect, in an eighth possible implementation method, the entropy decoding unit is further configured to determine at least one candidate mode group according to at least one of the following: When the width of the CU is in the range of [Th1×2, Th3] and the height of the CU is in the range of [Th1×2, Th3], the candidate mode group includes a mode group including a transformation mode Q0, a transformation mode Q1, a transformation mode Q2, and a transformation mode Q3; When the width of the CU is in the range of [Th1×4, Th3] and the height of the CU is in the range of [Th1, Th2], the candidate mode group includes a mode group including a transformation mode VQ0, a transformation mode VQ1, and a transformation mode VH2; When the width of the CU is in the range of [Th1×2, Th2] and the height of the CU is in the range of [Th1, Th2], the candidate mode group includes a mode group including a transformation mode VH0 and a transformation mode VH1; When the height of the CU is in the range of [Th1×4, Th3] and the width of the CU is in the range of [Th1, Th2], the candidate mode group includes a mode group including a transformation mode HQ0, a transformation mode HQ1, and a transformation mode HH2; When the height of the CU is in the range of [Th1×2, Th2] and the width of the CU is in the range of [Th1, Th2], the candidate mode group includes a mode group including a transformation mode HH0 and a transformation mode HH1; When the width of the CU is in the range of [Th1×2, Th2] and the height of the CU is in the range of [Th1×2, Th2], the candidate mode group includes a mode group including a transformation mode Q0, a transformation mode Q1, a transformation mode Q2, and a transformation mode Q3; When the width of the CU is in the range of [Th1×4, Th2] and the height of the CU is in the range of [Th1, Th2], the candidate mode group includes a mode group including a transformation mode VQ0, a transformation mode VQ1, and a transformation mode VH2; When the width of the CU is in the range of [Th1×2, Th2] and the height of the CU is in the range of [Th1, Th2], the candidate mode group includes a mode group including a transformation mode VH0 and a transformation mode VH1; When the height of the CU is in the range of [Th1×4,Th2] and the width of the CU is in the range of [Th1,Th2], the candidate mode group includes a mode group including a transformation mode HQ0, a transformation mode HQ1, and a transformation mode HH2; or When the height of the CU is in the range of [Th1×2, Th2] and the width of the CU is in the range of [Th1, Th2], the candidate mode group includes a mode group including a transformation mode HH0 and a transformation mode HH1; Th1, Th2, and Th3 are predetermined integer values.

[0038] With reference to the fifth or eighth possible implementation method of the second aspect, in a ninth possible implementation method, Th1 is 4, 8, or 16, Th2 is 32, 64, or 128, or Th3 is 64, 128, or 256.

[0039] With reference to the second aspect or any of the first to ninth possible implementation methods of the second aspect, in a tenth possible implementation method, the entropy decoding unit is further configured to determine whether to obtain the target transformation mode of the residual TU based on the prediction information of the CU.

[0040] With reference to the tenth possible implementation method of the second aspect, in an eleventh possible implementation method, the entropy decoding unit is further configured to determine whether to obtain the target transformation mode of the residual TU according to at least one of the following: determining, when a prediction mode of the CU is an intra prediction mode, to obtain the target transformation mode of the residual TU; determining, when a prediction mode of the CU is an inter prediction mode, to obtain the target transformation mode of the residual TU; Determine to obtain the target transformation mode of the residual TU when the prediction method of the CU is a preset positive prediction method; or When the prediction method of the CU is a preset negative prediction method, it is determined not to obtain the target transformation mode of the residual TU.

[0041] With reference to the eleventh possible implementation method of the second aspect, in a twelfth possible implementation method, the preset positive prediction method includes the following: A motion compensation method based on a translational model; Merge prediction methods; An advanced motion vector prediction method with 1 / 4-pel motion vector difference accuracy; or Merge prediction methods with merge index less than 2; Includes at least one of the following:

[0042] With reference to the eleventh or twelfth possible implementation method of the second aspect, in a thirteenth possible implementation method, the preset negative prediction method includes the following: Affine model based motion compensation method; Affine merge prediction method; Affine inter prediction mode; Advanced motion vector prediction methods with 1-pel or 4-pel motion vector difference accuracy; or Merge prediction method with merge index not less than 2; Includes at least one of the following:

[0043] With reference to the second aspect or any of the first to thirteenth possible implementation methods of the second aspect, in a fourteenth possible implementation method, the entropy decoding unit is further configured to determine whether to obtain the target transformation mode of the residual TU based on the size of the CU.

[0044] With reference to the fourteenth possible implementation method of the second aspect, in a fifteenth possible implementation method, the entropy decoding unit is further configured to determine whether to obtain the target transformation mode of the residual TU according to at least one of the following: determining not to obtain the target transformation mode of the residual TU when the width or height of the CU is greater than a preset CU threshold; determining not to obtain the target transformation mode of the residual TU when the width or height of the TU of the CU is smaller than a preset minimum TU threshold; or When the width or height of a TU of the CU is greater than a preset maximum TU threshold, it is determined not to obtain the target transformation mode of the residual TU.

[0045] With reference to the 15th possible implementation method of the second aspect, in a 16th possible implementation method, the preset CU threshold is 32 luma pixels, 64 luma pixels, or 128 luma pixels, or the preset minimum TU threshold is 4 luma pixels, 8 luma pixels, or 16 luma pixels, or the preset maximum TU threshold is 32 luma pixels, 64 luma pixels, or 128 luma pixels.

[0046] According to a third aspect, an embodiment of the present invention provides a decoder, the decoder comprising a processing circuit for performing a method according to the first aspect and any one of the first to sixteenth possible implementation methods of the first aspect.

[0047] According to a fourth aspect, an embodiment of the present invention provides a computer program product comprising a program code for executing the method according to the first aspect and any one of the first to sixteen possible implementation methods of the first aspect.

[0048] According to a fifth aspect, an embodiment of the present invention is a decoder, comprising: one or more processors; a non-transitory computer-readable storage medium coupled to the processor and storing programming for execution by the processor, the programming constituting a decoder for executing a method according to the first aspect and any one of possible implementation methods 1 to 16 of the first aspect; The present invention provides a decoder including:

[0049] By implementing the method provided by the present disclosure, the target transform mode can specify the TU partition mode of a CU, the position of the residual TU, and the transform type of the residual, so that not only can the decoding efficiency be improved, but also the decoding quality can be improved; and the above-mentioned information can be specified for the target transform mode, thus reducing the bits required for transmitting the above-mentioned information, and saving transmission resources, such as bandwidth, for transmitting encoded audio data. [Brief description of the drawings]

[0050] In order to more clearly describe the technical solutions in the embodiments of the present invention or in the prior art, the following briefly describes the accompanying drawings necessary to describe the embodiments or the prior art. Obviously, the accompanying drawings in the following description only show some embodiments of the present invention, and those skilled in the art can still derive other drawings from these accompanying drawings without creative efforts.

[0051] [Figure 1A] FIG. 1 is a conceptual or schematic block diagram illustrating an example encoding system.

[0052] [Figure 1B] FIG. 2 is an illustration of another example video encoding system.

[0053] [Diagram 2] FIG. 2 is a schematic / conceptual block diagram of an example video encoder.

[0054] [Diagram 3] FIG. 2 is a schematic / conceptual block diagram of an exemplary video decoder.

[0055] [Figure 4] 1 is a schematic diagram of a video encoding device;

[0056] [Diagram 5] FIG. 2 is a block diagram of the device.

[0057] [Figure 6] Conversion modes Q0, Q1, Q2, and Q3 are shown.

[0058] [Figure 7] Conversion modes HQ0, HQ1, VQ0, and VQ1 are shown.

[0059] [Figure 8] Conversion modes HH0, HH1, VH0, and VH1 are shown.

[0060] [Figure 9] Conversion modes HH” and VH2 are shown.

[0061] [Figure 10] Conversion modes QH0, QH1, QH2, and QH3 are shown.

[0062] [Figure 11] Conversion modes QV0, QV1, QV2, and QV3 are shown.

[0063] [Figure 12] 1 is a schematic diagram of a video decoding method;

[0064] [Figure 13] 1 illustrates an example of intra-prediction in video coding.

[0065] [Figure 14]FIG. 2 is a schematic diagram of an exemplary video encoding mechanism.

[0066] [Figure 15] 1 illustrates an exemplary spatial varying transform (SVT). [Figure 16] 1 illustrates an exemplary spatial varying transform (SVT).

[0067] [Figure 17] 1 illustrates exemplary SVT transform candidate positions for a residual block.

[0068] [Figure 18] 1 illustrates an example SVT transform position for a residual block.

[0069] [Figure 19] 1 shows an example of residual sample horizontal flipping.

[0070] [Figure 20] 1 is a flowchart of an example method for video decoding with position-dependent SVT.

[0071] [Figure 21] FIG. 1 is a diagram of candidate positions for SVT-V and SVT-H blocks (M1=M2=8).

[0072] [Figure 22] FIG. 1 is a diagram of SVT-V and SVT-H with three candidate positions.

[0073] [Diagram 23] This is a diagram of SVT-H and SVT-V.

[0074] [Figure 24] FIG. 1 is a diagram of candidate positions for SVT-V and SVT-H blocks (M1=M2=8).

[0075] [Diagram 25] FIG. 2 is a diagram of a first group of transform coefficients and a second group of transform coefficients. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0076] In the following description, reference is made to the accompanying drawings which form part of this disclosure and which show by way of illustration certain aspects of embodiments of the invention or in which embodiments of the invention may be used. It is understood that embodiments of the invention may be used in other ways and may include structural or logical changes not shown in the drawings. The following detailed description is therefore not to be taken in a limiting sense, and the scope of the invention is defined by the appended claims.

[0077] For example, disclosure related to a described method also applies to a corresponding apparatus or system configured to perform the method, and vice versa. For example, when one or more specific method steps are described, the corresponding apparatus may include one or more units, e.g., functional units, to perform the described method steps (e.g., one unit performs one or more steps, or each of the multiple units performs one or more of the multiple steps), even if one or more units are not explicitly described or shown. On the other hand, when, for example, a particular device is described based on one or more units, e.g., functional units, the corresponding method may include one step to perform the function of one or more units (e.g., one step performs the function of one or more units, or each of the multiple steps performs the function of one or more of the multiple units), even if one or more steps are not explicitly described or shown. Furthermore, it is understood that the features of various exemplary embodiments and / or aspects described herein may be combined with each other, unless otherwise specified.

[0078] Video coding typically refers to the processing of a sequence of pictures to form a video or video sequence. Instead of the term "picture", the terms "frame" or "image" may be used synonymously in the field of video coding. Video coding as used in this application (or this disclosure) refers to video encoding or video decoding. Video encoding is performed on the source side and typically involves processing the original video picture (e.g., by compression) to reduce the amount of data needed to represent the video picture (for more efficient storage and / or transmission). Video decoding is performed on the destination side and typically involves the opposite process to the encoder to reconstruct the video picture. The embodiments referring to "encoding" a video picture (or pictures in general as described below) should not be interpreted as relating to either "encoding" or "decoding" a video sequence. The combination of the encoding and decoding parts is also called a codec (encoding and decoding, CODEC).

[0079] In the case of lossless video coding, the original video picture can be reconstructed, i.e. the reconstructed video picture has the same quality as the original video picture (assuming there is no transmission loss or other data loss during storage or transmission). In the case of lossy video coding, further compression, e.g. by quantization, is performed to reduce the amount of data representing the video picture, which cannot be fully reconstructed at the decoder side, i.e. the quality of the reconstructed video picture is lower or worse than the quality of the original video picture.

[0080] Several video coding standards since H.261 belong to the group of "lossy hybrid video codecs" (i.e. they combine spatial and temporal prediction in the sample domain with 2D transform coding applying quantization in the transform domain). Each picture of a video sequence is typically divided into a set of non-overlapping blocks and coding is typically performed at the block level. In other words, in the encoder, video is typically processed or coded at the block (video block) level, e.g. by generating a predictive block using spatial (intra-picture) and temporal (inter-picture) prediction, subtracting the predictive block from a current block (the block currently being / to be processed) to obtain a residual block, transforming the residual block and quantizing the residual block in the transform domain to reduce (compress) the amount of data to be transmitted. Meanwhile, in the decoder, the reverse process compared to the encoder is partially applied to the coded or compressed block to reconstruct the current block for presentation. Additionally, the encoder replicates the decoder processing loop so that both generate the same predictions (eg, intra and inter predictions) and / or reconstructions for processing, i.e., encoding, subsequent blocks.

[0081] As used herein, the term "block" may be a portion of a picture or a frame. For ease of explanation, embodiments of the present invention are described herein with reference to High-Efficiency Video Coding (HEVC), or Versatile Video Coding reference software developed by the ITU-T Video Coding Experts Group (VCEG) and the Joint Collaboration Team on Video Coding (JCT-VC) of the ISO / IEC Motion Picture Experts Group (MPEG). Those skilled in the art will appreciate that embodiments of the present invention are not limited to HEVC or VVC. Reference may be made to CUs, PUs, and TUs. In HEVC, a CTU is divided into CUs using a quadtree structure, denoted as a coding tree. The decision of whether to code a picture region using inter-picture (temporal) or intra-picture (spatial) prediction is made at the CU level. Each CU can be further divided into 1, 2, or 4 PUs according to the PU partition type. Within one PU, the same prediction process is applied, and related information is transmitted to the decoder for each PU. By applying the prediction process based on the PU partition type, after obtaining the residual block, the CU can be divided into transform units (TUs) according to another quad-tree structure similar to the coding tree of the CU. In the latest development of video compression technology, quad-tree and binary tree (QTBT) partition frames are used to divide the coding blocks. In the QTBT block structure, the CUs can have either a square or a rectangular shape. For example, the coding tree unit (CTU) is first divided by a quad-tree structure. The leaf nodes of the quad-tree are further divided by a binary tree structure. The leaf nodes of the binary tree are called coding units (CUs), and segmentation is used for prediction and transformation processes without further partitioning.This means that the CU, PU, ​​and TU have the same block size in the QTBT coding block structure. At the same time, multiple partitions, such as ternary tree partitions, have also been proposed for use with the QTBT block structure.

[0082] In the following embodiments of the encoder 20, the decoder 30 and the encoding system 10 are described on the basis of Figs.

[0083] 1A is a conceptual or schematic block diagram illustrating an example encoding system 10, e.g., video encoding system 10, that may utilize techniques of the present disclosure. An encoder 20 (e.g., video encoder 20) and a decoder 30 (e.g., video decoder 30) of video encoding system 10 represent examples of devices that may be configured to perform techniques according to various examples described herein. As shown in FIG. 1A, encoding system 10 includes a source device 12 that is configured to provide encoded data 13, e.g., encoded pictures 13, to a destination device 14 that decodes the encoded data 13.

[0084] The source device 12 includes an encoder 20 , and additionally / optionally includes a picture source 16 , a pre-processing unit 18 , for example a picture pre-processing unit 18 , and a communication interface or unit 22 .

[0085] The picture source 16 may include or be, for example, any kind of picture capture device that captures a real picture, and / or any kind of picture or comment generation device (in screen content coding, any text on the screen is also considered as part of the picture or image to be coded), such as a computer animated picture, a computer graphics processor that generates computer animated pictures (e.g. screen content, virtual reality (VR) pictures) and / or any combination thereof (e.g. augmented reality (AR) pictures), or any kind of device that obtains and / or provides real pictures.

[0086] A (digital) picture is or can be considered as a two-dimensional array or matrix of samples with intensity values. The samples in the array may also be called pixels (short for picture element) or pels. The number of samples in the horizontal and vertical directions (or axes) of the array or picture defines the size and / or resolution of the picture. For color representation, typically three color components are used. That is, a picture may be represented or contain three sample arrays. In RBG format or color space, a picture contains corresponding red, green and blue sample arrays. However, in video coding, each pixel is typically represented in a luma / chroma format or color space, e.g. YCbCr, which contains a luma component denoted by Y (sometimes L is used instead) and two chroma components denoted by Cb and Cr. The luma (or luma for short) component Y represents the brightness or gray level intensity (e.g. as in a grayscale picture). On the other hand, the two chrominance (or chroma for short) components Cb and Cr represent the chromaticity or color information components. Thus, a picture in YCbCr format contains a luma sample array of luma sample values ​​(Y) and two chroma sample arrays of chrominance values ​​(Cb and Cr). A picture in RGB format may be converted or transformed into YCbCr format, or vice versa, a process also known as color conversion or color transformation. If the picture is monochromatic, the picture may contain only a luma sample array.

[0087] The picture source 16 (e.g., video source 16) may be, for example, a camera capturing a picture, a memory containing or storing a previously captured or generated picture, e.g., a picture memory, and / or any kind of (internal or external) interface for obtaining or receiving a picture. The camera may be, for example, a local or built-in camera integrated in the source device. The memory may be, for example, a local or built-in memory integrated in the source device. The interface may be, for example, an external interface for receiving pictures from an external video source, e.g., an external picture capture device such as a camera, an external memory, or an external picture generation device, e.g., an external computer graphic processor, computer or server. The interface may be any kind of interface, e.g., a wired or wireless interface, an optical interface, according to any characteristics or standardized interface protocol. The interface for obtaining picture data 17 may be the same interface as the communication interface 22 or a part of it.

[0088] In contrast to pre-processing unit 18 and the processing performed by pre-processing unit 18 , pictures or picture data 17 (eg, video data 16 ) may also be referred to as raw pictures or raw picture data 17 .

[0089] The pre-processing unit 18 is configured to receive the (raw) picture data 17 and perform pre-processing on the picture data 17 to obtain a pre-processed picture 19 or pre-processed picture data 19. The pre-processing performed by the pre-processing unit 18 may include, for example, cropping, color format conversion (e.g., from RGB to YCbCr), color correction, or noise removal. It can be understood that the pre-processing unit 18 may be an optical component.

[0090] An encoder 20, for example a video encoder 20, is arranged to receive pre-processed picture data 19 and to provide encoded picture data 21 (further details are given below, for example with reference to FIG. 2 or FIG. 4).

[0091] The communications interface 22 of the source device 12 may be configured to receive the encoded picture data 21 and transmit it to another device, such as the destination device 14 or any other device, for storage or direct reconstruction, or to store the encoded data 13 and / or process the encoded data 13 before transmitting it to another device, such as the destination device 14 or any other device, for decoding or storage.

[0092] Destination device 14 includes a decoder 30 (eg, a video decoder 30 ), and may additionally, or optionally, include a communications interface or unit 28 , a post-processing unit 32 , and a display device 34 .

[0093] The communications interface 28 of the destination device 14 is arranged to receive the coded picture data 21 or the coded data 13, for example directly from the source device 12 or from any other device, for example a storage device, for example a coded picture data storage device.

[0094] The communications interface 22 and the communications interface 28 may be configured to transmit or receive the encoded picture data 21 or the encoded data 13 via a communications link between the source device 12 and the destination device 14, such as a direct wired or wireless connection, or any type of network, such as a wired or wireless network, or any combination thereof, or any type of private or public network, or any type of combination thereof.

[0095] The communications interface 22 may, for example, be arranged to package the encoded picture data 21 in an appropriate format, for example packets, for transmission over a communications link or network.

[0096] Communications interface 28 forming the counterpart to communications interface 22 may for example be arranged to unpackage encoded data 13 to obtain encoded picture data 21 .

[0097] Both communication interface 22 and communication interface 28 may be configured as unidirectional communication interfaces, as indicated by the arrow of encoded data 13 pointing from source device 12 to destination device 14 in FIG. 1A, or as bidirectional communication interfaces, and may be configured to, for example, send and receive messages, for example to establish a connection, to acknowledge, and to exchange any other information related to the communication link and / or data transmission, e.g., encoded picture data transmission.

[0098] The decoder 30 is arranged to receive the encoded picture data 21 and to provide decoded picture data 31 or decoded pictures 31 (further details are given below, for example with reference to FIG. 3 or FIG. 5).

[0099] The post-processor 32 of the destination device 14 is configured to post-process the decoded picture data 31 (also called reconstructed picture data), e.g. the decoded picture 31, to obtain post-processed picture data 33, e.g. the post-processed picture 33. The post-processing performed by the post-processing unit 32 may include, e.g. color format conversion (e.g. from YCbCr to RGB), color correction, cropping, or resampling, or any other processing, e.g. to prepare the decoded picture data 31 for display, e.g. by a display device 34.

[0100] A display device 34 of the destination device 14 is configured to receive the post-processed picture data 33, for example to display the picture to a user or viewer. The display device 34 may be or include any type of display, such as an internal or external display or monitor, that presents the reconstructed picture. The display may include, for example, liquid crystal displays (LCD), organic light emitting diodes (OLED) displays, plasma displays, projectors, micro LED displays, liquid crystal on silicon (LCoS), digital light processors (DLP), or any other type of display.

[0101] 1A depicts source device 12 and destination device 14 as separate devices, an embodiment of the devices may include both source device 12 or corresponding functionality and destination device 14 or corresponding functionality, or both. In such an embodiment, source device 12 or corresponding functionality and destination device 14 or corresponding functionality may be implemented using the same hardware and / or software or separate hardware and / or software or any combination thereof.

[0102] As will be clear to one of ordinary skill in the art based on the description, the presence and (exact) division of different units or functions within source device 12 and / or destination device 14 as shown in FIG. 1A may vary depending on the actual device and application.

[0103] Each of the encoder 20 (e.g., video encoder 20) and the decoder 30 (e.g., video decoder 30) may be implemented as any of a variety of suitable circuits, such as one or more microprocessors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), discrete logic, hardware, or any combination thereof. If the techniques are implemented in part in software, an apparatus may store instructions for the software in a suitable non-transitory computer-readable storage medium and execute the instructions in hardware using one or more processors to perform the techniques of this disclosure. Any of the foregoing (including hardware, software, a combination of hardware and software, etc.) may be considered to be one or more processors. Each of the video encoder 20 and the video decoder 30 may be included in one or more encoders or decoders, either of which may be integrated within the respective apparatus as part of a combined encoder / decoder (CODEC).

[0104] Source device 12 may be referred to as a video encoder or video encoding device. Destination device 14 may be referred to as a video decoder or video decoding device. Source device 12 and destination device 14 may be examples of video encoders or video encoding devices.

[0105] Source device 12 and destination device 14 may include any of a wide range of devices, including any type of handheld or fixed device, such as a notebook or laptop computer, a mobile phone, a smartphone, a tablet or tablet computer, a camera, a desktop computer, a set-top box, a television, a display device, a digital media player, a video game console, a video streaming device (e.g., a content service server or a content delivery server), a broadcast receiving device, a broadcast transmitting device, etc., and may or may not use any type of operating system.

[0106] In some cases, source device 12 and destination device 14 may be equipped for wireless communication. Thus, source device 12 and destination device 14 may be wireless communication devices.

[0107] In some cases, the video encoding system 10 shown in FIG. 1A is merely an example, and the techniques of the present application may be applied to video encoding settings (e.g., video encoding or video decoding) that do not necessarily include any data communication between an encoding device and a decoding device. In other examples, data may be read from local memory, streamed over a network, etc. A video encoding device may encode data and store it in memory, and / or a decoding device may read and decode data from memory. In some examples, encoding and decoding are performed by devices that do not communicate with each other, but simply encode data into memory and / or read and decode data from memory.

[0108] It should be understood that for each of the above examples described with reference to video encoder 20, video decoder 30 may be configured to perform reciprocal processing. With respect to signaling syntax elements, video decoder 30 may be configured to receive and parse such syntax elements and decode associated video data accordingly. In some examples, video encoder 20 may entropy encode one or more syntax elements into an encoded video bitstream. In such examples, video decoder 30 may parse such syntax elements and decode associated video data accordingly.

[0109] 1B is an illustration of another example video encoding system 40 including the encoder 20 of FIG. 2 and / or the decoder 30 of FIG. 3, according to an example embodiment. System 40 can implement techniques according to various examples described herein. In the illustrated implementation, video encoding system 40 may include an image device 41, a video encoder 20, a video decoder 30 (and / or a video coder implemented by logic circuitry 47 of a processing unit 46), an antenna 42, one or more processors 43, one or more memory stores 44, and / or a display device 45.

[0110] As shown, imaging device 41, antenna 42, processing unit 46, logic circuitry 47, video encoder 20, video decoder 30, processor 43, memory store 44, and / or display device 45 may be in communication with one another. As discussed, although shown with both video encoder 20 and video decoder 30, video encoding system 40 may include only video encoder 20 or only video decoder 30 in various examples.

[0111] As shown, in some examples, the video encoding system 40 may include an antenna 42. The antenna 42 may be configured to transmit or receive, for example, an encoded bitstream of video data. Additionally, in some examples, the video encoding system 40 may include a display device 45. The display device 45 may be configured to present the video data. As shown, in some examples, the logic circuitry 47 may be implemented by a processing unit 46. The processing unit 46 may include application-specific integrated circuit (ASIC) logic, a graphics processor, a general-purpose processor, etc. The video encoding unit 43 may also include an optional processor 43, which may also include application-specific integrated circuit (ASIC) logic, a graphics processor, a general-purpose processor, etc. In some examples, the logic circuitry 47 may be implemented by hardware, dedicated video encoding hardware, etc., and the processor 43 may implement general-purpose software, an operating system, etc. Furthermore, memory store 44 may be any type of memory, such as volatile memory (e.g., Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), etc.) or non-volatile memory (e.g., flash memory, etc.). In a non-limiting example, memory store 44 may be implemented by a cache memory. In some examples, logic circuitry 47 may access memory store 44 (e.g., for implementation of an image buffer). In other examples, logic circuitry 47 and / or processing unit 46 may include a memory store (e.g., a cache, etc.) for implementation of an image buffer, etc.

[0112] In some examples, video encoder 100 implemented by logic circuitry may include an image buffer (e.g., by either processing unit 46 or memory store 44) and a graphics processing unit (e.g., by processing unit 46). The graphics processing unit may be communicatively coupled to the image buffer. The graphics processing unit may include video encoder 100 implemented by logic circuitry 47 to implement various modules such as those discussed with respect to FIG. 2 and / or any other encoder system or subsystems described herein. The logic circuitry may be configured to perform various operations as discussed herein.

[0113] Video decoder 30 may be implemented in a manner similar to that implemented by logic circuitry 47 to implement various modules as discussed with respect to decoder 30 of FIG. 3 and / or any other decoder system or subsystem described herein. In some examples, video decoder 30 implemented by logic circuitry may include an image buffer (e.g., by either processing unit 420 or memory store 44) and a graphics processing unit (e.g., by processing unit 46). The graphics processing unit may be communicatively coupled to the image buffer. The graphics processing unit may include video decoder 30 implemented by logic circuitry 47 to implement various modules as discussed with respect to decoder 30 of FIG. 3 and / or any other decoder system or subsystem described herein.

[0114] In some examples, antenna 42 of video encoding system 40 may be configured to receive an encoded bitstream of video data. As discussed, the encoded bitstream may include data related to the encoding of video frames as discussed herein, such as data related to coding partitions (e.g., transform coefficients or quantized transform coefficients, optional indicators (as discussed), and / or data defining coding partitions), indicators, index values, mode selection data, etc. Video encoding system 40 may also include a video decoder 30 coupled to antenna 42 and configured to decode the encoded bitstream. Display device 45 is configured to present the video frames.

[0115] Encoder and encoding method

[0116] FIG. 2 shows a schematic / conceptual block diagram of an exemplary video encoder 20 configured to implement the techniques of the present application. In the example of FIG. 2, the video encoder 20 includes a residual calculation unit 204, a transform processing unit 206, a quantization unit 208, an inverse quantization unit 210 and an inverse transform processing unit 212, a reconstruction unit 214, a buffer 216, a loop filter unit 220, a decoded picture buffer (DPB) 230, a prediction processing unit 260, and an entropy coding unit 270. The prediction processing unit 260 may include an inter prediction unit 244, an intra prediction processing unit 254, and a mode selection unit 262. The inter prediction unit 244 may include a motion estimation unit and a motion compensation unit (not shown). The video encoder 20 as shown in FIG. 2 may also be referred to as a hybrid video encoder or a video encoder according to a hybrid video codec.

[0117] For example, the residual calculation unit 204, the transform processing unit 206, the quantization unit 208, the prediction processing unit 260, and the entropy coding unit 270 form a forward signal path of the encoder 20. Meanwhile, for example, the inverse quantization unit 210, the inverse transform processing unit 212, the reconstruction unit 214, the buffer 216, the loop filter 220, the decoded picture buffer (DPB) 230, and the prediction processing unit 260 form a backward signal path of the encoder, which corresponds to the signal path of the decoder (see decoder 30 in FIG. 3 ).

[0118] The encoder 20 is arranged to receive, for example via an input 202, a picture 201 or a block 203 of a picture 201, for example a picture of a video or a sequence of pictures forming a video sequence. The picture block 203 may also be referred to as a current picture block or a coded picture block (particularly in video coding, to distinguish a current picture from other pictures, for example previously coded and / or decoded pictures of the same video sequence, i.e. the video sequence which also contains the current picture), and the picture 201 as a current picture or a coded picture.

[0119] Partitioning

[0120] An embodiment of encoder 20 may include a partition unit (not shown in FIG. 2) configured to divide picture 201 into a number of blocks, such as block 203, typically non-overlapping blocks. The partition unit may be configured to use the same block size for all pictures in a video sequence and a corresponding grid that defines the block sizes, or to vary the block size between pictures or subsets or groups of pictures, and divide each picture into corresponding blocks.

[0121] In one example, prediction processing unit 260 of video encoder 20 may be configured to perform any combination of the partition techniques described above.

[0122] Similar to picture 201, block 203 can again be considered as a two-dimensional array or matrix of samples with intensity values ​​(sample values), but with smaller dimensions than picture 201. In other words, block 203 may contain, for example, one sample array (e.g., a luma array in case of a monochrome picture 201), or three sample arrays (e.g., a luma and two chroma arrays in case of a color picture 201), or any other number and / or type of arrays depending on the color format applied. The number of samples in the horizontal and vertical directions (or axes) of block 203 determine the size of block 203.

[0123] An encoder 20 as shown in Figure 2 is arranged to encode a picture 201 block by block, for example encoding and prediction is performed block by block 203.

[0124] Residual calculation

[0125] The residual calculation unit 204 is configured to calculate the residual block 205 based on the picture block 203 and the prediction block 265 (further details regarding the prediction block 265 are provided later), for example by subtracting sample values ​​of the prediction block 265 from sample values ​​of the picture block 203 sample-by-sample (pixel-by-pixel) to obtain the residual block 205 in the sample domain.

[0126] conversion

[0127] The transform processing unit 206 is configured to apply a transform, such as a discrete cosine transform (DCT) or a discrete sine transform (DST), to the sample values ​​of the residual block 206 to obtain transform coefficients 207 in a transform domain. The transform coefficients 207 may also be referred to as transformed residual coefficients and represent the residual block 205 in the transform domain.

[0128] The transform processing unit 206 may be configured to apply an integer approximation of a DCT / DST, such as the transform specified for HEVC / H.265. Compared to an orthogonal DCT transform, such an integer approximation is typically scaled by a particular factor. In order to maintain the level of the residual blocks processed by the forward and inverse transforms, additional scaling factors are applied as part of the transform processing. The scaling factors are typically selected based on particular constraints, such as the scaling factors being squared shift operations, the bit depth of the transform coefficients, a trade-off between accuracy and implementation cost, etc. A particular scaling factor may be specified, for example, for the inverse transform, e.g., by the inverse transform processing unit 212 in the decoder 30 (and the corresponding inverse transform, e.g., by the inverse transform processing unit 212 in the encoder 20), and a corresponding scaling factor for the forward transform, e.g., by the transform processing unit 206 in the encoder 20, may be specified accordingly.

[0129] quantization

[0130] The quantization unit 208 may be configured to quantize the transform coefficients 207 to obtain quantized transform coefficients 209, for example by applying scalar quantization or vector quantization. The quantized transform coefficients 209 may also be referred to as quantized residual coefficients 209. The quantization process may reduce a bit depth associated with some or all of the transform coefficients 207. For example, an n-bit transform coefficient may be rounded to an m-bit transform coefficient during quantization, where n is greater than m. The degree of quantization may be changed by adjusting a quantization parameter (QP). For example, in scalar quantization, different scaling may be applied to achieve finer or coarser quantization. A smaller quantization step size corresponds to a finer quantization. Meanwhile, a larger quantization step size corresponds to a coarser quantization. The applicable quantization step may be indicated by a quantization parameter (QP). The quantization parameter may, for example, be an index to a predefined set of applicable quantization step sizes. For example, a small quantization parameter may correspond to a finer quantization (smaller quantization step size) and a large quantization parameter may correspond to a coarser quantization (larger quantization step size). The quantization may include a division by the quantization step size. The corresponding or inverse inverse quantization, for example by the inverse quantization unit 210, may include a multiplication by the quantization step size. An embodiment according to some standards, for example HEVC, may be configured to use the quantization parameter to determine the quantization step size. Typically, the quantization step size may be calculated based on the quantization parameter using a fixed-point approximation of an equation that includes a division. An additional scaling factor for quantization and inverse quantization may be introduced to restore the levels of the residual block that may be changed due to the scaling used in the fixed-point approximation of the quantization step size and quantization parameter equations. In one exemplary implementation, the scaling of the inverse transform and inverse quantization may be combined. Alternatively, a customized quantization table may be used and signaled from the encoder to the decoder, for example in the bitstream.Quantization is a lossy operation, and the loss increases with increasing quantization step size.

[0131] The inverse quantization unit 210 is configured to apply the inverse quantization of the quantization unit 208 to the quantized coefficients, e.g., by applying the inverse of the quantization scheme applied by the quantization unit 208, based on or using the same quantization step size as the quantization unit 208, to obtain the inverse quantized coefficients 211. The inverse quantized coefficients 211, also referred to as the inverse quantized residual coefficients 211, may correspond to the transform coefficients 207, although they are not typically the same as the transform coefficients due to losses due to quantization.

[0132] The inverse transform processing unit 212 is configured to apply an inverse transform of the transform applied by the transform processing unit 206, such as an inverse discrete cosine transform (DCT) or an inverse discrete sine transform (DST), to obtain an inverse transform block 213 in the sample domain. The inverse transform block 213 may also be referred to as an inverse transform inverse quantization block 213 or an inverse transform residual block 213.

[0133] The reconstruction unit 214 (e.g., adder 214) is configured to add the inverse transform block 213 (i.e., the reconstructed residual block 213) to the prediction block 265 to obtain a reconstructed block 215 in the sample domain, for example by adding sample values ​​of the reconstructed residual block 213 and sample values ​​of the prediction block 265.

[0134] Optionally, a buffer unit 216 ("buffer" 216 for short), e.g. a line buffer 216, is configured to buffer or store the reconstructed blocks 215 and the respective sample values, e.g. for intra prediction. In further embodiments, the encoder may be configured to use the unfiltered reconstructed blocks and / or the respective sample values ​​stored in the buffer unit 216 for any kind of estimation and / or prediction, e.g. intra prediction.

[0135] Embodiments of encoder 20 may be configured, for example, such that buffer unit 216 is used to store reconstructed blocks 2156 not only for intra prediction 254 but also for loop filter unit 220 (not shown in FIG. 2) and / or such that buffer unit 216 and decoded picture buffer unit 230 form one buffer. Further embodiments may be configured to use filtered blocks 221 and / or blocks or samples from decoded picture buffer 230 (both not shown in FIG. 2) as input or basis for intra prediction 254.

[0136] Loop filter unit 220 (or “loop filter” 220 for short) is configured to filter reconstructed block 215 to obtain filtered block 221, e.g., to smooth pixel transitions or improve video quality. Loop filter unit 220 is intended to represent one or more filters, such as an inverse blocking filter, a sample-adaptive offset (SAO) filter, or other filters, e.g., a bilateral filter or an adaptive loop filter (ALF), or a sharpening or smoothing filter, or a collaborative filter. Although loop filter unit 220 is illustrated in FIG. 2 as being within the loop filter, in other configurations, loop filter unit 220 may be implemented as a post-loop filter. Filtered block 221 may be referred to as filtered reconstructed block 221. Decoded picture buffer 230 may store the reconstructed coding block after loop filter unit 220 performs a filtering operation on the reconstructed coding block.

[0137] An embodiment of the encoder 20 (respectively the loop filter unit 220) may be configured to output loop filter parameters (such as sample adaptive offset information), e.g., directly or after being entropy coded by the entropy coding unit or any other entropy coding unit, so that, for example, the decoder 30 may receive and apply the same loop filter parameters for decoding.

[0138] The decoded picture buffer (DPB) 230 may be a reference picture memory that stores reference picture data for use in encoding the video data by the video encoder 20. The DPB 230 may be formed of any of a variety of memory devices, such as dynamic random access memory (DRAM), including synchronous DRAM (SDRAM), magnetoresistive RAM (MRAM), resistive RAM (RRAM), or other types of memory devices. The DPB 230 and the buffer 216 may be provided by the same memory device or separate memory devices. In some examples, the decoded picture buffer (DPB) 230 is configured to store the filtered block 221. The decoded picture buffer 230 may further be configured to store other previously filtered blocks of the same current picture or of a different picture, e.g., a previously reconstructed picture, e.g., previously reconstructed and filtered block 221, and may provide a complete previously reconstructed, i.e., decoded picture (and corresponding reference blocks and samples) and / or a partially reconstructed current picture (and corresponding reference blocks and samples), e.g., for inter prediction. In some examples, the decoded picture buffer (DPB) 230 is configured to store the reconstructed block 215 if the reconstructed block 215 is reconstructed but without in-loop filtering.

[0139] The prediction processing unit 260, also referred to as the block prediction processing unit 260, is configured to receive or obtain the block 203 (the current block 203 of the current picture 201) and reconstructed picture data, e.g. reference samples of the same (current) picture from the buffer 216 and / or reference picture data 231 from one or more previously decoded pictures from the decoded picture buffer 230, and to process such data for prediction, i.e. to provide a prediction block 265, which may be an inter-prediction block 245 or an intra-prediction block 255.

[0140] The mode selection unit 262 may be configured to select a prediction mode (e.g., intra or inter prediction mode) and / or a corresponding prediction block 245 or 255 to be used as the prediction block 265 for calculation of the residual block 205 and for reconstruction of the reconstruction block 215.

[0141] An embodiment of the mode selection unit 262 may be configured to select a prediction mode (e.g., from those supported by the prediction processing unit 260) that is most suitable, or in other words provides the smallest residual (smallest residual means better compression for transmission or storage) or the smallest signaling overhead (smallest signaling overhead means better compression for transmission or storage), or that considers or balances both. The mode selection unit 262 may be configured to determine the prediction mode based on rate distortion optimization (RDO), i.e., to select a prediction mode that provides the smallest rate distortion optimization or is associated with a rate distortion that at least satisfies a prediction mode selection criterion.

[0142] The prediction process (eg, prediction processing unit 260) and mode selection (eg, by mode selection unit 262) performed by exemplary encoder 20 are described in further detail below.

[0143] As mentioned above, the encoder 20 is configured to determine or select a best or optimal prediction mode from a set of (predetermined) prediction modes, which may include, for example, intra-prediction modes and / or inter-prediction modes.

[0144] The set of intra prediction modes may include 35 different intra prediction modes, e.g., omnidirectional modes such as DC (or average) mode and planar mode, or directional modes such as those defined in H.265, or may include 67 different intra prediction modes, e.g., omnidirectional modes such as DC (or average) mode and planar mode, or directional modes such as those defined in the currently under development H.266.

[0145] The set of inter prediction modes (or possible inter prediction modes) depends on the available reference pictures (i.e., pictures that have been at least partially previously decoded, e.g., stored in DBP 230) and other inter prediction parameters, e.g., whether the entire reference picture or only a portion of it is used to search for the best matching reference block, e.g., a search window region around the region of the current block of the reference picture, and / or whether, e.g., pixel interpolation, e.g., half / semi-pel and / or quarter-pel interpolation, is applied.

[0146] In addition to the prediction modes mentioned above, skip mode and / or direct mode may be applied.

[0147] Prediction processing unit 260 may be further configured to divide block 203 into smaller block partitions or sub-blocks, e.g., by repeatedly using quad-tree (QT) partitions, binary-tree (BT) partitions, triple-tree (TT) partitions, or any combination thereof, and perform prediction on each block partition or sub-block, e.g., where mode selection includes selecting a prediction mode to be applied to each of the tree structure of partitioned block 203 and the block partitions or sub-blocks.

[0148] The inter prediction unit 244 may include a motion estimation (ME) unit (not shown in FIG. 2) and a motion compensation (MC) unit (not shown in FIG. 2). The motion estimation unit is configured to receive or obtain the picture block 203 (the current block 203 of the current picture 201) and the decoded picture 231, or at least one or more of the previously reconstructed blocks, such as reconstructed blocks of one or more other / different previously decoded pictures 231, for motion estimation. For example, a video sequence may include the current picture and the previous decoded picture 231. In other words, the current picture and the previous decoded picture 231 may be part of or form a sequence of pictures forming a video sequence.

[0149] The encoder 20 may be configured to, for example, select a reference block from multiple reference blocks of the same or different pictures of multiple other pictures, and provide the reference picture (or reference picture index) and / or an offset (spatial offset) between the position (x,y coordinates) of the reference block and the position of the current block as an inter prediction parameter to a motion estimation unit (not shown in FIG. 2 ). This offset is also called a motion vector (MV).

[0150] The motion compensation unit is configured to obtain, e.g., receive, inter prediction parameters and perform inter prediction based on or using the inter prediction parameters to obtain inter prediction block 245. The motion compensation performed by the motion compensation unit (not shown in FIG. 2) may include fetching or generating a prediction block based on a motion / block vector determined by motion estimation, and possibly performing interpolation to sub-pixel accuracy. Interpolation filtering may generate additional pixel samples from the base pixel samples, thus potentially increasing the number of candidate prediction blocks that can be used to encode the picture block. Upon receiving the motion vector of the PU of the current picture block, the motion compensation unit 246 locates the prediction block pointed to by the motion vector in one of the reference picture lists. The motion compensation unit 246 may also generate syntax elements related to the block and the video slice for use by the video decoder 30 in decoding the picture blocks of the video slice.

[0151] The intra prediction unit 254 is configured to obtain, e.g., receive, the picture block 203 (current picture block) and one or more previous reconstructed blocks of the same picture, e.g., reconstructed neighboring blocks, for intra estimation. The encoder 20 may be configured to select, e.g., an intra prediction mode from a plurality of (predetermined) intra prediction modes.

[0152] An embodiment of the encoder 20 may be configured to select an intra-prediction mode based on an optimization criterion, such as minimum residual (e.g., the intra-prediction mode that provides the predicted block 255 that is most similar to the current picture block 203) or minimum rate distortion.

[0153] The intra prediction unit 254 is further configured to determine an intra prediction block 255 based on intra prediction parameters, e.g., a selected intra prediction mode. In any case, after selecting an intra prediction mode for the block, the intra prediction unit 254 is also configured to provide the intra prediction parameters, i.e., information indicative of the selected intra prediction mode for the block, to the entropy coding unit 270. In one example, the intra prediction unit 254 may be configured to perform any combination of the intra partitioning techniques described below.

[0154] The entropy coding unit 270 is configured to apply an entropy coding algorithm or scheme (e.g., a variable length coding (VLC) scheme, a context adaptive VLC scheme (CALVC), an arithmetic coding scheme, a context adaptive binary arithmetic coding (CABAC), a syntax-based context-adaptive binary arithmetic coding (SBAC), a probability interval partitioning entropy (PIPE) coding or another entropy coding method or technique) to the quantized residual coefficients 209, the inter prediction parameters, the intra prediction parameters, and / or the loop filter parameters, individually or jointly (or not at all), to obtain coded picture data 21, which may be output via an output 272, for example in the form of a coded bitstream 21. The coded bitstream 21 may be transmitted to the video decoder 30 or archived for later transmission or retrieval by the video decoder 30. Entropy encoding unit 270 may further be configured to entropy encode other syntax elements of the current video slice being encoded.

[0155] Other structural variations of the video encoder 20 may be used to encode the video stream. For example, a non-transform-based encoder 20 may directly quantize the residual signal for a particular block or frame without having a transform processing unit 206. In another implementation, the encoder 20 may have the quantization unit 208 and the inverse quantization unit 210 combined into a single unit.

[0156] 3 shows an example video decoder 30 configured to implement the techniques of the present application. Video decoder 30 is configured to receive picture data (e.g., encoded bitstream) 21, e.g., encoded by encoder 100, to obtain decoded picture 131. During the decoding process, video decoder 30 receives video data from video encoder 100, e.g., an encoded video stream representing picture blocks of encoded video slices and associated syntax elements.

[0157] 3, decoder 30 includes an entropy decoding unit 304, an inverse quantization unit 310, an inverse transform processing unit 312, a reconstruction unit 314 (e.g., summer 314), a buffer 316, a loop filter 320, a decoded picture buffer 330, and a prediction processing unit 360. Prediction processing unit 360 may include an inter prediction unit 344, an intra prediction processing unit 354, and a mode selection unit 362. Video decoder 30 may, in some examples, perform a decoding path that is generally reciprocal to the encoding paths described with respect to video encoder 100 from FIG.

[0158] The entropy decoding unit 304 is configured to perform entropy decoding on the encoded picture data 21 to obtain, e.g., quantized coefficients 309, and / or decoded coding parameters (not shown in FIG. 3), such as (decoded) any or all of inter-prediction parameters, intra-prediction parameters, loop filter parameters, and / or other syntax elements. The entropy decoding unit 304 is further configured to forward the inter-prediction parameters, intra-prediction parameters, and / or other syntax elements to the prediction processing unit 360. The video decoder 30 may receive video slice-level and / or video block-level syntax elements.

[0159] The inverse quantization unit 310 may be functionally identical to the inverse quantization unit 110, the inverse transform processing unit 312 may be functionally identical to the inverse transform processing unit 112, the reconstruction unit 314 may be functionally identical to the reconstruction unit 114, the buffer 316 may be functionally identical to the buffer 116, the loop filter 320 may be functionally identical to the loop filter 120, and the decoded picture buffer 330 may be functionally identical to the decoded picture buffer 130.

[0160] Prediction processing unit 360 may include an inter prediction unit 344 and an intra prediction unit 354, where the inter prediction unit 344 may be functionally similar to the inter prediction unit 144 and the intra prediction unit 354 may be functionally similar to the intra prediction unit 154. Prediction processing unit 360 is typically configured to perform block prediction and / or obtain a prediction block 365 from the coded data 21, and to receive or obtain (explicitly or implicitly) prediction related parameters and / or information regarding a selected prediction mode, for example from entropy decoding unit 304.

[0161] When a video slice is coded as an intra coded (I) slice, intra prediction unit 354 of prediction processing unit 360 is configured to generate a prediction block for a picture block of the current video slice based on a signaled intra prediction mode and data from a previously decoded block of the current frame or picture. When a video frame is coded as an inter coded (i.e., B or P) slice, inter prediction unit 344 (e.g., a motion compensation unit) of prediction processing unit 360 is configured to generate a prediction block 365 for a video block of the current video slice based on a motion vector and other syntax elements received from entropy decoding unit 304. In inter prediction, a prediction block may be generated from one of the reference pictures in one of the reference picture lists. Video decoder 30 may construct reference frame lists: List 0 and List 1 based on the reference pictures specified in DPB 330.

[0162] Prediction processing unit 360 is configured to determine prediction information for video blocks of the current video slice by parsing the motion vectors and other syntax elements, and to use the prediction information to generate predictive blocks for the current video block being decoded. For example, prediction processing unit 360 uses some of the received syntax elements to determine a prediction mode (e.g., intra or inter prediction) used to encode video blocks of the video slice, an inter-prediction slice type (e.g., a B slice, a P slice, or a GPB slice), configuration information for one or more of the reference picture lists of the slice, motion vectors for each inter-coded video block of the slice, an inter-prediction state for each inter-coded video block of the slice, and other information for decoding video blocks in the current video slice.

[0163] The inverse quantization unit 310 is configured to inverse quantize, or dequantize, the quantized transform coefficients provided in the bitstream and decoded by the entropy decoding unit 304. The inverse quantization process may include determining, for each video block in a video slice, the degree of quantization, and likewise the degree of inverse quantization to be applied, using a quantization parameter calculated by the video encoder 100.

[0164] Inverse transform processing unit 312 is configured to apply an inverse transform, eg, an inverse DCT, an inverse integer transform, or a conceptually similar inverse transform process, to the transform coefficients in order to produce residual blocks in the pixel domain.

[0165] The reconstruction unit 314 (e.g., adder 314) is configured to add the inverse transform block 313 (i.e., the reconstructed residual block 313) to the prediction block 365 to obtain a reconstructed block 315 in the sample domain, for example by adding sample values ​​of the reconstructed residual block 313 and sample values ​​of the prediction block 365.

[0166] The loop filter unit 320 (in the coding loop or after the coding loop) is configured to filter the reconstructed block 315 to obtain a filtered block 321, e.g., to smooth pixel transitions or improve video quality. In one example, the loop filter unit 320 may be configured to perform any combination of the filtering techniques described below. The loop filter unit 320 is intended to represent one or more filters, such as a deblocking filter, a sample-adaptive offset (SAO) filter, or other filters, e.g., a bilateral filter or an adaptive loop filter (ALF), or a sharpening or smoothing filter, or a collaborative filter. Although the loop filter unit 320 is illustrated in FIG. 3 as being in the loop filter, in other configurations, the loop filter unit 320 may be implemented as a post-loop filter.

[0167] The decoded video blocks 321 in a given frame or picture are then stored in a decoded picture buffer 330, which stores reference pictures used for subsequent motion compensation.

[0168] The decoder 30 is arranged to output the decoded pictures 331, for presentation or viewing to a user, eg via an output 332.

[0169] Other variations of the video decoder 30 may be used to decode the compressed video stream. For example, the decoder 30 may generate an output video stream without having a loop filter 320. For example, a non-transform-based decoder 30 may directly inverse quantize the residual signal for a particular block or frame without having a transform processing unit 312. In another implementation, the decoder 30 may have the inverse quantization unit 310 and the inverse transform processing unit 312 combined into a single unit.

[0170] 4 is a schematic diagram of a video encoding device 400 according to one embodiment of the present disclosure. The video encoding device 400 is suitable for implementing embodiments of the disclosure as described herein. In one embodiment, the video encoding device 400 may be a decoder, such as the video decoder 30 of FIG. 1A, or an encoder, such as the video encoder 20 of FIG. 1A. In one embodiment, the video encoding device 400 may be one or more components of the video decoder 30 of FIG. 1A or the video encoder 20 of FIG. 1A, as described above.

[0171] The video encoding device 400 includes ingress ports 410 and receiver units (Rx) 420 for receiving data, a processor, logic unit, or central processing unit (CPU) 430 for processing data, transmitter units (Tx) 440 and egress ports 450 for transmitting data, and memory 460 for storing data. The video encoding device 400 may also include optical-to-electrical (OE) and electrical-to-optical (EO) components coupled to the ingress ports 410, receiver units 420, and transmitter units 440 for egress or ingress of optical or electrical signals.

[0172] The processor 430 is implemented by hardware and software. The processor 430 may be implemented as one or more CPU chips, cores (e.g., multi-core processors), FPGAs, ASICs, and DSPs. The processor 430 communicates with the ingress port 410, the receiver unit 420, the transmitter unit 440, the egress port 450, and the memory 460. The processor 430 includes an encoding module 470. The encoding module 470 implements the above-disclosed embodiments. For example, the encoding module 470 implements, processes, prepares, or provides various encoding operations. The inclusion of the encoding module 470 thus provides substantial improvements to the functionality of the video encoding device 400 and results in the transformation of the video encoding device 400 into different states. Alternatively, the encoding module 470 is implemented as instructions stored in the memory 460 and executed by the processor 430.

[0173] Memory 460 may include one or more disks, tape drives, and solid state drives, and may be used to store programs when they are selected for execution and as overflow data storage for storing instructions and data read during execution of the programs. Memory 460 may be volatile and / or non-volatile, and may be read-only memory (ROM), random access memory (RAM), ternary content-addressable memory (TCAM), and / or static random-access memory (SRAM).

[0174] 5 is a simplified block diagram of a device 500 that may be used as one or both of source device 12 and destination device 14 from FIG. 1A in accordance with an exemplary embodiment. Device 500 is capable of implementing the techniques of this disclosure as described above. Device 500 may be in the form of a computing system including multiple computing devices, or in the form of a single computing device, such as a mobile phone, tablet computer, laptop computer, notebook computer, desktop computer, etc.

[0175] The processor 502 in the device 500 may be a central processing unit. Alternatively, the processor 502 may be any other type of device or devices capable of manipulating or processing information, either now existing or developed in the future. Although implementations of the disclosure may be performed with a single processor, such as the processor 502, as shown, benefits in speed and efficiency may be achieved using more than one processor.

[0176] The memory 504 in the device 500 may be, in one implementation, a read only memory (ROM) device or a random access memory (RAM) device. Any other suitable type of storage device may be used as the memory 504. The memory 504 may include code and data 506 that is accessed by the processor 502 using a bus 512. The memory 504 may further include an operating system 508 and application programs 510. The application programs 510 include at least one program that enables the processor 502 to perform the methods described herein. For example, the application programs 510 may include applications 1-N, further including a video encoding application that performs the methods described herein. The device 500 may also include additional memory in the form of a secondary storage 514, which may be, for example, a memory card used with a mobile computing device. Because video communication sessions may include a significant amount of information, they may be stored in whole or in part in the secondary storage 514 and loaded into the memory 504 as needed for processing.

[0177] Device 500 may also include one or more output devices, such as a display 518. Display 518, in one example, may be a touch-sensitive display that combines a display with touch-sensitive elements operative to sense touch input. Display 518 may be coupled to processor 502 via bus 512. Other output devices that enable a user to program or use device 500 may be provided in addition to or as an alternative to display 518. When an output device is or includes a display, the display may be implemented in a variety of ways, including a liquid crystal display (LCD), a cathode-ray tube (CRT) display, a plasma display, or a light emitting diode (LED) display, such as an organic LED (OLED) display.

[0178] Device 500 may also include or communicate with an image sensing device 520, such as a camera or any other existing or future developed image sensing device 520 capable of sensing images, such as an image of a user operating device 500. Image sensing device 520 may be positioned to be pointed at a user operating device 500. In one example, the position and optical axis of image sensing device 520 may be configured such that the field of view includes an area immediately adjacent to display 518 and from which display 518 is visible.

[0179] Device 500 may also include or communicate with a voice sensing device 522, such as a microphone or any other existing or future developed voice sensing device capable of sensing sound proximate device 500. Voice sensing device 522 may be positioned to face a user operating device 500 and configured to receive sound, e.g., speech or other utterances, generated by the user while the user is operating device 500.

[0180] Although FIG. 5 depicts the processor 502 and memory 504 of device 500 as integrated in a single unit, other configurations are available. The operations of processor 502 may be distributed across multiple machines (each machine having one or more processors) that may be directly coupled or across a local area or other network. Memory 504 may be distributed across multiple machines, such as a network-based memory or memory among multiple machines that perform the operations of device 500. Although shown here as a single bus, bus 512 of device 500 may be comprised of multiple buses. Additionally, secondary storage 514 may be directly coupled to other components of device 500 or may be accessible over a network, and may include a single integrated unit such as a memory card or multiple units such as multiple memory cards. Device 500 may thus be implemented in a variety of configurations.

[0181] Video coding such as H.265 / HEVC or H.266 / VCC is based on a hybrid prediction and transformation framework. A coding tree unit (CTU) is divided into one or more coding units (CUs). A CU may contain one luma block and two chroma blocks (e.g., YUV4:2:0 or YUV4:4:4 format), or a CU may contain only one luma block, or a CU may contain only two chroma blocks. A CU may correspond to a prediction unit (PU) and a transform unit (TU), or a prediction unit and multiple transform units. A prediction unit includes a prediction block of prediction samples, and a transform unit includes a transform block of residual samples. A reconstructed sample of a CU is obtained by adding a prediction sample with a corresponding residual sample.

[0182] At the encoder, prediction information (e.g., prediction mode and motion vector information) and residual information (e.g., transform mode, transform coefficients, and quantization parameters) of a CU are determined by rate-distortion optimization, and then coded into a bitstream. At the decoder, the prediction information and residual information are parsed. According to the prediction information, intra or inter prediction is performed to generate prediction samples of a prediction unit. According to the residual information, inverse quantization and inverse transformation are performed to generate residual samples of a transform unit. The prediction samples and residual samples are summed to obtain reconstructed samples of a coding unit.

[0183] The basic transform mode is that the residual of a CU is transformed into one TU. That is, the CU size is equal to the TU size. In the Residual Quad-Tree (RQT) in HEVC, the CU size may be divided into four TUs of equal size, and the information of whether each TU has residual is signaled by the coded block flags (cbf) of each TU. The information of whether a CU has residual is signaled by the root cbf of the CU (e.g., the rqt_root_cbf syntax element in HEVC).

[0184] The Adaptive Multiple core Transform (AMT) in VTM allows one transform block to use one transform type among a set of transform types. The transform type is signaled in the bitstream, and specifies the horizontal (or row) and vertical (or column) transforms of the transform block. Possible core transforms for the horizontal / vertical transform include Discrete Sine Transform (DST) and Discrete Cosine Transform (DCT), such as DST-7 (DST type 7), DST-1, DCT-8, DCT-2, and DCT-5. In alternative implementations, throughout this disclosure, DST-7 may be replaced with DST-4, and DCT-8 may be replaced with DCT-4. Thus, possible core transforms for horizontal / vertical transformation include Discrete Sine Transform (DST) and Discrete Cosine Transform (DCT), such as DST-4 (DST type 4), DST-1, DCT-4, DCT-2, and DCT-5.

[0185] In order to improve the transform coding efficiency, a new transform mode of CU is introduced in the present invention. For each new transform mode, it is estimated that a CU is tiled into N (N=2, 3, or 4) TUs, and only one TU of the CU has residual, and the remaining N-1 TUs of the CU have no residual. Furthermore, the transform type of the TU with residual (i.e., horizontal and vertical transform) is specified by the transform mode. In other words, each new transform mode specifies the TU partition, only one TU with residual, and the transform type of rTU with residual.

[0186] One embodiment of the present disclosure describes a process for decoding a coding unit. A bitstream including at least one picture of video data is decoded. The picture is divided into a number of rectangular image regions, each region corresponding to a coding tree unit (CTU). The CTU is divided into a number of coding units according to block partition information included in the bitstream. Coding information of the coding unit is parsed from the bitstream, and pixels of the coding unit are reconstructed based on the coding information. The coding information includes prediction information and transformation information.

[0187] The prediction information indicates a prediction mode of the CU (i.e., inter prediction or intra prediction). If the prediction mode is intra prediction, the prediction information may further include an intra prediction mode, such as planar mode, DC mode, and directional mode in HEVC and VCC. If the prediction mode is inter prediction, the prediction information may further include skip mode or merge mode or advanced motion vector prediction (AMVP) mode, merge candidate index, inter prediction direction, reference frame index, motion vector, whether to use prediction based on an affine model, etc.

[0188] The transform information indicates the transform mode of the CU and the transform coefficients associated with one or more TUs in the CU. Apart from the conventional transform modes in which the residual of the CU is transformed into a TU of the same size as the CU, the present embodiment also utilizes new transform modes. For each of the new transform modes, the CU is tiled into N (N=2, 3, or 4) TUs, and it is estimated that only one TU has a residual and the remaining N-1 TUs have no residual. Furthermore, the transform type of the TU with the residual (i.e., horizontal and vertical transform) is specified by the transform mode.

[0189] In one example, the new transform modes include the following four modes: Q0, Q1, Q2, and Q3, as shown in Figure 6. For each of the four modes, a CU of size W x H is divided into four TUs of size (W / 2) x (H / 2), namely, TU0 at the top left, TU1 at the top right, TU2 at the bottom left, and TU3 at the bottom right. Only one of TU0, TU1, TU2, and TU3 has a residual. 1) Transform mode Q0: TU0 has a residual, and the horizontal transform and vertical transform of TU0 are DCT-8 and DCT-8, respectively. 2) Transform mode Q1: TU1 has a residual, and the horizontal transform and vertical transform of TU1 are DST-7 and DCT-8, respectively. 3) Transform mode Q2: TU2 has a residual, and the horizontal transform and vertical transform of TU2 are DCT-8 and DST-7, respectively. 4) Transform mode Q3: TU3 has a residual, and the horizontal transform and vertical transform of TU3 are DST-7 and DST-7, respectively. In an alternative implementation method, DST-7 may be replaced by DST-4, and DCT-8 may be replaced by DCT-4 throughout this disclosure. Thus, in another example, the new transform modes include the following four modes: Q0, Q1, Q2, and Q3, as shown in Figure 6. For each of the four modes, a CU of size W x H is divided into four TUs of size (W / 2) x (H / 2), namely, TU0 at the top left, TU1 at the top right, TU2 at the bottom left, and TU3 at the bottom right. Only one of TU0, TU1, TU2, and TU3 has a residual. 1) Transform mode Q0: TU0 has a residual, and the horizontal transform and vertical transform of TU0 are DCT-4 and DCT-4, respectively. 2) Transform mode Q1: TU1 has a residual, and the horizontal transform and vertical transform of TU1 are DST-4 and DCT-4, respectively. 3) Transform mode Q2: TU2 has a residual, and the horizontal transform and vertical transform of TU2 are DCT-4 and DST-4, respectively. 4) Transform mode Q3: TU3 has a residual, and the horizontal transform and vertical transform of TU3 are DST-4 and DST-4, respectively.

[0190] For TUs with residual, the coded block flags (cbf) of three components, namely Cb, Cr, and Y components, may be parsed from the bitstream, and the value of cbf of at least one of the three components is 1. For each of the remaining TUs without residual, the cbf of all color components is estimated to be 0, i.e., no cbf is parsed from the bitstream.

[0191] In another example, the new transform modes include the following four modes: HQ0, HQ1, VQ0, and VQ1, as shown in Figure 7. For each of the four modes, a CU of size WxH is divided into two TUs of unequal size, and only the TU of the smaller size has a residual. 1) Transform mode HQ0: A CU is divided into two TUs by horizontal division, i.e., TU0 of size W × (H / 4) and TU1 of size W × (3H / 4), and the upper TU0 has a residual, the horizontal transform of TU0 is a predetermined core transform, for example, DCT-7 or DCT-2, and the vertical transform of TU0 is DCT-8. 2) Transform mode HQ1: The CU is divided into two TUs by horizontal division, i.e., TU0 of size W×(3H / 4) and TU1 of size W×(H / 4), the bottom TU1 has the residual, the horizontal transform of TU1 is a predetermined core transform, for example, DST-7 or DCT-2, and the vertical transform of TU1 is DST-7. 3) Transform mode VQ0: The CU is divided into two TUs by vertical division, namely TU0 with size (W / 4)×H and TU1 with size (3W / 4)×H, the left TU0 has the residual, the horizontal transform of TU0 is DCT-8, and the vertical transform of TU0 is a predetermined core transform, such as DCT-7 or DCT-2. 4) Transform mode VQ1: the CU is divided into two TUs by vertical division, namely TU0 with size (3W / 4)×H and TU1 with size (W / 4)×H, the right TU1 has the residual, the horizontal transform of TU1 is DST-7, and the vertical transform of TU1 is a predetermined core transform, such as DST-7 or DCT-2. In an alternative implementation method, throughout this disclosure, DST-7 may be replaced with DST-4, and DCT-8 may be replaced with DCT-4. Thus, in another example, the new transform modes include the following four modes: HQ0, HQ1, VQ0, and VQ1, as shown in Figure 7. For each of the four modes, a CU of size WxH is divided into two TUs of unequal size, and only the TU of the smaller size has a residual. 1) Transform mode HQ0: A CU is divided into two TUs by horizontal division, namely TU0 with size W×(H / 4) and TU1 with size W×(3H / 4), and the upper TU0 has a residual, and the horizontal transform of TU0 is a predefined core transform, for example DST-4 or DCT-2, and the vertical transform of TU0 is DCT-4. As an example, the horizontal transform of TU0 is always DST-4 or always DCT-2. As another example, the horizontal transform of TU0 is DCT-2 when the width of TU0 is greater than a threshold MaxMtsSize (for example, MaxMtsSize=32), and the horizontal transform of TU0 is DST-4 when the width of TU0 is equal to or smaller than a threshold MaxMtsSize. 2) Transform mode HQ1: The CU is divided into two TUs by horizontal division, i.e., TU0 of size W×(3H / 4) and TU1 of size W×(H / 4), the bottom TU1 has the residual, the horizontal transform of TU1 is a predetermined core transform, for example, DST-4 or DCT-2, and the vertical transform of TU1 is DST-4. 3) Transform mode VQ0: CU is divided into two TUs by vertical division, namely TU0 with size (W / 4)×H and TU1 with size (3W / 4)×H, the left TU0 has the residual, the horizontal transform of TU0 is DCT-4, and the vertical transform of TU0 is a predefined core transform, for example DST-4 or DCT-2. As an example, the vertical transform of TU0 is always DST-4 or always DCT-2. As another example, the vertical transform of TU0 is DCT-2 if the height of TU0 is greater than the threshold MaxMtsSize, and the vertical transform of TU0 is DST-4 if the height of TU0 is less than or equal to the threshold MaxMtsSize. 4) Transform mode VQ1: the CU is divided into two TUs by vertical division, namely TU0 with size (3W / 4)×H and TU1 with size (W / 4)×H, the right TU1 has the residual, the horizontal transform of TU1 is DST-4, and the vertical transform of TU1 is a predetermined core transform, such as DST-4 or DCT-2.

[0192] In one example, the new transform modes include the following four modes: HH0, HH1, VH0, and VH1, as shown in Figure 8. For each of the four modes, a CU of size WxH is divided into two TUs of equal size, and only one TU has a residual. 1) Transform mode HH0: A CU is divided into two TUs by horizontal division, i.e., TU0 of size W×(H / 2) and TU1 of size W×(H / 2), where the upper TU0 has a residual, the horizontal transform of TU0 is a predetermined core transform, e.g., DCT-7 or DCT-2, and the vertical transform of TU0 is DCT-8. 2) Transform mode HH1: A CU is divided into two TUs by horizontal division, i.e., TU0 of size W×(H / 2) and TU1 of size W×(H / 2), the bottom TU1 has the residual, the horizontal transform of TU1 is a predetermined core transform, for example, DST-7 or DCT-2, and the vertical transform of TU1 is DST-7. 3) Transform mode VH0: The CU is divided into two TUs by vertical division, i.e., TU0 of size (W / 2)×H and TU1 of size (W / 2)×H, the left TU0 has the residual, the horizontal transform of TU0 is DCT-8, and the vertical transform of TU0 is a predetermined core transform, such as DCT-7 or DCT-2. 4) Transform mode VH1: the CU is divided into two TUs by vertical division, i.e., TU0 of size (W / 2)×H and TU1 of size (W / 2)×H, the right TU1 has the residual, the horizontal transform of TU1 is DST-7, and the vertical transform of TU1 is a predetermined core transform, such as DST-7 or DCT-2. In an alternative implementation method, throughout this disclosure, DST-7 may be replaced with DST-4, and DCT-8 may be replaced with DCT-4. Thus, in one example, the new transform modes include the following four modes: HH0, HH1, VH0, and VH1, as shown in Figure 8. For each of the four CUs, the CU of size WxH is divided into two TUs of equal size, and only one TU has a residual. 1) Transform mode HH0: A CU is divided into two TUs by horizontal division, namely TU0 with size W×(H / 2) and TU1 with size W×(H / 2), and the upper TU0 has a residual, and the horizontal transform of TU0 is a predefined core transform, for example DST-4 or DCT-2, and the vertical transform of TU0 is DCT-4. As an example, the horizontal transform of TU0 is always DST-4 or always DCT-2. As another example, the horizontal transform of TU0 is DCT-2 when the width of TU0 is greater than a threshold MaxMtsSize (for example, MaxMtsSize=32), and the horizontal transform of TU0 is DST-4 when the width of TU0 is equal to or smaller than a threshold MaxMtsSize. 2) Transform mode HH1: A CU is divided into two TUs by horizontal division, i.e., TU0 of size W×(H / 2) and TU1 of size W×(H / 2), the bottom TU1 has the residual, the horizontal transform of TU1 is a predetermined core transform, for example, DST-4 or DCT-2, and the vertical transform of TU1 is DST-4. 3) Transform mode VH0: CU is divided into two TUs by vertical division, namely TU0 with size (W / 2)×H and TU1 with size (W / 2)×H, the left TU0 has the residual, the horizontal transform of TU0 is DCT-4, and the vertical transform of TU0 is a predefined core transform, for example DST-4 or DCT-2. As an example, the vertical transform of TU0 is always DST-4 or always DCT-2. As another example, the vertical transform of TU0 is DCT-2 when the height of TU0 is greater than the threshold MaxMtsSize, and the vertical transform of TU0 is DST-4 when the height of TU0 is less than or equal to the threshold MaxMtsSize. 4) Transform mode VH1: the CU is divided into two TUs by vertical division, i.e., TU0 of size (W / 2)×H and TU1 of size (W / 2)×H, the right TU1 has the residual, the horizontal transform of TU1 is DST-4, and the vertical transform of TU1 is a predetermined core transform, such as DST-4 or DCT-2.

[0193] In another example, the new transform mode includes the following two modes: HH2 and VH2, as shown in Figure 9. For each of the two modes, a CU of size WxH is divided into three TUs, and only the TUs with half the size of the CU have residuals. 1) Transform mode HH2: A CU is divided horizontally into three TUs, namely, TU0 of size W × (H / 4), TU1 of size W × (H / 2), and TU2 of size W × (H / 4), in which the central TU1 has the residual, and the horizontal and vertical transforms of TU0 are DST-7 and DCT-2 (or DST-7 and DST-1), respectively. 2) Transform mode VH2: The CU is divided vertically into three TUs, namely, TU0 with size (W / 4)×H, TU1 with size (W / 2)×H, and TU2 with size (W / 4)×H, in which the central TU1 has the residual, and the horizontal and vertical transforms of TU1 are DCT-2 and DST-7 (or DST-1 and DST-7), respectively. In an alternative implementation method, DST-7 may be replaced with DST-4, and DCT-8 may be replaced with DCT-4 throughout this disclosure. Thus, in another example, the new transform modes include the following two modes: HH2 and VH2, as shown in Figure 9. For each of the two modes, a CU of size WxH is divided into three TUs, and only the TUs with half the size of the CU have a residual. 1) Transform mode HH2: A CU is divided horizontally into three TUs, namely, TU0 of size W × (H / 4), TU1 of size W × (H / 2), and TU2 of size W × (H / 4), in which the central TU1 has the residual, and the horizontal and vertical transforms of TU0 are DST-4 and DCT-2 (or DST-4 and DST-1), respectively. 2) Transform mode VH2: The CU is divided vertically into three TUs, namely, TU0 with size (W / 4)×H, TU1 with size (W / 2)×H, and TU2 with size (W / 4)×H, in which the central TU1 has the residual, and the horizontal and vertical transforms of TU1 are DCT-2 and DST-4 (or DST-1 and DST-4), respectively.

[0194] In another example, the new transform modes include the following four modes: QH0, QH1, QH2, and QH3, as shown in Figure 10. For each of the four modes, a CU of size W x H is divided into three TUs, namely UT0, TU1, and TU2, two of which are size (W / 2) x (H / 2) and the other one of which is size W x (H / 2). Only one of the TUs of size (W / 2) x (H / 2) has a residual. 1) Transform mode QH0: The top-left TU0 has a residual, and the horizontal transform and vertical transform of TU0 are DCT-8 and DCT-8, respectively. 2) Transform mode QH1: The top-right TU1 has a residual, and the horizontal transform and vertical transform of TU1 are DST-7 and DCT-8, respectively. 3) Transform mode QH2: The bottom-left TU1 has a residual, and the horizontal transform and vertical transform of TU1 are DCT-8 and DST-7, respectively. 4) Transform mode QH3: The bottom-right TU2 has a residual, and the horizontal transform and vertical transform of TU2 are DST-7 and DST-7, respectively. In an alternative implementation method, DST-7 may be replaced by DST-4, and DCT-8 may be replaced by DCT-4 throughout this disclosure. Thus, in another example, the new transform modes include the following four modes: QH0, QH1, QH2, and QH3, as shown in Figure 10. For each of the four modes, a CU of size W x H is divided into three TUs, namely UT0, TU1, and TU2, two of which are size (W / 2) x (H / 2) and the other one of which is size W x (H / 2). Only one of the TUs of size (W / 2) x (H / 2) has a residual. 1) Transform mode QH0: The top-left TU0 has a residual, and the horizontal transform and vertical transform of TU0 are DCT-4 and DCT-4, respectively. 2) Transform mode QH1: The top-right TU1 has a residual, and the horizontal transform and vertical transform of TU1 are DST-4 and DCT-4, respectively. 3) Transform mode QH2: The bottom-left TU1 has a residual, and the horizontal transform and vertical transform of TU1 are DCT-4 and DST-4, respectively. 4) Transform mode QH3: The bottom-right TU2 has a residual, and the horizontal transform and vertical transform of TU2 are DST-4 and DST-4, respectively.

[0195] In one example, the new transform modes include the following four modes: QV0, QV1, QV2, and QV3, as shown in Figure 11. For each of the four modes, a CU of size W x H is divided into three TUs, namely UT0, TU1, and TU2, two of which are size (W / 2) x (H / 2) and the other one of which is size (W / 2) x H. Only one of the TUs of size (W / 2) x (H / 2) has a residual. 1) Transform mode QV0: The top-left TU0 has a residual, and the horizontal and vertical transforms of TU0 are DCT-8 and DCT-8, respectively. 2) Transform mode QV1: The top right TU1 has a residual, and the horizontal and vertical transforms of TU1 are DST-7 and DCT-8, respectively. 3) Transform mode QV2: The bottom-left TU1 has a residual, and the horizontal and vertical transforms of TU1 are DCT-8 and DST-7, respectively. 4) Transform mode QV3: The bottom right TU2 has a residual, and the horizontal transform and vertical transform of TU2 are DST-7 and DST-7, respectively. In an alternative implementation method, DST-7 may be replaced by DST-4, and DCT-8 may be replaced by DCT-4 throughout this disclosure. Thus, in one example, the new transform modes include the following four modes: QV0, QV1, QV2, and QV3, as shown in Figure 11. For each of the four modes, a CU of size W x H is divided into three TUs, namely UT0, TU1, and TU2, two of which are size (W / 2) x (H / 2) and the other one of which is size (W / 2) x H. Only one of the TUs of size (W / 2) x (H / 2) has a residual. 1) Transform mode QV0: The top-left TU0 has a residual, and the horizontal and vertical transforms of TU0 are DCT-4 and DCT-4, respectively. 2) Transform mode QV1: The top-right TU1 has a residual, and the horizontal and vertical transforms of TU1 are DST-4 and DCT-4, respectively. 3) Transform mode QV2: The bottom-left TU1 has a residual, and the horizontal and vertical transforms of TU1 are DCT-4 and DST-4, respectively. 4) Transform mode QV3: The bottom right TU2 has a residual, and the horizontal transform and vertical transform of TU2 are DST-4 and DST-4, respectively.

[0196] In one example, the new transformation modes allowed for a CU include six modes among the above-mentioned modes: HH0, HH1, HH2, VH0, VH1, and VH2. A slice-level flag may be used to signal whether the six transformation modes are allowed for a particular slice. If a new transformation mode is allowed for a CU, it means that when decoding the CU, the target transformation mode of the residual TU of the CU can be obtained among the new transformation modes allowed for the CU. The new transformation modes allowed for a CU may be a subset of the above-mentioned 22 transformation modes, and thus can reduce the candidate transformation modes of the target transformation mode to improve the decoding efficiency and reduce the bits required to transmit the index / indexes indicating the target transformation mode to save the bandwidth required to transmit the encoded video data. It should be noted that the new transformation modes allowed for a CU may be predefined / predetermined or determined in real-time, and when the new transformation modes allowed for a CU are predefined / predetermined / determined, the decoder will know which new transformation modes are the candidate transformation modes for the residual TU of the CU.

[0197] In one example, the new conversion modes allowed for the CU include eight of the modes mentioned above: Q0, Q1, Q2, Q3, HQ0, HQ1, VQ0, and VQ1.

[0198] In one example, the new conversion modes allowed for the CU include eight of the modes mentioned above: QH0, QH1, QH2, QH3, HQ0, HQ1, VQ0, and VQ1.

[0199] In one example, the new conversion modes allowed for the CU include eight of the modes mentioned above: QV0, QV1, QV2, QV3, HQ0, HQ1, VQ0, and VQ1.

[0200] In one example, the new conversion modes allowed for the CU include eight of the conversion modes mentioned above: HH0, HH1, VH0, VH1, HQ0, HQ1, VQ0, and VQ1.

[0201] In one example, the new conversion modes allowed for the CU include 12 of the modes mentioned above: Q0, Q1, Q2, Q3, HQ0, HQ1, VQ0, VQ1, HH0, HH1, VH0, and VH1.

[0202] In one example, the new conversion modes allowed for the CU include 14 of the modes mentioned above: Q0, Q1, Q2, Q3, HQ0, HQ1, VQ0, VQ1, HH0, HH1, HH2, VH0, VH1, and VH2.

[0203] In one example, the new conversion modes allowed for the CU include 14 of the modes mentioned above: QH0, QH1, QH2, QH3, HQ0, HQ1, VQ0, VQ1, HH0, HH1, HH2, VH0, VH1, and VH2.

[0204] In one example, the new transform modes allowed for multiple CUs in a slice are signaled in the sequence parameter set (SPS) or slice header of the slice. Modes HH0, HH1, HH2, VH0, VH1, and VH2 are grouped as a first group. Modes Q0, Q1, Q2, Q3, HQ0, HQ1, VQ0, and VQ1 are grouped as a second group. The enablement of each group is signaled by one flag: a first flag is signaled to indicate whether the first mode group is allowed or not, and a second flag is signaled to indicate whether the second mode group is allowed or not.

[0205] In one example, new transform modes allowed for multiple CUs in a slice are signaled in the sequence parameter set or slice header of the slice. Modes HH0, HH1, VH0, and VH1 are grouped as a first group. Modes Q0, Q1, Q2, and Q3 are grouped as a second group. Modes HQ0, HQ1, VQ0, and VQ1 are grouped as a third group. One index is signaled to indicate which of the three groups are allowed. An index value of 0 indicates that all three groups are not allowed, an index value of 1 indicates that only the first group is allowed, an index value of 2 indicates that the second group is allowed, an index value of 3 indicates that the third group is allowed, an index value of 4 indicates that both the second and third groups are allowed, and an index value of 5 indicates that all three groups are allowed.

[0206] The new transform mode may be applied to all CUs or may be applied to CUs according to the prediction information of the CU. In one example, the new transform mode is applied only to intra-predicted CUs. In another example, the new transform mode is applied only to inter-predicted CUs. In another example, the new transform mode may be allowed for CUs using a particular inter-prediction method (e.g., motion compensation based on a translation model) but not for CUs using other inter-prediction methods (e.g., motion compensation based on an affine model). In another example, the new transform mode may be allowed for CUs predicted by merge mode or by advanced motion vector prediction (AMVP) mode with 1 / 4-pel motion vector difference accuracy, but not for CUs using affine merge mode, affine inter mode, or AMVP mode with 1-pel or 4-pel motion vector difference accuracy. In another example, the new transform mode may be allowed for CDUs using merge modes with merge indexes smaller than 2 but not for CUs using merge modes with merge indexes not smaller than 2. The merge mode and AMVP mode may be referenced in the H.265 / HEVC standard. The affine merge mode and the affine inter mode may be referred to in the Joint Exploration Model (JEM) codec by the Joint Video Exploration Team (JVET).

[0207] The new transform modes may be allowed according to the size of the CU. In one example, if a CU tiled with one of the transform modes results in a TU with one side smaller than a threshold (e.g., 4 or 8 or 16 luma pixels, etc.), the transform mode is not allowed for the CU. In one example, if a CU tiled with one of the transform modes results in a TU with one side larger than a threshold (e.g., 32 or 64 or 128 luma pixels, etc.), the transform mode is not allowed for the CU. In one example, a CU with one side (i.e., width or height) larger than a threshold (e.g., 32 or 64 luma pixels) is not allowed to use the new transform mode.

[0208] FIG. 12 shows a decoding method of one embodiment of the present disclosure, which includes:

[0209] 1201. Parse the received bitstream to obtain prediction information of the CU.

[0210] This is a process commonly used in video decoding, such as parsing the coding unit and prediction unit syntax structures in H.265 / HEVC or H.266 / VCC.

[0211] 1202. When a CU has only one residual transform unit (TU) and the size of the residual TU is smaller than the size of the CU, obtain a target transform mode of the residual TU, where the target transform mode specifies the TU partition mode of the CU, the position of the residual TU (e.g., indicated by the index of the residual TU among all TUs of the CU, or indicated by the coordinate of the upper-left corner of the residual TU and the width and height of the residual TU), and the transform type of the residual TU.

[0212] The target conversion mode is any one of the modes mentioned above: Q0, Q1, Q2, Q3, HQ0, HQ1, VQ0, VQ1, HH0, HH1, VH0, VH1, HH2, VH2, QH0, QH1, QH2, QH3, QV0, QV1, QV2, and QV3.

[0213] In some implementation methods, to improve decoding efficiency, the existence of transform unit information in Cu is first checked. The existence of transform unit information may be indicated by a root cbf syntax element. A root cbf equal to 0 indicates that the transform unit information of the CU is not present in the bitstream (i.e., the CU has no residual), while a root cbf equal to 1 indicates that the transform unit information of the CU is present in the bitstream. For an inter-predicted CU, a root cbf equal to 1 means that the CU has a residual. Step 1102 is performed when the CU has transform unit information. When the CU does not have transform unit information, the residual of the CU is set as zero, and step 1105 is performed directly.

[0214] 1203. Parse the received bitstream to obtain transform coefficients of the residual TU.

[0215] This is a process commonly used in video decoding.

[0216] 1204. Apply inverse quantization to the transform coefficients of the residual TU to obtain inverse quantized coefficients.

[0217] This is a process commonly used in video decoding.

[0218] 1205. Apply an inverse transform to the dequantized coefficients based on a target transform mode to obtain a residual block of the residual TU.

[0219] This is a commonly used process in video decoding: in addition to the residual TU, the residuals of other TUs of the CU are set as zero.

[0220] 1206. Obtain a predicted block of the CU based on the prediction information.

[0221] This is a process commonly used in video decoding, such as intra-prediction and inter-prediction in HEVC and VVC.

[0222] 1207. Obtain a video block based on the residual block and the prediction block.

[0223] This is a commonly used process in video decoding. In one implementation, a video block is obtained by adding a residual of a CU to a prediction of the CU.

[0224] 1208. Output a video sequence. The video sequence includes video frames that include video blocks.

[0225] This is a process commonly used in video decoding.

[0226] In one implementation method, obtaining a target transform mode of the residual TU includes parsing a bitstream to obtain a mode index indicating a target transform mode of the residual TU, and obtaining a target transform mode of the residual TU based on the mode index. For example, if 8 modes among the above-mentioned 22 target transform modes are allowed to be used in a slice, the mode index may be indicated by a mode index having M bins (e.g., M=3, 4, or 5). That is, the mode index may be binarized into M bins (where M may be different in different binarization schemes) in a Context-based Adaptive Binary Arithmetic Coding (CABAC) process, or the mode index may be represented by M flags.

[0227] In order to reduce bit allocation for the mode index, in a first implementation method, before the step of parsing the bitstream to obtain a mode index indicating a target transform mode of the residual TU, the method includes: determining a candidate target transformation mode for the residual TU based on a size of the previous CU; The step of parsing the bitstream to obtain a mode index indicating a target transform mode of the residual TU includes: Based on the candidate target transform modes of the residual TU, parsing the bitstream to obtain a mode index indicating the target transform mode of the residual TU. Thus, depending on the size of the CU, the number of candidate target transform modes may be less than eight, and thus one or more bins of mode flags may be saved.

[0228] The candidate target transformation modes may be based on the CU size. For example, when the width of the CU is in the range of [Th1×2, Th3] and the height of the CU is in the range of [Th1×2, Th3], the candidate target transformation modes may include transformation mode Q0, transformation mode Q1, transformation mode Q2, and transformation mode Q3.

[0229] For example, when the width of a CU is in the range of [Th1×4, Th3] and the height of a CU is in the range of [Th1, Th2], the candidate target transformation modes may include transformation mode VQ0, transformation mode VQ1, and transformation mode VH2.

[0230] For example, when the width of the CU is in the range of [Th1×2, Th2] and the height of the CU is in the range of [Th1, Th2], the candidate target transformation modes may include the transformation mode VH0 and the transformation mode VH1.

[0231] For example, when the height of a CU is in the range of [Th1×4, Th3] and the width of a CU is in the range of [Th1, Th2], the candidate target transformation modes may include transformation mode HQ0, transformation mode HQ1, and transformation mode HH2.

[0232] For example, when the height of a CU is in the range of [Th1×2, Th2] and the width of a CU is in the range of [Th1, Th2], the candidate target transformation modes may include transformation mode HH0 and transformation mode HH1.

[0233] For example, when the width of a CU is in the range of [Th1×2, Th2] and the height of a CU is in the range of [Th1×2, Th2], the candidate target transformation modes may include transformation mode Q0, transformation mode Q1, transformation mode Q2, and transformation mode Q3.

[0234] For example, when the width of a CU is in the range of [Th1×4, Th2] and the height of a CU is in the range of [Th1, Th2], the candidate target transformation modes may include transformation mode VQ0, transformation mode VQ1, and transformation mode VH2.

[0235] For example, when the width of the CU is in the range of [Th1×2, Th2] and the height of the CU is in the range of [Th1, Th2], the candidate target transformation modes may include the transformation mode VH0 and the transformation mode VH1.

[0236] For example, when the height of the CU is in the range of [Th1×4, Th2] and the width of the CU is in the range of [Th1, Th2], the candidate target transformation modes may include transformation mode HQ0, transformation mode HQ1, and transformation mode HH2.

[0237] For example, when the height of a CU is in the range of [Th1×2, Th2] and the width of a CU is in the range of [Th1, Th2], the candidate target transformation modes may include transformation mode HH0 and transformation mode HH1.

[0238] Th1, Th2, and Th3 are predefined integer values, for example, Th1 is 4, 8, or 16, Th2 is 32, 64, or 128, and Th3 is 64, 128, or 256.

[0239] In another implementation, in order to reduce the bit allocation for indicating the target transform mode, the above 22 modes are grouped into a mode group. For example, a mode group may include at least one mode group as follows: The mode group includes: conversion mode HH0, conversion mode HH1, conversion mode HH2, conversion mode VH0, conversion mode VH1, and conversion mode VH2; The mode group includes conversion mode Q0, conversion mode Q1, conversion mode Q2, conversion mode Q3, conversion mode HQ0, conversion mode HQ1, conversion mode VQ0, and conversion mode VQ1; The mode group includes conversion modes HH0, HH1, HH2, VH0, VH1, and VH2; The mode group includes conversion mode Q0, conversion mode Q1, conversion mode Q2, conversion mode Q3, conversion mode HQ0, conversion mode HQ1, conversion mode VQ0, and conversion mode VQ1; The mode group includes: conversion mode QH0, conversion mode QH1, conversion mode QH2, conversion mode QH3, conversion mode HQ0, conversion mode HQ1, conversion mode VQ0, and conversion mode VQ1; The mode group includes: conversion mode QV0, conversion mode QV1, conversion mode QV2, conversion mode QV3, conversion mode HQ0, conversion mode HQ1, conversion mode VQ0, and conversion mode VQ1; The mode group includes: conversion mode Q0, conversion mode Q1, conversion mode Q2, conversion mode Q3, conversion mode HQ0, conversion mode HQ1, conversion mode VQ0, conversion mode VQ1, conversion mode HH0, conversion mode HH1, conversion mode VH0, and conversion mode VH1; The mode group includes: translation mode Q0, translation mode Q1, translation mode Q2, translation mode Q3, translation mode HQ0, translation mode HQ1, translation mode VQ0, translation mode VQ1, translation mode HH0, translation mode HH1, translation mode HH2, translation mode VH0, translation mode VH1, and translation mode VH2; The mode group includes: conversion mode QH0, conversion mode QH1, conversion mode QH2, conversion mode QH3, conversion mode HQ0, conversion mode HQ1, conversion mode VQ0, conversion mode VQ1, conversion mode HH0, conversion mode HH1, conversion mode HH2, conversion mode VH0, conversion mode VH1, and conversion mode VH2; The mode group includes conversion mode HH0, conversion mode HH1, conversion mode VH0, and conversion mode VH1; The mode group includes conversion mode Q0, conversion mode Q1, conversion mode Q2, and conversion mode Q3; or The mode group includes a translation mode HQ0, a translation mode HQ1, a translation mode VQ0, and a translation mode VQ1.

[0240] Here, the step of obtaining the target transformation mode of the residual TU is as follows: Parsing the bitstream to obtain a group index indicating a mode group to which a target conversion mode belongs; parsing the bitstream to obtain a mode index indicating a target conversion mode within a mode group; and obtaining a target transformation mode based on the group index and the mode index.

[0241] In one implementation method, prior to the step of parsing the bitstream to obtain a group index indicating a mode group to which the target conversion mode belongs, the method includes: determining at least one candidate mode group for the residual TU based on a size of the CU; Correspondingly, the method further includes parsing the bitstream based on the at least one candidate mode group of the residual TU to obtain a group index indicating a mode group to which the target transform mode belongs.

[0242] For example, when the width of a CU is in the range of [Th1×2, Th3] and the height of a CU is in the range of [Th1×2, Th3], the candidate mode group includes a mode group including transformation mode Q0, transformation mode Q1, transformation mode Q2, and transformation mode Q3.

[0243] For example, when the width of the CU is in the range of [Th1×4, Th3] and the height of the CU is in the range of [Th1, Th2], the candidate mode groups include a mode group including transformation mode VQ0, transformation mode VQ1, and transformation mode VH2.

[0244] For example, when the width of a CU is in the range of [Th1×2, Th2] and the height of a CU is in the range of [Th1, Th2], the candidate mode groups include a mode group including a transform mode VH0 and a transform mode VH1.

[0245] For example, when the height of a CU is in the range of [Th1×4, Th3] and the width of a CU is in the range of [Th1, Th2], the candidate mode groups include a mode group including transformation mode HQ0, transformation mode HQ1, and transformation mode HH2.

[0246] For example, when the height of a CU is in the range of [Th1×2, Th2] and the width of a CU is in the range of [Th1, Th2], the candidate mode groups include a mode group including transform mode HH0 and transform mode HH1.

[0247] For example, when the width of a CU is in the range of [Th1×2, Th2] and the height of a CU is in the range of [Th1×2, Th2], the candidate mode group includes a mode group including transformation mode Q0, transformation mode Q1, transformation mode Q2, and transformation mode Q3.

[0248] For example, when the width of the CU is in the range of [Th1×4, Th2] and the height of the CU is in the range of [Th1, Th2], the candidate mode groups include a mode group including transformation mode VQ0, transformation mode VQ1, and transformation mode VH2.

[0249] For example, when the width of a CU is in the range of [Th1×2, Th2] and the height of a CU is in the range of [Th1, Th2], the candidate mode groups include a mode group including a transform mode VH0 and a transform mode VH1.

[0250] For example, when the height of the CU is in the range of [Th1×4, Th2] and the width of the CU is in the range of [Th1, Th2], the candidate mode group includes a mode group including a transform mode HQ0, a transform mode HQ1, and a transform mode HH2.

[0251] For example, when the height of a CU is in the range of [Th1×2, Th2] and the width of a CU is in the range of [Th1, Th2], the candidate mode groups include a mode group including transform mode HH0 and transform mode HH1.

[0252] The thresholds Th1, Th2, and Th3 are predefined integer values, for example, Th1 is 4, 8, or 16, Th2 is 32, 64, or 128, and Th3 is 64, 128, or 256.

[0253] In another implementation method, before the step of obtaining a target transformation mode for the residual TU, the method includes: The method further includes determining whether to obtain a target transformation mode for the residual TU according to the prediction information of the CU.

[0254] For example, when the prediction mode of the CU is an intra prediction mode, it is determined to obtain the target transformation mode of the residual TU.

[0255] For example, when the prediction mode of the CU is an inter prediction mode, it is determined to obtain the target transformation mode of the residual TU.

[0256] For example, when the prediction method of the CU is a preset positive prediction method, it is determined to obtain the target transformation mode of the residual TU. The preset positive prediction method is as follows: A motion compensation method based on a motion model; Merge prediction methods; An advanced motion vector prediction method with 1 / 4-pel motion vector difference accuracy; or Merge prediction methods with merge index less than 2; Includes at least one of the following:

[0257] For example, when the prediction method of the CU is a preset negative prediction method, it is determined not to obtain the target transformation mode of the residual TU. The preset negative prediction method is as follows: Affine model based motion compensation method; Affine merge prediction method; Affine inter prediction mode; Advanced motion vector prediction methods with 1-pel or 4-pel motion vector difference accuracy; or Merge prediction method with merge index not less than 2; Includes at least one of the following:

[0258] In another implementation method, before the step of obtaining the target transformation mode of the residual TU, the method further includes the step of determining whether to obtain the target transformation mode of the residual TU based on the size of the CU.

[0259] For example, when the width or height of a CU is greater than a preset CU threshold, it is determined not to obtain a target transform mode for the residual TU. The preset CU threshold may be 32 luma pixels, 64 luma pixels, or 128 luma pixels.

[0260] For example, when the width or height of a TU of a CU is smaller than a preset minimum TU threshold, it is determined not to obtain a target transform mode of the residual TU. The preset TU threshold may be 4 luma pixels, 8 luma pixels, or 16 luma pixels.

[0261] For example, when the width or height of a TU of a CU is greater than a preset maximum TU threshold, it is determined not to obtain a target transform mode of a residual TU. The preset maximum TU threshold may be 32 luma pixels, 64 luma pixels, or 128 luma pixels.

[0262] It should be noted that even according to the prediction information of the CU and / or the size of the CU, the step of determining to obtain the target transformation mode of the residual TU only means that the target transformation mode can be obtained, but does not mean that the target transformation mode is actually obtained. At the encoder side, which transformation mode to select to perform the transformation depends on many factors. That is, the above-mentioned new transformation modes (the above-mentioned 22 transformation modes) are added as candidates, and the already existing transformation modes (old transformation modes), such as the CU is transformed by one TU of the CU size, can still be used.

[0263] Therefore, based on having transform unit information per CU, when deciding to obtain a target transform mode of a residual TU according to the prediction information of the CU and / or the size of the CU, the bitstream parser may obtain a mode flag indicating an old transform mode. Therefore, when deciding not to obtain a target transform mode of a residual TU, this means that the old transform mode is used for the CU. When a CU is transformed by one TU of the CU size, the transform type of the residual TU may be DCT-2 for horizontal transform and DCT-2 for vertical transform by default, or may be signaled in the bitstream (e.g., AMT method in VRTM software, where multiple transform types are allowed for a TU and the transform type used by the TU is signaled).

[0264] For example, if the transformation modes of Q0, Q1, Q2, Q3, VQ0, VQ1, HQ0, HQ1, VH0, VH1, VH2, HH0, HH1, and HH2 are candidate target transformation modes for a CU, the decoder may first parse the bitstream to determine whether the CU uses one of the candidate target transformation modes or is transformed by one TU of the CU size. For example, a flag may be used to indicate whether the CU uses one of the candidate target transformation modes or is transformed by one TU of the CU size.

[0265] If the CU uses one of the candidate target transformation modes, parse the bitstream to obtain the transformation mode of the CU. In one method, Q0, Q1, Q2, and Q3 are grouped into group A, VQ0 and VQ1 are grouped into group B, HQ0 and HQ1 are grouped into group C, VH0, VH1, and VH2 are grouped into group D, and HH0, HH1, and HH2 are grouped into group E. First, determine the group to which the transformation mode of the CU belongs by parsing the group index, and then determine the target transformation mode within the group by parsing another index.

[0266] The parsing of the group index may be based on which mode groups are determined / predefined as complementary mode groups. For example, when group A and any other group are candidate mode groups, the first flag is parsed to determine whether the target conversion mode belongs to group A. Alternatively, if the first flag is not present in the bitstream, the conversion mode is presumed to belong to group A if group A is a candidate mode group, or to groups B, C, D, and E if group A is not a candidate mode group. If the target conversion mode belongs to groups B, C, D, and E, if both groups B / D and C / E are candidates, the second flag is parsed to determine whether the target conversion mode belongs to B / D (i.e., group B or D) or C / E. If only B / D is a candidate, or if only C / E is a candidate, the second flag can be presumed. If the conversion mode belongs to B / D, the third flag may be parsed to determine whether the target conversion mode belongs to B or B. Similarly, if the target transformation mode belongs to C / E, a third flag may be parsed to determine whether the target transformation mode belongs to C or not.

[0267] Similar to the parsing of the group index, the parsing of the index of the target transformation mode within the group may be based on which transformation modes are in the group.

[0268] For example, if transformation modes Q0, Q1, Q2, Q3, VQ0, VQ1, HQ0, and HQ1 are candidate target transformation modes for a CU, the decoder can first parse the bitstream to determine whether the CU uses one of the candidate target transformation modes or the CU is transformed by one TU of the CU size. For example, a flag may be used to indicate whether the CU uses one of the candidate target transformation modes or the CU is transformed by one TU of the CU size.

[0269] If the CU uses one of the candidate target transformation modes, parse the bitstream to obtain the transformation mode of the CU. In one method, transformation modes Q0, Q1, Q2, and Q3 are grouped into group A, VQ0 and VQ1 are grouped into group B, and HQ0 and HQ1 are grouped into group C. First, determine which group the target transformation mode belongs to by parsing the group index, and then determine the target transformation mode in the group by parsing the mode index.

[0270] The present disclosure further discloses a video decoder. The construction of the decoder is shown in FIG.

[0271] an entropy decoding unit 304 configured to parse the received bitstream to obtain a coding unit (CU), and when the residual TU is only a residual TU of a CU and the size of the residual TU is smaller than the size of the CU, obtain a target transform mode of the residual transform unit (TU), where the target transform mode specifies a TU partition mode of the CU, a position of the residual TU, and a transform type of the residual TU, and parse the received bitstream to obtain transform coefficients of the residual TU, where the target transform mode is the same as above.

[0272] An inverse quantization processing unit 310 configured to apply inverse quantization to the transform coefficients of the residual TU to obtain inverse quantized coefficients.

[0273] An inverse transform processing unit 312 configured to apply an inverse transform to the dequantized coefficients based on the target transform mode to obtain residual blocks of the residual TU.

[0274] A prediction processing unit 360 configured to obtain a prediction block of the CU based on the prediction information.

[0275] A reconstruction unit 314 configured to obtain a video block based on the residual block and the prediction block.

[0276] An output 332 configured to output a video sequence, the video sequence including video frames including video blocks.

[0277] In one implementation method, the entropy decoding unit 304 is further configured to parse the bitstream to obtain a mode index indicating a target transformation mode of the residual TU, and obtain the target transformation mode of the residual TU based on the mode index.

[0278] In one implementation method, the entropy decoding unit 304 determines candidate target transformation modes for the residual TU based on a size of the CU;

[0279] The method is further configured to parse the bitstream based on the candidate target transformation modes of the residual TU to obtain a mode index indicating a target transformation mode of the residual TU.

[0280] In one implementation method, the entropy decoding unit 304 is further configured to determine candidate target transformation modes for the residual TU according to the method described above.

[0281] In one implementation method, the entropy decoding unit 304 is further configured to parse the bitstream to obtain a group index indicating a mode group to which the target transformation mode belongs, parse the bitstream to obtain a mode index indicating the target transformation mode in the mode group, and obtain the target transformation mode based on the group index and the mode index.

[0282] Here, the target transformation mode belongs to any mode group as described above.

[0283] In one implementation, the entropy decoding unit 304 includes: Determine at least one candidate mode group for the residual TU based on a size of the CU; The mode group selector 200 is further configured to parse the bitstream based on the at least one candidate mode group of the residual TU to obtain a group index indicating a mode group to which the target transform mode belongs.

[0284] Wherein, the entropy decoding unit is further configured to determine at least one candidate mode group according to at least one of the methods mentioned above.

[0285] In one implementation method, the entropy decoding unit 304 is further configured to determine whether to obtain a target transformation mode for the residual TU based on the prediction information of the CU.

[0286] Here, the entropy decoding unit 304 is further configured to determine whether to obtain a target transformation mode of the residual TU according to at least one of the methods mentioned above.

[0287] In one implementation method, the entropy decoding unit 304 is further configured to determine whether to obtain a target transformation mode for the residual TU based on the size of the CU.

[0288] Here, the entropy decoding unit 304 is further configured to determine whether to obtain a target transformation mode of the residual TU according to at least one of the methods mentioned above.

[0289] The present disclosure further discloses a decoder including processing circuitry for performing the above-mentioned method.

[0290] The present disclosure further discloses a computer program product comprising program code for performing the above-mentioned method.

[0291] The present disclosure relates to a decoder, one or more processors; a non-transitory computer readable storage medium coupled to a processor and storing programming for execution by the processor, the programming, when executed by the processor, configuring the decoder to perform the method described above; A decoder including:

[0292] Figure 13 shows an example 1300 of intra prediction in video coding using intra prediction mode. As shown, a current block 1301 can be predicted by samples in a neighboring block 310. An encoder may typically code an image from top left to bottom right. However, an encoder may code from right to left in some cases as described below. Note that as used herein, right refers to the right side of the image being coded, left refers to the left side of the image being coded, and bottom refers to the bottom side of the image being coded.

[0293] It should be noted that the current block 1301 may not always exactly match the samples from the neighboring block 1310. In such cases, the prediction mode is coded from the closest matching neighboring block 1310. To allow the decoder to determine the correct value, the difference between the predicted and actual values ​​is kept. This is called residual information. Residual information occurs in both intra prediction 1300 and inter prediction.

[0294] FIG. 14 is a schematic diagram of an example video encoding mechanism 1400 based on intra prediction 1300 and / or inter prediction. An image block 1401 can be obtained by an encoder from one or more frames. For example, an image may be partitioned into a number of rectangular image regions. Each region of the image corresponds to a coding tree unit (CTU). The CTU is divided into a number of blocks, such as coding units in HEVC. The block partition information is then coded into a bitstream 1411. Thus, the image block 1401 is a partitioned portion of an image and contains pixels representing luma and / or chroma components in the corresponding portion of the image. During coding, the image block 1401 is coded as a prediction block 1403, which contains prediction information, such as a prediction mode for intra prediction and / or a motion vector for inter prediction. The coding of the image block 1401 as the prediction block 1403 then results in a residual block 1405, which contains residual information indicative of a difference between the prediction block 1403 and the image block 1401.

[0295] It should be noted that the image block 1401 may be divided as a coding unit including one prediction block 1403 and one residual block 1405. The prediction block 1403 may include all prediction samples of the coding unit, and the residual block 1405 may include all residual samples of the coding unit. In such a case, the prediction block 1403 has the same size as the residual block 1405. In another example, the image block 1401 may be divided as a coding unit including two prediction blocks 1403 and one residual block 1405. In such a case, each prediction block 1405 includes a part of the prediction samples of the coding unit, and the residual block 1405 includes all residual samples of the coding unit. It should be further noted that the image block 1401 may be divided as a coding unit including two prediction blocks 1403 and four residual blocks 1405. The partition pattern of the residual blocks 1405 within a coding unit may be signaled in the bitstream 1411. One such pattern may include a Residual Quad-Tree (RQT) in HEVC. In addition, the image block 1401 may only include a luma component (e.g., light), denoted as the Y component of an image sample (or pixel). In other cases, the image block 1401 may include the Y, U, and V components of an image sample, where U and V denote chrominance components (e.g., color) in blue-luminance and red-luminance (UV) color space.

[0296] SVT may be used to further compress information. Specifically, SVT further compresses the residual block 1405 using a transform block 1407. The transform block 1407 includes a transform such as an inverse DCT and / or an inverse DST. The difference between the prediction block 1403 and the image block 1401 is adapted to the transform by using the transform coefficients. By indicating the transform mode (e.g., inverse DCT and / or inverse DST) of the transform block 1407 and the corresponding transform coefficients, the decoder can reconstruct the residual block 1405. When exact reproduction is not required, the transform coefficients can be further compressed by rounding certain values ​​to produce a better fit for the transform. This process is known as quantization and is performed according to a quantization parameter that defines the allowable quantization. Therefore, the transform mode, transform coefficients, and quantization parameter of the transform block 1407 are stored as transformed residual information in the transformed residual block 1409, which may also be simply called the residual block in some cases.

[0297] The prediction information of the prediction block 1403 and the transformed residual information of the transformed residual block 1409 may then be coded into a bitstream 1411. The bitstream 1411 may be stored and / or transmitted to a decoder. The decoder may then perform the inverse process to reconstruct the image block 1401. Specifically, the decoder may use the transformed residual information to determine the transform block 1407. The transform block 1407 may then be used in conjunction with the transformed residual block 1409 to determine the residual block 1405. The residual block 1405 and the prediction block 1403 may then be used to reconstruct the image block 1401. The image block 1401 may then be positioned relative to other decoded image blocks 1401 to reconstruct the frame and position such frame to reconstruct the encoded video.

[0298] SVT is described in further detail herein. To perform SVT, the transform block 1407 is selected to be smaller than the residual block 1405. The transform block 1407 is utilized to transform the corresponding portion of the residual block 1405, resulting in the remainder of the residual block without additional coding / compression. This is because the residual information is usually not uniformly distributed across the residual block 1405. SVT utilizes a smaller transform block 1407 with an adaptive position to capture most of the residual information in the residual block 1405 without requiring the entire residual block 1405 to be transformed. This approach may achieve better coding efficiency than transforming the entire residual information in the residual block 1405. Because the transform block 1407 is smaller than the residual block 1405, SVT utilizes a mechanism to signal the position of the transform relative to the residual block 1405. For example, when the SVT is applied on a residual block 1405 of size w×h (e.g., width×height), the size and position of the transform block 1407 may be coded in the bitstream 1411. This allows a decoder to reconstruct the transform block 1407 and configure it in the correct position relative to the transformed residual block 1409 for reconstruction of the residual block 1405.

[0299] It should be noted that some prediction blocks 1403 can be coded without resulting in a residual block 1405. However, such cases do not result in the use of SVT and are not discussed further. As mentioned above, SVT may be utilized for inter-predicted blocks or intra-predicted blocks. Furthermore, SVT may be utilized for residual blocks 1405 generated by a specified inter prediction mechanism (e.g., motion compensation based on a translation model) but not for residual blocks 1405 generated by other specified inter prediction mechanisms (e.g., motion compensation based on an affine model).

[0300] FIG. 15 illustrates an exemplary SVT transform 1500 that may be utilized as the transform block 307 to encode the residual block 305. The SVT transforms 1500 are referred to as SVT-I, SVT-II, and SVT-III. SVT-I is defined as w_t=w / 2, h_t=h / 2, where w_t and h_t denote the width and height of the transform block, respectively, and w and h denote the width and height of the residual block, respectively. For example, the width and height of the transform block are both half the width and height of the residual block. SVT-II is defined as w_t=w / 4, h_t=h, where the variables are as described above. For example, the width of the transform block is one-quarter the width of the residual block, and the height of the transform block is equal to the height of the residual block. SVT-III is defined as w_t=w, h_t=h / 4, where the variables are as described above. For example, the width of the transform block is equal to the width of the residual block, and the height of the transform block is one-quarter of the height of the residual block. Type information indicating the type of the SVT block (e.g., SVT-I, SVT-II, or SVT-III) is coded in the bitstream to support reconstruction by a decoder.

[0301] As can be seen in FIG. 15, each transform can be located at various locations relative to the residual block. The location of the transform block is represented by a position offset (x,y) relative to the top left corner of the residual block, where x indicates the horizontal distance in pixels between the top left corner of the transform block and the top left corner of the residual block, and y indicates the vertical distance in pixels between the top left corner of the transform block and the top left corner of the residual block. Each possible location of the transform block within the residual block is referred to as a candidate location. In a residual block, the number of candidate locations is (w-w_t+1)×(h-h_t+1) for the type of SVT. More specifically, for a 16×16 residual block, there are 81 candidate locations when SVT-I is used. There are 13 candidate locations when SVT-II or SVT-III are used. Once determined, the x and y values ​​of the position offset are coded in the bitstream together with the type of SVT block utilized. To reduce the complexity of SVT-I, a subset of 32 positions can be selected from the 81 possible candidate positions. This subset then serves as the allowed candidate positions for SVT-1.

[0302] One drawback of the SVT scheme using the SVT transform 1500 is that encoding the SVT position information as residual information results in significant signaling overhead. Furthermore, as the number of positions tested by a compression quality process such as Rate-Distortion Optimization (RDO) increases, the encoder complexity may increase significantly. Since the number of candidate positions increases with the size of the residual block, the signaling overhead may be even larger for larger residual blocks, such as 32x32 or 64x128. Another drawback of using the SVT transform 1500 is that the size of the transform block is one-quarter of the size of the residual block. A transform block of such size may often not be large enough to cover the main residual information in the residual block.

[0303] 16 shows a further exemplary SVT transform 1600 that may be utilized as the transform block 307 to encode the residual block 305. The SVT transform 1600 is referred to as SVT vertical (SVT-V) and SVT horizontal (SVT-H). The SVT transform 1600 is similar to the SVT transform 1500, but is designed to support reduced signaling overhead and low-complexity processing requirements at the encoder.

[0304] SVT-V is defined as w_t=w / 2 and h_t=h, where the variables are as described above. The width of the transform block is half the width of the residual block, and the height of the transform block is equal to the height of the residual block. SVT-H is defined as w_t=w and h_t=h / 2, where the variables are as described above. For example, the width of the transform block is equal to the width of the residual block, and the height of the transform block is half the height of the residual block. SVT-V is similar to SVT-II, and SVT-H is similar to SVT-III. Compared with SVT-II and SVT-III, the transform block in SVT-V and SVT-H is expanded to half the residual block, which can cover more residual information in the residual block.

[0305] Similar to the SVT transform 1500, the SVT transform 1600 may include several candidate positions, where the candidate positions are possible permissible positions of the transform block with respect to the residual block. The candidate positions are determined according to a Candidate Position Step Size (CPSS). The candidate positions may be equally spaced apart as specified by the CPSS. In such a case, the number of candidate positions is reduced to as few as five. The reduced number of candidate positions reduces the signaling overhead associated with the position information, since the positions selected for transformation can be signaled by fewer bits. Furthermore, the reduction in the number of candidate positions makes the selection of the transform positions algorithmically simpler. This allows for a reduced encoder complexity (e.g., fewer computing resources utilized for encoding).

[0306] FIG. 17 illustrates an exemplary SVT transform candidate position 1700 for a residual block. Specifically, the SVT transform candidate position 1700 utilizes SVT-V and SVT-H (e.g., SVT transform 1600) positioned for the residual block. The permissible candidate positions for the transform depend on the CPSS, which further depends on the position of the residual block that the transform block should cover and / or the step size between the candidate positions. For example, the CPSS may be calculated as s=w / M1 for SVT-V or s=h / M2 for SVT-H, where w and h are the width and height of the residual block, respectively, and M1 and M2 are predefined integers ranging from 2 to 8. Candidate positions are allowed with larger values ​​of M1 or M2. For example, M1 and M2 may both be set to 8. In this case, the value of the position index (P) that defines the position of the transform block with respect to the residual block is between 0 and 4.

[0307] In another example, the CPSS is calculated as s=max(w / M1,Th1) for SVT-V or s=max(h / M2,Th2) for SVT-H, where Th1 and Th2 are predefined integers specifying the minimum step size. Th1 and Th2 may be integers equal to or greater than 2. In this example, Th1 and Th2 are set as 4, and M1 and M2 are set as 8. In this example, different block sizes may have different numbers of candidate positions. For example, when the width of the residual block is 8, two candidate positions are available for SVT-V, specifically candidate positions 1700(a) and (e). For example, when the step size is large, as indicated by Th1, and the portion of the residual block covered by the transform is also large, as indicated by w / M1, only two candidate positions satisfy the CPSS. However, when w is set to 16, the portion of the residual block covered by the transform decreases due to the change in w / M1. This results in more candidate positions, in this case three candidate positions 1700(a), (b) and (c). When the width of the residual block is greater than 16, all five candidate positions are available, and the values ​​of Th1 and M1 were described above.

[0308] Other examples can be seen when the CPSS is calculated according to other mechanisms. Specifically, the CPSS may be calculated as s = w / M1 in SVT-V or s = h / M2 in SVT-H. In this case, when M1 and M2 are set to 4, three candidate positions are permitted in SVT-V (e.g., candidate positions 1700(a), (c), and (e)), and three candidate positions are permitted in SVT-H (e.g., candidate positions 1700(f), (h), and (j)). Further, when M1 and M2 are set to 4, the portion of the residual block covered by the transformation increases, resulting in two acceptable candidate positions in SVT-V (candidate positions 1700(a) and (e)) and two acceptable candidate positions in SVT-H (candidate positions 1700(f) and (e)).

[0309] In another example, as described above, the CPSS is calculated as s = max(w / M1, Th1) in SVT-V or s = max(h / M2, Th2) in SVT-H. In this case, T1 and T2 are set to a predetermined integer, e.g., 2, M1 is set to 8 if w ≥ h or 4 when w < h, and M2 is set to 8 if h ≥ w or 4 when h < w. For example, the portion of the residual block covered by the transformation depends on whether the height of the residual block is greater than the width of the residual block or vice versa. Thus, the number of candidate positions for SVT-H or SVT-V further depends on the aspect ratio of the residual block.

[0310] In another example, as described above, the CPSS is calculated as s = max(w / M1, Th1) in SVT-V or s = max(h / M2, Th2) in SVT-H. In this case, the values of M1, M2, Th1, and Th2 are derived from a high-level syntax structure (e.g., sequence parameter set) in the bitstream. For example, the values used to derive the CPSS can be signaled within the bitstream. M1 and M2 may share the same value parsed from a syntax element, and Th1 and Th2 may share the same value parsed from another syntax element.

[0311] FIG. 18 illustrates an exemplary SVT transform position for a residual block. The SVT transform position 1800 is selected from candidate positions such as the SVT transform candidate position 1700. Specifically, the selected SVT transform position 1800 may be coded according to a position index P. The position index P may be utilized to determine a position offset (Z) of the top-left corner of the transform block relative to the top-left corner of the residual block. For example, this position correlation may be determined according to Z=s×P, where s is the CPSS of the transform block based on the SVT type and is calculated as discussed with respect to FIG. 16. The value of P may be coded as 0, 1, ..., (w-w_t) / s when the transform block is SVT-V. The value of P may be coded as 0, 1, ..., (h-h_t) / s when the transform block is SVT-H. More specifically, (0, 0) may represent the coordinates of the top-left corner of the residual block. In such a case, the coordinates of the upper left corner of the transform block are (Z,0) in SVT-V or (0,Z) in SVT-H.

[0312] As discussed in more detail below, the encoder may code the SVT transform type (e.g., SVT-H or SVT-T) and the residual block size in the bitstream using flags. The decoder may then determine the SVT transform size based on the SVT transform type and the residual block size. Once the SVT transform size is determined, the decoder can determine acceptable candidate positions for the SVT transform, such as the SVT transform candidate positions 1700, according to the CPSS function. Because the decoder can determine the candidate positions for the SVT transform, the encoder does not need to signal the coordinates of the position offset. Instead, a code can be used to indicate which of the candidate positions is used for the corresponding transform. For example, the position index P may be binarized into one or more bins using a truncated unary code for increasing compression. As a specific example, when the P value is in the range of 0 to 4, the P values ​​0, 4, 2, 3, and 1 can be binarized as 0, 01, 001, 0001, and 0000, respectively. This binary code provides further compression than representing the position index with a fixed length code. As another example, when the P value is in the range 0 to 1, the P values ​​0 and 1 can be binarized as 0 and 1, respectively. In this manner, the position index can be expanded or contracted in size as necessary to signal a particular transform block position in terms of possible candidate positions for the transform block.

[0313] The position index P may be binarized into one or more bins by utilizing the most likely position and the remaining less likely positions. For example, when the left and upper neighboring blocks have already been decoded at the decoder and are therefore available for prediction, the most likely position may be set as the position covering the lower right corner of the residual block. In one example, when the P value is in the range of 0 to 4 and position 4 is set as the most likely position, the P values ​​4, 0, 1, 2, and 3 are binarized as 1, 000, 001, 010, and 011, respectively. Furthermore, when the P value is in the range of 0 to 2 and position 2 is set as the most likely position, the P values ​​2, 0, and 1 are binarized as 1, 01, and 00, respectively. Thus, to reduce the signaling overhead in the most general case, the most likely position index among the candidate positions is indicated by the fewest bits. Based on the coding order of the neighboring reconstructed blocks, the probability can be determined. Thus, the decoder can infer, based on the decoding scheme used, the codeword scheme that should be used for the corresponding block.

[0314] For example, in HEVC, the coding order of coding units is usually from top to bottom and from left to right. In such a case, the right side of the currently coding / decoding coding unit is not available, giving the top right corner as the more likely transformation location. However, the motion vector predictor is derived from the left and top spatial neighbors. In such a case, the residual information is statistically stronger towards the bottom right corner. In this case, the candidate location covering the bottom right part is the most likely location. Furthermore, when the coding order of adaptive coding units is utilized, one node may split vertically into two child nodes, and the right child node may be coded before the left child node. In this case, the neighbors on the side of the left child node are reconstructed before the decoding / coding of the left child node. Furthermore, in this case, the left neighboring pixels are not available. When the right neighbor is available and the left neighbor is not available, the bottom left part of the residual block is likely to contain a large amount of residual information. Therefore, the candidate location covering the bottom left part of the residual block becomes the most likely location.

[0315] Thus, the position index P may be binarized into one or more bins depending on whether the right neighbor of the residual block is reconstructed or not. In one example, the P value ranges from 0 to 2, as shown by SVT transform position 1800. When the right neighbor of the residual block is reconstructed, the P value 0,2,1 is binarized as 0,01,00. Otherwise, the P value 2,0,1 is binarized as 0,01,00. In another example, when the right neighbor of the residual block is reconstructed but the left neighbor of the residual block is not reconstructed, the P value 0,2,1 is binarized as 0,00,01. Otherwise, the P value 2,0,1 is binarized as 0,00,01. In these examples, the position corresponding to a single bin is the most likely position and the other two positions are the remaining positions. For example, the most likely position depends on the availability of the right neighbor.

[0316] The probability distribution of the best position in terms of rate-distortion optimization may be quite different across inter prediction modes. For example, when the residual block corresponds to a predicted block generated by template matching with spatially neighboring reconstructed pixels as the template, the best position is the most likely position 2. In other inter prediction modes, the probability of position 2 being the best position (or position 0 when the right neighbor is available and the left neighbor is not available) is lower than that of the template matching mode. In this respect, the context model of the first bin of position index P may be determined according to the inter prediction associated with the residual block. More specifically, when the residual block is associated with template matching based on inter prediction, the first bin of position index P uses the first context model. In other cases, the second context model is used to code / decode this bin.

[0317] In another example, when the residual block is associated with template matching based on inter prediction, the most likely position (e.g., position 2, or position 0 when the right neighbor is available but the left neighbor is not) is directly set as the transform block position, and the position information is not signaled in the bitstream. In other cases, the position index is explicitly signaled in the bitstream.

[0318] It should be noted that depending on the position of the transform block relative to the residual block, different transforms can be used. For example, the left side of the residual block is reconstructed and the right side of the residual block is not reconstructed. This occurs in video coding with a fixed coding unit coding order (e.g., coding order in HEVC) from left to right and from top to bottom. In this case, the candidate position covering the lower right corner of the residual block may utilize a DST (e.g., DST type 7 (DST-7) or DST type 1 (DST-1) or DST type 4 (DST-4)) for transformation within the transform block when coding. Thus, an inverse DST transform is utilized in the decoder for the corresponding candidate position. Furthermore, the candidate position covering the upper left corner of the residual block may utilize a DCT (e.g., DCT type 8 (DCT-8) or DCT type 2 (DCT-2) or DCT type 4 (DCT-4)) for transformation within the transform block when coding. Thus, an inverse DCT transform is utilized in the decoder for the corresponding candidate position. This is because, among the four corners in this case, the lower right corner is the farthest from the spatially reconstructed region. Moreover, when the transform block covers the lower right corner of the residual block, the DST is more efficient than the DCT to transform the residual information distribution. However, when the transform block covers the upper left corner of the residual block, the DCT is more efficient than the DST to transform the residual information distribution. For the remaining candidate positions, the transform type can be either the inverse DST or the DCT. For example, when the candidate position is closer to the lower right corner than the upper left corner, the inverse DST is used as the transform type. In other cases, the inverse DCT is used as the transform type.

[0319] As a specific example, three candidate positions of a transform block may be allowed, as shown in FIG. 18. In this case, position 0 covers the top left corner and position 2 covers the bottom right corner. Position 1 is in the center of the residual block and is equidistant to both the left and right corners. The transform types can be selected as DCT-8, DST-7, and DST-7 for positions 0, 1, and 2, respectively, at the encoder. The inverse transforms DCT-8, DST-7, and DST-7 are then available for positions 0, 1, and 2, respectively, at the decoder. In another example, the transform types for positions 0, 1, and 2 are DCT-2, DCT-2, and DST-7, respectively, at the encoder. The inverse transforms DCT-2, DCT-2, and DST-7 are then available for positions 0, 1, and 2, respectively, at the decoder. In this way, the transform types for the corresponding candidate positions can be predetermined.

[0320] In some cases, the above-mentioned position-dependent transforms may be applied only to the luma transform block. The corresponding chroma transform block may always use an inverse DCT-5 in the transform / inverse transform process.

[0321] FIG. 19 illustrates an example 1900 of residual sample horizontal flipping. In some cases, advantageous residual compression can be achieved by horizontally flipping the residual information in a residual block (residual block 305) before applying a transform block (e.g., transform block 307) at the decoder. Example 1900 illustrates such horizontal flipping. In this context, horizontal flipping refers to rotating the residual samples in the residual block about an axis by half between the left side of the residual block and the right side of the residual block. Such horizontal flipping occurs before applying a transform (e.g., transform block) at the encoder and after applying an inverse transform (e.g., transform block) at the decoder. Such flipping may be utilized when specified predetermined conditions occur.

[0322] In one example, horizontal flipping occurs when a transform block utilizes DST / inverse DST in the transform process. In this case, the right neighbor of the residual block is coded / reconstructed before the current block, and the left neighbor is not coded / reconstructed before the current block. The horizontal flipping process exchanges the residual samples in column i of the residual block with the residual samples in column w-1-i of the residual block. In this context, w is the width of the transform block, i=0,1,...,(w / 2)-1. Horizontal flipping of the residual samples may improve coding efficiency by making the residual distribution more compatible with the DST transform.

[0323] FIG. 20 is a flow chart of an example method 2000 of video decoding with position-dependent SVT utilizing the mechanism described above. The method 2000 may begin in a decoder upon receiving a bitstream, such as bitstream 311. The method 2000 utilizes the bitstream to determine a prediction block and a transformed residual block, such as prediction block 303 and transformed residual block 309. The method 2000 also determines a transform block, such as transform block 307, which is utilized to determine a residual block, such as residual block 305. The residual block and the prediction block are then utilized to reconstruct an image block, such as image block 301. It should be noted that although the method 2000 is described from the perspective of a decoder, a similar method may be utilized (e.g., in reverse) to encode video by utilizing SVT.

[0324] In block 2001, a bitstream is obtained at a decoder. The bitstream may be received from a memory or from a streaming source. The bitstream includes data that can be decoded into at least one image corresponding to the video data from the encoder. Specifically, the bitstream includes block partition information that can be utilized to determine a coding unit including a predictive block and a residual block from the bitstream, as described in mechanism 300. In this manner, coding information related to the coding unit can be parsed from the bitstream, and pixels of the coding unit can be reconstructed based on the coding information, as described below.

[0325] In block 2003, the prediction block and the corresponding transformed residual block are obtained from the bitstream based on the block partition information. In this example, the transformed residual block is coded according to SVT, as discussed with respect to mechanism 300 above. Method 2000 then reconstructs a residual block of size w×h from the transformed residual block, as described below.

[0326] In block 2005, SVT usage, type of SVT, and transform block size are determined. For example, the decoder first determines whether SVT is used in the coding, because some coding uses a transform that is the size of the residual block. The usage of SVT can be signaled by a syntax element in the bitstream. Specifically, a flag such as svt_flag is parsed from the bitstream when a residual block is allowed to use SVT. When a transformed residual block has non-zero transform coefficients (e.g., corresponding to any luma or chroma components), the residual block is allowed to use SVT. For example, when the residual block contains any residual data, the residual block may use SVT. The SVT flag indicates whether the residual block is coded using a transform block of the same size as the residual block (e.g., svt_flag is set to 0) or whether the residual block is coded with a transform block of a size smaller than the residual block (e.g., svt_flag is set to 1). A coded block flag (cbf), as used in HEVC, can be used to indicate whether the residual block contains non-zero transform coefficients of any color components. Also, a root coded block flag (rootcbf), as used in HEVC, can be used to indicate whether the residual block contains non-zero transform coefficients of any color components. As a specific example, when an image block is predicted using inter prediction and either the width of the residual block or the height of the residual block is within a predefined range [a1, a2], the residual block is allowed to use SVT, where a1=16 and a2=64, a1=8 and a2=64, or a1=16 and a2=128. The values ​​of a1 and a2 may be predefined fixed values. The values ​​may be derived from a slice header or a sequence parameter set (SPS) in the bitstream. When the residual block does not use SVt, the transform block size is set as the width and height of the residual block size. Otherwise, the transform size is determined based on the SVT transform type.

[0327] When the decoder determines that the SVT is used for the residual block, the decoder determines the type of SVT transform used and derives the transform block size according to the SVT type. The allowed SVT type for the residual block is determined based on the width and height of the residual block. If the width of the residual block is within the range [a1, a2], the SVT-V transform as shown in FIG. 16 is allowed. Such values ​​have been described above. If the height of the residual block is within the range [a1, a2], the SVT-H transform as shown in FIG. 16 is allowed. Such values ​​have been described above. The SVT may be used only for the luma component in the residual block, or the SVT may be used for both the luma and chroma components in the residual block. When the SVT is used only for the luma component, the luma component residual information is transformed by the SVT, and the chroma components are transformed according to the size of the residual block. When both SVT-V and SVT-H are allowed, a flag such as svt_type_flag may be coded in the bitstream. svt_type_flag indicates whether SVT-V is used for the residual block (e.g., svt_type_flag is set to 0) or SVT-H is used for the residual block (e.g., svt_type_flag is set to 1). Once the type of SVT transform is determined, the transform block size is set according to the signaled SVT type (e.g., w_t=w / 2 and h_t=h for SVT-V, and w_t=w and h_t=h / 2 for SVT-H). When only SVT-T or only SVT-H is allowed, svt_type_flag does not need to be coded in the bitstream. In such cases, the decoder can estimate the transform block size based on the allowed SVT type.

[0328] Once the SVT type and size are determined, the decoder proceeds to block 2007. In block 2007, the decoder determines the location of the transform relative to the residual block along with the type of transform. The location of the transform block can be determined according to syntax elements in the bitstream. For example, a location index can be directly signaled and therefore parsed from the bitstream in some examples. In other examples, the location can be estimated as discussed with respect to Figures 5-7. Specifically, candidate locations for the transform can be determined according to a CPSS function. The CPSS function can determine the candidate locations by considering the width of the residual block, the height of the residual block, the SVT type as determined in block 2005, the step size of the transform, and / or the portion of the residual block that the transform covers. The decoder can then determine the transform block location from the candidate locations by obtaining a p index that includes a code signaling the correct candidate location according to the candidate location selection probability as discussed with respect to Figure 18 above. Once the transform block location is known, the decoder can estimate the type of transform utilized by the transform block, as discussed with respect to Figure 18 above. The encoder can then select the corresponding inverse transform.

[0329] In block 2009, the decoder parses transform coefficients of the transform block based on the transform block size determined in block 2005. This process may be accomplished according to the transform coefficient parsing mechanism utilized in HEVC, H.264, and / or advance video coding (AVC). The transform coefficients may be run-length coded and / or coded using a set of transform coefficient groups (CG). It should be noted that block 2009 may be performed before block 2007 in some examples.

[0330] In block 2011, the residual block is reconstructed based on the transform position, transform coefficients, and transform type as determined above. Specifically, inverse quantization and inverse transform of size w_t×h_t are applied to the transform coefficients to recover the residual samples of the residual block. The size of the residual block with the residual samples is w_t×h_t. The inverse transform may be an inverse DCT or an inverse DST according to the position-dependent transform type determined in block 2007. The residual samples are assigned to corresponding regions in the residual block according to the transform block position. Any residual samples inside the residual block and outside the transform block may be set to 0. For example, when SVT-V is used, the number of candidate positions is 5, the position index indicates the fifth transform block position, and the reconstructed residual sample is assigned to region A at the transform candidate position 1700(e), and the region of size (w / 2)×h to the left of region A has 0 residual samples.

[0331] In optional block 2013, the residual block information of the reconstructed block may be flipped horizontally as discussed with respect to FIG. 19. As mentioned above, this may occur when a transform block at the decoder uses an inverse DST and the right neighboring block has already been reconstructed and the left neighbor has not yet been reconstructed. Specifically, the encoder may horizontally flip the residual block before applying the DST transform in the above case to improve coding efficiency. Therefore, optional block 2013 may be used to correct such horizontal flipping at the encoder to generate an accurate reconstructed block.

[0332] At block 2015, the reconstructed residual block may be constructed with the prediction block to generate a reconstructed image block that includes samples as part of a coding unit. Filtering operations may also be applied to the reconstructed samples, such as a deblocking filter and sample adaptive offset (SAO) operations in HEVC. The reconstructed image block may then be combined with other image blocks coded in a similar manner to generate a frame of the media / video file. The reconstructed media file may then be displayed to a user on a monitor or other display device.

[0333] It should be noted that an equivalent implementation of method 2000 can be utilized to generate reconstructed samples in a residual block. Specifically, the residual samples of a transform block can be directly constructed by the prediction block at the positions indicated by the transform block position information, without first reconstructing the residual block.

[0334] In summary, the above disclosure includes mechanisms for adaptively utilizing multiple transform types for transform blocks at different positions. Furthermore, the present disclosure allows horizontal flipping of residual samples in a residual block to support coding efficiency. This occurs when the transform block uses DST and inverse DST in the encoder and decoder, respectively, and when the right neighbor block is available but the left neighbor is not. Furthermore, the present disclosure includes mechanisms for supporting coding of position information in a bitstream based on inter prediction associated with a residual block.

[0335] Further embodiments can be seen in the examples below. Example 1. A method implemented on a computing device, the method comprising: receiving a bitstream at a processor of the computing device, the bitstream being stored in a memory of the computing device and received via a receiver of the computing device; receiving, in the processor, a prediction block and a corresponding transformed residual block from the bitstream; determining, by the processor, a type of spatial varying transform (SVT) transform used to generate the transformed residual block; determining, by the processor, a position of the SVT transform relative to the transformed residual block; applying, by the processor, an inverse of the SVT transform to the transformed residual block to generate a reconstructed residual block; and reconstructing, by the processor, the reconstructed residual block from the predicted block to construct an image block for display on a monitor. Example 2. The method of example 1, wherein the type of the SVT transform is an SVT vertical (SVT-V) type or an SVT horizontal (SVT-H) type, the SVT-V type including a height equal to a height of the transformed residual block and a width half the width of the transformed residual block, and the SVT-H type including a height half the height of the transformed residual block and a width equal to a width of the transformed residual block. Example 3. The method of any one of Examples 1-2, wherein the type of SVT transformation is determined by parsing a svt_type_flag from the bitstream. Example 4. The method of any one of Examples 1-3, wherein the type of SVT transform is determined by the processor by estimation when only one type of SVT transform is allowed for the residual block. Example 5. The method of any one of Examples 1-4, wherein the location of the SVT transform is determined by the processor by parsing a location index from the bitstream. Example 6. The method of any one of Examples 1-5, wherein the position index includes a binary code indicating the position from a set of candidate positions determined according to a candidate position step size (CPSS). Example 7. The most probable position of the SVT transformation is assigned the least number of bits in the binary code representing the position index. Example 8. The method of any one of Examples 1-7, wherein the location of the SVT transform is estimated by the processor when a single candidate location is available for the SVT transform. Example 9. The method of any one of Examples 1 to 8, wherein the position of the SVT transform is estimated by the processor when the residual block is generated by template matching in an inter prediction mode. Example 10. The method of any one of Examples 1-9, further comprising determining, by the processor, an inverse of the SVT transform based on the position of the SVT transform. Example 11. The processor uses an inverse Discrete Sine Transform (DST) for an SVT vertical (SVT-V) type transform located at the left boundary of the residual block; An inverse DST is applied by the processor for an SVT horizontal (SVT-H) type transformation located at an upper boundary of the residual block; An inverse Discrete Cosine Transform (DCT) is applied by the processor for an SVT-V type transform located at the right boundary of the residual block; Or, the method of any one of Examples 1 to 10, wherein an inverse DCT is utilized by the processor for an SVT-H type transform located at the lower boundary of the residual block. Example 12. The method of any one of Examples 1-11, further comprising: by the processor, when a right neighbor of a coding unit associated with the reconstructed residual block has been reconstructed and a left neighbor of the coding unit has not been reconstructed, horizontally flipping samples in the reconstructed residual block before constructing the reconstructed residual block with the predictive block. Example 13. A method implemented in a computing device, the method comprising: receiving, in a processor of the computing device, a video signal from a video capture device, the video signal including image blocks; generating, by the processor, a prediction block and a residual block to represent the image block; transforming, by the processor, the residual block into a transformed residual block using a spatial varying transform (SVT) transform; indicating, by the processor, in a bitstream, the type of SVT transformation; indicating, by the processor, a location of the SVT transformation within the bitstream; and encoding, by the processor, the prediction block and the transformed residual block into the bitstream for use by a decoder, the bitstream being stored in a memory of the computing device for transmission by a transmitter to the decoder. Example 14. The method of example 13, wherein the type of the SVT transform is an SVT vertical (SVT-V) type or an SVT horizontal (SVT-H) type, the SVT-V type including a height equal to a height of the residual block and a width half the width of the residual block, and the SVT-H type including a height half the height of the residual block and a width equal to a width of the residual block. Example 15. The method of any one of Examples 13-14, wherein the position of the SVT transform is encoded in a position index. Example 16. The method of any one of Examples 13-15, wherein the position index includes a binary code indicating the position from a set of candidate positions determined according to a candidate position step size (CPSS). Example 17. The method of any one of Examples 13-16, wherein the most likely location of the SVT transformation is assigned as the least number of bits in a binary code indicating the location index. Example 18. The method of any one of Examples 13-17, further comprising selecting, by the processor, a transformation algorithm for the SVT transformation based on the location of the SVT transformation. Example 19. The processor uses a Discrete Sine Transform (DST) algorithm for an SVT vertical (SVT-V) type transform located at the left boundary of the residual block; A DST algorithm is selected by the processor for an SVT horizontal (SVT-H) type transformation located at an upper boundary of the residual block; A Discrete Cosine Transform (DCT) algorithm is selected by the processor for an SVT-V type transform located at a right boundary of the residual block; Or, the method of any one of Examples 13-18, wherein a DCT algorithm is selected by the processor for an SVT-H type transform located at a lower boundary of the residual block. Example 20. The method of any one of Examples 13-19, further comprising, when a right neighbor of a coding unit associated with the residual block has been coded and a left neighbor of the coding unit has not been reconstructed, horizontally flipping, by the processor, samples in the residual block before transforming, by the processor, the residual block into the transformed residual block.

[0336] The following literature is incorporated by reference: C. Zhang, K. Ugur, J. Lainema, A. Hallapuro and M. Gabbouj, “Video Coding Using Spatially Varying Transform”, IEEE Trans. Image Process., vol. 21, no. 2, Feb. 2011, pp. 127-140.

[0337] This disclosure further introduces another improved SVT method. The improvement is that the horizontal transform type and vertical transform type of an SVT block are determined based on the SVT type and the SVT block position. The horizontal transform can be different from the vertical transform. Previously, the horizontal transform type and vertical transform type of an SVT block are determined based only on the SVT block position and are always the same.

[0338] The first embodiment described a process of decoding a residual block. A bitstream including at least one picture of video data is decoded. The picture is divided into multiple rectangular image regions, each region corresponding to a coding tree unit (CTU). The CTU is divided into multiple blocks, such as coding units in HEVC, according to block partition information included in the bitstream. The coding information of the block is parsed from the bitstream, and the pixels of the block are reconstructed based on the coding information.

[0339] In this embodiment, SVT is restricted to be used for inter-predicted blocks. SVT may also be used for intra-predicted blocks. In a more advanced method, SVT may be allowed for blocks using a particular inter-prediction method (e.g., motion compensation based on a translation model) but not for blocks using other inter-prediction methods (e.g., motion compensation based on an affine model). In another example, SVT may be allowed for predicted blocks using a merge mode or an advanced motion vector prediction (AMVP) mode with 1 / 4-pel motion vector difference accuracy, but not for predicted blocks using an affine merge mode, an affine inter mode, or an AMVP mode with 1-pel or 4-pel motion vector difference accuracy. In another example, SVT may be allowed for predicted blocks using a merge mode with a merge index smaller than 2, but not for predicted blocks using a merge mode with a merge index not smaller than 2. Merge mode and AMVP mode may be referenced in the H.265 / HEVC standard. The affine merge mode and the affine inter mode may be referred to in the Joint Exploration Model (JEM) codec by the Joint Video Exploration Team (JVET).

[0340] In one example, the block may represent a coding unit, where the coding unit may include one prediction block and one residual block. The prediction block may include all prediction samples of the coding unit, the residual block may include all residual samples of the coding unit, and the prediction block is the same size as the residual block. In another example, the block may represent a coding unit, where the coding unit may include two prediction blocks and one residual block, where each prediction block may include a portion of the prediction samples of the coding unit, and the residual block may include all residual samples of the coding unit. In another example, the block may represent a coding unit, where the coding unit may include two prediction blocks and four residual blocks. The partition pattern of the residual blocks in the coding unit may be signaled in the bitstream, such as the Residual Quad-Tree (RQT) in HEVC.

[0341] A block may contain only the Y component of an image sample (or pixel), or it may contain the Y, U and V components of an image sample.

[0342] A residual block Ro of size w×h can be reconstructed by the following steps:

[0343] Step 1. Determine the transform block size of the residual block Ro.

[0344] Step 1.1. Determine the use of SVT according to syntax elements. For residual blocks allowed to use SVT, if the residual block has a non-zero transform coefficient of Y component (or has a non-zero transform coefficient of any color component), a flag (i.e., svt_flag) is parsed from the bitstream. The flag indicates whether the residual block is coded using a transform block of the same size as the residual block (e.g., svt_flag=0) or whether the residual block is coded by a transform block of a smaller size than the residual block (e.g., svt_flag=1). Whether the block has a non-zero transform coefficient of any color component may be indicated by a coded block flag (cbf) as used in HEVC. Whether the block has a non-zero transform coefficient of any color component may be indicated by a root coded block flag (rootcbf) as used in HEVC.

[0345] In one example, a block is permitted to use the SVT if the following conditions are met: 1) A block is predicted using inter prediction. 2) Either the block width or the block height is in a predefined range [a1, a2]. For example, a1=16 and a2=64, or a1=8 and a2=64, or a1=16 and a2=128. The values ​​of a1 and a2 can be fixed values. The values ​​can also be derived from the sequence parameter set (SPS) or the slice header.

[0346] In another example, a block is permitted to use the SVT if the following conditions are met: 1) A block is predicted using a merge mode with a merge index smaller than a threshold (eg, 1 or 2 or 3) or using an AMVP mode with 1 / 4 pel motion vector difference accuracy. 2) The block width or one dimension of the block is included within a predefined range [a1, a2] and the other dimension of the block is not larger than a threshold a3. For example, a1=8, a2=32, and a3=32. The parameter a1 may be set as twice the minimum transform size, and a2 and a3 may both be set as the maximum transform size. The values ​​of a1, a2, and a3 may be fixed values. The values ​​may also be derived from the sequence parameter set (SPS) or slice header.

[0347] If the block does not use SVT, the transform block size is set as w × h. Otherwise, step 1.2 is applied to determine the transform size.

[0348] Step 1.2. Determine the type of SVT according to the syntax elements, and derive the transform block size according to the SVT type. The allowed SVT type for a residual block is determined based on the width and height of the residual block. SVT-V is allowed if w is in the range [a1,a2] and h is not greater than a3. SVT-H is allowed if h is in the range [a1,a2] and w is not greater than a3. SVT may be used only for the Y component, or for all three components. When SVT is used only for the Y component, the Y component residual is transformed by SVT, and U and V components are transformed according to the size of the residual block.

[0349] When both SVT-V and SVT-H are allowed, one flag (i.e., svt_type_flag) is parsed from the bitstream to indicate whether SVT-V is used for the residual block (e.g., svt_type_flag=0) or whether SVT-H is used for the residual block (e.g., svt_type_flag=1), and the transform block size is set according to the signaled SVT type (i.e., w_t=w / 2 and h_t=h for SVT-V, and w_t=w and h_t=h / 2 for SVT-H). When only SVT-V or only SVT-H is allowed, svt_type_flag is not parsed from the bitstream and the transform block size is set according to the allowed SVT type.

[0350] Step 2. Determine the transform block position according to the syntax elements, and determine the transform type of the transform block according to the type of SVT and the transform block position information.

[0351] Step 2.1. Determine the transformation block position according to the syntax elements.

[0352] A position index P is parsed from the bitstream, and a position offset Z of the top-left corner of the transform block relative to the top-left corner of the residual block is determined as Z=s×P, where s is the candidate position step size (CPSS). If SVT-V is used, the value of P is between 0, 1, ..., (w-w_t) / s, and if SVT-H is used, the value of P is between 0, 1, ..., (h-h_t) / s. More specifically, if (0, 0) represents the coordinate of the top-left corner of the residual block, the coordinate of the top-left corner of the transform block is (Z, 0) for SVT-V and (0, Z) for SVT-H.

[0353] In one example, the CPSS is calculated as s=w / M1 for SVT-V or s=h / M2 for SVT-H, where w and h are the width and height of the residual block, respectively, and M1 and M2 are predefined integers ranging from 2 to 8. More candidate positions are allowed with larger values ​​of M1 or M2. In this example, M1 and M2 are both set to 8. Thus, the value of P is between 0 and 4. The candidate positions are shown in FIG. 21.

[0354] In another example, the CPSS is calculated as s=max(w / M1,Th1) for SVT-V or s=max(h / M2,Th2) for SVT-H, where Th1 and Th2 are predefined integers specifying the minimum step size. Th1 and Th2 are integers equal to or greater than 2. In this example, Th1 and Th2 are set as 4, and M1 and M2 are set as 8. In this example, different block sizes may have different numbers of candidate positions. For example, when w=8, 2 candidate positions (shown in FIG. 21(a) and FIG. 21(e)) are available for selection, when w=16, 3 candidate positions (shown in FIG. 21(a), FIG. 21(c), and FIG. 21(e)) are available for selection, and when w>16, 5 positions are available for selection.

[0355] In another example, the CPSS is calculated as s=w / M1 for SVT-V or s=h / M2 for SVT-H, where M1 and M2 are set as 4. Thus, 3 candidate positions are allowed.

[0356] In another example, the CPSS is calculated as s=w / M1 for SVT-V or s=h / M2 for SVT-H, where M1 and M2 are set as 2. Thus, two candidate positions are allowed.

[0357] In another example, CPSS is set as s = max(w / M1, Th1) for SVT-V or s = max(h / M2, Th2) for SVT-H. Here, T1 and T2 are set as 2, M1 is set as 8 if w≧h and 4 if w<h, M2 is set as 8 if h≧w and 4 if h<w. In this case, the number of candidate positions for SVT-H or SVT-V may further depend on the aspect ratio of the residual block.

[0358] In another example, CPSS is calculated as s = max(w / M1, Th1) for SVT-V or s = max(h / M2, Th2) for SVT-H. Here, the values of M1, M2, Th1, and Th2 are derived from a high-level syntax structure (e.g., sequence parameter set) within the value bitstream. M1 and M2 may share the same value parsed from the syntax element, and Th1 and Th2 may share the same value parsed from another syntax element.

[0359] The position index P may be binarized into one or more bins using a truncated unary code. For example, when the P value is in the range of 0 to 4, the P values 0, 4, 2, 3, and 1 are binarized as 0, 01, 001, 0001, and 0000 respectively, and when the P value is in the range of ~~1, the P values 0 and 1 are binarized as 0 and 1 respectively.

[0360] The position index P may be binarized into one or more bins by using one most promising position and several remaining positions. When the left and upper neighbors are available, the most promising position may be set as the position covering the lower right corner of the residual block. In one example, when the P value is in the range of 0 to 4 and position 4 is set as the most promising position, the P values 4, 0, 1, 2, and 3 are binarized as 1, 000, 001, 010, and 011 respectively, and when the P value is in the range of ~~2 and position 2 is set as the most promising position, the P values 2, 0, and 1 are binarized as 1, 01, and 00 respectively.

[0361] Step 2.2. Determine the transformation type of the transformation block based on the type of SVT and the transformation block position information, where the transformation type includes horizontal transformation and vertical transformation of the 2D separable transformation.

[0362] Take as an example the case where three candidate positions are allowed as shown in Figure 22. Position 0 covers the top left corner, position 2 covers the bottom right corner, and position 1 is in the center of the residual block. As shown in Figure 22, there are three positions for both SVT-T and SVT-H.

[0363] The two-dimensional transform may be separable into one-dimensional horizontal and vertical transforms. A forward 2D transform that converts residuals into transform coefficients may be realized by first applying a horizontal transform to the residual block to generate a block TA, and then applying a vertical transform to the block TA to generate a transform coefficient block, as implemented in the JEM codec. Thus, an inverse 2D transform that converts transform coefficients into residuals may be realized by first applying an inverse vertical transform to the transform coefficient block to generate a block TB, and then applying an inverse horizontal transform to the block TB to generate a residual block, as implemented in the JEM codec.

[0364] In one example, the horizontal and vertical transformations of SVT-V position 0 are DCT-8 and DST-7, the horizontal and vertical transformations of SVT-V position 1 are DST-1 and DST-7, the horizontal and vertical transformations of SVT-V position 2 are DST-7 and DST-7, the horizontal and vertical transformations of SVT-H position 0 are DST-7 and DCT-8, the horizontal and vertical transformations of SVT-H position 1 are DST-7 and DST-1, and the horizontal and vertical transformations of SVT-H position 2 are DST-7 and DST-7, as listed in Table 1. In this example, the vertical transformation of SVT-V and the horizontal transformation of SVT-H are set to DST-7, and the other transformation is based on the SVT position. Table 1: Examples of 1D vertical and horizontal transformations for different SVT types and positions [Table 1] In an alternative implementation, DST-7 may be replaced with DST-4 and DCT-8 may be replaced with DCT-4 throughout this disclosure. Thus, in one example, as listed in Table 1, the horizontal and vertical transforms of SVT-V position 0 are DCT-4 and DST-4, the horizontal and vertical transforms of SVT-V position 1 are DST-1 and DST-4, the horizontal and vertical transforms of SVT-V position 2 are DST-4 and DST-4, the horizontal and vertical transforms of SVT-H position 0 are DST-4 and DCT-4, the horizontal and vertical transforms of SVT-H position 1 are DST-4 and DST-1, and the horizontal and vertical transforms of SVT-H position 2 are DST-4 and DST-4. In this example, the vertical transform of SVT-V and the horizontal transform of SVT-H are set as DST-4, and the other transform is based on the SVT position. Table 1': Examples of 1D vertical and horizontal transformations for different SVT types and positions [Table 2]

[0365] In another example, the horizontal and vertical transforms for different SVT types and positions are listed in Table 2. In this example, the vertical transform of SVT-V and the horizontal transform of SVT-H are set as DCT-2, and the other transform is based on the SVT position. Table 2: Examples of 1D vertical and horizontal transformations for different SVT types and positions [Table 3] In alternative implementations, throughout this disclosure, DST-7 may be replaced with DST-4, and DCT-8 may be replaced with DCT-4. Table 2': Examples of 1D vertical and horizontal transformations for different SVT types and positions [Table 4]

[0366] In another example, the horizontal and vertical transformations for different SVT types and positions are listed in Table 3. In this example, the horizontal and vertical transformations are determined only by the SVT position. Table 3: Examples of 1D vertical and horizontal transformations for different SVT types and positions [Table 5] In alternative implementations, throughout this disclosure, DST-7 may be replaced with DST-4, and DCT-8 may be replaced with DCT-4. Table 3': An example of 1D vertical and horizontal transformations for different SVT types and positions [Table 6]

[0367] In another example, the horizontal and vertical transformations for different SVT types and positions are listed in Table 4. Table 4: Examples of 1D vertical and horizontal transformations for different SVT types and positions [Table 7] In alternative implementations, throughout this disclosure, DST-7 may be replaced with DST-4, and DCT-8 may be replaced with DCT-4. Table 4': An example of 1D vertical and horizontal transformations for different SVT types and positions [Table 8]

[0368] In another example, the horizontal and vertical transformations for different SVT types and positions are listed in Table 5. Table 5: Examples of 1D vertical and horizontal transformations for different SVT types and positions [Table 9] In alternative implementations, throughout this disclosure, DST-7 may be replaced with DST-4, and DCT-8 may be replaced with DCT-4. Table 5': An example of 1D vertical and horizontal transformations for different SVT types and positions [Table 10]

[0369] In another example, the horizontal and vertical transformations for different SVT types and positions are listed in Table 6. Table 6: Examples of 1D vertical and horizontal transformations for different SVT types and positions [Table 11] In alternative implementations, throughout this disclosure, DST-7 may be replaced with DST-4, and DCT-8 may be replaced with DCT-4. Table 6': An example of 1D vertical and horizontal transformations for different SVT types and positions [Table 12]

[0370] Position-dependent transforms may be applied only to luma transform blocks, and the corresponding chroma transform blocks always use an inverse DCT-2 in the inverse transform process.

[0371] Step 3. Parse the transform coefficients of the transform block based on the transform block size.

[0372] This is a process commonly used in video decoding, such as transform coefficient parsing in HEVC or H.264 / AVC. The transform coefficients may be coded using run-length coding, or more sophisticatedly coded as a set of transform coefficient groups (CG).

[0373] Step 3 may occur before step 2.

[0374] Step 4. Reconstruct the residual block Ro based on the transform coefficients and the transform block position and the type of inverse transform.

[0375] Inverse quantization and inverse transform of size w_t×h_t are applied to the transform coefficients to recover the residual samples. The size of the residual samples is w_t×h_t, which is the same as the transform block size. The inverse transform is a 2D separable transform. The quantized transform coefficient block is first transformed by an inverse vertical transform to generate a block TC, and then the block TC is transformed by an inverse horizontal transform, where the inverse horizontal transform and the inverse vertical transform are determined in step 2.2 based on the transform block position or based on both the transform block position and the SVT type of the transform block.

[0376] The residual samples are assigned to corresponding regions in the residual block Ro according to the transform block position, and the remaining samples in the residual block are set to 0. For example, when SVT-V is used and the number of candidate positions is 5 and the position index is 4, the reconstructed residual samples are assigned to region A in Figure 21(e), and the region of size (w / 2) × h to the left of region A has a residual of 0.

[0377] After performing steps 1 to 4, the reconstructed residual block may be composed with the prediction block to generate reconstructed samples in the coding unit. Filtering operations may be applied to the reconstructed samples afterwards, such as the deblocking filter and sample adaptive offset (SAO) operations in HEVC.

[0378] Unlike existing solutions, the solution of the present invention adaptively uses multiple transform types for a transform block based on SVT type and position information.

[0379] This disclosure introduces an improved SVT scheme. As shown in Figure 23, two types of SVT blocks, denoted as SVT-H and SVT-V, are used for residual coding. These are (1) SVT-V: w_t=w / 2 and h_t=h, (2) SVT-H: w_t=w and h_t=h / 2.

[0380] SVT-V is similar to SVT-II, and SVT-H is similar to SVT-III. Compared with SVT-II and SVT-III, the transform block in SVT-V and SVT-H is expanded to half of the residual block, which can cover more residuals in the residual block. Note that SVT-II or SVT-III can be used to replace SVT-V or SVT-H.

[0381] The candidate positions are determined by a Candidate Position Step Size (CPSS). Thus, the candidate positions are equally spaced apart as specified by the CPSS. In a different embodiment, the number of candidate positions is reduced to as few as five. This reduces the position information overhead and the encoder complexity to determine the best transform block position.

[0382] CPSS indicates the distance between two adjacent candidate positions (e.g., 1 in [1]) and is calculated based on the width or height of the residual block. More specifically, the candidate position step size of SVT-V is determined as h_b=max(w / M1,Th1), where M1 and Th1 are predefined integers, and max(a,b) is an operation that selects the maximum value between a and b. Similarly, the candidate position step size of SVT-H is determined as w_b=max(w / M2,Th2), where M2 and Th2 are predefined integers. M1 and M2 are integers between 2 and 8. For example, M1=M2=8, or M1=M2=4, or M1=M2=2. Th1 and Th2 are integers equal to or greater than 2. M1, M2, Th1, and Th2 can be set as fixed values, or they can be derived from a high-level syntax structure (e.g., sequence parameter set) in the bitstream.

[0383] The coding of the SVT information (eg, the use of SVT for the residual block, the type of SVT, and the position of the transform block) differs from that in [1] and is further improved by analyzing the transform coefficients of the residual block.

[0384] For SVT-V:w_t=w / 2 and h_t=h, the SVT information may be derived in part from the decoded transform coefficients. In one example, the position information may be derived from a sum of the transform coefficient levels. In another example, the SVT type information is derived from a sum of a first group of transform coefficients (e.g., the first 16 coefficients in scan order) and the position information is derived from a sum of a second group of transform coefficients (e.g., the remaining coefficients in the transform block).

[0385] SVT-H: When w_t=w and h_t=h / 2, the number of candidate positions is determined according to the transform coefficient information, and the position information is decoded based on the number of candidate positions.

[0386] Embodiment 1.

[0387] This embodiment describes a process of decoding a residual block. A bitstream including at least one picture of video data is decoded. The picture is divided into multiple rectangular image regions, each region corresponding to a Coding Tree Unit (CTU). The CTU is divided into multiple blocks, such as coding units in High Efficiency Video Coding (HEVC), according to block partition information included in the bitstream. The coding information of the block is parsed from the bitstream, and the pixels of the block are reconstructed based on the coding information.

[0388] In this embodiment, SVT is restricted to be used for inter-predicted blocks. SVT may also be used for intra-predicted blocks. In more advanced methods, SVT may be allowed for blocks that use certain inter-prediction methods (e.g., motion compensation based on a translation model) but not for blocks that use other inter-prediction methods (e.g., motion compensation based on an affine model).

[0389] In one example, the block may represent a coding unit, where the coding unit may include one prediction block and one residual block. The prediction block may include all prediction samples of the coding unit, the residual block may include all residual samples of the coding unit, and the prediction block is the same size as the residual block. In another example, the block may represent a coding unit, where the coding unit may include two prediction blocks and one residual block, where each prediction block may include a portion of the prediction samples of the coding unit, and the residual block may include all residual samples of the coding unit. In another example, the block may represent a coding unit, where the coding unit may include two prediction blocks and four residual blocks. The partition pattern of the residual blocks in the coding unit may be signaled in the bitstream, such as the Residual Quad-Tree (RQT) in HEVC.

[0390] A block may contain only the Y component of an image sample (or pixel), or it may contain the Y, U and V components of an image sample.

[0391] A residual block Ro of size w×h can be reconstructed by the following steps:

[0392] Step 1. Determine the transform block size of the residual block Ro.

[0393] Step 1.1. Determine the use of SVT according to syntax elements. For residual blocks allowed to use SVT, if the residual block has a non-zero transform coefficient of Y component (or the residual block has a non-zero transform coefficient of any color component), a flag (i.e., svt_flag) is parsed from the bitstream. The flag indicates whether the residual block is coded using a transform block of the same size as the residual block (e.g., svt_flag=0) or whether the residual block is coded by a transform block of a smaller size than the residual block (e.g., svt_flag=1). Whether the block has a non-zero transform coefficient of any color component may be indicated by a coded block flag (cbf) as used in HEVC. Whether the block has a non-zero transform coefficient of any color component may be indicated by a root coded block flag (rootcbf) as used in HEVC.

[0394] In one example, a block is permitted to use the SVT if the following conditions are met:

[0395] 1) A block is predicted using inter prediction.

[0396] 2) Either the block width or the block height is in a predefined range [a1, a2]. For example, a1=16 and a2=64, or a1=8 and a2=64, or a1=16 and a2=128. The values ​​of a1 and a2 can be fixed values. The values ​​can also be derived from the sequence parameter set (SPS) or the slice header.

[0397] If the block does not use SVT, the transform block size is set as w × h. Otherwise, step 1.2 is applied to determine the transform size.

[0398] Step 1.2. Determine the type of SVT according to the syntax elements, and derive the transform block size according to the SVT type. The allowed SVT type for a residual block is determined based on the width and height of the residual block. If w is in the range [a1,a2], SVT-V is allowed. If h is in the range [a1,a2], SVT-H is allowed. SVT may be used only for the Y component, or for all three components. When SVT is used only for the Y component, the Y component residual is transformed by SVT, and U and V components are transformed according to the size of the residual block.

[0399] When both SVT-V and SVT-H are allowed, one flag (i.e., svt_type_flag) is parsed from the bitstream to indicate whether SVT-V is used for the residual block (e.g., svt_type_flag=0) or whether SVT-H is used for the residual block (e.g., svt_type_flag=1), and the transform block size is set according to the signaled SVT type (i.e., w_t=w / 2 and h_t=h for SVT-V, and w_t=w and h_t=h / 2 for SVT-H). When only SVT-V or only SVT-H is allowed, svt_type_flag is not parsed from the bitstream and the transform block size is set according to the allowed SVT type.

[0400] Step 2. Determine the transformation block position according to the syntax elements.

[0401] A position index P is parsed from the bitstream and a position offset Z of the top-left corner of the transform block relative to the top-left corner of the residual block is determined as Z=s×P, where s is the CPSS. If SVT-V is used, the value of P is between 0, 1, ..., (w-w_t) / s, and if SVT-H is used, the value of P is between 0, 1, ..., (h-h_t) / s. More specifically, if (0,0) represents the coordinate of the top-left corner of the residual block, the coordinate of the top-left corner of the transform block is (Z,0) for SVT-V and (0,Z) for SVT-H.

[0402] In one example, the CPSS is calculated as s=w / M1 for SVT-V or s=h / M2 for SVT-H, where w and h are the width and height of the residual block, respectively, and M1 and M2 are predefined integers ranging from 2 to 8. More candidate positions are allowed with larger values ​​of M1 or M2. In this example, M1 and M2 are both set to 8. Thus, the value of P is between 0 and 4. The candidate positions are shown in FIG. 24.

[0403] In another example, the CPSS is calculated as s=max(w / M1,Th1) for SVT-V or s=max(h / M2,Th2) for SVT-H, where Th1 and Th2 are predefined integers specifying the minimum step size. Th1 and Th2 are integers equal to or greater than 2. In this example, Th1 and Th2 are set as 4, and M1 and M2 are set as 8. In this example, different block sizes may have different numbers of candidate positions. For example, when w=8, 2 candidate positions (shown in FIG. 24(a) and FIG. 24(e)) are available for selection, when w=16, 3 candidate positions (shown in FIG. 24(a), FIG. 24(c), and FIG. 24(e)) are available for selection, and when w>16, 5 positions are available for selection.

[0404] In another example, CPSS is calculated as s = w / M1 for SVT-V or s = h / M2 for SVT-H. Here, M1 and M2 are set to 4. Therefore, three candidate positions are permitted.

[0405] In another example, CPSS is calculated as s = w / M1 for SVT-V or s = h / M2 for SVT-H. Here, M1 and M2 are set to 2. Therefore, two candidate positions are permitted.

[0406] In another example, CPSS is set as s = max(w / M1, Th1) for SVT-V or s = max(h / M2, Th2) for SVT-H. Here, T1 and T2 are set to 2, M1 is set to 8 if w ≥ h and 4 if w < h, and M2 is set to 8 if h ≥ w and 4 if h < w. In this case, the number of candidate positions for SVT-H or SVT-V may further depend on the aspect ratio of the residual block.

[0407] In another example, CPSS is calculated as s = max(w / M1, Th1) for SVT-V or s = max(h / M2, Th2) for SVT-H. Here, the values of M1, M2, Th1, and Th2 are derived from a high-level syntax structure (e.g., sequence parameter set) within the value bitstream. M1 and M2 may share the same value parsed from the syntax element, and Th1 and Th2 may share the same value parsed from another syntax element.

[0408] The position index P may be binarized into one or more bins using a truncated unary code. For example, when the P value is in the range of 0 to 4, the P values 0, 4, 2, 3, and 1 are binarized as 0, 01, 001, 0001, and 0000 respectively, and when the P value is in the range of ~~1, the P values 0 and 1 are binarized as 0 and 1 respectively.

[0409] Step 3. Parse the transform coefficients of the transform block based on the transform block size.

[0410] This is a process commonly used in video decoding, such as transform coefficient parsing in HEVC or H.264 / Advanced Video Coding (AVC). The transform coefficients may be coded using run-length coding, or more highly coded as a set of transform groups.

[0411] Step 3 may occur before step 2.

[0412] Step 4. Reconstruct the residual block Ro based on the transform coefficients and the transform block positions.

[0413] Inverse quantization and inverse transform of size w_t×h_t are applied to the transform coefficients to reconstruct residual samples, which are of size w_t×h_t, the same as the transform block size. The inverse transform may be an inverse Discrete Cosine Transform (DCT) or an inverse Discrete Sine Transform (DST).

[0414] The residual samples are assigned to corresponding regions in the residual block Ro according to the transform block position, and the remaining samples in the residual block are set to 0. For example, when SVT-V is used and the number of candidate positions is 5 and the position index is 4, the reconstructed residual samples are assigned to region A in Figure 24(E), and the region of size (w / 2) × h to the left of region A has a residual of 0.

[0415] After performing steps 1 to 4, the reconstructed residual block may be composed with the prediction block to generate reconstructed samples in the coding unit. Filtering operations may be applied to the reconstructed samples afterwards, such as the deblocking filter and sample adaptive offset (SAO) operations in HEVC.

[0416] Embodiment 2.

[0417] In another embodiment, the transform position information is derived from the transform coefficients of the residual block. A residual block Ro of size w×h can be reconstructed by the following steps:

[0418] Step 1. Determine the transform block size of the residual block Ro.

[0419] The same process as described in step 1 of the first embodiment can be applied.

[0420] Step 2. Parse the transform coefficients of the transform block based on the transform block size.

[0421] The same process as described in step 3 of embodiment 1 can be applied.

[0422] Step 3. Derive the transform block position based on the sum of the transform coefficients.

[0423] In one example, the sum of the transform coefficients can be calculated by adding all the transform coefficients of the Y component. In another example, the sum of the transform coefficients is calculated by adding all the transform coefficients of the Y, U, and V components. In another example, the sum of the transform coefficients is calculated by adding the first N transform coefficients of the Y component in a coefficient scan order (e.g., using a zigzag scan), where N may be set as 16 or 32.

[0424] The position index P (which indicates the transform block position as described in the first embodiment) is derived by the sum St of transform coefficients associated with the transform block and the number of candidate positions Nt according to the following formula:

[0425] P=St%Nt

[0426] Here, % represents the modulo operation which finds the remainder after dividing St by Nt.

[0427] More specifically, in one example, parameters M1 and M2 are set as 4, and there are three candidate positions for SVT-H or SVT-V (i.e., Nt for SVT-H or SVT-V is 3). P is calculated as St modulo 3. In another example, parameters M1 and M2 are set as 2, and there are two candidate positions for SVT-H or SVT-V (i.e., Nt for SVT-H or SVT-V is 2). P is calculated as St modulo 2.

[0428] In another example, the position index may be determined in part by the sum of the transform coefficients. Parameters M1 and M2 are set as 8, and there are 5 candidate positions for SVT-H or SVT-V. If St%3 is equal to 0, then P is determined as 0. If St%3 is equal to 1, then P is determined as 4. Otherwise, P is between 1, 2, and 3 (but not yet determined). Next, a syntax element with 3 possible values ​​is parsed to determine whether P is equal to 1 or 2 or 3 based on the value of the syntax element (e.g., if the syntax element is 0, 1, or 2, then P is set as 1, 2, or 3).

[0429] There may be some condition check to determine whether the position index information is hidden in the sum of coefficients. For example, when the number of transform coefficients is less than a threshold (e.g., 4 or 6), or the distance between the first and last coefficients is less than a threshold (e.g., 5 or 6), the position index is not dependent on the sum of coefficients but is explicitly signaled, and the parsing process of embodiment 1 is applied to determine the position index.

[0430] Step 4. Reconstruct the residual block Ro based on the transform coefficients and the transform block positions.

[0431] The same process as described in step 4 of the first embodiment can be applied.

[0432] Embodiment 3.

[0433] In another embodiment, the type of SVT is derived based on a first group of transform coefficients and the position information is derived from a second group of transform coefficients of the residual block.

[0434] A residual block Ro of size w×h can be reconstructed by the following steps:

[0435] Step 1. The transform block size of the residual block Ro is determined through steps 1.1 and 1.2.

[0436] Step 1.1. Decide on the use of SVT. This is the same as step 1.1 in embodiment 1.

[0437] Step 1.2. Parse the first group of conversion coefficients and determine the type of SVT based on the first group of conversion coefficients.

[0438] The first group of transform coefficients may be within a region of size w_t1×h_t1 in the upper left portion of the transform block (corresponding to the lower frequency transform coefficients), as shown by solid region 1 in Figure 25. In one example, w_t1 and h_t1 are both set as 4. In another example, w_t1=max(w / 8,4), and h_t1=max(h / 8,4).

[0439] If the sum of the first group coefficients is even, SVT-V (or SVT-H) is used, otherwise SVT-H (or SVT-V) is used.

[0440] Step 2. Parse the remaining transform coefficients in the transform block based on the transform block size.

[0441] The coefficient scan order is derived based on the width and height of the transform block. When parsing the transform coefficients, coefficients in positions covered by the first group of transform coefficients are skipped and are designated as being in the first group of transform coefficients.

[0442] Step 3. Derive the transform block position based on the sum of the second group of transform coefficients.

[0443] The second group of transform coefficients is used to calculate the sum. Based on the sum, a position index is derived. Here, the method described in the second embodiment can be used. The second group of transform coefficients may be in an area of ​​size w_t2×h_t2 in the upper left part of the transform block, different from the first group of transform coefficients, as shown by the dotted area 2 in FIG. 25. In one example, w_t2=w_t, and h_t2=h_t, i.e., all coefficients different from the coefficients of the first group belong to the second group. In another example, w_t2=max(w_t / 2,w_t1), and h_t2=max(h_t / 2,h_t1).

[0444] Step 4. Reconstruct the residual block Ro based on the transform coefficients and the transform block position. The process in step 4 of the first embodiment can be applied.

[0445] Embodiment 4.

[0446] In another embodiment, the number of candidate positions for the residual block using SVT is derived based on the distribution of the transform coefficients.

[0447] A residual block Ro of size w×h can be reconstructed by the following steps:

[0448] Step 1. Determine the transform block size of the residual block Ro.

[0449] The same process as described in step 1 of the first embodiment can be applied.

[0450] Step 2. Parse the transform coefficients of the transform block based on the transform block size.

[0451] The same process as described in step 3 of embodiment 1 can be applied.

[0452] Step 3. Derive the transform block positions based on the distribution of transform coefficients.

[0453] In one example, the number of non-zero transform coefficients Nnz is used to determine the number of candidate positions. If Nnz is less than a threshold (e.g., 4 or 5 or 8), the candidate position step size is set as w / 4 for SVT-V and h / 4 for SVT-H, and thus the number of candidate positions is 3. Otherwise, the candidate position step size is set as w / 8 for SVT-V, SVT-H or h / 8, and thus the number of candidate positions is 5.

[0454] In another example, if the last non-zero transform coefficient is in the top-left 4×4 region in the transform block, the candidate position step size is set as w / 4 for SVT-V and h / 4 for SVT-H, so the number of candidate positions is 3. Otherwise, the candidate position step size is set as w / 8 for SVT-V and h / 8 for SVT-H, so the number of candidate positions is 5.

[0455] Based on the number of candidate positions, the position index is decoded by a truncated unary code, where the maximum possible value is the number of candidate positions minus one.

[0456] Step 4. Reconstruct the residual block Ro based on the transform coefficients and the transform block position. The process in step 4 of the first embodiment can be applied.

[0457] The present disclosure provides the following advantages and benefits over known solutions:

[0458] The candidate positions of the SVT blocks are determined by a step size related to the width and height of the residual block, which is constrained to be no larger than 5. This reduces the transform block information compared to [1] and achieves a better balance between signaling overhead and residual coding efficiency.

[0459] The SVT information is coded differently than in [1], i.e., it is organized as SVT usage information, SVT type information, and SVT location information.

[0460] The SVT position information may be derived based on a sum of multiple transform coefficients of the residual block.

[0461] The SVT type information may be derived based on a sum of multiple transform coefficients of the residual block.

[0462] It may be clearly understood by those skilled in the art that for convenience and simple description, the division of the above-mentioned functional modules is taken as an example for description. In actual application, the above-mentioned functions can be assigned to different functional modules and implemented according to requirements. That is, the internal structure of the device is divided into different functional modules to implement all or part of the above-mentioned functions. For detailed operation processes of the above-mentioned system, device, and unit, reference may be made to the corresponding processes in the above-mentioned method embodiments, and details will not be described again here.

[0463] In some embodiments provided in the present application, it should be understood that the disclosed system, device, and method may be implemented in other ways. For example, the described device embodiments are merely examples. For example, the module or unit division is merely a logical functional division, and may be other divisions in actual implementation. For example, multiple units or components may be combined or integrated into another system, or some functions may be ignored or not performed. Furthermore, the shown or discussed mutual couplings or direct couplings or connections may be implemented using some interfaces. Indirect couplings or communication connections between devices or units may be implemented in electronic, mechanical, or other forms.

[0464] The units described as separate parts may or may not be physically separated. The parts shown as units may or may not be physical units, and may be located in one place or distributed among multiple network units. Some or all of the units may be selected based on actual needs to achieve the purpose of the solution of the embodiment.

[0465] Furthermore, the functional units in the embodiments of the present invention may be integrated into one processing unit, or each of the units may exist physically alone, or two or more units may be integrated into one unit. The integrated unit may be implemented in the form of hardware or in the form of a software functional unit.

[0466] When the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, the integrated unit may be stored in a computer-readable storage medium. Based on such understanding, the technical solution of the present invention, which basically or partially contributes to the prior art, or all or part of the technical solution, may be implemented in the form of a software product. The computer software product is stored in a storage medium and includes some instructions to instruct a computer device (which may be a personal computer, a server, or a network device) or a processor to execute all or part of the steps of the method described in the embodiments of the present invention. The aforementioned storage medium includes any storage medium that can store program code, such as a USB flash drive, a removable hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0467] The above description is merely a specific implementation method of the present invention, and is not intended to limit the protection scope of the present invention. Any variation or replacement that is readily conceived by a person skilled in the art within the technical scope disclosed in the present invention should be encompassed within the protection scope of the present invention. Therefore, the protection scope of the present invention should be subject to the protection scope of the claims. [Explanation of symbols]

[0468] 12 Source Device 14 Destination Device 16 Picture Source 18 Pretreatment Unit 20 Encoder 22, 28 Communication Interface 30 Decoder 32 Aftertreatment unit 34 Display device

Claims

1. 1. A method of decoding, comprising: receiving a bitstream including prediction information of a coding unit (CU), information indicating whether the CU has only one residual transform unit (TU) and whether a size of the residual TU is smaller than a size of the CU, a TU partition mode, and a position of the residual TU, wherein the TU partition mode indicates how to partition the CU to obtain the residual TU; parsing the prediction information for the CU from the bitstream; determining whether the CU has only one residual TU and whether a size of the residual TU is smaller than a size of the CU; When the CU has only one residual TU and the size of the residual TU is smaller than the size of the CU, obtaining the TU partition mode and the position of the residual TU; obtaining a transform type of the residual TU based on the TU partition mode and the position of the residual TU; obtaining transform coefficients of the residual TU; obtaining a residual block of the CU based on the transform coefficients and the transform type; obtaining a predicted block of the CU based on the prediction information; obtaining a video block based on the residual block and the prediction block; The method includes:

2. The method of claim 1 , wherein the TU partition mode indicates that the CU is partitioned into left TUs and right TUs, the residual TU is the left TU or the right TU, and a size of the left TU is equal to a size of the right TU.

3. 3. The method of claim 2, wherein obtaining the transform type includes obtaining a horizontal transform of the residual TU and a vertical transform of the residual TU, wherein when the residual TU is the left TU, the horizontal transform is based on a discrete cosine transform type VIII (DCT-8) and the vertical transform is based on a discrete sine transform type VII (DST-7), and when the residual TU is the right TU, the horizontal transform is based on a DST-7 and the vertical transform is based on a DST-7.

4. The method of claim 1 , wherein the TU partition mode indicates that the CU is partitioned into an upper TU and a lower TU, the residual TU is the upper TU or the lower TU, and a size of the upper TU is equal to a size of the lower TU.

5. 5. The method of claim 4, wherein the step of obtaining the transform type includes the steps of obtaining a horizontal transform of the residual TU and a vertical transform of the residual TU, wherein when the residual TU is the upper TU, the horizontal transform is based on a discrete sine transform type VII (DST-7) and the vertical transform is based on a discrete cosine transform type VIII (DCT-8), and when the residual TU is the lower TU, the horizontal transform is based on a DST-7 and the vertical transform is based on a DST-7.

6. 1. A video decoder comprising: a receiver configured to receive a bitstream including prediction information of a coding unit (CU), information indicating whether the CU has only one residual transform unit (TU) and whether a size of the residual TU is smaller than a size of the CU, a TU partition mode, and a position of the residual TU, the TU partition mode indicating how to partition the CU to obtain the residual TU; and at least one processor coupled to the receiver, Parsing the prediction information for the CU from the bitstream; determining whether the CU has only one residual TU and whether a size of the residual TU is smaller than a size of the CU; When the CU has only one residual TU and the size of the residual TU is smaller than the size of the CU, obtain the TU partition mode and the position of the residual TU; Obtain a transform type of the residual TU according to the TU partition mode and the position of the residual TU; obtaining transform coefficients of the residual TU; Obtaining a residual block of the CU based on the transform coefficients and the transform type; Obtaining a predicted block of the CU based on the prediction information; obtaining a video block based on the residual block and the prediction block; at least one processor configured to a video decoder including:

7. 7. The video decoder of claim 6, wherein the TU partition mode indicates that the CU is partitioned into left TU and right TU, the residual TU is the left TU or the right TU, and a size of the left TU is equal to a size of the right TU.

8. 8. The video decoder of claim 7, wherein the at least one processor is further configured to obtain the transform type by obtaining a horizontal transform of the residual TU and a vertical transform of the residual TU, wherein when the residual TU is the left TU, the horizontal transform is based on a discrete cosine transform type VIII (DCT-8) and the vertical transform is based on a discrete sine transform type VII (DST-7), and when the residual TU is the right TU, the horizontal transform is based on DST-7 and the vertical transform is based on DST-7.

9. 7. The video decoder of claim 6, wherein the TU partition mode indicates that the CU is partitioned into an upper TU and a lower TU, the residual TU is the upper TU or the lower TU, and a size of the upper TU is equal to a size of the lower TU.

10. 10. The video decoder of claim 9, wherein the at least one processor is further configured to obtain the transform type by obtaining a horizontal transform of the residual TU and a vertical transform of the residual TU, wherein when the residual TU is the upper TU, the horizontal transform is based on a Discrete Sine Transform type VII (DST-7) and the vertical transform is based on a Discrete Cosine Transform type VIII (DCT-8), and when the residual TU is the lower TU, the horizontal transform is based on DST-7 and the vertical transform is based on DST-7.

11. 1. A method of encoding, comprising: obtaining a block of coding units (CUs); Partitioning the CU according to a TU partition mode to obtain residual transform units (TUs), where the size of the residual TU is smaller than the size of the CU; determining whether the residual TU is the only residual TU of the CU; When the residual TU is the only residual TU of the CU, obtaining a transform type of the residual TU based on the TU partition mode and a position of the residual TU; performing a transform on the residual TU according to the transform type to obtain transform coefficients of the residual TU; generating a bitstream including the transform coefficients, the TU partition mode, the position, and information indicating whether the residual TU is the only residual TU of the CU and whether a size of the residual TU is smaller than a size of the CU; The method includes:

12. The method of claim 11 , wherein the TU partition mode indicates that the CU is partitioned into left TUs and right TUs, the residual TU is the left TU or the right TU, and a size of the left TU is equal to a size of the right TU.

13. 13. The method of claim 12, wherein obtaining the transform type includes obtaining a horizontal transform of the residual TU and a vertical transform of the residual TU, wherein when the residual TU is the left TU, the horizontal transform is based on a discrete cosine transform type VIII (DCT-8) and the vertical transform is based on a discrete sine transform type VII (DST-7), and when the residual TU is the right TU, the horizontal transform is based on a DST-7 and the vertical transform is based on a DST-7.

14. The method of claim 11 , wherein the TU partition mode indicates that the CU is partitioned into an upper TU and a lower TU, the residual TU is the upper TU or the lower TU, and a size of the upper TU is equal to a size of the lower TU.

15. 15. The method of claim 14, wherein obtaining the transform type includes obtaining a horizontal transform of the residual TU and a vertical transform of the residual TU, wherein when the residual TU is the upper TU, the horizontal transform is based on a Discrete Sine Transform type VII (DST-7) and the vertical transform is based on a Discrete Cosine Transform type VIII (DCT-8), and when the residual TU is the lower TU, the horizontal transform is based on a DST-7 and the vertical transform is based on a DST-7.

16. 1. A video encoder comprising: one or more memories configured to store programming instructions; at least one processor coupled to the one or more memories to execute the programming instructions to cause the video encoder to: obtaining a block of coding units (CUs); Partition the CU according to a TU partition mode to obtain a residual transform unit (TU), and the size of the residual TU is smaller than the size of the CU; determining whether the residual TU is the only residual TU of the CU; When the residual TU is only a residual TU of the CU, obtain a transform type of the residual TU according to the TU partition mode and a position of the residual TU; performing a transform on the residual TU according to the transform type to obtain transform coefficients of the residual TU; generating a bitstream including the transform coefficients, the TU partition mode, the position, and information indicating whether the residual TU is the only residual TU of the CU and whether a size of the residual TU is smaller than a size of the CU; at least one processor configured to A video encoder including:

17. 17. The video encoder of claim 16, wherein the TU partition mode indicates that the CU is partitioned into left TU and right TU, the residual TU is the left TU or the right TU, and a size of the left TU is equal to a size of the right TU.

18. The at least one processor executes the programming instructions to cause the video encoder to:

18. The video encoder of claim 17, further configured to obtain the transform type by obtaining a horizontal transform of the residual TU and a vertical transform of the residual TU, wherein when the residual TU is the left TU, the horizontal transform is based on a Discrete Cosine Transform type VIII (DCT-8) and the vertical transform is based on a Discrete Sine Transform type VII (DCT-7), and when the residual TU is the right TU, the horizontal transform is based on a DCT-7 and the vertical transform is based on a DCT-7.

19. 17. The video encoder of claim 16, wherein the TU partition mode indicates that the CU is partitioned into an upper TU and a lower TU, the residual TU is the upper TU or the lower TU, and a size of the upper TU is equal to a size of the lower TU.

20. The at least one processor executes the programming instructions to cause the video encoder to:

20. The video encoder of claim 19, further configured to obtain the transform type by obtaining a horizontal transform of the residual TU and a vertical transform of the residual TU, wherein when the residual TU is the top TU, the horizontal transform is based on a Discrete Sine Transform type VII (DST-7) and the vertical transform is based on a Discrete Cosine Transform type VIII (DCT-8), and when the residual TU is the bottom TU, the horizontal transform is based on DST-7 and the vertical transform is based on DST-7.

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