Power supply superimposed communication device and power supply superimposed communication system

Abstract

To provide a power supply superimposed communication device capable of suppressing an increase in mode conversion loss due to variations in electrical characteristics.SOLUTION: A power supply superimposed communication device 1-1 includes differential wiring 5-1 with signal wiring 6-1 and 7-1 connected to differential signal wiring 8, a power supply element 30-1 for supplying first applied voltage and second applied voltage to the signal wiring 6-1 and 7-1, a high frequency cut filter 11-1 connected to the wiring 6-1, a high frequency cut filter 11-12 connected to the wiring 7-1, and coils 12-1 and 12-2. The coil 12-1 is connected to the cut filter 11-1, the coil 12-2 is connected to the cut filter 11-2, and the coils 12-1 and 12-2 are reversely wound and have an inductor 10-1 that is magnetically coupling, and a power supply is superimposed on the differential signal wiring 8. An inductance value L1 of the cut filter 11-1 and an inductance value of L3 of the coil 12-1 are L1<1.5×L3, and an inductance values L2 of the cut filter 11-2 and an inductance value L4 of the coil 12-2 are L2<1.5×L4.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a power supply superimposed communication device and a power supply superimposed communication system. [Background technology]

[0002] In recent years, the speed of signal transmission between devices installed in vehicles using twisted pair cables has been increasing. For example, in-vehicle Ethernet is being standardized from 100BASE-T1, which was the mainstream standard for transmitting 100Mbps, to 1000BASE-T1, which enables transmission at Gbps or higher, and from multi-gigabit to 25G BASE-T1.

[0003] Additionally, MIPI A-Phy, a communications standard for sensors, primarily cameras, is also moving forward with standardization of a method for transmitting high-speed signals over Gbps over twisted pair cables.

[0004] Furthermore, in order to reduce the weight of harnesses, these standards are also promoting the standardization of power over data line (PoDL) technology, which transmits power by superimposing it on a cable for signal transmission.

[0005] The challenge with such high-speed in-vehicle cable transmission is maintaining EMC performance as frequencies increase. Because the current spectrum used for signal transmission is large, extending beyond the GHz band, it is necessary to suppress radiation in this high-frequency band.

[0006] At the same time, since the communication LSI has the sensitivity to transmit and receive signals up to the GHz band, it is also necessary to suppress interference from noise in the GHz band.

[0007] The challenge of increasing the speed of in-vehicle cable transmission is maintaining EMC performance as frequencies increase. Because the current spectrum used in signal transmission is large and extends beyond the GHz band, it is necessary to suppress radiation in this high-frequency band. At the same time, because the communication LSI has the sensitivity to transmit and receive signals up to the GHz band, it is also necessary to suppress the intrusion of noise in the GHz band.

[0008] In the differential signal transmission that is the subject of this invention, ideally the positive (P) side transmission line and the negative (N) side transmission line that make up the differential transmission path are symmetrical, so that when currents of opposite phase flow through the respective wiring, the magnetic fields that are generated can be canceled out and radiation can be suppressed.

[0009] In addition, when common mode noise is superimposed on both signal lines, it can be cancelled by the differential receiver, improving resistance to external noise.

[0010] However, in the P and N signal wiring that constitute the differential transmission line, the differential balance can be disturbed due to variations in electrical characteristics caused by various factors, making it impossible to enjoy the benefits of differential transmission and resulting in deterioration of EMC performance. The degree of variation in this differential line is defined as mode conversion loss, and is used as a criterion for judging EMC performance, especially in the high frequency range of 10 MHz or higher.

[0011] This represents the amount of differential mode converted to common mode in differential wiring, or the amount of common mode converted to differential mode. If this is large, it can lead to an increase in radiated noise due to the generation of unintended common mode components, or a deterioration in noise resistance due to the common mode components being converted to differential components.

[0012] A known prior art document related to the present invention is Patent Document 1. Patent Document 1 discloses a system in which electronic devices are connected with a twisted pair cable and a differential signal and a power supply are superimposed on the twisted pair cable for transmission.

[0013] In this system, a DC blocking capacitor is placed on the signal line, and a filter element such as a common mode choke coil or inductor is inserted on the power supply line as a PoDL filter.

[0014] This separates the signal and power supply according to the frequency range of the filter element. [Prior art documents] [Patent documents]

[0015] [Patent Document 1] U.S. Patent No. 10,594,519 Summary of the Invention [Problem to be solved by the invention]

[0016] The technology of Patent Document 1 reduces the leakage of common mode noise from the circuit on the wiring board to the twisted pair cable by placing a filter element between the communication circuit and the twisted pair cable, and also suppresses the propagation of common mode noise picked up by the twisted pair cable to the circuit on the wiring board.

[0017] However, when power supply superposition occurs in the PoDL filter components that make up the transmission system, and an imbalance in the electrical characteristics occurs between P and N, the mode conversion loss in the transmission path increases, degrading EMC performance.In particular, at low frequencies, the variation in the inductor components of the PoDL filter components occurs due to the difference in the magnitude of the bias voltage, contributing to an increase in mode conversion loss.

[0018] Patent Document 1 does not take into consideration the increase in mode conversion loss.

[0019] The mode conversion loss is expressed by the Scd term of the Mixed Mode S-Parameter.

[0020] An object of the present invention is to provide a power source superimposed communication device and a power source superimposed communication system capable of suppressing an increase in mode conversion loss caused by variations in electrical characteristics. [Means for solving the problem]

[0021] In order to achieve the above object, the present invention is configured as follows.

[0022] The power supply overlapping communication device includes a first differential wiring having a first signal wiring and a second signal wiring connected to a differential signal wiring, a first power supply element that supplies a first applied voltage and a second applied voltage to the first signal wiring and the second signal wiring, respectively, a first high frequency cut filter having one end connected to the first signal wiring, a second high frequency cut filter having one end connected to the second signal wiring, a first coil and a second coil, one end of the first coil is connected to the other end of the first high frequency cut filter, and one end of the second coil is connected to a front end of the first high frequency cut filter. a first inductor connected to the other end of the second high-frequency cut filter, the first coil and the second coil being magnetically coupled to each other with reverse windings, and a power supply superimposed on the differential signal wiring, wherein an inductance value L1 of the first high-frequency cut filter and an inductance value L3 of the first coil of the first inductor have a relationship of L1<1.5×L3, and an inductance value L2 of the second high-frequency cut filter and an inductance value L4 of the second coil of the first inductor have a relationship of L2<1.5×L4. Effect of the Invention

[0023] According to the present invention, it is possible to realize a power source superimposed communication device and a power source superimposed communication system capable of suppressing an increase in mode conversion loss caused by variations in electrical characteristics.

[0024] Problems, configurations and effects other than those described above will become apparent from the following description of the preferred embodiment of the invention. [Brief description of the drawings]

[0025] [Figure 1] 1 is a diagram illustrating a configuration of a power source superimposed communication system according to a first embodiment of the present invention. [Diagram 2] FIG. 2 is a diagram showing a first example of a circuit configuration of a PoDL filter different from that of the present invention. [Diagram 3] FIG. 13 is a diagram showing a second example of a circuit configuration of a PoDL filter different from that of the present invention. [Figure 4] 1 is a diagram illustrating a configuration of a power source superimposed communication device according to a first embodiment of the present invention. [Diagram 5] FIG. 1 is a diagram showing an equivalent circuit of a four-terminal inductor component. [Figure 6A] FIG. 1 is a diagram showing the effect of the present invention. [Figure 6B] FIG. 1 is a diagram showing the effect of the present invention. [Figure 7] FIG. 1 is a diagram for explaining a problem to be solved by the present invention. [Figure 8] FIG. 2 is a diagram for explaining the basis of numerical values ​​used in the present invention. [Figure 9] FIG. 2 is a diagram for explaining the basis of numerical values ​​used in the present invention. [Figure 10] FIG. 11 is a diagram showing a circuit configuration according to a second embodiment of the present invention. [Figure 11] FIG. 11 is a diagram showing a layout pattern according to a third embodiment of the present invention. [Figure 12] FIG. 11 is a diagram showing a circuit configuration according to a fourth embodiment of the present invention. [Figure 13] FIG. 11 is a diagram showing a circuit configuration according to a fifth embodiment of the present invention. [Figure 14] FIG. 13 is a diagram illustrating a configuration of a power source superimposed communication system according to a sixth embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0026] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. The following description and drawings are examples for explaining the present invention, and appropriate omissions and simplifications have been made for clarity of explanation. The present invention can be implemented in various other forms. Unless otherwise specified, each component may be singular or plural.

[0027] In order to facilitate understanding of the invention, the position, size, shape, range, etc. of each component shown in the drawings may not represent the actual position, size, shape, range, etc. Therefore, the present invention is not necessarily limited to the position, size, shape, range, etc. disclosed in the drawings.

[0028] When there are multiple components having the same or similar functions, they may be described by using the same reference numerals with different subscripts. However, when there is no need to distinguish between these multiple components, the subscripts may be omitted. EXAMPLES

[0029] Example 1 FIG. 1 is a diagram showing a configuration of a power-source overlapping communication system having a power-source overlapping communication device 1-1 (first power-source overlapping communication device) and a power-source overlapping communication device 1-2 (second power-source overlapping communication device) according to a first embodiment of the present invention.

[0030] 1, a power supply superimposed communication device 1-1, which is an electronic device, is connected to a twisted pair cable (differential signal wiring) 8 via a cable connector 16-1, and is connected to a power supply superimposed communication device 1-2, which is another external electronic device, for signal transmission. At the same time, the power supply superimposed communication device 1-1 supplies power to the power supply superimposed communication device 1-2 by superimposing a power supply current in addition to a signal on the twisted pair cable 8.

[0031] In the power supply superimposed communication device 1-1, a communication LSI 2-1 for communication is connected to a cable connector 16-1 by a differential wiring 5-1 laid out on a printed circuit board. The differential wiring 5-1 is configured as a pair of a P-side signal wiring 6-1 (first signal wiring) and an N-side signal wiring 7-1 (second signal wiring).

[0032] Between the communication LSI 2-1 and the cable connector 16-1, there are arranged AC coupling capacitors 14P-1 and 14N-1 for cutting DC potential, a common mode choke coil (CMCC) 15-1 for reducing common mode noise flowing into the communication LSI, and electrostatic protection elements 17P-1 and 17N-1 for avoiding electrostatic breakdown. In addition, there are arranged a power supply element (power supply IC) 30-1 (first power supply element) for superimposing a power supply on a signal wiring, a power supply superimposing filter (PoDL filter) 10-1 (four-terminal differential mode inductor (first inductor)) for connecting a power supply line and a signal line, a first high frequency cut filter 11-1 (two-terminal differential mode inductor (second inductor)), and a second high frequency cut filter 11-2 (two-terminal differential mode inductor (second inductor)). The power supply element 30-1 is supplied with a voltage Vbat from an external power supply (not shown).

[0033] The power supply element 30-1 is configured to supply a first applied voltage Vout,P and a second applied voltage Vout,N to the first signal wiring 6-1 and the second signal wiring 7-1, respectively.

[0034] Four-terminal differential mode inductor 10-1 has two coils wound in opposite directions and magnetically coupled to each other.

[0035] That is, one end of a coil (first coil) on one side of four-terminal differential mode inductor 10-1 is connected to the other end of two-terminal differential mode inductor 11-1 which is a first high-frequency cut filter, and one end of a coil (second coil) on the other side of four-terminal differential mode inductor 10-1 is connected to the other end of two-terminal differential mode inductor 11-2 which is a second high-frequency cut filter. The coil on one side and the coil on the other side of four-terminal differential mode inductor 10-1 are magnetically coupled by being wound in opposite directions.

[0036] The coil on one side of four-terminal differential mode inductor 10-1 can be defined as a first inductor, and the coil on the other side of four-terminal differential mode inductor 10-1 can be defined as a second inductor.

[0037] The configuration of the PoDL filter will be described in detail later.

[0038] The communication LSI 2-1 is connected to the information processing LSI 9-1, and the information processing LSI 9-1 exchanges data with the communication LSI 2-1 to perform various processes. The power supply superimposed communication device 1-2 has a circuit configuration similar to that of the power supply superimposed communication device 1-1.

[0039] That is, the power supply superimposed communication device 1-2 includes a cable connector 16-2, a P-side signal wiring 6-2 (third signal wiring), an N-side signal wiring 7-2 (fourth signal wiring), electrostatic protection elements 17N-2, 17P-2, a differential mode inductor 10-2 (four-terminal inductor (second inductor)), 11-3 (two-terminal inductor (third high-frequency cut filter)), 11-4 (two-terminal inductor (fourth high-frequency cut filter)), and a common mode choke coil 15-2.

[0040] The power supply superimposed communication device 1-2 also includes AC coupling capacitors 14P-2 and 14N-2, a communication LSI 2-2, an information processing LSI 9-2, and a power supply element 30-2 (second power supply element). The power supply element 30-2 is supplied with a first applied voltage Vout,P and a second applied voltage Vout,N via a signal wiring 6-2 (third signal wiring) and a signal wiring 7-2 (fourth signal wiring), respectively, and converts them into operating voltages.

[0041] However, unlike the power supply element 30-1 of the power supply superimposed communication device 1-1, the power supply element 30-2 of the power supply superimposed communication device 1-2 is not supplied with a voltage from an external power supply. The power supply element 30-2 of the power supply superimposed communication device 1-2 is supplied with a voltage superimposed on the signal wiring and supplied from the power supply superimposed communication device 1-1.

[0042] Note that this configuration is a general circuit configuration, and components other than those described here (e.g., common mode termination components, filter components, power supply superimposition filter components, etc.) may be added, and some of the components described here may not be included as components.

[0043] Mode conversion loss is a representative value of the EMC performance of the power supply superimposed communication devices 1-1 and 1-2. By checking whether the Scd11 value measured from the cable connectors 16-1 and 16-2 using a network analyzer is smaller than the target value, the pass / fail of the EMC performance can be judged. An example of such power supply superimposed communication devices 1-1 and 1-2 is an automatic driving electronic control unit (AD-ECU) for an automobile.

[0044] The feature of the components in the present invention is the circuit configuration of the PoDL filter, which aims to suppress this mode conversion loss. The issues and effects of filter components different from those in the present invention will be described with reference to Figures 2 to 6B.

[0045] 2 shows a first example (Comparative Example 1) of a circuit configuration of a PoDL filter different from the present invention. In this example, a differential mode inductor 10-1, which is a four-terminal inductor component, is used as the PoDL filter.

[0046] Differential mode inductor 10-1 has two coils wound in opposite directions and arranged in close parallel relation to each other for strong magnetic coupling, which increases the differential impedance around the self-resonant frequency of the component and prevents the inflow of high-frequency differential current. This prevents the high-frequency differential signal passing through P-side signal wiring 6-1, which is the differential transmission path, from leaking to the power supply element 30-1.

[0047] FIG. 5 shows a simplified equivalent circuit of four-terminal differential mode inductor 10-1 (four-terminal differential mode inductor 10-2 has a similar equivalent circuit).

[0048] In FIG. 5, a four-terminal differential mode inductor 10-1 has a first coil 12-1 and a second coil 12-2. One end of the first coil 12-1 is connected to the other end of a first high-frequency cut filter 11-1, and one end of the second coil 12-2 is connected to the other end of a second high-frequency cut filter 11-2. The first coil 12-1 and the second coil 12-2 are magnetically coupled to each other with their windings reversed.

[0049] Two coils 12-1 (first coil) and 12-2 (second coil) facing in opposite directions have the same inductance value. In addition, since these coils 12-1 and 12-2 need to be strongly coupled to each other and are arranged close to each other in the same component, parasitic capacitances 13-1 and 13-2 exist between the coils.

[0050] The problems with electrical characteristics in such a circuit configuration will be described with reference to Figures 6A and 6B. Figure 6A shows the insertion loss. In Comparative Example 1, which is different from the present invention and was described in Figure 2, the insertion loss deteriorated when the frequency exceeded several hundred MHz, and therefore there was a problem in achieving signal transmission performance of several Gbps.

[0051] Next, a second example (Comparative Example 2) of a circuit configuration of a PoDL filter different from the present invention is shown in Fig. 3. In this example, two-terminal inductor components 11-1 and 11-2 are used as a PoDL filter. The differential impedance is increased around the self-resonant frequency of the two-terminal inductor components 11-1 and 11-2, which serves to prevent the inflow of high-frequency current.

[0052] This prevents the high-frequency P-side signal and N-side signal passing through the differential wiring 5-1 (first differential differential wiring) from leaking to the power supply element 30-1 side. Problems with electrical characteristics in such a circuit configuration will be described with reference to Figures 6A and 6B.

[0053] Fig. 6A shows the characteristics of mode conversion noise. In Comparative Example 2 described in Fig. 3, it can be seen that the mode conversion noise increases significantly below 100 MHz. This is because, when a voltage is applied via power supply element 30-1, a high voltage (e.g., 12 V) is applied to two-terminal inductor component 11-1 connected to the P-side wiring, while the same potential as ground (0 V) is applied to two-terminal inductor component 11-2 connected to the N-side, so that only the P-side two-terminal inductor component 11-1 experiences a drop in inductance due to the application of voltage, disrupting the balance of inductance values ​​between P and N, and this difference causes mode conversion loss.

[0054] In Figure 6A, the standard values ​​for Ethernet 1000BASE-T1 are shown for reference, but it can be seen that the specifications are exceeded below a few tens of MHz. On the other hand, in terms of insertion loss, since independent two-terminal components are mounted on the P and N wiring, there is almost no adverse effect on loss in the differential transmission path, as shown in Figure 6A.

[0055] The problem of low-frequency mode conversion noise, which is an issue in the circuit configuration shown in Figure 3, hardly appears in the circuit configuration in Figure 2. This is because with a four-terminal inductor, the effective inductance is expressed as the sum of the mutual inductance, which has the effect of canceling out the effects of the inductor on one side.

[0056] To summarize, in Comparative Example 1, mode conversion noise can be kept low, but there is a problem with insertion loss, making it difficult to support Gbps-class high frequencies. On the other hand, in Comparative Example 2, there is no problem with insertion loss, but there is a problem with mode conversion noise increasing when a bias is applied, making it difficult to achieve EMC performance.

[0057] Therefore, in the present invention, as shown in the configuration in Figure 4, two-terminal differential mode inductors 11-1 and 11-2 are connected to the P-side signal wiring 6-1 and the N-side signal wiring 7-1, respectively, and then a four-terminal differential mode inductor 10-1 is connected to the other end, which is then connected to power supply element 30-1.

[0058] In this configuration, two-terminal differential mode inductors 11-1 and 11-2 connected to the signal wiring serve to cut high-frequency components, effectively improving the high-speed signal transmission performance. On the other hand, the effect of changes in the inductance balance of two-terminal differential mode inductors 11-1 and 11-2 due to the application of a voltage bias is mitigated by connecting four-terminal differential mode inductor 10-1, which is less susceptible to the bias voltage, in series to relatively reduce the influence of two-terminal differential mode inductors 11-1 and 11-2, thereby suppressing mode conversion noise.

[0059] FIG. 4 shows the power supply superimposed communication device 1-1, but the power supply superimposed communication device 1-2 is also configured in the same manner as the power supply superimposed communication device 1-1, with two-terminal differential mode inductors 11-1 and 11-2 connected to the P-side signal wiring 6-1 and the N-side signal wiring 7-1, respectively, and with a four-terminal differential mode inductor 10-1 connected to the other end, which is then connected to the power supply element 30-1.

[0060] Fig. 6A shows the insertion loss when the circuit configuration of Example 1 is adopted, and Fig. 6B shows the mode conversion noise characteristics of Example 1. As shown in Fig. 6A and Fig. 6B, both high-speed transmission properties and EMC performance have been achieved.

[0061] FIG. 7 shows the frequency characteristics of mode conversion noise when the circuit configuration of FIG. 4 according to the first embodiment of the present invention is adopted.

[0062] As shown in Fig. 7, there are two frequency domains where the mode conversion noise has a maximum value, each of which is surrounded by a dotted line.

[0063] The first is region 1 that exists on the low frequency side, which is a component that increases mode conversion noise by destroying the balance of the inductance values ​​of two-terminal differential mode inductors 11-1 and 11-2 when a voltage is applied.

[0064] The second is region 2, which exists on the high frequency side, and is a component resulting from impedance imbalance caused by the shift in the impedance peak due to LC antiresonance generated by the inductance components of two-terminal differential mode inductors 11-1 and 11-2 and the capacitive component of four-terminal differential mode inductor 10-1 between the P side and the N side.

[0065] 7, even in the circuit configuration according to Example 1, mode conversion noise may become large in region 1. This is because when the ratio between the inductance value of two-terminal differential mode inductors 11-1 and 11-2 constituting the PoDL filter and the inductance value of four-terminal differential mode inductor 10-1 is insufficient, the change in inductance of two-terminal differential mode inductors 11-1 and 11-2 appears relatively large, and the benefit of the stability of the inductance value of four-terminal differential mode inductor 10-1 cannot be obtained.

[0066] Here we will discuss this more quantitatively. Considering the standard values ​​of 1000BASE-T1, the in-vehicle Ethernet standard, as the standard, we analytically confirmed that if the difference in inductance value between P and N is less than 5%, it will be possible to obtain a level of mode conversion noise with a margin relative to the standard. However, this 5% criterion changes depending on the inductance value, so it is only a reference value.

[0067] In other words, the electrical characteristic values ​​of the components should be selected so that the change in inductance value of P-side two-terminal differential mode inductors 11-1 and 11-2 due to bias is less than 5% of the overall inductance value, including the inductance value of four-terminal differential mode inductor 10-1.

[0068] What is important to achieve this is the ratio between the inductance value (L1) of two-terminal differential mode inductor 11-1, the inductance value (L2) of two-terminal differential mode inductor 11-2, the inductance value (L3) of first coil 12-1 of four-terminal differential mode inductor 10-1, and the inductance value (L4) of second coil 12-2 of four-terminal differential mode inductor 10-1.

[0069] Since the four-terminal differential mode inductor 10-1 also has mutual inductance, it is difficult to mathematically determine an exact value. Therefore, a design space map that can ensure a margin for the standard value of the mode conversion noise by parametric analysis is obtained by simulation.

[0070] Experiments have shown that the amount of variation due to the bias voltage of the two-terminal differential mode inductors 11-1 and 11-2 is about 8% to 10% when 10 V is applied. For example, since the 1000BASE-T1 standard discusses applying a bias voltage of 12 V to 48 V, we have obtained a design space map as shown in Fig. 8 to find out how the margin amount of mode conversion noise changes depending on the combination of the values ​​of L1 (L2) and L3 (L4), assuming that an 8% variation occurs in L1 when 10 V is applied.

[0071] As a result, it was confirmed that in order to secure a margin in region 1 shown in Figure 7, the inductance values ​​L1 and L2 of two-terminal differential mode inductors 11-1 and 11-2 must be less than 1.5 times the inductance values ​​L3 and L4 of four-terminal differential mode inductor 10-1 (differential mode inductor: DMI), making it possible to secure a margin at various L values.

[0072] In other words, the condition for exhibiting the effect of the present invention is that L1<1.5×L3 and L2<1.5×L4 are satisfied. This is the region beyond the arrow a from the inclined dashed line shown in FIG.

[0073] From the above considerations, the inductance value L1 of two-terminal differential mode inductor 11-1, which is the first high-frequency cut filter, and the inductance value L3 of one side of four-terminal differential mode inductor 10-1 (first inductor (first coil 12-1)) satisfy the relationship L1<1.5×L3, and the inductance value L2 of two-terminal differential mode inductor 11-2, which is the second high-frequency cut filter, and the inductance value L4 of the other side of 10-1 (second inductor (second coil 12-2)) satisfy the relationship L2<1.5×L4.

[0074] As described above, in the first embodiment of the present invention, the power supply superimposed communication devices 1-1 and 1-2 are configured such that the two-terminal differential mode inductors 11-1 and 11-2 are connected to the P-side signal wiring 6-1 and the N-side signal wiring 7-1, respectively, and the four-terminal differential mode inductor 10-1 is connected to the other end, which is then connected to the power supply element 30-1.

[0075] Therefore, it is possible to realize a power source superimposed communication device and a power source superimposed communication system capable of suppressing an increase in mode conversion loss due to variations in electrical characteristics, that is, it is possible to realize a power source superimposed communication device and a power source superimposed communication system that achieve Gbps-class signal transmission performance while improving EMC performance.

[0076] Example 2 Next, a second embodiment of the present invention will be described.

[0077] Since the overall configuration of the second embodiment is similar to that of the first embodiment, illustration of the overall configuration is omitted, and only the differences from the first embodiment will be described.

[0078] Constraint values ​​of component parameters according to the second embodiment of the present invention will be described with reference to Fig. 8. As described above, it is better for the inductance values ​​of two-terminal differential mode inductors 11-1 and 11-2 to be smaller relative to the inductance value of four-terminal differential mode inductor 10-1. However, if the value itself is small, adverse side effects will occur.

[0079] That is, the characteristics of region 2 shown in Fig. 7. As mentioned above, this characteristic is generated by the resonance of the parasitic components of two-terminal differential mode inductors 11-1 and 1-2 and four-terminal differential mode inductor 10-1. The higher the Q value of this maximum value, the sharper the impedance peak characteristic difference becomes, resulting in large mode conversion noise.

[0080] In other words, it is important to suppress the Q value of this resonance below a certain level. In order to suppress the Q value of the parallel LC resonance, it is necessary to increase the L value. Assuming resonance with a parasitic capacitance of sub-pF to about 1 pF that generally parasitizes four-terminal differential mode inductor 10-1, we obtained the analysis space as shown in Figure 8, and found that there is a margin with respect to the standard value when the inductance value of L1 is greater than 2.1 μH.

[0081] That is, in the circuit configuration shown in Fig. 4, in addition to the numerical limitations of Example 1, the inductance value of two-terminal differential mode inductors 11-1 and 11-2 is set to 2.1 μH or more in Example 2 of the present invention. As shown in Fig. 8, the region in the direction indicated by arrow a from the dashed line (L1<1.5×L3) and the region in the direction indicated by arrow b from the dashed line (L1≧2.1 μH) are set.

[0082] The inductance value of the two-terminal differential mode inductors 11-3 and 11-4 of the power source overlapping communication device 1-2 is also set to 2.1 μH or more.

[0083] According to the second embodiment, in addition to obtaining the same effects as those of the first embodiment, it is possible to obtain an effect that the mode conversion noise can be further suppressed.

[0084] Example 3 Next, a third embodiment of the present invention will be described.

[0085] The overall configuration of the third embodiment is similar to that of the first embodiment, so illustration of the overall configuration is omitted, and only the differences from the first embodiment will be described.

[0086] Third Embodiment A circuit configuration and constraint values ​​of component parameters according to a third embodiment of the present invention will be described with reference to FIGS.

[0087] As explained above, the characteristics of region 2 shown in Fig. 7 are generated by the resonance of the parasitic components of two-terminal differential mode inductors 11-1 and 11-2 and four-terminal differential mode inductors 11-1 and 11-2, and the maximum value depends on the Q value of the resonance. It is important to keep the Q value of this resonance below a certain level.

[0088] We have explained above the conditions for suppressing the Q value by increasing the L value above a certain level (Line 2 in Figure 9). Another method for suppressing the Q value is to insert a resistor in parallel with the LC parallel resonant circuit.

[0089] Specifically, as shown in Fig. 10, resistive components 3-1 and 3-2 are connected in parallel to two two-terminal differential mode inductors 11-1 and 11-2, respectively. In this case, the resistance values ​​of these resistive components 3-1 and 3-2 are between 500Ω and 1.5kΩ. The lower limit of 500Ω is 10 times the characteristic impedance of the signal wiring, 50Ω, and is the minimum value required to suppress leakage from the signal wiring.

[0090] Moreover, the upper limit of 1.5 kΩ is the limit value below which the resistance value must be reduced in order to lower the Q value.

[0091] Figure 9 shows the boundary between Example 1 and Example 2, as well as the change in the boundary condition of the two-terminal differential mode inductors 11-1 and 11-2 when parallel resistors 3-1 and 3-2 are inserted. When resistors are inserted in parallel, the Q-factor reducing effect of the resistor is added, lowering the constraint on the lower limit of the inductor. Specifically, the boundary condition is lowered to 1.5 μH.

[0092] That is, when resistance components of 500 Ω to 1.5 kΩ are connected in parallel, the inductance value of two-terminal differential mode inductors 11-1 and 11-2 should be 1.5 μH or more.

[0093] For reference, the analysis results of the mode conversion noise near the boundary conditions are shown in Fig. 9. It can be seen that when the boundary conditions obtained here are deviated from, the standard values ​​are deviated, albeit slightly.

[0094] 10 shows the configuration of power supply superimposed communication device 1-1, but resistors can also be connected in parallel to two-terminal differential mode inductors 11-3 and 11-4 in power supply superimposed communication device 1-2. In this case, the inductance values ​​of two-terminal differential mode inductors 11-3 and 11-4 need only be 1.5 μH or more.

[0095] According to the third embodiment, in addition to being able to obtain the same effects as those of the first and second embodiments, there is also an effect that by inserting resistors in parallel to two-terminal differential mode inductors 11-1 and 11-2 to add the effect of reducing the Q value due to the resistors, the lower limit constraint of two-terminal differential mode inductors 11-1 and 11-2 can be lowered.

[0096] Example 4 Next, a fourth embodiment of the present invention will be described.

[0097] Since the overall configuration of the fourth embodiment is similar to that of the first embodiment, illustration of the overall configuration is omitted, and only the differences from the first embodiment will be described.

[0098] Fig. 11 is a diagram showing a mounting pattern according to the first embodiment of the present invention. As shown in Fig. 11, a P-side signal wiring 6-1 and an N-side signal wiring 7-1 constituting a differential wiring 5-1 are formed on the front surface (one side) of a printed circuit board 19 in a power source overlapping communication device 1-1. Then, two-terminal differential mode inductor components 11-1 and 11-2 are formed on both sides of the differential wiring 5-1, respectively, and connected to the differential wiring 5-1.

[0099] Two-terminal differential mode inductor components 11-1, 11-2 are connected via through holes 18-1, 18-2 to four-terminal differential mode inductor 10-1 mounted on the back surface (other surface) of printed circuit board 19. Power is supplied to four-terminal differential mode inductor 10-1 through power supply lines G and V formed on the back surface of printed circuit board 19.

[0100] By using the configuration shown in Figure 11, the distance between the P-side wiring 6-1 and the N-side wiring 7-1 can be kept constant, and the differential impedance consisting of the two wirings, the P-side signal wiring 6-1 and the N-side signal wiring 7-1, can be kept uniform, resulting in good high-frequency electrical characteristics.

[0101] FIG. 11 shows an example of a power supply superimposed communication device 1-1, and a power supply superimposed communication device 1-2 has a similar configuration.

[0102] Furthermore, if four-terminal differential mode inductor 10-1 is placed on the same layer (surface) as two-terminal differential mode inductors 11-1 and 11-2, P-side signal wiring 6-1 and N-side signal wiring 7-1 must be routed on the outside so as to make a large detour around four-terminal differential mode inductor 10-1.

[0103] In this case, the electromagnetic coupling between the P-side signal wiring 6-1 and the N-side signal wiring 7-1 will change, which will cause impedance mismatch. In addition, there is a disadvantage in that noise resistance will deteriorate due to the difference in the amount of noise mixed into the P-side signal wiring 6-1 and the N-side signal wiring 7-1.

[0104] Therefore, by taking measures such as arranging two-terminal differential mode inductors 11-1 and 11-2 and four-terminal differential mode inductor 10-1 separately on the front and back surfaces of the printed circuit board, it is possible to prevent deterioration of noise resistance.

[0105] The fourth embodiment can be configured as shown in FIG. 11, with the same configuration as any one of the first to third embodiments described above.

[0106] According to the fourth embodiment, in addition to obtaining the same effects as those of the first, second, and third embodiments, it is possible to obtain the effect of keeping the differential impedance between the P-side signal wiring 6-1 and the N-side signal wiring 7-1 uniform, thereby maintaining good high-frequency electrical characteristics.

[0107] Example 5 Next, a fifth embodiment of the present invention will be described.

[0108] The overall configuration of the fifth embodiment is similar to that of the first embodiment, so illustration of the overall configuration is omitted and only the differences from the first embodiment will be described.

[0109] Fig. 12 is a diagram showing a circuit configuration according to a fifth embodiment of the present invention. The example shown in Fig. 12 is an example in which the two-terminal differential mode inductors 11-1 and 11-2 in the circuit configuration described in the first embodiment are further configured with a larger number of inductors.

[0110] In the example shown in Figure 12, two two-terminal differential mode inductors 11-1, 11-5 are connected in series to P-side signal wiring 6-1, and two two-terminal differential mode inductors 11-2, 11-6 are connected in series to N-side signal wiring 7-1, and four-terminal differential mode inductor 10-1 is placed beyond them.

[0111] The advantage of dividing the inductor into two, two-terminal differential mode inductors 11-1 and 11-5, and 11-2 and 11-6, is that wideband filter performance can be obtained by using a plurality of inductor components with different self-resonant frequencies.

[0112] For example, in the first embodiment, rather than using one component with a self-resonant frequency of 700 MHz, by dividing it into two components with self-resonant frequencies of 1 GHz and 500 MHz, a filter with high impedance over a wider frequency range can be constructed.

[0113] In the present invention, the condition for the inductance value may be considered by replacing the condition for the inductance value of the two-terminal overlap mode inductance components in the first to third embodiments with the total value of the two two-terminal overlap mode inductor components.

[0114] In other words, L1 in the first embodiment and L1A+L1B in the fifth embodiment can be considered to be equivalent.

[0115] Although FIG. 12 shows an example of the power supply superimposed communication device 1-1, the power supply superimposed communication device 1-2 also has a similar configuration.

[0116] According to the fifth embodiment, in addition to obtaining the same effects as those of the first, second, third and fourth embodiments, there is an advantage that a wideband filter performance can be obtained.

[0117] Example 6 Next, a sixth embodiment of the present invention will be described.

[0118] The overall configuration of the sixth embodiment is similar to that of the first embodiment, so illustration of the overall configuration is omitted and only the differences from the first embodiment will be described.

[0119] 13 is a diagram showing a circuit configuration according to a sixth embodiment of the present invention. The sixth embodiment is an embodiment in which, when there are two pairs of differential wiring, power is supplied from a common power supply element.

[0120] 13, there are differential wiring 5-1 and differential wiring 5-2 (second differential wiring) (differential wiring 5-1 of power supply superimposed communication device 1-1 and differential wiring 5-2 of power supply superimposed communication device 1-2 shown in FIG. 1), and two-terminal differential mode inductors 11-1, 11-2 and 11-3, 11-4 are connected to them, respectively. Furthermore, one four-terminal differential mode inductor 10-1 is connected to the two-terminal differential mode inductors 11-1, 11-2 and 11-3, 11-4, and the two-terminal differential mode inductors 11-1, 11-3 as P-side components are connected to the power supply side of the four-terminal differential mode inductor 10-1, and the two-terminal differential mode inductors 11-2, 11-4 as N-side components are connected to the ground side of the four-terminal differential mode inductor 10-1.

[0121] That is, four-terminal differential mode inductor 10-1 operates not only as four-terminal differential mode inductor 10-1 but also as four-terminal differential mode inductor 10-2.

[0122] With this configuration, four-terminal differential mode inductor 10-1, which is a large component, can be shared, reducing the number of components and the cost.

[0123] Even with this configuration, two-terminal differential mode inductors 11-1, 11-2, 11-3, and 11-4 are placed at the connection points of the high-frequency section, so the high-frequency characteristics do not deteriorate, and it is possible to guarantee the change in the balance of the inductance values ​​of two-terminal differential mode inductors 11-1, 11-2, 11-3, and 11-4 by the ratio of their inductance values ​​to that of four-terminal differential mode inductor 10-1.

[0124] According to the sixth embodiment, in addition to being able to obtain the same effects as the first embodiment, there is also an effect that the number of parts can be reduced by sharing four-terminal differential mode inductor 10-1, which is a large part, and thus costs can be reduced.

[0125] Example 7 Next, a seventh embodiment of the present invention will be described.

[0126] Since the overall circuit configuration of the seventh embodiment is similar to that of the first embodiment, illustration of the overall circuit configuration is omitted, and only the differences from the first embodiment will be described.

[0127] 14 is a diagram showing an application example according to the seventh embodiment of the present invention. The seventh embodiment shows an application example in a zone architecture that is expected to be used as a future in-vehicle architecture. In the zone architecture, a central ECU 41 of an automobile vehicle 40 is placed at the center, and a Zone ECU 42-1, The Zone ECU 42-2, the Zone ECU 42-3, and the Zone ECU 42-4 are mutually connected with cables 8-1, 8-2, 8-3, 8-4, and 8-5, etc., and each of the Zone ECUs 42-1, The Zone ECU 42-2, Zone ECU 42-3, and Zone ECU 42-4 are further connected to ECUs 43-1, 43-2, 43-3, 43-4, and 43-5, each of which corresponds to a different Zone.

[0128] It is assumed that Zone ECU 42-1, Zone ECU 42-2, Zone ECU 42-3, and Zone ECU 42-4 have a configuration in which the power supply lines between the Zone ECUs are made redundant, and that power superposition is performed using cables connecting the Zone ECUs.

[0129] Any of the power supply superimposed communication devices 1-1 and 1-2 according to the first to sixth embodiments described above can be applied to the Zone ECU 42-1, the Zone ECU 42-2, the Zone ECU 42-3, and the Zone ECU 42-4.

[0130] In this case, it is expected that a high voltage will be used to supply power to the Zone ECU, which has a relatively high power consumption. Therefore, it is essential to use the PoDL filter circuit configuration of the present invention to avoid EMC performance degradation due to application of a high bias, and it is believed that Example 7 is effective.

[0131] According to the seventh embodiment, it is possible to obtain an effect that a vehicle mounted power source superimposed communication system having the effects of the first to sixth embodiments can be realized.

[0132] Although the present specification will be described on the premise of an in-vehicle device, the present invention can also be used in other applications that use similar communication systems. For example, the present invention can be similarly effective in communication between an industrial robot and an electronic camera.

[0133] The above-described embodiments and various modified examples are merely examples, and the present invention is not limited to these contents as long as the characteristics of the invention are not impaired.

[0134] Although various embodiments and modifications have been described above, the present invention is not limited to these.

[0135] Other embodiments conceivable within the scope of the technical concept of the present invention are also included within the scope of the present invention. [Explanation of symbols]

[0136] 1-1, 1-2...Power supply superimposed communication device (electronic device), 2-1, 2-2...Communication LSI, 3-1, 3-2...Resistance components, 5-1, 5-2...Differential wiring, 6-1, 6-2...P-side signal wiring, 7-1, 7-2...N-side signal wiring, 8, 8-1, 8-2, 8-3, 8-4...Twisted pair cable (differential signal wiring), 9-1, 9-2...Information processing LSI, 10-1, 10-2...4-terminal differential mode inductor, 11-1, 11-2, 11-3, 11-4, 11-5, 11-6...2-terminal differential mode inductor, 12-1, 12-2...Coil inside differential mode inductor (first coil coil, second coil), 13-1, 13-2···Inter-coil parasitic capacitance of differential mode inductor, 14N-1, 14N-2, 14P-1, 14N-2··AC coupling capacitor, 15-1, 15-2··Common mode choke coil (CMCC), 16-1, 16-2··Cable connector, 17N-1, 17-2, 17P-1, 17P-2··Electrostatic protection element, 18-1, 18-2··Through hole, 19··Printed circuit board, 30-1, 30-2··Power supply element (power supply IC), 40··Automotive vehicle, 41··Central ECU, 42-1, 42-2, 42-3, 42-4··Zone ECU, 43-1, 43-2, 43-3, 43-4··ECU

Claims

1. a first differential wiring having a first signal wiring and a second signal wiring connected to the differential signal wiring; a first power supply element that supplies a first applied voltage and a second applied voltage to the first signal wiring and the second signal wiring, respectively; a first high frequency cut filter having one end connected to the first signal line; a second high frequency cut filter having one end connected to the second signal line; a first inductor having a first coil and a second coil, one end of the first coil being connected to the other end of the first high-frequency cut filter, one end of the second coil being connected to the other end of the second high-frequency cut filter, the first coil and the second coil being magnetically coupled to each other with reverse windings; A power supply superimposed communication device comprising: an inductance value L1 of the first high frequency cut filter and an inductance value L3 of the first coil of the first inductor have a relationship of L1<1.5×L3, 2. A power source superimposed communication device, wherein an inductance value L2 of said second high frequency cut filter and an inductance value L4 of said second coil of said first inductor have a relationship of L2<1.5×L4.

2. A power supply overlap communication system, A power supply superimposed communication system comprising a first power supply superimposed communication device comprising the power supply superimposed communication device according to claim 1 and a second power supply superimposed communication device, The second power supply superimposed communication device is a second differential wiring having a third signal wiring and a fourth signal wiring connected to the differential signal wiring; a second power supply element to which a first applied voltage and a second applied voltage are supplied via the third signal wiring and the fourth signal wiring, respectively, and which converts the first applied voltage and the second applied voltage into an operating voltage; a third high frequency cut filter having one end connected to the third signal line; a fourth high frequency cut filter having one end connected to the fourth signal line; a second inductor having a third coil and a fourth coil, one end of the third coil being connected to the other end of the third high-frequency cut filter, one end of the second coil being connected to the other end of the fourth high-frequency cut filter, and the third coil and the fourth coil being magnetically coupled to each other with their windings reversed; Equipped with an inductance value L5 of the third high frequency cut filter and an inductance value L7 of the third coil of the second inductor have a relationship of L5<1.5×L7, an inductance value L6 of the fourth high frequency cut filter and an inductance value L8 of the fourth coil of the second inductor have a relationship of L6<1.5×L8, The first power supply superimposed communication device and the second power supply superimposed communication device are connected via the differential signal wiring.

3. 3. The power source overlapping communication system according to claim 2, a power supply superimposed communication system, characterized in that power is supplied from the first power supply superimposed communication device to the second power supply superimposed communication device via the differential signal wiring.

4. 4. The power source overlapping communication system according to claim 2, A power source superimposed communication system, characterized in that the inductance value L1 of the first high frequency cut filter, the inductance value L2 of the second high frequency cut filter, the inductance value L5 of the third high frequency cut filter, and the inductance value L6 of the fourth high frequency cut filter are 2.1 μH or more.

5. 2. The power source overlapping communication device according to claim 1, a first resistor disposed in parallel with the first high frequency cut filter; a second resistor disposed in parallel with the second high frequency cut filter, The resistance value r1 of the first resistor is 500Ω≦r1≦1500Ω, The resistance value r2 of the second resistor is 500Ω≦r2≦1500Ω, A power source superimposed communication device, wherein the inductance value L1 of the first high frequency cut filter is 1.5 μH or more, and the inductance value L2 of the second high frequency cut filter is 1.5 μH or more.

6. 3. The power source overlapping communication system according to claim 2, a third resistor disposed in parallel with the third high frequency cut filter; a fourth resistor disposed in parallel with the fourth high frequency cut filter, The resistance value r3 of the third resistor is 500Ω≦r3≦1500Ω, The resistance value r4 of the fourth resistor is 500Ω≦r4≦1500Ω, A power source superimposed communication system, wherein the inductance value L5 of the third high frequency cut filter is 1.5 μH or more, and the inductance value L6 of the fourth high frequency cut filter is 1.5 μH or more.

7. 2. The power source overlapping communication device according to claim 1, the first high frequency cut filter and the second high frequency cut filter are two-terminal differential mode inductors, the first inductor is a four-terminal differential mode inductor; the first high frequency cut filter and the second high frequency cut filter are formed on one surface of a substrate on which the first signal wiring and the second signal wiring are formed; The power source overlapping communication device according to claim 1, wherein the first inductor is formed on the other surface of the substrate.

8. 3. The power source overlapping communication system according to claim 2, the third high frequency cut filter and the fourth high frequency cut filter are two-terminal differential mode inductors, the second inductor is a four-terminal differential mode inductor; the third high frequency cut filter and the fourth high frequency cut filter are formed on one surface of a substrate on which the third signal wiring and the fourth signal wiring are formed, The power source overlapping communication system according to claim 1, wherein the second inductor is formed on another surface of the substrate.

9. 2. The power source overlapping communication device according to claim 1, the first high frequency cut filter is a plurality of two-terminal differential mode inductors connected in series with each other, The power source overlapping communication device, wherein the second high frequency cut filter is a plurality of two-terminal differential mode inductors connected in series with each other.

10. 3. The power source overlapping communication system according to claim 2, the other end side of the third high frequency cut filter is connected to one end of the first coil of the first inductor of the first power source superimposed communication device, the other end side of the fourth high frequency cut filter is connected to one end of the second coil of the first inductor of the first power source superimposed communication device, A power source superimposed communication system, characterized in that the first inductor of the first power source superimposed communication device operates as the first inductor and also operates as the second inductor of the second power source superimposed communication device.

11. 3. The power source overlapping communication system according to claim 2, A power supply superimposed communication system, characterized in that a network is formed having at least one of the first power supply superimposed communication devices and at least two of the second power supply superimposed communication devices connected to the first power supply superimposed communication device via the differential signal wiring.

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