Quantum calculation program, quantum calculation method, and information processing device

Abstract

To reduce computation time of quantum calculation.SOLUTION: An information processing device 10, when a quantum gate working for an encoded logic quantum bit is a rotary gate 2, sets a target rotation angle set in the rotary gate 2 as a designation rotation angle. The information processing device 10 generates a first logic quantum bit 4 having a predetermined accessory state, on the basis of the designation rotation angle. The information processing device 10 sets the first logic quantum bit 4, and the second logic quantum bit 5 working the rotary gate 2 as input, and executes probabilistic rotational operation of forward rotation of the designation rotation angle or reverse rotation having a sign opposite that of the designation rotation angle. Then, the information processing device 10, until the rotational operation becomes the forward rotation, while updating the designation rotation angle on the basis of the target rotation angle, repeats processing which generates the first logic quantum bit 4 and the processing which executes the rotational operation.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a quantum computing program, a quantum computing method, and an information processing device. [Background technology]

[0002] In calculations using a quantum computer, quantum calculations are performed according to quantum circuits by performing gate operations on quantum bits. A quantum bit is the smallest unit of information used in calculations, and corresponds to a bit (classical bit) in a classical computer. However, unlike classical bits, quantum bits can also be in a superposition of "0" and "1".

[0003] The information in quantum bits can be corrupted (an error can occur) due to interactions with the environment, errors in gate operation, etc. There are two ways to deal with errors: quantum error correction and quantum error mitigation.

[0004] Quantum error correction is a process of detecting and correcting the occurrence of errors by combining and encoding (redundancy) multiple quantum bits. In what follows, unencoded quantum bits are referred to as physical quantum bits, and a set of encoded quantum bits is referred to as logical quantum bits. Quantum error mitigation is a process of proceeding with calculations while still including errors, and mitigating the effects of errors by modifying quantum circuits or extrapolating measurement results.

[0005] A quantum computer that performs quantum computations while performing quantum error correction on logical quantum bits is called a fault-tolerant quantum computer (FTQC). In an FTQC, any quantum computation can be performed by combining certain basic gates. The certain basic gates are the H gate, the CNOT gate, the S gate, and the T gate. The H gate, the CNOT gate, and the S gate are quantum gates that perform the Clifford operation, and the T gate is a quantum gate that performs a non-Clifford operation. The set of these basic gates is called Clifford+T.

[0006] Various techniques have been proposed for FTQC. For example, a computational method has been proposed that can efficiently realize fault-tolerant computation of quantum Clifford circuits while reducing the number of physical quantum bits and physical quantum gates used. A method for designing circuits that perform non-unitary computations probabilistically has also been proposed. A technique has been proposed that integrates quantum error correction and quantum error mitigation into an efficient FTQC architecture to effectively increase the code distance and the number of T gates at the expense of a certain sampling overhead. Furthermore, a method has been proposed for implementing a logical Clifford+T circuit that protects the Clifford operation from noise by error correction while mitigating errors introduced by noisy logical T gates using a pseudo-probabilistic method. A technique has also been proposed that allows a magic state to have a higher fidelity than the two-qubit gate operation used to generate the magic state. For example, a method called lattice surgery has been proposed that enables efficient logical Clifford gate execution using surface codes on quantum computers limited to two-dimensional nearest-neighbor (2DNN), such as those represented by superconducting methods. [Prior art documents] [Patent documents]

[0007] [Patent Document 1] Special Publication No. 2022-520293 [Patent Document 2] US Patent Application Publication No. 2005 / 0167658 [Non-patent literature]

[0008] [Non-Patent Document 1] Yasunari Suzuki, Suguru Endo, Keisuke Fujii and Yuuki Tokunaga1, "Quantum Error Mitigation as a Universal Error Reduction Technique: Applications from the NISQ to the Fault-Tolerant Quantum Computing Eras", PRX QUANTUM 3, 010345(2022), the American Physical Society, 18 March 2022 [Non-Patent Document 2] Christophe Piveteau, David Sutter, Sergey Bravyi, Jay M. Gambetta, and Kristan Temme, "Error Mitigation for Universal Gates on Encoded Qubits", PHYSICAL REVIEW LETTERS, Volume 127, Issue 20, 12 November 2021 [Non-Patent Document 3] Ying Li, "A magic state's fidelity can be superior to the operations that created it" New Journal of Physics, Volume 17, 13 February 2015 [Non-Patent Document 4] Clare Horsman, Austin G Fowler, Simon Devitt, Rodney Van Meter, "Surface code quantum computing by lattice surgery", New Journal of Physics, 14(12), 123001(27pp), 7 December 2012 [Non-Patent Document 5] V. Kliuchnikov, D. Maslov and M. Mosca, "Practical Approximation of Single-Qubit Unitaries by Single-Qubit Quantum Clifford and T Circuits," in IEEE Transactions on Computers, vol. 65, no. 1, pp. 161-172, 1 Jan. 2016 Summary of the Invention [Problem to be solved by the invention]

[0009] In Clifford+T error-tolerant quantum computing, the rotation of a logical quantum bit around a certain rotation axis by a given rotation angle φ (an irrational multiple of 2π) can be realized using a T gate. By repeating the rotation of the rotation angle φ, it is possible to rotate to any angle. However, even the best method currently known requires repeating the gate operation of the T gate about 100 times to rotate to any angle with sufficient accuracy, which increases the calculation time.

[0010] In one aspect, the present invention aims to reduce the computation time of error-tolerant quantum computing. [Means for solving the problem]

[0011] In one proposal, a quantum computing program is provided that causes a computer to perform the following processes. When the quantum gate to be operated on the encoded logical quantum bit is a rotation gate, the computer sets the target rotation angle set in the rotation gate to the specified rotation angle. The computer generates a first logical quantum bit having a predetermined auxiliary state based on the specified rotation angle. The computer performs a probabilistic rotation operation of a forward rotation of the specified rotation angle or a reverse rotation with the opposite sign to the specified rotation angle, using the first logical quantum bit and a second logical quantum bit to be operated on by the rotation gate as input. The computer then repeats the process of generating the first logical quantum bit and the process of performing the rotation operation while updating the specified rotation angle based on the target rotation angle until the rotation operation becomes a forward rotation. Effect of the Invention

[0012] According to one aspect, the computation time of error-tolerant quantum computing can be reduced. [Brief description of the drawings]

[0013] [Figure 1] FIG. 2 is a diagram illustrating an example of a quantum computing method according to the first embodiment. [Diagram 2] FIG. 1 illustrates an example of a system configuration according to a second embodiment; [Diagram 3] FIG. 1 is a diagram illustrating an example of hardware of a quantum computing system. [Figure 4] FIG. 1 illustrates the characteristics of a quantum bit. [Diagram 5] FIG. 1 illustrates an example of quantum error correction. [Figure 6] FIG. 1 is a diagram illustrating an example of a basic gate used in error-tolerant quantum computing. [Figure 7] FIG. 1 is a diagram showing an example of a circuit for implementing a T-gate. [Figure 8] FIG. 13 is a diagram showing an example of rotation to an arbitrary rotation angle using a T-gate. [Figure 9] FIG. 1 is a diagram showing an example of a quantum circuit that performs gate operations of arbitrary rotation. [Figure 10] FIG. 13 is a diagram showing an example of repetition until a target rotation angle is obtained. [Figure 11]FIG. 1 illustrates an example of a quantum circuit for preparing auxiliary states. [Figure 12] FIG. 13 is a diagram showing an example of enlargement to a surface code. [Figure 13] FIG. 13 is a diagram illustrating an example of error detection by syndrome measurement. [Figure 14] FIG. 13 is a diagram showing an example of X syndrome measurement. [Figure 15] FIG. 13 is a diagram showing an example of Z syndrome measurement. [Figure 16] FIG. 1 is a diagram showing an example of a quantum circuit for error detection in the [[4,2,2]] code. [Figure 17] FIG. 2 is a block diagram showing an example of the functions of a quantum computing system. [Figure 18] FIG. 2 is a diagram showing the flow of data between functions. [Figure 19] FIG. 2 is a block diagram showing an example of the functions of a Clifford calculation execution unit. [Figure 20] 11 is a block diagram showing an example of the functions of an arbitrary rotation execution unit. FIG. [Figure 21] 1 is a flowchart illustrating an example of a procedure for quantum computing processing. [Figure 22] 13 is a flowchart illustrating an example of a procedure for a quantum circuit execution process. [Figure 23] FIG. 13 is a diagram illustrating an example of a numerical calculation result of the occurrence probability of a logical error. [Figure 24] FIG. 13 is a diagram showing an example of a calculation result of an error probability of an auxiliary state. [Diagram 25] FIG. 2 is a diagram illustrating an example of an arrangement of logical quantum bits. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014] Hereinafter, the present embodiment will be described with reference to the drawings. Note that each embodiment can be implemented in combination with a plurality of other embodiments as long as no contradiction occurs. First Embodiment The first embodiment is a quantum computing method for reducing the computation time in error-tolerant quantum computing.

[0015] Fig. 1 is a diagram showing an example of a quantum computing method according to a first embodiment. Fig. 1 shows an information processing device 10 that implements the quantum computing method according to the first embodiment. The information processing device 10 can implement the quantum computing method according to the first embodiment by, for example, executing a quantum computing program.

[0016] The information processing device 10 has a memory unit 11, a processing unit 12, and a quantum bit device 13. The memory unit 11 is, for example, a memory or storage device included in the information processing device 10. The processing unit 12 is, for example, a processor or an arithmetic circuit included in the information processing device 10. The quantum bit device 13 is a device that realizes quantum bits, which are the basic units of information in quantum computing. The quantum bit device 13 has a plurality of physical quantum bits. By combining a plurality of these physical quantum bits, it is possible to generate an encoded logical quantum bit.

[0017] The storage unit 11 stores the quantum circuit 1, which indicates the procedure of the quantum computation to be performed. The quantum circuit 1 is described using quantum gates that can be executed by, for example, fault-tolerant quantum computation. The quantum gates that can be executed by fault-tolerant quantum computation include a rotation gate 2 that indicates a rotation operation at an arbitrary angle.

[0018] The processing unit 12 executes error-tolerant quantum computation based on the quantum circuit 1. For example, the processing unit 12 generates a plurality of encoded logical quantum bits using physical quantum bits in the quantum bit device 13. The processing unit 12 then executes gate operations of the quantum gates shown in the quantum circuit 1 on the logical quantum bits. The processing unit 12 realizes error-tolerant quantum computation by performing error detection and error correction during gate operations on the logical quantum bits.

[0019] For example, the processing unit 12 executes the quantum gates shown in the quantum circuit 1 in order. Then, when the quantum gate to be acted on the encoded logical quantum bit is a rotation gate 2, the processing unit 12 sets the target rotation angle θ0 set in the rotation gate 2 to the initial value of a specified rotation angle θ (θ0, θ is a real number). Next, the processing unit 12 generates a first logical quantum bit 4 having a predetermined auxiliary state based on the specified rotation angle. For example, the processing unit 12 performs the following steps: Z (θ)|+>. Z To clarify that (θ)|+> is the state of a logical qubit, in Figure 1 we use R Z (θ)|+ L >It is written as follows.

[0020] The processing unit 12 receives the first logical quantum bit 4 and the second logical quantum bit 5 (state |ψ L >) and executes a rotation operation according to the gate teleportation circuit 3. The gate teleportation circuit 3 is a quantum circuit that performs a probabilistic gate operation of a forward rotation of a specified rotation angle θ or a reverse rotation with the opposite sign to the specified rotation angle θ. For example, there is a 1 / 2 probability of a forward rotation and a 1 / 2 probability of a reverse rotation.

[0021] Processing unit 12 repeats the process of generating the first logical quantum bit 4 and the process of executing the rotation operation while updating the designated rotation angle based on the target rotation angle until the rotation operation becomes a forward rotation. For example, when a rotation operation executed using the first logical quantum bit generated by applying the first designated rotation angle as an input becomes a reverse rotation, processing unit 12 sets an angle twice the first designated rotation angle as a second designated rotation angle to be applied to the next process of generating the first logical quantum bit. In this case, when the first rotation operation (θ=θ0) results in a reverse rotation, the designated rotation angle θ is updated to 2θ0. When the second rotation operation (θ=2θ0) results in a reverse rotation, the designated rotation angle θ is updated to 4θ0.

[0022] Whether the rotation operation is a forward rotation or a reverse rotation can be determined based on the measurement result performed during the execution of the gate teleportation circuit 3. For example, the processing unit 12 determines that a measurement result of "1" indicates a forward rotation and a measurement result of "0" indicates a reverse rotation.

[0023] In this way, the processing unit 12 can perform an arbitrary rotation of the target rotation angle θ0 by repeating the generation of the first logical quantum bit 4 and the probabilistic rotation operation while updating the specified rotation angle θ until the rotation operation results in a forward rotation. In such gate operations for arbitrary rotation, a forward rotation is achieved in an average of two operations, and the rotation of the target rotation angle θ0 is achieved. Therefore, the number of gate operations is reduced, and the calculation time is shortened. Furthermore, the reduced number of gate operations can prevent unnecessary error accumulation. Furthermore, since gate operations that use a large number of physical quantum bits such as magic state distillation are not performed when performing arbitrary rotation, the number of physical quantum bits used can be reduced.

[0024] For example, processing unit 12 generates a first logical quantum bit 4 that is encoded using a [[4,2,2]] code, which is a code that represents the states of two logical quantum bits with four physical quantum bits and has a code distance of 2. By encoding in this way, a first logical quantum bit 4 with fewer errors is generated.

[0025] If the code distance of the second logical quantum bit 5 is greater than 2, the processing unit 12 generates a first logical quantum bit 4 of a predetermined code distance by expanding the code distance of the [[4,2,2]] code to a predetermined code distance. This allows the processing unit 12 to generate a first logical quantum bit 4 that has a code distance according to the accuracy required for quantum computing, while still encoding with the [[4,2,2]] code.

[0026] An error may also be detected in the auxiliary state of the first logical quantum bit 4. In this case, the processing unit 12 retries the process of generating the first logical quantum bit 4 having the auxiliary state. This generates a first logical quantum bit 4 having an auxiliary state with a low error probability.

[0027] In updating the designated rotation angle θ when the rotation operation is reversed, there is a possibility that the angle twice the current designated rotation angle θ exceeds π. If it exceeds π, the absolute value of the rotation angle can be smaller by rotating in the opposite direction with the sign inverted than by making the next designated rotation angle θ twice the current angle. Therefore, for example, when the remainder obtained by dividing the angle twice the first designated rotation angle by 2π is equal to or greater than 0 and less than π, the processing unit 12 sets the angle of the remainder as the second designated rotation angle. Also, when the remainder is greater than π and equal to or less than 2π, the processing unit 12 sets the angle obtained by subtracting 2π from the remainder as the second designated rotation angle. This prevents the designated rotation angle θ from becoming too large, and can prevent problems that may occur due to the rotation angle being too large (for example, an increase in the error rate).

[0028] Second Embodiment The second embodiment is a quantum computing system for realizing universal quantum computing.

[0029] 2 is a diagram showing an example of a system configuration of the second embodiment. The quantum computing system 30 includes a classical computer 100 and a quantum computer 200. The classical computer 100 is a computer called a von Neumann type computer. The quantum computer 200 is a non-von Neumann type computer that applies the principles of quantum mechanics. The classical computer 100 is connected to a terminal 31 via a network 20. The terminal is a von Neumann type computer used by a user.

[0030] A user uses a terminal 31 to create a quantum circuit for solving a target problem by quantum computing. The created quantum circuit is transmitted from the terminal to a quantum computing system 30. The quantum computing system 30, in cooperation with a classical computer 100 and a quantum computer 200, executes quantum computing according to the acquired quantum circuit. The quantum computing system 30 then transmits the calculation result to the terminal 31.

[0031] 3 is a diagram showing an example of hardware of a quantum computing system. A classical computer 100 is entirely controlled by a processor 101. A memory 102 and a plurality of peripheral devices are connected to the processor 101 via a bus 109. The processor 101 may be a multiprocessor. The processor 101 is, for example, a central processing unit (CPU), a micro processing unit (MPU), or a digital signal processor (DSP). At least a part of the functions realized by the processor 101 executing a program may be realized by an electronic circuit such as an application specific integrated circuit (ASIC) or a programmable logic device (PLD).

[0032] The memory 102 is used as a main storage device of the classical computer 100. The memory 102 temporarily stores at least a part of the OS (Operating System) program and application programs to be executed by the processor 101. The memory 102 also stores various data used in the processing by the processor 101. As the memory 102, for example, a volatile semiconductor storage device such as a RAM (Random Access Memory) is used.

[0033] The peripheral devices connected to the bus 109 include a storage device 103, a GPU (Graphics Processing Unit) 104, an input interface 105, an optical drive device 106, a device connection interface 107, and a network interface 108.

[0034] The storage device 103 writes and reads data electrically or magnetically to and from a built-in recording medium. The storage device 103 is used as an auxiliary storage device for the classical computer 100. The storage device 103 stores an OS program, application programs, and various data. Note that, for example, a hard disk drive (HDD) or a solid state drive (SSD) can be used as the storage device 103.

[0035] The GPU 104 is an arithmetic device that performs image processing. The GPU 104 is an example of a graphic controller. The monitor 21 is connected to the GPU 104. The GPU 104 displays an image on the screen of the monitor 21 in accordance with an instruction from the processor 101. The monitor 21 may be a display device using an organic EL (Electro Luminescence) display device or a liquid crystal display device.

[0036] The input interface 105 is connected to the keyboard 22 and the mouse 23. The input interface 105 transmits signals sent from the keyboard 22 and the mouse 23 to the processor 101. Note that the mouse 23 is an example of a pointing device, and other pointing devices can also be used. Examples of other pointing devices include a touch panel, a tablet, a touch pad, and a trackball.

[0037] The optical drive device 106 uses a laser beam or the like to read data recorded on the optical disc 24 or write data to the optical disc 24. The optical disc 24 is a portable recording medium on which data is recorded so that it can be read by reflection of light. The optical disc 24 includes a DVD (Digital Versatile Disc), a DVD-RAM, a CD-ROM (Compact Disc Read Only Memory), a CD-R (Recordable) / RW (ReWritable), etc.

[0038] The device connection interface 107 is a communication interface for connecting peripheral devices to the classical computer 100. For example, a memory device 25 or a memory reader / writer 26 can be connected to the device connection interface 107. The memory device 25 is a recording medium equipped with a communication function with the device connection interface 107. The memory reader / writer 26 is a device that writes data to the memory card 27 or reads data from the memory card 27. The memory card 27 is a card-type recording medium.

[0039] The network interface 108 is connected to the network 20. The network interface 108 transmits and receives data to and from other computers or communication devices via the network 20. The network interface 108 is a wired communication interface that is connected by a cable to a wired communication device such as a switch or a router. The network interface 108 may also be a wireless communication interface that is communicatively connected by radio waves to a wireless communication device such as a base station or an access point.

[0040] The quantum computer 200 shares a bus 109 with the classical computer 100. The quantum computer 200 can communicate information with each element in the classical computer 100 via the bus 109.

[0041] Quantum computer 200 has quantum processing unit 201 connected to bus 109. Quantum processing unit 201 performs gate operations on quantum bits according to quantum gates shown in the quantum circuit, and measures the states of the quantum bits. Quantum processing unit 201 has quantum bit device 202 and quantum bit control signal generator 203. Quantum bit device 202 holds the states of multiple quantum bits and performs gate operations on these quantum bits. Quantum bit control signal generator 203 generates control signals that instruct gate operations or measurements on the quantum bits.

[0042] The quantum computing system 30 can realize the processing function of the second embodiment by the above-mentioned hardware. The information processing device 10 shown in the first embodiment can also be realized by the same hardware as the quantum computing system 30 shown in FIG.

[0043] The classical computer 100 realizes the processing function of the second embodiment by executing a program recorded in, for example, a computer-readable recording medium. The program describing the processing content to be executed by the classical computer 100 can be recorded in various recording media. For example, the program to be executed by the classical computer 100 can be stored in the storage device 103. The processor 101 loads at least a part of the program in the storage device 103 into the memory 102 and executes the program. The program to be executed by the classical computer 100 can also be recorded in a portable recording medium such as the optical disk 24, the memory device 25, or the memory card 27. The program stored in the portable recording medium becomes executable after being installed in the storage device 103 under the control of, for example, the processor 101. The processor 101 can also read and execute the program directly from the portable recording medium.

[0044] Next, we will explain the reasons why FTQC is needed and the technical challenges involved in implementing it. FIG. 4 is a diagram showing the characteristics of a quantum bit. A quantum bit 41, which is the smallest unit of information in a quantum computer 200, can be in the state |0> or the state |1>, and can also be in a superposition state between these. In the superposition state, whether the value obtained by measuring the quantum bit 41 is |0> or |1> is determined probabilistically. For example, when the probability of |0> and the probability of |1> are the same, the superposition state of the quantum bit 41 is "2 -1 / 2 (|0>+|1>)".

[0045] The information held by such quantum bits 41 can be destroyed (an error occurs) due to interactions with the environment or operational errors. For example, if an error destroys the superposition state, the state of the quantum bit 41 changes to a state such as |0>. To improve calculation accuracy, it is necessary to detect quantum bits in which an error has occurred and to correct the state of the quantum bit to the correct state.

[0046] A technology called quantum error correction has been proposed to address this issue. In quantum error correction, multiple quantum bits are combined and encoded. When encoded, the state of one or more logical quantum bits is represented by the multiple physical quantum bits used in the encoding. The quantum bit in which an error has occurred is detected and corrected based on the overall state of the encoded multiple quantum bits.

[0047] FIG. 5 is a diagram showing an example of quantum error correction. As shown in FIG. 5, a logical quantum bit 42 is defined by a plurality of physical quantum bits 42a, 42b, . . . , 42n. In the example of FIG. 5, when the states of the plurality of physical quantum bits 42a, 42b, . . . , 42n are all |0>, an error occurs and the state of the physical quantum bit 42b is inverted to |1>. In such a case, an error is detected based on information obtained from the respective states of the plurality of physical quantum bits 42a, 42b, . . . , 42n. Then, the physical quantum bit 42b in which the error has occurred is identified, and the state of the physical quantum bit 42b is corrected.

[0048] By performing quantum error correction appropriately in this manner, even if errors occur in the physical quantum bits, so long as the number of errors is within the allowable range, the logical quantum bits 42 will maintain a correct state. Quantum computing with quantum error correction for logical quantum bits can be realized by combining predetermined basic gates.

[0049] FIG. 6 is a diagram showing an example of a basic gate used in error-tolerant quantum computing. Basic gates used in quantum computing with quantum error correction are an H gate 43a, a CNOT gate 43b, an S gate 43c, and a T gate 43d. The H gate 43a is called a Hadamard gate, and is a quantum gate that rotates a state by 180 degrees around an axis tilted at 45 degrees between the Z axis and the X axis. The CNOT gate 43b is a quantum gate that leaves the state of the target bit as it is if the state of the control bit is |0>, and inverts the state of the target bit (to |1> if |0>, and to |0> if |1>) if the state of the control bit is |1>. The S gate 43c is a quantum gate that rotates a state by π / 2 around the Z axis. The T gate 43d is a quantum gate that rotates a state by π / 4 around the Z axis.

[0050] Among these, the H gate, CNOT gate, and S gate are called Clifford operators. In contrast, the T gate is called a non-Clifford operator. The basic gates shown in FIG. 6 are collectively called Clifford+T. Clifford+T in quantum computer 200 calculations corresponds to AND, XOR, and NOT in classical computer 100. In other words, by combining Clifford+T quantum gates, it is possible to perform any quantum calculation.

[0051] The T gate of Clifford+T can be implemented by combining a gate teleportation circuit with a quantum bit state called a magic state. FIG. 7 is a diagram showing an example of a circuit that realizes a T gate. The gate operation of applying a T gate 44 to a quantum bit in a state |ψ> to change the state to T|ψ> can be realized by a gate teleportation circuit 44a. The state of the first quantum bit of the gate teleportation circuit 44a is |ψ>. The state of |π / 4> is input to the second quantum bit (ancillary quantum bit). The state |π / 4> is called a magic state. This magic state is a logical state represented by a logical quantum gate.

[0052] The gate teleportation circuit 44a is provided with a CNOT gate with the second quantum bit as the control bit and the first quantum bit as the target bit. After the CNOT gate, the state of the first quantum bit is measured. If the measurement result is |0>, no gate operation is performed on the second quantum bit. If the measurement result is |1>, gate operations of an S gate and an X gate (denoted as "SX" in FIG. 7) are performed on the second quantum bit. The CNOT gate, S gate, and X gate shown in the gate teleportation circuit 44a are all gate operations on encoded logical quantum bits.

[0053] Here, in error-tolerant quantum computing using Clifford+T, a very large number of physical qubits are used. Typically, more than one million physical qubits are used. A large proportion (e.g., more than 90%) of the large number of physical qubits is used to rotate the logical qubit by an arbitrary angle. To rotate by an arbitrary angle, gate operations using a large number of T gates are performed.

[0054] Rotation angle θ, rotation axis n = (n x ,n y ,n z ) The rotation gate is expressed by equation (1).

[0055]

number

[0056] The gate operation of the T-gate is expressed in equation (2).

[0057]

number

[0058] By applying the gate operation shown in equation (2) to equation (1), it can be seen that it is a rotation of an angle of “π / 4” around the Z axis. Combining a T gate with an H gate results in the gate operation shown in equation (3).

[0059]

number

[0060] The gate operation shown in formula (3) is a rotation of an angle of "π / 4" around the X-axis. And considering the product of formula (2) and formula (3), we get formula (4).

[0061]

number

[0062] The gate operation in equation (4) is performed by rotating the axis of rotation n=(cos(π / 8),sin(π / 8),cos(π / 8)) around cos(φ / 8)=cos 2 This is a rotation with a rotation angle φ that satisfies (π / 8). The realized rotation angle φ is an irrational multiple of 2π. By repeating such rotations with a rotation angle φ, rotation to any angle can be realized.

[0063] FIG. 8 is a diagram showing an example of rotation to an arbitrary rotation angle using a T gate. In graph 45, the horizontal axis indicates the number of T gate operations, and the vertical axis indicates the angle. θ indicates the target angle. The circles on the broken line in graph 45 indicate the angle after one rotation by a rotation angle φ (an irrational multiple of 2π). T gate operations for rotation by a rotation angle φ are repeated so that the angle indicated by the black circle approaches the target angle. Using a method (Non-Patent Document 5) that is the most efficient T gate decomposition method for arbitrary rotations currently known, a rotation of π / 128 degrees can be performed with an accuracy of 10 -10 It is known that to achieve this approximation, it would take about 100 T-gate operations.

[0064] In this way, any rotation angle can be realized by repeating the T gate operation. To perform the T gate operation on a logical quantum bit, it is necessary to prepare an auxiliary quantum bit in the magic state as described above.

[0065] To generate a highly accurate magic state, a gating operation is performed to input the magic state into a specific quantum circuit and extract an error-free state. This type of gating operation is called magic state distillation. For example, in 15-to-1 distillation, 15 logical qubits are used to generate one magic state. If one logical qubit is encoded with 100 physical qubits, 1500 physical qubits will be consumed.

[0066] Since the accuracy of the T gate depends on the accuracy of the magic state, increasing the accuracy of the T gate means increasing the number of magic states input to the magic state distillation. As a result, the number of physical quantum bits used for T gate operations is approximately 1,000 to 10,000. If such operations are performed on a quantum computer with 10,000 physical quantum bits, all resources will be used up in the magic state distillation, and the essential quantum computation itself cannot be performed. Therefore, it is important to develop a method for performing quantum computation that maintains as much error tolerance as possible with a limited number of physical quantum bits.

[0067] The aforementioned Non-Patent Document 1 and Non-Patent Document 2 are technologies for reducing the number of physical quantum bits used in FTQC. Although these technologies have been successful in reducing the number of physical quantum bits, they use a large number of low-precision T gates to perform the gate operation of the arbitrary rotation gate. This results in a large accumulation of errors. Therefore, it is necessary to improve the precision of the T gates.

[0068] As an example of a technique for improving the accuracy of T-gates, that is, for improving the accuracy of preparing a magic state, there is a technique disclosed in the aforementioned Non-Patent Document 3. In this technique, an unencoded magic state is prepared and then encoded. Assuming that an error occurs with probability p in every operation, the error rate P L "P L ≒46p / 15". In the above-mentioned Non-Patent Document 2, the magic state is prepared by temporarily canceling the encoded state. The error rate P L "P L ≒30p".

[0069] In this way, in Non-Patent Document 3 and Non-Patent Document 2, the uncoded state is partially used, and errors that occur in the uncoded state reduce the accuracy of the magic state. The reduced accuracy of the magic state appears as a reduced accuracy of the T-gate, and the accuracy of gate operation of arbitrary rotation becomes insufficient. Therefore, the practicality of the technology proposed in Non-Patent Document 3 and Non-Patent Document 2 cannot be said to be sufficient.

[0070] As explained above, in the gate operation of arbitrary rotation using a T gate, the T gate operation is repeated many times, and it is difficult to perform the T gate operation with high precision with the current number of physical quantum bits. As a result, the precision of the gate operation of arbitrary rotation is insufficient.

[0071] Therefore, the quantum computing system 30 shown in the second embodiment realizes gate operation of arbitrary rotation without using a T gate. Specifically, the quantum computing system 30 directly executes arbitrary rotation (Clifford+rotation) instead of a T gate in performing quantum computation. In this case, the quantum computing system 30 realizes highly accurate rotation by devising a preparation process of an auxiliary state used for arbitrary rotation.

[0072] FIG. 9 is a diagram showing an example of a quantum circuit that performs gate operations for arbitrary rotation. The gate teleportation circuit 50 performs rotation of an angle θ (R Z In the gate teleportation circuit 50, the state to be operated on |ψ> is input to the first quantum bit, and the auxiliary state “R Z (θ)|+ L >" is entered.

[0073] In the gate teleportation circuit 50, first, a CNOT gate operation is performed with the second quantum bit as the control bit and the first quantum bit as the target bit. If the measurement result of the first quantum bit is "+1", an X gate operation is performed on the second quantum bit.

[0074] If the measurement result of the first qubit is "+1", then the state of the second qubit is "R Z (θ)|ψ>". If the measurement result of the first quantum bit is "0", the state of the second quantum bit is "R Z (-θ)|ψ>. In this way, after the gate operation of the gate teleportation circuit 50 for any rotation, "R Z (θ)|ψ>" or "R Z (-θ)|ψ>" is obtained. In other words, the output state is probabilistically reversed. If the output state is "R Z (θ)|ψ> and R Z The probability of "(-θ)|ψ>" is 1 / 2 for each.

[0075] In the quantum computing system 30, the output state of the gate teleportation circuit 50 probabilistically becomes the desired rotation (forward rotation) or reverse rotation, and so the quantum computing system 30 repeatedly executes the same gate operation until the desired rotation is successful.

[0076] 10 is a diagram showing an example of repetition until a desired rotation angle is obtained. For example, if a gate operation for a rotation of a desired angle θ fails, resulting in a reverse rotation (-θ), the quantum computing system 30 performs a rotation of an angle 2θ in the gate operation for the next rotation. If a gate operation for a rotation of an angle 2θ also fails, resulting in a reverse rotation (-2θ), the sum of the two rotation operations is -3θ. In this case, the quantum computing system 30 performs a rotation of an angle 4θ, for example, in the gate operation for the next rotation.

[0077] If the probability of a rotation being successful and the probability of failure are 1 / 2, then the average number of times it takes to succeed is 1×(1 / 2)+2×(1 / 4)+=Σ n n2 -n = 2". In other words, the quantum computing system 30 can realize any rotation by executing the gate operation of the gate teleportation circuit 50 an average of two times.

[0078] The quantum computing system 30 can ensure that the rotation angle always falls within [-π,π) by performing processing using 2π periodicity for the rotation angle. For example, consider a rotation of a target angle θ. The quantum computing system 30 divides θ by 2π and determines the remainder as θ' ​​(θ'=θ-2πn) (n is an integer). In this case, θ'∈[0,2π).

[0079] The quantum computing system 30 performs case division for θ′ in the following steps 1 and 2, and then determines the rotation angle of the next rotation operation in step 3. 1. If 0≦θ'<π, then θ”=θ'. 2. If π<θ'≦2π, then θ”=θ'-2π. 3. Use θ” as the final rotation angle (θ” ∈ [-π,π)).

[0080] The quantum computing system 30 performs the processes 1, 2, and 3 when performing an arbitrary rotation repeatedly, so as to make the rotation have the smallest absolute value possible. As a result, the increase in error caused by the rotation angle becoming too large is suppressed.

[0081] By using the gate teleportation circuit 50 in this way, it is not necessary to use the magic state for arbitrary rotation. In the gate teleportation circuit 50, the auxiliary state is used instead of the magic state. Therefore, the auxiliary state is prepared before executing the gate teleportation shown in the gate teleportation circuit 50. The accuracy of the auxiliary state to be prepared affects the accuracy of the entire arbitrary rotation.

[0082] 11 is a diagram showing an example of a quantum circuit for preparing an auxiliary state. The auxiliary state to be input to the gate teleportation circuit 50 can be generated by applying an error-correcting code called the [[4,2,2]] code 52. The [[4,2,2]] code 52 is a code with a code distance of "2" that expresses the state of two quantum bits using four physical quantum bits.

[0083] The input states of the four physical quantum bits in the auxiliary state preparation circuit 51 are all |0>. In the auxiliary state preparation circuit 51, first, gate operations of Hadamard gates 51a and 51b are performed on the second and fourth physical quantum bits of the four physical quantum bits. Next, gate operations of a CNOT gate 51c are performed with the second physical quantum bit as a control bit and the first physical quantum bit as a target bit. At the same time, gate operations of a CNOT gate 51d are performed with the fourth physical quantum bit as a control bit and the third physical quantum bit as a target bit. Then, a two-qubit rotation gate 51e "e" around the Z axis is performed on the first physical quantum bit and the third physical quantum bit. -i(1 / 2)θZ0Z2 " (the number following Z is a subscript of Z) is executed.

[0084] The gate operation by the two-qubit rotation gate 51e is expressed by equation (5).

[0085]

number

[0086] The rotation gate 51e shown in formula (5) is a rotation gate that operates on an uncoded physical quantum bit, and therefore can be easily implemented in the quantum computer 200. For example, in an ion trap quantum computer, the rotation gate 51e is an XX rotation gate R XX (θ) and the H gate. In addition, the rotation gate 51e can be implemented as it is by using, for example, a cross resonant gate R ZX (θ) and H gates. If these cannot be used, the CNOT gate and RZ gate (R Z (θ)) can be executed in combination with the auxiliary state preparation circuit 51. The output of the auxiliary state preparation circuit 51 is the encoded auxiliary state "R Z (θ)|+ L >".

[0087] In the gate teleportation circuit 50 and the auxiliary state preparation circuit 51, an auxiliary state coded by the [[4,2,2]] code 52 is generated, and the gate operation of the coded arbitrary rotation is performed while the state is coded. This allows the arbitrary rotation to be realized without passing through a decoded state, and prevents an increase in the probability of error occurring due to passing through a decoded state.

[0088] The code distance of the auxiliary state generated by the [[4,2,2]] code 52 is "2." On the other hand, the auxiliary state used as the input of the gate teleportation circuit 50 that realizes an arbitrary rotation is required to be coded with the code distance applied to the gate teleportation circuit 50. Therefore, the quantum computing system 30 expands the auxiliary state generated by the [[4,2,2]] code 52 to a surface code having the desired code distance d.

[0089] FIG. 12 is a diagram showing an example of expansion to a surface code. The surface code 53 is an expansion of the [[4,2,2]] code 52 to a code distance of "5" (d=5). The state prepared with the [[4,2,2]] code 52 is set in the upper left of the surface code 53. The other physical quantum bits are initialized to |0> or |+>. In the surface code 53, the shaded circles are physical quantum bits initialized to |0>, and the black circles are physical quantum bits initialized to |+>.

[0090] The quantum computing system 30 performs syndrome measurement on the entire surface code 53. The Z stabilizer of the surface code 53 is the lattice plane of the shaded region, and the X stabilizer is the lattice plane of the open region.

[0091] The quantum computing system 30 detects errors based on the syndrome measurement results, and if an error is detected, discards the generated auxiliary state and redoes the generation process of the auxiliary state, thereby making it possible to generate an auxiliary state with as few errors as possible.

[0092] Next, syndrome measurement will be described. 13 is a diagram showing an example of error detection by syndrome measurement. The logical qubit of the surface code 54 is a simultaneous eigenstate with a +1 eigenvalue of the stabilizer operator defined on the lattice plane. The surface code 54 is 9 qubits - 8 stabilizers = 1 logical degree of freedom.

[0093] The logical Z operator is defined on the boundary indicated by the solid thick line 54a. The logical X operator is defined on the boundary indicated by the dashed thick line 54b. There are three quantum bits on each of the lines indicating the logical Z operator and the logical X operator. Therefore, the code distance is "3".

[0094] Errors occurring in the physical quantum bits contained in the surface code 54 can be detected by measuring the eigenvalues ​​of the stabilizer operator. The eigenvalues ​​of the stabilizer are called syndromes. Measuring these eigenvalues ​​is the syndrome measurement. In an error-free state, all syndrome values ​​are +1.

[0095] When an error occurs in any physical quantum bit, the eigenvalues ​​of the stabilizers around that physical quantum bit are inverted. For example, if an X error occurs in the central physical quantum bit, the eigenvalues ​​of the two Z stabilizers surrounding it are inverted to "-1".

[0096] The syndrome measurements are made using the ancillary qubits. 14 is a diagram showing an example of X syndrome measurement. Physical quantum bits 55a to 55d included in X stabilizer 55 and auxiliary quantum bit 55e capable of CNOT gate operation between these physical quantum bits are used. In quantum circuit 56 for X syndrome measurement, |0> is input as the initial state of auxiliary quantum bit 55e. Furthermore, gate operation by a Hadamard gate is performed on auxiliary quantum bit 55e.

[0097] After that, four CNOT gates are operated in sequence with the auxiliary quantum bit 55e as the control bit and the physical quantum bits 55a to 55d as the target bits. The numbers on the physical quantum bits 55a to 55d indicate the order in which the CNOT gates are operated. Then, the auxiliary quantum bit 55e is operated by a Hadamard gate. Finally, the state of the auxiliary quantum bit 55e is measured.

[0098] With such quantum circuit 56, when an X error occurs in any of physical quantum bits 55a to 55d, the state of auxiliary quantum bit 55e is inverted. FIG. 15 is a diagram showing an example of Z syndrome measurement. Physical quantum bits 57a to 57d included in Z stabilizer 57 and auxiliary quantum bit 57e capable of CNOT gate operation between these physical quantum bits are used. In quantum circuit 58 for X syndrome measurement, |0> is input as the initial state of auxiliary quantum bit 57e. Then, gate operations of four CNOT gates with auxiliary quantum bit 57e as a target bit and physical quantum bits 57a to 57d as control bits are performed in order. The numbers shown on physical quantum bits 57a to 57d indicate the order in which the CNOT gates are operated. Finally, the state of auxiliary quantum bit 57e is measured.

[0099] With such quantum circuit 58, when a Z error occurs in any of physical quantum bits 57a to 57d, the state of auxiliary quantum bit 57e is inverted. 16 is a diagram showing an example of a quantum circuit for error detection of the [[4,2,2]] code. An error in the [[4,2,2]] code 52 can be detected by a quantum circuit 59. The quantum circuit 59 uses four physical quantum bits (M0 to M3) in addition to the four physical quantum bits (identification numbers 0 to 3) included in the [[4,2,2]] code 52.

[0100] The stabilizer operators of the [[4,2,2]] code 52 are X0X1X2X3 and Z0Z1Z2Z3. The physical quantum bits M0 to M3 are auxiliary quantum bits used for syndrome measurement. In the quantum circuit 59, the quantum gates enclosed by the dashed rectangular lines are executed simultaneously. When the quantum circuit 59 is executed, the eigenvalues ​​(syndrome) of the two stabilizer operators are obtained. The obtained syndrome makes it possible to determine whether or not an error has occurred.

[0101] The quantum computing system 30 performs error detection of the [[4,2,2]] code 52 with high accuracy based on the quantum circuit 59. When an error is detected, the quantum computing system 30 repeats the process of generating the auxiliary state. This allows the quantum computing system 30 to generate a highly accurate auxiliary state without generating unnecessary errors.

[0102] If the error rate of the auxiliary state is expressed in terms of the error rate p of the physical quantum bit, it becomes "2p / 15". This error rate is sufficiently smaller than both the error rate of the magic state in Non-Patent Document 3, 46p / 15, and the error rate of the magic state in Non-Patent Document 2, 30p. In other words, the error rate of the auxiliary state "R Z (θ)|+ L By generating the auxiliary state with high accuracy, arbitrary rotation with high accuracy can be realized by the gate teleportation circuit 50 (see FIG. 9) that uses the auxiliary state.

[0103] 17 is a block diagram showing an example of the functions of a quantum computing system. Classical computer 100 has a quantum circuit decomposition unit 110, a gate operation scheduler 120, and a post-processing unit 130. Quantum computer 200 has a logical quantum bit initialization unit 210, a gate operation branching unit 220, and a logical quantum bit measurement unit 230. In addition, the classical computer 100 and quantum computer 200 cooperate to realize functions including a Clifford arithmetic execution unit 310 and an arbitrary rotation execution unit 320.

[0104] The quantum circuit decomposition unit 110 decomposes a quantum circuit for solving a problem to be solved into basic gates (Clifford gates or arbitrary rotation gates). The gate operation scheduler 120 manages the order of gate operations. The post-processing unit 130 performs a predetermined arithmetic process on the measurement results of the quantum bits. The logical quantum bit initialization unit 210 initializes the logical quantum bits. The gate operation branching unit 220 instructs the Clifford operation execution unit 310 or the arbitrary rotation execution unit 320 to execute a gate operation depending on whether the next gate operation to be executed is a Clifford operation or an arbitrary rotation. The logical quantum bit measurement unit 230 measures the state of the logical quantum bit. The Clifford operation execution unit 310 executes a gate operation corresponding to a Clifford operation on the logical quantum bit. The arbitrary rotation execution unit 320 executes an arbitrary rotation gate operation on the logical quantum bit.

[0105] 17 shows only a part of the communication paths, and communication paths other than those shown in the figure can also be set. Each function realized by the classical computer 100 can be realized, for example, by having the processor 101 execute a program module corresponding to that function.

[0106] 18 is a diagram showing the flow of data between functions. The quantum circuit decomposition unit 110 acquires a quantum circuit from, for example, the terminal 31. When the quantum circuit decomposition unit 110 decomposes the acquired quantum circuit into basic gates, it transmits information such as the gates after decomposition, the number of gates, the type, and the order of action to the gate operation scheduler 120. The quantum circuit decomposition unit 110 also transmits the number of logical quantum bits to be used in the quantum computation to the logical quantum bit initialization unit 210. The logical quantum bit initialization unit 210 initializes the state of the logical quantum bit, and transmits to the gate operation branching unit 220 that the initialization has been completed.

[0107] The gate operation scheduler 120 manages the execution order of the basic gates, and transmits gate operation branching information indicating whether the quantum gate to be executed next is a Clifford operation or an arbitrary rotation to the gate operation branching unit 220. If the quantum gate to be executed next is a Clifford operation, the gate operation scheduler 120 transmits information indicating the type of gate to the Clifford operation execution unit 310. If the quantum gate to be executed next is an arbitrary rotation, the gate operation scheduler 120 transmits information indicating the rotation angle to the arbitrary rotation execution unit 320. Furthermore, the gate operation scheduler 120 transmits measurement target information indicating the logical quantum bit to be measured after the gate operation to the logical quantum bit measurement unit 230.

[0108] If the quantum gate to be executed next is a Clifford gate, the gate operation branching unit 220 instructs the Clifford operation execution unit 310 to execute a gate operation. Also, if the quantum gate to be executed next is an arbitrary rotation, the gate operation branching unit 220 instructs the arbitrary rotation execution unit 320 to execute a gate operation.

[0109] The Clifford operation execution unit 310 executes a gate operation of a quantum gate of the Clifford operation in response to an instruction to execute the gate operation, and transmits information indicating that the gate operation has been completed to the logical quantum bit measurement unit 230. The arbitrary rotation execution unit 320 executes an arbitrary rotation gate operation in response to an instruction to execute the gate operation, and when rotation to the target angle is successful, transmits information indicating that the gate operation has been completed to the logical quantum bit measurement unit 230. In addition, when the arbitrary rotation execution unit 320 has caused a reverse rotation as a result of the rotation gate operation, it transmits a correction rotation request signal to the gate operation scheduler 120. In response to the correction rotation request signal, the gate operation scheduler 120 calculates a new rotation angle, and transmits the calculated rotation angle to the arbitrary rotation execution unit 320.

[0110] When the gate operation is completed, the logical quantum bit measurement unit 230 measures the state of the logical quantum bit to be measured. Then, the logical quantum bit measurement unit 230 transmits the measurement value to the post-processing unit 130. The post-processing unit 130 performs a predetermined arithmetic process on the measurement value and outputs it as a calculation result.

[0111] Next, the functions of the Clifford calculation execution unit 310 will be described in detail. 19 is a block diagram showing an example of the functions of the Clifford arithmetic execution unit. The Clifford arithmetic execution unit 310 has a Clifford arithmetic unit 311, a syndrome measurement unit 312, an error location estimation unit 313, and an error correction unit 314. Of these functions, the error location estimation unit 313 is a function realized by the classical computer 100. The Clifford arithmetic unit 311, the syndrome measurement unit 312, and the error correction unit 314 are functions realized by the quantum computer 200.

[0112] The Clifford operation unit 311 performs a gate operation of a Clifford operation on a logical quantum bit based on the gate type and the input quantum state of the quantum bit to be operated on. The input quantum state is the state of the logical quantum bit at the time when the instruction for the gate operation is input.

[0113] The syndrome measurement unit 312 measures the syndrome of the logical quantum bit on which the gate operation has been performed. The syndrome measurement unit 312 transmits syndrome information indicating the measurement result to the error location estimation unit 313. The error location estimation unit 313 estimates the error location based on the syndrome information. The error location estimation unit 313 transmits estimated error information indicating the estimation result of the error location to the error correction unit 314. The error correction unit 314 recognizes the presence or absence of an error based on the estimated error information. If an error is present, the error correction unit 314 performs a gate operation to correct the state of the physical quantum bit at the error location. The error correction unit 314 sets the state of the corrected logical quantum bit as the output quantum state and notifies the logical quantum bit measurement unit 230 of the completion of the gate operation.

[0114] 20 is a block diagram showing an example of the functions of the arbitrary rotation execution unit. The arbitrary rotation execution unit 320 has an auxiliary state generation unit 321, a syndrome measurement unit 322, an error determination unit 323, a gate teleportation unit 324, a success / failure determination unit 325, a syndrome measurement unit 326, an error location estimation unit 327, and an error correction unit 328. Of these functions, the error determination unit 323, the success / failure determination unit 325, and the error location estimation unit 327 are realized by the classical computer 100. In addition, the auxiliary state generation unit 321, the syndrome measurement unit 322, the gate teleportation unit 324, the syndrome measurement unit 326, and the error correction unit 328 are realized by the quantum computer 200.

[0115] When the auxiliary state generation unit 321 acquires the information indicating the rotation angle, it generates an auxiliary state for performing rotation by that rotation angle. The auxiliary state generation unit 321 notifies the syndrome measurement unit 322 of information indicating the logical quantum bit that has become the auxiliary state. The syndrome measurement unit 322 measures the syndrome of the auxiliary state. The syndrome measurement unit 322 transmits the measured syndrome information to the error determination unit 323.

[0116] The error determination unit 323 determines the presence or absence of an error based on the measured syndrome. When the error determination unit 323 determines that an error exists, it transmits an auxiliary state regeneration signal to the auxiliary state generation unit 321. The auxiliary state generation unit 321 that receives the regeneration signal regenerates the auxiliary state.

[0117] If the error determination unit 323 determines that there is no error, the syndrome measurement unit 322 transmits information about the logical quantum circuit that has entered the auxiliary state to the gate teleportation unit 324.

[0118] The gate teleportation unit 324 executes a rotation operation by the gate teleportation circuit using the auxiliary state. The gate teleportation unit 324 transmits a measurement value obtained by a measurement performed during the execution process of the gate teleportation circuit (gate teleportation circuit 50 in FIG. 9) to the success / failure determination unit 325. The success / failure determination unit 325 determines whether or not the rotation to the specified rotation angle has been successful based on the measurement value. If the rotation has failed, a correction rotation request signal is transmitted to the gate operation scheduler 120.

[0119] When the success / failure determination unit 325 determines that the rotation is successful, the gate teleportation unit 324 notifies the syndrome measurement unit 326 of the completion of the rotation operation. The syndrome measurement unit 326 measures the syndrome of the logical quantum bit after the rotation. The syndrome measurement unit 326 transmits the measured syndrome information to the error location estimation unit 327.

[0120] The error location estimation unit 327 determines whether or not there is an error based on the measured syndrome. The error location estimation unit 327 transmits estimated error information indicating the estimation result of the error location to the error correction unit 328. The error correction unit 328 recognizes whether or not there is an error based on the estimated error information. If there is an error, the error correction unit 328 performs a gate operation to correct the state of the physical quantum bit at the error location. The error correction unit 328 sets the state of the corrected logical quantum bit as the output quantum state and notifies the logical quantum bit measurement unit 230 of the completion of the gate operation.

[0121] Next, the procedure of the quantum computing process will be described with reference to a flowchart. Fig. 21 is a flowchart showing an example of a procedure for quantum computing processing. The processing shown in Fig. 21 will be explained below in order of step numbers.

[0122] [Step S101] When a quantum circuit to be executed is input, the quantum circuit decomposition unit 110 of the classical computer 100 decomposes the quantum gates of the quantum circuit into basic gates (Clifford gates or arbitrary rotation gates). The quantum circuit decomposition unit 110 determines the number of basic gates generated to be N (N is a natural number).

[0123] [Step S102] The logical quantum bit initialization unit 210 of the quantum computer 200 initializes the state of the logical quantum bit. [Step S103] The classical computer 100 and the quantum computer 200 cooperate to execute a quantum circuit. The quantum circuit execution process will be described in detail later (see FIG. 22).

[0124] [Step S104] The post-processing unit 130 of the classical computer 100 performs a predetermined arithmetic process on the measurement value obtained by the quantum computer 200, and outputs the calculation result. Next, the quantum circuit execution process will be described in detail.

[0125] Fig. 22 is a flowchart showing an example of a procedure for a quantum circuit execution process. The process shown in Fig. 22 will be described below in order of step numbers. [Step S201] The gate operation scheduler 120 counts up the loop variable i from 1 and repeats the processes of steps S202 to S212 until the loop variable i becomes N.

[0126] [Step S202] The gate operation scheduler 120 judges whether the i-th gate is an arbitrary rotation quantum gate or a Clifford gate. If the gate operation scheduler 120 judges that the i-th gate is an arbitrary rotation quantum gate, the process proceeds to step S205. If the gate operation scheduler 120 judges that the i-th gate is a Clifford gate, the process proceeds to step S203.

[0127] [Step S203] The gate operation scheduler 120 causes the quantum computer 200 to execute a Clifford gate operation. For example, the gate operation scheduler 120 transmits data operation branching information indicating that the next quantum gate is a Clifford operation to the gate operation branching unit 220. The gate operation scheduler 120 also transmits information such as the gate type of the gate to be executed next to the Clifford operation execution unit 310. The gate operation branching unit 220 instructs the Clifford operation execution unit 310 to perform a gate operation. The Clifford operation execution unit 310 executes a Clifford gate operation on the logical quantum bit.

[0128] [Step S204] The Clifford arithmetic execution unit 310 performs error correction processing. For example, the Clifford arithmetic execution unit 310 measures the syndrome of the logical quantum bit, and determines whether or not an error exists, and if an error exists, the location of the error, based on the syndrome. If the Clifford arithmetic execution unit 310 detects an error, it performs a gate operation to correct the error. The Clifford arithmetic execution unit 310 then proceeds to step S213.

[0129] [Step S205] The gate operation scheduler 120 repeatedly executes the processes of steps S206 to S211 until the arbitrary rotation using the quantum computer 200 is successful. For example, the gate operation scheduler 120 transmits data operation branching information indicating that the next quantum gate is arbitrary rotation to the gate operation branching unit 220. The gate operation scheduler 120 also transmits a rotation angle to the arbitrary rotation execution unit 320. The gate operation branching unit 220 instructs the arbitrary rotation execution unit 320 to perform a gate operation.

[0130] [Step S206] The gate operation scheduler 120 sets the rotation angle to be executed. For example, the gate operation scheduler 120 sets the initial rotation angle to the angle θ specified by the i-th quantum gate. The gate operation scheduler 120 also sets the second and subsequent rotation angles to twice the previous angle, for example.

[0131] [Step S207] The arbitrary rotation execution unit 320 executes a gate operation in accordance with the auxiliary state preparation circuit. As a result of this gate operation, an auxiliary state is generated. [Step S208] The arbitrary rotation execution unit 320 judges whether or not there is an error in the assistance state. If there is an error, the arbitrary rotation execution unit 320 proceeds to step S207, and regenerates the assistance state. If there is no error, the arbitrary rotation execution unit 320 proceeds to step S209.

[0132] [Step S209] The arbitrary rotation execution unit 320 executes gate processing on the logical quantum bit according to the gate teleportation circuit. At this time, the arbitrary rotation execution unit 320 judges whether the rotation is successful or not based on the measurement value measured during the execution process of the gate teleportation circuit. If the rotation fails (if the rotation is reversed), the arbitrary rotation execution unit 320 outputs a correction rotation request signal.

[0133] [Step S210] The arbitrary rotation execution unit 320 performs an error correction process. For example, the arbitrary rotation execution unit 320 measures the syndrome of the logical quantum bit, and determines whether or not there is an error based on the syndrome, and if there is an error, the location of the error. If the arbitrary rotation execution unit 320 detects an error, it performs a gate operation to correct the error.

[0134] [Step S211] The arbitrary rotation execution unit 320 judges whether the arbitrary rotation is successful. For example, the arbitrary rotation execution unit 320 judges that the arbitrary rotation is successful if the measurement value during the execution process of the gate teleportation circuit is |1>. If the arbitrary rotation fails, the arbitrary rotation execution unit 320 outputs a correction rotation request signal.

[0135] [Step S212] If the arbitrary rotation is successful, the gate operation scheduler 120 proceeds to step S213. For example, if the arbitrary rotation execution unit 320 does not output a correction rotation request signal, the gate operation scheduler 120 determines that the arbitrary rotation is successful.

[0136] [Step S213] The gate operation scheduler 120 ends the quantum circuit execution process if the value of the loop variable i is N. If the loop variable i is less than N, the gate operation scheduler 120 counts up N by 1 and repeats the processes of steps S202 to S212.

[0137] By performing the above quantum computation, arbitrary rotation can be realized without using a T gate, and the number of gate operations is reduced compared to repeating the gate operation of the T gate many times (for example, about 100 times). As a result, the quantum computation time is shortened and error accumulation is reduced. In addition, since gate operations that use a large number of physical quantum bits such as magic state distillation are not performed when performing arbitrary rotation, the number of physical quantum bits used can be reduced. Although errors remain due to not performing magic state distillation, the probability of occurrence is suppressed by the state preparation method using the [[4,2,2]] code, and practical accuracy can be achieved. Note that the flowchart has been described here assuming that N gates are executed sequentially, but a set of gates that can be executed simultaneously may be executed in parallel.

[0138] Below, we consider an example that is executed based on specific assumptions. The logical quantum bits are constructed using a rotated surface code (code distance d = 7,9) (see Non-Patent Document 4). The number of physical quantum bits that can be used is 10,000. The error generation model is modeled using circuit-level noise. Circuit-level noise is a model in which errors occur in all operations (initialization, gate operation, measurement). Circuit-level noise is a model that is close to actual quantum computing. Probability p = 10 -4 Assume that an error occurs in

[0139] When we derive the scale of quantum computing that can be performed under these conditions, we obtain the results shown in Figure 23. 23 is a diagram showing an example of a numerical calculation result of the occurrence probability of a logical error. Graph 61 shows the dependency of a logical Z error on a physical error (p dependency). The horizontal axis is the occurrence probability of a physical error, and the vertical axis is the occurrence probability of a logical Z error. Line 61a shows the p dependency when the code distance d=7, and line 61b shows the p dependency when the code distance d=9.

[0140] Graph 62 shows the p dependency of logical X errors. The horizontal axis is the probability of occurrence of a physical error, and the vertical axis is the probability of occurrence of a logical X error. Line 62a shows the p dependency when the code distance d=7, and line 62b shows the p dependency when the code distance d=9.

[0141] The p dependence is given by equation (6).

[0142]

number

[0143] C in Equation (6) i andp th , i (i = Z, X) are constants that are set according to the Z error and the X error, respectively. In the calculation example shown in Graph 61 (when i = Z), Z =0.068", "p th,Z =0.0039". In the calculation example shown in Graph 62 (when i = X), "C X =0.082", "p th,X =0.0042".

[0144] p=10 -4 Then the overall probability of logical errors is p L =p L,Z +p_ L,X (assuming that logical Z errors and logical X errors occur independently). p=10 -4 , the probability of a logical error when the code distance d=7 is as follows: p_L=0.068(p / 0.0039) (7+1) / 2 +0.082(p / 0.0042) (7+1) / 2 =5.8×10-8 p=10 -4 , the probability of a logical error when the code distance d=9 is as follows: p_L=0.068(p / 0.0039) (9+1) / 2 +0.082(p / 0.0042) (9+1) / 2 =1.5×10 -9 ) The results of numerical calculations on the error probability of auxiliary state preparation for arbitrary rotation are shown in Figure 24.

[0145] 24 is a diagram showing an example of the calculation result of the error probability of the auxiliary state. Graph 63 shows the p dependency of the error probability of the auxiliary state. The horizontal axis of graph 63 is the physical error probability, and the vertical axis is the error probability of the auxiliary state. Line 63a shows the p dependency when code distance d=3, line 63b shows the p dependency when code distance d=5, line 63c shows the p dependency when code distance d=7, and line 63d shows the p dependency when code distance d=9. Line 63e shows the case where the error probability of the auxiliary state is "2p / 15".

[0146] As shown in graph 63, the error rate of the auxiliary state has a p dependence of approximately 2p / 15. -4 In this case, the error rate of the auxiliary state is 2p / 15 = 1.3 × 10 -5 " Thus, from the numerical calculations, it can be confirmed that the error rate in the assistance state is significantly smaller than the error rate in the magic state.

[0147] By appropriately arranging the physical quantum bits that compose the logical quantum bit, the number of physical quantum bits used to input the auxiliary state to the gate teleportation circuit 50 can be reduced.

[0148] FIG. 25 is a diagram showing an example of an arrangement of logical quantum bits. In FIG. 25, logical quantum bits 71 to 78 are shown as rectangles. Each of the logical quantum bits 71 to 78 is a set of physical quantum bits used for encoding. The six logical quantum bits 71 to 76 in the center are logical quantum bits used as data in quantum computation. The two logical quantum bits 77 and 78 on both sides are logical quantum bits used to generate auxiliary states for arbitrary rotation. The other areas are workspaces for computation.

[0149] When performing arbitrary rotation on any of the logical quantum bits 71 to 76, a gate operation is performed on either of the logical quantum bits 77 and 78 by the auxiliary state preparation circuit 51 to generate an auxiliary state. Then, the logical quantum bit indicating the auxiliary state and the logical quantum bit on which the arbitrary rotation is applied are input to the gate teleportation circuit 50, and the gate operation of the arbitrary rotation is realized by executing the gate teleportation circuit 50.

[0150] In the arrangement shown in Figure 25, for 10,000 physical qubits, when the code distance d = 9, the number of logical qubits available for quantum computing is 37. When the code distance d = 7, the number of logical qubits available for quantum computing is 64. For example, when the code distance d = 9, the number of Clifford operations for 37 logical qubits is 6.9 × 10 8 "Rounds", arbitrary rotation "3.8×10 4 If the code distance is d=7, then it takes 1.7 × 10 Clifford operations for 64 logical qubits. 7 "Rounds", arbitrary rotation "3.8×10 4 The computational complexity when the code distance is d=7 is such that it is difficult to simulate on a classical computer.

[0151] Thus, according to the second embodiment, the gate operation is reduced to an average of two times instead of about 100 times when Clifford+T is used. Therefore, unnecessary error accumulation can be reduced, and the calculation time is shortened. In addition, since magic state distillation is not performed when performing arbitrary rotation, the number of physical quantum bits used is reduced. Furthermore, since the error of arbitrary rotation is minimized by ingenious preparation of auxiliary states, the number of times that arbitrary rotation can be performed is increased. As a result, for example, a device with 10,000 quantum bits can perform calculations of an amount that cannot be simulated by a classical computer. In other words, the quantum computing system 30 can bring out the maximum computing performance with a limited number of quantum bits.

[0152] [Other embodiments] In the second embodiment, quantum computation is performed using the quantum computer 200. However, when the scale of the problem is small or the required accuracy is low, the functions of the quantum computer 200 can be replaced by quantum simulation using the classical computer 100.

[0153] In the second embodiment, the arbitrary rotation is R Z Although an example has been given of performing gate operation on a rotation gate of (θ), arbitrary rotations around other rotation axes can be similarly performed. Although the embodiments have been described above, the configurations of the parts shown in the embodiments can be replaced with other parts having similar functions. Any other components or steps may be added. Furthermore, any two or more configurations (features) of the above-mentioned embodiments may be combined. [Explanation of symbols]

[0154] 1 Quantum circuit 2. Turntable 3 Gate Teleportation Circuit 4 The first logical qubit 5. The Second Logical Qubit 10. Information processing device 11 Storage section 12 Processing section 13 Quantum bit devices

Claims

1. A quantum computing program that causes a computer to execute a process of performing a rotation operation on a first logical quantum bit using an auxiliary state generation circuit including a rotation gate and a gate teleportation circuit, comprising: When the quantum gate that operates on the first logical quantum bit is a gate that indicates the rotation operation, a target rotation angle set in the gate that indicates the rotation operation is set as a designated rotation angle; generating a second logical qubit having a predetermined auxiliary state based on the specified rotation angle; using the first logical quantum bit and the second logical quantum bit as inputs, performing a probabilistic rotation operation of a forward rotation by the specified rotation angle or a reverse rotation having an opposite sign to the specified rotation angle; repeating the process of generating the second logical quantum bit and the process of performing the rotation operation while updating the specified rotation angle based on the target rotation angle until the rotation operation becomes the forward rotation. A quantum computing program that causes the computer to execute processing.

2. In the process of generating the second logical quantum bit, when the specified rotation angle is θ (θ is a real number), R Z generating the second logical qubit having the ancillary state of (θ)|+>; The quantum computing program according to claim 1.

3. In the process of generating the second logical quantum bit, the second logical quantum bit is generated by encoding the second logical quantum bit using a [[4, 2, 2]] code, which is a code representing the state of two logical quantum bits using four physical quantum bits and has a code distance of 2. The quantum computing program according to claim 1.

4. In the process of generating the second logical quantum bit, a code distance of the [[4, 2, 2]] code is extended to a predetermined code distance to generate the second logical quantum bit of the predetermined code distance. The quantum computing program according to claim 3.

5. In the process of generating the second logical quantum bit, if an error in the auxiliary state is detected, the process of generating the second logical quantum bit having the auxiliary state is repeated. The quantum computing program according to claim 1.

6. In the repetition of the process of generating the second logical quantum bit and the process of performing the rotation operation, if the rotation operation performed using the second logical quantum bit generated by applying a first designated rotation angle as an input results in the reverse rotation, an angle twice the first designated rotation angle is set as a second designated rotation angle to be applied to the next process of generating the second logical quantum bit. The quantum computing program according to claim 1.

7. In repeating the process of generating the second logical quantum bit and the process of performing the rotation operation, if the remainder obtained by dividing an angle twice the first designated rotation angle by 2π is greater than or equal to 0 and less than π, the angle of the remainder is set to the second designated rotation angle, and if the remainder is greater than π and less than or equal to 2π, the angle obtained by subtracting 2π from the remainder is set to the second designated rotation angle. The quantum computing program according to claim 6.

8. The rotation operation is a rotation operation according to a gate teleportation circuit that indicates a probabilistic gate operation of the forward rotation or the reverse rotation. The quantum computing program according to claim 1.

9. A quantum computing method in which a computer executes a process of performing a rotation operation on a first logical quantum bit using an auxiliary state generation circuit including a rotation gate and a gate teleportation circuit, comprising: When the quantum gate that operates on the first logical quantum bit is a gate that indicates the rotation operation, a target rotation angle set in the gate that indicates the rotation operation is set as a designated rotation angle; generating a second logical qubit having a predetermined auxiliary state based on the specified rotation angle; using the first logical quantum bit and the second logical quantum bit as inputs, performing a probabilistic rotation operation of a forward rotation by the specified rotation angle or a reverse rotation having an opposite sign to the specified rotation angle; repeating the process of generating the second logical quantum bit and the process of performing the rotation operation while updating the specified rotation angle based on the target rotation angle until the rotation operation becomes the forward rotation. A quantum computing method in which the computer executes the processing.

10. An information processing device having a processing unit that performs a rotation operation on a first logical quantum bit using an auxiliary state generating circuit including a rotation gate and a gate teleportation circuit, comprising: the processing unit, when the quantum gate acting on the first logical quantum bit is a gate indicating the rotation operation, sets a target rotation angle set in the gate indicating the rotation operation to a designated rotation angle, generates a second logical quantum bit having a predetermined auxiliary state based on the designated rotation angle, performs a probabilistic rotation operation of a forward rotation of the designated rotation angle or a reverse rotation having an opposite sign to the designated rotation angle, using the first logical quantum bit and the second logical quantum bit as inputs, and repeats the process of generating the second logical quantum bit and the process of performing the rotation operation while updating the designated rotation angle based on the target rotation angle until the rotation operation becomes the forward rotation.

1. An information processing device comprising:

11. A quantum computing program that causes a computer to execute a process of performing a rotation operation on a first logical quantum bit using an auxiliary state generation circuit including a rotation gate and a gate teleportation circuit, comprising: When the quantum gate that operates on the first logical quantum bit is a gate that indicates the rotation operation, a target rotation angle set in the gate that indicates the rotation operation is set as a designated rotation angle; generating a first state encoded using a plurality of physical qubits used in the auxiliary state generation circuit; generating a second logical qubit having a predetermined auxiliary state by applying the rotation gate to the encoded first state based on the specified rotation angle; performing the rotation operation with the gate teleportation circuit using the first logical qubit and the second logical qubit as inputs; A quantum computing program that causes the computer to execute processing.

12. In the process of generating the first state, the first state is generated by encoding the plurality of physical quantum bits using a surface encoding method.

12. The quantum computing program according to claim 11.

13. The plurality of physical qubits is four physical qubits; In the process of generating the first state, the first state is generated by encoding the four physical quantum bits using a [[4, 2, 2]] code that represents the states of two logical quantum bits and has a code distance of 2.

12. The quantum computing program according to claim 11.

14. In the process of performing the rotation operation, the rotation operation is performed probabilistically, either a forward rotation of the specified rotation angle or a reverse rotation with an opposite sign to the specified rotation angle, and the process of generating the first logical quantum bit and the process of performing the rotation operation are repeated while updating the specified rotation angle based on the target rotation angle until the rotation operation becomes the forward rotation.

12. The quantum computing program according to claim 11.

15. The process of generating the second logical quantum bit, wherein when the specified rotation angle is θ (θ is a real number), the second logical quantum bit is generated having the auxiliary state R Z (θ)|+>. The quantum computing program according to claim 11.

16. In the process of generating the second logical quantum bit, a code distance of the [[4, 2, 2]] code is extended to a predetermined code distance, thereby generating the second logical quantum bit of the predetermined code distance. The quantum computing program according to claim 13.

17. In the process of generating the second logical quantum bit, if an error in the auxiliary state is detected, the process of generating the second logical quantum bit having the auxiliary state is redone. The quantum computing program according to claim 11.

18. In the repetition of the process of generating the second logical quantum bit and the process of executing the rotation operation, if the rotation operation executed using the second logical quantum bit generated by applying a first specified rotation angle as input results in the reverse rotation, an angle twice the first specified rotation angle is set as the second specified rotation angle to be applied to the next process of generating the second logical quantum bit. The quantum computing program according to claim 14.

19. A quantum computing method in which a computer executes a process of performing a rotation operation on a first logical quantum bit using an auxiliary state generation circuit including a rotation gate and a gate teleportation circuit, comprising: When the quantum gate that operates on the first logical quantum bit is a gate that indicates the rotation operation, a target rotation angle set in the gate that indicates the rotation operation is set as a designated rotation angle; generating a first state encoded using a plurality of physical qubits used in the auxiliary state generation circuit; generating a second logical qubit having a predetermined auxiliary state by applying the rotation gate to the encoded first state based on the specified rotation angle; performing the rotation operation with the gate teleportation circuit using the first logical qubit and the second logical qubit as inputs; A quantum computing method in which the computer executes the processing.

20. An information processing device having a processing unit that performs a rotation operation on a first logical quantum bit using an auxiliary state generating circuit including a rotation gate and a gate teleportation circuit, and when the quantum gate to be operated on the first logical quantum bit is a gate indicating the rotation operation, the processing unit sets a target rotation angle set in the gate indicating the rotation operation to a designated rotation angle, generates a first state encoded using a plurality of physical quantum bits used in the auxiliary state generation circuit, and generates a second logical quantum bit having a predetermined auxiliary state by operating the rotation gate on the encoded first state based on the designated rotation angle; and executes the rotation operation using the first logical quantum bit and the second logical quantum bit as inputs using the gate teleportation circuit.

1. An information processing device comprising:

21. A quantum computing program that causes a computer to execute a process of performing a rotation operation on a first logical quantum bit using an auxiliary state generation circuit including a rotation gate and a gate teleportation circuit, comprising: When the quantum gate that acts on the first logical quantum bit is a gate that indicates the rotation operation, a target rotation angle is set as a specified rotation angle for an arbitrary angle rotation gate that can perform the rotation operation at an arbitrary angle; generating a second logical qubit having a predetermined auxiliary state based on the specified rotation angle; performing the rotation operation using the gate teleportation circuit with the first logical quantum bit and the second logical quantum bit as inputs; A quantum computing program that causes the computer to execute the rotation operation of the target rotation angle without using a T-gate that rotates a predetermined angle through processing.

22. The arbitrary angle rotation gate includes an auxiliary state preparation circuit that generates the second logical quantum bit as the auxiliary state; and the gate teleportation circuit that performs the rotation operation based on the first logical quantum bit and the second logical quantum bit.

22. The quantum computing program according to claim 21, comprising:

23. The arbitrary angle rotation gate is a gate that probabilistically executes a rotation operation of a forward rotation by the specified rotation angle or a reverse rotation having an opposite sign to the specified rotation angle, and repeating the process of generating the second logical quantum bit and the process of performing the rotation operation while updating the specified rotation angle based on the target rotation angle until the rotation operation becomes the forward rotation.

23. The quantum computing program according to claim 22.

24. The auxiliary state preparation circuit includes a plurality of physical quantum bits, an encoding circuit that encodes the plurality of physical quantum bits to generate a first state, and the rotation gate that operates on the encoded first state; In the process of generating the first state, the first state encoded by a surface encoding method is generated.

24. The quantum computing program according to claim 23.

25. The auxiliary state preparation circuit includes four physical quantum bits, an encoding circuit that encodes the four physical quantum bits to generate a first state, and the rotation gate that operates on the encoded first state; In the process of generating the first state, the first state is generated by encoding the four physical quantum bits using a [[4, 2, 2]] code that represents the states of two logical quantum bits and has a code distance of 2.

24. The quantum computing program according to claim 23.

26. The process of generating the second logical quantum bit, wherein when the specified rotation angle is θ (θ is a real number), the second logical quantum bit is generated having the auxiliary state R Z (θ)|+>.

22. The quantum computing program according to claim 21.

27. ​​In the process of generating the second logical quantum bit, a code distance of the [[4, 2, 2]] code is extended to a predetermined code distance, thereby generating the second logical quantum bit of the predetermined code distance.

26. The quantum computing program according to claim 25.

28. In the process of generating the second logical quantum bit, if an error in the auxiliary state is detected, the process of generating the second logical quantum bit having the auxiliary state is repeated.

22. The quantum computing program according to claim 21.

29. A quantum computing method in which a computer executes a process of performing a rotation operation on a first logical quantum bit using an auxiliary state generation circuit including a rotation gate and a gate teleportation circuit, comprising: When the quantum gate that acts on the first logical quantum bit is a gate that indicates the rotation operation, a target rotation angle is set as a specified rotation angle for an arbitrary angle rotation gate that can perform the rotation operation at an arbitrary angle; generating a second logical qubit having a predetermined auxiliary state based on the specified rotation angle; performing the rotation operation using the gate teleportation circuit with the first logical quantum bit and the second logical quantum bit as inputs; A quantum computing method in which the computer executes the rotation operation of the target rotation angle by processing without using a T-gate that rotates a predetermined angle.

30. An information processing device having a processing unit that performs a rotation operation on a first logical quantum bit using an auxiliary state generating circuit including a rotation gate and a gate teleportation circuit, When the quantum gate that acts on the first logical quantum bit is a gate that indicates the rotation operation, the processing unit sets a target rotation angle as a specified rotation angle in an arbitrary angle rotation gate that is capable of performing the rotation operation at an arbitrary angle, generates a second logical quantum bit having a predetermined auxiliary state based on the specified rotation angle, and performs the rotation operation of the target rotation angle without using a T-gate that rotates by a predetermined angle by using the first logical quantum bit and the second logical quantum bit as inputs and the gate teleportation circuit.

1. An information processing device comprising:

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