Circuit board, electronic device, and method for manufacturing circuit board
Patent Information
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- CANON KK
- Filing Date
- 2023-04-28
- Publication Date
- 2026-05-15
AI Technical Summary
Existing circuit board designs face challenges in reducing power supply impedance while minimizing size due to the placement of capacitors, which can lead to malfunctions from noise interference and hinder miniaturization.
A circuit board design that includes a first capacitor with smaller capacitance placed near the semiconductor device for self-noise suppression and a second capacitor with larger capacitance stacked on the first capacitor, positioned within a predetermined distance from the semiconductor device, reducing power supply impedance and allowing for miniaturization.
The design effectively reduces power supply impedance, minimizing noise interference and enabling the reduction of circuit board size without compromising semiconductor device functionality.
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Abstract
Description
[Technical field]
[0001] The present disclosure relates to circuit boards, electronic devices, and methods for manufacturing circuit boards. [Background technology]
[0002] Noise countermeasures are required for circuit boards.
[0003] Patent Document 1 discloses that a noise suppression capacitor having a smaller capacitance than that of a snubber capacitor is provided between a snubber capacitor and an inverter between a positive line and a negative line of a DC power supply line. [Prior art documents] [Patent documents]
[0004] [Patent Document 1] JP 2017-042040 A Summary of the Invention [Problem to be solved by the invention]
[0005] The configuration of Patent Document 1 is susceptible to the effects of parasitic inductance components in the wiring between the small-capacity capacitor and the large-capacity capacitor.
[0006] Therefore, an object of the present disclosure is to provide an advantageous technique for suppressing noise in circuit boards. [Means for solving the problem]
[0007] The circuit board according to the present disclosure comprises a wiring board, and a first capacitor and a second capacitor stacked on the wiring board, the first capacitor being disposed between the second capacitor and the wiring board, and the capacitance of the second capacitor being greater than the capacitance of the first capacitor. Effect of the Invention
[0008] The present disclosure provides an advantageous technique for suppressing noise in circuit boards. [Brief description of the drawings]
[0009] [Figure 1] FIG. 2 is a perspective view showing a circuit board according to the first embodiment. [Diagram 2] FIG. 2 is a side view of the circuit board of FIG. [Diagram 3] 2 is a perspective view showing a circuit board according to a first comparative example to the circuit board shown in FIG. 1. [Figure 4] 1. FIG. 4 is a perspective view showing a circuit board according to a second comparative example to the circuit board shown in FIG. [Diagram 5] 1. FIG. 4 is a perspective view showing a circuit board according to a third comparative example to the circuit board shown in FIG. [Figure 6] 1 is a diagram showing the relationship between frequency and power supply impedance in the circuit boards of Example 1, Comparative Example 1, and Comparative Example 2. FIG. [Figure 7] 1 is a diagram showing the relationship between frequency and power supply impedance in the circuit boards of Example 1, Comparative Example 1, and Comparative Example 3. FIG. [Figure 8] FIG. 11 is a perspective view showing a circuit board according to a second embodiment. [Figure 9] FIG. 11 is a side view showing a circuit board according to Comparative Example 4 of Example 2. [Figure 10] FIG. 13 is a diagram showing the relationship between frequency and power supply impedance in the circuit boards of Example 2 and Comparative Example 4. [Figure 11] FIG. 11 is a perspective view showing a circuit board according to a third embodiment. [Figure 12] 12 is a side view showing a circuit board according to a fourth comparative example to the circuit board shown in FIG. [Figure 13] FIG. 13 is a side view showing an example arrangement (1) of a plurality of capacitors on a circuit board according to a fourth embodiment. [Figure 14] FIG. 13 is a side view showing an arrangement (2) of a plurality of capacitors on a circuit board according to a fourth embodiment. [Figure 15] FIG. 13 is a side view showing an example arrangement (3) of a plurality of capacitors on a circuit board according to a fourth embodiment. [Figure 16] 13A to 13C are diagrams illustrating a method for manufacturing a circuit board according to a fifth embodiment. [Figure 17] 13A to 13C are diagrams illustrating a method for manufacturing a circuit board according to a fifth embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0010] In recent years, with the increase in the speed of circuit operation and the decrease in power supply voltage, there is a tendency for semiconductor devices to malfunction. The cause of malfunction is fluctuations in the power supply potential of semiconductor devices due to external noise propagating through the power supply wiring of a printed circuit board and so-called self-noise caused by the operation of the semiconductor device itself. Semiconductor device manufacturers recommend measures such as the use of external filters such as ferrite beads to counter external noise and the placement of small-capacity capacitors near the power supply terminals of the semiconductor device to counter self-noise.
[0011] For example, a low-pass filter consisting of two capacitors and ferrite beads can reduce external noise with frequency components above the cutoff frequency, preventing malfunction of the semiconductor device. However, this method causes parallel resonance between the internal inductance component of the ferrite beads and the capacitance component of the capacitor at frequencies near the cutoff frequency, increasing the power supply impedance. This can amplify the external noise and cause malfunction.
[0012] To avoid such parallel resonance, a method is used in which a capacitor with a large capacitance is placed between the power supply and ground instead of an external filter with an inductance component such as ferrite beads to suppress the power supply impedance and avoid malfunction. For example, a method is used in which a small capacitor with a small capacitance is placed near the semiconductor device to suppress self-noise, and a large-capacitance capacitor is placed in parallel on the outside of it.
[0013] When two capacitors with different capacitances are arranged in parallel, one of the capacitors must have a large capacitance. However, a large-capacity capacitor is large in size and difficult to arrange near a semiconductor device. This is because a large number of board wirings and electrical components are densely packed near the semiconductor device for inputting and outputting signals to and from other surrounding components and for supplying power, and there is no space left to arrange a large-sized capacitor there. In other words, although the power supply impedance can be reduced, the space for arranging board wirings and electrical components near the semiconductor device is consumed. This results in an obstacle to miniaturization of printed wiring boards.
[0014] A method of placing a large-capacity capacitor at a position slightly away from the semiconductor device can also be used. A small-capacity, small-sized capacitor is mounted to suppress the self-noise of the semiconductor device. However, this method increases the power supply impedance at the frequency of parallel resonance between the small-capacity, small-sized capacitor and the parasitic inductance component of the board wiring from this capacitor to the large-capacity capacitor. This increases the possibility of the semiconductor device malfunctioning due to external noise.
[0015] In the following embodiments, for example, a technique is disclosed that enables miniaturization of a printed circuit board while reducing the power supply impedance.
[0016] [First embodiment] Hereinafter, the power impedance in the circuit board of the first embodiment of the present disclosure will be described with reference to Figures 1 to 7. In the following example, a typical printed wiring board is exemplified as a wiring board used in the circuit board, but it is not essential that the wiring of the wiring board is formed by printing technology. The wiring board can be a rigid wiring board, but it may also be a flexible wiring board.
[0017] FIG. 1 is a perspective view showing a circuit board 1000 according to a first embodiment. In FIG. 1, the circuit board 1000 includes a printed wiring board 100, a first capacitor 101, and a second capacitor 102. The first capacitor 101 is disposed on at least one of two main surfaces of the printed wiring board 100. At least one of the two main surfaces of the printed wiring board 100 can be referred to as a mounting surface. The second capacitor 102 is stacked on the first capacitor 101. The second capacitor 102 has a larger capacitance than the first capacitor 101. In this manner, the first capacitor 101 and the second capacitor 102 are stacked on top of each other on the printed wiring board 100.
[0018] The circuit board 1000 also includes a semiconductor device 103. The semiconductor device 103 is disposed on the main surface of the printed wiring board 100. The semiconductor device 103 also includes a power terminal 106 and a ground terminal 107. The power terminal 106 is connected to a power wiring 104 formed on the main surface of the printed wiring board 100. The ground terminal 107 is connected to a ground wiring 105 formed on the main surface of the printed wiring board 100. A power source (electricity) is supplied to the semiconductor device 103 from a power source device (not shown) via the power wiring 104 and the ground wiring 105. The power source device that supplies power to the semiconductor device 103 may be a semiconductor device disposed on the printed wiring board 100. The power source device may be mounted on the same main surface as the first capacitor 101 and the second capacitor 102, or may be mounted on a main surface different from the first capacitor 101 and the second capacitor 102. The power source device may be mounted on the same main surface as the semiconductor device 103, or may be mounted on a main surface different from the semiconductor device 103. The power source device may be disposed outside the printed wiring board 100. In this embodiment, the power supply wiring 104 and the ground terminal 107 are shown as the first power supply wiring and the second power supply wiring of the printed wiring board 100, respectively, but the polarities may be reversed.
[0019] As shown in FIG. 1, the first capacitor 101 and the second capacitor 102 are disposed near the semiconductor device 103 on the main surface of the printed wiring board 100, within a predetermined distance range from the semiconductor device 103. The predetermined distance range is, for example, within 50 mm from the semiconductor device 103. That is, the first capacitor 101 and the second capacitor 102 can be disposed within 50 mm from the semiconductor device 103. More preferably, the first capacitor 101 and the second capacitor 102 are disposed within a range equivalent to the outer size L of the semiconductor device 103 from the semiconductor device 103. Even more preferably, the first capacitor 101 and the second capacitor 102 are disposed within a range equivalent to half (L / 2) of the outer size L of the semiconductor device 103 from the semiconductor device 103. The outer size L of the semiconductor device 103 is 5 to 50 mm, typically 10 to 20 mm. If the outer size L of the semiconductor device 103 is 15 to 20 mm, the predetermined distance range is within a range of 15 to 20 mm from the semiconductor device 103. The predetermined distance range is preferably within a range of 10 mm from the semiconductor device 103, for example. According to this embodiment, the distance between the first capacitor 101 and the second capacitor 102 can be made as small as possible, but it is preferable to bring the first capacitor 101 and the second capacitor 102 closer to the semiconductor device 103. The centers of gravity of the first capacitor 101 and the second capacitor 102 are positioned on a straight line in the stacking direction of the first capacitor 101 and the second capacitor 102 (the vertical direction in the figure).
[0020] Fig. 2 is a side view of the circuit board 1000 according to the first embodiment, seen from a longitudinal side of the first capacitor 101 and the second capacitor 102. As shown in Fig. 2, the first capacitor 101 has a power terminal 101V and a ground terminal 101G. The power supply wiring 104 is connected to the power supply terminal 101V of the first capacitor 101. The ground wiring 105 is connected to the ground terminal 101G of the first capacitor 101.
[0021] The second capacitor 102 also includes a power terminal 102V and a ground terminal 102G. The power terminal 101V of the first capacitor 101 faces the power terminal 102V of the second capacitor 102. Similarly, the ground terminal 101G of the first capacitor 101 faces the ground terminal 102G of the second capacitor 102.
[0022] The first fillet 108 and the second fillet 109 are fillets made of solder. The first fillet 108 electrically connects the power terminal 101V of the first capacitor 101 to the power terminal 102V of the second capacitor 102. The first fillet 108 also electrically connects the ground terminal 101G of the first capacitor 101 to the ground terminal 102G of the second capacitor 102.
[0023] Similarly, the second fillet 109 electrically connects the power supply terminal 101V of the first capacitor 101 to the power supply wiring 104. The second fillet 109 also electrically connects the ground terminal 101G of the first capacitor 101 to the ground wiring 105.
[0024] 1 and 2, a multilayer ceramic capacitor of a first size (1 mm×0.5 mm) having a capacitance of 0.15 μF was used as the first capacitor 101. A multilayer ceramic capacitor of a second size (1.6 mm×0.8 mm) having a capacitance of 3.9 μF was used as the second capacitor 102.
[0025] Next, a description will be given of Comparative Examples 1 to 3 with respect to the circuit board 1000 shown in Fig. 1. Note that the same capacitors as those in Example 1 were used for first capacitor 101 and second capacitor 102 in Comparative Examples 1 to 3.
[0026] Fig. 3 is a perspective view showing a circuit board 1001 according to a first comparative example to the circuit board 1000 shown in Fig. 1. Comparative example 1 in Fig. 3 shows an example in which a small capacitor with a small capacitance is arranged near semiconductor device 103 to suppress self-noise, and a large-capacitance capacitor is arranged in parallel outside the small-capacitance capacitor.
[0027] Like the circuit board 1000 of the first embodiment, the circuit board 1001 includes a printed wiring board 100, a first capacitor 101, a second capacitor 102, a semiconductor device 103, a power supply wiring 104, a ground wiring 105, a power supply terminal 106, and a ground terminal 107. The power supply terminal 106 is connected to the power supply wiring 104 formed on the main surface of the printed wiring board 100. The ground terminal 107 is connected to the ground wiring 105. The power supply wiring 104 is connected to the power supply terminal of the first capacitor 101. The ground wiring 105 is connected to the ground terminal of the first capacitor 101. Similarly, the power supply wiring 104 is connected to the power supply terminal of the second capacitor 102. The ground wiring 105 is connected to the ground terminal of the second capacitor 102. In FIG. 3, the pitch P1 between the first capacitor 101 and the second capacitor 102 is set to 1.6 mm.
[0028] Also, first capacitor 101 has a smaller capacitance than second capacitor 102. In the configuration of Comparative Example 1, second capacitor 102 must have a large capacitance, and is therefore difficult to place in the vicinity of semiconductor device 103. The reason for this is that the vicinity of semiconductor device 103 is crowded with wiring leads for transmitting signals and power to other surrounding components, and many components, leaving no space to place a large-sized capacitor there.
[0029] Fig. 4 is a perspective view showing a circuit board 1002 according to a second comparative example to the circuit board 1000 shown in Fig. 1. In the second comparative example of Fig. 4, a first capacitor 101 having a large capacity is arranged slightly away from a semiconductor device 103. In Fig. 4, a pitch P2 between the first capacitor 101 and the second capacitor 102 is set to 10 mm.
[0030] Fig. 5 is a perspective view showing a circuit board 1003 according to a third comparative example to the circuit board 1000 shown in Fig. 1. The difference between the circuit board 1000 of the first embodiment and the circuit board 1003 of the third comparative example is that the first capacitance of the first capacitor 101 in the third comparative example is larger than the second capacitance of the second capacitor 102.
[0031] 6 is a diagram showing the relationship between frequency and power supply impedance in the circuit boards of Example 1, Comparative Example 1, and Comparative Example 2. ANSYS Electronics Desktop 2020R2 was used to calculate the power supply impedance.
[0032] In the measurement of the power impedance in Example 1, Comparative Example 1, and Comparative Example 2, the power terminal 106 and the ground terminal 107 of the semiconductor device 103 were set as observation points.
[0033] 6, it can be seen that the power supply impedance can be reduced in Comparative Example 1. However, in the case of the configuration of Comparative Example 1, the space for board wiring and component arrangement near the semiconductor device 103 is consumed. As a result, it is expected that this will become a factor that hinders miniaturization of the printed wiring board 100.
[0034] On the other hand, in Comparative Example 2, it is found that the power supply impedance increases at the frequency of parallel resonance of the small-capacity, compact first capacitor 101 mounted on semiconductor device 103 to suppress its own noise, and the parasitic inductance component of the board wiring from this first capacitor 101 to the large-capacity second capacitor 102. This is expected to make it difficult to prevent malfunction of semiconductor device 103 due to external noise. Also, in Example 1, it is found that the increase in power supply impedance due to parallel resonance occurring in the 5 MHz frequency band in Comparative Example 2 does not occur in Example 1 and Comparative Example 3.
[0035] 7 is a diagram showing the relationship between frequency and power impedance in the circuit boards of Example 1, Comparative Example 2, and Comparative Example 3. The power impedance in Example 1, Comparative Example 2, and Comparative Example 3 was measured at power terminal 106 and ground terminal 107 of semiconductor device 103 as observation points.
[0036] 7, it can be seen that the increase in power supply impedance due to parallel resonance occurring in the 5 MHz frequency band in Comparative Example 2 does not occur in Example 1 and Comparative Example 3. Furthermore, it can be seen that in the frequency band of 100 MHz or higher, the power supply impedance of Example 1 is reduced compared to Comparative Example 3. The impedance in this band is dominated by the ESL (equivalent series inductance) inside the capacitor and the parasitic inductance of the power supply ground wiring.
[0037] In addition, the smaller the component, the smaller the ESL tends to be, and the impedance can be reduced by placing the capacitor closer to the power supply ground terminal of the semiconductor device. Therefore, in the frequency band of 100 MHz or more, Example 1 can reduce the power supply impedance more than Comparative Example 3.
[0038] In the 1 MHz and 10 MHz bands, there are some parts where the power supply impedance of Example 1 is larger than that of Comparative Example 3. However, this does not pose a practical problem. The reason is that if the power supply impedance is reduced to a certain extent, it is possible to suppress the risk of malfunction of the semiconductor device 103, and there is no substantial difference even if it is reduced excessively.
[0039] Furthermore, compared to Comparative Examples 1 to 3, Example 1 can reduce the area occupied by the capacitors on the main surface of printed wiring board 100. The freed up space can be used for other wiring, or printed wiring board 100 can be made smaller.
[0040] As described above, circuit board 1000 according to this embodiment makes it possible to reduce the size of a printed wiring board while reducing the power supply impedance.
[0041] [Second embodiment] The circuit board according to the second embodiment will be described below. The circuit board according to this embodiment differs from the circuit board according to the first embodiment in that the internal electrode surfaces of the capacitors are arranged to intersect with the main surface (mounting surface) of the printed wiring board on which the capacitors are mounted.
[0042] Fig. 8 is a diagram showing a circuit board 2000 according to the second embodiment. In Fig. 8, the circuit board 2000 includes a printed wiring board 200, a first capacitor 201 arranged on a main surface of the printed wiring board 200, and a second capacitor 202 stacked on the first capacitor 201.
[0043] A power supply terminal of the semiconductor device (not shown) is connected to power supply wiring 204 formed on the main surface of printed wiring board 200. A ground terminal of the semiconductor device is connected to ground wiring 205 formed on the main surface of printed wiring board 200. Power supply wiring 204 is connected to power supply terminal 201V of first capacitor 201. Ground wiring 205 is connected to ground terminal 201G of first capacitor 201.
[0044] The first capacitor 201 and the second capacitor 202 are multilayer ceramic capacitors. The first capacitor 201 has a smaller capacitance than the second capacitor 202. The first capacitor 201 and the second capacitor 202 each have a structure in which a desired capacitance is achieved by laminating a plurality of thin-film electrodes 201P and a plurality of thin-film electrodes 202P therein.
[0045] In the printed wiring board 200 of the second embodiment, the first capacitor 201 and the second capacitor 202 are arranged such that the internal electrode surfaces of the thin-film electrodes 201P and 202P are oriented perpendicular to the main surface of the printed wiring board 200. In this manner, the internal electrode surfaces of the first capacitor 201 and the second capacitor 202 are arranged to intersect with the mounting surface of the printed wiring board 200. In addition, the internal electrode surface of the first capacitor 201 is arranged along the internal electrode surface of the second capacitor 202.
[0046] Fig. 9 is a perspective view showing a circuit board 2001 according to a fourth comparative example to the circuit board 2000 shown in Fig. 8. In the circuit board 2001 of the fourth comparative example, the first capacitor 201 and the second capacitor 202 are arranged so that the surfaces of the thin-film electrode 201P and the thin-film electrode 202P are parallel to the main surface of the printed wiring board 200. In this manner, the internal electrode surfaces of the first capacitor 201 and the second capacitor 202 are arranged along the mounting surface of the printed wiring board 200.
[0047] 10 is a diagram showing the relationship between frequency and power supply impedance in Example 2 using the circuit board 2000 of this embodiment and the above-mentioned Comparative Example 4. In Example 2 and Comparative Example 4, a multilayer ceramic capacitor of a first size (1 mm×0.5 mm) having a capacitance of 0.15 μF was used as the first capacitor 201. A multilayer ceramic capacitor of a second size (1.6 mm×0.8 mm) having a capacitance of 3.9 μF was used as the second capacitor 202.
[0048] 10, it can be seen that Example 2 has a lower impedance than Comparative Example 4 across the entire frequency band. This difference is considered to be due to the tendency of high-frequency current to concentrate on the surface or end of a conductor. In Comparative Example 4, the edges of thin-film electrode 201P and thin-film electrode 202P inside the multilayer ceramic capacitor are more likely to be present in positions closer to the main surface of printed wiring board 200 than in Example 2. Therefore, in Example 2, the electromagnetic coupling generated between thin-film electrode 201P, thin-film electrode 202P and the conductor layer of terminals (power supply terminal and ground terminal) (not shown) inside printed wiring board 200 is stronger than in Comparative Example 4, resulting in a lower impedance.
[0049] As described above, circuit board 2000 according to this embodiment makes it possible to reduce the size of a printed wiring board while reducing the power supply impedance.
[0050] [Third embodiment] The circuit board according to the third embodiment will be described below. The circuit board according to this embodiment differs from the circuit boards according to the first and second embodiments in that a semiconductor device is mounted on a surface (opposing surface) opposite to one main surface of a printed wiring board on which a capacitor is mounted.
[0051] Fig. 11 is a perspective view showing a circuit board 3000 according to the third embodiment. In Fig. 11, the circuit board 3000 includes a printed wiring board 300, a first capacitor 301, and a second capacitor 302. The first capacitor 301 is disposed on a main surface of the printed wiring board 300. The second capacitor 302 is layered on the first capacitor 301.
[0052] The semiconductor device 303 is disposed on a surface (second mounting surface) opposite to the surface (first mounting surface) of the printed wiring board 300 on which the first capacitor 301 is mounted. The first capacitor 301 and the second capacitor 302 are disposed at positions overlapping the semiconductor device 303 in a direction perpendicular to the first mounting surface. The semiconductor device 303 has a power supply terminal 306 and a ground terminal 307. The power supply terminal 306 is disposed between the semiconductor device 303 and the printed wiring board 300, and is connected to a power supply wiring 304 formed on the main surface of the printed wiring board 300. Similarly, the ground terminal 307 is disposed between the semiconductor device 303 and the printed wiring board 300, and is connected to a ground wiring 305 formed on the main surface of the printed wiring board 300.
[0053] 12 is a side view of circuit board 3000 of the third embodiment, seen from the longitudinal side of first capacitor 301 and second capacitor 302. First capacitor 301 has power terminal 301V and ground terminal 301G. Second capacitor 302 has power terminal 302V and ground terminal 302G.
[0054] The power supply wiring 304 is connected to a power supply terminal 301V of the first capacitor 301 through a power supply via 310. Similarly, the ground wiring 305 is connected to a ground terminal 301G of the first capacitor 301 through a ground via 311. The first capacitor 301 has a smaller capacitance than the second capacitor 302.
[0055] The first fillet 308 and the second fillet 309 are fillets made of solder. The first fillet 308 connects the power terminal 301V of the first capacitor 301 to the power terminal 302V of the second capacitor 302. The first fillet 308 also connects the ground terminal 301G of the first capacitor 301 to the ground terminal 302G of the second capacitor 302.
[0056] Similarly, the second fillet 309 connects the power supply terminal 301V of the first capacitor 301 to the power supply wiring 304. The second fillet 309 also connects the ground terminal 301G of the first capacitor 301 to the ground wiring 305.
[0057] The power supply wiring 304 is connected to the semiconductor device 303 through a power supply via 310 and a power supply terminal 306. The ground wiring 305 is connected to the semiconductor device 303 through a ground via 311 and a ground terminal 307.
[0058] The above configuration makes it possible to reduce the power impedance and miniaturize the printed wiring board even for semiconductor devices such as BGA packages that have connection terminals on the back side.
[0059] [Fourth embodiment] A circuit board according to a fourth embodiment will be described below. The circuit board according to this embodiment differs from the circuit boards according to the first to third embodiments in that it has a structure in which N capacitors (N is a natural number equal to or greater than 3) are stacked on a printed wiring board.
[0060] In this embodiment, an example will be described in which three capacitors are stacked on the main surface of a printed wiring board in the order of a first capacitor, a second capacitor, and a third capacitor. However, the number of stacked capacitors is not limited to three. The capacitance and size of the capacitors may vary widely.
[0061] In this embodiment, the first capacitor is the capacitor that has the smallest component size and capacitance and is located closest to the main surface of the printed wiring board. The second capacitor is a capacitor provided between the first capacitor and the third capacitor. The third capacitor is stacked on top of the second capacitor and is the capacitor located farthest from the main surface of the printed wiring board. The capacitance of the third capacitor is equal to or greater than the capacitance of the second capacitor.
[0062] In this embodiment, the second capacitor and the third capacitor satisfy the following conditions (A) and (B). (A) The capacitance of the third capacitor is equal to or greater than the capacitance of the second capacitor that is closer to the main surface of the printed wiring board than the third capacitor, i.e., the capacitance of the third capacitor is equal to or greater than the capacitance of the second capacitor that constitutes the lower layer. (B) The component size of the third capacitor is equal to or larger than the size of the second capacitor that is closer than the third capacitor to the main surface of printed wiring board 400. In other words, the component size of the third capacitor is equal to or larger than the size of the second capacitor that constitutes the lower layer.
[0063] Note that when four or more capacitors are stacked on top of each other on the main surface of a printed wiring board, two adjacent capacitors shall similarly satisfy the above conditions (A) and (B). In other words, when N capacitors are stacked, the capacitance of the capacitor constituting the xth (x is a natural number between 2 and N)th layer from the main surface of the printed wiring board shall be equal to or greater than the capacitance of the capacitor constituting the layer one layer below, i.e., the (x-1)th layer. In addition, the component size of the capacitor constituting the xth layer shall be equal to or greater than the size of the capacitor constituting the (x-1)th layer.
[0064] However, when N capacitors are stacked, the capacitance and component size of the capacitor located on the top layer shall be greater than the capacitance and component size of the capacitor located on the bottom layer.
[0065] 13 to 15 are side views showing examples (1) to (3) of arrangements of a plurality of capacitors on a circuit board according to the fourth embodiment, respectively, in which a stacked structure of three capacitors is shown.
[0066] FIG. 13 shows a case where three capacitors of different sizes are stacked. In FIG. 13, circuit board 4000 includes printed wiring board 400, capacitor 401 (first capacitor), capacitor 412 (second capacitor) arranged on capacitor 401, and capacitor 402 (third capacitor) arranged on capacitor 412. That is, three capacitors are stacked from a position close to the main surface of printed wiring board 400 in order of the smallest component size of the capacitors (capacitor 401, capacitor 412, capacitor 402). Fillet 413 is a fillet composed of solder. Fillet 413 connects power terminal 402V of capacitor 402 and power terminal 412V of capacitor 412. Fillet 413 also connects ground terminal 402G of capacitor 402 and ground terminal 412G of capacitor 412.
[0067] FIG. 14 shows a case where one small capacitor and two large capacitors are stacked. In FIG. 14, circuit board 4001 includes printed wiring board 400, capacitor 401 (first capacitor) arranged on the main surface of printed wiring board 400, capacitor 412 (second capacitor) arranged on capacitor 401, and capacitor 414 (third capacitor) arranged on capacitor 412. That is, the capacitor with the smallest component size (capacitor 401) is arranged on the bottom layer, and two capacitors of the same size (capacitor 412, capacitor 414) are stacked on top of it. Fillet 415 is a fillet made of solder. Fillet 415 connects power terminal 412V of capacitor 412 and power terminal 414V of capacitor 414. Fillet 415 also connects ground terminal 412G of capacitor 412 and ground terminal 414G of capacitor 414.
[0068] Fig. 15 shows a case where two small capacitors and one large capacitor are stacked. In Fig. 15, circuit board 4002 includes printed wiring board 400, capacitor 401 (first capacitor) arranged on the main surface of printed wiring board 400, capacitor 416 (second capacitor) arranged on capacitor 401, and capacitor 414 (third capacitor) arranged on capacitor 416. That is, capacitor 401 and capacitor 416 are the two capacitors with the smallest component sizes, and of the two, capacitor 401 is placed on the bottom layer, and capacitor 416 of the same size is placed above it. Then, capacitor 414, which has the largest component size, is placed on the top layer.
[0069] In addition, although the variations in the component sizes of the three capacitors have been described with reference to FIGS. 13 to 15, the "component size" may be read as "capacitance."
[0070] As described above, in the circuit board according to the fourth embodiment, capacitors with smaller capacitance or smaller component size are preferentially arranged closer to the main surface of printed wiring board 400. With this configuration, even when three or more capacitors are used, it is possible to reduce the power supply impedance and miniaturize the printed wiring board.
[0071] [Fifth embodiment] A circuit board according to the fifth embodiment will be described below. Fig. 16 is a diagram for explaining a method for manufacturing a circuit board according to the fifth embodiment. Here, the circuit board is manufactured in the order of Fig. 16 and Fig. 17. In Fig. 16, a first capacitor 501 has a power terminal 501V and a ground terminal 501G. A second capacitor 502 has a power terminal 502V and a ground terminal 502G.
[0072] First, first capacitor 501 is placed on top and second capacitor 502 is placed on the bottom, and the terminals of first capacitor 501 are connected to the terminals of second capacitor 502. Next, a first fillet 508 made of solder is used to connect power supply terminal 501V of first capacitor 501 to power supply terminal 502V of second capacitor 502, and also to connect ground terminal 501G of first capacitor 501 to ground terminal 502G of second capacitor 502.
[0073] 17, the joint parts of the two capacitors manufactured in FIG. 16 are turned upside down and mounted on the main surface of the printed wiring board 500. With the second capacitor 502 connected to one end surface of the first capacitor 501, the other end surface of the first capacitor 501 is placed on the main surface of the printed wiring board 500. That is, the first capacitor 501 to which the second capacitor 502 is connected is placed on the printed wiring board 500 so that the first capacitor 501 is located between the second capacitor 502 and the printed wiring board 500.
[0074] At this time, the printed wiring board 500 is arranged so that a power supply terminal 501V of the first capacitor 501 is connected to a power supply wiring 504 formed on the main surface of the printed wiring board 500, and a ground terminal 501G of the first capacitor 501 is connected to a ground wiring 505.
[0075] Then, a second fillet 509 made of solder is used to connect a power supply terminal 501V of the first capacitor 501 to the power supply wiring 504 and also to connect a ground terminal 501G of the first capacitor 501 to the ground wiring 505.
[0076] The melting point of the solder forming second fillet 509 is preferably lower than that of the solder forming first fillet 508. Due to the difference in melting points between the two types of solder, for example, when forming second fillet 509, it is possible to prevent the solder of first fillet 508 already formed from melting, which would cause second capacitor 502 to come off first capacitor 501.
[0077] The circuit board according to the present embodiment can be mounted on an electronic device. An electronic device equipped with the circuit board is, for example, a digital camera, but is not limited thereto. For example, the electronic device equipped with the circuit board may be an information device such as a smartphone or a personal computer, or a communication device such as a modem or a router. Alternatively, the circuit board may be an office machine or a printing machine such as a printer, a copier, or a scanner, a medical device such as an X-ray device or an endoscope, an industrial device such as a robot or a semiconductor manufacturing device, or a transportation device such as a vehicle, an airplane, or a ship. When the circuit board is provided in a limited space inside the housing of the circuit board, it is possible to improve the noise resistance and thus improve the reliability of the electronic device.
[0078] In addition to the circuit board, an electronic device may include various electric devices connected to the circuit board, such as electro-optical devices such as image sensors and displays, storage devices such as memories, computing devices such as processors, communication devices for wireless or wired communication, electromechanical devices such as motors, and power supplies.
[0079] [Modified embodiment] The present disclosure is not limited to the above-described embodiments and may be modified in various ways. For example, an example in which a part of the configuration of any of the embodiments is added to another embodiment or an example in which a part of the configuration of any of the embodiments is replaced with another embodiment is also an embodiment of the present disclosure.
[0080] It should be noted that the above-mentioned embodiments are merely examples of the embodiment of the present disclosure, and the technical scope of the present disclosure should not be interpreted as being limited by these. That is, the present disclosure can be implemented in various forms without departing from its technical idea or its main features. For example, a plurality of embodiments can be combined. In addition, some items of at least one embodiment can be deleted or replaced. In addition, new items can be added to at least one embodiment. The disclosure of this specification includes not only what is explicitly described in this specification, but also all items that can be understood from this specification and the drawings attached to this specification. For example, any combination of each described item is also the disclosure of this specification. For example, if there is a description that "A is B or more" and a description that "C is D or less", the form "A is B or more and C is D or less" is the disclosure of this specification. In this specification, "A is B or more" (A is any element, B is any index) means "A is equal to B or A is greater than B". "C is less than or equal to D" (C is any element, D is any index) means "C is equal to D, or C is less than D (less than C)." Furthermore, the disclosure of this specification includes the complement of the individual concepts described in this specification. In other words, if this specification contains a statement that "E is F" (E and F are any items), for example, this specification can be said to disclose the case where "E is not F" even if the statement of the case where "E is not F" is omitted. This is because when it is stated that "E is F," it is assumed that the case where "E is not F" is taken into consideration.
[0081] The disclosure of this embodiment includes the following configurations and methods. (Configuration 1) A wiring board; a first capacitor and a second capacitor stacked on the wiring board; Equipped with the first capacitor is provided between the second capacitor and the wiring board; The capacitance of the second capacitor is greater than the capacitance of the first capacitor. 1. A circuit board comprising: (Configuration 2) A semiconductor device is mounted on the wiring board, The wiring board includes: a first power supply wiring connected to a first terminal of the semiconductor device; a second power supply wiring connected to a second terminal of the semiconductor device; the first capacitor has a first terminal and a second terminal; the first terminal of the first capacitor is connected to the first power supply wiring, and the second terminal of the first capacitor is connected to the second power supply wiring; 2. The circuit board according to claim 1. (Configuration 3) the first capacitor and the second capacitor are disposed within 50 mm of the semiconductor device; 3. The circuit board according to configuration 2. (Configuration 4) The size of the second capacitor is larger than the size of the first capacitor. 2. The circuit board according to claim 1. (Configuration 5) the semiconductor device is mounted on a mounting surface on which the first capacitor is mounted, 4. The circuit board according to configuration 3. (Configuration 6) the first capacitor and the second capacitor have a first terminal and a second terminal, respectively; the first terminal of the first capacitor is connected to the first terminal of the second capacitor, and the second terminal of the second capacitor is connected to the second terminal of the second capacitor. 2. The circuit board according to claim 1. (Configuration 7) the first terminal of the first capacitor is connected to a first power supply wiring of the wiring board, and the second terminal of the first capacitor is connected to a second power supply wiring of the wiring board; 7. The circuit board of configuration 6. (Configuration 8) the first capacitor and the second capacitor are multilayer ceramic capacitors, the internal electrode surfaces of the first capacitor and the second capacitor are disposed so as to intersect with the mounting surface of the wiring board; 2. The circuit board according to claim 1. (Configuration 9) The internal electrode surface of the first capacitor is disposed along the internal electrode surface of the second capacitor. 9. The circuit board of configuration 8. (Configuration 10) the first capacitor and the second capacitor are multilayer ceramic capacitors, an internal electrode surface of each of the first capacitor and the second capacitor is disposed along a mounting surface of the wiring board; 2. The circuit board according to claim 1. (Configuration 11) the first capacitor is electrically connected to the second capacitor by a first solder; The melting point of the first solder is higher than the melting point of the second solder that electrically connects the first capacitor and the wiring of the wiring board. 2. The circuit board according to claim 1. (Configuration 12) A third capacitor is provided. the second capacitor is disposed between the first capacitor and the third capacitor; 2. The circuit board according to claim 1. (Configuration 13) The capacitance of the third capacitor is equal to or greater than the capacitance of the second capacitor. 13. The circuit board of configuration 12. (Configuration 14) the semiconductor device is mounted on a second mounting surface of the wiring board opposite to a first mounting surface on which the first capacitor is mounted, 3. The circuit board according to configuration 2. (Configuration 15) The size of the third capacitor is equal to or larger than the size of the second capacitor. 13. The circuit board of configuration 12. (Configuration 16) the first capacitor and the second capacitor are disposed at positions overlapping the semiconductor device in a direction perpendicular to a first mounting surface; 3. The circuit board according to configuration 2. (Configuration 17) the centers of gravity of the first capacitor and the second capacitor are aligned on a straight line in a stacking direction of the first capacitor and the second capacitor; 2. The circuit board according to claim 1. (Configuration 18) A circuit board according to configuration 1; an electrical device connected to the circuit board; An electronic device comprising: (Method 19) stacking a first capacitor having a first capacitance and a second capacitor having a second capacitance smaller than the first capacitance; electrically connecting the stacked first capacitor and the stacked second capacitor using a first solder; placing the first capacitor, to which the second capacitor is connected, on the wiring board such that the first capacitor is located between the second capacitor and the wiring board; electrically connecting the first capacitor and the wiring board using a second solder; A method for manufacturing a circuit board comprising: (Method 20) The melting point of the first solder is higher than the melting point of the connecting second solder. 20. The method of claim 19, further comprising: (Method 21) stacking a third capacitor on the second capacitor such that the second capacitor is located between the first capacitor and the third capacitor; 20. The method of claim 19, further comprising: (Method 22) a third capacitance of the third capacitor is greater than or equal to the second capacitance of the second capacitor; 22. The method of claim 21, further comprising the steps of: [Explanation of symbols]
[0082] 100, 200, 300, 400, 500, 600... Printed wiring boards 101, 201, 301, 501, 601...First capacitor 102, 202, 302, 502, 602...Second capacitor 103, 303, 603... Semiconductor device 104, 204, 304, 404, 504, 604...Power wiring 105, 205, 305, 405, 505, 605... Ground wiring 106, 206, 306, 406, 506, 606...Power terminal 107, 207, 307, 407, 507, 607 Ground terminal 108, 308, 408, 508...First fillet 109, 309, 409, 509...Second fillet 413, 415...Fillet 310... Power supply via 311 Ground Via 401, 402, 412, 414, 416... Capacitors 1000, 1001, 1002, 1003, 2000, 2001, 3000, 4000, 4001, 4002...Circuit board
Claims
1. Wiring board and A first capacitor and a second capacitor are stacked on top of the aforementioned wiring board, A semiconductor device mounted on the aforementioned wiring board, Equipped with, The first capacitor is provided between the second capacitor and the wiring board. The capacitance of the second capacitor is greater than the capacitance of the first capacitor. A circuit board characterized by the following features.
2. The wiring board is A first power supply wiring connected to the first terminal of the semiconductor device, The semiconductor device has a second power supply wiring connected to the second terminal, The first capacitor has a first terminal and a second terminal, The first terminal of the first capacitor is connected to the first power supply wiring, and the second terminal of the first capacitor is connected to the second power supply wiring. The circuit board according to claim 1.
3. The first capacitor and the second capacitor are arranged within 50 mm of the semiconductor device. The circuit board according to claim 1.
4. A wiring board and A first capacitor and a second capacitor are stacked on top of the aforementioned wiring board, Equipped with, The first capacitor is provided between the second capacitor and the wiring board. The capacitance of the second capacitor is greater than the capacitance of the first capacitor. The size of the second capacitor in the direction along the mounting surface of the wiring board is larger than the size of the first capacitor. A circuit board characterized by the following features.
5. The size of the first capacitor is the size in the direction in which the two terminals of the first capacitor are aligned on the mounting surface, and the size of the second capacitor is the size in the direction in which the two terminals of the second capacitor are aligned on the mounting surface. The circuit board according to feature 4.
6. The semiconductor device is mounted on the mounting surface on which the first capacitor is mounted. The circuit board according to claim 1.
7. The first capacitor and the second capacitor each have a first terminal and a second terminal, The first terminal of the first capacitor is connected to the first terminal of the second capacitor, and the second terminal of the second capacitor is connected to the second terminal of the second capacitor. The circuit board according to feature 1 or 4.
8. The first terminal of the first capacitor is connected to the first power supply wiring of the wiring board, and the second terminal of the first capacitor is connected to the second power supply wiring of the wiring board. The circuit board according to feature 7.
9. The first capacitor and the second capacitor are multilayer ceramic capacitors. The internal electrode surfaces of the first capacitor and the second capacitor are arranged to intersect with the mounting surface of the wiring board, respectively. The circuit board according to feature 1 or 4.
10. The internal electrode surface of the first capacitor is arranged along the internal electrode surface of the second capacitor. The circuit board according to feature 9.
11. The first capacitor and the second capacitor are multilayer ceramic capacitors. The internal electrode surfaces of the first capacitor and the second capacitor are arranged along the mounting surface of the wiring board. The circuit board according to feature 1 or 4.
12. The first capacitor is electrically connected to the second capacitor by a first solder joint. The melting point of the first solder is higher than the melting point of the second solder that electrically connects the first capacitor and the wiring of the wiring board. The circuit board according to feature 1 or 4.
13. It is equipped with a third capacitor, The second capacitor is provided between the first capacitor and the third capacitor. The circuit board according to feature 1 or 4.
14. The capacitance of the third capacitor is greater than or equal to the capacitance of the second capacitor. The circuit board according to claim 13, characterized in that it is a circuit board.
15. The semiconductor device is mounted on the second mounting surface of the wiring board, which is opposite to the first mounting surface on which the first capacitor is mounted. The circuit board according to claim 1.
16. The size of the third capacitor is greater than or equal to the size of the second capacitor. The circuit board according to claim 13, characterized in that it is a circuit board.
17. The first capacitor and the second capacitor are positioned so as to overlap the semiconductor device in a direction perpendicular to the first mounting surface on which the first capacitor is mounted. The circuit board according to claim 1.
18. The centers of gravity of the first capacitor and the second capacitor are located on a straight line in the stacking direction of the first capacitor and the second capacitor. The circuit board according to feature 1 or 4.
19. A circuit board according to claim 1 or 4, An electrical device connected to the circuit board, Electronic devices equipped with these features.
20. The steps include stacking a first capacitor having a first capacitance and a second capacitor having a second capacitance smaller than the first capacitance, The steps include electrically connecting the stacked first capacitor and the second capacitor using a first solder, The steps include: placing the first capacitor, to which the second capacitor is connected, on the wiring board such that the first capacitor is positioned between the second capacitor and the wiring board; The steps include electrically connecting the first capacitor and the wiring board using the second solder, A method for manufacturing a circuit board, characterized by comprising the following features.
21. The melting point of the first solder is higher than the melting point of the second solder used for the connection. The method for manufacturing a circuit board according to claim 20, characterized in that it is a method for manufacturing a circuit board.
22. The third capacitor is stacked on the second capacitor such that the second capacitor is located between the first capacitor and the third capacitor. A method for manufacturing a circuit board according to claim 20 or 21, characterized by the above.
23. The third capacitance of the third capacitor is greater than or equal to the second capacitance of the second capacitor. The method for manufacturing a circuit board according to claim 22.