Radiation imaging device, control method thereof, and radiation imaging system
The radiation imaging device addresses noise reduction inefficiencies by alternately reading out offset and radiation signals with different time periods, enhancing image quality and frame rate through precise noise reduction techniques.
Patent Information
- Application Number
- JP2023097247
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-06-13
- Publication Date
- 2024-12-25
- Estimated Expiration
- 2043-06-13
AI Technical Summary
Existing radiation imaging techniques struggle to accurately reduce noise in radiographic images due to discrepancies in the temporal relationship between the acquisition of offset data and the radiographic image, leading to inefficiencies in noise reduction.
A radiation imaging device that alternately performs readout operations for offset and radiation signals using different time periods, including preparation and imaging phases, to generate accurate radiation images by correcting signals with offset images.
This approach effectively reduces noise in radiation images with high precision by aligning the states of capacitive coupling and leakage currents within the pixel array, improving image quality and frame rate.
Smart Images

Figure 2024178818000001_ABST
Abstract
Description
[Technical field]
[0001] The present invention relates to a radiation imaging apparatus, a control method thereof, and a radiation imaging system. [Background technology]
[0002] Radiation imaging devices have been put to practical use as imaging devices used in medical image diagnosis and non-destructive testing. Radiation images generated by radiation imaging devices contain noise due to dark current flowing through photodiodes, residual images due to previous radiation exposure, and the like. In order to reduce such noise, the radiation images are corrected using offset images acquired in a state where the radiation imaging device is not irradiated with radiation. Patent Document 1 describes a technique for correcting radiation images using primary offset data and reference secondary offset data acquired before the start of imaging, and immediately preceding secondary offset data acquired after the start of imaging, in order to achieve high frame rate and low residual image. The immediately preceding secondary offset data is acquired with an exposure time shorter than that of the radiation image. The primary offset data is acquired with the same exposure time as the radiation image. The reference secondary offset data is acquired with the same exposure time as the immediately preceding secondary offset data. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] JP 2014-168602 A Summary of the Invention [Problem to be solved by the invention]
[0004] In the technology described in Patent Document 1, the time relationship between the acquisition of the primary offset data and the acquisition of the reference secondary offset data is different from the time relationship between the acquisition of the immediately preceding secondary offset data and the acquisition of the radiographic image. Therefore, it is difficult to accurately reduce noise in the radiographic image. An object of some aspects of the present invention is to provide a technology for accurately reducing noise in the radiographic image. [Means for solving the problem]
[0005] According to some embodiments, a radiation imaging apparatus includes a plurality of pixels arranged to form a plurality of pixel rows and a plurality of pixel columns, the plurality of pixels generating and accumulating electric charges; a drive circuit supplying a drive signal for selecting any one of the plurality of pixels to the plurality of pixels; a readout circuit reading out a signal based on the electric charges accumulated in the pixel selected by the drive signal; a control circuit for controlling the readout circuit and the drive circuit; and an image generating circuit for generating a radiation image, wherein the control circuit performs, for at least a first pixel of the plurality of pixels, a first readout operation for reading out a first offset signal based on the electric charges accumulated in the first pixel for a first length of time during preparation for imaging, and a second offset signal based on the electric charges accumulated in the first pixel for a second length of time shorter than the first length of time. and a second readout operation that reads out an offset signal, and after preparation for imaging is completed, the readout circuit and the drive circuit are controlled to alternately perform a third readout operation that reads out a radiation signal based on charges accumulated in the first pixels for a third time length that includes a period during which the radiation imaging device is irradiated with radiation, and a fourth readout operation that reads out a third offset signal based on charges accumulated in the first pixels for a fourth time length that does not include the period during which the radiation imaging device is irradiated with radiation and is shorter than the third time length, and the image generation circuit generates the radiation image based on correcting the radiation signal using the first offset signal, the second offset signal, and the third offset signal. Effect of the Invention
[0006] According to the above embodiment, noise in a radiological image can be reduced with high accuracy. [Brief description of the drawings]
[0007] [Figure 1] FIG. 1 is a block diagram illustrating an example of the arrangement of a radiation imaging system according to some embodiments. [Diagram 2] FIG. 2 is an equivalent circuit diagram illustrating an example of the configuration of a radiation detection panel according to some embodiments. [Diagram 3] 3A and 3B are schematic diagrams illustrating examples of the structure of pixels according to some embodiments. [Figure 4] 5A to 5C are diagrams for explaining an example of the operation of the radiation imaging system according to some embodiments. [Diagram 5] 5A to 5C are diagrams for explaining an example of the operation of the radiation imaging system according to some embodiments. [Figure 6] 5A to 5C are diagrams for explaining an example of the operation of the radiation imaging system according to some embodiments. [Figure 7] 5A to 5C are diagrams for explaining an example of the operation of the radiation imaging system according to some embodiments. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0008] Hereinafter, the embodiments will be described in detail with reference to the attached drawings. Note that the following embodiments do not limit the invention according to the claims. Although the embodiments describe a number of features, not all of these features are essential to the invention, and the features may be combined in any manner. Furthermore, in the attached drawings, the same reference numbers are used for the same or similar configurations, and duplicated descriptions are omitted.
[0009] 1 shows an example of the configuration of a radiation imaging system 100 according to some embodiments. The radiation imaging system 100 is configured to generate an electrical radiation image by electrically capturing an optical image formed by radiation. The radiation is typically X-rays, but may be α rays, β rays, γ rays, etc. The radiation imaging system 100 includes, for example, a radiation imaging device 110, a computer 120, a display 114, an exposure control device 130, and a radiation generation device 140.
[0010] The radiation generating device 140 starts emitting radiation 160 in accordance with an exposure command (radiation command) from the exposure control device 130. The radiation 160 irradiated from the radiation generating device 140 passes through the subject 150 and enters the radiation imaging device 110. The radiation generating device 140 also stops emitting the radiation 160 in accordance with a stop command from the exposure control device 130.
[0011] The radiation imaging device 110 includes a radiation detection panel 111, a control circuit 112, and an image generation circuit 113. The radiation detection panel 111 generates a radiation image according to radiation 160 incident on the radiation imaging device 110, and transmits the generated radiation image to the computer 120. The control circuit 112 controls the operation of the radiation detection panel 111. For example, the control circuit 112 generates a stop signal for stopping the irradiation of radiation 160 from the radiation generation device 140 based on an image signal obtained from the radiation detection panel 111. The stop signal is supplied to the exposure control device 130. In response to the stop signal, the exposure control device 130 sends a stop command to the radiation generation device 140.
[0012] The control circuit 112 may be configured with a dedicated circuit such as a PLD (Programmable Logic Device) such as an FPGA (Field Programmable Gate Array) or an ASIC (Application Specific Integrated Circuit). Alternatively, the control circuit 112 may be configured with a combination of a general-purpose processing circuit such as a processor and a storage circuit such as a memory. In this case, the function of the control circuit 112 may be realized by the general-purpose processing circuit executing a program stored in the storage circuit.
[0013] The image generating circuit 113 stores the signal supplied from the radiation detection panel 111 in a memory, and generates a radiographic image based on the signal. The method of generating a radiographic image will be described in detail later. The image generating circuit 113 transmits the generated radiographic image to the computer 120.
[0014] The computer 120 has a control unit that controls the radiation imaging apparatus 110 and the exposure control device 130, a receiving unit that receives a radiation image from the radiation imaging apparatus 110, and a signal processing unit that processes the radiation image obtained by the radiation imaging apparatus 110. The control unit, the receiving unit, and the signal processing unit may each be configured by a dedicated circuit, as with the control circuit 112, or may be configured by a combination of a general-purpose processing circuit and a storage circuit. In one example, the exposure control device 130 has an exposure switch, and when the exposure switch is turned on by a user, the exposure control device 130 sends an exposure command to the radiation generation device 140 and sends a start notification indicating the start of radiation irradiation to the computer 120. In response to the start notification, the computer 120 notifies the control circuit 112 of the radiation imaging apparatus 110 of the start of radiation irradiation. When the exposure control device 130 and the computer 120 are not synchronously connected, the radiation detection panel 111 may detect the start of irradiation of radiation 160 based on pixel signals.
[0015] FIG. 2 shows a configuration example of the radiation detection panel 111. The radiation detection panel 111 includes, for example, a pixel array 200, a drive circuit 210, a readout circuit 220, a buffer circuit 230, and an analog-digital (AD) converter 240. The drive circuit 210 and the readout circuit 220 function as peripheral circuits of the pixel array 200. The pixel array 200 includes, for example, a plurality of pixels P, a plurality of drive lines Vg1 to Vgm, a plurality of signal lines Sig1 to Sign, and a bias line Bs. The drive lines Vg1 to Vgm and the signal lines Sig1 to Sign are collectively referred to as the drive line Vg and the signal line Sig, respectively. The plurality of pixels P are arranged to form a plurality of pixel rows and a plurality of pixel columns. The pixel row refers to a set of a plurality of pixels arranged in the horizontal direction in FIG. 2. The pixel column refers to a set of a plurality of pixels arranged in the vertical direction in FIG. 2. In one example, the radiation detection panel 111 has a dimension of 17 inches and the pixel array 200 has approximately 3000 pixel rows and approximately 3000 pixel columns.
[0016] The pixel rows of the pixel array 200 are referred to as the 1st row to the mth row (m is an integer equal to or greater than 1) from the top of the drawing, and the pixel columns of the pixel array 200 are referred to as the 1st column to the nth column (n is an integer equal to or greater than 1) from the left of the drawing. Each pixel P is composed of a combination of one conversion element C and one switch element S. The pixel P located in the i-th row and j-th column of the pixel array 200 is represented as pixel P(i,j). The conversion element C and switch element S included in pixel P(i,j) are represented as conversion element C(i,j) and switch element S(i,j), respectively. For example, pixel P(1,2) represents pixel P located in the first row and second column.
[0017] The conversion element C generates an electric charge in response to radiation incident on the pixel P and accumulates this electric charge. The conversion element C can accumulate not only an electric charge in response to radiation, but also an electric charge generated by dark current. The generation and accumulation of an electric charge by the conversion element C of the pixel P is expressed as the pixel P generating and accumulating an electric charge.
[0018] The switch element S is connected between the conversion element C and the signal line Sig corresponding to the conversion element C. For example, the switch elements S(1,1) to S(m,1) are connected between the multiple conversion elements C(1,1) to C(m,1) and the signal line Sig1, respectively. When the switch element S is turned on, the conversion element C and the signal line Sig are in a conductive state, and the charge obtained in the conversion element C (for example, the charge accumulated in the conversion element C) is transferred to the signal line Sig. The conversion element C may be, for example, an MIS type photodiode arranged on an insulating substrate such as a glass substrate and made mainly of amorphous silicon. Alternatively, the conversion element C may be a PIN type photodiode. The conversion element C may be configured as a direct type that directly converts radiation into charges, or as an indirect type that converts radiation into light and then detects the light. In the indirect type, the scintillator may be shared by multiple pixels P.
[0019] The switch element S is composed of a transistor such as a thin film transistor (TFT) having a control terminal (gate) and two main terminals (source, drain). The conversion element C has two main electrodes. One main electrode of the conversion element C is connected to one of the two main terminals of the switch element S, and the other main electrode of the conversion element is connected to a bias power supply Vs via a common bias line Bs. The bias power supply Vs generates a bias voltage.
[0020] The control terminal of the switch element S of the pixel P in the first row is connected to the drive line Vg1. The control terminal of the switch element S of the pixel P in the second row is connected to the drive line Vg2. The same is true for the third to mth rows.
[0021] The drive circuit 210 supplies a drive signal to a control terminal of the switch element S of each pixel P through a drive line Vg in accordance with the drive signal supplied from the control circuit 112. The drive signal includes an ON signal (high-level voltage in the following description) for turning on the switch element S, and an OFF signal (low-level voltage in the following description) for turning off the switch element S. The drive circuit 210 includes, for example, a shift register, and this shift register performs a shift operation in accordance with a control signal (for example, a clock signal) supplied from the control circuit 112.
[0022] Supplying an on signal (i.e., a high-level drive signal) to a pixel P is referred to as selecting a pixel P. That is, the drive signal is a signal for selecting one of the multiple pixels P. The same drive signal is supplied to multiple pixels included in the same pixel row. Selection of multiple pixels included in one pixel row is referred to as selecting that pixel row.
[0023] The readout circuit 220 amplifies and reads out the signal that appears on the signal line Sig by selecting the pixel P. This signal is based on the charge accumulated in the conversion element C. Reading out a signal based on the charge accumulated in the conversion element C of the pixel P is expressed as reading out a signal based on the charge accumulated in the pixel P.
[0024] The readout circuit 220 includes one amplifier circuit 221 for each signal line Sig. In the example of FIG. 2, since the pixel array 200 has n signal lines Sig, the readout circuit 220 includes n amplifier circuits 221. The amplifier circuit 221 includes, for example, an integral amplifier 222, a variable amplifier 223, a switch element 224, a capacitance 225, and a buffer circuit 226. The switch element 224 and the capacitance 225 configure a sample-and-hold circuit. The integral amplifier 222 includes, for example, an operational amplifier, an integral capacitance connected in parallel between an inverting input terminal and an output terminal of the operational amplifier, and a reset switch. A reference voltage is supplied from a reference power supply Vref to a non-inverting input terminal of the operational amplifier. When the reset switch is turned on in response to a control signal RC (reset pulse) supplied from the control circuit 112, the integral capacitance is reset and the potential of the signal line Sig is reset to a reference potential. The variable amplifier 223 amplifies the signal from the integral amplifier 222 at a set amplification factor. The sample and hold circuit samples and holds the signal from variable amplifier 223. The on / off of switch element 224 constituting the sample and hold circuit is controlled by a control signal SH supplied from control circuit 112. Buffer circuit 226 buffers (impedance converts) the signal from the sample and hold circuit and outputs it.
[0025] The read circuit 220 also includes a multiplexer 227 that selects and outputs signals from the multiple amplifier circuits 221 in a predetermined order. The multiplexer 227 includes, for example, a shift register, and this shift register performs a shift operation according to a control signal (for example, a clock signal) supplied from the control circuit 112. By this shift operation, one signal from the multiple amplifier circuits 221 is selected.
[0026] The buffer circuit 230 buffers (impedance converts) the signal output from the multiplexer 227. The AD converter 240 converts into a digital signal the analog signal output from the buffer circuit 230. The output of the AD converter 240, i.e., the pixel signal, is transmitted to the computer 120.
[0027] FIG. 3 shows a schematic example of a cross-sectional structure of one pixel P. The pixel P is formed on an insulating substrate 301 such as a glass substrate. The pixel P has a conductive layer 302, an insulating layer 303, a semiconductor layer 304, an impurity semiconductor layer 305, and a conductive layer 306 on the insulating substrate 301. The conductive layer 302 constitutes the gate of a transistor (e.g., TFT) constituting the switch element S. The insulating layer 303 is disposed so as to cover the conductive layer 302. The semiconductor layer 304 is disposed on a portion of the conductive layer 302 constituting the gate via the insulating layer 303. The impurity semiconductor layer 305 is disposed on the semiconductor layer 304 so as to constitute two main terminals (source, drain) of the transistor constituting the switch element S. The conductive layer 306 constitutes a wiring pattern connected to the two main terminals (source, drain) of the transistor constituting the switch element S. A part of the conductive layer 306 constitutes a signal line Sig, and another part constitutes a wiring pattern for connecting the switch element S to the conversion element C.
[0028] The pixel P further includes an interlayer insulating film 307 that covers the insulating layer 303 and the conductive layer 306. The interlayer insulating film 307 includes a contact plug 308 for connecting to the conductive layer 306 (switch element S). The pixel P further includes a conductive layer 309, an insulating layer 310, a semiconductor layer 311, an impurity semiconductor layer 312, a conductive layer 313, a protective layer 314, an adhesive layer 315, and a scintillator 316 on the interlayer insulating film 307 in this order. These layers form an indirect type conversion element C. The conductive layer 309 and the conductive layer 313 respectively form a lower electrode and an upper electrode of a photoelectric conversion element that forms the conversion element C. The conductive layer 313 is made of, for example, a transparent material. The conductive layer 309, the insulating layer 310, the semiconductor layer 311, the impurity semiconductor layer 312, and the conductive layer 313 form an MIS type sensor as a photoelectric conversion element. The impurity semiconductor layer 312 is formed of, for example, an n-type impurity semiconductor layer. The scintillator 316 is made of, for example, a gadolinium-based material or a CsI (cesium iodide) material, and converts radiation into light.
[0029] Alternatively to the above example, the conversion element C may be configured as a direct type conversion element that directly converts incident radiation into electric charges. Examples of the direct type conversion element C include conversion elements whose main material is amorphous selenium, gallium arsenide, gallium phosphide, lead iodide, mercury iodide, CdTe, CdZnTe, etc. The conversion element C is not limited to the MIS type, and may be, for example, a pn type or PIN type photodiode.
[0030] 3, in an orthogonal projection (planar view) onto the surface of the insulating substrate 301 on which the pixel array 200 is formed, each of the multiple signal lines Sig overlaps a part of the conversion element C. This configuration is advantageous in that the area of the conversion element C of each pixel P can be increased.
[0031] An example of the operation of the radiation imaging system 100 will be described with reference to FIG. 4. The upper part of FIG. 4 shows a timing chart, and the lower part of FIG. 4 shows a flow of signal processing. The same applies to FIGS. 5 to 7 described later. The operation shown in FIG. 4 is started, for example, by an instruction from a user of the radiation imaging system 100. The operation of the radiation imaging system 100 is controlled by the computer 120. The operation of the radiation imaging apparatus 110 is executed by the control circuit 112 under the control of the computer 120. Specifically, the control circuit 112 executes the operation of FIG. 4 by controlling the drive circuit 210 and the readout circuit 220. In the following description, the control circuit 112 controlling the drive circuit 210 or the readout circuit 220 to execute a specific operation may be simply expressed as the control circuit 112 executing a specific operation.
[0032] 4 indicates whether or not radiation 160 is being irradiated to the radiation imaging device 110. A low level indicates that radiation 160 is not being irradiated, and a high level indicates that radiation 160 is being irradiated.
[0033] "Vg1" to "Vg8" in the timing chart of Fig. 4 indicate the levels of the drive signals supplied to the respective drive lines Vg1 to Vg8 from the drive circuit 210. In the example of Fig. 4, a case will be described in which the pixel array 200 includes eight pixel rows, but the number of pixel rows is not limited to this.
[0034] The "period" in the timing chart of Fig. 4 indicates a period during which a specific operation is performed. Imaging by the radiation imaging device 110 includes an accumulation period ("A" in Fig. 4) during which an accumulation operation is performed, and a readout period ("R" in Fig. 4) during which a readout operation is performed. During the accumulation period, the control circuit 112 does not select any of the multiple pixels P included in the pixel array 200. Specifically, the drive circuit 210 maintains a state in which an off signal is supplied to each of the drive lines Vg1 to Vg8. As a result, the charge generated in each conversion element C is accumulated in the conversion element C, and at the same time, a charge according to the dark current flowing through each conversion element C is also accumulated.
[0035] During the readout period, the control circuit 112 selects each of the multiple pixels P included in the pixel array 200 and reads out a signal from the selected pixel P. Specifically, the drive circuit 210 supplies an ON signal to the drive lines Vg1 to Vg8 one by one in sequence. First, the drive circuit 210 supplies an ON signal only to the drive line Vg1. As a result, the switch element S(1,j) (j=1,...,n) is turned on, and the conversion element C(1,j) and the signal line Sigj are brought into a conductive state, so that the charge accumulated in the conversion element C(1,j) is read out to the signal line Sigj. Next, the drive circuit 210 supplies an ON signal only to the drive line Vg2. As a result, the switch element S(2,j) is turned on, and the conversion element C(2,j) and the signal line Sigj are brought into a conductive state, so that the charge accumulated in the conversion element C(2,j) is read out to the signal line Sigj. The drive circuit 210 repeats such an operation up to the drive line Vg8, whereby the charge based on the charge accumulated in the conversion element C is read out through the signal line Sigj by the readout circuit 220. In the following description, performing a readout operation on a plurality of pixels P means performing a readout operation on each of the plurality of pixels P.
[0036] The operations performed by the radiation imaging device 110 include operations performed during preparation for imaging and operations performed after preparation for imaging is completed. The period after preparation for imaging is completed may include a period during which a radiation image is captured, and may further include a period during which a moving image is captured. The period during which a radiation image is captured may be referred to as an imaging period. As will be described later, radiation 160 does not need to be constantly irradiated to the radiation imaging device 110 during the imaging period, and radiation 160 may be irradiated intermittently.
[0037] During preparation for imaging, radiation 160 is not irradiated to the radiation imaging device 110. Preparation for imaging may be ended when a predetermined condition is satisfied. The predetermined condition may be, for example, generation of a predetermined number of offset images, which will be described later. In response to the end of preparation for imaging, the radiation imaging device 110 may notify the computer 120 that irradiation of radiation is possible.
[0038] After preparation for imaging is completed, radiation 160 is irradiated to the radiation imaging device 110, and a radiation image corresponding to the radiation 160 is generated. As shown in Fig. 4, the radiation 160 may be irradiated to the radiation imaging device 110 as a plurality of pulses. The radiation imaging device 110 may generate a radiation image for each pulse. When the radiation imaging device 110 performs video imaging, the radiation images for each pulse may form frames of the video.
[0039] The control circuit 112 alternately executes accumulation operations and readout operations during preparation for imaging. As shown in Fig. 4, an accumulation operation is executed during an accumulation period 411, and signals based on charges accumulated in a plurality of pixels P are read out during the subsequent readout period 412. Similarly, for accumulation periods 413 to 418, the control circuit 112 reads out signals based on charges accumulated during at least the accumulation periods during the subsequent readout periods. The signals read out from the pixels P during preparation for imaging are used to generate an offset image.
[0040] In a readout period 412, a signal based on the charge accumulated over the time length 401 is read out from the pixel P. The time length 401 is the length of time from the end of the previous readout operation of the pixel P (i.e., from the time the drive signal changes to a low level) to the end of the current readout operation of the pixel P (i.e., until the drive signal changes to a low level again). The same is true for the other time lengths during which the charge is accumulated. The time length 401 includes an accumulation period 411. In a readout period 414, a signal based on the charge accumulated over the time length 402 is read out from the pixel P. The time length 402 includes an accumulation period 413.
[0041] 4, the accumulation period 413 is shorter than the accumulation period 411. As a result, the time length 402 is shorter than the time length 401. Therefore, the signal read out from the pixel P in the readout period 412 is referred to as a long-time offset signal, and the signal read out from the pixel P in the readout period 414 is referred to as a short-time offset signal.
[0042] The image generating circuit 113 generates a long-term offset image S based on the long-term offset signals read out from each of the multiple pixels P included in the pixel array 200. The long-term offset image S is expressed as a matrix with m rows and n columns, and the signal read out from pixel P(i,j) is the (i,j) component of this matrix. The image generating circuit 113 generates a short-term offset image T based on the short-term offset signals read out from each of the multiple pixels P included in the pixel array 200. The short-term offset image T is expressed as a matrix with m rows and n columns, and the signal read out from pixel P(i,j) is the (i,j) component of this matrix.
[0043] The control circuit 112 repeatedly executes the operations from the accumulation period 411 to the readout period 414. That is, the same operations as those from the accumulation period 411 to the readout period 414 are also executed from the accumulation period 415 to the readout period 418. In this way, the control circuit 112 alternately executes a readout operation for reading out a long-time offset signal and a readout operation for reading out a short-time offset signal during preparation for imaging.
[0044] After preparation for imaging is completed, the control circuit 112 starts imaging of a moving image (i.e., imaging of a plurality of radiation images). Specifically, the control circuit 112 alternately executes an accumulation operation and a readout operation. As shown in FIG. 4, an accumulation operation is executed during an accumulation period 421, and signals based on charges accumulated in a plurality of pixels P are read out during the subsequent readout period 422. Similarly, for accumulation periods 423 to 428, the control circuit 112 reads out signals based on charges accumulated during at least the accumulation period during the subsequent readout period. The signals read out from the pixels P after preparation for imaging is completed are used to generate a radiation image and an offset image.
[0045] In a readout period 422, a signal based on the charge accumulated over the time length 403 is read out from the pixel P. The time length 403 includes an accumulation period 421. The accumulation period 421 includes a period during which the radiation imaging device 110 is irradiated with radiation 160. Thus, the time length 403 includes a period during which the radiation imaging device 110 is irradiated with radiation 160. The time length 403 may be equal to the time length 401. In a readout period 424, a signal based on the charge accumulated over the time length 404 is read out from the pixel P. The time length 404 includes the accumulation period 423. The time length 404 does not include a period during which the radiation imaging device 110 is irradiated with radiation 160. The time length 404 may be equal to the time length 402.
[0046] 4, the accumulation period 423 is shorter than the accumulation period 421. As a result, the time length 404 is shorter than the time length 403. A signal read out from the pixel P during the readout period 422 is represented as a radiation signal, and a signal read out from the pixel P during the readout period 424 is represented as an imaging offset signal. The radiation signal includes a component corresponding to the radiation 160 irradiated to the radiation imaging device 110 during the accumulation period 421. By making the accumulation period 423 shorter than the accumulation period 421, the frame rate of the moving image generated by the radiation imaging device 110 can be improved.
[0047] The image generating circuit 113 generates a radiographic image X based on radiation signals read out from each of the multiple pixels P included in the pixel array 200. The radiographic image X is expressed as a matrix of m rows and n columns, and the signal read out from pixel P(i,j) is the (i,j) component of this matrix. The image generating circuit 113 generates an imaging offset image U based on imaging offset signals read out from each of the multiple pixels P included in the pixel array 200. The imaging offset image U is expressed as a matrix of m rows and n columns, and the signal read out from pixel P(i,j) is the (i,j) component of this matrix.
[0048] The control circuit 112 repeatedly executes the operations from the accumulation period 421 to the readout period 424. That is, the same operations as those from the accumulation period 421 to the readout period 424 are also executed from the accumulation period 425 to the readout period 428. In this way, after preparation for imaging is completed (for example, during imaging of a moving image), the control circuit 112 alternately executes a readout operation for reading out a radiation signal and a readout operation for reading out an imaging time offset signal.
[0049] Next, a method will be described in which the image generating circuit 113 corrects the radiation image X using the long-term offset image S, the short-term offset image T, and the imaging time offset image U. As described above, the components of the long-term offset image S, the short-term offset image T, the imaging time offset image U, and the radiation image X are given by a long-term offset signal, a short-term offset signal, an imaging time offset signal, and a radiation signal, respectively. In the following method, the radiation signal is corrected using the long-term offset signal, the short-term offset signal, and the imaging time offset signal.
[0050] As described above, the control circuit 112 alternately generates a long-term offset image S and a short-term offset image T during preparation for imaging. This generates a plurality of long-term offset images S and a plurality of short-term offset images T. The image generation circuit 113 averages a plurality of long-term offset images S during preparation for imaging to generate one long-term offset image S and stores the image in the memory of the image generation circuit 113 for subsequent processing. Similarly, the image generation circuit 113 averages a plurality of short-term offset images T during preparation for imaging to generate one short-term offset image T and stores the image in the memory of the image generation circuit 113 for subsequent processing. By averaging a plurality of offset images in this manner, noise contained in the offset image can be reduced. The number of offset images used for averaging may be two as shown in FIG. 4, or may be three or more. The number of offset images used for averaging may be set in advance.
[0051] After preparation for imaging is completed, the image generating circuit 113 generates a radiation image X and an imaging offset image U, and stores them in the memory of the image generating circuit 113. The image generating circuit 113 reads out a long-time offset image S from the memory, and generates a radiation afterimage image ("XS" in the figure) by subtracting the long-time offset image S from the radiation image X. The image generating circuit 113 also reads out a short-time offset image T from the memory, and generates an offset afterimage image ("UT" in the figure) by subtracting the short-time offset image T from the imaging offset image U.
[0052] The residual image components included in each of the radiation residual image and the offset residual image are proportional to the time length during which the charge is accumulated in the pixel P. Therefore, the image generating circuit 113 generates an adjusted residual image ("k(UT)" in the figure) by multiplying each element of the offset residual image by a coefficient k equal to the ratio of the time length 403 to the time length 404 (i.e., the value obtained by dividing the time length 403 by the time length 404). Then, the image generating circuit 113 generates a radiographic image X' (=X-kU+(kT-S)) by subtracting the adjusted residual image from the radiation residual image. The radiographic image X' is an image obtained by correcting the radiographic image X using the long-time offset image S, the short-time offset image T, the imaging offset image U, and the coefficient k. The image generating circuit 113 transmits the corrected radiographic image X' to the computer 120.
[0053] The above-mentioned calculation order for generating the radiation image X' is an example, and calculation may be performed in another order. The radiation image X', i.e., XSk(UT), is transformed into X-kU+(kT-S). Therefore, the image generating circuit 113 may calculate kT-S using the long-time offset image S, the short-time offset image T, and the coefficient k during preparation for imaging, and store this value as a correction value in the memory of the image generating circuit 113. The coefficient k may be determined based on a pre-setting of the timing at which the driving circuit 210 supplies an ON signal to the pixel array 200. The image generating circuit 113 may correct the radiation image X using the imaging offset image U, the correction value stored in the memory, and the coefficient k during imaging of a moving image. In this way, by storing the correction value instead of storing the long-time offset image S and the short-time offset image T, the memory consumption of the image generating circuit 113 can be reduced.
[0054] Next, the technical significance of alternately acquiring the long-time offset image S and the short-time offset image T will be described. The driving lines Vg1 to Vgm have various capacitive couplings in the pixel array 200. For example, the driving line Vg2 intersects with the signal lines Sig1 to Sign at multiple points in the pixel array 200, and has capacitive couplings at these intersections. The driving line Vg2 extends parallel to the driving line Vg3, and therefore has capacitive coupling with the driving line Vg3 as well. The driving line Vg2 extends parallel to a portion of the bias line Bs, and therefore has capacitive coupling with the bias line Bs as well. Furthermore, the driving line Vg2 has capacitive coupling with a node at the connection between the switch element S and the conversion element C.
[0055] Due to such capacitive coupling, when the level of the drive signal supplied to the drive line Vg is changed, the potentials of the signal line Sig, the bias line Bs, the other drive line Vg, and the nodes at the connections between the switch element S and the conversion element C also fluctuate. The signal line Sig, the bias line Bs, the drive line Vg, and the nodes at the connections between the switch element S and the conversion element C whose potentials have fluctuated return to their original potentials over time. However, the amount by which the potentials return varies depending on the length of the accumulation period.
[0056] Furthermore, even when the switch element S is in the off state, leakage current can flow. When the switch element S is turned off, the node between the conversion element C and the switch element S changes to the low level due to charge injection from the control terminal (gate). Therefore, immediately after the switch element S is turned off, a potential difference occurs between the main terminals (source, drain), and a leakage current flows. The leakage current depends on the potential difference between the two main terminals (source, drain) of the switch element. If a leakage current flows during the accumulation period, this potential difference becomes smaller, so the leakage current varies depending on the length of the accumulation period. Furthermore, if a leakage current flows in the switch element S, a current also flows in the signal line Sig and the bias wiring Bs.
[0057] For the above reasons, the offset images acquired may differ between the case where the long-time offset image S and the short-time offset image T are each acquired multiple times in succession and the case where the long-time offset image S and the short-time offset image T are acquired alternately. In the operation of the radiation imaging device 110 described above, the long-time offset image S and the short-time offset image T are acquired alternately during preparation for imaging, and after preparation for imaging is completed, the radiation image X and the imaging time offset image U are acquired alternately. This makes it possible to bring the state of capacitive coupling in the pixel array 200 during preparation for imaging closer to the state of capacitive coupling in the pixel array 200 during imaging of a radiation image, and therefore makes it possible to accurately reduce noise contained in the radiation image X.
[0058] 4, the image generating circuit 113 corrects the radiation signal using an imaging offset signal acquired after the radiation signal. Alternatively, the image generating circuit 113 may correct the radiation signal using an imaging offset signal acquired before the radiation signal.
[0059] In the above example, the time length 401 is equal to the time length 403. Alternatively, these time lengths may be different from each other. In such a case where the time lengths are different, the image generating circuit 113 may multiply each element of the long-time offset image S by the ratio of the time length 403 to the time length 401, and then subtract it from the radiation image X. In the above example, the time length 402 is equal to the time length 404. Alternatively, these time lengths may be different from each other. In such a case where the time lengths are different, the image generating circuit 113 may multiply each element of the short-time offset image T by the ratio of the time length 404 to the time length 402, and then subtract it from the imaging offset image U.
[0060] Next, an example of operation of the radiation imaging device 110 different from the operation of FIG. 4 described above will be described with reference to FIG. 5. In the operation of FIG. 4, the control circuit 112 selects a plurality of pixel rows one by one to generate a short-time offset image T and an imaging-time offset image U. In the operation of FIG. 5, the control circuit 112 selects a plurality of pixel rows two by two to generate a short-time offset image T and an imaging-time offset image U. Specifically, the control circuit 112 simultaneously selects the (2h-1)th pixel row and the 2hth pixel row (h=1,...,m / 2). Such an operation of simultaneously selecting a plurality of pixel rows may be called a binning operation. In the example of FIG. 5, two pixel rows are simultaneously selected, but three or more pixel rows may be simultaneously selected.
[0061] For example, the control circuit 112 selects the first pixel row and the second pixel row during a period (which may be referred to as a selection period for the first pixel row) in which the drive signal supplied to the drive line Vg1 is at a high level during the readout period 424. This causes an imaging offset signal based on the charge accumulated in pixel P(1,j) and the charge accumulated in pixel P(2,j) to be read out.
[0062] By reading out the image-capturing offset signal by the binning operation, the readout period (for example, the readout period 424) for reading out the image-capturing offset signal can be shortened. As a result, the frame rate of the moving image can be improved. The accumulation period 423 may be shorter than the accumulation period 421 or may be the same length as the accumulation period 421. Even if the accumulation period 423 is the same length as the accumulation period 421, the frame rate of the moving image can be improved by reading out the image-capturing offset signal by the binning operation. Since the image-capturing offset signal is read out by the binning operation, the short-term offset signal used for the difference with the image-capturing offset signal may also be read out by the binning operation. Alternatively, the short-term offset signal may be read out by a normal operation (selection of one row at a time). In this case, the short-term offset signal may be multiplied by a coefficient for adjusting the time length for which charge is accumulated in the pixel P.
[0063] In the operation of Fig. 5, in order to generate the long-time offset image S and the radiation image U, the control circuit 112 may select a plurality of pixel rows one by one, similar to the operation of Fig. 4. For example, the control circuit 112 selects the first pixel row during the period in which the drive signal supplied to the drive line Vg1 is at a high level in the readout period 422 (which may be referred to as a selection period for the first pixel row), and does not select other rows (for example, the second pixel row). This causes a radiation signal based on the charge accumulated in the pixel P(1,j) to be read out. Instead of the operation of Fig. 5, a binning operation may be performed to generate the long-time offset image S and the radiation image U.
[0064] Next, a method of generating a radiographic image in the operation of Fig. 5 will be described. The image generating circuit 113 generates a long-time offset image S during preparation for imaging in the same manner as described in Fig. 4. Also, the image generating circuit 113 generates a short-time offset image T' based on short-time offset signals read by a binning operation from a plurality of pixels P included in the pixel array 200 during preparation for imaging. The short-time offset image T' is expressed as a matrix with (m / 2) rows and n columns, and signals read from pixels P(2i-1,j) and P(2i,j) become the (i,j) components of this matrix (i=1,...,m / 2, j=1,...,n). The image generating circuit 113 may generate one short-time offset image T' by averaging a plurality of short-time offset images T'.
[0065] Thereafter, the image generating circuit 113 generates the short-term offset image T by adjusting the size of the short-term offset image T' so that the short-term offset image T' has the same size as the radiation image X. Specifically, the image generating circuit 113 sets the (i,j) component of the short-term offset image T' (i=1,...,m, j=1,...,n) to be 1 / 2 the (Ceiling(i / 2),j) component of the short-term offset image T'. Here, Ceiling represents a ceiling function, i.e., rounding up to the nearest whole number. The reason for halving is that each component of the short-term offset image T' represents the sum of signals from two pixels.
[0066] Thereafter, the image generating circuit 113 generates a radiological image X after preparation for imaging is completed in the same manner as described in FIG. 4. Furthermore, after preparation for imaging is completed, the image generating circuit 113 generates an image capturing offset image U' based on image capturing offset signals read out by a binning operation from a plurality of pixels P included in the pixel array 200. The method of generating the image capturing offset image U' is similar to the method of generating the short-time offset image T', and therefore a description thereof will be omitted. Thereafter, the image generating circuit 113 generates an image capturing offset image U by adjusting the size of the image capturing offset image U' so that the image capturing offset image U' has the same size as the radiological image X. The method of generating the image capturing offset image U is similar to the method of generating the short-time offset image T, and therefore a description thereof will be omitted.
[0067] The image generating circuit 113 generates a radiographic image X' by correcting the radiographic image X using the long-time offset image S, the short-time offset image T, and the imaging time offset image U generated as described above. The correction process for the radiographic image X may be the same as the correction process 400 in Fig. 4, and therefore a description thereof will be omitted.
[0068] The adjustment of the size of the offset image may be performed in other orders. For example, the image generating circuit 113 may generate an adjusted image of the correction process 400 without adjusting the size of the offset image, and then adjust the size of this adjusted image.
[0069] As shown in FIG. 5, the ratio of the length of accumulation time of the charge read out as the imaging offset signal to the length of accumulation time of the charge read out as the radiation signal differs for each pixel row. This difference is due to the fact that the radiation signal is read out by a normal operation (i.e., one pixel row at a time) and the imaging offset signal is read out by a binning operation. For example, in the first pixel row, a radiation signal based on the charge accumulated in the pixel P over a time length 503 is read out, and an imaging offset signal based on the charge accumulated in the pixel P over a time length 504 is read out. In the eighth pixel row, a radiation signal based on the charge accumulated in the pixel P over a time length 507 is read out, and an imaging offset signal based on the charge accumulated in the pixel P over a time length 508 is read out. The time length 507 is different from the time length 503. The time length 508 is different from the time length 504. Also, the ratio of the time length 508 to the time length 507 is different from the ratio of the time length 503 to the time length 504.
[0070] Therefore, the image generating circuit 113 may use an individual coefficient k for each pixel row in the correction process 400. Specifically, the image generating circuit 113 may use the ratio of the time length 503 to the time length 504 as the coefficient k for the pixel P included in the first pixel row. The image generating circuit 113 may use the ratio of the time length 507 to the time length 508 as the coefficient k for the pixel P included in the eighth pixel row.
[0071] For each of the pixel rows, the accumulation time of the charge read out as the long-time offset signal may be equal to the accumulation time of the charge read out as the radiation signal. For example, for the first pixel row, time length 501 may be equal to time length 503, and time length 502 may be equal to time length 504. For the eighth pixel row, time length 505 may be equal to time length 507, and time length 506 may be equal to time length 508.
[0072] Next, an example of an operation of the radiation imaging device 110 different from the operation of FIG. 4 described above will be described with reference to FIG. 6. In the operation of FIG. 6, the short-term offset signal and the imaging offset signal are read out by the binning operation, similar to the operation of FIG. 5. In the operation of FIG. 6, in order to read out a signal from each of the multiple pixels P included in the pixel array 200, pixel rows are selected from the center of the multiple pixel rows toward the outside. Specifically, in the example of FIG. 5, the control circuit 112 selects pixel rows in the order of the 4th row, the 5th row, the 3rd row, the 6th row, the 2nd row, the 7th row, the 1st row, and the 8th row in order to read out the long-term offset signal and the radiation signal. The control circuit 112 selects pixel rows in the order of the 3rd and 4th rows, the 5th and 6th rows, the 1st and 2nd rows, the 7th and 8th rows in order to read out the short-term offset signal and the imaging offset signal. In this way, in the operation of FIG. 6, the control circuit 112 selects a pixel row located in the center of the multiple pixel rows before the two pixel rows located at both ends of the multiple pixel rows.
[0073] In the operation of FIG. 6, the coefficient k for the pixel row selected first is smaller than the coefficient k for the pixel row selected later. The larger the coefficient k, the more the noise contained in the short-time offset signal and the imaging offset signal may be amplified. Therefore, by selecting a pixel row such that the coefficient k for a pixel P located at the center of the image that is likely to be the region of interest of the radiographic image is small, the degradation of the image quality of the radiographic image due to noise can be further reduced. A large coefficient k may increase noise. Therefore, the coefficient k may be set to a value smaller than the ratio of the length of the charge accumulation time depending on the degree of the influence of the afterimage.
[0074] Next, an example of operation of the radiation imaging device 110 different from the operation in Fig. 4 described above will be described with reference to Fig. 7. In the operation in Fig. 7, similar to the operation in Fig. 5, a short-time offset signal and an imaging offset signal are read out by a binning operation. In the operation in Fig. 7, the control circuit 112 switches the combination of pixel rows selected for reading out the imaging offset signal by the binning operation for each readout period. Similarly, the control circuit 112 switches the combination of pixel rows selected for reading out the imaging offset signal by the binning operation for each readout period.
[0075] First, the operation during preparation for imaging will be described. The operations from the accumulation period 711 to the readout period 713 and the accumulation period 715 to the readout period 717 may be the same as the operations from the accumulation period 411 to the readout period 413 in FIG. 4, and therefore the description will be omitted. In the readout period 714, the control circuit 112 simultaneously selects the (2h-1)th pixel row and the 2hth pixel row (h=1,...,m / 2). As a result, an imaging offset signal based on the charge accumulated in the pixel P(2h-1,j) and the charge accumulated in the pixel P(2h,j) is read out. In the readout period 718, the control circuit 112 simultaneously selects the 2hth pixel row and the (2h+1)th pixel row (h=1,...,m / 2-1). As a result, an image capture offset signal based on the charge accumulated in pixel P(2h-1,j) and the charge accumulated in pixel P(2h,j) is read out. Note that the pixel rows located at both ends of the multiple pixel rows (i.e., the first row and the mth row) are selected one row at a time.
[0076] The image generating circuit 113 generates the long offset image S in the same manner as the operation of FIG. 4. The image generating circuit 113 generates the short offset image T1' using the short offset signal read out during the readout period 714, and generates the short offset image T2' using the short offset signal read out during the readout period 718. The image generating circuit 113 generates the short offset image T1 and the short offset image T2 by adjusting the size of the short offset image T1' and the short offset image T2'. The image generating circuit 113 generates the short offset image T by averaging the short offset image T1 and the short offset image T2. By averaging a combination of different pixel rows in this manner, the resolution of the short offset image T in the column direction (vertical direction in the figure) can be improved. In the example of FIG. 7, only one short offset image T1' and one short offset image T2' are shown. To generate the short offset image T, multiple short offset images T1' and short offset images T2' may be averaged.
[0077] Next, the operation after preparation for imaging is completed (for example, during imaging of a moving image) will be described. The operations in readout period 721 to readout period 727 may be similar to the operations in readout period 712 to readout period 718, and therefore the description will be omitted.
[0078] The image generating circuit 113 generates a radiation image X in the same manner as the operation of FIG. 4. The image generating circuit 113 generates an image-capturing offset image U1' using the image-capturing offset signal read out during the readout period 723, and generates an image-capturing offset image U2' using the image-capturing offset signal read out during the readout period 727. The image generating circuit 113 generates an image-capturing offset image U1 and an image-capturing offset image U2 by adjusting the sizes of the image-capturing offset image U1' and the image-capturing offset image U2'. The image generating circuit 113 generates an image-capturing offset image U by averaging the image-capturing offset image U1 and the image-capturing offset image U2. By averaging a combination of different pixel rows in this manner, the resolution in the column direction (vertical direction in the figure) of the image-capturing offset image U can be improved.
[0079] Thereafter, the image generating circuit 113 generates a radiographic image X' by correcting the radiographic image X using the long-time offset image S, short-time offset image T, and imaging time offset image U generated as described above. The correction process for the radiographic image X may be similar to the correction process 400 in FIG. 4, and therefore a description thereof will be omitted. As described above, the imaging time offset image U is generated using the imaging time offset signal read out during the readout period 723 before the accumulation period 724 in which the radiation 160 is irradiated, and the imaging time offset signal read out during the readout period 727 after the accumulation period 724. This makes it possible to reduce noise in the radiographic image X with even greater accuracy.
[0080] In the above-described embodiment, the pixel array 200 includes only pixels P used for generating radiographic images. Alternatively, the pixel array 200 may include pixels used for purposes other than generating radiographic images, such as pixels used for automatic exposure control.
[0081] <Summary of the embodiment> [Item 1] A radiation imaging apparatus, comprising: a plurality of pixels arranged to form a plurality of pixel rows and a plurality of pixel columns, the pixels generating and storing electric charges; A drive circuit that supplies a drive signal to the plurality of pixels to select one of the plurality of pixels; a readout circuit that reads out a signal based on the charge accumulated in the pixel selected by the drive signal; a control circuit for controlling the read circuit and the drive circuit; an image generating circuit for generating a radiation image; The control circuit, for at least a first pixel of the plurality of pixels, While preparing for imaging, a first read operation to read out a first offset signal based on charge accumulated in the first pixel for a first length of time; a second read operation for reading out a second offset signal based on the charge accumulated in the first pixel for a second time length shorter than the first time length; Alternately execute After preparation for imaging is complete, a third readout operation of reading out radiation signals based on charges accumulated in the first pixels over a third time period including a period during which the radiation imaging device is irradiated with radiation; a fourth readout operation of reading out a third offset signal based on charges accumulated in the first pixel for a fourth time length that does not include a period during which the radiation imaging device is irradiated with radiation and is shorter than the third time length; and and controlling the readout circuit and the drive circuit to alternately execute the steps of: The image generating circuit generates the radiation image by correcting the radiation signal using the first offset signal, the second offset signal, and the third offset signal. [Item 2] the plurality of pixel rows include a first pixel row including the first pixel and a second pixel row including a second pixel; 2. The radiation imaging device of claim 1, wherein the driving circuit reads out the third offset signal based on the charge accumulated in the first pixel and the charge accumulated in the second pixel by selecting the first pixel row and the second pixel row during a first selection period. [Item 3] the drive circuit selects the first pixel row during a second selection period to read out the radiation image based on the charges accumulated in the first pixels; 3. The radiation imaging device according to item 2, wherein the drive circuit does not select the second pixel row during the second selection period. [Item 4] the plurality of pixel rows further includes a third pixel row including a third pixel; the drive circuit selects the first pixel row and the third pixel row during a third selection period to read out the third offset signal based on the charge accumulated in the first pixel and the charge accumulated in the third pixel; 4. The radiation imaging device according to item 3, wherein the drive circuit does not select the third pixel row during the first selection period, and does not select the second pixel row during the third selection period. [Item 5] 5. The radiation imaging device according to item 4, wherein the image generating circuit corrects the radiation signal read out during the second selection period using the first offset signal, the second offset signal, the third offset signal read out during the first selection period, and the third offset signal read out during the third selection period. [Item 6] After preparation for imaging is completed, imaging by the radiation imaging device is performed as follows: a first accumulation period including a period during which the radiation imaging device is irradiated with radiation, during which none of the plurality of pixels is selected; a first readout period in which each of the plurality of pixels is selected to read out a signal based on charges accumulated during at least the first accumulation period; a second accumulation period not including a period during which the radiation imaging device is irradiated with radiation and during which none of the plurality of pixels is selected; a second readout period in which each of the plurality of pixels is selected to read out a signal based on the charge accumulated during at least the second accumulation period; Including, 6. The radiation imaging device according to any one of items 1 to 5, wherein the second accumulation period is shorter than the first accumulation period. [Item 7] 7. The radiation imaging device according to any one of items 1 to 6, wherein the driving circuit selects a pixel row located in the center of the plurality of pixel rows before two pixel rows located at both ends of the plurality of pixel rows during one readout period in which each of the plurality of pixel rows is selected. [Item 8] The image generating circuit includes: During preparation for imaging, a correction value calculated using the first offset signal and the second offset signal is stored in a memory; 8. The radiation imaging device according to claim 1, wherein after preparation for imaging is completed, the radiation signal is corrected using the third offset signal and the correction value stored in the memory. [Item 9] 9. The radiation imaging device according to any one of items 1 to 8, wherein the image generating circuitry corrects the radiation signal by further using a ratio of the third time length to the fourth time length. [Item 10] The control circuit, for a fourth pixel of the plurality of pixels, While preparing for imaging, a fifth read operation to read out a fourth offset signal based on the charge accumulated in the fourth pixel over a fifth length of time; a sixth read operation of reading out a fifth offset signal based on charges accumulated in the fourth pixel for a sixth time period shorter than the fifth time period; Alternately execute After preparation for imaging is complete, a seventh readout operation of reading out second radiation signals based on charges accumulated in the fourth pixels over a seventh time period including a period during which the radiation imaging device is irradiated with radiation; an eighth readout operation of reading out a sixth offset signal based on charges accumulated in the fourth pixel for an eighth time length that does not include a period during which the radiation imaging device is irradiated with radiation and is shorter than the seventh time length; and and controlling the readout circuit and the drive circuit to perform the image generating circuit generates the radiation image further based on correcting the second radiation signal using the fourth offset signal, the fifth offset signal, the sixth offset signal, and a ratio of the seventh time length to the eighth time length; 10. The radiation imaging apparatus of claim 9, wherein the ratio of the seventh length of time to the eighth length of time is different from the ratio of the third length of time to the fourth length of time. [Item 11] 11. The radiation imaging apparatus according to any one of items 1 to 10, wherein the image generating circuit corrects the radiation signal by using the third offset signal acquired after the radiation signal. [Item 12] Item 12. The radiation imaging device according to any one of items 1 to 11, wherein the third time length is equal to the first time length, and the fourth time length is equal to the second time length. [Item 13] A radiation imaging apparatus according to any one of items 1 to 12, a signal processing means for processing a radiation image obtained by the radiation imaging device; A radiation imaging system comprising: [Item 14] 1. A method for controlling a radiation imaging apparatus having a plurality of pixels arranged to form a plurality of pixel rows and a plurality of pixel columns, the pixels generating and storing electric charges, the method comprising the steps of: For at least a first pixel of the plurality of pixels, While preparing for imaging, a first read operation to read out a first offset signal based on charge accumulated in the first pixel for a first length of time; a second read operation for reading out a second offset signal based on the charge accumulated in the first pixel for a second time length shorter than the first time length; Alternately carrying out the steps of: After preparation for imaging is complete, a third readout operation of reading out radiation signals based on charges accumulated in the first pixels over a third time period including a period during which the radiation imaging device is irradiated with radiation; a fourth readout operation of reading out a third offset signal based on charges accumulated in the first pixel for a fourth time length that does not include a period during which the radiation imaging device is irradiated with radiation and is shorter than the third time length; and Alternately carrying out the steps of: generating a radiation image based on correcting the radiation signal using the first offset signal, the second offset signal, and the third offset signal.
[0082] The invention is not limited to the above-described embodiments, and various modifications and variations are possible without departing from the spirit and scope of the invention. Accordingly, the following claims are appended to apprise the public of the scope of the invention. [Explanation of symbols]
[0083] 100 Radiation imaging system, 110 Radiation imaging device, 200 Pixel array
Claims
1. A radiation imaging apparatus, comprising: a plurality of pixels arranged to form a plurality of pixel rows and a plurality of pixel columns, the pixels generating and storing electric charges; A drive circuit that supplies a drive signal to the plurality of pixels to select one of the plurality of pixels; a readout circuit that reads out a signal based on the charge accumulated in the pixel selected by the drive signal; a control circuit for controlling the read circuit and the drive circuit; an image generating circuit for generating a radiation image; The control circuit, for at least a first pixel of the plurality of pixels, While preparing for imaging, a first read operation to read out a first offset signal based on charge accumulated in the first pixel for a first length of time; a second read operation of reading out a second offset signal based on the charge accumulated in the first pixel for a second time period shorter than the first time period; Alternately execute After preparation for imaging is complete, a third readout operation of reading out radiation signals based on charges accumulated in the first pixels over a third time period including a period during which the radiation imaging device is irradiated with radiation; a fourth readout operation of reading out a third offset signal based on charges accumulated in the first pixel for a fourth time length that does not include a period during which the radiation imaging device is irradiated with radiation and is shorter than the third time length; and and controlling the readout circuit and the drive circuit to alternately execute the steps of: The image generating circuit generates the radiation image by correcting the radiation signal using the first offset signal, the second offset signal, and the third offset signal.
2. the plurality of pixel rows include a first pixel row including the first pixel and a second pixel row including a second pixel; 2. The radiation imaging device according to claim 1, wherein the drive circuit selects the first pixel row and the second pixel row during a first selection period, thereby reading out the third offset signal based on the charge accumulated in the first pixel and the charge accumulated in the second pixel.
3. the drive circuit selects the first pixel row during a second selection period to read out the radiation image based on the charges accumulated in the first pixels; The radiation imaging apparatus according to claim 2 , wherein the drive circuit does not select the second pixel row during the second selection period.
4. the plurality of pixel rows further includes a third pixel row including a third pixel; the drive circuit reads out the third offset signal based on the charge accumulated in the first pixel and the charge accumulated in the third pixel by selecting the first pixel row and the third pixel row during a third selection period; The radiation imaging apparatus according to claim 3 , wherein the drive circuit does not select the third pixel row during the first selection period, and does not select the second pixel row during the third selection period.
5. 5. The radiation imaging device according to claim 4, wherein the image generating circuit corrects the radiation signal read out during the second selection period by using the first offset signal, the second offset signal, the third offset signal read out during the first selection period, and the third offset signal read out during the third selection period.
6. After preparation for imaging is completed, imaging by the radiation imaging device is performed as follows: a first accumulation period including a period during which the radiation imaging device is irradiated with radiation, during which none of the plurality of pixels is selected; a first readout period in which each of the plurality of pixels is selected to read out a signal based on charges accumulated during at least the first accumulation period; a second accumulation period not including a period during which the radiation imaging device is irradiated with radiation and during which none of the plurality of pixels is selected; a second readout period in which each of the plurality of pixels is selected to read out a signal based on the charge accumulated during at least the second accumulation period; Including, The radiation imaging apparatus according to claim 1 , wherein the second accumulation period is shorter than the first accumulation period.
7. 2. The radiation imaging device according to claim 1, wherein the drive circuit selects a pixel row located in the center of the plurality of pixel rows before two pixel rows located at both ends of the plurality of pixel rows during one readout period in which each of the plurality of pixel rows is selected.
8. The image generating circuit includes: storing a correction value calculated using the first offset signal and the second offset signal in a memory during preparation for imaging; 2 . The radiation imaging apparatus according to claim 1 , wherein, after preparation for imaging is completed, the radiation signal is corrected using the third offset signal and the correction value stored in the memory.
9. The radiation imaging apparatus according to claim 1 , wherein the image generating circuitry corrects the radiation signal by further using a ratio of the third time length to the fourth time length.
10. The control circuit, for a fourth pixel of the plurality of pixels, While preparing for imaging, a fifth read operation to read out a fourth offset signal based on the charge accumulated in the fourth pixel over a fifth length of time; a sixth read operation of reading out a fifth offset signal based on charges accumulated in the fourth pixel for a sixth time period shorter than the fifth time period; Alternately execute After preparation for imaging is complete, a seventh readout operation of reading out a second radiation signal based on charges accumulated in the fourth pixel over a seventh time period including a period during which the radiation imaging device is irradiated with radiation; an eighth readout operation of reading out a sixth offset signal based on charges accumulated in the fourth pixel for an eighth time length that does not include a period during which the radiation imaging device is irradiated with radiation and is shorter than the seventh time length; and and controlling the readout circuit and the drive circuit to perform the image generating circuit generates the radiation image further based on correcting the second radiation signal using the fourth offset signal, the fifth offset signal, the sixth offset signal, and a ratio of the seventh time length to the eighth time length; The radiation imaging apparatus of claim 9 , wherein the ratio of the seventh length of time to the eighth length of time is different from the ratio of the third length of time to the fourth length of time.
11. The radiation imaging apparatus according to claim 1 , wherein the image generating circuit corrects the radiation signal by using the third offset signal acquired after the radiation signal.
12. The radiation imaging apparatus of claim 1 , wherein the third length of time is equal to the first length of time, and the fourth length of time is equal to the second length of time.
13. A radiation imaging apparatus according to any one of claims 1 to 12, a signal processing means for processing a radiation image obtained by the radiation imaging device; A radiation imaging system comprising:
14. 1. A method for controlling a radiation imaging apparatus having a plurality of pixels arranged to form a plurality of pixel rows and a plurality of pixel columns, the pixels generating and storing electric charges, the method comprising the steps of: For at least a first pixel of the plurality of pixels, While preparing for imaging, a first read operation to read out a first offset signal based on charge accumulated in the first pixel for a first length of time; a second read operation of reading out a second offset signal based on the charge accumulated in the first pixel for a second time period shorter than the first time period; Alternately carrying out the steps of: After preparation for imaging is complete, a third readout operation of reading out radiation signals based on charges accumulated in the first pixels over a third time period including a period during which the radiation imaging device is irradiated with radiation; a fourth readout operation of reading out a third offset signal based on charges accumulated in the first pixel for a fourth time length that does not include a period during which the radiation imaging device is irradiated with radiation and is shorter than the third time length; and Alternately carrying out the steps of: generating a radiation image based on correcting the radiation signal using the first offset signal, the second offset signal, and the third offset signal.
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