Semiconductor device, power conversion device, and method for manufacturing semiconductor device
Patent Information
- Application Number
- JP2023097607
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-06-14
- Publication Date
- 2025-06-20
- Estimated Expiration
- 2043-06-14
AI Technical Summary
Existing semiconductor devices face challenges in reducing wiring inductance of smoothing capacitors, particularly when using wide bandgap semiconductor elements, due to limitations in capacitance and insulation distance, which affects the ability to produce desired outputs and increases operational losses.
The semiconductor device integrates a smoothing capacitor with a terminal directly connected to a circuit pattern via a bonding force, eliminating the need for screws and allowing the capacitor to be positioned non-overlapping with the semiconductor element, thereby reducing wiring length and inductance.
This configuration significantly reduces wiring inductance, enhances operational efficiency, and facilitates high-speed switching operations while ensuring reliable connections and improved heat management, thus supporting high-performance semiconductor devices.
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Abstract
Description
[Technical field]
[0001] The present disclosure relates to a semiconductor device, a power conversion device, and a method for manufacturing a semiconductor device, and more particularly to a semiconductor device having a smoothing capacitor, a power conversion device having the semiconductor device, and a method for manufacturing the semiconductor device. [Background technology]
[0002] As described in Non-Patent Document 1, in recent years, inverters have become increasingly smaller, and there is a demand for suppressing surge voltages that can cause voltage breakdown even when abrupt current changes occur when driving high-speed power semiconductors. Reducing surge voltages requires reducing the wiring inductance of capacitors and power modules. Thus, Non-Patent Document 1 discloses a wiring implementation technology that efficiently induces eddy currents in the heat sink by looping the internal wiring pattern of the metal heat sink of the power module, and reduces the inductance component by canceling out the magnetic flux created by the wiring with the magnetic flux of the eddy current.
[0003] According to Patent Document 1, a power module (semiconductor device) has a switching element and a smoothing capacitor. According to Patent Document 1, the smoothing capacitor is a ceramic capacitor built into the power module, so that the inductance caused by the smoothing capacitor can be reduced. As a specific configuration, an insulating substrate is fixed on a base plate, a switching element (semiconductor element) is mounted on the insulating substrate, and a capacitor substrate is disposed in a space above the switching element. A plurality of ceramic capacitors are mounted on the capacitor substrate. Patent Document 1 also discloses, as a conventional technique, a configuration in which an aluminum electrolytic capacitor is disposed as a smoothing capacitor on the side of the insulating substrate on which the switching element is mounted. The aluminum electrolytic capacitor as a smoothing capacitor is electrically connected by using a wiring board and a screw for fixing the wiring board. [Prior art documents] [Patent documents]
[0004] [Patent Document 1] JP 2000-350474 A [Non-Patent Document 1] Kinya Nakatsu et al., "Wiring and Packaging Technology to Reduce the Inductance Component of Power Modules," Journal of the Japan Institute of Electronics Packaging, Vol. 18, No. 4, pp. 270-278, (2015) Summary of the Invention [Problem to be solved by the invention]
[0005] If the capacity of the smoothing capacitor is not large enough for the current handled by the semiconductor device, the potential of the smoothing capacitor will drop due to charging and discharging during switching, making it impossible to achieve the desired output. This problem is particularly pronounced in semiconductor devices using wide band gap semiconductor elements (e.g., SiC-MOSFETs). For example, when handling a large current such as driving the motor of an electric vehicle, the capacity of the smoothing capacitor needs to be about several hundred μF. When the capacity of the smoothing capacitor is large like this, it is difficult to fit the smoothing capacitor in the space above the semiconductor element.
[0006] In addition, in order to place the smoothing capacitor above the semiconductor element, the wiring distance of the bus bar as the wiring for the smoothing capacitor becomes long, taking into consideration the need to secure the necessary insulation distance within the semiconductor device. Furthermore, in this arrangement, it is difficult to reduce the inductance by applying the wiring mounting technology proposed in Non-Patent Document 1. This is because, in order to achieve the above arrangement, it is necessary to extend the bus bar of the smoothing capacitor above the semiconductor element, and the bus bar extends away from the base plate (metal heat sink) that supports the semiconductor element.
[0007] On the other hand, in the configuration disclosed as the prior art in the above-mentioned Patent Document 1, the aluminum electrolytic capacitor serving as a smoothing capacitor is disposed to the side of the switching element, not above it. However, the wiring board is electrically connected using a screw, and this type of connection has the problem of high inductance.
[0008] The present disclosure has been made in consideration of the above-mentioned problems, and has an object to provide a technique capable of reducing the wiring inductance of a smoothing capacitor. [Means for solving the problem]
[0009] The semiconductor device according to the present disclosure includes a cooler, an insulating substrate mounted on the cooler, a circuit pattern provided on the insulating substrate, a semiconductor element electrically connected to the circuit pattern, a smoothing capacitor arranged so as not to overlap the semiconductor element in a plan view and having an internal electrode forming a capacitance, a capacitor case for housing the internal electrode, and a terminal protruding seamlessly from the capacitor case, and a first sealing material covering at least a part of the terminal of the smoothing capacitor, the insulating substrate, and the circuit pattern. The terminal and the circuit pattern of the smoothing capacitor are directly connected to each other by a bonding force at an interface between the terminal and the circuit pattern. Effect of the Invention
[0010] According to the present disclosure, firstly, the smoothing capacitor is arranged so as not to overlap the semiconductor element in plan view. As a result, since there is no restriction that the smoothing capacitor overlaps the semiconductor element in plan view, it is easy to apply a wiring arrangement that can reduce inductance. Secondly, if a fastening member such as a screw is used to connect the terminals of the smoothing capacitor, the wiring inductance increases due to the increase in wiring length, and it is also difficult to apply a parallel plate wiring structure to cancel this. In contrast, according to the present embodiment, the terminals of the smoothing capacitor and the circuit pattern are directly connected to each other by the bonding force of the interface between the terminals and the circuit pattern. This allows the capacitor case of the smoothing capacitor to be arranged close to the circuit pattern. In particular, when the joint portion of the terminals of the smoothing capacitor is sealed with a sealing material together with the circuit pattern, the smoothing capacitor can be connected at approximately the shortest distance without considering the creepage distance. Therefore, the wiring length can be shortened, and the wiring inductance can be reduced. [Brief description of the drawings]
[0011] [Figure 1] 1 is a block diagram illustrating a schematic configuration of a power conversion system according to a first embodiment. [Diagram 2] 2 is a schematic diagram showing a configuration of a smoothing capacitor in FIG. 1. [Diagram 3] 2 is a perspective view showing a schematic configuration of a semiconductor device included in the power conversion device of FIG. 1. [Figure 4] FIG. 4 is a partial cross-sectional view of the semiconductor device of FIG. [Diagram 5] 4 is a partial top view illustrating a schematic configuration in the vicinity of a terminal of the smoothing capacitor in FIG. 3. [Figure 6] 4 is a cross-sectional view illustrating a schematic configuration of a submodule included in the semiconductor device of FIG. [Figure 7] 4 is a top view illustrating a schematic configuration of a substrate case included in the semiconductor device of FIG. 3. [Figure 8]2 is a partial cross-sectional view illustrating a schematic configuration of the power conversion device of FIG. [Figure 9] 9 is a partial cross-sectional view illustrating a first step of a method for manufacturing the power converter of FIG. 8. FIG. [Figure 10] 9 is a partial cross-sectional view illustrating a second step of a method for manufacturing the power converter of FIG. 8. FIG. [Figure 11] 9 is a partial cross-sectional view illustrating a third step of a method for manufacturing the power converter of FIG. 8. FIG. [Figure 12] 9 is a partial cross-sectional view illustrating a fourth step of the method for manufacturing the power converter of FIG. 8. FIG. [Figure 13] 9 is a partial cross-sectional view roughly illustrating a fifth step of the method for manufacturing the power converter of FIG. 8. FIG. [Figure 14] FIG. 2 is a partial perspective view showing a simulation model corresponding to the present embodiment. [Figure 15] FIG. 13 is a partial perspective view showing a simulation model corresponding to a comparative example. [Figure 16] FIG. 16 is a graph showing the relationship between frequency and wiring inductance obtained by simulation using each of the simulation models of FIGS. 14 and 15. [Figure 17] 5 is a partial cross-sectional view illustrating a schematic configuration of a semiconductor device which is a modified example of the semiconductor device in FIG. [Figure 18] 18 is a partial cross-sectional view illustrating a first step of a method for manufacturing the semiconductor device of FIG. 17. [Figure 19] 18 is a partial cross-sectional view illustrating a second step of the method for manufacturing the semiconductor device of FIG. 17. [Figure 20] FIG. 11 is a perspective view illustrating a schematic configuration of a semiconductor device according to a second embodiment. [Figure 21] 21 is an exploded perspective view illustrating a schematic configuration of the semiconductor device of FIG. 20. [Figure 22] FIG. 11 is a perspective view illustrating a schematic configuration of a semiconductor device according to a third embodiment. [Figure 23] FIG. 23 is a perspective view showing the configuration of FIG. 22 in a simplified manner with a smoothing capacitor omitted. [Figure 24]FIG. 24 is an exploded perspective view showing the configuration of FIG. 23. [Diagram 25] 23 is a perspective view illustrating a schematic configuration of a semiconductor device which is a modified example of the semiconductor device in FIG. 22. FIG. [Figure 26] FIG. 26 is an exploded perspective view illustrating the semiconductor device of FIG. 25. [Figure 27] 26 is a partial cross-sectional view illustrating the semiconductor device of FIG. 25. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0012] Hereinafter, an embodiment will be described with reference to the drawings. In the drawings, the same or corresponding parts are designated by the same reference numerals, and description thereof will not be repeated.
[0013] <Embodiment 1> (Configuration of power conversion device) FIG. 1 is a block diagram showing a schematic configuration of a power conversion system according to a first embodiment. The power conversion system includes a power source 100, a power conversion device 200, and a load 300. The power source 100 is a DC power source and supplies DC power to the power conversion device 200. The power source 100 can be configured from various sources, for example, a DC system, a solar cell, or a storage battery, or may be configured from a rectifier circuit or an AC / DC converter connected to an AC system. The power source 100 may also be configured from a DC / DC converter that converts DC power output from a DC system into a predetermined power.
[0014] The power conversion device 200 is a three-phase inverter connected between the power source 100 and the load 300, converts DC power supplied from the power source 100 into AC power, and supplies the AC power to the load 300. As shown in Fig. 1, the power conversion device 200 includes a main conversion circuit 201 that converts DC power (input power) into AC power and outputs it, and a control circuit 203 that outputs a control signal for controlling the main conversion circuit 201 to the main conversion circuit 201.
[0015] The load 300 is a three-phase motor driven by AC power supplied from the power conversion device 200. The load 300 is not limited to a specific use, but is a motor mounted on various electric devices, and is used as, for example, a motor for a hybrid car, an electric car, a railroad car, an elevator, or an air conditioner.
[0016] The power converter 200 will be described in detail below. The main converter circuit 201 includes a semiconductor device 202A. The semiconductor device 202A has at least one semiconductor element 1. The at least one semiconductor element 1 includes a switching element 1s. The at least one semiconductor element 1 may also include a free wheel diode 1d. The main converter circuit 201 converts DC power supplied from the power source 100 into AC power by switching the switching element 1s, and supplies the AC power to the load 300. There are various specific circuit configurations of the main converter circuit 201, but the main converter circuit 201 according to this embodiment is a two-level three-phase full bridge circuit, and can be configured from six switching elements 1s and six free wheel diodes 1d connected in reverse parallel to each switching element 1s. The six switching elements 1s are connected in series for every two switching elements 1s to configure upper and lower arms, and each upper and lower arm configures each phase (U phase, V phase, W phase) of the full bridge circuit. The output terminals 10u, 10v, and 10w of the upper and lower arms corresponding to the U, V, and W phases, respectively, i.e., the three output terminals 10u, 10v, and 10w of the main conversion circuit 201, are connected to a load 300. The semiconductor element 1 may be a wide bandgap semiconductor element, for example, a silicon carbide semiconductor element.
[0017] The main conversion circuit 201 also includes a drive circuit 204 that drives each switching element 1s. The drive circuit 204 may be provided separately from the semiconductor device 202A, or may be built into the semiconductor device 202A as a modified example. The drive circuit 204 generates a drive signal that drives the switching element 1s of the main conversion circuit 201 and supplies it to the control electrode of the switching element 1s of the main conversion circuit 201. Specifically, in accordance with a control signal from the control circuit 203, the drive circuit 204 outputs a drive signal that turns the switching element 1s on and a drive signal that turns the switching element 1s off to the control electrode of each switching element 1s. When the switching element 1s is maintained in the on state, the drive signal is a voltage signal (on signal) that is equal to or higher than the threshold voltage of the switching element 1s, and when the switching element 1s is maintained in the off state, the drive signal is a voltage signal (off signal) that is equal to or lower than the threshold voltage of the switching element.
[0018] The control circuit 203 controls the switching elements 1s of the main conversion circuit 201 so that a desired power is supplied to the load 300. Specifically, the control circuit 203 calculates the time (on time) for each switching element 1s of the main conversion circuit 201 to be in the on state based on the power to be supplied to the load 300. For example, the main conversion circuit 201 can be controlled by PWM control that modulates the on time of the switching elements 1s according to the voltage to be output. Then, the control circuit 203 outputs a control command (control signal) to the drive circuit 204 so that an on signal is output to the switching element 1s that should be in the on state at each time point, and an off signal is output to the switching element 1s that should be in the off state. The drive circuit 204 outputs an on signal or an off signal as a drive signal to the control electrode of each switching element according to this control signal.
[0019] In the power conversion device 200 according to this embodiment, a semiconductor device 202A (or a semiconductor device according to another embodiment described later) is applied as including at least one of the switching element 1s and the free wheel diode 1d of the main conversion circuit 201. This can improve the conversion efficiency of the power conversion device.
[0020] In the present embodiment, the semiconductor device is applied to a two-level three-phase inverter, but the application of the semiconductor device is not limited to this, and the semiconductor device can be applied to various power conversion devices. For example, the semiconductor device can be applied to a three-level or multi-level power conversion device, and can be applied to a single-phase inverter when supplying power to a single-phase load. Also, the semiconductor device can be applied to a DC / DC converter or an AC / DC converter when supplying power to a DC load or the like.
[0021] The load 300 of the power conversion device 200 is not limited to an electric motor, and may be, for example, an electric discharge machine, a laser processing machine, an induction heating cooker, or a non-contact power supply system. The power conversion device 200 can also be used as a power conditioner for a solar power generation system, a power storage system, or the like.
[0022] (Configuration of Semiconductor Device) As shown in the circuit diagram in FIG. 1, the semiconductor device 202A has a smoothing capacitor 401 electrically connected to the power supply 100. Referring to FIG. 2, the smoothing capacitor 401 has at least one capacitor element 450, a capacitor case 490, and a plurality of terminals 442. Each of the capacitor elements 450 has a pair of internal electrodes 451 forming a capacitance. The capacitor case 490 houses the capacitor element 450 having the internal electrodes 451. The capacitor element 450 is, for example, a film capacitor. The at least one capacitor element 450 described above may be a plurality of capacitor elements 450, in which case the smoothing capacitor 401 is a capacitor module. Each of the terminals 442 protrudes seamlessly from the capacitor case 490. Each of the terminals 442 is, for example, a copper electrode that extends continuously. The plurality of terminals 442 includes at least one pair of terminals (a High terminal and a Low terminal) for charging and discharging the smoothing capacitor 401.
[0023] Terminal 442 may be a part of bus bar 440. Bus bar 440 may connect multiple capacitor elements 450 in parallel to each other inside capacitor case 490. For example, multiple film capacitors are arranged between a pair of bus bars 440 extending inside capacitor case 490. Each of bus bars 440 may be a continuously extending copper electrode. Bus bar 440 may have a pair of power supply terminals 441 (High terminal and Low terminal) protruding from capacitor case 490. Power supply 100 (FIG. 1) is connected to power supply terminal 441. As a modified example, power supply terminal 441 may be omitted and power supply 100 may be electrically connected to terminal 442.
[0024] 3, when the semiconductor device 202A configures a 6-in-1 three-phase full-bridge circuit (see FIG. 1), the smoothing capacitor 401 is provided with three or more pairs (six or more terminals) of terminals 442. At least one pair of terminals 442 is provided for each phase, and in the example shown in FIG. 3, two pairs of terminals 442 are provided for each phase, so that a total of six pairs of terminals 442 (12 terminals) are provided.
[0025] 3 and 4, semiconductor device 202A has cooler 2, insulating substrate 31, circuit pattern 32, submodule 11, smoothing capacitor 401, and sealing material 5 (first sealing material). Submodule 11 includes a plurality of semiconductor elements 1 (see FIG. 1), which will be described in detail later. Note that sealing material 5 is omitted in FIG. 3 so that the inside of sealing material 5 can be seen. Also, in FIG. 3, fixing member 61 or fixing member 62 (not shown in FIG. 3), which will be described later, may be attached to fixed portion 480.
[0026] The cooler 2 is a member having high heat dissipation properties. The cooler 2 may be a metal member. The metal member may be a copper or aluminum member, and the surface of the metal member may be covered with nickel. The metal member may be a base plate having a cooling surface. The cooling surface may be provided with pin fins.
[0027] The insulating substrate 31 is a ceramic substrate made of, for example, silicon nitride. A circuit pattern 32 and a metal film 33 are formed on the upper and lower surfaces of the insulating substrate 31, respectively. The insulating substrate 31, the circuit pattern 32, and the metal film 33 constitute a circuit substrate. The circuit pattern 32 and the metal film 33 are made of, for example, copper. The insulating substrate 31 is mounted on the cooler 2 so that the metal film 33 faces the cooler 2. In FIG. 4, this mounting is performed via a bonding layer 34. The submodule 11 (FIG. 3) is electrically connected to the circuit pattern 32. The smoothing capacitor 401 is arranged so as not to overlap the semiconductor element 1 in a plan view. In this specification, the plan view corresponds to a layout in an in-plane direction perpendicular to the thickness direction (the vertical direction in FIG. 4).
[0028] Sealing material 5 covers at least a portion of each of terminal 442, insulating substrate 31, and circuit pattern 32 of smoothing capacitor 401. Sealing material 5 covers the portion of terminal 442 that is connected onto circuit pattern 32, as shown in FIG.
[0029] Terminal 442 of smoothing capacitor 401 and circuit pattern 32 are directly connected to each other by the bonding strength of the interface between terminal 442 and circuit pattern 32. Since smoothing capacitor 401 generally has a low heat resistance temperature, it is preferable that the method for connecting terminal 442 of smoothing capacitor 401 to circuit pattern 32 does not excessively increase the temperature inside capacitor case 490, and for example, ultrasonic bonding or laser bonding is preferable.
[0030] 5 is a partial top view that diagrammatically illustrates a configuration in the vicinity of terminal 442 of smoothing capacitor 401. Each of terminals 442 may have a root portion RT and at least one connection portion CN. The root portion RT extends from the capacitor case 490 and is spaced apart from the circuit pattern 32. The connection portion CN extends from the root portion RT and is directly connected to the circuit pattern 32.
[0031] As shown in Fig. 3, each of the terminals 442 may have at least one bend, and in the illustrated example, has two bends. In particular, when the terminals 442 have the root portion RT and the connection portion CN as described above, the terminals 442 may have one bend between the connection portion CN and the root portion RT, and in the example shown in Fig. 3, the terminals 442 have another bend in the opposite direction at the root portion RT. The above bends can provide a desired difference between the height position at which the terminals 442 protrude from the capacitor case 490 and the height position at which the terminals 442 are connected to the circuit pattern 32.
[0032] The circuit pattern 32 may be a conductor plate having a roughly constant thickness bonded on the insulating substrate 31 to which a pattern shape is given. As a modified example, the circuit pattern 32 may also have an additional conductor member on the conductor plate for the purpose of improving the damage resistance of the circuit pattern 32 to the bonding of the terminal 442, or adjusting the height position at which the terminal 442 is bonded. However, the conductor member is arranged only within a range overlapping the conductor plate in a plan view in order to suppress adverse effects on the wiring inductance. If the above-mentioned purpose is unnecessary, it is preferable that the circuit pattern 32 is composed only of the conductor plate on the insulating substrate 31 without the conductor member. In other words, it is preferable that the terminal 442 is directly bonded to the conductor plate as the circuit pattern 32. Regardless of whether the additional conductor member is used, a fastening member such as a screw is not used to bond the terminal 442 to the circuit pattern 32. The reason for this is that securing a place to which the fastening member is applied is likely to lead to a significant increase in the wiring inductance.
[0033] The sealing material 5 contains gel or rubber. This makes the material of the sealing material 5 gel-like or rubber-like, and therefore has a low elastic modulus. The sealing material 5 is made of, for example, gel or rubber.
[0034] FIG. 6 is a cross-sectional view that shows a schematic configuration of a submodule 11 (see FIG. 3). The submodule 11 has a plurality of semiconductor elements 1 (see FIG. 1). The semiconductor elements 1 may be chip components having lower electrodes and upper electrodes on their lower surfaces (first main surfaces) and upper surfaces (second main surfaces), respectively. Each of the submodules 11 has a plurality of semiconductor elements 1, a conductor portion 111 (first conductor portion) connected to the lower electrodes of each of the semiconductor elements 1, and a conductor portion 112 (second conductor portion) connected to the upper electrodes of each of the semiconductor elements 1. The semiconductor elements 1 may be connected to the conductor portion 111 and the conductor portion 112, respectively, using a bonding layer 121 and a bonding layer 122. The bonding layer 121 and the bonding layer 122 are sintered materials made of, for example, silver or copper. The conductor portion 111 is, for example, a heat spreader made of copper. The conductor 112 is, for example, a plate-shaped metal plate made of copper or silver, and as shown in FIG. 6, the surface connected to the semiconductor element 1 may protrude from the plate surface. This allows the conductor 112 to be connected to only a part of the upper surface of the semiconductor element 1. The submodule 11 may further have a conductor 113 (third conductor) electrically connected to a control electrode provided on the upper surface of the semiconductor element 1. This connection may be made by a wire 114. By having the conductor 112 protrude as described above, it is easy to prevent the conductor 112 from being electrically short-circuited with the wire 114.
[0035] Furthermore, the submodule 11 has a sealing material 130 (second sealing material). The sealing material 130 seals the semiconductor element 1 while covering only a portion of each of the conductor portion 111, the conductor portion 112, and the conductor portion 113.
[0036] 3, the submodule 11 may be mounted on the circuit pattern 32, so that the bottom surface of the semiconductor element 1 is electrically connected to the circuit pattern 32 via the conductor portion 111. The mounting of the submodule 11 is performed, for example, using a solder material or a sintered material, so that electrical and thermal connection is ensured. Specifically, the conductor portion 111 is connected to the circuit pattern 32. It is desirable to perform this connection process at a temperature lower than the melting points of the bonding layers 121 and 122.
[0037] The conductors 112 (FIG. 6) of the submodule 11 may be connected to the circuit pattern 32 and / or other submodules 11 by metallic ribbons 81 and 82 (FIG. 3). Wires may be used instead of ribbons. Alternatively, the conductors 112 may extend to connect to the circuit pattern 32 and / or other submodules 11. These connections are made, for example, by ultrasonic bonding or by bonding with a bonding material such as solder.
[0038] As a modified example, the semiconductor element 1 may be electrically connected to the circuit pattern 32 without being in the state of the submodule 11. Specifically, a semiconductor chip itself as the semiconductor element 1 may be mounted on the circuit pattern 32.
[0039] As shown in FIG. 4, the semiconductor device 202A has a substrate case 501 and a sealing material 44. The substrate case 501 has a lower surface (first surface) facing the cooler 2 and an upper surface (second surface opposite to the first surface). The sealing material 44 is provided between the upper surface of the substrate case 501 and the smoothing capacitor 401. The sealing material 44 is made of a material having a lower elastic modulus than each of the material of the substrate case 501 and the material of the capacitor case 490 of the smoothing capacitor 401. The sealing material 44 prevents the sealing material 5 from leaking out from between the substrate case 501 and the smoothing capacitor 401 in the process of filling the sealing material 5. In other words, the sealing material 44 prevents the material from leaking out from between the substrate case 501 and the smoothing capacitor 401 in the process of filling a material having fluidity for forming the sealing material 5. The sealing material 44 preferably contains rubber, and is made of rubber, particularly in this embodiment. This allows the sealing material 44 to be rubber-like.
[0040] The board case 501 extends along a closed curve (dash line in FIG. 7) having a plurality of sides including a first side SD1 and a second side SD2 so as to surround the insulating board 31 (FIG. 4) on the cooler 2 (FIG. 4). As shown in FIG. 7, the upper surface of the board case 501 includes a first region RG1 corresponding to the first side SD1 and a second region RG2 corresponding to the second side SD2. The second region RG2 is lower than the first region RG1 in the thickness direction (direction perpendicular to the field of view of FIG. 7). The closed curve may be approximately rectangular as shown in FIG. 7, and the corners may be rounded. The capacitor case 490 (FIG. 3) of the smoothing capacitor 401 is attached to the second region RG2 on the upper surface of the board case 501 (FIG. 7) via the sealing material 44 (FIG. 4). Thus, the capacitor case 490 (FIG. 3) is fitted into the lowered portion of the board case 501. The inside of the substrate case 501 and smoothing capacitor 401 thus assembled is filled with a sealing material 5 (FIG. 4).
[0041] The substrate case 501 and the cooler 2 may be attached using a screw-shaped fixing member or an adhesive, or both. The substrate case 501 may be made of an insulating material, for example, resin. As shown in FIG. 3, the output terminals 10u to 10w (FIG. 1) may penetrate through the substrate case 501. In FIG. 3, each of the output terminals 10u to 10w penetrating into the substrate case 501 is connected onto the circuit pattern 32.
[0042] (Example of manufacturing method) 8 is a partial cross-sectional view that shows a schematic configuration of the power conversion device 200 (FIG. 1) having the semiconductor device 202A, and a manufacturing method thereof will be described below. The power conversion device 200 is also a type of semiconductor device.
[0043] Power conversion device 200 has fixing member 62 (second fixing member) and housing 7. Housing 7 is attached to cooler 2 using fixing member 62. Fixing member 62 is, for example, a screw-shaped fastening member. Capacitor case 490 of smoothing capacitor 401 has fixed portion 480 to which fixing member 62 is applied. When fixing member 62 is a screw-shaped fastening member, fixed portion 480 may be a screw hole. Fixing member 62 fixes fixed portion 480 of capacitor case 490 of smoothing capacitor 401, cooler 2, and housing 7 to one another.
[0044] Next, a method for manufacturing the power conversion device 200 (FIG. 8) having the semiconductor device 202A will be described below.
[0045] 9, substrate case 501, sealing material 44, and capacitor case 490 are layered in this order on cooler 2. Fixed portion 480 of capacitor case 490 of smoothing capacitor 401 is fixed to cooler 2. This fixing is performed by applying fixing member 61 (first fixing member) to fixed portion 480 of capacitor case 490 of smoothing capacitor 401. Fixing member 61 is, for example, a screw-shaped fastening member.
[0046] 10, terminal 442 of smoothing capacitor 401 is bonded to circuit pattern 32. As a result, terminal 442 and circuit pattern 32 are directly connected to each other by the bonding force of interface DI between terminal 442 and circuit pattern 32. This bonding is performed by, for example, ultrasonic bonding.
[0047] 11, sealing material 5 is filled inside substrate case 501. As a result, the joining portions between terminals 442 and the circuit pattern are covered with sealing material 5.
[0048] Referring to FIG. 12, the cooler 2 is mounted on the housing 7. A thermally conductive material 49 may be provided between them. The thermally conductive material 49 may be a resin sheet, and its material may be, for example, a silicone resin. Alternatively, the thermally conductive material 49 may be a heat dissipating grease layer. After the mounting, the fixing member 61 is removed. This leaves the fixed portion 480 open, as shown in FIG. 13.
[0049] 8, fixing member 62 is applied to fixed portion 480 of capacitor case 490 of smoothing capacitor 401. This fixes fixed portion 480, cooler 2, and housing 7 to one another. When fixing members 61 and 62 are screw-shaped fastening members, fixing member 62 (FIG. 8) may be longer than fixing member 61 (FIG. 12).
[0050] Next, a result of a simulation of the wiring inductance of the smoothing capacitor will be described. FIG. 14 is a partial perspective view showing a simulation model corresponding to this embodiment, in which only the terminal 442 is shown for the smoothing capacitor 401 (see FIG. 3). Meanwhile, FIG. 15 is a partial perspective view showing a simulation model corresponding to a comparative example, in which a wiring TM is provided instead of the terminal 442 as the wiring of the smoothing capacitor. The wiring TM has a terminal TMa and a protruding member TMb. The terminal TMa protrudes seamlessly from a capacitor case (not shown in FIG. 15) of the smoothing capacitor. The protruding member TMb protrudes from a range overlapping the circuit pattern 32 in a plan view. Each of the terminal TMa and the protruding member TMb has a screw hole. The terminal TMa and the protruding member TMb are fixed to each other by applying a screw (not shown) to the screw hole as shown by the dashed line in the figure. In the comparative example, it is assumed that the smoothing capacitor is attached by this fixation. 16 is a graph showing an example of a simulation result of the relationship between frequency f and wiring inductance Ls for each of the above simulation models, assuming a typical general-purpose semiconductor device for electric vehicles. This result shows that the inductance can be significantly reduced when terminal 442 is used, as compared with the case where wiring TM to which screw fastening is applied is used. For example, at f=10 MHz, Ls=6.5 nH of terminal 442 is reduced to less than half the value of Ls=19.1 nH of wiring TM.
[0051] (effect) According to this embodiment, firstly, the smoothing capacitor 401 (FIG. 3) is arranged so as not to overlap the submodule 11 including the semiconductor element 1 (FIG. 6) in a plan view. As a result, there is no restriction that the smoothing capacitor 401 must overlap the semiconductor element 1 in a plan view, and therefore it is easy to apply a wiring arrangement that can reduce inductance. Secondly, if a fastening member such as a screw is used to connect the terminals of the smoothing capacitor 401, the wiring inductance increases due to the increased wiring length, and it is also difficult to apply a parallel plate wiring structure to cancel this. In contrast, according to this embodiment, the terminal 442 of the smoothing capacitor 401 and the circuit pattern 32 are directly connected to each other by the bonding force of the interface between the terminal 442 and the circuit pattern 32. As a result, the capacitor case 490 of the smoothing capacitor 401 can be arranged close to the circuit pattern 32. In particular, when the joint portion of the terminal 442 of the smoothing capacitor 401 is sealed with the sealing material 5 together with the circuit pattern 32, the smoothing capacitor 401 can be connected at approximately the shortest distance without considering the creepage distance. Therefore, the wiring length can be shortened, and the wiring inductance can be reduced.
[0052] The sealing material 5 may contain gel or rubber. This prevents peeling or cracking of the sealing material 5 due to deformation of the terminal 442 of the smoothing capacitor 401 caused by an error in the relative mounting positions of the smoothing capacitor 401 and the cooler 2 when the semiconductor device 202A is mounted in the housing 7 (FIG. 8) or the like. This improves the reliability of the semiconductor device 202A.
[0053] By configuring the submodule 11 (FIG. 6) using the semiconductor element 1, it is possible to easily inspect the semiconductor element 1 before it is mounted on the insulating substrate 31. This will be described below.
[0054] Since the heat resistance temperature of a film capacitor generally used as smoothing capacitor 401 is low, about 100°C, it is difficult to perform a high-temperature test on semiconductor element 1 after the assembly of semiconductor device 202A is completed. If this high-temperature test is performed on submodule 11 having semiconductor element 1 before the assembly of semiconductor device 202A, it is possible to avoid exposing the film capacitor to high temperatures during the high-temperature test.
[0055] Furthermore, when the semiconductor element 1 is in a bare chip state rather than in the state of the submodule 11, it is difficult to perform a withstand voltage test, a rated current test, and a short circuit test, but in the state of the submodule 11, these tests are easily performed. Specifically, the thermal capacity of the conductors 111 and 112 can absorb temporary and sudden heat generation from the semiconductor element. Therefore, in a test in which a large current is applied instantaneously, such as a short circuit test, the heat from the semiconductor element 1 can be diffused, thereby suppressing damage to the element caused by the heat generation. Furthermore, the presence of the sealing material 130 makes it easy to perform a test at a high voltage. Furthermore, since the screening test of a plurality of semiconductor elements 1 can be performed collectively, the screening test can be made more efficient.
[0056] Also, it is difficult to perform a screening test on a bare chip. The screening test is particularly important in terms of quality assurance when the semiconductor element 1 is a silicon carbide semiconductor element. In order to shorten the time required for the screening test, the test needs to be performed under strict conditions, but this is difficult in the bare chip state. For example, since a silicon carbide semiconductor element is expected to pass a relatively large current through a relatively small area, it is difficult to apply a current under conditions close to the actual use conditions in the bare chip state. In contrast, in the submodule 11 state, a test with a large current can be easily performed due to the uniform current flow between the conductor portion 111 and the conductor portion 112.
[0057] Furthermore, when a wide band gap semiconductor such as silicon carbide is used, the withstand voltage of the semiconductor itself is high, so from the viewpoint of the withstand voltage of the semiconductor itself, the length of the termination structure of the semiconductor element can be shortened. However, when a high voltage is applied to a bare chip in the atmosphere for testing purposes, creeping discharge may occur before the original withstand voltage is reached. In contrast, if the semiconductor chip is in the state of a submodule 11, the termination structure is covered by the encapsulant 130, so that testing at high voltage can be performed while suppressing creeping discharge.
[0058] As described above, the above test groups, which would be difficult to perform using a single semiconductor chip, become possible by utilizing the submodule 11.
[0059] In the case where the substrate case 501 has a frame shape with a uniform thickness, if the thickness is too small, the material of the sealing material 5 (e.g., gel) will flow out when the sealing material 5 is formed in the substrate case 501 in the manufacture of the semiconductor device 202A. Conversely, if the thickness of the substrate case 501 is too large, the capacitor case 490 and the substrate case 501 are likely to interfere with each other when the height position of the capacitor case 490 is adjusted so that the terminal 442 of the smoothing capacitor 401 is as short as possible. In contrast, according to the present embodiment, the above-mentioned interference problem can be avoided by mounting the smoothing capacitor 401 in the second region RG2 (FIG. 7) that is lower than the first region RG1 while preventing the material of the sealing material 5 (FIG. 4) from flowing out by making the height of the first region RG1 (FIG. 7) sufficiently high.
[0060] Furthermore, when the semiconductor device 202A is attached to the housing 7 (FIG. 8) or the like, the smoothing capacitor 401 may be displaced relative to the semiconductor device 202A due to an error in the attachment dimensions. If this displacement is large, the board case 501 or the smoothing capacitor 401 may be damaged. The occurrence of such damage can be suppressed by making the elastic modulus of the material of the sealing material 44 lower than the materials of the board case 501 and the capacitor case 490. In particular, when the sealing material 44 is a rubber material, the sealing material 44 can be easily provided.
[0061] When cooling water flows between the cooler 2 and the housing 7 (FIG. 8), the cooler 2 and the housing 7 need to be fixed to each other at a certain number of fixing points in order to ensure sufficient watertightness. In particular, when the power conversion device 200 (FIG. 8) is disposed on the drive structure of an automobile, more fixing points may be required to ensure watertightness and durability under vibration. In this embodiment, a structure is used in which the smoothing capacitor 401 is integrated into the power conversion device 200, and therefore, in order to prevent this structure from making it difficult to ensure a plurality of fixing points as described above, the fixed portion 480 of the smoothing capacitor 401 may also be used as a fixing point between the cooler 2 and the housing 7.
[0062] The heat resistance temperature of the smoothing capacitor 401 is generally low. In this case, the method for connecting the terminal 442 of the smoothing capacitor 401 to the circuit pattern 32 must be one that does not excessively increase the temperature inside the capacitor case 490, and ultrasonic bonding or laser bonding is preferable. In this case, if thick terminals are used to ensure the current capacity of each of the terminals 442, the ultrasonic power or laser power must be increased for the connection. As a result, the power efficiency may deteriorate and there may be a concern that the insulating substrate 31 may be damaged. If the terminal 442 has a plurality of connection parts CN (FIG. 5) that are separated from each other, the current capacity can be ensured while avoiding the above-mentioned problems.
[0063] When the semiconductor element 1 uses a wide band gap semiconductor such as SiC, high-speed switching operations are often expected for the purpose of high-speed inverter driving, etc. During such high-speed operations, operation losses due to wiring inductance tend to be particularly problematic, but this can be effectively suppressed according to the present embodiment.
[0064] After the step of fixing fixed portion 480 of capacitor case 490 to cooler 2 (FIG. 9), terminal 442 and circuit pattern 32 may be directly connected to each other by the bonding force of interface DI (FIG. 10) between terminal 442 and circuit pattern 32. This makes it possible to prevent stress from being applied to interface DI as a bonding portion.
[0065] The fixing member 61 has a role of temporarily fixing the capacitor case 490 to the cooler 2 during the mounting operation of the semiconductor device 202A to the housing 7 (FIG. 10) or during the shipping operation of the semiconductor device 202A (FIG. 11). On the other hand, at the stage where the semiconductor device 202A is combined with the housing 7, the fixing member 61 may be removed from the fixed part 480, and instead, a fixing member 62 (FIG. 8) capable of fixing the housing 7 may be applied. In this case, by using the common fixed part 480 for the fixing members 61 and 62, the space for arranging the fixed part can be reduced, and therefore the semiconductor device 202A can be made smaller.
[0066] <Modification of the first embodiment> FIG. 17 is a partial cross-sectional view that shows a schematic configuration of a semiconductor device 202B that is a modification of the semiconductor device 202A (FIG. 4: embodiment 1). The semiconductor device 202B has a substrate case 501M and a capacitor case 490M instead of the substrate case 501 and the capacitor case 490 in the semiconductor device. The substrate case 501M has a fitting portion FT1 (first fitting portion) provided in a portion corresponding to the second side SD2 (FIG. 7) of the substrate case 501M. The capacitor case 490M has a fitting portion FT2 (second fitting portion) having a groove SL into which the fitting portion FT1 is inserted. In consideration of the mounting tolerance, it is preferable that the distance between the fitting portion FT1 and the cooler 2 is larger than the thickness of the fitting portion FT2. The sealing material 44 is filled between the fitting portion FT1 and the fitting portion FT2 in the groove SL of the fitting portion FT2 of the capacitor case 490. The sealant 44 contains gel, which makes the sealant 44 in a gel state.
[0067] 18 and 19 are partial cross-sectional views that are schematic diagrams illustrating the first and second steps of the manufacturing method of the semiconductor device 202B. Referring to FIG. 18, the fitting portion FT1 is inserted into the groove SL of the fitting portion FT2, so that the fitting portion FT1 and the fitting portion FT2 are fitted together. Referring to FIG. 19, a sealant 44 containing gel is formed. Specifically, the sealant 44 is filled between the fitting portion FT1 and the fitting portion FT2 in the groove SL of the fitting portion FT2. Referring to FIG. 20, after the sealant 44 is formed as described above, a sealant 5 containing gel is formed. Note that the attitude of the work in progress with respect to the direction of gravity may be adjusted so that the opening of the groove SL faces upward in the step of filling the sealant 44 (FIG. 19) and the circuit pattern 32 faces upward in the step of forming the sealant 5 (FIG. 17).
[0068] As for the steps other than those described above, the steps may be roughly similar to those in the first embodiment, and therefore the description thereof will be omitted.
[0069] According to this modification, it is possible to more stably form the sealant 44. As a result, when the sealant 5 using gel is filled into the substrate case 501M, the sealant 44 can more reliably prevent leakage of the sealant 5.
[0070] <Embodiment 2> (composition) 20 and 21 are respectively a perspective view and an exploded perspective view that show a schematic configuration of a semiconductor device 202C according to the second embodiment. In these figures, the sealing material 5 (see FIG. 4) is omitted so that the inside of the sealing material 5 can be seen. In addition, the fixing member 61 or the fixing member 62 (not shown in FIG. 20 and FIG. 21) described above may be attached to the fixed portion 480.
[0071] The semiconductor device 202C has a substrate case 502 instead of the substrate case 501 (FIG. 3: embodiment 1). The substrate case 502 is continuously connected to the capacitor case 490 of the smoothing capacitor 401, thereby constituting a case part CP together with the capacitor case 490 of the smoothing capacitor 401. As a result, the smoothing capacitor 401 and the substrate case 502 are integrated. The case part CP surrounds the insulating substrate 31 on the cooler 2. The sealing material 5 is filled inside the case part CP. The sealing material 44 between the case part CP and the cooler 2 is made of a material that can be formed at a temperature lower than the heat resistance temperature of the smoothing capacitor 401. The material is, for example, a thermosetting adhesive. Note that the configuration other than the above is almost the same as the configuration of the above-mentioned embodiment 1, and therefore the description thereof will not be repeated.
[0072] (Manufacturing method) Next, a method for manufacturing the semiconductor device 202C will be described below.
[0073] Referring to FIG. 21, first, a laminate (see FIG. 2) including a cooler 2, an insulating substrate 31, and a circuit pattern 32 is prepared. Next, as in the first embodiment, a submodule 11 is mounted. As in the first embodiment, as a modified example, a semiconductor element 1 may be mounted without being in the state of a submodule 11. Next, a sealing material 44 is formed on the cooler 2 so as to surround the insulating substrate 31. For example, a thermosetting adhesive as the sealing material 44 is applied so as to surround the insulating substrate 31. Next, a board case 502 integrated with a smoothing capacitor 401 is attached. Specifically, a case part CP is attached on the sealing material 44 so as to overlap with the sealing material 44 in a plan view. The joining between the case part CP and the cooler 2 may be performed by the adhesive force of the sealing material 44. To reinforce it or instead of it, a screw-shaped fastening member may be used. Next, a terminal 442 of the smoothing capacitor 401 and the circuit pattern 32 are electrically connected in the same manner as in the first embodiment. Next, the case portion CP is filled with the sealant 5. The sealant 5 may be in a gel state by containing a gel.
[0074] (effect) According to this embodiment, the capacitor case 490 and the substrate case 502 are continuously connected as the case part CP. As a result, firstly, in the process of forming the sealing material 5, the case part CP can have a configuration that does not have a gap through which the material of the sealing material 5 leaks from the inside to the outside of the case part CP through between the capacitor case 490 and the substrate case 502. Therefore, the function of the capacitor case 490 sealing the material of the sealing material 5 together with the substrate case 502 can be more reliably ensured. Therefore, it is fully permissible to arrange the capacitor case 490 on the cooler 2 without the substrate case 502. As a result, the height of the terminal 442 protruding from the capacitor case 490 can be made close to the height of the circuit pattern 32, so that the wiring inductance can be further reduced. Secondly, since the capacitor case 490 and the substrate case 502 are integrated in advance, the assembly work can be simplified.
[0075] <Embodiment 3> (composition) Fig. 22 is a perspective view that shows a schematic configuration of a semiconductor device 202D according to embodiment 3. Fig. 23 and Fig. 24 are a perspective view and an exploded perspective view, respectively, that show the semiconductor device 202D with the smoothing capacitor 401 omitted. Note that in these figures, the sealing material 5 (see Fig. 4) is omitted so that the inside of the sealing material 5 can be seen.
[0076] In this embodiment, a cooler 2L that is expanded compared to the cooler 2 (FIG. 3: embodiment 1) is used so that not only the insulating substrate 31 but also the capacitor case 490 of the smoothing capacitor 401 is supported. As a result, the capacitor case 490 of the smoothing capacitor 401 is mounted on the cooler 2 via the thermally conductive material 49. Therefore, the capacitor case 490 is well thermally connected to the cooler 2. The sealing material 44 and the board case 503 surround the insulating substrate 31 and the smoothing capacitor 401 on the cooler 2L.
[0077] The configuration other than the above is substantially the same as that of the first embodiment, and therefore the description thereof will not be repeated.
[0078] (effect) According to this embodiment, the smoothing capacitor 401 can be integrated into the semiconductor device 202D with a relatively simple configuration. Furthermore, the smoothing capacitor 401 is supported by the cooler 2, which makes the semiconductor device 202D more robust and easier to handle.
[0079] Furthermore, since the capacitor case 490 of the smoothing capacitor 401 is well thermally connected to the cooler 2, the heat generated from the smoothing capacitor 401 during charging and discharging can be efficiently released to the cooler 2 without requiring complex consideration of the heat dissipation path. This makes it possible to prevent the heat from the smoothing capacitor 401 from leading to a rise in the temperature of the semiconductor element 1. Therefore, it is possible to prevent an increase in the operational loss or a decrease in performance of the semiconductor element 1 caused by a rise in temperature.
[0080] <Modification of the third embodiment> 25, 26, and 27 are respectively a perspective view, an exploded perspective view, and a partial cross-sectional view, which are schematic views showing a configuration of a semiconductor device 202E which is a modification of the semiconductor device 202D (FIG. 22). Note that in FIGS. 25 and 26, the sealing material 5 (FIG. 27) is omitted.
[0081] Semiconductor device 202D according to this modification has a substrate case 502, similarly to semiconductor device 202C (FIGS. 20 and 21: second embodiment) described above. Specifically, substrate case 502 is continuously connected to capacitor case 490 of smoothing capacitor 401, thereby constituting a case part CP together with capacitor case 490 of smoothing capacitor 401. The inside of case part CP is filled with sealing material 5 (FIG. 27).
[0082] On the other hand, unlike the second embodiment, in the semiconductor device 202E, the capacitor case 490 of the smoothing capacitor 401 is mounted on the cooler 2 via the thermally conductive material 49, similar to the semiconductor device 202D (FIGS. 22 to 24).
[0083] It should be noted that the embodiments can be freely combined, and each embodiment can be modified or omitted as appropriate.
[0084] <Additional Notes> Various aspects of the present disclosure are summarized below as appendices.
[0085] (Appendix 1) A cooler (2); an insulating substrate (31) mounted on the cooler (2); A circuit pattern (32) provided on the insulating substrate (31); a semiconductor element (1) electrically connected to the circuit pattern (32); a smoothing capacitor (401) including an internal electrode (451) that is arranged so as not to overlap the semiconductor element (1) in a plan view and forms a capacitance, a capacitor case (490) that houses the internal electrode (451), and a terminal (442) that protrudes seamlessly from the capacitor case (490); a first sealing material (5) that covers at least a portion of each of the terminal (442) of the smoothing capacitor (401), the insulating substrate (31), and the circuit pattern (32); Equipped with In the semiconductor device (202A to 202E), the terminal (442) of the smoothing capacitor (401) and the circuit pattern (32) are directly connected to each other by a bonding strength of an interface between the terminal (442) and the circuit pattern (32).
[0086] (Appendix 2) A semiconductor device (202A to 202E) according to appended claim 1, The semiconductor device (202A to 202E), wherein the first sealing material (5) contains gel or rubber.
[0087] (Appendix 3) The semiconductor device (202A to 202E) according to appended claim 1 or 2, The semiconductor element (1) has a first main surface and a second main surface, The semiconductor device (202A to 202E) is a first conductor portion (111) connected to the first main surface of the semiconductor element; a second conductor portion (112) connected to the second main surface of the semiconductor element; a second sealing material (130) that covers a portion of each of the first conductor portion (111) and the second conductor portion (112) while at least partially exposing each of the first conductor portion (111) and the second conductor portion (112), and seals the semiconductor element (1); Further equipped with The first main surface of the semiconductor element is electrically connected to the circuit pattern via the first conductor portion.
[0088] (Appendix 4) A semiconductor device (202A, 202B) according to any one of appendix 1 to 3, a substrate case (501, 501M) having a first surface facing the cooler (2) and a second surface opposite to the first surface, and extending so as to surround the insulating substrate (31) on the cooler (2) along a closed curve having a plurality of sides including a first side (SD1) and a second side (SD2); a sealing material (44) provided between the second surface of the substrate case (501, 501M) and the smoothing capacitor (401), the sealing material being made of a material having a lower elastic modulus than both the material of the substrate case (501, 501M) and the material of the capacitor case (490) of the smoothing capacitor (401); Further equipped with the second surface of the substrate case (501, 501M) includes a first region (RG1) corresponding to the first side (SD1) and a second region (RG2) corresponding to the second side (SD2) and lower than the first region (RG1); the smoothing capacitor (401) is attached on the second area (RG2) of the second surface via the sealing material (44); The first sealing material (5) is filled inside the substrate case (501, 501M) and the smoothing capacitor (401). A semiconductor device (202A, 202B).
[0089] (Appendix 5) A semiconductor device (202A, 202B) according to appended claim 4, The semiconductor device (202A, 202B), wherein the sealing material (44) contains rubber.
[0090] (Appendix 6) A semiconductor device (202B) according to appended claim 4, the substrate case (501M) has a first fitting portion (FT1) provided in a portion corresponding to the second side of the substrate case (501M), The capacitor case (490) has a second fitting portion (FT2) having a groove (SL) into which the first fitting portion (FT1) is inserted, The sealing material (44) contains a gel and is filled between the first fitting portion (FT1) and the second fitting portion (FT2) in the groove (SL) of the second fitting portion (FT2) of the capacitor case (490). A semiconductor device (202B).
[0091] (Appendix 7) A semiconductor device (200) according to any one of claims 1 to 6, A fixing member (62); a housing (7) attached to the cooler (2) using the fixing member (62); Further equipped with the capacitor case (490) of the smoothing capacitor (401) has a fixed portion (480) to which the fixing member (62) is applied, the fixing member (62) fixes the fixed portion (480) of the capacitor case (490) of the smoothing capacitor (401), the cooler (2), and the housing (7) to one another. A semiconductor device (200).
[0092] (Appendix 8) A semiconductor device (202C) according to any one of appendices 1 to 3, the smoothing capacitor (401) further includes a substrate case (502) which is continuously connected to the capacitor case (490) of the smoothing capacitor (401) and which constitutes a case portion (CP) together with the capacitor case (490) of the smoothing capacitor (401), the case portion (CP) surrounding the insulating substrate (31) on the cooler (2), and the first sealing material (5) being filled inside the case portion (CP); The semiconductor device (202C) further comprises a sealing material (44) between the case portion (CP) and the cooler (2) and made of a material that can be formed at a temperature lower than the heat resistance temperature of the smoothing capacitor (401).
[0093] (Appendix 9) A semiconductor device (202D, 202E) according to any one of appendices 1 to 3, The capacitor case (490) of the smoothing capacitor (401) is mounted on the cooler via a thermally conductive material (49).
[0094] (Appendix 10) A semiconductor device (202A to 202E) according to any one of appendix 1 to 9, The terminal (442) of the smoothing capacitor (401) is a root portion (RT) of the smoothing capacitor (401) extending from the capacitor case (490) and away from the circuit pattern (32); A plurality of connection portions (CN) extending from the root portion (RT) and directly connected to the circuit pattern (32); The semiconductor device (202A to 202E) has the following features: the plurality of connection parts (CN) are separated from each other.
[0095] (Appendix 11) A semiconductor device (202A to 202E) according to any one of appendixes 1 to 10, The semiconductor device (202A to 202E) is a wide band gap semiconductor element.
[0096] (Appendix 12) A main conversion circuit (201) having a semiconductor device (202A to 202E) according to any one of appendices 1 to 11, which converts and outputs input power; A control circuit (203) that outputs a control signal for controlling the main conversion circuit to the main conversion circuit; A power conversion device (200) comprising:
[0097] (Appendix 13) A method for manufacturing a semiconductor device for manufacturing the semiconductor device (202B) according to appended claim 6, comprising the steps of: forming the sealant (44) containing a gel; forming the first sealing material (5) containing a gel after the step of forming the sealant (44); The manufacturing method of a semiconductor device comprising the steps of:
[0098] (Appendix 14) A method for manufacturing a semiconductor device for manufacturing the semiconductor device (202A, 202B) according to any one of appendixes 1 to 6, comprising the steps of: a) fixing a fixed portion (480) of the capacitor case (490) of the smoothing capacitor (401) to the cooler (2); b) after step a), joining the terminal (442) of the smoothing capacitor (401) to the circuit pattern (32); The manufacturing method of a semiconductor device comprising the steps of:
[0099] (Appendix 15) A method for manufacturing a semiconductor device according to claim 14, comprising the steps of: The step a) is performed by applying a first fixing member (61) to the fixed portion (480) of the capacitor case (490) of the smoothing capacitor (401); The manufacturing method further comprises: c) mounting the cooler (2) in a housing (7); d) after step c), removing the first fixing member (61); e) applying a second fixing member (62) to the fixed portion (480) of the capacitor case (490) of the smoothing capacitor (401), the cooler (2), and the housing (7) to each other; The manufacturing method of a semiconductor device comprising the steps of: [Explanation of symbols]
[0100] 1 semiconductor element, 2, 2L cooler, 5 first sealing material, 7 housing, 11 submodule, 31 insulating substrate, 32 circuit pattern, 44 sealing material, 49 thermal conductive material, 61 fixing member (first fixing member), 62 fixing member (second fixing member), 130 second sealing material, 200 power conversion device, 201 main conversion circuit, 202A to 202E semiconductor device, 203 control circuit, 204 drive circuit, 401 smoothing capacitor, 440 bus bar, 442 terminal, 450 capacitor element, 451 internal electrode, 480 fixed portion, 490, 490M capacitor case, 501, 501M, 502, 503 substrate case, CN connection portion, CP case portion, FT1 first fitting portion, FT2 second fitting portion, RG1 first region, RG2 second region, RT root portion, SD1 first side, SD2 second side, SL groove.
Claims
1. A cooler, An insulating substrate mounted on the cooler, A circuit pattern provided on the insulating substrate, A semiconductor element electrically connected to the circuit pattern, A smoothing capacitor having an internal electrode that is arranged so as not to overlap the semiconductor element in a plan view, forms a capacitance, a capacitor case that houses the internal electrode, and a terminal that protrudes seamlessly from the capacitor case, A first sealing material that covers at least a part of each of the terminal of the smoothing capacitor, the insulating substrate, and the circuit pattern, comprising, A semiconductor device in which the terminal of the smoothing capacitor and the circuit pattern are directly connected to each other by a bonding force of an interface between the terminal and the circuit pattern.
2. The semiconductor device according to claim 1, wherein the first sealing material contains a gel or rubber.
3. The semiconductor device according to claim 1 or 2, The semiconductor element has a first main surface and a second main surface, The semiconductor device, A first conductor portion connected to the first main surface of the semiconductor element, A second conductor portion connected to the second main surface of the semiconductor element, A second sealing material that covers a part of each of the first conductor portion and the second conductor portion while at least partially exposing each of the first conductor portion and the second conductor portion and seals the semiconductor element, further comprising, wherein the first main surface of the semiconductor element is electrically connected to the circuit pattern via the first conductor portion.
4. The semiconductor device according to claim 1 or 2, It has a first surface facing the cooler and a second surface opposite to the first surface, and extends along a closed curve having a plurality of sides including a first side and a second side so as to surround the insulating substrate on the cooler. A substrate case, A sealing material provided between the second surface of the substrate case and the smoothing capacitor, and made of a material having a lower elastic modulus than each of the material of the substrate case and the material of the capacitor case of the smoothing capacitor. Further comprising, The second surface of the substrate case includes a first region corresponding to the first side and a second region corresponding to the second side and lower than the first region. The smoothing capacitor is attached onto the second region of the second surface via the sealing material. The inside of the substrate case and the smoothing capacitor is filled with the first sealing material. A semiconductor device.
5. The semiconductor device according to claim 4, The semiconductor device, wherein the sealing material contains rubber.
6. The semiconductor device according to claim 4, The substrate case has a first fitting portion provided at a portion corresponding to the second side of the substrate case. The capacitor case has a second fitting portion having a groove into which the first fitting portion is inserted. The sealing material contains a gel and is filled between the first fitting portion and the second fitting portion in the groove of the second fitting portion of the capacitor case. A semiconductor device.
7. The semiconductor device according to claim 1 or 2, A fixing member, A housing attached to the cooler using the fixing member, Further comprising, The capacitor case of the smoothing capacitor has a fixed portion for applying the fixing member. The fixing member fixes the fixed portion of the capacitor case of the smoothing capacitor, the cooler, and the housing to each other. Semiconductor device. **Claim 8** The semiconductor device according to claim 1 or 2, further comprising a substrate case that forms a case portion together with the capacitor case of the smoothing capacitor by being continuously connected to the capacitor case of the smoothing capacitor, the case portion surrounds the insulating substrate on the cooler, and the first sealing material is filled inside the case portion. A semiconductor device further comprising a sealing material made of a material that can be formed at a temperature lower than the heat-resistant temperature of the smoothing capacitor between the case portion and the cooler. **Claim 9** The semiconductor device according to claim 1 or 2, The capacitor case of the smoothing capacitor is mounted on the cooler via a heat conductive material. **Claim 10** The semiconductor device according to claim 1 or 2, The terminals of the smoothing capacitor, extend from the capacitor case of the smoothing capacitor and have a root portion separated from the circuit pattern, a plurality of connection portions extending from the root portion and directly connected to the circuit pattern, and the plurality of connection portions are separated from each other. **Claim 11** The semiconductor device according to claim 1 or 2, The semiconductor element is a wide bandgap semiconductor element. **Claim 12** having the semiconductor device according to claim 1 or 2, a main conversion circuit that converts and outputs input power, A control circuit that outputs a control signal for controlling the main conversion circuit to the main conversion circuit, A power conversion device including the same.
13. A method for manufacturing a semiconductor device for manufacturing the semiconductor device according to claim 6, A step of forming the sealing material containing a gel, After the step of forming the sealing material, a step of forming the first sealing material containing a gel, A method for manufacturing a semiconductor device including the same.
14. A method for manufacturing a semiconductor device for manufacturing the semiconductor device according to claim 1 or 2, a) A step of fixing a fixed portion of the capacitor case of the smoothing capacitor to the cooler, b) After the step a), a step of joining the terminal of the smoothing capacitor and the circuit pattern, A method for manufacturing a semiconductor device including the same.
15. A method for manufacturing a semiconductor device according to claim 14, The step a) is performed by applying a first fixing member to the fixed portion of the capacitor case of the smoothing capacitor, The manufacturing method further includes, c) A step of mounting the cooler on the housing, d) After the step c), a step of removing the first fixing member, e) By applying a second fixing member to the fixed portion of the capacitor case of the smoothing capacitor, a step of fixing the fixed portion of the capacitor case of the smoothing capacitor, the cooler, and the housing to each other, A method for manufacturing a semiconductor device including the same.