Improved angle discretization in decoder-side intra-mode derivation

Abstract

The decoder-side intra mode derivation (DIMD) capability is enhanced by using reference pixels that extend several rows above and several columns to the left of the current video block, including pixels above and to the left of the current video block, as well as columns above and to the right and rows below and to the left of the current video block. The reference pixels are formed from surrounding reconstructed / previously encoded samples surrounding the current video block. The derivation of the intra prediction mode is determined from gradients determined from each of the reference pixels within a defined surrounding region. In one embodiment, the gradients are determined using horizontal and vertical filters. In a sub-embodiment, the filters do not extend beyond the defined surrounding region. In another embodiment, a reassignment of an index indicating a target intra prediction mode is performed.

Description

[Technical field]

[0001] At least one of the present embodiments generally relates to a method or apparatus for video encoding or decoding, compression or decompression. [Background technology]

[0002] To achieve high compression efficiency, image and video coding schemes usually employ prediction, including motion vector prediction, and transformation to exploit spatial and temporal redundancy in the video content. In general, intra- or inter-prediction is used to exploit correlation within or between frames, whereby the difference between an original image and a predicted image, often referred to as a prediction error or prediction residual, is transformed, quantized, and entropy coded. To reconstruct the video, the compressed data is decoded by an inverse process corresponding to entropy coding, quantization, transformation, and prediction. Summary of the Invention

[0003] At least one of the present embodiments generally relates to a method or apparatus for video encoding or decoding, and more specifically, to a method or apparatus for improving the coding efficiency of decoder-side intra mode derivation from surrounding reference pixels.

[0004] According to a first aspect, there is provided a method, the method including determining one or more gradients for reference pixels surrounding a current video block, determining an intra-prediction mode to use to encode the current video block based on the gradients, and encoding the current video block using the determined intra-prediction mode.

[0005] According to a second aspect, another method is provided that includes determining one or more gradients for reference pixels surrounding a current video block, determining an intra-prediction mode to use to encode the current video block based on the gradients, and decoding the current video block using the determined intra-prediction mode.

[0006] According to another aspect, there is provided an apparatus comprising a processor, the processor may be configured to encode a block of a video or decode a bitstream by performing any of the methods described above.

[0007] According to another general aspect of at least one embodiment, there is provided a device comprising an apparatus according to any of the decoding embodiments and at least one of: (i) an antenna configured to receive a signal, the signal including a video block; (ii) a band limiter configured to limit the received signal to a frequency band including the video block; or (iii) a display configured to display an output representative of the video block.

[0008] According to another general aspect of at least one embodiment, a non-transitory computer-readable medium is provided that includes data content generated in accordance with any of the described encoding embodiments or variations.

[0009] According to another general aspect of at least one embodiment there is provided a signal including video data generated according to any of the described encoding embodiments or variations.

[0010] According to another general aspect of at least one embodiment, a bitstream is formatted to include data content generated according to any of the described encoding embodiments or variations.

[0011] According to another general aspect of at least one embodiment, there is provided a computer program product including instructions that, when executed by a computer, cause the computer to perform any of the described decoding embodiments or variations.

[0012] These and other aspects, features, and advantages of the general aspects will become apparent from the following detailed description of exemplary embodiments, which is to be read in conjunction with the accompanying drawings. [Brief description of the drawings]

[0013] [Figure 1] 1 shows decoded reference samples for intra prediction in Versatile Video Coding (VVC). [Diagram 2] 1 illustrates the core intra prediction modes in VVC for predicted square blocks. [Diagram 3] We show prediction of a 4×4 luma block via MIP mode with index k ∈ [|0,15|]. [Figure 4] We show prediction of an 8×4 luma block via MIP mode with index k∈[|0,7|]. [Diagram 5] 13 shows the mapping from MIP mode index to MIP matrix index for a predicted 4×4 luma block. [Figure 6] 13 shows the mapping from MIP mode index to MIP matrix index for a predicted 8×4 luma block. [Figure 7] Illustrates extraction of gradients from the context of the predicted WxH block. [Figure 8] 13 illustrates the identification of a range of target intra-prediction mode indices from the absolute values ​​of GVER and GHOR and the signs of GVER and GHOR. [Figure 9]If |GVER|>|GHOR|, we show the calculation of the angle θ between the reference axes of the components GVER and GHOR and the direction perpendicular to the gradient G, where GVER<0 and GHOR<0. [Figure 10] If |GHOR|≧|GVER|, we show the calculation of the angle θ between the reference axis of the components GVER and GHOR and the direction perpendicular to the gradient G, where GVER<0 and GHOR<0. [Figure 11] Calculation of the index of the target intra-prediction mode index for the condition in Fig. 9, i.e., |GVER|>|GHOR|, where GVER<0 and GHOR<0. [Figure 12] 10 shows the calculation of the index of the target intra-prediction mode index in the condition |GHOR|≧|GVER|, where GVER<0 and GHOR<0. [Figure 13] Shows the extension of the DIMD context for the WxH block. [Figure 14] 1 illustrates the extension of a block's DIMD context under certain conditions. [Figure 15] 2 illustrates the extension of a block's DIMD context under certain conditions. [Figure 16] 3 illustrates the extension of a block's DIMD context under certain conditions. [Figure 17] 4 illustrates the extension of a block's DIMD context under certain conditions. [Figure 18] 5 illustrates the extension of a block's DIMD context under certain conditions. [Figure 19] 1 illustrates one embodiment of a method for carrying out the described aspects. [Figure 20] 1 illustrates another embodiment of a method for carrying out the described aspects. [Figure 21] 1 illustrates one embodiment of an apparatus for carrying out the described aspects. [Figure 22] 1 denotes a general purpose video encoding or compression system. [Diagram 23]1 illustrates a general purpose video decoding or decompression system. [Figure 24] 1 illustrates a processor-based system for implementing the described aspects. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014] The general aspects described herein relate to Decoder-Side Intra Mode Derivation (DIMD), an intra prediction tool for block-based video coding. In this section, we first introduce the key intra prediction tool in VVC (currently one of the top block-based video codecs in terms of compression performance). We then present DIMD and its formulation in the ECM (Enhanced Compression Model) software. ECM is developed at JVET to show improved compression performance over VVC. Finally, issues regarding context and angle discretization in DIMD are pointed out.

[0015] Core Intra Prediction in VVC inherited from HEVC For a given block to be predicted, intra prediction in VVC consists of collecting decoded reference samples, propagating the decoded reference samples to the predicted block, and finally, post-processing the samples of the predicted block.

[0016] The generation of decoded reference samples is illustrated in FIG. 1, which shows decoded reference samples for intra prediction in VVC for a predicted W×H block. The decoded reference sample value at coordinates (x,y) is denoted by P(x,y). Note that the coordinate system conventionally used in video compression is used, i.e., in (x,y), x denotes pixel column and y denotes pixel row. The predicted W×H block is displayed in white and its decoded reference samples in gray. Here, H=4 and W=8. The "top" row of 2W samples is formed from previously decoded pixels located above the current block, W denotes the block width. Similarly, the "left" column of 2H samples is formed from decoded pixels located to the left of the current block, H denotes the block height. Corner pixels are also used to fill the gap between the "top" row reference and the "left" column reference. If some of the samples above and / or to the left of the current block are not available, a method called reference sample substitution is performed, where the missing samples are copied in a clockwise direction from the available samples. Then, depending on the current coding unit (CU) size and the intra-prediction mode used, the reference samples are filtered using a specified filter.

[0017] Model for core intra prediction VVC includes a range of linear models for intra prediction, called intra prediction modes. Each mode propagates the decoded reference samples to the prediction block in a different way. PLANAR and DC modes predict smooth, gradually changing regions. In contrast, directional modes capture directional structures. There are 65 directional intra prediction modes in VVC (see Fig. 2), which are organized differently for each rectangular block shape. Fig. 2 shows the core intra prediction modes in VVC for a predicted square block. Each arrow represents the propagation direction of the decoded reference samples to the prediction block associated with a different directional intra prediction mode. Half of the arrows are associated with directional intra prediction modes present in HEVC. The remaining arrows are associated with directional intra prediction modes that do not exist in HEVC but are additionally present in VVC.

[0018] VVC-specific intra prediction tools The two main intra prediction tools specific to VVC appear to be matrix-based intra prediction (MIP) and component-to-component linear model (CCLM) for two reasons. First, MIP and CCLM appear to be the two pure intra prediction tools that bring the largest gain in terms of compression performance from HEVC to VVC. Second, while MIP and CCLM introduce new intra prediction modes, other intra prediction tools specific to VVC, called multiple reference lines, intra subdivision, and position-dependent prediction combining, can be considered as variants of the intra prediction modes described in the previous section. In particular, MIP appears to be more appropriate in this description. In fact, DIMD, which is the main topic here, does not directly interact with CCLM, since in the literature, DIMD and MIP are used for luminance blocks, whereas CCLM is classified as a chrominance-only tool.

[0019] Matrix-Based Intra Prediction (MIP) MIP is a linear intra-prediction mode with fixed training matrices at both the encoder and decoder sides.

[0020] The prediction of a W×H luma block via MIP mode is decomposed into three steps. First, the W decoded reference samples above the block and the H decoded reference samples to its left are downsampled. Then, the downsampling result is linearly transformed into a downsampling prediction. Finally, if necessary, the downsampling prediction is linearly interpolated so that the interpolated prediction has the same size as the W×H luma block.

[0021] More precisely, when W=4 and H=4, the downsampling factor is 2. In addition, the MIP matrix in the linear transformation has a size of 16×4 (4 input samples and 16 output samples) (see FIG. 3). When W=4 and H=8 or W=8 and H=4 or W=8 and H=8, the downsampling factor of W decoded reference samples is W / 4 and the downsampling factor of H decoded reference samples is H / 4. In addition, the MIP matrix in the linear transformation has a size of 16×8 (8 input samples and 16 output samples) (see FIG. 4). For all other block sizes, the downsampling factor of W decoded reference samples is W / 4 and the downsampling factor of H decoded reference samples is H / 4. In addition, the size of the MIP matrix in the linear transformation is 64×8 (8 input samples and 64 output samples). For the interpolation step, it should be noted that the horizontal interpolation of the downscaling prediction uses some of the H decoded reference samples, but not their downsampled versions, and the vertical interpolation of the downscaling prediction uses some of the W decoded reference samples, but not their downsampled versions.

[0022] When W=4 and H=4, there are 32 MIP modes. These modes are divided into pairs, each pair uses the same MIP matrix, but in the second mode of each pair, the downsampled reference sample above the luma block and the downsampled reference sample to its left are swapped. The mapping from MIP mode index to MIP matrix index is shown in Figure 5. When swapping downsampled reference samples is applied, the downscaling prediction is transposed before being interpolated. When W=4 and H=8 or W=8 and H=4 or W=8 and H=8, there are 16 MIP modes, and mode pairs are still applied (see Figure 6). For all other block sizes, 12 MIP modes are used, and mode pairs are still applied.

[0023] Decoder-side intra mode derivation (DIMD) DIMD relies on the assumption that the decoded pixels surrounding a given block to be predicted carry information to infer the texture directivity in this block, i.e., the intra-prediction mode that is most likely to produce a prediction with the highest quality. This section first describes the DIMD process. It then focuses on issues related to context and angle discretization in DIMD. Note that, as pointed out above, all the descriptions apply in the same way to both the encoder side and the decoder side.

[0024] Inference in DIMD The inference of the index of the intra prediction mode most likely to produce the highest quality prediction according to DIMD is decomposed into three steps. First, gradients are extracted from the context of decoded pixels around the given block to be predicted. These gradients are then used to fill a Histogram of Oriented Gradient (HOG). Finally, the index of the intra prediction mode most likely to give a prediction with the highest quality is derived from this HOG and blending can be performed.

[0025] Extracting gradients from context For a given block to be predicted, an L-shaped context of h rows of decoded pixels above this block and w columns of decoded pixels to the left of this block is considered (see FIG. 7), which shows the extraction of gradients from the context of the predicted W×H block. The predicted block is shown in white. The context of this block is shown in gray. The context includes h rows of decoded pixels located above the block and w columns of pixels located to the left of the block. The gradient filter is surrounded by a black box. At each decoded pixel of interest in this context, local vertical gradients and local horizontal gradients are calculated. In conventional studies, the local vertical gradients and local horizontal gradients are calculated by 3×3 vertical and horizontal Sobel filters. Furthermore, in conventional methods, the decoded pixels of interest in this context refer to decoded pixels whose gradient filters do not fall outside the context boundary. Therefore, in these studies, the complete extraction of gradients can be summarized by the "effective" convolution of the 3×3 vertical and horizontal Sobel filters with the context.

[0026] Histogram of Oriented Gradients (HOG) filling In HOG, each bin is associated with the index of a different directional intra-prediction mode. At initialization, all HOG bins are set to 0. The local vertical gradient G VER and the local horizontal gradient G HOR For each decoding pixel of interest, where is calculated, the direction is G VER and G HOR and the bin associated with the index of the directional intra-prediction mode whose direction is closest to the derived direction is incremented. This index is called the "target intra-prediction mode index."

[0027] More precisely, for a given decoded pixel of interest, G VER and G HOR The derivation of the direction from G is based on the following observation: during prediction of a block with a directional intra-prediction mode, the maximum gradient in absolute value usually follows perpendicular to the mode direction. VER and GHOR The direction derived from the component G VER and G HOR For example, in the ECM framework, using 65 VVC directional intra prediction modes, we consider vertical and horizontal gradient filters where the direction of positive vertical gradients goes from top to bottom and the direction of positive horizontal gradients goes from right to left, and we apply G VER and G HOR Absolute value of and G VER and G HOR The mapping from the codes of to the range of target intra-prediction mode indices is displayed in FIG.

[0028] Here, |G VER |>|G HOR If |, the reference axis is the horizontal axis. Otherwise, the reference axis is the vertical axis. VER and G HOR The angle θ between the reference axis of and the direction perpendicular to the gradient G is tan(θ)=|G HOR | / |G VER is given by |G VER |>|G HOR If |, then tan(θ) = |G VER | / |G HOR |Otherwise, see Figures 9 and 10.

[0029] Local vertical gradient G VER and the local horizontal gradient G HOR For the range of intra prediction mode indices found as in FIG. 8 for the current decoded pixel of interest for which |G| is calculated, it is now possible to find the index of the intra prediction mode whose angle with respect to the reference axis is closest to θ. Then, the bin associated with the index of the found target intra prediction mode is |G| HOR |+|G VER This means that H[i]=H[i]+|G HOR |+|G VER This means that |

[0030] For the currently decoded pixel of interest, G HOR =G VER Note that if =0, then no bins in the HOG are incremented.

[0031] Estimation of intra prediction mode(s) Once the HOG filling is complete, the index of the directional intra-prediction mode most likely to produce the prediction with the highest quality is the one associated with the bin with the largest magnitude. In some variants of DIMD, the two bins with the largest magnitudes are identified to find the index of the directional intra-prediction mode most likely to result in the two predictions with the highest quality according to DIMD, and these two modes are optionally linearly combined with PLANAR.

[0032] DIMD signaling in the ECM In the ECM, for a given luma coding block (CB) to be predicted, the DIMD is signaled via a DIMD flag that is placed first in the decision tree for signaling the intra-prediction mode selected to predict this luma CB, i.e., before the template matching prediction flag and the MIP flag.

[0033] Problems related to DIMD Limited Context Expansion For a given block to be predicted, the context, in its general design, does not include the decoded pixels on the top right side of this block, and does not include the decoded pixels on its bottom left side. However, depending on the size of the current coding unit (CU), its position in the current coding tree unit (CTU), and its position in the current frame, the decoded pixels on the top right side and / or the bottom left side of this block may be available. If most of the relevant intensity gradients are located on the top right side and / or the bottom left side of this block, the fact that these decoded pixels are not included in the context can be considered as a significant loss of available information.

[0034] Discontinuities in the angle discretization In a typical implementation of DIMD, such as the one in the file “IntraPrediction.cpp” in the ECM-2.0 software, for a given decoded pixel, the local vertical gradient G VER and the local horizontal gradient G HOR is calculated for the found range of target intra-prediction mode indexes (see FIG. 8), and the angle θ is not directly compared with the angle of each intra-prediction mode relative to its reference axis in this range. In fact, in VVC and ECM, the absolute angle of each intra-prediction mode relative to its reference axis is stored in a scaled integer format. Thus,

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[0037] In a typical implementation of DIMD, such as that in the file "IntraPrediction.cpp" of the ECM-2.0 software, |G HOR |=|G VER |That is,

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[0040] The general aspects of this description aim to remedy discontinuities in the limited range and angle discretization of the DIMD context.

[0041] Regarding the limited scope of the DIMD context, it is proposed to extend the DIMD context towards the top right side of the current block and towards its bottom left side.

[0042] Regarding discontinuities in the angle discretization, |G HOR |=|G VER |, i.e.

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[0045] DIMD Context Extensions For a given predicted W×H block, the DIMD context can be extended towards the top right side of this block and towards its bottom left side. In an example, extending towards the top right side of this block can cover as many available decoded pixels as possible at the limit of W additional columns of decoded pixels. Extending towards the bottom left side of this block can cover as many available decoded pixels as possible at the limit of H additional rows of decoded pixels (see Figures 13, 14, 15, 16, and 17).

[0046] Figure 13 shows the extension of the DIMD context of a WxH block towards the top right and bottom left of the block, where all decoded pixels are available in the bottom left H rows of the block and all decoded pixels are available in the top right W rows of the block. The context is shown in grey. The block is shown in white. The black dashed line shows the boundary between available decoded pixels and unavailable pixels. Here H=4, W=8 and h=w=4.

[0047] Figure 14 shows the extension of the DIMD context of a WxH block towards the top right and bottom left of the block, where in the bottom left H rows of the block none of the decoded pixels are available and in the top right W rows of the block all the decoded pixels are available. The context is shown in grey. The block is shown in white. The black dashed line shows the boundary between the available decoded pixels and the unavailable pixels. Here H=4, W=8 and h=w=4.

[0048] Figure 15 shows the extension of the DIMD context of a WxH block towards the top right and bottom left of the block, where in the bottom left H rows of the block all decoded pixels are available and in the top right W rows of the block none of the decoded pixels are available. The context is shown in grey. The block is shown in white. The black dashed line shows the boundary between available decoded pixels and unavailable pixels. Here H=4, W=8 and h=w=4.

[0049] Figure 16 shows the extension of the DIMD context of a WxH block towards the top right and bottom left of the block, where no decoded pixels are available at the bottom left of the block, and all decoded pixels are available in the top right W rows of the block. The context is shown in grey. The block is shown in white. The black dashed line shows the boundary between available decoded pixels and unavailable pixels. Here H=4, W=8 and h=w=4.

[0050] Figure 17 shows the extension of the DIMD context of a WxH block towards the top right and bottom left of this block, when in the bottom left H rows of this block all decoded pixels are available and none of the decoded pixels above this block are available. The context is shown in grey. The block is shown in white. The black dashed line shows the boundary between the available decoded pixels and the unavailable pixels. Here H=4, W=8 and h=w=4.

[0051] Thus, in terms of availability of decoded reference pixels, extraction of the DIMD context is equivalent to collection of decoded reference samples in VVC, except that the DIMD context includes w columns (instead of 1) of decoded pixels to the left of this block and h rows (instead of 1) of decoded pixels above this block. In this case, since the set of decoded reference samples is always included in the DIMD context for a given W×H block to be predicted, the decoded reference samples used to perform prediction of this block via the intra prediction mode(s) inferred by DIMD are necessarily included in the computation of gradients in DIMD. This ensures some consistency between texture analysis in DIMD and prediction via the intra prediction mode(s) inferred by DIMD.

[0052] In the example, unlike the collection of decoded reference samples in VVC, there is no substitution of unavailable decoded pixels in the extraction of the DIMD context of the current block: in fact, in the substituted decoded pixels, the local gradient values ​​may be tilted upwards by artificially introduced pixel values.

[0053] In the example, local gradients can be calculated exclusively at available decoded pixels, and their values ​​can be used to increment HOG bins. At unavailable decoded pixels, local gradients cannot be calculated, and none of the HOG bins are incremented for the unavailable decoded pixels. Figure 18 shows that for Figure 14, local gradients are calculated at available decoded pixels using a 3x3 horizontal gradient filter and a 3x3 vertical gradient filter. That is, Figure 18 shows available decoded pixels in a DIMD context of a WxH block, and black-filled local gradients are calculated. Two local gradients are calculated at each black-filled decoded pixel using a 3x3 horizontal gradient filter and a 3x3 vertical gradient filter. Although the grey available decoded pixels belong to the DIMD context, local gradients are not calculated at them because the gradient filters fall outside the DIMD context boundary. Here H=4, W=8, and h=w=4.

[0054] Continuous angle discretization in DIMD As mentioned above, |G HOR |=|G VER |, i.e.

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[0057] Therefore, in the current implementation of ECM-2.0, |G HOR |=|G VER | and G HOR and GVER If |G |G have the same sign, then the target intra-prediction mode index is 34. HOR |=|G VER | and G HOR and G VER If x has the opposite sign, then the target intra-prediction mode index is 66.

[0058] The above principles can be easily generalized to different parameterizations of the directional intra-prediction modes that DIMD can infer. For example, if the number of directional intra-prediction modes that DIMD can infer increases from 65 to 129, the index of the horizontal mode becomes 34, the index of the diagonal mode becomes 66, the index of the vertical mode becomes 98, and the index of the vertical diagonal mode becomes 130. Furthermore, from θ

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[0062] One embodiment of a method 1900 under the general aspects described herein is shown in Figure 19. The method begins at start block 1901, where control passes to block 1910, which determines one or more gradients of reference pixels surrounding a current video block. Control passes from block 1910 to block 1920, which determines an intra-prediction mode to use to encode the current video block based on the gradients, and control passes from block 1920 to block 1930, which encodes the current video block using the determined intra-prediction mode.

[0063] One embodiment of a method 2000 under the general aspects described herein is shown in Figure 20. The method begins at start block 2001, where control passes to block 2010, which determines one or more gradients of reference pixels surrounding a current video block. Control passes from block 2010 to block 2020, which determines an intra-prediction mode to use for decoding the current video block based on the gradients, and control passes from block 2020 to block 2030, which decodes the current video block using the determined intra-prediction mode.

[0064] 7 illustrates one embodiment of an apparatus 700 for encoding, decoding, compressing, or decompressing video data using extended reference regions for decoder intra mode derivation. The apparatus includes a processor 710 and may be interconnected through at least one port to a memory 720. Both the processor 710 and the memory 720 may also have one or more additional interconnections to external connections.

[0065] Additionally, the processor 710 is configured to insert or receive information in a bitstream and compress, encode, or decode using any of the aspects described.

[0066] The embodiments described herein include various aspects, including tools, features, embodiments, models, methods, and the like. Many of these aspects have been specifically described and described in a manner that may often sound limiting, at least to indicate their individual characteristics. However, this is for purposes of clarity of description and does not limit the applicability or scope of the aspects. In fact, all of the different aspects can be combined and substituted to provide further aspects. Moreover, these aspects can also be combined and substituted with aspects described in previous applications as well.

[0067] The aspects described and contemplated in this application can be implemented in many different forms. Figures 22, 23, and 24 provide some embodiments, but other embodiments are contemplated, and the discussion of Figures 22, 23, and 24 does not limit the scope of the implementations. At least one of the aspects generally relates to video encoding and decoding, and at least one other aspect generally relates to transmitting a generated or encoded bitstream. These and other aspects can be implemented as a method, an apparatus, a computer-readable storage medium having stored thereon instructions for encoding or decoding video data according to any of the described methods, and / or a computer-readable storage medium having stored thereon a bitstream generated according to any of the described methods.

[0068] In this application, the terms "reconstructed" and "decoded" may be used interchangeably, the terms "pixel" and "sample" may be used interchangeably, and the terms "image", "picture", and "frame" may be used interchangeably. Usually, but not necessarily, the term "reconstructed" is used on the encoder side, while the term "decoded" is used on the decoder side.

[0069] Various methods are described herein, each of which includes one or more steps or actions for achieving the described method. Unless a specific order of steps or actions is required for proper operation of the method, the order and / or use of specific steps and / or actions may be modified or combined.

[0070] Various methods and other aspects described herein may be used to modify modules of the video encoder 100 and the video decoder 200, such as the intra prediction module, the entropy coding module, and / or the decoding module (160, 360, 145, 330) as shown in Figures 22 and 23. Furthermore, aspects of the present disclosure are not limited to VVC or HEVC, but may be applied to other standards and recommendations, such as existing or future developments, and extensions of any such standards and recommendations, including VVC and HEVC. Unless otherwise specified or technically excluded, aspects described herein may be used individually or in combination.

[0071] In this application, various numerical values ​​are used. The specific values ​​are for illustrative purposes and the described aspects are not limited to these specific values.

[0072] 22 shows an encoder 100. Variations of this encoder 100 are contemplated, but for clarity, the encoder 100 is described below without describing all possible variations.

[0073] Before being encoded, a video sequence may undergo pre-encoding processing (101), such as applying a color transformation to the input color picture (e.g., from RGB 4:4:4 to YCbCr 4:2:0) or performing a remapping of the input picture components to obtain a signal distribution that is more resilient to compression (e.g., using histogram equalization of one of the color components). Metadata may be associated with the pre-processing and added to the bitstream.

[0074] In the encoder 100, a picture is coded by the encoder elements as described below. The picture to be coded is divided (102) into units, e.g., CUs, and processed. Each unit is coded, e.g., using either intra mode or inter mode. When a unit is coded in intra mode, it performs intra prediction (160). In inter mode, motion estimation (175) and motion compensation (170) are performed. The encoder decides (105) whether to use intra mode or inter mode to code the unit, and indicates the intra / inter decision, e.g., by a prediction mode flag. A prediction residual is calculated (110), e.g., by subtracting the predicted block from the original image block.

[0075] The prediction residual is then transformed (125) and quantized (130). The quantized transform coefficients, as well as the motion vectors and other syntax elements, are entropy coded (145) to output a bitstream. The encoder can skip the transform and apply quantization directly to the untransformed residual signal. The encoder can bypass both the transform and quantization, i.e., the residual is coded directly without applying a transform or quantization process.

[0076] The encoder decodes the coded block to provide a reference for further prediction. The quantized transform coefficients are dequantized (140) and inverse transformed (150) to decode the prediction residual. The decoded prediction residual and the predicted block are combined (155) to reconstruct an image block. An in-loop filter (165) is applied to the reconstructed picture to perform, for example, deblocking / Sample Adaptive Offset (SAO) filtering to reduce coding artifacts. The filtered image is stored in a reference picture buffer (180).

[0077] Figure 23 shows a block diagram of a video decoder 200. In the decoder 200, the bitstream is decoded by decoder elements as described below. The video decoder 200 generally performs a decoding pass that is the inverse of the encoding pass as described in Figure 22. The encoder 100 also generally performs video decoding as part of encoding the video data.

[0078] In particular, the decoder's input includes a video bitstream, which may be generated by video encoder 100. The bitstream is first entropy decoded (230) to obtain transform coefficients, motion vectors, and other coded information. Picture partition information indicates how the picture is partitioned. The decoder may then partition the picture according to the decoded picture partition information (235). The transform coefficients are inverse quantized (240) and inverse transformed (250) to decode the prediction residual. The decoded prediction residual and the predicted block are combined (255) to reconstruct an image block. A prediction block may be obtained (270) from intra prediction (260) or motion compensated prediction (i.e., inter prediction) (275). An in-loop filter (265) is applied to the reconstructed image. The filtered image is stored in a reference picture buffer (280).

[0079] The decoded picture may further undergo post-decoding processing (285), such as an inverse color conversion (e.g., converting YcbCr 4:2:0 to RGB 4:4:4), or inverse remapping, which performs the inverse of the remapping process performed in the pre-encoding processing (101). The post-decoding processing may use metadata derived in the pre-encoding processing and signaled in the bitstream.

[0080] FIG. 24 illustrates a block diagram of an example of a system in which various aspects and embodiments are implemented. System 1000 may be embodied as a device including various components described below and configured to perform one or more of the aspects described herein. Examples of such devices include, but are not limited to, various electronic devices such as personal computers, laptop computers, smartphones, tablet computers, digital multimedia set-top boxes, digital television receivers, personal video recording systems, connected appliances, and servers. The elements of system 1000, alone or in combination, may be embodied in a single integrated circuit (IC), multiple ICs, and / or separate components. For example, in at least one embodiment, the processing elements and encoder / decoder elements of system 1000 are distributed across multiple ICs and / or separate components. In various embodiments, system 1000 is communicatively coupled to one or more other systems or other electronic devices, for example, via a communication bus or through dedicated input and / or output ports. In various embodiments, system 1000 is configured to implement one or more of the aspects described in this document.

[0081] The system 1000 includes at least one processor 1010 configured to execute instructions loaded therein, for example to implement various aspects described herein. The processor 1010 can include embedded memory, input / output interfaces, and various other circuits known in the art. The system 1000 includes at least one memory 1020 (e.g., a volatile memory device and / or a non-volatile memory device). The system 1000 includes a storage device 1040, which can include non-volatile memory and / or volatile memory, including, but not limited to, Electrically Erasable Programmable Read-Only Memory (EEPROM), Read-Only Memory (ROM), Programmable Read-Only Memory (PROM), Random Access Memory (RAM), Dynamic Random Access Memory (DRAM), Static Random Access Memory (SRAM), Flash, magnetic disk drives, and / or optical disk drives. Storage devices 1040 may include, by way of non-limiting examples, internal storage devices, attached storage devices (including removable and non-removable storage devices), and / or network-accessible storage devices.

[0082] The system 1000 includes an encoder / decoder module 1030 configured to process data to provide, for example, encoded or decoded video, which may include its own processor and memory. The encoder / decoder module 1030 represents a module(s) that may be included in a device for performing encoding and / or decoding functions. As is known, a device may include one or both of an encoding module and a decoding module. Furthermore, the encoder / decoder module 1030 may be implemented as a separate element of the system 1000, or may be incorporated within the processor 1010 as a combination of hardware and software, as is known to those skilled in the art.

[0083] Program code loaded into the processor 1010 or the encoder / decoder 1030 to perform various aspects described herein may be stored in the storage device 1040 and subsequently loaded into the memory 1020 for execution by the processor 1010. According to various embodiments, one or more of the processor 1010, the memory 1020, the storage device 1040, and the encoder / decoder module 1030 may store one or more of various items during execution of the processes described herein. Such stored items may include, but are not limited to, input video, decoded video or portions of decoded video, bitstreams, matrices, variables, and intermediate or final results from processing of equations, expressions, operations, and operational logic.

[0084] In some embodiments, memory internal to the processor 1010 and / or the encoder / decoder module 1030 is used to store instructions and provide working memory for processing required during encoding or decoding. However, in other embodiments, memory external to the processing device (e.g., the processing device can be either the processor 1010 or the encoder / decoder module 1030) is used for one or more of these functions. The external memory can be the memory 1020 and / or the storage device 1040, e.g., dynamic volatile memory and / or non-volatile flash memory. In some embodiments, the external non-volatile flash memory is used to store, for example, the operating system of the television. In at least one embodiment, a fast external dynamic volatile memory such as RAM is used as working memory for video encoding and decoding operations such as MPEG-2 (MPEG is referred to as Moving Picture Experts Group, MPEG-2 is also referred to as ISO / IEC 13818, 13818-1 is also known as H.222, and 13818-2 is also known as H.262), HEVC (HEVC is referred to as High Efficiency Video Coding, also known as H.265 and MPEG-H Part 2), or VVC (Versatile Video Coding, a new standard being developed by JVET).

[0085] Inputs to the elements of system 1000 may be provided through a variety of input devices as shown in block 1130. Such input devices may include, but are not limited to, (i) a radio frequency (RF) section that receives, for example, an RF signal transmitted throughout a broadcast by a broadcaster, (ii) a component (COMP) input terminal (or set of COMP input terminals), (iii) a Universal Serial Bus (USB) input terminal, and / or (iv) a High Definition Multimedia Interface (HDMI) input terminal. Although not shown in FIG. 24, other examples include composite video.

[0086] In various embodiments, the input devices of block 1130 have associated respective input processing elements as known in the art. For example, the RF section may be associated with elements suitable for (i) selecting a desired frequency (also referred to as selecting a signal or band-limiting a signal to a frequency band), (ii) down-converting the selected signal, (iii) band-limiting again to a narrower frequency band to select a signal frequency band that may be referred to as a channel in a particular embodiment (for example), (iv) demodulating the down-converted band-limited signal, (v) performing error correction, and (vi) demultiplexing to select a desired stream of data packets. The RF section of various embodiments includes one or more elements that perform these functions, such as a frequency selector, a signal selector, a band limiter, a channel selector, a filter, a down-converter, a demodulator, an error corrector, and a demultiplexer. The RF section may include a tuner that performs various of these functions, including, for example, down-converting a received signal to a lower frequency (e.g., an intermediate frequency or a near-baseband frequency) or to baseband. In one embodiment of a set-top box, the RF section and its associated input processing elements receive RF signals transmitted over a wired (e.g., cable) medium and perform frequency selection by filtering, downconverting, and refiltering to a desired frequency band. Various embodiments rearrange the order of the above-described (and other) elements, remove some of these elements, and / or add other elements that perform similar or different functions. Adding elements may include inserting elements between existing elements, such as, for example, inserting amplifiers and analog-to-digital converters. In various embodiments, the RF section includes an antenna.

[0087] Additionally, the USB and / or HDMI terminals may include respective interface processors for connecting the system 1000 to other electronic devices via USB and / or HDMI connections. It should be understood that various aspects of the input processing, e.g., Reed-Solomon error correction, may be implemented, for example, in a separate input processing IC or within the processor 1010, as desired. Similarly, aspects of the USB or HDMI interface processing may be implemented in a separate interface IC or within the processor 1010, as desired. For example, the processor 1010 and various processing elements, including an encoder / decoder 1030, which operates in combination with memory and storage elements, to process the data stream as desired for presentation on an output device by providing a demodulated, error corrected, and demultiplexed stream to various processing elements, including an encoder / decoder 1030, which operates in combination with memory and storage elements.

[0088] The various elements of system 1000 may be provided within an integrated housing in which the various elements can be interconnected and transmit data between each other using suitable connection arrangements, e.g., internal buses known in the art, including the Inter-IC (I2C) bus, wiring, and printed circuit boards.

[0089] The system 1000 includes a communication interface 1050 that enables communication with other devices over a communication channel 1060. The communication interface 1050 may include, but is not limited to, a transceiver configured to transmit and receive data over the communication channel 1060. The communication interface 1050 may include, but is not limited to, a modem or a network card, and the communication channel 1060 may be implemented, for example, in a wired medium and / or a wireless medium.

[0090] Data is streamed or otherwise provided to the system 1000 in various embodiments using a wireless network such as a Wi-Fi network, e.g., IEEE 802.11 (IEEE refers to the Institute of Electrical and Electronics Engineers). The Wi-Fi signal in these embodiments is received by a communication channel 1060 and a communication interface 1050 adapted for Wi-Fi communication. The communication channel 1060 in these embodiments is typically connected to an access point or router that provides access to external networks, including the Internet, to enable streaming applications and other over-the-top communications. In other embodiments, the streamed data is provided to the system 1000 using a set-top box that delivers data through an HDMI connection of the input block 1130. In yet other embodiments, the streamed data is provided to the system 1000 using an RF connection of the input block 1130. As indicated above, various embodiments provide data in a non-streaming manner. Additionally, various embodiments use wireless networks other than Wi-Fi, e.g., a cellular network or a Bluetooth network.

[0091] The system 1000 can provide output signals to various output devices, including a display 1100, speakers 1110, and other peripheral devices 1120. The display 1100 in various embodiments includes, for example, one or more of a touch screen display, an organic light emitting diode (OLED) display, a curved display, and / or a foldable display. The display 1100 can be for a television, a tablet, a laptop, a mobile phone, or another device. The display 1100 can also be integrated with other components (e.g., as in the case of a smartphone) or can be separate (e.g., an external monitor for a laptop). The other peripheral devices 1120 include, in various example embodiments, one or more of a standalone digital video disc (or digital versatile disc) (DVR in both terms), a disc player, a stereo system, and / or a lighting system. Various embodiments use one or more peripheral devices 1120 that provide functionality based on the output of the system 1000. For example, a disc player performs the function of playing the output of the system 1000.

[0092] In various embodiments, control signals are communicated between the system 1000 and the display 1100, speaker 1110, or other peripheral devices 1120 using signal transmission such as AV.Link, Consumer Electronics Control (CEC), or other communication protocols that allow control between devices with or without user intervention. The output devices can be communicatively coupled to the system 1000 via dedicated connections through respective interfaces 1070, 1080, and 1090. Alternatively, the output devices can be connected to the system 1000 via the communication interface 1050 using the communication channel 1060. The display 1100 and speaker 1110 can be integrated into a single unit with other components of the system 1000 in an electronic device such as, for example, a television. In various embodiments, the display interface 1070 includes a display driver, such as, for example, a timing controller (T Con) chip.

[0093] For example, if the RF portion of input 1130 is part of a separate set-top box, display 1100 and speakers 1110 may alternatively be separate from one or more of the other components. In various embodiments where display 1100 and speakers 1110 are external components, the output signal may be provided via a dedicated output connection including, for example, an HDMI port, a USB port, or a COMP output.

[0094] The embodiments may be performed by computer software implemented by the processor 1010, or by hardware, or by a combination of hardware and software. As a non-limiting example, the embodiments may be implemented by one or more integrated circuits. The memory 1020 may be of any type suitable for the technology environment, and may be implemented using any suitable data storage technology, such as, as non-limiting examples, optical memory devices, magnetic memory devices, semiconductor-based memory devices, fixed memory, and removable memory devices. The processor 1010 may be of any type suitable for the technology environment, and may include, as non-limiting examples, one or more of a microprocessor, a general-purpose computer, a special-purpose computer, and a processor based on a multi-core architecture.

[0095] Various implementations involve decoding. "Decoding" as used herein can encompass all or part of the processing performed on a received encoded sequence to generate a final output suitable for display, for example. In various embodiments, such processes include one or more of the processes typically performed by a decoder, such as, for example, entropy decoding, inverse quantization, inverse transform, and differential decoding. In various embodiments, such processes also or alternatively include processes performed by the decoders of the various implementations described herein.

[0096] As a further example, in one embodiment, "decoding" refers to entropy decoding only, in another embodiment, "decoding" refers to differential decoding only, and in another embodiment, "decoding" refers to a combination of entropy decoding and differential decoding. Whether the phrase "decoding process" is intended to refer to a task subset specifically or to the broader decoding process as a whole will be clear based on the context of the specific description and will be well understood by one of ordinary skill in the art.

[0097] Various implementations involve encoding. As used herein, "encoding" can encompass all or part of the processing performed on an input video sequence to generate an encoded bitstream, for example, as described above for "decoding." In various embodiments, such processes include one or more of the processes typically performed by an encoder, such as, for example, partitioning, differential encoding, transforming, quantizing, and entropy encoding. In various embodiments, such processes also or alternatively include processes performed by the encoders of the various implementations described herein.

[0098] As a further example, in one embodiment, "encoding" refers to entropy encoding only, in another embodiment, "encoding" refers to differential encoding only, and in another embodiment, "encoding" refers to a combination of differential and entropy encoding. Whether the phrase "encoding process" is intended to refer to a task subset specifically or to the broader encoding process as a whole will be clear based on the context of the specific description and will be well understood by one of ordinary skill in the art.

[0099] It should be noted that the syntax elements used herein are descriptive terms, and therefore do not exclude the use of other syntax element names.

[0100] Where a figure is presented as a flow diagram, it should be understood that the figure also provides a block diagram of the corresponding apparatus. Similarly, where a figure is presented as a block diagram, it should be understood that the figure also provides a flow diagram of the corresponding method / process.

[0101] Various embodiments may relate to parametric models or rate-distortion optimization. In particular, during the encoding process, often due to computational complexity constraints, a balance or trade-off between rate and distortion is usually considered. This can be measured through a Rate Distortion Optimization (RDO) metric, or through Least Mean Square (LMS), Mean of Absolute Errors (MAE), or other such measures. Rate-distortion optimization is usually formulated to minimize a rate-distortion function that is a weighted sum of rate and distortion. There are different approaches to solving the rate-distortion optimization problem. For example, these approaches may be based on extensive testing of all encoding options, including all considered modes or coding parameter values, but with a thorough evaluation of their encoding costs and associated distortion of the reconstructed signal after encoding and decoding. To keep the encoding complexity down, faster approaches can also be used, especially with the calculation of approximate distortion based on a prediction or prediction residual signal rather than on the reconstructed signal. A mixture of these two approaches can also be used, such as by using approximate distortion for only some of the possible encoding choices and full distortion for others. Other approaches evaluate only a subset of the possible encoding choices. More generally, many approaches employ any of a variety of techniques to perform an optimization that is not necessarily a complete evaluation of both the encoding cost and the associated distortion.

[0102] The implementations and aspects described herein may be implemented, for example, in a method or process, an apparatus, a software program, a data stream, or a signal. Even if discussed only in the context of a single implementation (e.g., discussed only as a method), the implementation of the discussed features may also be implemented in other forms (e.g., an apparatus or a program). For example, an apparatus may be implemented in appropriate hardware, software, and firmware. The method may be implemented in a processor, which generally refers to a processing device, including, for example, a computer, a microprocessor, an integrated circuit, or a programmable logic device. Processors also include, for example, communication devices, such as computers, mobile phones, portable / personal digital assistants ("PDAs"), and other devices that facilitate communication of information between end users.

[0103] References to "one embodiment" or "an embodiment" or "one implementation" or "an implementation," as well as other variations thereof, mean that a particular feature, structure, characteristic, etc. described in connection with that embodiment is included in at least one embodiment. Thus, the appearances of the phrases "in one embodiment" or "an embodiment" or "in one implementation" or "in an implementation," as well as other variations thereof, appearing in various places throughout this application are not necessarily all referring to the same embodiment.

[0104] Additionally, the application may refer to "determining" various information. Determining information may include, for example, one or more of estimating information, calculating information, predicting information, or retrieving information from a memory.

[0105] Additionally, the application may refer to "accessing" various information. Accessing information may include, for example, one or more of receiving information, retrieving information (e.g., from a memory), storing information, moving information, copying information, calculating information, determining information, predicting information, or estimating information.

[0106] Additionally, the application may refer to "receiving" various information. Receiving, like "accessing," is intended to be a broad term. Receiving information may include, for example, one or more of accessing information or retrieving information (e.g., from a memory). Furthermore, "receiving" generally involves in some manner, for example, an operation such as storing information, processing information, transmitting information, moving information, copying information, erasing information, calculating information, determining information, predicting information, or estimating information.

[0107] For example, in the case of "A / B," "A and / or B," and "at least one of A and B," it should be understood that the use of any of the following " / ," "and / or," and "at least one of" is intended to encompass the selection of only the first listed alternative (A), or the selection of only the second listed alternative (B), or the selection of both alternatives (A and B). As a further example, in the case of "A, B, and / or C" and "at least one of A, B, and C," such language is intended to encompass the selection of only the first listed alternative (A), or the selection of only the second listed alternative (B), or the selection of only the third listed alternative (C), or the selection of only the first and second listed alternatives (A and B), or the selection of only the first and third listed alternatives (A and C), or the selection of only the second and third listed alternatives (B and C), or the selection of all three alternatives (A and B and C). This may be expanded as many times as the number of items listed, as would be apparent to one of ordinary skill in the art and related arts.

[0108] Also, as used herein, the term "signaling" specifically means to indicate something to a corresponding decoder. For example, in a particular embodiment, an encoder signals a particular one of multiple transforms, coding modes, or flags. Thus, in an embodiment, the same transform, parameter, or mode is used at both the encoder and decoder sides. Thus, for example, an encoder can transmit a particular parameter to a decoder so that the decoder can use the same particular parameter (explicit signaling). In contrast, if the decoder already has the particular parameter as well as other parameters, a non-transmitting signaling (implicit signaling) can be used to simply allow the decoder to know and select the particular parameter. By avoiding the transmission of any actual function, bit savings are realized in various embodiments. It will be understood that signaling can be achieved in various ways. For example, one or more syntax elements, flags, etc. are used in various embodiments to signal information to a corresponding decoder. The above relates to the verb form of the word "signal", which may also be used as a noun in this specification.

[0109] As will be apparent to one skilled in the art, implementations can result in a variety of signals formatted to carry information that can be, for example, stored or transmitted. Information can include, for example, instructions for performing a method or data generated by one of the described implementations. For example, a signal can be formatted to carry a bit stream of the described embodiments. For example, such a signal can be formatted as an electromagnetic wave (e.g., using a radio frequency portion of the spectrum) or as a baseband signal. Formatting can include, for example, encoding a data stream and modulating a carrier wave with the encoded data stream. The information that the signal carries can be, for example, analog or digital information. As is known, the signal can be transmitted over a variety of different wired or wireless links. The signal can be stored in a processor-readable medium.

[0110] The preceding sections describe several embodiments across various claim categories and types. The features of these embodiments may be provided alone or in any combination. Furthermore, the embodiments may include one or more of the following features, devices, or aspects across various claim categories and types, alone or in any combination. Use an extended region of reference pixels for decoder-side intra mode derivation. The above method performs a gradient for each reference pixel using an extended region of the reference pixel. The above method in which the gradient is determined using a two-dimensional filter. The above method in which the filter does not use pixels outside the extended area of ​​the reference pixels. Any of the above methods, wherein the extension region of the reference pixels extends to one or more rows above, to the top-right, and to the top-left of the current video block, and to one or more columns to the left, to the top-left, and to the bottom-left of the current video block. A bitstream or signal containing one or more syntax elements for performing the functions described above, or a variation thereof. The bitstream or signal includes a syntax carrying information generated according to any of the described embodiments. · Creating and / or transmitting and / or receiving and / or decoding a bitstream or signal according to any of the described embodiments. Any of the described embodiments provide a method, process, apparatus, medium for storing instructions, medium for storing data or signals. Inserting syntax elements into the signaling that allow the decoder to determine the decoding information in a manner that corresponds to the manner used by the encoder. · Creating and / or transmitting and / or receiving and / or decoding a bitstream or signal that includes one or more of the described syntax elements, or variations thereof. An electronic device such as a television, set-top box, mobile phone, tablet, etc., performs the conversion method(s) according to any of the described embodiments. An electronic device, such as a television, set-top box, mobile phone, tablet, etc., determines the transformation method(s) according to any of the described embodiments and displays the resulting image (e.g., using a monitor, screen, or other type of display). A television, set-top box, mobile phone, tablet, or other electronic device selects, bandlimits, or tunes (e.g., tunes using a tuner) a channel in accordance with any of the described embodiments to receive the signal containing the encoded image and performs the conversion method(s). A television, set-top box, mobile phone, tablet, or other electronic device receives the signal containing the encoded images via broadcast (e.g., using an antenna) and performs the conversion method(s).

Claims

1. 1. A method comprising: determining one or more gradients for available reference pixels surrounding the current video block; determining an intra-prediction mode to use to encode the current video block based on the gradient; and encoding the current video block using the determined intra-prediction mode, wherein the intra-prediction mode is 34 when horizontal and vertical gradients are equal magnitude and same sign, and the intra-prediction mode is 66 when horizontal and vertical gradients are equal magnitude and opposite sign.

2. 1. An apparatus comprising:

1. A processor, comprising: determining one or more gradients for available reference pixels surrounding the current video block; determining an intra-prediction mode to use to encode the current video block based on the gradient; and and a processor configured to encode the current video block using the determined intra-prediction mode, wherein the intra-prediction mode is 34 when horizontal and vertical gradients are equal magnitude and same sign, and the intra-prediction mode is 66 when horizontal and vertical gradients are equal magnitude and opposite sign.

3. 1. A method comprising: determining one or more gradients for reference pixels surrounding the current video block; determining an intra-prediction mode to use to decode the current video block based on the gradient; and and decoding the current video block using the determined intra-prediction mode, wherein the intra-prediction mode is 34 when horizontal and vertical gradients are equal magnitude and same sign, and the intra-prediction mode is 66 when horizontal and vertical gradients are equal magnitude and opposite sign.

4. 1. An apparatus comprising:

1. A processor, comprising: determining one or more gradients for reference pixels surrounding the current video block; determining an intra-prediction mode to use to decode the current video block based on the gradient; and and a processor configured to decode the current video block using the determined intra-prediction mode, wherein the intra-prediction mode is 34 when horizontal and vertical gradients are equal magnitude and same sign, and the intra-prediction mode is 66 when horizontal and vertical gradients are equal magnitude and opposite sign.

5. 2. The method of claim 1 , wherein the reference pixels include one or more rows above the current video block, one or more columns to the left of the current video block, and pixels above and to the left of the current video block.

6. The method of claim 5 , wherein the reference pixels further extend above and to the right of the current video block and to the bottom left of the current video block.

7. The method of claim 1 , wherein the gradient is determined using a horizontal filter and a vertical filter.

8. The method of claim 7 , wherein the gradient is further determined using a convolution of the horizontal and vertical filters.

9. The method of claim 1 , further comprising assigning an index to an intra-prediction mode.

10. The apparatus of claim 2 , wherein the indexes are reassigned based on the index values.

11. The method of claim 1 , wherein the gradient determination uses a reference pixel within a reference region.

12. A device, An apparatus according to claim 4; 1. A device comprising at least one of: (i) an antenna configured to receive a signal, the signal including the coding unit; (ii) a band limiter configured to limit the received signal to a frequency band including the coding unit; and (iii) a display configured to display an output representing the coding unit.

13. A non-transitory computer-readable medium comprising instructions that, when executed by a processor of a computer for video encoding, cause the computer to perform a plurality of operations, including operations according to the method of claim 1.

14. A computer program product comprising instructions that, when executed by a computer, cause the computer to perform the method of claim 3.

15. The method described in claim 1, wherein when the number of directional intra-prediction modes that DIMD can infer increases from 65 to 129, the index of the horizontal mode becomes 34, the index of the diagonal mode becomes 66, the index of the vertical mode becomes 98, and the index of the vertical diagonal mode becomes 130.

16. The device described in claim 2, wherein when the number of directional intra-prediction modes that DIMD can infer increases from 65 to 129, the index of the horizontal mode becomes 34, the index of the diagonal mode becomes 66, the index of the vertical mode becomes 98, and the index of the vertical diagonal mode becomes 130.

17. The method described in claim 3, wherein when the number of directional intra-prediction modes that DIMD can infer increases from 65 to 129, the index of the horizontal mode becomes 34, the index of the diagonal mode becomes 66, the index of the vertical mode becomes 98, and the index of the vertical diagonal mode becomes 130.

18. The device described in claim 4, wherein when the number of directional intra-prediction modes that DIMD can infer increases from 65 to 129, the index of the horizontal mode becomes 34, the index of the diagonal mode becomes 66, the index of the vertical mode becomes 98, and the index of the vertical diagonal mode becomes 130.

19. The method described in claim 3, wherein the reference pixels include one or more rows above the current video block, one or more columns to the left of the current video block, and pixels above and to the left of the current video block.

20. The method of claim 19, wherein the reference pixels further extend above and to the right of the current video block and to the bottom left of the current video block.

Images