Envelope detector with clamp circuit

Abstract

An envelope detection circuit and a method for detecting the envelope of a signal using such an envelope detection circuit. One exemplary envelope detection circuit generally includes a first diode, a capacitive element, and a clamp circuit. The first diode has an anode coupled to an input node of the envelope detection circuit and a cathode coupled to an output node of the envelope detection circuit. The capacitive element is coupled in shunt between the output node and a reference potential node, and the clamp circuit is coupled in shunt between the input node and the reference potential node. The clamp circuit generally includes a resistive element coupled in series with a second diode.

Description

[Technical field]

[0001] (CROSS REFERENCE TO RELATED APPLICATIONS)

[0001] This application claims the benefit of and priority to U.S. patent application Ser. No. 17 / 646,405, filed Dec. 29, 2021, the entire contents of which are incorporated by reference herein.

[0002]

[0002] Certain aspects of the present disclosure relate generally to electronic circuits and, more particularly, to techniques and apparatus for envelope detection. [Background technology]

[0003]

[0003] Wireless communication systems have been widely deployed to provide various telecommunication services, such as telephony, video, data, messaging, broadcast, or other similar types of services. These wireless communication systems may employ multiple access techniques capable of supporting communication with multiple users by sharing available system resources (e.g., bandwidth, transmission power, or other resources) with the users. The multiple access techniques may rely on any of code division, time division, frequency division, orthogonal frequency division, single carrier frequency division, or time division synchronous code division, to name a few. These and other multiple access techniques have been adopted in various telecommunication standards to provide a common protocol that allows various wireless devices to communicate at city, national, regional, and even global levels.

[0004]

[0004] Although wireless communication systems have made great technological advances over the years, challenges still exist. For example, complex and dynamic environments can still attenuate or block signals between wireless transmitters and wireless receivers, thereby undermining various existing wireless channel measurement and reporting mechanisms used to manage and optimize the use of finite wireless channel resources. Therefore, further improvements in wireless communication systems are needed to overcome various challenges. Summary of the Invention

[0005]

[0005] The systems, methods, and devices of the present disclosure each have several aspects, no single one of which is responsible for its desirable attributes. Without limiting the scope of the present disclosure as expressed by the following claims, several features will now be briefly discussed. After considering this discussion, and in particular after reading the section entitled "Description of the Preferred Embodiments," one will understand how the features of the present disclosure provide the advantages described herein.

[0006]

[0006] Certain aspects of the present disclosure relate generally to envelope detection circuits and to mitigating reliability issues and diode burnout in envelope detectors operating at high power.

[0007]

[0007] A particular aspect of the present disclosure provides an envelope detection circuit that generally includes a first diode having an anode coupled to an input node of the envelope detection circuit and a cathode coupled to an output node of the envelope detection circuit, a first capacitive element coupled in shunt between the output node and a reference potential node, and a clamp circuit coupled in shunt between the input node and the reference potential node, the clamp circuit including a first resistive element coupled in series with a second diode.

[0008]

[0008] Certain aspects of the present disclosure provide a method for envelope detection that generally involves detecting the envelope of a signal using a first diode and a first capacitive element coupled in shunt to a cathode of the first diode, and clamping the signal using a clamp circuit including a first resistive element coupled in series with a second diode.

[0009] To the accomplishment of the foregoing and related ends, the one or more aspects comprise the features hereinafter fully described and particularly pointed out in the claims. The following description and the annexed drawings set forth in detail certain illustrative features of the one or more aspects. These features are indicative, however, of only a few of the various ways in which the principles of the various aspects may be employed. [Brief description of the drawings]

[0010]

[0010] In order that the above-mentioned features of the present disclosure may be understood in detail, a more particular description, briefly summarized above, may be obtained by referring to the embodiments, some of which are illustrated in the accompanying drawings. However, it should be noted that the accompanying drawings show only certain exemplary embodiments of the present disclosure, and therefore should not be considered as limiting the scope of the present disclosure, since the present description may admit of other equally effective embodiments. [Figure 1]

[0011] FIG. 1 is a block diagram of an example communication system in which aspects of the present disclosure may be practiced. [Diagram 2]

[0012] FIG. 1 is a block diagram of an example compensation circuit in which aspects of the present disclosure can be practiced. [Diagram 3]

[0013] 1 is a schematic diagram of an example envelope detector having a clamp in accordance with certain aspects of the present disclosure. [Figure 4]

[0014] 1 is a schematic diagram of an example impedance-matched envelope detector having a clamp in accordance with certain aspects of the present disclosure. [Diagram 5]

[0015] 1 is a schematic diagram of an example DC bias and impedance-matched envelope detector with a clamp in accordance with certain aspects of the present disclosure. [Figure 6]

[0016] 4 is a flow diagram of an example operation for envelope detection in accordance with certain aspects of the present disclosure.

[0011]

[0017] For ease of understanding, the same reference numbers have been used, where possible, to designate identical elements common to the figures. It is contemplated that elements disclosed in one embodiment may be beneficially utilized on other embodiments without specific recitation. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012]

[0018] A compensator is a component in feedback and control systems that improves undesirable frequency responses. The most common types of compensators are lead, lag, and lag-lead compensators. A lag-lead compensator is an electrical circuit that creates a phase lag in one frequency domain and a phase lead in another frequency domain. Compensators can be used to offset (or at least reduce) cable losses when transmitting or receiving signals. Ideally, the transmit power leaving a cable at one end should match the transmit power entering the cable at the other end.

[0013]

[0019] Some compensators may include an envelope detector to detect the envelope of the input signal and provide an output proportional to the amplitude of the signal envelope. The envelope detector may be implemented by a diode detector, which may include a forward biased diode connected between the detector input and output, and a capacitor connected in shunt to the detector output. The diode generally serves to boost one half of the received signal over the other half. In many cases, Schottky diodes are used with this form of detector because the signal levels may be low and Schottky diodes have a much lower forward voltage (typically around 0.2V) than standard silicon diodes (typically around 0.6 or 0.7V).

[0014]

[0020] Unfortunately, diodes can face reliability issues when envelope detectors are used to detect high powers. For example, it may be desirable for the diodes to detect a range of powers from -11 dBm to +26 dBm. However, the diodes can burn out at +15 dBm. Thus, there is a need for techniques to improve the lifetime of envelope detector diodes during operation of the envelope detector at high power levels.

[0015]

[0021] Certain aspects of the present disclosure provide a clamp circuit between the input of the envelope detector and the envelope detector diode, which prevents high power at the input from reaching the envelope detector diode, thereby improving the life and reliability of the envelope detector.

[0016]

[0022] Various aspects of the present disclosure are described more fully below with reference to the accompanying drawings. However, the present disclosure may be embodied in many different forms and should not be construed as limited to any specific structure or function presented throughout the present disclosure. Rather, these aspects are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art. Based on the teachings herein, those skilled in the art should understand that the scope of the present disclosure is intended to encompass all aspects of the present disclosure disclosed herein, regardless of whether they are implemented independently of or in combination with any other aspects of the present disclosure. For example, an apparatus can be implemented or a method can be practiced using any number of the aspects described herein. Furthermore, the scope of the present disclosure is intended to encompass such an apparatus or method that is practiced using other structures, functions, or structures and functions in addition to or other than the various aspects of the present disclosure described herein. It should be understood that any aspect of the present disclosure disclosed herein can be embodied by one or more elements of a claim.

[0017]

[0023] As used herein, the term "connected with" in various tenses of the verb "connect" can mean that element A is directly connected to element B, or that other elements may be connected between element A and element B (i.e., element A is indirectly connected to element B). In the case of electrical components, the term "connected with" can also be used herein to mean electrically connecting element A and element B (and any components electrically connected between them) using a wire, trace, or other conductive material.

[0018] Exemplary Communication System

[0024] 1 is a block diagram illustrating an example communication system 100 in which aspects of the present disclosure may be practiced. The communication system 100 may include a radio 110, a compensator 130, and an antenna 140 for wireless transmission and / or wireless reception. As shown, an output of the radio 110 may be coupled to an input of the compensator 130 by a transmission cable 120 such that the compensator 130 and the antenna 140 may be located at a remote distance from the radio 110.

[0019]

[0025] Transmission cables (such as the transmission cable 120) may be associated with a cable loss, which represents the amount of attenuation (e.g., power loss) that occurs to signals transmitted through these transmission cables. Signals transmitted using a longer transmission cable (e.g., the transmission cable 120) may experience greater attenuation than signals transmitted through a shorter transmission cable. For example, when outputting signals for wireless communication through the antenna 140, the power amplifier of the radio 110 may transmit these signals at a certain transmission power. However, due to the loss characteristics of the transmission cable 120, the transmission power from the power amplifier of the radio 110 to transmit these signals may be attenuated by the transmission cable 120. This attenuation results in a reduction in the transmission power seen at the antenna 140, which may result in the signals not being received by the intended receiver.

[0020]

[0026] To help account for cable losses (e.g., attenuation) associated with the transmission cable 120, the communication system 100 also includes a compensator 130. The compensator 130 is configured to receive signals from the radio 110 and generally amplify the transmission power associated with these signals such that the attenuation / cable loss of the transmission power associated with the transmission cable 120 is offset or at least reduced. In other words, the compensator 130 can be configured to reproduce the transmission power output by the power amplifier of the radio 110 after the signal output by the radio 110 passes through the transmission cable 120. This ensures that the signal can be transmitted via the antenna 140 using an appropriate transmission power. This amplification of the transmission power by the compensator 130 can be achieved by a gain stage including any suitable combination of one or more fixed attenuators, one or more variable attenuators, one or more fixed amplifiers, and / or one or more variable amplifiers.

[0021] Exemplary Signal Compensator Device

[0027] 2 is a block diagram of an example compensator 130 capable of practicing aspects of the disclosure. The compensator 130 may include logic 210, an envelope detector 220, and a circuit 230. For certain aspects, the compensator 130 may be implemented as a small printed circuit board assembly that may be disposed within a housing for the antenna 140 and coupled between a cable (e.g., the transmission cable 120 of FIG. 1) and the antenna 140, as shown.

[0022]

[0028] The compensator 130 is designed to offset (or at least reduce) cable losses in the transmit and / or receive directions. In the transmit direction, ideally the transmit power to the antenna 140 should match the transmit power at the output of the radio (e.g., radio 110 in FIG. 1), but the radio does not know the cable loss (which may vary from device type to device type depending on the cable length and other cable characteristics). Therefore, the compensator 130 is designed to measure the cable loss and offset (or at least reduce the effect of) this cable loss (referred to as "gain neutral").

[0023]

[0029] To achieve this, the compensator 130 can measure or estimate the power at the output of the circuit 230 (e.g., by sampling the current and / or voltage between the circuit 230 and the antenna 140). The envelope detector 220 can be used to detect the envelope of the input signal and provide an output proportional to the amplitude of the signal's envelope. The circuit 230 can include a gain stage, which generally includes any suitable combination of one or more fixed attenuators, one or more variable attenuators, one or more fixed amplifiers, and / or one or more variable amplifiers. The gain stage can also include switches and / or filters. The output of the circuit 230 in the transmit direction can be coupled to a first port 244. Additionally or alternatively, in some cases, the circuit 230 can include at least a portion of a receive path (not shown) for amplifying and filtering the received signal from the antenna 140.

[0024]

[0030] Logic 210 may have an input coupled to output node 248 of envelope detector 220 and may have an output coupled to a control input of circuitry 230. Envelope detector 220 may send an indication of the measured power (e.g., of the detected envelope signal) to logic 210. Logic 210 may compare this indication of the measured power value to an indication of a reference power value and may output a control signal to adjust the loss (i.e., attenuation) and / or gain (i.e., amplification) of circuitry 230.

[0025]

[0031] The compensator 130 may include a radio frequency front-end circuit, which may include at least a portion of a transmit path, at least a portion of a receive path, or at least a portion of a transceiver front end. The compensator 130 may include a first port 244 coupled to the antenna 140. The compensator 130 may also include a second port 242. For certain aspects, the second port 242 may be used to couple the compensator 130 to a cable (e.g., the transmission cable 120). For certain aspects, the second port 242 may be coupled to an input of the circuit 230 (e.g., a gain stage) and the first port 244 may be coupled to an output of the circuit 230, such as in a transmit direction.

[0026]

[0032] FIG. 3 is a schematic diagram of an exemplary envelope detector 300. The envelope detector 300 of FIG. 3 may serve as the envelope detector 220 of FIG. 2. The envelope detector 300 may include a diode D1 and a capacitive element C1 to perform the primary envelope detection function. The diode D1 may have an anode coupled to an input node 246 of the envelope detector 300 and a cathode coupled to an output node 248 (labeled "Vout") of the envelope detector, as shown. The capacitive element C1 may be coupled in shunt between the cathode of the diode D1 and a reference potential node for the envelope detector 300 (e.g., electrical ground). In some cases, the output node 248 of the envelope detector 300 may be coupled to an envelope detector load impedance 304 (e.g., represented by a resistive element Rload in FIG. 3).

[0027]

[0033] The envelope detector 300 may also include a clamp circuit 302 coupled in shunt between the anode of the diode D1 and a reference potential node. According to a particular embodiment, the clamp circuit 302 may be implemented by a diode D2 and a resistive element R1 coupled in series in a shunt between the anode of the diode D1 and the reference potential node. According to a particular embodiment, the cathode of the diode D2 may be coupled to the anode of the diode D1, and the anode of the diode D2 may be coupled to a terminal of the resistive element R1, as shown in FIG. 3. According to a particular other embodiment, the resistive element R1 may be coupled between the anode of the diode D1 and the cathode of the diode D2. In other words, the position of the resistive element R1 and the position of the diode D2 may be interchanged.

[0028]

[0034] In certain embodiments, diode D1 and diode D2 can be the same type of diode. For example, diode D1 and diode D2 can both be Schottky diodes, which typically have a lower forward voltage (V F For other embodiments, diode D2 may be a different diode type than diode D1.

[0029]

[0035] According to a particular embodiment, resistive element R1 may have a resistance of approximately 15 ohms, which may be selected as a trade-off between power dissipation and burnout protection.

[0030]

[0036] FIG. 4 is a schematic diagram of an exemplary impedance-matched envelope detector 400. The envelope detector 400 of FIG. 4 is similar to the envelope detector 300 of FIG. 3, but includes an impedance matching circuit 402 coupled between the input node 246 of the envelope detector and the anode of the diode D1. The impedance matching circuit 402 can be implemented by any of a variety of suitable topologies for matching a source impedance of an external component (e.g., the antenna 140) to the input impedance of the envelope detector. For example, the impedance matching circuit 402 can include a capacitive element C2 coupled in series between the input node 246 of the envelope detector and the anode of the diode D1. The impedance matching circuit 402 can also include an inductive element L1 coupled in shunt between the anode of the diode D1 and a reference potential node. The capacitance of the capacitive element C2 and the inductance of the inductive element can be selected to maximize power transfer between the external component and the envelope detector.

[0031]

[0037] Figure 5 is a schematic diagram of an example DC bias and impedance-matched envelope detector 500. The envelope detector 500 of Figure 5 is similar to the envelope detector 400 of Figure 4, but also includes a DC bias circuit. Specifically, the envelope detector 500 may include a first DC bias circuit 504 coupled to the anode of the diode D1 and a second DC bias circuit 506 coupled to the clamp circuit 302 (e.g., diode D2 and resistive element R1).

[0032]

[0038] A first DC power supply 510 in the first DC bias circuit 504 can be used to bias the anode of the diode D1. The first DC bias circuit 504 can also include a second resistive element R2 coupled in shunt between the anode of the diode D1 and a reference potential node, and a third resistive element R3 coupled between the anode of the diode D1 and a first DC bias node (e.g., a terminal of the DC power supply 510). According to certain embodiments, the impedance matching circuit 502 can be coupled between the input node 246 of the envelope detector and the anode of the diode D1, similar to the impedance matching circuit 402 of FIG. 4. In addition to the capacitive element C2 and the inductive element L1, the impedance matching circuit 502 also includes a third capacitive element C3 coupled in series between the inductive element L1 and the reference potential node such that the inductive element L1 does not act as a short to ground for the DC bias voltage. For certain embodiments, the third capacitive element C3 can include a large value bulk capacitor. The impedance matching circuit 502 may also be implemented with any of a variety of other suitable topologies.

[0033]

[0039] The envelope detector 500 may also include a fourth capacitive element C4 coupled between the clamp circuit 302 and a reference potential node. For certain embodiments, the capacitance of the fourth capacitive element C4 may match the capacitance of the third capacitive element C3. In some cases, the fourth capacitive element C4 may include a large value bulk capacitor. A second DC power supply 520 in the second DC bias circuit 506 may be used to bias the clamp circuit 302. The second DC power supply 520 may have the same DC voltage as the first DC power supply 510, and in some cases, the first DC power supply and the second DC power supply may be the same DC power supply. The second DC bias circuit 506 may also include a fourth resistive element R4 coupled in parallel with the fourth capacitive element C4, and a fifth resistive element R5 coupled between a second DC bias node (e.g., a terminal of the DC power supply 520) and a node 508 coupled to the fourth capacitive element C4, the fourth resistive element R4, and the clamp circuit 302.

[0034]

[0040] According to certain embodiments, the second DC bias circuit 506 may have the same components and topology as the first DC bias circuit 504, as shown in FIG. 5. For certain embodiments, the first DC bias node and the second DC bias node (e.g., terminals of DC power supplies 510 and 520) are configured to provide the same DC bias voltage. According to certain embodiments, the ratio of the resistance of resistive element R3 to the resistance of resistive element R2 may be the same as the ratio of the resistance of resistive element R5 to the resistance of resistive element R4.

[0035] Exemplary Operations for Envelope Detection

[0041] 6 is a flow diagram of example operations 600 for envelope detection in accordance with certain aspects of the present disclosure. The operations 600 may be performed by an envelope detection circuit, such as the envelope detectors 220, 300, 400, and 500 of FIGS.

[0036]

[0042] The operations 600 may begin at block 602 with an envelope detector detecting the envelope of the signal using a first diode (e.g., diode D1) and a first capacitive element (e.g., capacitive element C1) coupled in shunt to the cathode of the first diode. At block 604, the envelope detector may clamp the signal using a clamp circuit. The clamp circuit may generally include a first resistive element (e.g., resistive element R1) coupled in series with a second diode (e.g., diode D2).

[0037]

[0043] According to certain aspects, a first terminal of the first resistive element can be coupled to a cathode of a second diode, and a second terminal of the first resistive element can be coupled to an anode of the first diode. As for other aspects, the second diode has an anode coupled to the first resistive element and a cathode coupled to the anode of the first diode.

[0038]

[0044] According to certain aspects, the operations 600 may further involve transforming the impedance using an impedance matching circuit (e.g., impedance matching circuit 402 or 502) coupled to the anode of the first diode. For certain aspects, the impedance matching circuit may include a second capacitive element (e.g., capacitive element C2) coupled in series with the anode of the first diode and an inductive element (e.g., inductive element L1) coupled in shunt to the anode of the first diode.

[0039]

[0045] According to certain aspects, the operations 600 may further involve DC biasing the anode of the first diode using a first DC bias circuit (e.g., the first DC bias circuit 504). For certain aspects, the operations 600 may further involve DC biasing the clamp circuit using a second DC bias circuit (e.g., the second DC bias circuit 506). For certain aspects, the second DC bias circuit may have the same DC bias voltage, the same components, and / or the same topology as the first DC bias circuit.

[0040] Exemplary Aspects

[0046] In addition to the various aspects described above, specific combinations of aspects are within the scope of the present disclosure, some of which are detailed below.

[0041]

[0047] Aspect 1: An envelope detection circuit comprising: a first diode having an anode coupled to an input node of the envelope detection circuit and a cathode coupled to an output node of the envelope detection circuit; a first capacitive element coupled in shunt between the output node and a reference potential node; and a clamp circuit coupled in shunt between the input node and the reference potential node, the clamp circuit including a first resistive element coupled in series with a second diode.

[0042]

[0048] Aspect 2: The envelope detection circuit of aspect 1, wherein a second diode has an anode coupled to the first resistive element and a cathode coupled to the anode of the first diode.

[0043]

[0049] Aspect 3: The envelope detection circuit of Aspect 1 or 2, further comprising an impedance matching circuit coupled between the input node of the envelope detection circuit and the anode of the first diode.

[0044]

[0050] Aspect 4: The envelope detection circuit of aspect 3, wherein the impedance matching circuit includes a second capacitive element coupled in series between the input node of the envelope detection circuit and the anode of the first diode, and an inductive element coupled in shunt between the anode of the first diode and the reference potential node.

[0045]

[0051] Embodiment 5. The envelope detection circuit of any of embodiments 1-4, further comprising a first DC bias circuit coupled to the anode of the first diode.

[0046]

[0052] Aspect 6: The envelope detection circuit of aspect 5, wherein the first DC bias circuit includes a second resistive element coupled in shunt between the anode of the first diode and the reference potential node, and a third resistive element coupled between the anode of the first diode and the first DC bias node, and the impedance matching circuit further includes a third capacitive element coupled in series between the inductive element and the reference potential node.

[0047]

[0053] Example 7: The envelope detection circuit of example 5 or 6, further comprising a second DC bias circuit coupled to the clamp circuit.

[0048]

[0054] Example 8: The envelope detection circuit of Example 7, wherein the second DC bias circuit has the same components and topology as the first DC bias circuit.

[0049]

[0055] Aspect 9: The envelope detection circuit of aspect 7 or 8, further comprising a fourth capacitive element coupled between the clamp circuit and the reference potential node, wherein the second DC bias circuit includes a fourth resistive element coupled in parallel with the fourth capacitive element, and a fifth resistive element coupled between the second DC bias node and a node coupled to the fourth capacitive element, the fourth resistive element, and the clamp circuit.

[0050]

[0056] Example 10: The envelope detection circuit of Example 9, wherein the first DC bias node and the second DC bias node are configured to supply the same DC bias voltage.

[0051]

[0057] Aspect 11: The envelope detection circuit of aspect 9 or 10, wherein the ratio of the resistance of the third resistive element to the resistance of the second resistive element is the same as the ratio of the resistance of the fifth resistive element to the resistance of the fourth resistive element.

[0052]

[0058] Aspect 12: A radio frequency front-end circuit comprising an envelope detection circuit of any of aspects 1 to 11, further comprising: a first port for coupling to an antenna; a gain stage including at least one of a variable amplifier or a variable attenuator, the output of the gain stage being coupled to the first port; and logic having an input coupled to an output node of the envelope detection circuit and having an output coupled to a control input of at least one of the variable amplifier or the variable attenuator.

[0053]

[0059] Example 13: The radio frequency front-end circuit of example 12, further comprising a second port for coupling to a cable, the second port being coupled to an input of the gain stage.

[0054]

[0060] Aspect 14: A method for envelope detection, the method including: detecting an envelope of a signal using a first diode and a first capacitive element coupled in shunt to a cathode of the first diode; and clamping the signal using a clamp circuit including a first resistive element coupled in series with a second diode.

[0055]

[0061] Example 15: The method of example 14, wherein a first terminal of the first resistive element is coupled to a cathode of the second diode, and a second terminal of the first resistive element is coupled to an anode of the first diode.

[0056]

[0062] Example 16: The method of example 14 or 15, further comprising transforming the impedance using an impedance matching circuit coupled to the anode of the first diode.

[0057]

[0063] Example 17: The method of example 16, wherein the impedance matching circuit includes a second capacitive element coupled in series with the anode of the first diode and an inductive element coupled in shunt to the anode of the first diode.

[0058]

[0064] Example 18: The method of any of Examples 14-17, further comprising applying a DC bias to an anode of the first diode using a first DC bias circuit.

[0059]

[0065] Example 19: The method of example 18, further comprising applying a DC bias to the clamp circuit using a second DC bias circuit, the second DC bias circuit having the same components and topology as the first DC bias circuit.

[0060] Additional Considerations

[0066] The various operations of the methods described above may be performed by any suitable means capable of performing the corresponding functions, which may include various hardware and / or software components, including but not limited to circuits, application specific integrated circuits (ASICs), or processors, and / or various hardware and / or software modules. Generally, when operations are illustrated in figures, they may have corresponding equivalent means-plus-function components that are similarly numbered.

[0061]

[0067] As used herein, the term "determining" encompasses a wide variety of actions. For example, "determining" may include calculating, computing, processing, deriving, investigating, searching (e.g., looking up in a table, database, or another data structure), ascertaining, and the like. "Determining" may also include receiving (e.g., receiving information), accessing (e.g., accessing data in a memory), and the like. "Determining" may also include resolving, selecting, choosing, establishing, and the like.

[0062]

[0068] As used herein, a phrase referring to "at least one of" a list of items refers to any combination of those items, including single members. By way of example, "at least one of a, b, or c" is intended to encompass a, b, c, ab, ac, bc, and abc, as well as any combination having multiples of the same element (e.g., aa, aaa, aab, aac, abb, acc, bb, bbb, bbc, cc, and ccc, or any other permutation of a, b, and c).

[0063]

[0069] The methods disclosed herein include one or more steps or actions for achieving the described method. The steps and / or actions of those methods may be interchanged with one another without departing from the scope of the claims. In other words, unless a specific order of steps or actions is specified, the order of specific steps and / or actions and / or the use of those steps and / or actions may be modified without departing from the scope of the claims.

[0064]

[0070] It should be understood that the claims are not limited to the precise configuration and components illustrated above. Various modifications, changes and variations may be made in the arrangement, operation and details of the methods and apparatus described above without departing from the scope of the claims.

Claims

1. An envelope detection circuit, a first diode having an anode coupled to an input node of the envelope detection circuit and a cathode coupled to an output node of the envelope detection circuit; a first capacitive element coupled in shunt between the output node and a reference potential node, the first capacitive element being directly coupled to the cathode of the first diode; a clamp circuit coupled in shunt between the input node and the reference potential node, the clamp circuit including a first resistive element coupled in series with a second diode.

2. 2. The envelope detection circuit of claim 1, wherein the second diode has an anode coupled to the first resistive element and a cathode coupled to the anode of the first diode.

3. further comprising an impedance matching circuit coupled between the input node of the envelope detection circuit and the anode of the first diode, the impedance matching circuit comprising: a second capacitance element coupled in series between the input node of the envelope detection circuit and the anode of the first diode; an inductive element coupled in shunt between the anode of the first diode and the reference potential node; 2. The envelope detection circuit of claim 1, comprising:

4. 4. The envelope detection circuit of claim 3, further comprising a first DC bias circuit coupled to the anode of the first diode.

5. the first DC bias circuit a second resistive element coupled in shunt between the anode of the first diode and the reference potential node; a third resistive element coupled between the anode of the first diode and a first DC bias node, and the impedance matching circuit further includes a third capacitive element coupled in series between the inductive element and the reference potential node.

6. 6. The envelope detection circuit of claim 5, further comprising a second DC bias circuit coupled to the clamp circuit.

7. 7. The envelope detection circuit of claim 6, wherein the second DC bias circuit has the same components and topology as the first DC bias circuit.

8. a fourth capacitance element coupled between the clamp circuit and the reference potential node, and the second DC bias circuit a fourth resistive element coupled in parallel with the fourth capacitive element; 7. The envelope detection circuit of claim 6, further comprising: a fifth resistive element coupled between a second DC bias node and a node coupled to the fourth capacitive element, the fourth resistive element, and the clamp circuit.

9. 9. The envelope detection circuit of claim 8, wherein the first DC bias node and the second DC bias node are configured to provide the same DC bias voltage.

10. 9. The envelope detection circuit according to claim 8, wherein a ratio of the resistance of said third resistive element to a resistance of said second resistive element is equal to a ratio of the resistance of said fifth resistive element to a resistance of said fourth resistive element.

11. A radio frequency front-end circuit comprising the envelope detection circuit of claim 1, a first port for coupling to an antenna; a gain stage including at least one of a variable amplifier or a variable attenuator, the output of the gain stage being coupled to the first port; logic having an input coupled to the output node of the envelope detection circuit and having an output coupled to a control input of the at least one of the variable amplifier or the variable attenuator; a second port for coupling to a cable, the second port being coupled to an input of the gain stage; The radio frequency front end circuit further comprises:

12. 1. A method for envelope detection, comprising: detecting an envelope of a signal using a first diode and a first capacitive element coupled in shunt to a cathode of the first diode, the first capacitive element being directly coupled to the cathode of the first diode; clamping the signal using a clamp circuit including a first resistive element coupled in series with a second diode; A method comprising:

13. 13. The method of claim 12, wherein a first terminal of the first resistive element is coupled to a cathode of the second diode and a second terminal of the first resistive element is coupled to an anode of the first diode.

14. further comprising transforming the impedance using an impedance matching circuit coupled to the anode of the first diode, the impedance matching circuit comprising: a second capacitive element coupled in series with the anode of the first diode; an inductive element coupled in shunt to the anode of the first diode.

15. applying a DC bias to the anode of the first diode using a first DC bias circuit; 13. The method of claim 12, further comprising: DC biasing the clamp circuit using a second DC bias circuit, the second DC bias circuit having the same components and topology as the first DC bias circuit.

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