Liquid crystal display unit
The multi-layer photomask process for forming channel-protected transistors in display devices addresses the high cost and power consumption issues by enhancing charge capacity and opening rates in large-area displays.
Patent Information
- Application Number
- JP2024189550
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2014-02-28
- Filing Date
- 2024-10-29
- Publication Date
- 2025-01-28
- Estimated Expiration
- 2034-06-26
AI Technical Summary
Large-area glass substrates used in display devices incur high costs due to expensive photo masks, and increasing the charge capacity of capacity elements in liquid crystal displays leads to reduced pixel opening rates and increased power consumption.
A multi-layer photomask process is used to form a channel-protected transistor with a metal oxide film and channel protective film, incorporating a gate electrode, gate insulating film, and capacity element, which reduces the need for multiple photo masks and enhances charge capacity while maintaining a high opening rate.
This method reduces production costs and power consumption by allowing for a higher opening rate and increased charge capacity in semiconductor devices, particularly in high-resolution displays.
Smart Images

Figure 2025014013000001_ABST
Abstract
Description
[Technical field]
[0001] The present invention relates to a method for manufacturing a semiconductor device having, for example, a transistor. [Background technology]
[0002] It is used in many flat panel displays, such as liquid crystal displays and light-emitting displays. The transistors used are made of amorphous silicon and single crystal silicon formed on a glass substrate. The silicon semiconductor is made of silicon semiconductor such as polycrystalline silicon or polysilicon. Transistors using semiconductors are also used in integrated circuits (ICs).
[0003] In recent years, metal oxides that exhibit semiconducting properties have been used in transistors instead of silicon semiconductors. In this specification, the term "oxide" refers to a metal oxide that exhibits semiconductor properties. Let us call it a semiconductor.
[0004] For example, a transistor using zinc oxide or an In-Ga-Zn oxide as an oxide semiconductor may be used. A transistor is manufactured and used as a switching element for pixels of a display device. The technology has been disclosed (see Patent Document 1). [Prior art documents] [Patent documents]
[0005] [Patent Document 1] JP 2007-123861 A Summary of the Invention [Problem to be solved by the invention]
[0006] Display devices on the market are tending to become larger, with screen sizes of 40 inches or more diagonally. Furthermore, development is underway with a view to screen sizes of 120 inches or more diagonally. For this reason, the glass substrates used in display devices are becoming larger in area than the 8th generation. It's progressing.
[0007] As glass substrates become larger, the exposure equipment used in the manufacturing process of display devices is becoming The photomasks used are becoming larger, and the cost of the photomasks is becoming an issue. For example, Since 10th generation photomasks are expensive, costing over 100 million yen each, There is a need to develop a manufacturing process that reduces this.
[0008] On the other hand, in a liquid crystal display device, which is one example of a display device, the charge capacity of a capacitive element is increased. The more the liquid crystal molecules in the liquid crystal element can be kept aligned in a constant manner when an electric field is applied, the In a display device that displays a still image, the period can be extended. What can be achieved is to reduce the number of times image data is rewritten, which would reduce power consumption. Can.
[0009] Therefore, in order to increase the charge capacity of the capacitance element, the area occupied by the capacitance element is increased. Specifically, there is a method for increasing the area where a pair of electrodes overlap. Therefore, in the above display device, in order to increase the area where the pair of electrodes overlap, a light-shielding property is provided. When the area of the conductive film is increased, the aperture ratio of the pixel is reduced, and the display quality of the image is deteriorated. .
[0010] One embodiment of the present invention provides a capacitor that has a high aperture ratio and can increase a charge capacitance. The object of the present invention is to provide a manufacturing method for a semiconductor device having a structure capable of reducing costs. Another embodiment of the present invention is a semiconductor device capable of reducing power consumption. It is an object of the present invention to provide a manufacturing method capable of reducing costs. [Means for solving the problem]
[0011] One embodiment of the present invention is a method for manufacturing a channel protection transistor using a multi-tone photodiode. A metal oxide film having a channel region and a channel protection film are formed by a process using a mask. In addition, one embodiment of the present invention is a method for forming a transistor and a capacitor at the same time. The method for manufacturing the transistor includes a process using a multi-tone photomask. a metal oxide film having a channel region and a channel protection film; one electrode of a capacitance element; The present invention is characterized in that:
[0012] One aspect of the present invention is to form a gate electrode and a gate insulating film on an insulating surface, a first metal oxide film and a first insulating film are formed on the first insulating film, and a first thickness is formed on the first insulating film. a first mask having an area having a second thickness greater than the first thickness; forming a second mask having the same thickness as the first thickness; and combining the first mask and the second mask. The first insulating film and the first metal oxide film are etched using the Then, the first insulating film, the second insulating film, and the third insulating film are formed. Then, the second metal oxide film and the third metal oxide film are formed. After processing the first mask to form a third mask and removing the second mask, The second insulating film is etched using the third mask to form a fourth insulating film on the second metal oxide film. The insulating film is formed and the third insulating film on the third metal oxide film is removed. Next, the second metal oxide film is a nitride insulating film on the metal oxide film, the third metal oxide film, the fourth insulating film, and the gate insulating film; A fifth insulating film is formed by etching a part of the fifth insulating film. After forming an opening in the film, a pair of electrodes in contact with the second metal oxide film and a third metal oxide film are Next, a wiring is formed on the fifth insulating film, which is connected to one of the pair of electrodes and and forming a light-transmitting conductive film which overlaps a part of the third metal oxide film. This is the manufacturing method.
[0013] One aspect of the present invention is to form a gate electrode and a gate insulating film on an insulating surface, a first metal oxide film and a first insulating film are formed on the first insulating film, and a first thickness is formed on the first insulating film. a first mask having an area having a second thickness greater than the first thickness; A second mask having the same thickness as the first thickness is formed. Next, the first mask and the second mask are The first insulating film and the first metal oxide film are respectively etched using a mask to form a second The first insulating film, the third insulating film, the second metal oxide film, and the third metal oxide film are formed. Next, the first mask is processed to form a third mask and remove the second mask. After removing the second insulating film, the second insulating film is etched using a third mask to form a second metal oxide film. A fourth insulating film is formed on the third metal oxide film, and the third insulating film on the third metal oxide film is removed. A pair of electrodes contacting the second metal oxide film and a wiring contacting the third metal oxide film are formed. A nitride insulating film is formed on the pair of electrodes, the fourth insulating film, the third metal oxide film, and the wiring. Next, a part of the fifth insulating film is etched to form the fifth insulating film. After forming an opening in the insulating film, a third metal oxide film is formed on one of the pair of electrodes. The present invention relates to a method for manufacturing a semiconductor device, and a method for manufacturing the same, in which a light-transmitting conductive film is formed to overlap with a conductive portion.
[0014] After the fifth insulating film is formed, an opening is formed in the gate insulating film and the fifth insulating film. At the same time, a part of the gate electrode is exposed, a light-transmitting conductive film is formed, and A conductive film may be formed that is connected to the gate electrode and overlaps the second metal oxide film.
[0015] It also functions as a gate electrode, a gate insulating film, a second metal oxide film, and a channel protection film. The fourth insulating film and the pair of electrodes constitute a transistor. A capacitor is formed using the insulating film, the fifth insulating film, and the light-transmitting conductive film.
[0016] The third metal oxide film is in contact with the fifth insulating film made of a nitride insulating film. The third metal oxide film has electrical conductivity and functions as one electrode of the capacitor element.
[0017] The second metal oxide film and the third metal oxide film have different hydrogen concentrations. The first metal oxide film has a higher hydrogen concentration than the second metal oxide film.
[0018] The first metal oxide film, the second metal oxide film, and the third metal oxide film are light-transmitting. The first metal oxide film, the second metal oxide film, and the third metal oxide film have The first metal oxide film and the second metal oxide film are made of at least one of In, Ga, and Zn. The first metal oxide film and the third metal oxide film are composed of the same metal element.
[0019] Also, the gate insulating film has a region in contact with the second metal oxide film and the third metal oxide film. The region is formed of an oxide insulating film. Also, a fourth insulating film is formed on the second metal oxide film. The contacting region is formed of an oxide insulating film.
[0020] A part of the gate insulating film is formed of a nitride insulating film, and the nitride insulating film and the fifth The insulating films are in contact with each other.
[0021] The fourth insulating film includes an oxide insulating film from which part of oxygen is released by heating. Effect of the Invention
[0022] According to one embodiment of the present invention, a capacitance element having a high aperture ratio and capable of increasing a charge capacity is provided. In the method for manufacturing a semiconductor device having a semiconductor device, the cost can be reduced. In a method for manufacturing a semiconductor device that can reduce the number of defects, costs can be reduced. [Brief description of the drawings]
[0023] [Figure 1] 1A and 1B are a block diagram and a circuit diagram illustrating one embodiment of a semiconductor device. [Diagram 2] FIG. 1 is a top view illustrating one embodiment of a transistor. [Diagram 3] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a transistor. [Figure 4] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a transistor. [Diagram 5] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a transistor. [Figure 6] FIG. 1 is a top view illustrating one embodiment of a transistor. [Figure 7] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a transistor. [Figure 8] 1A to 1C are cross-sectional views illustrating one mode of a method for manufacturing a transistor. [Figure 9] FIG. 1 is a cross-sectional view illustrating one embodiment of a transistor. [Figure 10] FIG. 1 is a top view illustrating one embodiment of a transistor. [Figure 11]FIG. 1 is a cross-sectional view illustrating one embodiment of a transistor. [Figure 12] FIG. 1 is a diagram illustrating an electronic device. [Figure 13] FIG. 4 is a diagram illustrating the temperature dependence of resistivity. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0024] Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the following description, and the embodiments and aspects of the present invention may be modified without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that various modifications may be made to the embodiments and details of the present invention. However, the present invention should not be construed as being limited to the description of the following embodiments and examples. In the following embodiments and examples, the same parts or parts having similar functions are In the case of parts, the same reference numerals or the same hatch patterns are used in common among different drawings, and the repetition The explanation of the repetition will be omitted.
[0025] In each figure described in this specification, the size, thickness, or area of each component is indicated by the following formula: The figures may be exaggerated for clarity and are not necessarily limited to scale. stomach.
[0026] In addition, the terms "first," "second," "third," etc., used in this specification are used interchangeably to avoid confusion of components. The number is added for convenience and is not intended to be a numerical limit. The terms can be replaced with "second" or "third" as appropriate for explanation.
[0027] The function of the "source" and "drain" is to change the direction of the current during circuit operation. For this reason, in this specification, the terms "sauce" and "dressing" are used interchangeably. The terms "in" and "in" may be used interchangeably.
[0028] Voltage is the potential difference between two points, and potential is the electrostatic field at a certain point. This refers to the electrostatic energy (electrical potential energy) possessed by a unit charge in a particle. Generally, the potential difference between a potential at a certain point and a reference potential (for example, ground potential) This is simply called potential or voltage, and potential and voltage are often used synonymously. Therefore, in this specification, unless otherwise specified, potential may be read as voltage. In this specification, voltage may be read as potential.
[0029] In this specification, when an etching process is performed after a photolithography process, The mask formed in the photolithography process is removed.
[0030] (Embodiment 1) In this embodiment, a capacitive element having a high aperture ratio and capable of increasing a charge capacity is provided. The object of the present invention is to provide a manufacturing method for a semiconductor device having a structure capable of reducing costs. Another embodiment of the present invention is a semiconductor device capable of reducing power consumption. It is an object of the present invention to provide a manufacturing method capable of reducing costs.
[0031] In addition, an oxide semiconductor, which is a metal oxide having semiconductor properties, is used as the metal oxide. In the case of a transistor, oxygen is one example of a defect that can lead to poor electrical characteristics of the transistor. For example, a transistor using an oxide semiconductor film that has oxygen vacancies in the film The threshold voltage of the transistor tends to fluctuate in the negative direction, and the transistor tends to have normally-on characteristics. This is because oxygen vacancies in the oxide semiconductor film generate charges, which reduces the resistance. If a transistor has normally-on characteristics, malfunctions are likely to occur during operation. Various problems may occur, such as the power consumption during non-operation or the power consumption during non-operation. The amount of change in the electrical characteristics of transistors, typically the threshold voltage, changes as a result of the application of thermal and stress tests. There is a growing problem.
[0032] In addition to oxygen deficiencies, impurities such as silicon and carbon, which are constituent elements of the insulating film, can also cause damage to the transistor. Therefore, the impurities may be mixed into the oxide semiconductor film, which may cause poor electrical characteristics of the transistor. As a result, the resistance of the oxide semiconductor film is reduced, and the oxide semiconductor film is easily deteriorated due to deterioration over time or in a stress test. This leads to a problem that the amount of fluctuation in the electrical characteristics of the transistor, typically the threshold voltage, increases. There is.
[0033] In this embodiment, in addition to the problem to be solved by the present invention, In the semiconductor device having the transistor, An object of the present invention is to reduce oxygen vacancies and the impurity concentration in the oxide semiconductor film.
[0034] In this embodiment mode, as a method for solving one of the above problems, a manufacturing method of a semiconductor device will be described. In this embodiment, a process using a multi-tone photomask is performed. The present invention is characterized in that a metal oxide film having a channel region and a channel protection film are formed. .
[0035] FIG. 1A shows an example of a semiconductor device. The semiconductor device shown in FIG. The scanning line driving circuit 14 and the signal line driving circuit 16 are arranged in parallel or approximately in parallel with each other. The m scanning lines 17, the potential of which is controlled by the scanning line driving circuit 14, are parallel to each other. n signal lines are arranged in parallel or substantially parallel to each other, and the potentials of the signal lines are controlled by a signal line driving circuit 16. The pixel section 11 further includes a plurality of pixels 13 arranged in a matrix. In addition, the capacitance lines 15 are arranged parallel or approximately parallel to each other along the signal lines 19. The capacitance lines 15 are arranged parallel or approximately parallel to each other along the scanning lines 17. The scanning line driver circuit 14 and the signal line driver circuit 16 may be collectively referred to as a driver circuit section. There are cases where this is said.
[0036] Each scanning line 17 corresponds to one of the pixels 13 arranged in m rows and n columns in the pixel section 11. Each signal line 19 is electrically connected to n pixels 13 arranged in m rows and n Among the pixels 13 arranged in a column, m pixels 13 arranged in any one column are electrically connected. Both m and n are integers equal to or greater than 1. The capacitance lines 15 are arranged in m rows and n columns. Among the pixels 13 arranged in the row, n pixels 13 arranged in the row are electrically connected to The capacitance lines 15 are arranged parallel or approximately parallel to each other along the signal lines 19. In this case, m pixels 13 arranged in m rows and n columns are arranged in any one of the columns. 13 is electrically connected to
[0037] 1B and 1C show a circuit that can be used for the pixel 13 of the display device shown in FIG. 1A. 1 shows an example of a road configuration.
[0038] The pixel 13 shown in FIG. 1B includes a liquid crystal element 21, a transistor 22, and a capacitor 25. , has.
[0039] The potential of one of the pair of electrodes of the liquid crystal element 21 is set appropriately according to the specifications of the pixel 13 . The alignment state of the liquid crystal element 21 is set by the written data. A common potential is applied to one of a pair of electrodes of the liquid crystal element 21 of each of the liquid crystal display devices 3. Alternatively, a different potential may be applied to one of the pair of electrodes of the liquid crystal element 21 for each row of pixels 13. May be given.
[0040] The liquid crystal element 21 controls the transmission or non-transmission of light by the optical modulation effect of the liquid crystal. The optical modulation effect of liquid crystal is achieved by the electric field applied to the liquid crystal (horizontal electric field, vertical electric field). The liquid crystal element 21 is controlled by a vertical electric field (including a vertical electric field or an oblique electric field). , nematic liquid crystal, cholesteric liquid crystal, smectic liquid crystal, thermotropic liquid crystal, Examples of the liquid crystal include iotropic liquid crystal, ferroelectric liquid crystal, and antiferroelectric liquid crystal.
[0041] The display device having the liquid crystal element 21 can be driven in, for example, a TN mode or a VA mode. , ASM(Axially Symmetric Aligned Micro-cel l) mode, OCB (Optically Compensated Birefring ingression mode, MVA mode, PVA (Patterned Vertical Alignment) mode, IPS mode, FFS mode, or TBA (Trans You can also use the (Verse Bend Alignment) mode. However, various liquid crystal elements and driving methods thereof can be used.
[0042] Also, a liquid crystal composition containing a liquid crystal exhibiting a blue phase and a chiral agent. The liquid crystal element may be configured by the liquid crystal that exhibits the blue phase. Since it is short and optically isotropic, it does not require alignment treatment and has small viewing angle dependency.
[0043] In the configuration of the pixel 13 shown in FIG. One of the electrodes is electrically connected to the signal line 19, and the other is the other of the pair of electrodes of the liquid crystal element 21. The gate electrode of the transistor 22 is electrically connected to the scanning line 17. The transistor 22 is turned on or off to The transistor 22 has a function of controlling the writing of signal data. The transistor described in any of Embodiments 1 to 7 can be used.
[0044] In the configuration of the pixel 13 shown in FIG. 1B, one of the pair of electrodes of the capacitor 25 is connected to a potential The other end is electrically connected to the other of the pair of electrodes of the liquid crystal element 21. The potential value of the capacitance line 15 is appropriately set according to the specifications of the pixel 13. The capacitance element 25 functions as a storage capacitor for storing written data. do.
[0045] For example, in a display device having the pixel 13 shown in FIG. 1B, the scanning line driving circuit 14 drives each row The pixels 13 are sequentially selected, the transistors 22 are turned on, and the data of the data signal is written. Enter.
[0046] The pixel 13 to which the data has been written is in a holding state by turning off the transistor 22. By performing this process row by row, an image can be displayed.
[0047] In addition, the pixel 13 shown in FIG. 1C includes a transistor 33 for switching a display element. a transistor 22 for controlling driving of the pixel, a transistor 35, a capacitor element 25, and a light emitting element 31.
[0048] An example of the light-emitting element 31 is a light-emitting element having an anode, a cathode, and an EL layer sandwiched between the anode and the cathode. An example of an EL layer is a device in which light emission (fluorescence) from singlet excitons occurs. a layer having a material capable of emitting light from triplet excitons (phosphorescence); Materials capable of emitting light from single excitons (fluorescence) and materials capable of emitting light from triplet excitons (phosphorescence) The layer may include a layer having a material.
[0049] One of the source and drain electrodes of the transistor 33 is connected to a signal line to which a data signal is applied. The gate electrode of transistor 22 is electrically connected to gate signal line 19. is electrically connected to a scan line 17 to which
[0050] The transistor 33 is turned on or off to convert the data of the data signal into a It has the function of controlling writing.
[0051] One of the source and drain electrodes of the transistor 22 functions as an anode line. The other of the source electrode and the drain electrode of the transistor 22 is electrically connected to the wiring 37. , electrically connected to one electrode of the light emitting element 31. The electrode is the other of the source electrode and the drain electrode of the transistor 33 and one of the capacitor elements 25. The electrode is electrically connected to the other electrode.
[0052] The transistor 22 is turned on or off to allow current to flow to the light emitting element 31. It has the function of controlling the current.
[0053] One of the source and drain electrodes of the transistor 35 is given a data reference potential. The other of the source electrode and the drain electrode of the transistor 35 is connected to a wiring 39 through which a light emitting One electrode of the element 31 and the other electrode of the capacitance element 25 are electrically connected to each other. The gate electrode of the transistor 35 is electrically connected to the scanning line 17 to which a gate signal is applied. can be.
[0054] The transistor 35 has a function of adjusting a current flowing through the light-emitting element 31. When the internal resistance of the light emitting element 31 increases due to deterioration of the light emitting element 31, the transistor 35 The current flowing through the wiring 39 to which one of the source electrode and the drain electrode of the By doing so, the current flowing through the light emitting element 31 can be corrected. The potential can be, for example, 0V.
[0055] One of the pair of electrodes of the capacitor 25 is a source electrode and a drain electrode of the transistor 33. and a gate electrode of the transistor 22. The other of the electrodes is connected to the other of the source electrode and drain electrode of the transistor 35 and the light-emitting element 3 The sensor is electrically connected to one electrode of sensor 1.
[0056] In the configuration of the pixel 13 shown in FIG. 1C, the capacitance element 25 stores the written data. It functions as a storage capacitor.
[0057] One of the pair of electrodes of the light emitting element 31 is a source electrode and a drain electrode of the transistor 35. the other of the capacitance element 25, and the other of the source electrode and drain electrode of the transistor 22. The other of the pair of electrodes of the light emitting element 31 functions as a cathode. The signal line 41 is electrically connected to the signal line 41.
[0058] The light-emitting element 31 may be, for example, an organic electroluminescence element (also called an organic EL element). However, the light emitting element 31 is not limited to this, and any other suitable light emitting element may be used. An inorganic EL element made of organic materials may also be used.
[0059] Note that a high power supply potential VDD is applied to one of the wiring 37 and the wiring 41, and a low power supply potential VDD is applied to the other. In the configuration shown in FIG. 1C, a high power supply potential VSS is applied to the wiring 37. A power supply potential VSS is applied to the wiring 41 and a low power supply potential VSS is applied to the wiring 42.
[0060] In the display device having the pixel 13 of FIG. 1C, the pixel 1 of each row is driven by the scanning line driving circuit 14. 3 are selected in sequence, transistor 22 is turned on, and data of the data signal is written.
[0061] The pixel 13 to which the data has been written is in a holding state by turning off the transistor 22. Furthermore, since the transistor 22 is connected to the capacitance element 25, the written The data can be retained for a long time. The amount of current flowing between the drain electrode and the gate electrode is controlled, and the light emitting element 31 emits a light in accordance with the amount of current flowing. By performing this process row by row, an image can be displayed.
[0062] In this specification and the like, the term "display element," "display device having a display element," "light-emitting element," A light-emitting device, which is a device having a light-emitting element and a light-emitting device, may be used in various forms or in various forms. Examples of a display element, a display device, a light-emitting element, or a light-emitting device include For example, EL (electroluminescence) elements (EL elements including organic and inorganic materials, organic EL elements, inorganic EL elements), transistors (transistors that emit light according to electric current), electronics Emission element, liquid crystal element, electronic ink, electrophoretic element, digital micromirror device (D MD), DMS (Digital Micro Shutter), etc., are made by electro-magnetic action. Some have display media that change contrast, brightness, reflectance, transmittance, etc. An example of a display device using electron-emitting devices is an EL display. An example of such a display device is a field emission display (FED) or SE. D-type flat panel display (SED: Surface-conduction Electro Display devices using liquid crystal elements include One example is a liquid crystal display (transmissive liquid crystal display, semi-transmissive liquid crystal display). , reflective LCDs, direct-view LCDs, projection LCDs, etc. An example of a display device using electronic ink or electrophoretic elements is electronic paper. There is.
[0063] Next, a specific example of an element substrate of a liquid crystal display device using a liquid crystal element for the pixel 13 will be described. Here, a top view of the pixel 13 shown in FIG.
[0064] In FIG. 2, the conductive film 103 functioning as the scanning line is oriented in a direction substantially perpendicular to the signal line ( The conductive film 117a, which functions as a signal line, is a scanning line. The conductors functioning as capacitance lines are arranged to extend in a direction substantially perpendicular to the The conductive film 117c is provided so as to extend in a direction parallel to the signal line. The conductive film 103 is electrically connected to a scanning line driver circuit 14 (see FIG. 1(A)). The conductive film 117a functioning as a signal line and the conductive film 117c functioning as a capacitance line are , and is electrically connected to a signal line driver circuit 16 (see FIG. 1(A)).
[0065] The transistor 22 is provided in the area where the scan line and the signal line intersect. The gate electrode 22 includes a conductive film 103 that functions as a gate electrode, a gate insulating film (not shown in FIG. 2), A metal oxide film 109a in which a channel region is formed on the gate insulating film, a source The conductive films 117a and 117b function as a drain electrode and a drain electrode. The conductive film 103 also functions as a scan line, and a region overlapping with the metal oxide film 109a is a transistor. The conductive film 117a functions as a gate electrode of the transistor 22. The conductive film 117a also functions as a signal line. The region overlapping with the metal oxide film 109a serves as the source electrode or drain electrode of the transistor 22. In FIG. 2, the scanning line has a metal end in the top view. The scanning lines are located outside the edge of the oxide film 109a. As a result, the metal oxide in the transistor functions as a light shielding film that blocks light from the source. The film 109a is not irradiated with light, and fluctuations in the electrical characteristics of the transistor can be suppressed. In addition, since the metal oxide film 109a is formed using a metal oxide having semiconductor properties, Therefore, a channel region is formed in the metal oxide film 109a.
[0066] The conductive film 117b is electrically connected to the light-transmitting conductive film 119 which functions as a pixel electrode. are connected to the network.
[0067] The capacitance element 25 is made up of a metal oxide film 109c formed on the gate insulating film and a pixel electrode. The light-transmitting conductive film 119 that functions as a gate insulating film and the nitride insulating film 121 that is provided over the transistor 22 The metal oxide film 109c is made of a dielectric film formed of a metal oxide film. Therefore, the capacitor 25 has a light-transmitting property. The metal oxide film 109c is a conductive film 117 that functions as a capacitance line in the opening 115c. It is connected to c.
[0068] In this way, since the capacitance element 25 is transparent, the capacitance element 25 can be made large within the pixel 13. Therefore, it is possible to form the aperture ratio at 50% or more, preferably at a large area. It is possible to increase the charge capacity to 55% or more, preferably 60% or more. For example, a semiconductor device having a high resolution, such as a liquid crystal display device, can be obtained. In such a device, the area of the pixel is reduced and the area of the capacitance element is also reduced. In a semiconductor device with a high capacitance, the charge capacity stored in the capacitance element is small. Therefore, since the capacitor 25 shown in this embodiment has a light-transmitting property, the capacitor is provided in a pixel. By doing so, it is possible to obtain a sufficient charge capacity in each pixel while increasing the aperture ratio. In terms of pixel density, we want something with a pixel density of 200ppi or more, 300ppi or more, or even 500ppi or more. The present invention can be suitably used for high-resolution semiconductor devices having a resolution of i or higher.
[0069] In addition, the pixel 13 shown in FIG. 2 has a side parallel to the conductive film 103 that functions as a scanning line. The side parallel to the conductive film 117a functioning as a signal line is shorter than the side parallel to the conductive film 117a. The conductive film 117c functioning as a signal line is parallel to the conductive film 117a functioning as a signal line. As a result, the area of the conductive film 117c in the pixel 13 is reduced. Since this is possible, the aperture ratio can be increased.
[0070] In addition, according to one embodiment of the present invention, the aperture ratio can be increased even in a high-resolution display device. This allows the light from light sources such as backlights to be used efficiently, and reduces the power consumption of the display device. The force can be reduced.
[0071] Next, using the cross-sectional views of the dashed and dotted lines AB and CD shown in FIG. A method for manufacturing the element substrate of the device will be described.
[0072] As shown in FIG. 3A, a conductive film 102 is formed on a substrate 101. Next, a first photo A mask 131 is formed on the conductive film 102 by a photolithography process using a mask. do.
[0073] There is no particular restriction on the material of the substrate 101, but it should be strong enough to withstand the subsequent heat treatment. For example, glass substrates, ceramic substrates, quartz substrates, and sa A fire substrate or the like may be used as the substrate 101. Also, silicon, silicon carbide, etc. A single crystal semiconductor substrate, a polycrystalline semiconductor substrate, a silicon germanium substrate, or the like, formed using a It is also possible to apply a compound semiconductor substrate, an SOI substrate, etc., and a semiconductor element is formed on these substrates. A substrate having a gate electrode may be used as the substrate 101. When using a substrate, the 6th generation (1500mm x 1850mm) and 7th generation (1870mm) m x 2200mm), 8th generation (2200mm x 2400mm), 9th generation (2400m Using large area substrates such as 10th generation (2950mm x 3400mm) By this, a large display device can be manufactured.
[0074] In addition, a flexible substrate is used as the substrate 101, and a conductive film 102 is formed directly on the flexible substrate. Alternatively, a release layer may be provided between the substrate 101 and the conductive film 102, and a transistor may be formed on the release layer. After the element portion having the transistor is fabricated, the element portion is peeled off from the substrate 101 at the peeling layer, As a result, the element may be placed on a substrate having low heat resistance or a substrate having flexibility. A department may be established.
[0075] The conductive film 102 will later become a conductive film 103 that functions as a gate electrode. The conductive film 102 is made of a conductive material that can be used as a gate electrode. 2 is selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, and tungsten. The metallic elements mentioned above, or alloys containing the metallic elements mentioned above, or combinations of the metallic elements mentioned above In addition, it can be formed by using an alloy of manganese and zirconium. Alternatively, the conductive film 102 may have a single layer structure. For example, a single layer of aluminum film containing silicon may be used. A two-layer structure in which an aluminum film is laminated on a titanium film, and a titanium film is laminated on a titanium nitride film Two-layer structure with a tungsten film laminated on a titanium nitride film, two-layer structure with a tantalum nitride film laminated on a titanium nitride film Two-layer structure with tungsten film on tungsten nitride film, copper film on titanium film A two-layer structure in which a titanium film is laminated, an aluminum film is laminated on the titanium film, and then There are three-layer structures, such as a titanium film on top of aluminum. , a film of an element selected from tungsten, molybdenum, chromium, neodymium, and scandium; Alternatively, an alloy film in which a plurality of layers are combined, or a nitride film may be used.
[0076] The conductive film 102 may be formed of an indium tin oxide film or an indium oxide film containing tungsten oxide. oxide film, indium zinc oxide film containing tungsten oxide, indium zinc oxide film containing titanium oxide Oxide film, indium tin oxide film containing titanium oxide, indium zinc oxide film, silicon oxide A film formed of a conductive material having light transmitting properties, such as an indium tin oxide film containing copper, is used. In addition, a film formed of the above-mentioned light-transmitting conductive material and the above-mentioned metal It may also be a laminated structure of films formed from elements.
[0077] Here, a tungsten film having a thickness of 100 nm is formed as the conductive film 102 by sputtering. Next, a mask is formed by a photolithography process.
[0078] Next, a part of the conductive film 102 is etched using the mask 131 to form a gate electrode. A functional conductive film 103 is formed by dry etching or / and wet etching. The conductive film 102 can be etched by using a method. After that, the mask 131 is removed. (See FIG. 3(B)).
[0079] Here, a tungsten film formed as the conductive film 102 is dry-etched using a mask. Then, a conductive film 103 that functions as a gate electrode is formed.
[0080] Next, as shown in FIG. 3(C), the insulating film 105, the insulating film 106, the metal oxide film 108, The insulating film 110 is then formed. Next, a photolithography process is performed using a second photomask. In this step, masks 133 and 135 are formed on the insulating film 110. The mask is characterized by using a multi-tone mask.
[0081] A multi-level photomask is a mask that can perform exposure with multiple levels of light intensity. Specifically, there are gray-tone masks and half-tone masks. A light-shielding portion and a diffraction grating are formed on a substrate having optical properties. The diffraction grating is a slit or dot pattern. The intervals between the light transmitting regions such as meshes are equal to or less than the resolution limit of the light used for exposure. This structure controls the light transmittance. The half-tone mask is formed on a light-transmitting substrate. The light-shielding portion and the semi-transmitting portion are formed. The semi-transmitting portion controls the transmittance of the light used for exposure. .
[0082] By using a multi-tone mask, three levels of light intensity are achieved: exposed, semi-exposed, and unexposed. As a result, by using a multi-tone photomask, it is possible to perform exposure in one exposure. and forming a resist mask having multiple (typically two) thicknesses by a development process. This makes it possible to reduce the number of photomasks. In the process of forming the oxide films 109a and 109b and the insulating film 111c, a multi-tone photomask By using this method, the number of photomasks can be reduced by one.
[0083] The insulating film 105 and the insulating film 106 will later become a gate insulating film. The conductive film 103, which functions as a gate electrode, is formed on the substrate 101 and the metal oxide film 108. In order to prevent the diffusion of impurities, it is preferable to form the insulating film using a nitride insulating film. The insulating film 106 contacts the metal oxide film 108. In order to reduce the surface state, the insulating film 106 is preferably formed using an oxide insulating film.
[0084] The insulating film 105 is made of silicon nitride, silicon oxynitride, aluminum nitride, or aluminum oxynitride. The insulating film 11 may be formed of, for example, aluminum, and may be provided as a multilayer or single layer.
[0085] The insulating film 106 is made of silicon oxide, silicon oxynitride, aluminum oxide, hafnium oxide, or the like. The insulating layer 11 may be formed of, for example, aluminum, gallium oxide, or Ga-Zn-based metal oxide. is provided in a single layer.
[0086] The insulating film 106 is made of hafnium silicate (HfSiO x ), nitrogen is added Hafnium silicate (HfSi x O y N z ), nitrogen-doped hafnium aluminate (HfAl x O y N z ), high-k materials such as hafnium oxide and yttrium oxide By forming the gate insulating film using this material, the gate leakage of the transistor can be reduced.
[0087] The total thickness of the insulating film 105 and the insulating film 106 is preferably 5 nm or more and 400 nm or less. Preferably, the thickness is 10 nm or more and 300 nm or less, and more preferably, 50 nm or more and 250 nm or less. It is good.
[0088] The insulating film 105 and the insulating film 106 are formed by a CVD method, a sputtering method, a vapor deposition method, a coating method, or the like. It can be used appropriately.
[0089] By providing the insulating film 105 made of a nitride insulating film as a part of the gate insulating film, Impurities from the conductive film 103 functioning as a gate electrode, typically hydrogen, nitrogen, alkali, etc. It is possible to prevent metals, alkaline earth metals, etc. from migrating to the metal oxide film 109a. can.
[0090] In addition, as a gate insulating film, an insulating film formed of an oxide insulating film on the metal oxide film 109a side is used. By providing the film 106, the defect level at the interface between the gate insulating film and the metal oxide film 109a is As a result, a transistor with little deterioration in electrical characteristics can be obtained. This can be done.
[0091] The metal oxide film 108 is typically an In-Ga oxide film, an In-Zn oxide film, or an In -M-Zn oxide film (M is Al, Ga, Ti, Y, Zr, La, Ce, or Nd), etc. Since the metal oxide film has semiconductor properties, it is possible to use the metal oxide film as an oxide semiconductor. It is also possible to say that.
[0092] When the metal oxide film 108 is an In-M-Zn oxide film, the sum of In and M is When the atomic percentage of In is 100 atomic %, the atomic ratio of In to M is preferably 25 atomic %. mic%, M is less than 75 atomic%, and more preferably In is 34 atomic%. mic% and M is less than 66 atomic%.
[0093] The energy gap of the metal oxide film 108 is 2 eV or more, preferably 2.5 eV or more. , and more preferably 3 eV or more. By forming the transistor using the above, the off-state current of a transistor to be formed later can be reduced. .
[0094] The metal oxide film 108 is a metal oxide film having a low carrier density. The metal oxide film 108 has a carrier density of 1×10 17 pieces / cm 3 Less than or equal to 1×10 15 pieces / cm 3 Less than 1×10, more preferably 13 pieces / cm 3 More preferably, 1 ×10 11 pieces / cm 3 The following metal oxide films are used:
[0095] The thickness of the metal oxide film 108 is 3 nm or more and 200 nm or less, preferably 3 nm or more and 10 0 nm or less, and more preferably 3 nm or more and 50 nm or less.
[0096] The metal oxide film 108 can be formed by sputtering, coating, pulsed laser deposition, laser deposition, or the like. It can be formed by using an ablation method or the like.
[0097] When the metal oxide film 108 is formed by the sputtering method, a plasma generating device is used. The power supply may be an RF power supply, an AC power supply, a DC power supply, or the like.
[0098] The sputtering gas is a rare gas (typically argon), oxygen, or a mixture of a rare gas and oxygen. In the case of a mixture of rare gas and oxygen, the amount of oxygen gas is appropriately adjusted relative to the amount of rare gas. A higher ratio is preferred.
[0099] The metal oxide film 108 is an In-M-Zn oxide film (wherein M is Al, Ti, Ga, Y, Zr, In the case of La, Ce, Nd or Hf, it is used to deposit an In-M-Zn oxide film. The atomic ratio of the metal elements in the sputtering target is In:M:Z. If n=x1:y1:z1 、 x1 / y1 is between 1 / 3 and 6, and between 1 and 6. and z1 / y1 is preferably 1 / 3 or more and 6 or less, and more preferably 1 or more and 6 or less. In addition, by setting z1 / y1 to 1 or more and 6 or less, it is possible to obtain a metal oxide film 108 as described later. CAAC-OS(C Axis Aligned Crystalline Oxid The metal element of the target is easily formed. Representative examples of the molecular ratio are In:M:Zn=1:1:1, In:M:Zn=3:1:2, The atomic ratio of the metal oxide film 108 to be formed is In:M:Zn=5:5:6. are the plus or minus of the atomic ratio of the metal elements contained in the target as errors. Includes a 40% fluctuation.
[0100] In order to obtain a high-purity metal oxide film 108, the inside of the chamber must be evacuated to a high vacuum. In addition, the sputtering gas must be highly purified. Gongas has a dew point of -40°C or less, preferably -80°C or less, more preferably -100°C or less. The gas is preferably purified to a temperature of -120°C or lower. It is possible to prevent moisture and the like from being absorbed into the film as much as possible.
[0101] The insulating film 110 is formed by oxidation in order to reduce the interface state at the interface with the metal oxide film 108. The insulating film 110 is preferably a silicon oxide or an oxynitride. Silicon, aluminum oxide, hafnium oxide, gallium oxide or Ga-Zn-based metal oxide The insulating film 11 may be formed using a compound such as a fluorine compound, and may be provided as a laminated layer or a single layer.
[0102] In addition, the insulating film 110 may contain more oxygen than satisfies the stoichiometric composition. It is preferable to form the insulating film using an oxide insulating film containing oxygen having a stoichiometric composition. When an oxide insulating film contains more oxygen than the elemental oxygen, some of the oxygen is released by heating. The oxide insulating film containing more oxygen than the oxygen that satisfies the optical composition has a TDS (Thermal Deposition Strength) In the Desorption Spectroscopy analysis, the surface temperature was 100℃ Equivalent to oxygen atoms during heat treatment at temperatures between 700°C and 700°C, or between 100°C and 500°C The amount of oxygen released is 1.0×10 18 atoms / cm 3 More than 3.0x1, preferably 0 20 atoms / cm 3 The oxide insulating film is as described above.
[0103] In addition, it is preferable that the insulating film 110 has a small amount of defects. The spin density of the signal at g=2.001 originating from the silicon dangling bond is 1.5 x 10 18 spins / cm 3 Less than or even 1×10 18 spins / cm 3 Below Bottom, 1×10 17 spins / cm 3 or less, and more preferably, less than the lower detection limit. .
[0104] The thickness of the insulating film 110 is 30 nm or more and 500 nm or less, preferably 50 nm or more and 400 nm or less. nm or less.
[0105] The insulating film 110 is an oxide insulating film containing more oxygen than the oxygen required for the stoichiometric composition. By forming the insulating film 110 using a metal oxide film, oxygen released from the insulating film 110 by heat treatment can be converted to oxygen by a metal oxide film. As a result, the oxygen contained in the metal oxide film 108 can be moved to the metal oxide film 108. The defects can be reduced.
[0106] The insulating film 110 can be formed by a sputtering method, a CVD method, or the like.
[0107] When the insulating film 110 is formed by using the CVD method, the source gas is a silicon-containing deposit. It is preferable to use an oxidizing gas and an insulating gas. Representative examples of the deposition gas containing silicon are: Examples of oxidizing gases include silane, disilane, trisilane, and fluorinated silane. These include oxygen, ozone, nitrous oxide, and nitrogen dioxide.
[0108] An oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition as the insulating film 110. In the case of forming the film using the above method, a substrate is placed in a processing chamber of a plasma CVD apparatus which is evacuated to a vacuum. The plate is kept at a temperature of 180° C. or higher and 280° C. or lower, more preferably 200° C. or higher and 240° C. or lower, A raw material gas is introduced into the processing chamber to set the pressure in the processing chamber to 100 Pa or more and 250 Pa or less, More preferably, the pressure is set to 100 Pa or more and 200 Pa or less, and the pressure applied to the electrode provided in the processing chamber is set to 0.1 7W / cm 2 More than 0.5W / cm 2 Less than or equal to 0.25 W / cm 2 Above 0. 35W / cm 2Silicon oxide film or oxynitride film is formed by supplying the following high frequency power. A silicon film can be formed.
[0109] The conditions for forming the insulating film 110 are as follows: high frequency power density in a reaction chamber with the above pressure; By supplying power, the efficiency of decomposition of the source gas in the plasma increases, and the number of oxygen radicals increases. As the oxidation of the source gas progresses, the oxygen content in the insulating film 110 becomes lower than the stoichiometric composition. On the other hand, in the film formed at the above substrate temperature, the bonding strength between silicon and oxygen is Since the oxygen in the film is weak, some of the oxygen in the film is released by the heat treatment in the subsequent process. An insulating film that contains more oxygen than satisfies the theoretical composition and loses some of the oxygen when heated 110 can be formed.
[0110] The insulating film 110 has a multi-layer structure of a first insulating film and a second insulating film. The second insulating film is formed using an oxide insulating film that can transmit oxygen. An acid that contains more oxygen than satisfies the stoichiometric composition and loses some of the oxygen when heated. By forming the laminated structure, the second insulating film can be formed. As a result, the first insulating film acts as a protective film for the metal oxide film. The second insulating film can be formed by using high-frequency power with high power density while reducing the do.
[0111] Alternatively, an insulating film is formed by a sputtering method, a CVD method, or the like, and then the insulating film is oxidized. By adding oxygen, the insulating film 110 can be formed. The method of adding the ions includes ion doping and ion implantation. Oxygen is added to the insulating film by exposing the insulating film to plasma containing oxygen generated in the atmosphere. It is possible.
[0112] Here, the insulating film 105 is a silicon nitride film having a thickness of 400 nm formed by a CVD method. As the insulating film 106, a silicon oxynitride film having a thickness of 50 nm is formed by a CVD method. In addition, as the metal oxide film 108, an In-Ga-Zn oxide target A 35-nm-thick I was deposited by sputtering using In:Ga:Zn=1:1:1. An n-Ga-Zn oxide film is formed. Silane and nitrous oxide at a flow rate of 4000 sccm were used as raw gases, and the pressure in the reaction chamber was set to 200 The temperature was set at 220°C, and a 1500W high-frequency power supply was used. By using a plasma CVD method in which high frequency power is supplied to parallel plate electrodes, a film having a thickness of A silicon oxynitride film of 400 nm is formed. The plasma CVD equipment has an electrode area of 6 000cm 2 This is a parallel plate type plasma CVD device that supplies power per unit area. This is converted to 0.25W / cm 2 Also, halftone matrices are Masks 133 and 135 are formed using a mask.
[0113] Next, a part of the insulating film 110 is etched using the masks 133 and 135 to form a As shown in FIG. 2D, insulating films 111a and 111b are formed by dry etching or / and Then, the insulating film 110 can be etched by using a wet etching method. Then, a part of the metal oxide film 108 is etched using the masks 133 and 135 to form a metal oxide film. The oxide films 109a and 109b are formed by dry etching or / and wet etching. The metal oxide film 108 can be etched using a etching method.
[0114] Here, the insulating film 110 and the metal oxide film 108 are each etched by dry etching. A portion of the substrate is etched.
[0115] Next, the masks 133 and 135 are processed. Here, the size of the mask 133 is reduced. At the same time, the mask 135 is removed. The masks 133 and 135 are exposed to the plasma generated by the plasma treatment. 35. The atmosphere containing oxygen includes oxygen, ozone, nitrous oxide, and nitrogen dioxide. The atmosphere contains an oxidizing gas such as nitrogen. In addition, a bias is applied to the substrate 101 side. The masks 133 and 135 may be exposed to the plasma generated by the plasma treatment. An example of such an apparatus is an ashing apparatus.
[0116] Here, the masks 133 and 135 are exposed to plasma generated in an atmosphere containing oxygen. In this way, the masks 133 and 135 are processed.
[0117] As a result, as shown in FIG. 3(D), the mask 133 is recessed to form a mask 137. Furthermore, the mask 135 is removed, and the insulating film 111b is exposed. In FIG. 3(D), the dashed lines correspond to masks 133 and 135 shown in FIG. 3(C), respectively.
[0118] Next, a part of the insulating film 111a is etched using the mask 137, resulting in the structure shown in FIG. As shown in the figure, the insulating film 111c is formed and the insulating film 111b is removed. The insulating films 111a and 111b are etched by a etching method or / and a wet etching method. In this embodiment, the insulating film 111a is etched, and the metal oxide The films 109a and 109b are not etched, or the metal oxide film 10 is etched more deeply than the insulating film 111a. It is preferable to use conditions under which the etching rate of 9a and 109b is small.
[0119] Here, a part of the insulating film 111a is etched by dry etching. Then, the insulating film 111b is removed.
[0120] As a result, the insulating film 111c that functions as a channel protection film can be formed. In addition, since no mask is formed on the insulating film 111b, the insulating film 111b is removed and the metal The surface of the oxide film 109b is exposed. Therefore, the insulating film 106 is also etched in this process, Between the insulating film 105 and the metal oxide film 109a, the edge of the metal oxide film 109a is approximately aligned with that of the metal oxide film 109a. An insulating film 107a is formed. A gold film is formed between the insulating film 105 and the metal oxide film 109b. An insulating film 107b is formed whose edge is substantially flush with that of the metal oxide film 109b.
[0121] Through the above steps, a metal oxide film including a transistor channel region can be formed using a single photomask. The insulating film 111c that functions as a channel protection film is formed. It is possible.
[0122] In the etching process for forming the insulating film 111c, the metal oxide film 109 In a and 109b, the areas exposed to the plasma are damaged and oxygen vacancies are formed. Therefore, the area of the metal oxide film 109a that is not covered with the insulating film 111c, The conductivity of the metal oxide film 109b is increased.
[0123] Next, a heat treatment is performed. The temperature of the heat treatment is typically 150° C. or higher but not higher than the substrate distortion point. , preferably 300°C or higher and 500°C or lower, preferably 320°C or higher and 470°C or lower .
[0124] The heat treatment can be performed using an electric furnace, an RTA device, or the like. Therefore, heat treatment can be performed at a temperature above the distortion point of the substrate for a short period of time. The processing time can be reduced.
[0125] Heat treatment is carried out in a vacuum of nitrogen, oxygen, or ultra-dry air (water content of 20 ppm or less, preferably 1 ppm). pm or less, preferably 10 ppb or less air), or rare gases (argon, helium, etc.) The above-mentioned nitrogen, oxygen, ultra-dry air, or rare gas may be mixed with hydrogen, water, or the like. It is preferable that the above is not included.
[0126] By this heat treatment, part of the oxygen contained in the insulating film 111c is converted into the metal oxide film 109a. By moving the oxygen, oxygen vacancies in the metal oxide film 109a can be reduced.
[0127] When the insulating film 110 is formed on the metal oxide film 108 while heating, the metal oxide The oxygen is transferred to the metal oxide film 108, and oxygen vacancies in the metal oxide film 108 are compensated for. Therefore, the heat treatment may not be performed.
[0128] Here, the specimen is heated at 450°C for 1 hour in a nitrogen atmosphere, and then cooled in a nitrogen and oxygen atmosphere. The mixture is then heated in a 450℃ oven for 1 hour.
[0129] Next, as shown in FIG. 4(A), the insulating film 105, the insulating film 107, the metal oxide film 109a An insulating film 112 is formed on the insulating films 109b and 111c. A mask 139 is formed on the insulating film 112 by a photolithography process using a mask. .
[0130] A nitride insulating film is provided as the insulating film 112. The nitride insulating film may be made of silicon nitride, Silicon oxynitride, aluminum nitride, aluminum oxide nitride, etc. In this manner, a nitride insulating film containing hydrogen may be formed.
[0131] The thickness of the insulating film 112 is preferably 10 nm to 400 nm, more preferably 50 nm to 300 nm. 00nm or less.
[0132] The insulating film 112 can be formed by a sputtering method, a CVD method, or the like. In the method, an insulating film is formed by using a sputtering method, a CVD method, or the like, and then hydrogen is added to the insulating film. The method for adding hydrogen to the insulating film may include ion doping, ion Alternatively, the insulating film is exposed to plasma generated in a gas atmosphere containing hydrogen. In this way, hydrogen can be added to the insulating film.
[0133] Here, the insulating film 112 is formed by a plasma process using silane, ammonia, and nitrogen as raw material gases. A silicon nitride film having a thickness of 100 nm is formed by the Zuma CVD method.
[0134] Plasma damage occurs when forming the insulating film 112 on the insulating film 111c, causing metal Oxygen vacancies are formed in the oxide films 109a and 109b. 9a, the area not covered with the insulating film 111c and the conductive layer of the metal oxide film 109b In addition, by using a nitride insulating film containing hydrogen as the insulating film 112, the insulating Hydrogen moves from the film 112 to the metal oxide films 109a and 109b. Hydrogen moves to the oxygen vacancies. As a result, the metal oxide film 109b becomes conductive. The metal oxide film 109c has high electrical conductivity. The electrode 9 c functions as one of the electrodes of the capacitor 25 .
[0135] The metal oxide film 109a is in contact with the insulating film 113 on the outer side of the insulating film 111c. Since the insulating film 111c is an oxide insulating film, the metal oxide film 10 in contact with the insulating film 111c The metal oxide film 109a functions as a channel region of a transistor. The region in contact with the insulating film 113 has high conductivity, similar to the metal oxide film 109c. That is, the metal oxide film 109c functions as a low resistance region. It is possible to increase the on-current of the MOSFET and also to enhance the field effect mobility. It is possible.
[0136] Since the nitride insulating film also functions as a blocking film for water, hydrogen, and the like, the insulating film 1 12, a nitride insulating film is provided to prevent hydrogen and water from entering the metal oxide film 109a from the outside. It is possible to prevent intrusions such as
[0137] Both the metal oxide film 109a and the metal oxide film 109c are formed on the gate insulating film. Specifically, compared to the metal oxide film 109a, the impurity concentration is different. The impurity concentration of the film 109c is high. For example, the hydrogen concentration in the metal oxide film 109a is 5×10 19 atoms / cm 3 Less than 5 x 10 18 atoms / cm 3 less than , preferably 1 x 10 18 atoms / cm 3 Less than or equal to 5×10 17 ato ms / cm 3 Less than 1×10, more preferably 16 atoms / cm 3 Metal The hydrogen concentration in the oxide film 109c is 8×10 19 More than 1×10 20 a toms / cm 3 More preferably, 5×10 20 The above is the case. The hydrogen concentration in the metal oxide film 109c is twice as high as that in the metal oxide film 109a, and preferably 10 times higher. That's all.
[0138] The metal oxide film 109c has a lower resistivity than the metal oxide film 109a. The resistivity of the film 109c is 1×10 -8 1×10 times more - 1 It is preferable that the ratio is less than 1×10 -3 Ωcm or more 1×10 4 Ωcm not yet More preferably, the resistivity is less than 1×10 -3 Ωcm or more 1×10 -1 Less than Ωcm It is good.
[0139] Next, a heat treatment may be performed. The temperature of the heat treatment is typically 150° C. or higher and 40° C. or lower. 0°C or lower, preferably 300°C or higher and 400°C or lower, preferably 320°C or higher and 370°C or lower Let us assume that.
[0140] In the transistor 22, the insulating film 105 formed of a nitride insulating film and the nitride insulating film The insulating film 112 formed of the metal oxide film 1 is in contact with the insulating film 105. The nitride insulating film has a low diffusion coefficient for hydrogen, water, and oxygen. The insulating film 111c has a small number of ions and has a high blocking property against hydrogen, water, and oxygen. In the present invention, the insulating film is formed using an oxide insulating film containing more oxygen than the oxygen that satisfies the stoichiometric composition. As a result, the diffusion of oxygen contained in the metal oxide film 109a to the outside during the heat treatment is suppressed. In addition, the diffusion of oxygen contained in the metal oxide film 109a to the outside can be suppressed. As a result, oxygen deficiency in the metal oxide film 109a can be reduced. Furthermore, it is possible to suppress the diffusion of hydrogen, water, etc. from the outside into the metal oxide film 109a. As a result, hydrogen, water, and the like in the metal oxide film 109a can be reduced. Therefore, a highly reliable transistor can be manufactured.
[0141] Here, heat treatment is performed in a nitrogen and oxygen atmosphere at 350° C. for 1 hour.
[0142] Next, a part of the insulating film 112 is etched using the mask 139, and the mask is removed. That is, as shown in FIG. 4B, an insulating film 11 having openings 115a, 115b, and 115c is In the openings 115a and 115b, a part of the metal oxide film 109a is exposed. In the opening 115c, a part of the metal oxide film 109c is exposed. The insulating film 112 is etched using a dry etching method or / and a wet etching method. The mask 139 can then be removed.
[0143] Here, a part of the insulating film 112 is etched by dry etching.
[0144] Next, as shown in FIG. 4(C), the exposed portion of the metal oxide film 109a and the metal oxide film 109 A conductive film 116 is formed on the exposed portion of the insulating film 113 and on the exposed portion of the insulating film 113. Next, a fourth photomask By a photolithography process using Form 141c.
[0145] The conductive film 116 is formed by forming conductive films 117a and 117b, which will later function as a pair of electrodes, and a capacitance line. Therefore, the conductive film 116 can be used as an electrode. The conductive film 116 is made of a material selected from aluminum, titanium, chromium, nickel, and the like. Kel, copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten A single metal consisting of arsenic or an alloy consisting mainly of this metal is used in a single-layer structure or a multilayer structure. For example, a single-layer structure of an aluminum film containing silicon, an aluminum film on a titanium film, A two-layer structure in which an aluminum film is laminated on a tungsten film, a two-layer structure in which an aluminum film is laminated on a tungsten film, a copper-magnesium film, A two-layer structure in which a copper film is laminated on a titanium film. a two-layer structure in which a copper film is laminated on a tungsten film; a two-layer structure in which a titanium film or a titanium nitride film is laminated on a tungsten film; Then, an aluminum film or a copper film is laminated on the titanium film or the titanium nitride film, and A three-layer structure in which a titanium film or titanium nitride film is formed on the first layer, a molybdenum film or a nitride film is formed on the second layer, and A molybdenum film and an aluminum film or a molybdenum nitride film are laminated on the molybdenum film or the molybdenum nitride film. A three-layer structure is formed by laminating a copper film on a silicon substrate and then forming a molybdenum film or a molybdenum nitride film on the copper film. The structure includes transparent conductive materials including indium oxide, tin oxide, or zinc oxide. It may be formed by
[0146] The conductive film 116 is formed by a sputtering method, a CVD method, an evaporation method, or the like.
[0147] Here, the conductive film 116 is a tungsten film having a thickness of 50 nm formed by a sputtering method. A film and a copper film having a thickness of 300 nm are formed.
[0148] Next, a part of the conductive film 116 is etched using the masks 141a, 141b, and 141c. The conductive films 117a and 117b function as a pair of electrodes, and the conductive film 117b functions as a capacitance line. A film 117c is formed by dry etching or / and wet etching. Then, the conductive film 116 can be etched. 141c is removed (see FIG. 4(D)).
[0149] In addition, a nitride film is formed around the area where the metal oxide film 109a and the conductive films 117a and 117b contact each other. The insulating film 113 is made of a nitride insulating film. The diffusion coefficient of copper in the nitride insulating film is Since the size is small, copper diffusion can be prevented. When the entire surface of the insulating film 113 is made of a copper film, the insulating film 113 functions as a barrier film for copper. This reduces copper diffusion into the channel region, reducing the variation in the electrical characteristics of the transistor. It is possible.
[0150] In addition, in the conductive films 117a and 117b, a region in contact with the metal oxide film 109a is provided with a tantalum oxide film. elemental or non-elementary metals such as tin, titanium, aluminum, copper, molybdenum, chromium, or tantalum. By using a conductive material that easily bonds with oxygen, such as an alloy, the oxygen in the metal oxide film 109a can be The metal oxide film 109a is drawn into a conductive material that easily bonds with oxygen. Stainless steel, titanium, aluminum, copper, molybdenum, chromium, or tantalum alone or In some cases, some of the constituent elements of the alloy may be mixed in. As a result, the metal oxide film 109a In this case, a low resistance region is formed in the vicinity of the region in contact with the conductive films 117a and 117b. Since the resistive region has high conductivity, the contact between the metal oxide film 109a and the conductive films 117a and 117b is It is possible to reduce the contact resistance and increase the on-current of the transistor. be.
[0151] Next, as shown in FIG. 5A, the insulating film 113 and the conductive films 117a, 117b, and 117c are A light-transmitting conductive film 118 is formed on the insulating film 114. Next, a photoresist pattern is formed on the insulating film 114 using a fifth photomask. A mask 143 is formed over the conductive film 118 by a lithography process.
[0152] The conductive film 118 will later become a conductive film 119 that functions as a pixel electrode. The conductive film 118 is made of a conductive material that can be used as a pixel electrode. , indium tin oxide film, indium oxide film containing tungsten oxide, tungsten oxide Indium zinc oxide film containing titanium oxide, indium oxide film containing titanium oxide Indium tin oxide film, indium zinc oxide film, indium oxide film containing silicon oxide A conductive film formed of a conductive material having light transmitting properties, such as a tin oxide film, can be used. .
[0153] The conductive film 118 is formed by a sputtering method, a vapor deposition method, a coating method, or the like.
[0154] Here, a 100 nm thick ITO film is formed as the conductive film 118 by sputtering. Form.
[0155] Next, a part of the conductive film 118 is etched using a mask 143 to form a film functioning as a pixel electrode. The conductive film 119 is a conductive film 11 that functions as a pair of electrodes. 7b and overlaps with the metal oxide film 109c via the insulating film 113. The conductive film 118 is removed by dry etching or / and wet etching. After that, the mask 143 is removed (see FIG. 5(B)). .).
[0156] Here, part of the conductive film 118 is etched by wet etching.
[0157] Through the above steps, the conductive film 103 functioning as a gate electrode and the gate insulating film The insulating films 105 and 106a, the metal oxide film 109a, and a part of the metal oxide film 109a are The insulating film 111c is in contact with the metal oxide film 109a and functions as a pair of electrodes. A transistor 22 having the gate electrodes 7a and 117b can be fabricated. 22 includes a conductive film 119 that is in contact with the conductive film 117b and functions as a pixel electrode. In addition, the metal oxide film 109c formed on the insulating film 106b and the insulating film 11 3 and a conductive film 119. The element substrate having the capacitor 22, the conductive film 119 functioning as a pixel electrode, and the capacitor element 25 is In this embodiment, the metal oxide film and the carbon nanotube film are The protective film for the panel is formed using a single photomask, which is necessary for fabricating the element substrate. This allows the reduction of the number of photomasks required.
[0158] In addition, the semiconductor device described in this embodiment has a metal oxide semiconductor layer including a channel region of a transistor. At the same time as forming the metal oxide film, a metal oxide film that will become one electrode of the capacitance element is formed. A metal oxide film including a channel region of a transistor and a metal oxide film that will be one of the electrodes of a capacitor element. The conductive film that functions as a pixel electrode is made of the same metal element as the capacitor element. For this reason, a new conductive film is formed to form a capacitor element. Since the step of forming a capacitor is not required, the manufacturing steps of the display device can be reduced. Since both the metal oxide film 109c and the conductive film 119, which are electrodes, have light-transmitting properties, As a result, the area occupied by the capacitance element is increased while the aperture ratio of the pixel is increased. Furthermore, a display device with reduced power consumption can be manufactured.
[0159] <About metal oxide films> When hydrogen is added to an oxide semiconductor with oxygen vacancies, hydrogen enters the oxygen vacancy sites. A donor level is formed near the conduction band. As a result, the oxide semiconductor has high electrical conductivity. The oxide semiconductor that has been made conductive can be called an oxide conductor. Since an oxide semiconductor has a large energy gap, it transmits visible light. On the other hand, an oxide conductor is an oxide semiconductor having a donor level near the conduction band. The effect of absorption due to the donor level is small, and the transparency to visible light is the same as that of an oxide semiconductor. It has photochemical properties.
[0160] Here, a film formed of an oxide semiconductor such as that used for the metal oxide film 109a (hereinafter The oxide semiconductor film 109c is referred to as an oxide semiconductor film (OS). Resistance in a film formed of an oxide conductor (hereinafter referred to as an oxide conductor film (OC)) The temperature dependency of the rate will be explained with reference to FIG. 13. In FIG. 13, the horizontal axis indicates the measurement temperature. The vertical axis shows the resistivity, and the vertical axis shows the measurement results of the oxide semiconductor film (OS) with a circle. The measurement results for the oxide conductor film (OC) are indicated by square marks.
[0161] The sample including the oxide semiconductor film (OS) was formed on a glass substrate with an atomic ratio of In:Ga A sputtering method was used to deposit a thick ZnO film using a sputtering target with a ratio of 1:1:1.2. An In-Ga-Zn oxide film having a thickness of 35 nm was formed, and the atomic ratio of the film was In:Ga:Zn=1:4. A 20 nm thick In- A Ga-Zn oxide film was formed, and then heat-treated in a nitrogen atmosphere at 450°C. The silicon oxynitride film is then formed by plasma CVD. It was produced by forming
[0162] The sample containing the oxide conductor (OC) was prepared by depositing an In:Ga atomic ratio on a glass substrate. A sputtering method was used with a sputtering target of Zn=1:1:1 to deposit a 10 ... After forming a 00 nm In-Ga-Zn oxide film and heat-treating it in a nitrogen atmosphere at 450 °C, The silicon nitride was then deposited by plasma CVD. It was prepared by forming a con film.
[0163] As can be seen from FIG. 13, the temperature dependence of resistivity in the oxide conductor film (OC) is The temperature dependence of resistivity is smaller than that of oxide semiconductor films (OS). Typically, it is 80K or higher. The change in resistivity of the oxide semiconductor film (OC) at 290K or less is less than ±20%. Alternatively, the rate of change in resistivity from 150K to 250K is less than ±10%. That is, an oxide conductor is a degenerate semiconductor, and the conduction band edge and the Fermi level are coincident or approximately coincident. For this reason, the oxide conductor film is used as the electric field of resistor elements, wiring, and capacitor elements. The electrode can be used for a pixel electrode, a common electrode, etc.
[0164] <Oxide Semiconductor Film and Metal Oxide Film> Next, an embodiment applicable to a metal oxide film and an oxide semiconductor film having semiconductor characteristics will be described. Here, an oxide semiconductor film will be described as a typical example. The structure of the semiconductor film can be applied to a metal oxide film.
[0165] The oxide semiconductor film is preferably a CAAC-OS film. The S film has a c-axis orientation and clear crystal grain boundaries (also called grain boundaries) have been confirmed. As a result, in a channel-etched transistor, The amount of overetching of the oxide semiconductor film when forming the oxide semiconductor film is small. A channel-etched transistor is fabricated by forming the body film with a CAAC-OS film. In addition, in a channel-etched transistor, the distance between a pair of electrodes, i.e., the channel The channel length is set to 0.5 μm or more and 6.5 μm or less, preferably 1 μm or more and 6.5 μm or less. It is possible to make it smaller than 1 μm.
[0166] In addition, the oxide semiconductor film is formed by using an oxide semiconductor having a single crystal structure (hereinafter, referred to as a single crystal oxide semiconductor). ), a polycrystalline oxide semiconductor (hereinafter referred to as a polycrystalline oxide semiconductor), and a microcrystalline oxide semiconductor. The oxide semiconductor layer may be made of one or more of the following oxide semiconductors: The following describes the CAAC-OS, single-crystalline oxide semiconductor, polycrystalline oxide semiconductor, and microcrystalline oxide semiconductor. The conductor will now be described.
[0167] <caac-os> The CAAC-OS film is one of the oxide semiconductor films having multiple crystal parts. The crystals in the AC-OS film have a c-axis orientation. The area of the crystals in the C-OS film is 2500 nm 2 More preferably, 5 μm or more 2 Below More preferably, 1000 μm or more 2 In addition, in the cross-sectional TEM image, By having a ratio of 50% or more, preferably 80% or more, and more preferably 95% or more, The resulting thin film has properties close to those of a crystal.
[0168] The CAAC-OS film was observed under a transmission electron microscope (TEM). When observed using a quartz crystal microscope, clear boundaries between the crystals were observed. It is not possible to confirm the grain boundary. It can be said that the AAC-OS film is less susceptible to the decrease in electron mobility caused by grain boundaries.
[0169] The CAAC-OS film was observed by TEM from a direction roughly parallel to the sample surface (cross-sectional TEM observation). When the metal atoms are observed, it can be confirmed that they are arranged in layers in the crystal part. Each layer of the CAAC-OS film is formed on a surface on which the film is to be formed (also called a surface on which the film is to be formed) or on a concave surface on the top surface. The shape reflects the convexity and is aligned parallel to the surface on which the CAAC-OS film is formed or the top surface. In this specification, "parallel" means that two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, it includes the case where the angle is between -5° and 5°. " refers to a state in which two straight lines are arranged at an angle of 80° or more and 100° or less. This also includes cases where the angle is between 85° and 95°.
[0170] On the other hand, the CAAC-OS film was observed by TEM from a direction roughly perpendicular to the sample surface (plane T EM observation reveals that metal atoms are arranged in triangular or hexagonal shapes in the crystals. However, no regularity was observed in the arrangement of metal atoms between different crystal regions. do not have.
[0171] When electron beam diffraction was performed on the CAAC-OS film, spots (bright spots) indicating orientation were observed. is observed.
[0172] Cross-sectional and planar TEM observations revealed that the crystals in the CAAC-OS film had an orientation. It can be seen that...
[0173] X-ray diffraction (XRD) of CAAC-OS film The structure of the CAAC-OS film was analyzed using the out-of-plane method. In the analysis, a peak may appear at a diffraction angle (2θ) of around 31°. This peak is I Since it is assigned to the (00x) plane (x is an integer) of the nGaZn oxide crystal, The crystals of the OS film have a c-axis orientation, and the c-axis is oriented in a direction approximately perpendicular to the surface on which the film is formed or the upper surface. It can be confirmed that there is.
[0174] On the other hand, in-p X-rays are incident on the CAAC-OS film from a direction approximately perpendicular to the c-axis. In the lane method, a peak may appear at 2θ around 56°. This is attributed to the (110) plane of the InGaZn oxide crystal. In the case of a crystalline oxide semiconductor film, 2θ is fixed at about 56°, and the normal vector of the sample surface is aligned along the axis (φ When the sample is rotated around the (φ) axis while analyzing (φ scan), the results show that the bonds are equivalent to the (110) plane. In contrast, in the case of the CAAC-OS film, 2 Even when θ is fixed at around 56° and φ is scanned, no clear peak appears.
[0175] From the above, it is considered that the orientation of the a-axis and b-axis is uniform between different crystal regions in the CAAC-OS film. Although it is irregular, it has a c-axis orientation, and the c-axis is parallel to the normal vector of the surface on which it is formed or the upper surface. Therefore, the layered structure confirmed by the cross-sectional TEM observation mentioned above is consistent with the Each layer of arranged metal atoms is in a plane parallel to the ab plane of the crystal.
[0176] The crystals are formed when the CAAC-OS film is formed or after a crystallization process such as a heat treatment. As described above, the c-axis of the crystal is aligned along the surface on which the CAAC-OS film is formed or along the surface on which the CAAC-OS film is formed. The orientation of the CAAC-OS film is parallel to the normal vector of the top surface. When the shape of the CAAC-OS film is changed by etching, the c-axis of the crystal is aligned with the surface on which the CAAC-OS film is formed. Or it may not be parallel to the normal vector of the upper surface.
[0177] In addition, the crystallinity in the CAAC-OS film does not have to be uniform. When the crystalline part of the film is formed by crystal growth from the vicinity of the top surface of the CAAC-OS film, The area near the surface may have a higher crystallinity than the area near the surface on which it is formed. When impurities are added to the AC-OS film, the crystallinity of the region to which the impurities are added changes, resulting in a partial In some cases, regions of differing crystallinity may be formed.
[0178] In addition, in the out-of-plane analysis of the CAAC-OS film, 2θ was 31°. In addition to the peaks around 2θ of 36°, a peak may also appear around 2θ of 36°. The peaks near the c-axis are due to the presence of crystals that do not have the c-axis orientation in the CAAC-OS film. The CAAC-OS film shows a peak at 2θ of around 31° and a peak at 2θ of around 36°. It is preferable that there is no peak nearby.
[0179] The CAAC-OS film is an oxide semiconductor film with a low concentration of impurities. The oxide semiconductor film is preferably made of silicon or a transition metal element other than the main component of the oxide semiconductor film. The elements that bond to oxygen stronger than the metal elements that form the oxide semiconductor film, such as Zn, By removing oxygen from the oxide semiconductor film, the atomic arrangement of the oxide semiconductor film is disturbed, and the crystallinity is reduced. In addition, heavy metals such as iron and nickel, argon, and carbon dioxide are Since the diameter (or molecular radius) of the ions is large, when the ions are contained inside the oxide semiconductor film, the oxide semiconductor film The impurities contained in the oxide semiconductor film are likely to disturb the atomic arrangement of the oxide semiconductor film, which leads to deterioration of the crystallinity. Pure materials may act as carrier traps or carrier generation sources.
[0180] The CAAC-OS film is an oxide semiconductor film with a low density of defect states. Oxygen vacancies in semiconductor films act as carrier traps and trap hydrogen. This can become a carrier generation source.
[0181] The low impurity concentration and low defect level density (low oxygen vacancies) are called high purity intrinsic or The term "high-purity intrinsic" refers to a substantially high-purity intrinsic oxide semiconductor. Since the film has a small carrier generation source, the carrier density can be reduced. The transistor using the oxide semiconductor film has electrical characteristics (noise) in which the threshold voltage is negative. It is also called "marine". It is rare for it to become "high purity genuine" or "substantially high purity". The intrinsic oxide semiconductor film has few carrier traps. Transistors using the film have little fluctuation in electrical characteristics and are highly reliable. Note that it takes a certain time for charges trapped in the carrier traps in the oxide semiconductor film to be released. The time is long and the charge may behave as if it were a fixed charge. In addition, a transistor using an oxide semiconductor film having a high density of defect states has unstable electrical characteristics. There may be cases where this occurs.
[0182] In addition, the electrical characteristics of transistors using CAAC-OS films are improved by irradiation with visible light or ultraviolet light. Gender variation is small.
[0183] <Single crystal oxide semiconductor> A single-crystal oxide semiconductor film has a low impurity concentration and a low density of defect states (few oxygen vacancies). ) an oxide semiconductor film. Therefore, the carrier density can be reduced. A transistor using a crystalline oxide semiconductor film rarely has normally-on electrical characteristics. In addition, since the single crystal oxide semiconductor film has a low impurity concentration and a low density of defect states, Therefore, in the case of a transistor using a single crystal oxide semiconductor film, the number of carrier traps may be reduced. The transistor has small fluctuations in electrical characteristics and is highly reliable.
[0184] Note that the oxide semiconductor film has a high density when the number of defects is small. High crystallinity increases density. In addition, the oxide semiconductor film has a low concentration of impurities such as hydrogen. The density of the single crystal oxide semiconductor film is higher than that of the CAAC-OS film. The CAAC-OS film has a higher density than the microcrystalline oxide semiconductor film. The conductor film has a higher density than the microcrystalline oxide semiconductor film. The density is higher than that of an crystalline oxide semiconductor film.
[0185] <Polycrystalline oxide semiconductor> In the polycrystalline oxide semiconductor film, crystal grains can be confirmed by observing with a high-resolution TEM. The crystal grains contained in the polycrystalline oxide semiconductor film can be observed, for example, by high-resolution TEM. In the observation image, 2nm to 300nm, 3nm to 100nm, or 5nm to 50nm In addition, the grain size of the polycrystalline oxide semiconductor film is often less than 10 μm. In some cases, grain boundaries can be identified in the observed image.
[0186] The polycrystalline oxide semiconductor film has a plurality of crystal grains, and the crystal orientation between the plurality of crystal grains is In addition, the positions of the crystals in the polycrystalline oxide semiconductor film may differ from each other. When structural analysis was performed, for example, the ou of a polycrystalline oxide semiconductor film having InGaZnO4 crystals was In the t-of-plane analysis, there was a peak at 2θ near 31° and a peak at 2θ near 36°. or other peaks may appear.
[0187] A polycrystalline oxide semiconductor film has high crystallinity and therefore may have high electron mobility. Therefore, a transistor using a polycrystalline oxide semiconductor film has high field-effect mobility. However, in the polycrystalline oxide semiconductor film, impurities may be segregated at crystal grain boundaries. The grain boundaries of the polycrystalline oxide semiconductor film become defect states. Since the oxide semiconductor film may become a carrier trap or a carrier generation source, The transistors using the CAAC-OS film showed a small change in electrical characteristics compared to the transistors using the CAAC-OS film. may result in a transistor with low reliability.
[0188] <Microcrystalline oxide semiconductor> In the TEM image of the microcrystalline oxide semiconductor film, crystal parts can be clearly seen. The crystal parts contained in the microcrystalline oxide semiconductor film may have a size of 1 nm or more and 100 nm or more. In particular, the size of the particles is between 1 nm and 10 nm. Nanocrystals (nc) are microcrystals with a diameter of 1 to 3 nm or less. The oxide semiconductor film having nc-OS (nanocrystalline O The nc-OS film is called a T In EM images, grain boundaries may not be clearly visible.
[0189] The nc-OS film is a microscopic region (e.g., a region of 1 nm to 10 nm, especially a region of 1 nm or less). The nc-OS film has a periodic atomic arrangement in the region of 3 nm or less. There is no regularity in the crystal orientation between the crystal parts, and therefore no orientation is observed throughout the film. Therefore, the nc-OS film cannot be distinguished from an amorphous oxide semiconductor film depending on the analysis method. For example, XRD, which uses X-rays with a diameter larger than that of the crystal part, is used for nc-OS films. When structural analysis is performed using the out-of-plane method, the crystal planes are In addition, the peaks indicating the diameters larger than those of the crystals in the nc-OS film (e.g. When electron beam diffraction (also called selected area electron beam diffraction) is performed using an electron beam with a diameter of 50 nm or more, On the other hand, for the nc-OS film, the diffraction pattern is crystalline. The probe diameter is close to the size of the crystal part or smaller than the crystal part (for example, 1 nm to 30 nm). When electron beam diffraction using a sagittal beam (also called nanobeam electron diffraction), spots are observed. In addition, when nanobeam electron diffraction was performed on the nc-OS film, the In addition, nanobeads were observed in the nc-OS film. When electron diffraction is performed, multiple spots may be observed within a ring-shaped region.
[0190] The nc-OS film is an oxide semiconductor film that has higher order than an amorphous oxide semiconductor film. Therefore, the nc-OS film has a lower density of defect states than the amorphous oxide semiconductor film. In the nc-OS film, the crystal orientation is not regular between different crystal parts. The OS film has a higher density of defect states than the CAAC-OS film.
[0191] <Modification 1, Regarding the Undercoat Insulating Film> In the transistor described in this embodiment, the substrate 101 and the gate electrode may be formed as necessary. A base insulating film can be provided between the conductive film 103 which functions as a base insulating film. The following are examples of the silicon oxide, silicon oxynitride, silicon nitride, silicon nitride oxide, and gallium oxide: hafnium oxide, yttrium oxide, aluminum oxide, aluminum oxide nitride, etc. The base insulating film can be formed using silicon nitride, gallium oxide, By forming the film using hafnium oxide, yttrium oxide, aluminum oxide, etc., the substrate Impurities, typically alkali metals, water, hydrogen, etc., diffuse from 101 into the metal oxide film 109a. This can suppress dispersion.
[0192] The base insulating film can be formed by a sputtering method, a CVD method, or the like.
[0193] <Modification 2: Gate insulating film> The insulating film 105 formed of a nitride insulating film is replaced with a first nitride insulating film having fewer defects and a water The gate insulating film is a laminated structure of a second nitride insulating film having a high blocking property. By providing a nitride insulating film with few defects as the film, the dielectric strength of the gate insulating film is improved. In addition, a nitride insulating film having high hydrogen blocking properties can be used as the gate insulating film. By providing the insulating film 105, hydrogen from the conductive film 103 functioning as a gate electrode and the insulating film 105 can be Therefore, it is possible to prevent the metal oxide film 109a from migrating thereto.
[0194] Alternatively, the insulating film 105 formed of a nitride insulating film may have a high blocking property against impurities. The first nitride insulating film has a low defect rate, the second nitride insulating film has a high hydrogen blocking property, and A first nitride insulating film and a second nitride insulating film are laminated in this order from the conductive film 103 side functioning as a gate electrode. As the gate insulating film, a first insulating film having a high blocking property against impurities can be used. By providing the nitride insulating film 1, impurities from the conductive film 103 functioning as a gate electrode are prevented. Typically, hydrogen, nitrogen, an alkali metal, an alkaline earth metal, or the like is added to the metal oxide film 1. This can prevent the device from moving to 09a.
[0195] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.
[0196] (Embodiment 2) In this embodiment mode, a method for manufacturing an element substrate of a display device, which is different from that in Embodiment Mode 1, will be described with reference to FIG. In this embodiment, as in the first embodiment, a gold semiconductor device having a channel region is used. A metal oxide film and an insulating film that functions as a channel protection film are formed using a single photomask. On the other hand, in this embodiment, a conductive film functioning as an electrode and a dielectric film of a capacitance element are The order of steps for forming a functional insulating film is different from that in the first embodiment.
[0197] A specific example of an element substrate of a liquid crystal display device using liquid crystal elements for the pixels 13 will be described. Here, a top view of the pixel 13 shown in FIG. 1(B) is shown in FIG.
[0198] In FIG. 6, the conductive film 203 functioning as the scanning line is arranged in a direction substantially perpendicular to the signal line ( The conductive film 213a that functions as a signal line is a scanning line. The conductors functioning as capacitance lines are arranged to extend in a direction substantially perpendicular to the The conductive film 213c is provided so as to extend in a direction parallel to the signal line. The conductive film 203 is electrically connected to the scanning line driver circuit 14 (see FIG. 1(A)). The conductive film 213a functioning as a signal line and the conductive film 213c functioning as a capacitance line are , and is electrically connected to a signal line driver circuit 16 (see FIG. 1(A)).
[0199] The transistor 22a is provided in the area where the scanning line and the signal line intersect. The gate electrode 22a includes a conductive film 203 that functions as a gate electrode, a gate insulating film (not shown in FIG. 6), ), a metal oxide film 209a in which a channel region is formed on the gate insulating film, The gate insulating film 213 is made up of conductive films 213a and 213b which function as a source electrode and a drain electrode. The conductive film 203 also functions as a scan line, and the region overlapping with the metal oxide film 209a is The conductive film 213a functions as a gate electrode of the transistor 22a. The region overlapping with the metal oxide film 209a is connected to the source electrode of the transistor 22a. In FIG. 6, the scanning line is a terminal electrode in the top view. The portion is located outside the end of the metal oxide film 209a. As a result, the gold contained in the transistor Since the metal oxide film 209a is not irradiated with light, the fluctuation of the electrical characteristics of the transistor can be suppressed. can.
[0200] In addition, the conductive film 213b has a light-transmitting property and functions as a pixel electrode in the opening 219. The conductive film 221 is electrically connected to the conductive film 221 .
[0201] The capacitance element 25a is formed by a metal oxide film 209b formed on the gate insulating film, a pixel electrode, and A light-transmitting conductive film 221 that functions as a light-transmitting insulating film and a nitride film provided over the transistor 22a The metal oxide film 109b is made of a dielectric film formed of an insulating film. Therefore, the capacitor 25a has a light-transmitting property. The metal oxide film 209b functioning as a capacitance line is connected to the conductive film 213c functioning as a capacitance line. is.
[0202] Since the capacitance element 25a has light-transmitting properties, the capacitance element 25a can be provided in the pixel 13 in a large size. Therefore, the aperture ratio can be increased to 50% or more, preferably. It is possible to increase the charge capacity to about 55% or more, preferably 60% or more. For example, a semiconductor device having a high resolution, such as a liquid crystal display, can be obtained. In a display device, the area of a pixel is reduced, and the area of a capacitance element is also reduced. In a semiconductor device with high resolution, the charge capacity stored in the capacitive element becomes small. However, since the capacitor 25a shown in this embodiment has a light-transmitting property, the capacitor By providing the pixel electrodes at 100 nm to 150 nm, it is possible to obtain a sufficient charge capacity in each pixel while increasing the aperture ratio. Typically, pixel densities are 200ppi or more, 300ppi or more, or even 50ppi or more. The present invention can be suitably used for semiconductor devices with a high resolution of 0 ppi.
[0203] In addition, the pixel 13 shown in FIG. 6 has a side parallel to the conductive film 203 that functions as a scanning line. The side parallel to the conductive film 213a functioning as a signal line is shorter than the side parallel to the conductive film 213a. The conductive film 213c functioning as a signal line is parallel to the conductive film 213a functioning as a signal line. As a result, the area of the conductive film 213c in the pixel 13 is reduced. Since this is possible, the aperture ratio can be increased.
[0204] In addition, according to one embodiment of the present invention, the aperture ratio can be increased even in a high-resolution display device. This allows the light from light sources such as backlights to be used efficiently, and reduces the power consumption of the display device. The force can be reduced.
[0205] Next, using the cross-sectional views of the dashed and dotted lines AB and CD shown in FIG. A method for manufacturing the element substrate of the device will be described.
[0206] Through the same process as in the first embodiment, a first photomask and a second photomask are used. By the above process, a conductive layer functioning as a gate electrode is formed on the substrate 210 as shown in FIG. Further, insulating films 205 and 207a are formed on the substrate 291 and the conductive film 203. , 207b are formed on the insulating films 207a, 207b. 9a and 209b are formed on the metal oxide film 209a. After that, a heat treatment is performed.
[0207] The substrate 201 can be appropriately selected from the substrate 101 shown in the first embodiment. The conductive film 203 is made of the same material as the conductive film 103 functioning as the gate electrode in Embodiment 1. The insulating film 205 may be formed by any of the insulating films shown in Embodiment 1. The insulating films 207a and 207b can be made of the same material and by the same manufacturing method as those of the insulating film 105. The insulating films 107a and 107b are formed by appropriately selecting a material and a manufacturing method similar to those of the insulating films 107a and 107b shown in Embodiment 1. The metal oxide films 209a and 209b may be selected from the metal oxide films shown in the first embodiment. The material and the manufacturing method can be appropriately selected similarly to the solid films 109a and 109b. The insulating film 211c, which functions as a protective film, is the same as the insulating film 111c shown in the first embodiment. The material and the manufacturing method can be appropriately selected.
[0208] In the etching process for forming the insulating film 211c, the metal oxide film 209 In a and 209b, the area exposed to the plasma is damaged and oxygen vacancies are formed. Therefore, the area of the metal oxide film 209a that is not covered with the insulating film 211c, The conductivity of the metal oxide film 209b is increased.
[0209] Next, as shown in FIG. 7B, the insulating film 205, the insulating films 207a and 207b, and the metal oxide A conductive film 212 is formed on the conductive films 209a and 209b and the insulating film 211c. A mask 23 is formed on the conductive film 212 by a photolithography process using the photomask 3. 1a, 231b, and 231c.
[0210] The conductive film 212 can be formed by appropriately selecting a material and a manufacturing method similar to those of the conductive film 116 described in Embodiment 1. You can choose.
[0211] Next, a part of the conductive film 212 is etched using the masks 231a, 231b, and 231c. The conductive films 213a and 213b function as a pair of electrodes, and the conductive film 213b functions as a capacitance line. A film 213c is formed by dry etching or / and wet etching. Then, the conductive film 116 can be etched. 231c is removed (see FIG. 7(C)).
[0212] Next, as shown in FIG. 8(A), the insulating film 205, the insulating films 207a and 207b, and the metal oxide On the solid films 209a and 209b, the insulating film 211c, and the conductive films 213a, 213b, and 213c Next, a fourth photomask is used to form the insulating film 214. A mask 233 is formed on the insulating film 214 through this process.
[0213] The insulating film 214 can be formed by appropriately selecting a material and a method similar to those of the insulating film 112 described in Embodiment 1. You can choose.
[0214] The metal Oxygen vacancies are formed in the oxide films 209a and 209b. 9a, the area not covered with the insulating film 211c and the conductive layer of the metal oxide film 209b In addition, by using a nitride insulating film containing hydrogen as the insulating film 214, the insulating Hydrogen diffuses from the film 214 to the metal oxide films 209a and 209b. Hydrogen moves to the oxygen vacancies. As a result, the metal oxide film 209b becomes conductive. The metal oxide film 209c has high electrical conductivity. The electrode 9 c functions as one of the electrodes of the capacitor 25 .
[0215] The metal oxide film 209a is in contact with the insulating film 213 on the outer side of the insulating film 211c. Since the insulating film 211c is an oxide insulating film, the metal oxide film 20 in contact with the insulating film 211c The metal oxide film 209a functions as a channel region of a transistor. The area in contact with the conductive films 213a and 213b is conductive like the metal oxide film 209c. That is, the metal oxide film 209a functions as a low resistance region. Therefore, it is possible to increase the on-state current of the transistor and to improve the field effect mobility. It is possible to increase it.
[0216] Note that the nitride insulating film also functions as a blocking film for water, hydrogen, and the like; therefore, 14, a nitride insulating film is provided to prevent hydrogen and water from entering the metal oxide film 209a from the outside. It is possible to prevent intrusions such as
[0217] Both the metal oxide film 209a and the metal oxide film 209c are formed on the gate insulating film. However, the impurity concentration is different. The impurity concentration of the metal oxide film 209c is high. For example, the hydrogen concentration in the metal oxide film 209a is 5 ×10 19 atoms / cm 3 Less than 5 x 10 18 atoms / cm 3 less than, Preferably 1 x 10 18 atoms / cm 3 Less than or equal to 5×10 17 atom s / cm 3 Less than 1×10, more preferably 16 atoms / cm 3 The metal acid The hydrogen concentration in the oxide film 209c is 8×10 19 More than 1×10 20 at oms / cm 3 More preferably, 5×10 20 The above is the case. In addition, the metal oxide film 20 The hydrogen concentration in the metal oxide film 209c is twice as high as that in the metal oxide film 9a, and preferably 10 times higher. Above.
[0218] The metal oxide film 209c has a lower resistivity than the metal oxide film 209a. The resistivity of the film 209c is 1×10 -8 more than 1x10 - 1 times or less, typically 1×10 -3 Ωcm or more 1×10 4 Ωcm not yet More preferably, the resistivity is less than 1×10 -3 Ωcm or more 1×10 -1 Less than Ωcm It is good.
[0219] Next, a heat treatment may be performed. The temperature of the heat treatment is typically 150° C. or higher and 40° C. or lower. 0°C or lower, preferably 300°C or higher and 400°C or lower, preferably 320°C or higher and 370°C or lower Let us assume that.
[0220] The insulating film 205 formed of a nitride insulating film and the insulating film 214 formed of a nitride insulating film are The insulating films 205 and 214 are in contact with each other, and the metal oxide film 209a and the insulating film 211c are disposed between the insulating films 205 and 214. The nitride insulating film has a small diffusion coefficient of hydrogen, water, and oxygen, and is resistant to hydrogen, water, and oxygen. The insulating film 211c has a high blocking property against oxygen. By forming the insulating film using an oxide insulating film containing more oxygen than silicon, As a result, the oxygen contained in the metal oxide film 209a can be prevented from diffusing to the outside. As a result, oxygen deficiency in the metal oxide film 209a can be reduced. Therefore, the diffusion of hydrogen, water, etc. into the metal oxide film 209a can be suppressed. As a result, the amount of hydrogen and water in the conductive film 209a can be reduced. It is possible to create a data.
[0221] Next, as shown in FIG. 8(A), a photolithography process using a fourth photomask is performed. Next, a mask 233 is formed by etching a part of the insulating film 214 using the mask 233. 8B, an insulating film 217 having an opening 219 is formed. In the opening 219, a part of the conductive film 213b is exposed.
[0222] Next, as shown in FIG. 8C, a light-transmitting Next, a conductive film 220 having a resistivity of 100 nm is formed by photolithography using a fifth photomask. A mask 235 is formed on the conductive film 220 by a film process.
[0223] The conductive film 220 can be formed by appropriately selecting a material and a manufacturing method similar to those of the conductive film 118 described in Embodiment 1. You can choose.
[0224] Next, a part of the conductive film 220 is etched using a mask 235 to form a pixel electrode. After that, the mask 235 is removed (see FIG. 8(D)). .).
[0225] Through the above steps, a conductive film 203 functioning as a gate electrode and a gate insulating film The insulating films 205 and 206a, the metal oxide film 209a, and a part of the metal oxide film 209a are covered with the insulating films 205 and 206a. The insulating film 211c functions as a channel protection film, and is in contact with the metal oxide film 209a. A transistor 22a having conductive films 213a and 213b functioning as electrodes is fabricated. In addition, the conductive film 213b included in the transistor 22a is in contact with the conductive film 213b, and the conductive film 213b is used as a pixel electrode. In addition, a conductive film 221 that functions as a conductive film can be formed on the insulating film 206b. A capacitor element 25a having a metal oxide film 209c, an insulating film 217, and a conductive film 221 is fabricated. That is, the transistor 22a, the conductive film 221 functioning as a pixel electrode, The element substrate having the capacitor element 25a can be manufactured using five photomasks. In this embodiment, the metal oxide film and the channel protective film are formed using one photomask. Therefore, the number of photomasks required for manufacturing the element substrate can be reduced.
[0226] In addition, the semiconductor device described in this embodiment has a metal oxide semiconductor layer including a channel region of a transistor. At the same time as forming the metal oxide film, a metal oxide film that will become one electrode of the capacitance element is formed. A metal oxide film including a channel region of a transistor and a metal oxide film that will be one of the electrodes of a capacitor element. The conductive film that functions as a pixel electrode is made of the same metal element as the capacitor element. For this reason, a new conductive film is formed to form a capacitor element. Since the step of forming a capacitor is not required, the manufacturing steps of the display device can be reduced. Since both the metal oxide film 109c and the conductive film 119, which are electrodes, have light-transmitting properties, As a result, the area occupied by the capacitance element is increased while the aperture ratio of the pixel is increased. Furthermore, a display device with reduced power consumption can be manufactured. .
[0227] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.
[0228] (Embodiment 3) In this embodiment, the number of defects in the metal oxide film is smaller than that in the first and second embodiments. A semiconductor device having a transistor capable of further reducing The transistor described in this embodiment has a structure similar to that of the transistors described in the first and second embodiments. In comparison, a multilayer film having a plurality of metal oxide films is provided instead of the metal oxide film. The points are different.
[0229] FIG. 9 is a cross-sectional view of a transistor 22b and a capacitor 25b included in the semiconductor device. FIG. 9 is a cross-sectional view taken along dashed lines AB and CD in FIG.
[0230] The transistor 22b shown in FIG. 9A has a multilayer film 150a on an insulating film 107a. The multilayer film 150a includes a first metal oxide film 151a in contact with the insulating film 107a, and a first The insulating film 111c includes a first metal oxide film 151a and a second metal oxide film 152a in contact with the first metal oxide film 151a and the second metal oxide film 152a in contact with the insulating film 111c. do.
[0231] The capacitive element 25b shown in FIG. 9A has a multilayer film 150b on an insulating film 107b. The layer film 150b is made up of a first metal oxide film 151b in contact with the insulating film 107b and a first metal oxide film 151b. The second metal oxide film 152b is in contact with the oxide film 151b and the insulating film 113.
[0232] The second metal oxide films 152a and 152b are formed by bonding the first metal oxide films 151a and 151b. The first metal oxide film is made up of one or more of the constituent elements. At the interfaces between the metal oxide films 151a and 151b and the second metal oxide films 152a and 152b, Plane scattering is unlikely to occur. Therefore, the movement of carriers is not hindered at the interface, The field effect mobility of the transistor is increased.
[0233] The first metal oxide films 151a and 151b and the second metal oxide films 152a and 152b are Representative examples include In-Ga oxide, In-Zn oxide, and In-M-Zn oxide (M is Al). , Ga, Ti, Y, Zr, La, Ce, or Nd).
[0234] The second metal oxide films 152a and 152b are formed by removing the first metal oxide films 151a and 151b. The energy of the bottom of the conduction band is closer to the vacuum level than 1b, and is typically the second metal oxide. The energy of the bottom of the conduction band of the first metal oxide film 151a, The difference in energy between the bottom of the conduction band of 51b and the .1eV or more, or 0.15eV or more and 2eV or less, 1eV or less, 0.5eV or less , or 0.4 eV or less. That is, the electron affinity of the second metal oxide films 152a and 152b is The difference between the neutralization potential and the electron affinity of the first metal oxide films 151a and 151b is 0.05 eV or less. Above, 0.07 eV or more, 0.1 eV or more, or 0.15 eV or more and 2 eV or less, 1 eV or less, 0.5 eV or less, or 0.4 eV or less.
[0235] The first metal oxide films 151a and 151b and the second metal oxide films 152a and 152b are By containing In, the carrier mobility (electron mobility) becomes high, which is preferable.
[0236] The second metal oxide films 152a and 152b are made of Al, Ga, Ti, Y, Zr, La, By having Ce or Nd in a higher atomic ratio than In, the following effects may be obtained. (1) The energy gap of the second metal oxide films 152a and 152b is increased. (2) To reduce the electron affinity of the second metal oxide films 152a and 152b. (4) Compared to the first metal oxide films 151a and 151b, the diffusion of impurities from the first metal oxide films 151a and 151b is suppressed. (5) Al, Ga, Y, Zr, La, Ce, or Nd reacts with oxygen Since it is a metal element with strong bonding strength, oxygen deficiency is unlikely to occur.
[0237] When the first metal oxide films 151a and 151b are In-M-Zn oxides, In and When the sum of In and M is 100 atomic %, the atomic ratio of In to M is preferably 25 atomic % or more, M is less than 75 atomic %, and more preferably In is 34 atomic% or more and M less than 66 atomic%.
[0238] When the second metal oxide films 152a and 152b are In-M-Zn oxides, In and When the sum of In and M is 100 atomic %, the atomic ratio of In to M is preferably I n is less than 50 atomic % and M is greater than 50 atomic %, more preferably Let In be less than 25 atomic% and M be greater than 75 atomic%.
[0239] In addition, the first metal oxide films 151a and 151b and the second metal oxide films 152a and 15 2b is In-M-Zn oxide M (M is Al, Ga, Ti, Y, Zr, La, Ce, or In the case of Nd), the second metal oxide film 151a, 151b is larger than the first metal oxide film 151a, 151b. M (Al, Ga, Ti, Y, Zr, La, Ce, or The atomic ratio of Nd) is large, and typically, the first metal oxide films 151a and 151b include Compared with the above atoms contained in the This is a high atomic ratio.
[0240] In addition, the first metal oxide films 151a and 151b and the second metal oxide films 152a and 15 2b is In-M-Zn oxide (M is Al, Ga, Ti, Y, Zr, La, Ce, or In the case of Nd), the second metal oxide films 152a and 152b are formed of In:M:Zn=x1:y1: z1 [atomic ratio], the first metal oxide films 151a and 151b are In:M:Zn=x2:y 2:z2 [atomic ratio], y1 / x1 is greater than y2 / x2, and preferably, y 1 / x1 is 1.5 times or more larger than y2 / x2. More preferably, y1 / x1 is 1.5 times larger than y2 / x2, and more preferably, y1 / x1 is 3 times larger than y2 / x2 In this case, when y2 is equal to or larger than x2 in the metal oxide film, the metal oxide film This is preferable because it can impart stable electrical characteristics to the transistor 22b using the same.
[0241] The first metal oxide films 151a and 151b are In-M-Zn oxides (wherein M is Al, Ga, In the case of Ti, Y, Zr, La, Ce, or Nd, the first metal oxide film 151a, 15 In the target used to deposit 1b, the atomic ratio of metal elements is In:M:Zn If we set =x1:y1:z1 、 x1 / y1 is between 1 / 3 and 6, or between 1 and 6 and z1 / y1 is preferably 1 / 3 or more and 6 or less, and more preferably 1 or more and 6 or less. In addition, by setting z1 / y1 to be 1 or more and 6 or less, the first metal oxide films 151a and 15 The CAAC-OS film is easily formed as 1b. Representative examples are In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In :M:Zn=3:1:2 etc.
[0242] The second metal oxide films 152a and 152b are In-M-Zn oxides (wherein M is Al, Ga, In the case of Ti, Y, Zr, La, Ce, or Nd, the second metal oxide film 152a, 15 In the target used to deposit 2b, the atomic ratio of metal elements is In:M:Zn If we set =x2:y2:z2 、 x2 / y2 <x1 / y1であって、z2 / y2は、1 / 3 It is preferable that z2 / y2 is 1 or more and 6 or less, and more preferably 1 or more and 6 or less. By the following, CAAC-OS films are formed as the second metal oxide films 152a and 152b. A typical example of the atomic ratio of the metal elements in the target is In:M:Zn. =1:3:2, In:M:Zn=1:3:4, In:M:Zn=1:3:6, In:M: Zn=1:3:8, etc.
[0243] The first metal oxide films 151a and 151b and the second metal oxide films 152a and 15 The atomic ratio of 2b is allowed to vary by ±40% from the above atomic ratio as an error. include.
[0244] The second metal oxide films 152a and 152b are formed as a result of the formation of a film that will become the insulating film 111c. It also functions as a film for reducing damage to the first metal oxide film 151a.
[0245] The thickness of the first metal oxide films 151a and 151b is preferably 3 nm or more and 200 nm or less. The thickness is preferably 3 nm or more and 100 nm or less, and more preferably 3 nm or more and 50 nm or less. The thickness of the metal oxide films 152a and 152b is 3 nm or more and 100 nm or less, preferably 3 The thickness should be greater than or equal to 50 nm.
[0246] The first metal oxide films 151a and 151b and the second metal oxide films 152a and 152b are For example, the non-single crystal structure may be a CAAC-OS (C Axis Aligned-Crystalline Oxide Semiconductor uctor), polycrystalline structure, microcrystalline structure (described below), or amorphous structure.
[0247] The first metal oxide films 151a and 151b and the second metal oxide films 152a and 15 In 2b, the amorphous structure region, the microcrystalline structure region, the polycrystalline structure region, and the CAAC-O A mixed film having two or more types of regions of a single crystal structure and a region of a single crystal structure may be formed. For example, amorphous structure regions, microcrystalline structure regions, polycrystalline structure regions, CAAC-OS regions In some cases, the crystal structure may be a single layer structure having two or more regions of either a single crystal structure or a mixed crystal structure. The composite film may have, for example, an amorphous structure region, a microcrystalline structure region, a polycrystalline structure region, a CAAC- It may have a layered structure of two or more regions of either an OS region or a single crystal structure region. .
[0248] Here, a second metal oxide film is provided between the first metal oxide film 151a and the insulating film 111c. Therefore, the second metal oxide film 152a and the insulating film 111c Even if carrier traps are formed by impurities and defects during There is a gap between the area where the wrap is formed and the first metal oxide film 151a. As a result, electrons flowing through the first metal oxide film 151a are less likely to be captured by the carrier traps. It is possible to increase the on-current of the transistor 22b and to improve the field effect mobility. In addition, when an electron is captured in a carrier trap, the electron is transferred to a negative fixed charge. As a result, the threshold voltage of the transistor changes. However, there is a gap between the first metal oxide film 151a and the region where carrier traps are formed. Therefore, it is possible to suppress the capture of electrons in the carrier traps, and the threshold This can reduce fluctuations in the value voltage.
[0249] In addition, the second metal oxide film 152a can block impurities from the outside. Therefore, it is possible to reduce the amount of impurities that move from the outside to the first metal oxide film 151a. In addition, oxygen vacancies are unlikely to form in the second metal oxide film 152a. It is possible to reduce the impurity concentration and the amount of oxygen vacancies in the first metal oxide film 151a. be.
[0250] The first metal oxide films 151a and 151b and the second metal oxide films 152a and 15 2b is a continuous junction (here, the energy of the lower end of the conduction band is particularly low) rather than a simple stacking of each film. The structure is such that the thickness of each film changes continuously. There are no impurities at the interface that could form defect levels such as trap centers or recombination centers. The laminated structure is as follows. When impurities are present between the metal oxide films 152a and 152b of the second semiconductor device, the energy band The continuity of the interface is lost, and carriers are trapped or recombined at the interface and disappear. cormorant.
[0251] To form continuous junctions, a multi-chamber deposition system equipped with a load lock chamber is required. Each film is laminated in succession using a sputtering device without exposing it to the air. Each chamber in the sputtering device is indispensable for the metal oxide film. A vacuum pump of the adsorption type, such as a cryopump, is used to remove as much pure water as possible. High vacuum pumping (5×10 -7 Pa~1×10 -4 It is preferable to use a temperature of up to about 1 Pa. Alternatively, a turbo molecular pump and cold trap can be combined to evacuate the chamber from the exhaust system. It is preferable to prevent gas, especially gas containing carbon or hydrogen, from flowing back into the .
[0252] As shown in FIG. 9B, the transistor 22c has a multilayer film 155a. The element 25c may include a multilayer film 155b.
[0253] The multilayer film 155a includes a third metal oxide film 153a, a first metal oxide film 151a, and A second metal oxide film 152a is laminated in this order. A third metal oxide film 153a The first metal oxide film 152a is in contact with the insulating film 111c, and the second metal oxide film 152b is in contact with the insulating film 111c. The metal oxide film 151a functions as a channel region.
[0254] The multilayer film 155b includes a third metal oxide film 153b, a first metal oxide film 151b, and A second metal oxide film 152b is laminated in this order. A third metal oxide film 153b is laminated in this order. The second metal oxide film 152b is in contact with the insulating film 107b, and the second metal oxide film 152b is in contact with the insulating film 113.
[0255] The third metal oxide films 153a and 153b are formed in a layer including the second metal oxide films 152a and 152b. Similar materials and formation methods can be used as appropriate.
[0256] The third metal oxide films 153a and 153b are thicker than the first metal oxide films 151a and 151b. It is preferable that the thickness of the third metal oxide films 153a and 153b is set to 1 nm or more. By making the thickness 5 nm or less, preferably 1 nm to 3 nm, the threshold voltage of the transistor can be reduced. It is possible to reduce the amount of pressure fluctuation.
[0257] The transistor described in this embodiment has an insulating film 107a and a first metal oxide film 151a. A third metal oxide film 153a is provided between the first metal oxide film 15 A second metal oxide film 152a is provided between the insulating film 111a and the insulating film 111c. Therefore, the insulating film 107a and the first metal oxide film 151a are separated from each other by the first metal oxide film 151a. Carrier traps are formed between the film 151a and the insulating film 111c due to impurities and defects. Even if the carrier traps are formed, the region in which the carrier traps are formed and the first metal oxide film 151a As a result, the electrons flowing through the first metal oxide film 151a become carriers. Since the transistor 22c is less likely to be captured by a trap, the on-current of the transistor 22c can be increased. In addition, the field effect mobility can be increased. When this happens, the electrons become negative fixed charges. As a result, the threshold voltage of the transistor However, the first metal oxide film 151a and the carrier traps The gap between the regions where the carrier traps are formed suppresses the capture of electrons in the carrier traps. This makes it possible to reduce the variation in the threshold voltage of the transistor 22c. do.
[0258] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.
[0259] (Embodiment 4) In this embodiment, the on-current is large, the field effect mobility is high, and the variation in electrical characteristics is small. A method for manufacturing a small number of transistors and capacitors by reducing the number of photomasks is described. 10 and 11. In this embodiment, the transistor shown in the second embodiment is used. Although the present embodiment will be described using a transistor and a manufacturing method thereof, the present embodiment can be applied to other embodiments as appropriate. Moreover, the description of the configuration that overlaps with the second embodiment will be omitted.
[0260] FIG. 10 is a top view of the pixel 13, and FIG. 11(A) shows the dotted line AB, CD in FIG. 11(A) is a cross-sectional view taken along dashed line EF in FIG. 10, and FIG. 11(B) is a cross-sectional view taken along dashed line EF in FIG.
[0261] The transistor 22d is provided in a region where the scanning line and the signal line intersect. The gate electrode 22d includes a conductive film 203 that functions as a gate electrode, a gate insulating film (not shown in FIG. 11), ), a metal oxide film 209a in which a channel region is formed on the gate insulating film, The conductive films 213a and 213b functioning as source and drain electrodes, and the metal oxide film 2 11. An insulating film (not shown in FIG. 11) that covers the conductive films 213a and 213b, and a gate electrode The transistor 22d is formed of an opening 241. In the above, the conductive film 203 and the conductive film 243 functioning as a gate electrode are connected to each other. It is characterized by:
[0262] Next, the cross-sectional structure of the transistor 22d will be described with reference to FIG. 2) is a cross-sectional view of a transistor 22d in the channel length direction and a cross-sectional view of a capacitor 25a, FIG. 11B is a cross-sectional view of the transistor 22d in the channel direction.
[0263] The transistor 22d shown in FIGS. 11A and 11B is a channel protection type transistor. A conductive film 203 functioning as a gate electrode is provided on a substrate 201. An insulating film 205 is formed on the plate 201 and the conductive film 203, and a The insulating film 207a and the metal oxide film overlapping the conductive film 203 via the insulating films 205 and 207a. and an insulating film 209a formed on the metal oxide film 209a and functioning as a channel protection film. An insulating film 211c and a metal oxide film 209a are connected to the insulating film 211c. The insulating film 205, the metal oxide film 209a, An insulating film 217 formed on the insulating film 211c and the conductive films 213a and 213b; The insulating film 205 has a conductive film 243 which functions as a gate electrode formed on the insulating film 217. The insulating film 211c and the insulating film 207a function as gate insulating films. The film 17 functions as a gate insulating film.
[0264] As shown in FIG. 11B, the conductive film 203 and the conductive film 243 are The connection is made at an opening 241 in the film 217. In the width direction, the end of the conductive film 243 is located outside the end of the metal oxide film 209a. In addition, the side surface of the metal oxide film 209a faces the conductive film 243 with the insulating film 217 interposed therebetween. The conductive film 243 faces the side surface of the metal oxide film 209a in the opening 241. .
[0265] The conductive film 243 can be formed using a material and a method similar to those of the conductive film 221. Moreover, the opening 241 can be formed at the same time as the opening 219 is formed. As a result, transistors can be manufactured using five photomasks without increasing the number of photomasks. A heater 22d can be created.
[0266] In FIG. 11B, the conductive film 203 and the conductive film 243 are directly connected to each other. On the other hand, as shown in FIG. 11C, the conductive film 203 and the conductive film 243 are The electrodes may be electrically connected via a
[0267] That is, in the opening 251 provided in the insulating film 205, the conductive film 203 and the conductive film 253 is connected to the conductive film 2 53 and the conductive film 243 are connected. As a result, the conductive film 203 and the conductive film 253 have the same potential. This is a structure to which a voltage of
[0268] The conductive film 253 is formed using a material and a manufacturing method similar to those of the conductive films 213a and 213b. In comparison with the opening 241 shown in FIG. As a result, the conductive films 243 and 255 in the respective openings are It is possible to increase the coverage of 53. As a result, the yield can be increased.
[0269] In FIG. 11B, the metal oxide film 209 The side surface of a faces the conductive film 243 which functions as a gate electrode. In the channel width direction of the transistor, the side surface of the metal oxide film 209a is It faces the conductive film 253 having the same potential as the conductive films 203 and 243 that function as electrodes. Therefore, the electric field of the conductive film 203 and the conductive film 243 is not only on the plane of the metal oxide film 209a, but also As a result, the region in which carriers flow in the metal oxide film 209a is , the interface between the insulating film 207a and the metal oxide film 209a, and the interface between the metal oxide film 209a and the insulating film Since the area is wide and includes not only the interface with 211c but also the inside of the metal oxide film 209a, The amount of carrier movement in the transistor increases. As a result, the on-current of the transistor As the field effect mobility increases, the field effect mobility also increases, typically reaching 10 cm 2 / V·s or more, even 20 cm 2 / V s or more. Note that the L length of the transistor is By making the diameter of the wire 0.5μm or more and 6.5μm or less, preferably 1μm or more and less than 6μm, the wire The increase in field effect mobility is significant.
[0270] In addition, at the end of the metal oxide film 209a processed by etching or the like, Damage from this causes defects, and the material is contaminated by impurities. One of the conductive film 203 and the conductive film 243 which functions as a gate electrode in a transistor If only the metal oxide film 209a is formed, the electric field By applying such stress, the end of the metal oxide film 209a is activated, and In addition, the n-type region is likely to be a low-resistance region. If the n-type region is placed linearly between the n-type and n-type MOSFETs, the n-type region will become a carrier path, resulting in parasitic capacitance. As a result, the drain current rises gradually with the threshold voltage. , and the threshold voltage of the transistor is shifted negatively. As shown in FIG. 11B and FIG. 11C, the conductive film 203 and the conductive film 24 are at the same potential. 3, and the conductive film 243 faces the side surface of the metal oxide film 209a in the channel width direction. By orienting the conductive film 243, the electric field of the conductive film 243 also affects the side surface of the metal oxide film 209a. As a result, the parasitic charge on the side surface of the metal oxide film 209a or the end portion including the side surface and its vicinity As a result, the rise in drain current at the threshold voltage is steeper. This results in a transistor with excellent electrical characteristics.
[0271] In addition, the conductive film 203 and the conductive film 243 each block an electric field from the outside. In order to have a shielding function, the insulating film 243 is provided between the substrate 201 and the conductive film 243 and on the conductive film 243. As a result, the fixed charges generated by the metal oxide film 209a do not affect the metal oxide film 209a. Apply a negative potential to the gate electrode - GBT (Gate Bias-Temperature Transistor) The degradation of the drain current at different drain voltages is suppressed. Fluctuations in the start-up voltage of the current can be suppressed.
[0272] The BT stress test is a type of accelerated test that detects the transitions that occur during long-term use. It is possible to evaluate the characteristic changes (i.e., aging) of the transistor in a short time. The amount of change in the threshold voltage of a transistor before and after stress testing is used to examine reliability. This is an important indicator. The smaller the change in threshold voltage before and after the BT stress test, the Therefore, it can be said that this is a highly reliable transistor.
[0273] In addition, in FIG. 11B and FIG. 11C, the metal oxide An opening is provided on one side surface of the film 109a, and the conductive film 203 and the conductive film 243 is electrically connected, but an opening is also provided on the other side, and a conductor is inserted in the opening. The conductive film 203 and the conductive film 243 may be electrically connected. In addition, the conductive film 243 can be formed on both sides of the metal oxide film 209a. It is possible to affect the electric field of the metal oxide film 209a, and the on-current of the transistor It is possible to increase the field effect mobility as well as the capacitance.
[0274] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.
[0275] (Embodiment 5) A driver circuit is formed using the transistor and the capacitor described in any of Embodiments 1 to 4. It can be made.
[0276] The transistor 22d described in Embodiment 4 has a large on-state current and high mobility. For this reason, circuits that are made up of transistors that need to pass a large current, such as buffers, By using the transistor 22d, the channel length and the channel width can be reduced. This allows the area of the transistor to be reduced. As a result, the area of the driver circuit can be reduced. In a semiconductor device having a driving circuit in the peripheral portion, typically a display device, By reducing the area of the operating circuit, the area of the pixel portion in the display device can be increased. That is, it is possible to narrow the frame of the display device.
[0277] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.
[0278] (Embodiment 6) In this embodiment, the semiconductor device described in the above embodiment is used as an example of a semiconductor device. The electronic devices that can be mounted will be described.
[0279] As an example of electronic equipment, a television device (also called a television or television receiver) (hereinafter referred to as "computer monitors"), digital cameras, digital video cameras, digital photo frames, mobile phones (also called mobile phones or mobile phone devices), portable game machines, Examples include portable information terminals, audio playback devices, and large game machines such as pachinko machines. A specific example of such an electronic device is shown in FIG.
[0280] FIG. 12A shows an example of a television device. The television device 7100 is A display unit 7103 is incorporated in the housing 7101. The display unit 7103 displays an image. The display device described in the above embodiment can be used for the display portion 7103. In this embodiment, the housing 7101 is supported by a stand 7105. It shows.
[0281] The television device 7100 can be operated using an operation switch provided on the housing 7101 or a separate remote control. This can be done by the remote controller 7110. The operation keys 7109 can be used to operate the channel and the volume. 03. The remote controller 7110 can also be used to control the images displayed on the A display unit 7107 for displaying information output from the remote controller is provided. You may do so.
[0282] The television device 7100 includes a receiver, a modem, and the like. This allows reception of general television broadcasts, and can also be used for wired or wireless reception via a modem. By connecting to a network, communication can be one-way (sender to receiver) or two-way It is also possible to communicate information in both directions (between sender and receiver, or between receivers). .
[0283] FIG. 12B shows a computer, which includes a main body 7201, a housing 7202, a display unit 7203, Including a keyboard 7204, an external connection port 7205, a pointing device 7206, etc. Note that the computer uses the display device described in the above embodiment mode as the display portion 7203. It is possible.
[0284] FIG. 12C shows a portable game machine that is composed of two housings, a housing 7301 and a housing 7302. The housing 7301 is connected to the connector 7303 so as to be openable and closable. A display portion 7305 is incorporated in the housing 7302. The portable game machine shown in FIG. 12C also includes a speaker unit 7306 and a recording medium insertion unit 73 07, LED lamp 7308, input means (operation keys 7309, connection terminal 7310, sensor 7311 (force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature , chemicals, voice, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, (including functions for measuring vibration, odor, or infrared rays), microphone 7312) Of course, the configuration of the portable gaming machine is not limited to the above, and at least The display device described in the above embodiment may be used for both or either of the display portion 7304 and the display portion 7305. The above-mentioned equipment may be used, and other auxiliary equipment may be appropriately provided. The portable gaming machine shown in 2(C) reads the programs or data recorded on the recording medium. It also has the function of displaying the information on the display screen and wirelessly communicating with other portable gaming machines. The functions of the portable gaming machine shown in FIG. 12(C) are not limited to these. , can have a variety of functions.
[0285] FIG. 12D shows an example of a mobile phone. A mobile phone 7400 includes a housing 740. In addition to the display unit 7402 incorporated in the 1, the operation buttons 7403, the external connection port 7404, The mobile phone 7400 is equipped with a speaker 7405, a microphone 7406, and the like. The display device described in the above embodiment mode is used for the display portion 7402 .
[0286] In a mobile phone 7400 shown in FIG. 12D, when the display portion 7402 is touched with a finger or the like, You can enter information, make calls, write emails, and perform other operations. This can be done by touching the display portion 7402 with a finger or the like.
[0287] The screen of the display unit 7402 has three main modes. The first is a mode that mainly displays images. The first mode is a display mode, the second is an input mode for inputting information such as characters, and the third mode is a display mode. This is a display + input mode that combines the display mode and the input mode.
[0288] For example, when making a call or composing an e-mail, the display unit 7402 is used for inputting characters. The main input mode is the character input mode, and the input operation of the characters displayed on the screen can be performed. In this case, a keyboard or number buttons can be displayed on most of the screen of the display unit 7402. preferable.
[0289] In addition, a sensor for detecting tilt, such as a gyro or an acceleration sensor, is installed inside the mobile phone 7400. By providing a detection device having the above, the orientation of the mobile phone 7400 (portrait or landscape) can be determined, The screen display on the display portion 7402 can be automatically switched.
[0290] The screen mode can be changed by touching the display portion 7402 or the housing 7401. This is done by operating the operation button 7403. Also, the type of image displayed on the display unit 7402 For example, the image signal to be displayed on the display unit may be changed depending on the type of the image. If it is image data, the mode is switched to display mode, and if it is text data, the mode is switched to input mode.
[0291] In the input mode, the optical sensor of the display unit 7402 detects a signal and displays the If there is no input by touch operation on the display unit 7402 for a certain period of time, the screen mode is changed to the input mode. Alternatively, the display mode may be switched from the display mode to the display mode.
[0292] The display unit 7402 can also function as an image sensor. By touching 402 with a palm or a finger and capturing an image of a palm print, fingerprint, or the like, personal authentication can be performed. In addition, a backlight that emits near-infrared light for the display unit or a sensing device that emits near-infrared light for the display unit By using a light source, it is also possible to image finger veins, palm veins, etc.
[0293] FIG. 12(E) shows an example of a folding computer. The computer 7450 has a housing 7451L and a housing 7451R connected by a hinge 7454. In addition, the operation button 7453, the left speaker 7455L and the right speaker 7 In addition to the 455R, the computer 7450 also has an external connection port 745 (not shown) on the side of the computer 7450. 6. The display unit 7452L is provided on the housing 7451L, and the display unit 7451R is provided on the housing 7451R. When the hinge 7454 is folded so that the display portions 7452R face each other, the display The part can be protected by a housing.
[0294] The display unit 7452L and the display unit 7452R not only display images, but also display information when touched with a finger or the like. For example, you can touch and select an icon that represents an installed program. You can start a program by touching two points on the image with your fingers at different intervals. You can zoom in or out on the image by moving your finger over a point on the displayed image. You can also display an image of a keyboard and use your finger to move the displayed letters and symbols. You can also select and enter information.
[0295] In addition, the computer 7450 is equipped with a gyro, an acceleration sensor, and a GPS (Global Positioning System). It is equipped with a GPS receiver, a fingerprint sensor, and a video camera. For example, a detection device having a sensor for detecting the inclination, such as a gyro or an acceleration sensor, By providing a positioning device, the orientation of the computer 7450 (portrait or landscape) can be determined and the screen to be displayed can be adjusted. You can set it to automatically switch orientation.
[0296] The computer 7450 can also be connected to a network. In addition to being able to display information on the Internet, it can also remotely control other electronic devices connected to the network. It can be used as a terminal to operate from the
[0297] Note that the structures and methods described in this embodiment may be different from the structures and methods described in other embodiments. They can be used in appropriate combination.
Claims
1. a first metal oxide film having a channel formation region of a transistor; A scan line of the transistor; a source wiring electrically connected to the first metal oxide film; a pixel electrode electrically connected to the first metal oxide film; a second metal oxide film having a region overlapping the pixel electrode via an insulating film; a wiring electrically connected to the second metal oxide film; the wiring has a region that is arranged across a plurality of pixels that are arranged in a direction in which the source wiring extends, the wiring has a first region and a second region having a narrower line width than the first region, the source line has a third region and a fourth region having a line width narrower than that of the third region, The scanning line overlaps the second region and the fourth region.
2. In claim 1, A liquid crystal display device, wherein the pixel electrodes do not overlap the wiring in a plan view.
3. In claim 1 or 2, a liquid crystal display device comprising an oxide insulating film having a region in contact with an upper surface of the first metal oxide film;
Citation Information
Patent Citations
Active matrix substrate, its manufacture, and image sensor using the same
JP2000323698A
Liquid crystal display
JP2005091819A
Display device using oxide semiconductor thin film transistor
KR1020090057689A
Pixel structure and manufacturing method thereof
US20120138932A1
Semiconductor device and display device
WO2012086513A1