Superconducting quantum circuit device and method for controlling superconducting quantum circuit

Abstract

To maintain the constraints on quantum bits that are not stopped even when a quantum bit stops.SOLUTION: A superconducting quantum circuit device includes a plurality of quantum bits respectively coupled to couplers via a coupled port, and further includes spare ports that are spare coupled ports coupled to the couplers in addition to the coupled ports.SELECTED DRAWING: Figure 5

Description

[Technical field]

[0001] The present invention relates to a superconducting quantum circuit device and a method for controlling a superconducting quantum circuit. [Background technology]

[0002] It is known that when a quantum annealing machine of the LHZ (an acronym of the three proposers Lechner, Hauke, and Zoller) method is realized using a Josephson parametric oscillator (JPO), a Josephson junction or a nonlinear resonator including it can be used as a four-body coupler (Non-Patent Documents 1 and 2). In the LHZ method, one physical bit represents the product of two logical bits, and the physical bits are regularly arranged, adjacent physical bits are connected by a four-body coupler, and a local magnetic field is applied to represent the total coupling between the logical bits. The JPO is a superconducting nonlinear resonator having a superconducting quantum interference device (SQUID). The JPO parametrically oscillates at half the frequency of the pump by applying a microwave (pump signal) of about twice the resonant frequency to the SQUID. This parametric oscillation takes one of two oscillation states with a relative phase difference of π with respect to the pump signal. These two oscillation states are treated as two levels of the quantum bit. [Prior art documents] [Non-patent literature]

[0003] [Non-Patent Document 1] Wolfgang Lechner, Philipp Hauke, Peter Zoller, "A quantum annealing architecture with all-to-all connectivity from local interactions", Science Advances 2015 October [Non-Patent Document 2] Shruti Puri, et. al., "Quantum annealing with all-to-all connected nonlinear oscillators", Nature Communications 8, 15785 (2017) Summary of the Invention [Problem to be solved by the invention]

[0004] When a quantum annealing machine is constructed using JPOs as quantum bits, there may be cases where quantum bits (also called "missing bits") are missing, such as JPOs that do not oscillate parametrically, due to factors such as the yield in the manufacturing process. In addition, there may be cases where it is desired to pause the oscillation of some JPOs from the perspective of suppressing noise sources. In this way, there may be a situation in which some of the oscillators, which are quantum bits, have stopped due to missing or paused operations.

[0005] An object of the present disclosure is to provide a superconducting quantum circuit device and a method for controlling a superconducting quantum circuit that make it possible to maintain constraints on non-suspended quantum bits even when a quantum bit is suspended. [Means for solving the problem]

[0006] According to one aspect of the present disclosure, a superconducting quantum circuit device has a plurality of quantum bits coupled to a coupler via respective coupled ports, and further includes a spare port that is a spare coupled port that is coupled to the coupler, in addition to the coupled ports.

[0007] According to one aspect of the present disclosure, there is provided a method for controlling a superconducting quantum circuit, in which a plurality of quantum bits are coupled to a coupler via respective coupled ports, and a spare port is further provided, separate from the coupled ports, as a spare coupled port that is coupled to the coupler, and a signal is applied to the spare port instead of the quantum bits. Effect of the Invention

[0008] According to the present disclosure, even when a quantum bit stops, it is possible to maintain the constraints on quantum bits that are not stopped. [Brief description of the drawings]

[0009] [Figure 1] FIG. 1 is a diagram for explaining an example of a circuit configuration of a related technique. [Diagram 2] FIG. 1 is a diagram for explaining a schematic example of a layout according to a related art technique; [Figure 3A] FIG. 1 is a diagram illustrating a related art. [Figure 3B] FIG. 1 is a diagram illustrating a related art. [Figure 4] FIG. 2 is a diagram illustrating an example of a circuit configuration according to an embodiment. [Diagram 5] FIG. 2 is a diagram for explaining a schematic example of a layout according to an embodiment; [Figure 6] FIG. 1 is a diagram for explaining a schematic configuration example of an embodiment; [Figure 7] FIG. 11 is a diagram for explaining a schematic diagram of another example of the configuration of the embodiment. [Figure 8] FIG. 11 is a diagram for explaining an example of a circuit configuration according to another example of the embodiment. [Figure 9] FIG. 11 is a diagram for explaining a schematic example of a layout according to another example of the embodiment; [Figure 10] FIG. 11 is a diagram for explaining a schematic configuration example of another example of the embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] An embodiment will be described. In a quantum annealing machine, if there is a missing bit due to a stop or the like, not only the missing bit itself cannot be used, but also the four-body interaction does not function in the coupler to which the missing bit is coupled, and the necessary constraints do not apply to normal quantum bits that are not missing, etc. The above problem is one example, but the device and method disclosed herein are not limited to the above and can improve the availability and fault-tolerance of superconducting quantum circuit devices in various situations.

[0011] According to the present disclosure, the superconducting quantum circuit device is provided with a spare coupling port (spare port) that is connected to the coupler in place of at least one of the four quantum bits that are connected to the coupler. When at least one quantum bit is missing, a signal that replaces the missing quantum bit is input to the spare port, and the four quantum bits including the missing quantum bit are allowed to undergo four-body interaction via the coupler, thereby making it possible to maintain the constraint on the non-missing quantum bits. Note that when no quantum bit is missing and there is no need to stop the quantum bit for any other reason, the spare port may be in an open state without being electrically connected to anything, or may be connected to ground directly or via a capacitor.

[0012] In the following, a four-body interaction coupler using a typical JPO will be described as a premise of the proposal of this disclosure. Figures 1 and 2 are diagrams for clarifying the features (newly added elements, etc.) of the embodiments (e.g., Figures 4 and 5, etc.) described later.

[0013] Fig. 1 is a diagram for explaining an example of the configuration of a coupler that couples, by four-body interaction, four JPOs (also called plaquette) that form unit cells in the LHZ method coupled by four-body interaction. Referring to Fig. 1, a superconducting quantum circuit 1 includes four JPO1 (20A) to JPO4 (20D) and a coupler 21. JPO1 (20A) to JPO4 (20D) are capacitively coupled to the coupler 21 via capacitors 31A to 31D, respectively.

[0014] The coupler 21 has a nonlinear element (nonlinear inductor) 10 including a Josephson junction 11 (JJ) between a first electrode 16-1 and a second electrode 16-2, and a capacitor 15 is connected in parallel to the nonlinear element 10.

[0015] JPO1 (20A) to JPO4 (20D) include SQUIDs (loops) 210A to 210D in which first superconducting portions 203A to 203D, first Josephson junctions 201A to 201D, second superconducting portions 204A to 204D, and second Josephson junctions 202A to 202D are connected in a circular shape, respectively, and capacitors 206A to 206D are connected between the first superconducting portions 203A to 203D and the second superconducting portions 204A to 204D. 06D, the second superconducting parts 204A to 204D are connected to the ground, the coupler connection parts (coupled ports) 24A and 24B of JPO1 (20A) and JPO2 (20B) are connected to one end of the coupler 21 via capacitors 31A and 31B, and the coupler connection parts (coupled ports) 24C and 24D of JPO3 (20C) and JPO4 (20D) are connected to the other end of the coupler 21 via capacitors 31C and 31D, respectively. Each of JPO1 (20A) to JPO4 (20D) is provided with a magnetic field application part (not shown), and a magnetic flux penetrating the SQUID loops 210A to 210D is generated by passing a pump signal (for example, a microwave current and a DC bias current) supplied from a pump line (not shown). In FIG. 1, the capacitances of the capacitors 206A to 206D of JPO1 (20A) to JPO4 (20D) are C J , the capacitance of the capacitor 15 of the coupler 21 is C g The capacitance of capacitors 31A to 31D is C.

[0016] 2 is a diagram showing a schematic diagram of a coupler 21 and an example (non-limiting example) of a wiring pattern (layout) in the vicinity thereof in a wiring layer on a substrate of a quantum chip. The coupler 21 in FIG. 2 corresponds to the coupler 21 in FIG. 1. The coupler 21, a ground plane 41 (ground pattern), JPOs 20A to 20D, and the like are formed in the wiring layer on the substrate. The coupler 21 is surrounded by a ground plane 41 (GND) via a gap 42 of a predetermined width, and the substrate surface is exposed in the gap 42. The wiring layer is made of a superconducting material, and the ground plane 41, coupler 21, JPOs 20A to 20D, and the like are formed in a wiring process (application of photoresist, exposure and development, etching process, and the like) for a superconducting film formed on the substrate surface.

[0017] 2, the coupler 21 has a first electrode 16-1 having a substantially L-shape and a second electrode 16-2 having a substantially inverted L-shape arranged to face each other, and has a comb-teeth-like nesting structure in which the first electrode 16-1 and the second electrode 16-2 are alternately protruded from the sides toward each other from the sides of the first electrode 16-1 and the second electrode 16-2. Furthermore, the facing parts 16A and 16B extending from the upper side and the side sides of the first electrode 16-1, respectively, are arranged to face the coupler connection parts (coupling ports) 24A and 24B of JPO1 (20A) and JPO2 (20B) with a space between their ends, and are capacitively coupled (corresponding to the capacitors 31A and 31B in FIG. 1). The opposing portions 16C and 16D extending from the bottom and side edges of the second electrode 16-2 are disposed facing and spaced apart from the coupler connection portions (coupling ports) 24C and 24D of the JPO3 (20B) and JPO4 (20D), respectively, for capacitive coupling (corresponding to the capacitors 31C and 31D in FIG. 1). The nonlinear element 10 is provided between the top edge of the first electrode 16-1 and the side edge of the second electrode 16-2 facing the top edge.

[0018] The substrate is made of silicon, for example, but may be made of other electronic materials such as sapphire or compound semiconductor materials (IV, III-V, II-VI groups). The substrate is preferably single crystal, but may be polycrystalline or amorphous. The material of the superconducting line is made of, for example, niobium (Nb) or aluminum (Al), but is not limited thereto. Any metal that becomes superconducting when cooled to a very low temperature may be used, such as niobium nitride, indium (In), lead (Pb), tin (Sn), rhenium (Re), palladium (Pd), titanium (Ti), Mo (molybdenum), Ta (tantalum), tantalum nitride, and alloys containing at least one of these. In order to realize the superconducting state, the superconducting quantum circuit is used in a temperature environment of, for example, about 10 mK (millikelvin) realized by a refrigerator.

[0019] The Hamiltonian of the circuit in FIG. 1 is as follows (for its derivation, see, for example, Non-Patent Document 1):

[0020] TIFF2025019753000002.tif14150…(1)

[0021] In the first term on the right-hand side, H JPOi is the Hamiltonian of the i-th JPO alone. The second term is the four-body interaction between the JPOs. a k + , a k represents the creation and annihilation operators in the i-th JPO. g (4) is the coefficient of the four-body interaction, and the energy E of the Josephson junction of the coupler 21 J and is proportional to g1g2g3g4 / (Δ1Δ2Δ3Δ4), where g i is the coupling constant between the i-th JPO and the Josephson junction JJ of the coupler 21, Δ i is the resonant frequency ω of the i-th JPO i and a resonant frequency ω determined by the capacitance and inductance of the Josephson junction 11 of the coupler 21.c Difference Δ k =ω c -ω i It is. The third term corresponds to the cross Kerr interaction (a k + a k and + a l a l The coefficient g (k,l) χ E J And, g k 2 g l 2 / (Δ k 2 Δ l 2 ) is proportional to (g k 2 / Δ k )a k † a corresponds to the frequency shift of the JPO mode due to off-resonant coupling with the Josephson junction JJ of the coupler 21. The last term H coupler is the Hamiltonian of the coupler 21 alone.

[0022] Consider the case where JPO4 (20D) is missing in the circuit in Figure 1. For example, it is assumed that parametric oscillation is no longer possible due to a short circuit in SQUID210D of JPO4 (20D) or a break in the pump line. In this case, a4 † Since the expected value of a4 becomes 0, the four-body interaction term (the second term on the right-hand side of formula (1)) becomes 0, and the four-body interaction does not function. According to the present disclosure, a spare port is provided for transmitting a signal in place of the quantum bit to coupler 21, and by inputting a signal to the spare port, the four-body interaction is applied via coupler 21, and the constraint on the quantum bits that are not missing is maintained.

[0023] The energy (Hamiltonian) of the Ising model of N logic bits is expressed as follows: TIFF2025019753000003.tif19153 …(2)

[0024] Here, J ij is the two-body interaction, b i is the local magnetic field, σ (i) z (i=1~N) is the i-th Pauli spin matrix σ z It is.

[0025] Due to the total combination of N logical bits, in the LHZ scheme, the product of two logical bits is represented by one physical bit, as mentioned above. N logical bits are expanded to K=N(N-1) / 2 physical bits, and the Hamiltonian Hp is expressed as follows:

[0026] TIFF2025019753000004.tif11150 …(3)

[0027] ~σ z (i,j) The physical bit is the Pauli spin matrix σ z In the following, we only consider the z-component of the Pauli spin matrix, so ~σ z (i,j) is discussed as a number c that can take the values ​​±1. The logical bit σ corresponding to the physical bit z (i) The second term on the right hand side is a constraint.<i,j,k,l> are the indices of the Pauli spin matrices of the four physical bits of the constrained plaquette.

[0028] The four-body interaction is derived from a closed cycle. The condition for a closed cycle is given by the physical bit ~σ z (i,j) is the logical bit σ z (i) and σ z (j) It is the product of. TIFF2025019753000005.tif6150 …(4)

[0029] The product of the four physical bits in a closed cycle is TIFF2025019753000006.tif6150 …(5)

[0030] That is, the same index appears twice, so it is always 1. In FIG. 3A, the combination of logical bits: σ z (1) σ z (3) →σ z (2) σ z (3) →σ z (2) σ z (4) →σ z (1) σ z (4) For a closed loop of length 4, there are four physical bits In TIFF2025019753000007.tif6150, the number of 1's must be even. In a plaquette, the number of physical bits that are 0 is 0, 2, or 4. This constraint may be such that for a logical bit index distance s=|ij|, a closed loop of the plaquette consists of four connections: one with index distance s, two with s+1, and one with s+2. In this case, for example, In the plaquette of TIFF2025019753000008.tif6150, the index distance s is 1 ~σ z (2,3) , the index distance s+1=2 is ~σ z (1,3) and ~σ z (2,4) , the index distance s+2=3 is ~σ z (1,4)Referring to Figure 3B, N=6 logical bits are mapped to 15 physical bits, with blocks with s=1 in the bottom row, blocks with s=2 in the next row, and so on up to blocks with s=N-2 (a triangle). In Figure 3B, four rows of blocks are stacked, from s=1 to s=N-2=4. The bottom row of the pyramid is a triangle, with (N-2) physical bits fixed at 1 connected to it.

[0031] FIG. 4 is a diagram showing a schematic circuit configuration of an embodiment, and corresponds to FIG. 1. In FIG. 4, the description of elements overlapping with FIG. 1 will be omitted. Referring to FIG. 4, among JPO1 (20A) to JPO4 (20D) which perform four-body interaction via the coupler 21, JPO4 (20D) is provided with another coupling port 25 (referred to as an "auxiliary port") which is preliminarily coupled to the coupler 21 in addition to the coupler connection part (coupling port) 24D of the JPO4 (20D). The auxiliary port 25 is capacitively coupled to the second electrode 16-2 of the coupler 21 via a capacitor 32. The coupler connection parts (coupling ports) 24C and 24D of JPO3 (20C) and JPO4 (20D) are capacitively coupled to the second electrode 16-2 via capacitors 31C and 31D, respectively. The capacitor 32 is connected in parallel with the capacitors 31C and 31D.

[0032] When JPO4 (20D) is lost or needs to be stopped due to a failure or the like, a signal (microwave) is supplied to the spare port 25 from a signal source (microwave signal generator) (not shown), which serves as a substitute for JPO4 (20D), and JPO1 (20A), JPO2 (20B), and JPO3 (20C) are effectively four-body coupled through the coupler 21. That is, when JPO4 (20D) is lost (when it needs to be stopped), instead of parametrically oscillating JPO4 (20D), a signal (also called "spare") with a frequency 1 / 2 the frequency ωp of the pump signal of JPO4 (20D) is input to the spare port 25. In this case, the Hamiltonian corresponding to formula (1) is expressed by the following formula (6).

[0033] TIFF2025019753000009.tif34156 …(6)

[0034] The right-hand side of equation (6) is the preliminary term E0(a4 + + a4) has been added. E o is the strength of the single photon drive input to the spare port 25. Therefore, the creation and annihilation operator a + The expectation value of 4a4 does not become 0. Therefore, even if JPO4(20D) is missing, the four-body interaction term in the third term of equation (6) does not become 0.

[0035] By inputting a signal (single photon drive) to the spare port 25, four-body mutual coupling of JPO1, JPO2, JPO3, and missing JPO4 is realized in a pseudo manner via the coupler 21. That is, the equation (5), which is the constraint of the four physical bits (JPO) in the closed cycle, is satisfied, making it possible to maintain the constraint on JPO1, JPO2, and JPO3 that are not missing. It is said that the larger the number of quantum bits is and the closer the coupling between the quantum bits is to full coupling, the larger and more complex combinatorial optimization problems can be solved. According to this embodiment, the missing bits are corrected by the signal input from the spare port of the present disclosure, making it possible to maintain the configuration of a fully coupled quantum annealing machine in appearance and improving fault tolerance.

[0036] In addition, when there is no missing JPO in the plaquette, the magnitude of the four-body interaction can be modulated by the combination of the pump phases of JPO1, 2, 3, and 4 (20A, 20B, 20C, and 20D). p,1 , ω p,2 , ω p,3 , ω p,4 , phase θ p,1 , θ p,2 , θ p,3 , θ p,4 When a pump signal of is supplied, the second term on the right hand side of equation (1) becomes TIFF2025019753000010.tif11150 …(7) Therefore, by adjusting the relative phase of at least one of the four JPOs (JPO1 to JPO4), the effective coupling strength can be adjusted.

[0037] In equation (6), the strength of the backup E0 is determined by the input backup power, the capacitive coupling of the backup port 25, and the capacitive coupling of the signal port of the JPO (JPO4 or JPO3 in the example of FIG. 4). If the capacitive coupling of the backup port 25 is strong, it may cause an increase in the photon loss rate of the JPO through the backup port 25. For this reason, the strength of the capacitive coupling between the backup port 25 and the JPO (e.g., JPO4) is set to be equal to or weaker (smaller) than the capacitive coupling between the JPO and the signal port of the JPO (signal port 26D of JPO4 in FIG. 6 described later). Therefore, the capacitor between the backup port 25 and JPO4 (the sum of capacitor 32 and capacitor 31D in FIG. 4) is set to be equal to or smaller than the capacitor (32D in FIG. 6) between JPO4 and the signal port of JPO4 (26D in FIG. 6).

[0038] The spare port 25 is connected to the resonant frequency ω c When an input signal is applied to the spare port 25 and the reflected signal is measured, it is possible to estimate that the frequency of the input signal is equal to the resonant frequency ω c When the four-body interaction coefficient g coincides with the input signal, the input signal is absorbed by the coupler 21, and the reflectance decreases. (4) is the resonant frequency ω of the coupler 21 c Since the frequency of the combiner 21 also depends on

[0039] In the coupler 21, the nonlinear element 10 connected between the first electrode 16-1 and the second electrode 16-2 is not limited to the Josephson junction 11. The nonlinear element 10 may be, for example, a SQUID. In this case, a bias line may be provided for passing a direct current (DC) and applying a bias magnetic flux to the SQUID. Alternatively, the nonlinear element 10 may have a loop structure made up of a plurality of (for example, three or more) Josephson junctions.

[0040] FIG. 5 is a diagram showing a schematic example (non-limiting example) of the coupler 21 of FIG. 4 and a wiring pattern (layout) in the vicinity thereof, and corresponds to FIG. 2. In FIG. 5, the same elements as those in FIG. 2 are given the same reference numerals, and description thereof will be omitted. Referring to FIG. 5, an end of a coplanar transmission line (signal line) that extends with both sides in the longitudinal direction sandwiched between the ground plane 41 via a gap forms an auxiliary port 25. An end of the auxiliary port 25 faces the lower side of the second electrode 16-2 of the coupler 21 via a gap 42, and is capacitively coupled with the second electrode 16-2. Note that in FIG. 5, a narrow (linear) ground 41a that is flush with the edge of the ground plane 41 is interposed between the end of the auxiliary port 25 and the lower side of the second electrode 16-2, but the ground 41a may be removed and the end of the auxiliary port 25 may be directly opposed to the lower side of the second electrode 16-2 as an open end. Since signal transmission is performed by capacitive coupling between the end of the spare port 25 and the second electrode 16-2, the width of the gap 42 between the edges of the ground surface 41 (GND) on both sides of the spare port 25 and the lower side of the second electrode 16-2 is narrower than the width of the gap 42 between the edges of the ground surface 41 (GND) and the lower side of the second electrode 16-2 in Figure 2.

[0041] As described below, the JPO is equipped with a pump line that is magnetically coupled to the SQUID to apply a DC current and pump signal to the SQUID to induce parametric oscillation, and a signal line that is capacitively coupled to the JPO to apply a coherent drive corresponding to the local magnetic field.

[0042] The coherent drive is the parametric excitation frequency ω p,i The frequency is almost half of that of the coherent drive. Therefore, the signal that was originally intended to be used as the coherent drive can be used as the spare. p,i A switch 51 may be provided on the path of the signal line connected to a signal source (microwave signal generator) of this frequency, so that the signal output destination can be selected to be the signal port 26 capacitively coupled to the JPO or the spare port 25 capacitively coupled to the coupler 21.

[0043] Fig. 6 is a diagram for explaining an embodiment. In Fig. 6, pump lines 23C, 23D for transmitting pump signals and magnetic field application units 27C, 27D for generating magnetic flux passing through the loops of SQUIDs 210C, 210D of JPO3 (20C) and JPO4 (20D) are shown in JPO3 (20C) and JPO4 (20D). A frequency ω p In JPO3 (20C) and JPO4 (20D), one end of the SQUID 210C, 210D is connected to the ground via an inductor L (electrode of JPO3, 4), and the other end of the SQUID 210C, 210D is connected to the ground via a capacitor C J The other end of the capacitor (between one end of the electrode of JPO3, 4 and the ground) is connected to the coupler connection parts 24C, 24D, and further connected to the signal ports 26C, 26D via the capacitors 32C, 32D. JPO1 (20A) and JPO2 (20B) are also configured in the same way.

[0044] The signal ports 26A, 26B, and 26C correspond to ends of signal lines (signal transmission lines: IO lines) 28A, 28B, and 28C that transmit signals from signal sources (microwave signal generators) 50A, 50B, and 50C of the drives of JPO1, JPO2, and JPO3, respectively.

[0045] A signal source 50D for driving the JPO4 is connected to the signal port 26D or the spare port 25 via a switch (microwave switch) 51D (e.g., a single-throw bipole mechanical (relay) switch) arranged on the signal line 28D. The switch 51D may be configured to be arranged inside the dilution refrigerator, similar to the superconducting quantum circuit 1.

[0046] A first terminal of switch 51D is connected to signal source 50D, and second and third terminals are connected to signal port 26D and spare port 25, respectively, and switches the connection destination of signal source 50D between signal port 26D and spare port 25 based on a control signal 61D from control device 60. Control device 60 may be configured to be disposed outside the dilution refrigerator (at room temperature) like signal sources (microwave signal generators) 50A, 50B, 50C, and 50D.

[0047] The spare port 25 is capacitively coupled to the second electrode 16-2 of the coupler 21 via the capacitor 32. When the JPO4 (20D) is in normal operation, the switch 51D connects the drive signal source 50D of the JPO4 to the signal port 26D side, and when the JPO4 (20D) is defective, the switch 51D connects the drive signal source 50D of the JPO4 to the spare port 25. In this case, the supply of the pump signal to the pump line 23D of the JPO4 (20D) is stopped.

[0048] The spare port 25 can be used to compensate for the loss of either the JPO4 (20D) or the JPO3 (20C). That is, the spare port 25 can be used to compensate for the loss of the JPO3 (20C) or the JPO4 (20D).

[0049] According to an embodiment, for a missing bit, the signal from the drive's signal source is switched from the signal port of the missing bit to the spare port 25, thereby enabling continuous operation of the quantum annealing machine, improving availability and fault tolerance.

[0050] 7 is a diagram showing a modified example, in which the signal of JPO3 can also be input to the spare port 25 in the configuration of FIG. 6. Referring to FIG. 7, switches 51D and 51C are arranged on the signal lines of the signal source 50D of the drive of JPO4 and the signal source 50C of the drive of JPO3, respectively. The first terminal of the switch 51D is connected to the signal source 50D of the drive of JPO4, and the second and third terminals are connected to the signal port 26D and the b terminal of the switch 52, respectively, and connects the signal source 50D of the drive of JPO4 to the signal port 26D or the b terminal of the switch 52 based on the control signal 61D from the control device 60. The first terminal of the switch 51C is connected to the signal source 50C of the drive of JPO3, and the second and third terminals are connected to the signal port 26C and the a terminal of the switch 52, respectively, and connects the signal source 50C of the drive of JPO3 to the signal port 26C or the a terminal of the switch 52 based on the control signal 61C from the control device 60.

[0051] Based on a control signal 62 from the control device 60, the switch 52 connects the terminal a or terminal b to the terminal c that is connected to the spare port 25. The switches 51C, 51D, and 52 may be configured as bidirectional switches. The signal source 50D for driving the JPO4 and the signal source 50C for driving the JPO3 may include a readout circuit (such as a spectrum analyzer) (not shown) and may monitor a reflected signal from the spare port 25 (a reflected signal of the signal input to the coupler 21) via the switch 52, the switch 51D, or the switch 51C.

[0052] FIG. 8 is a diagram showing a further modified example. In FIG. 8, the description of elements overlapping with FIG. 1 will be omitted. Referring to FIG. 8, in addition to the spare port 25-1 (corresponding to the spare port 25 in FIG. 4) that is capacitively coupled to the second electrode 16-2 of the coupler 21 via the capacitor 32-1, a spare port 25-2 that is capacitively coupled to the first electrode 16-1 of the coupler 21 via the capacitor 32-2 is provided. JPO1 (20A) and JPO2 (20B) are capacitively coupled to the first electrode 16-1 via the capacitors 31A and 31B, respectively, and the capacitor 32-2 is connected to the first electrode 16-1 in parallel with these capacitors 31A and 31B. In FIG. 8, the spare port 25-2 corresponds to a missing JPO1 (20A) or JPO2 (20B). In the event that JPO1 (20A) or JPO2 (20B) is lost due to a malfunction or the like, a signal (microwave) can be supplied from a signal source (not shown) to the spare port 25-2 to replace JPO1 (20A) or JPO2 (20B), and JPO2 (20B), JPO3 (20C), and JPO4 (20D) are effectively four-body coupled via the coupler 21, or JPO1 (20A), JPO3 (20C), and JPO4 (20D) are effectively four-body coupled.

[0053] FIG. 9 is a diagram showing a schematic example (non-limiting example) of the wiring pattern (layout) of the coupler 21 of FIG. 8 and its vicinity, and corresponds to FIG. 2. In FIG. 9, the same elements as those in FIG. 2 are given the same reference numerals, and the description thereof is omitted. Referring to FIG. 9, an end of the first spare port 25-1 faces the narrow (linear) ground 41a, and faces the lower side of the second electrode 16-2 of the coupler 21 through a gap 42. An end of the second spare port 25-2 faces the narrow (linear) ground 41b, and faces the upper side of the first electrode 16-1 of the coupler 21 through a gap 42. The first spare port 25-1 corresponds to the spare port 25 of FIG. 5, and the description thereof is referred to. Between the end of the second auxiliary port 25-2 and the upper side of the first electrode 16-1, there is a narrow (linear) ground 41b flush with the edge of the ground surface 41, but the ground 41b may be removed and the end of the second auxiliary port 25-2 may be an open end directly facing the upper side of the first electrode 16-1. Since signal transmission is performed by capacitive coupling between the end of the second auxiliary port 25 and the first electrode 16-1, the width of the gap 42 between the edges of the ground surface 41 (GND) on both sides of the second auxiliary port 25-2 and the upper side of the first electrode 16-1 is narrower than the width of the gap 42 between the edges of the ground surface 41 (GND) and the upper side of the first electrode 16-1 in FIG. 2.

[0054] Figure 10 is a diagram showing an example of the configuration shown in Figure 8. A signal source 50B of the drive of JPO2 is connected to the signal port 26B or the spare port 25-2 via a switch 51B (single-throw bipole switch) arranged on the signal line 28B. A signal source 50D of the drive of JPO4 is connected to the signal port 26D or the spare port 25-1 via a switch 51D (single-throw bipole switch) arranged on the signal line 28D.

[0055] The signal paths of the switches 51B and 51D are switched by control signals 61B and 61D from the control device 60. The spare port 25-2 is capacitively coupled to the first electrode 16-1 of the coupler 21 via the capacitor 32-2. The switch 51-1 connects the signal source 50B of the drive of the JPO2 to the signal port 26B side when the JPO2 (20B) is in normal operation, and connects the signal source 50B of the drive of the JPO2 to the spare port 25-2 when the JPO2 (20B) is missing. The switch 51D is the same as the switch 51D in Fig. 6, so a description thereof will be omitted.

[0056] In addition, in FIG. 10, similar to FIG. 6, the signal supplied to the spare port 25-1 may be supplied from either the signal source 50C for the drive of JPO3 or the signal source 50D for the drive of JPO4, and the signal supplied to the spare port 25-2 may be supplied from either the signal source 50A for the drive of JPO1 or the signal source 50B for the drive of JPO2.

[0057] Also, in FIG. 10, for JPO1 and JPO3, similar to JPO2 and JPO4, switches may be provided on the signal lines 28A and 28C of the signal source 50A for the drive of JPO1 and the signal source 50C for the drive of JPO3, respectively, so that in the event of a failure of JPO1 (20A) or JPO3 (20C), the signal source 50A for the drive of JPO1 and the signal source 50C for the drive of JPO3 are connected to individual spare ports.

[0058] In FIG. 3B, instead of using the physical bit (JPO) of the fixed bit "Fixed" at the bottom, the above-mentioned spare port may be provided and a signal may be supplied from the signal source to the spare port. In this case, the oscillation of the physical bit (JPO) of the fixed bit is not required (it is not necessary to send a signal to the pump line and signal line wired to the JPO). As a result, when it is possible to send a signal to the coupler as a substitute for the fixed bit while leaving the possibility of using it as a JPO, it is possible to reduce noise generation by stopping the oscillation of the JPO. In other words, by stopping the sending of a signal to the pump line and signal line connected to the JPO, crosstalk to other lines is reduced, and by stopping the oscillation of the JPO itself, the influence on other oscillators is reduced, and the probability of malfunction of the quantum circuit can be reduced.

[0059] The above-described embodiment is supplemented as follows (but is not limited to the following).

[0060] (Supplementary Note 1) A superconducting quantum circuit device has a coupler to which a plurality of quantum bits are coupled via respective coupled ports, and further includes spare ports that are spare coupled ports coupled to the couplers in addition to the coupled ports.

[0061] (Supplementary Note 2) The superconducting quantum circuit device of Supplementary Note 1 includes a switch for switching a connection destination of a signal source between the signal port of the quantum bit and the spare port.

[0062] (Appendix 3) In the superconducting quantum circuit device of appendix 1 or 2, the spare port is one or more spare ports are provided for one or more predetermined quantum bits among the plurality of quantum bits, One spare port is provided in common for adjacent pairs of quantum bits; The arrangement is one of the following.

[0063] (Supplementary Note 4) The superconducting quantum circuit device of Supplementary Note 1 or 2 comprises first to third switches, the first switch switches a connection destination of a first signal source to a signal port of one of the quantum bits or a first terminal of the third switch, the second switch switches a connection destination of a second signal source to a signal port of another quantum bit or a second terminal of the third switch, and the third switch connects the first terminal or the second terminal to a third terminal that is connected to the spare port.

[0064] (Supplementary Note 5) In the superconducting quantum circuit device of Supplementary Note 1 or 2, the coupler comprises a first electrode and a second electrode arranged opposite each other, and a nonlinear element bridging the first electrode and the second electrode, a first quantum bit and a second quantum bit are capacitively coupled to the first electrode via a first coupled port and a second coupled port, respectively, a third quantum bit and a fourth quantum bit are capacitively coupled to the second electrode via a third coupled port and a fourth coupled port, respectively, and the spare port is provided for at least one of the first to fourth quantum bits, capacitively coupled to the coupler.

[0065] (Supplementary Note 6) The superconducting quantum circuit device of Supplementary Note 5 is provided with a switch for switching a connection destination of a signal source for at least one of the first quantum bit and the second quantum bit, and at least one of the third quantum bit and the fourth quantum bit, to a signal port of the at least one quantum bit or the spare port.

[0066] (Supplementary Note 7) In the superconducting quantum circuit device of Supplementary Note 5 or 6, the nonlinear element comprises a Josephson junction or a superconducting quantum interference device (SQUID) including a plurality of Josephson junctions in a loop.

[0067] (Appendix 8) In any of the superconducting quantum circuit devices of appendices 1 to 7, a quantum annealing machine is provided that includes the coupler and four of the quantum bits coupled to the coupler as unit cells, and for the quantum bits of the unit cells, a signal from the spare port is supplied to the coupler instead of the quantum bits.

[0068] (Supplementary Note 9) In the superconducting quantum circuit device of Supplementary Note 8, for the quantum bit whose state is fixed to a constant value, a signal from the spare port is supplied to the coupler.

[0069] (Supplementary Note 10) In the superconducting quantum circuit device according to any one of Supplementary Notes 1 to 9, the quantum bit includes a Josephson Parametric Oscillator (JPO).

[0070] (Supplementary Note 11) In the superconducting quantum circuit device of any one of Supplementary Notes 1 to 8, the strength of the coupling between the another coupling port and the at least one quantum bit is smaller than or equal to the strength of the coupling between the at least one quantum bit and a signal port of the at least one quantum bit.

[0071] (Appendix 12) A method for controlling a superconducting quantum circuit includes the steps of: coupling a plurality of quantum bits to a coupler via respective coupling ports; and controlling a superconducting quantum circuit device further including spare ports, which are spare coupling ports coupled to the couplers, in addition to the coupling ports; A signal is provided to the spare port in place of the quantum bit.

[0072] The disclosures of the above-mentioned Non-Patent Documents 1 and 2 are incorporated herein by reference. Modifications and adjustments of the embodiments and examples are possible within the scope of the entire disclosure of the present invention (including the scope of the claims), and further based on the basic technical ideas. Furthermore, various combinations and selections of the various disclosed elements (including each element of each claim, each element of each example, each element of each drawing, etc.) are possible within the scope of the claims of the present invention. In other words, the present invention naturally includes various modifications and alterations that a person skilled in the art would be able to make in accordance with the entire disclosure including the scope of the claims and the technical ideas. [Explanation of symbols]

[0073] 1 Superconducting quantum circuits 10 Nonlinear elements 11 Josephson junction 15 Capacitor 16-1 First electrode 16-2 Second electrode 16A~16D Opposite part 20A~20D JPO(qubit) 21 Combiner 23A~23D Pump Line 24A~24D Coupler connection part 25, 25-1, 25-2 Reserve ports 26A~26D Signal port 27B~26D Magnetic field application section 28A~28D Signal Line 31A~31D Capacitor 32, 32-1, 32-2 Capacitor 41 Ground Plane 41a, 41b Ground (narrow (linear) ground) 42 Gap (surface of substrate) 50A~50D signal source 51B, 51C, 51D, 52 Switch 60 Control device 61B, 61C, 61D, 62 Control signal 201A~201D The first Josephson junction 202A~202D Second Josephson Junction 203A~203D First superconducting section 204A~204D Second superconducting section 206A~206D Capacitors 210A~210D SQUID

Claims

1. A superconducting quantum circuit device comprising: a coupler to which a plurality of quantum bits are coupled via respective coupled ports; and a spare port that is a spare coupled port that is coupled to the coupler, in addition to the coupled ports.

2. 2. The superconducting quantum circuit device according to claim 1, further comprising a switch for switching a connection destination of a signal source to a signal port or the spare port of the quantum bit.

3. The device includes first to third switches, the first switch switches a connection destination of a first signal source to a signal port of one of the quantum bits or a first terminal of the third switch; the second switch switches a connection destination of the second signal source to a signal port of another quantum bit or a second terminal of the third switch; 2. The superconducting quantum circuit device according to claim 1, wherein the third switch connects the first terminal or the second terminal to a third terminal that is connected to the spare port.

4. The coupler comprises: a first electrode and a second electrode arranged opposite to each other; a nonlinear element bridging the first electrode and the second electrode; Equipped with A first quantum bit and a second quantum bit are capacitively coupled to the first electrode via a first coupling port and a second coupling port, respectively; a third quantum bit and a fourth quantum bit are capacitively coupled to the second electrode via a third coupling port and a fourth coupling port, respectively; 2. The superconducting quantum circuit device according to claim 1, wherein the spare port is provided for capacitively coupling to the coupler for at least one of the first to fourth quantum bits.

5. At least one of the first quantum bit and the second quantum bit; For each of the third quantum bit and / or the fourth quantum bit, 5. The superconducting quantum circuit device according to claim 4, further comprising a switch for switching a connection destination of a signal source to the signal port of the at least one quantum bit or the spare port.

6. 5. The superconducting quantum circuit device of claim 4, wherein the nonlinear element comprises a Josephson junction or a Superconducting Quantum Interference Device (SQUID) including a plurality of Josephson junctions in a loop.

7. 2. The superconducting quantum circuit device according to claim 1, further comprising a quantum annealing machine including the coupler and four of the quantum bits coupled to the coupler as unit cells, wherein for the quantum bits of the unit cells, a signal from the spare port is supplied to the coupler instead of the quantum bits.

8. 8. The superconducting quantum circuit device according to claim 7, wherein for the quantum bit whose state is to be fixed to a constant value, a signal from the spare port is supplied to the coupler.

9. 9. The superconducting quantum circuit device according to claim 1, wherein the quantum bit includes a Josephson Parametric Oscillator (JPO).

10. A superconducting quantum circuit device in which a plurality of quantum bits are coupled to a coupler via respective coupling ports, and which further includes spare ports that are spare coupling ports coupled to the couplers in addition to the coupling ports, A method for controlling a superconducting quantum circuit, comprising: applying a signal to the spare port instead of the quantum bit.

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