Display device

Abstract

To provide a display device having small frame area.SOLUTION: The display device includes a first layer and a second layer. The first layer includes a source driver and a portion of a sensor. The second layer includes a gate driver, a plurality of pixels, and the remaining portion of the sensor. The plurality of pixels include a pixel in which a light-emitting element emits light, and a pixel having a function of the gate driver. A top face of the first layer includes: a first terminal connected to an opening in which the portion of the sensor is formed and the source driver; and a second terminal on a surface opposite a surface on which the pixel included in the second layer is arranged. The first terminal is electrically connected to the second terminal by being bonded together to form the sensor. Since an output signal of the source driver is directly supplied to wiring connected to the plurality of pixels through the first terminal, the source driver and the gate driver may not be provided at a periphery of a display area on which the plurality of pixels are provided.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] One embodiment of the present invention relates to a display device.

[0002] Note that one embodiment of the present invention is not limited to the above technical fields. The technical field relates to an article, a method, or a manufacturing method. is a process, machine, manufacture, or composition of matter. This concerns the issue of the

[0003] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. Therefore, it refers to semiconductor elements such as transistors and diodes, as well as semiconductor elements. The circuit including the semiconductor device is also used in display devices, light-emitting devices, lighting devices, electro-optical devices, and communication devices. The display device and electronic device may include semiconductor elements and semiconductor circuits. Also, semiconductor devices, light emitting devices, lighting devices, electro-optical devices, imaging devices, communication devices, and electronic devices are It is sometimes called a conductor device. [Background technology]

[0004] Smartphones, smartwatches (registered trademark), tablet devices, eyeglass-type displays or goggle-type displays (head-mounted displays). There are more and more opportunities for wearable electronic devices that are easy to carry and can be worn on the body. It's increasing.

[0005] Wearable electronic devices are becoming more and more popular due to the miniaturization of the housings of the electronic devices, the weight of the electronic devices, and For example, goggle-type displays are often This can improve the sense of realism by displaying information of a larger area, so a high-definition display device is required. In addition, if the electronic device is small and lightweight, the burden on the body when worn and This can reduce fatigue.

[0006] Electronic devices other than information terminals (e.g., in-vehicle electronic devices, household electrical appliances, housing, buildings IoT (Internet of Things) connects devices such as smartphones, tablets, and wearable devices to the Internet. With the development of information technology such as the Information and Communication Technology (ICT), the amount of data handled by electronic devices is increasing. In addition, there is a demand for improved communication speeds in electronic devices such as information terminals.

[0007] To realize IoT, the number of electronic devices connected to the Internet will increase, It is necessary to increase the number of electronic devices that can be connected at the same time. Because the device is connected to the internet, a communication time lag (or delay) occurs. Therefore, in order to accommodate various information technologies including IoT, communication speeds faster than 4G, The fifth generation mobile communication system (5G) will realize many simultaneous connections and short latency. New communication standards are being considered for 5G, such as the 3.7 GHz band and the 4.5 GHz band. Communication frequencies in the 28 GHz and 30 GHz bands are used.

[0008] In Patent Document 1, the pixel includes a part of the gate driver circuit, so that the layout of the gate driver is A display device that can reduce area is disclosed. [Prior art documents] [Patent documents]

[0009] [Patent Document 1] International Publication No. 2014-069529 Summary of the Invention [Problem to be solved by the invention]

[0010] Wearable electronic devices use display devices of various shapes depending on the purpose. Therefore, the electronic device is not limited to a shape surrounded by opposite sides, but may be, for example, a circle, an ellipse, or the like. It must also accommodate display devices with shapes other than those bounded by opposite sides, such as triangles. In addition, when the electronic device is worn for a long time, it becomes difficult to wear the electronic device due to its large size and weight. There is an issue that the burden on the body is large and fatigue increases. In this case, there is a problem that power consumption increases and the housing of the electronic device becomes larger.

[0011] In addition, electronic devices that are connected to networks using 5G, including IoT, are highly portable. When communicating using 5G, different frequencies are used. There is a problem in that an antenna must be provided for transmitting and receiving using several bands.

[0012] An object of one embodiment of the present invention is to provide a display device or the like having a novel structure. Another object of the present invention is to provide a display device having a display area of ​​any shape. Another object of the present invention is to provide a display device or the like having a configuration suitable for miniaturization. It is an object of the present invention to provide a display device or the like with high productivity.

[0013] Another object of one embodiment of the present invention is to provide an electronic device or the like having a novel structure. Alternatively, a display device having a display area that is not limited to a shape surrounded by opposite sides may be provided. It is one of the objects to provide an electronic device having a structure suitable for miniaturization. One of the objectives is to provide an electronic device having a display device. It is an object of the present invention to provide an electronic device or the like having a good display device.

[0014] The description of these problems does not preclude the existence of other problems. An embodiment does not necessarily solve all of these problems. Problems other than these may be solved by the description. The contents of the specification, drawings, claims, etc. are self-evident. It is possible to extract other issues from the descriptions in paragraphs etc. [Means for solving the problem]

[0015] One embodiment of the present invention is a display device having a first layer and a second layer. The first layer is The second layer includes a gate driver and a first element of the sensor. The pixel includes a light emitting element, a plurality of pixels, and a second element of the sensor. The sensor is formed in an area overlapping with the source driver. and a first terminal. A first element of the sensor is disposed in the opening. The first terminal The first surface of the second layer is electrically connected to a source driver. A second terminal is provided on a second surface opposite to the first surface. The second terminal is electrically connected to the pixel. The first terminal is electrically connected to the second terminal, and an output signal of the source driver is can be supplied to a wiring to which a plurality of pixels are connected via the first terminal. A source driver and a gate driver are provided on the periphery of a display area in which a plurality of pixels are provided. The display device does not need to be provided with a sensor. ro Mechanical Systems).

[0016] Another embodiment of the present invention is a display device having a first layer and a second layer. The first layer includes a source driver. The second layer includes a gate driver, a plurality of pixels, and an antenna. Either one or both of the gate driver and the plurality of pixels are provided with an antenna. The first layer has a first terminal and a third terminal. The terminal is electrically connected to a source driver. The first surface of the second layer is provided with pixels. A second terminal is provided on a second surface opposite to the first surface. The second terminal is connected to the pixel and The first terminal is electrically connected to the second terminal. The third terminal is The output signal of the source driver is electrically connected to the end of the antenna through the first terminal. It can be supplied to wiring to which a plurality of pixels are connected.

[0017] In each of the above configurations, the second layer has a larger area than the first layer, and the second layer It is preferred that it has an area of ​​overlap with the first layer.

[0018] The pixel includes a first pixel and a second pixel. The first pixel and the second pixel are Each of the first and second pixels has a light emitting element. The second pixel further has a gate driver element. It is preferable that the light-emitting element has an organic material. Alternatively, the light-emitting element may be an LED ( light emitting diode), or micro LED. It is.

[0019] In each of the above configurations, the first terminal is electrically connected to the second terminal via a conductive bump. It is preferred that the two are electrically connected to each other.

[0020] Another embodiment of the present invention that is different from the above is a display device having a first layer and a second layer. The first layer includes a first transistor and a first element of the sensor. The layer includes a second transistor, a light-emitting element, and a second element of the sensor. The first layer has an opening and a first transistor. A first terminal is provided in the aperture. A first element of the sensor is provided in the aperture. The first terminal is The second layer is electrically connected to the first transistor. A light emitting element is provided on the first surface of the second layer. A second terminal of the second transistor is provided on a second surface opposite the first surface. The first terminal is electrically connected to the second terminal.

[0021] In the above structure, the semiconductor layer of the second transistor preferably contains metal oxide. stomach. The second transistor preferably has a back gate. Effect of the Invention

[0022] One embodiment of the present invention can provide a display device or the like having a novel structure. It is possible to provide a display device having a display area that is not limited to a shape surrounded by overlapping sides. Alternatively, it is possible to provide a display device having a configuration suitable for miniaturization. It is possible to provide a display device or the like with good productivity.

[0023] Alternatively, one embodiment of the present invention can provide an electronic device or the like with a novel structure. The present invention relates to an electronic device having a display device with a display area that is not limited to a shape bounded by opposite sides. It is possible to provide an electronic device having a display device that is suitable for miniaturization. Alternatively, it is possible to provide an electronic device having a display device with good productivity. etc. can be provided.

[0024] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have all of these effects. Effects other than these are described in the specification. The above will become apparent from the description, drawings, claims, etc. From the above description, it is possible to extract other effects. [Brief description of the drawings]

[0025] [Figure 1] FIG. 1 is a diagram illustrating an electronic device. [Diagram 2] 2A to 2D are diagrams illustrating a display device. [Diagram 3] FIG. 3 is a circuit diagram illustrating the display device. [Figure 4] 4A and 4B are diagrams illustrating a display device. [Diagram 5] 5A and 5B are diagrams illustrating a display device. [Figure 6] 6A and 6B are diagrams illustrating the sensor. [Figure 7] FIG. 7 is a block diagram illustrating the gate driver. [Figure 8] 8A is a block diagram illustrating a gate driver, and FIG 8B is a circuit diagram illustrating the gate driver. [Figure 9] 9A to 9D are circuit diagrams illustrating pixels. [Figure 10] 10A and 10B are diagrams illustrating a display device. [Figure 11] FIG. 11 is a diagram illustrating an antenna. [Figure 12] FIG. 12 is a diagram illustrating an example of the configuration of a wireless transceiver. [Figure 13] FIG. 13 is a diagram illustrating an example of the configuration of a wireless transceiver. [Figure 14] 14A and 14B are diagrams showing configuration examples of transistors. [Figure 15] 15A to 15C are diagrams showing configuration examples of transistors. [Figure 16] 16A to 16C are diagrams showing configuration examples of transistors. [Figure 17] Fig. 17A is a diagram for explaining the classification of IGZO crystal structures, Fig. 17B is a diagram for explaining the XRD spectrum of a CAAC-IGZO film, and Fig. 17C is a diagram for explaining the ultrafine electron beam diffraction pattern of a CAAC-IGZO film. [Figure 18] 18A to 18D are diagrams showing an example of an electronic device. [Figure 19] 19A to 19D are diagrams showing an example of an electronic device. [Figure 20] 20A to 20F are diagrams showing an example of an electronic device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0026] The embodiment will be described in detail with reference to the drawings. However, the present invention is not limited to the following description. The present invention is not limited to the above embodiment, and various modifications and variations in form and detail may be made without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that the present invention may be modified in various ways. The present invention is not limited to the description of the embodiment. In the drawings, the same reference numerals are used to designate the same parts or parts having similar functions. and the repeated explanation will be omitted.

[0027] In addition, the position, size, range, etc. of each component shown in the drawings are not necessarily intended to facilitate understanding of the invention. Therefore, the actual location, size, range, etc. may not be shown. The present invention is not necessarily limited to the position, size, range, etc. disclosed in the drawings. For example, in the actual manufacturing process, a resist mask may be unintentionally damaged by etching or other processes. However, in order to make it easier to understand, this may not be reflected in the diagram.

[0028] In addition, in top views (also called "plan views") and perspective views, etc., the drawings are made easier to understand. For this reason, descriptions of some of the components may be omitted.

[0029] In addition, the terms "electrode" and "wiring" used in this specification and the like refer to these components functionally. This is not intended to be limiting. For example, an "electrode" may be used as a part of a "wire." , and vice versa. Furthermore, the terms "electrode" and "wiring" may be used interchangeably to refer to the plural "electrodes" and "wirings." This also includes cases where the wiring is formed integrally.

[0030] In this specification, the resistance value of a "resistor" may be determined by the length of the wiring. Alternatively, the resistance value may be determined by connecting a conductive layer having a different resistivity from the conductive layer used in the wiring. Alternatively, the resistance value can be determined by doping impurities into the semiconductor layer. In some cases, the following may be decided.

[0031] In this specification, a "terminal" in an electric circuit means a terminal for inputting or outputting a current, It refers to the part where voltage is input or output, or where a signal is received or transmitted. In some cases, a part of the wiring or electrode may function as a terminal.

[0032] In this specification, the terms "upper", "upper", "lower" and "lower" refer to the configuration. The positional relationship of the elements does not have to be directly above or below and directly adjacent to each other. For example, if you say "electrode B on insulating layer A," it means that electrode B is directly on insulating layer A. It is not necessary that the insulating layer A and the electrode B are formed of a metal, and other components are not included between the insulating layer A and the electrode B. Also, if the expression is "conductive layer D above conductive layer C," it means that conductive layer D is on top of conductive layer C. It is not necessary that the conductive layer C and the conductive layer D are formed in direct contact with each other, and other components may be included between the conductive layer C and the conductive layer D. In addition, "above" and "below" do not exclude cases where the item is arranged diagonally. This does not exclude cases where

[0033] In addition, the source and drain functions may be different in some cases, such as when transistors of different polarities are used. When the direction of the current changes during circuit operation, they may be interchanged depending on the operating conditions. Therefore, it is difficult to determine which is the source and which is the drain. In this specification, the terms source and drain can be used interchangeably. It shall be so.

[0034] In addition, in this specification, "electrical connection" refers to a direct connection and a connection without any This includes cases where the device is connected via "something that has an electrical effect." "Something with an electrical function" means something that enables the transmission and reception of electrical signals between connected objects. Therefore, even if it is expressed as "electrically connecting", In real circuits, there are cases where there are no physical connections and only wiring is extended. In addition, "direct connection" refers to wiring formed by different conductive layers that is connected via contacts. This includes cases where the two are connected together and function as a single wiring.

[0035] In this specification, "parallel" means that, for example, two straight lines are at an angle of -10° to 10°. This means that the angle between the two objects is between -5° and 5°. In addition, "perpendicular" and "orthogonal" mean, for example, that the angle between two straight lines is between 80° and 100°. Therefore, this includes cases where the angle is between 85° and 95°.

[0036] In this specification and elsewhere, the terms "same," "the same," "etc.", and the like are used to refer to counts and measurements. When we say "even" or "uniform," we mean plus or minus 2 unless otherwise specified. It is assumed that there is a 0% margin of error.

[0037] Also, a voltage is a potential between a certain potential and a reference potential (for example, a ground potential or a source potential). Therefore, voltage and potential can be used interchangeably. In this specification and the like, unless otherwise specified, voltage and potential can be interchanged. This shall be the case.

[0038] Even if a material is described as a "semiconductor," it may be considered an "insulator" if, for example, its electrical conductivity is sufficiently low. Therefore, it is possible to use the word "semiconductor" as an "insulator." In this case, the boundary between "semiconductor" and "insulator" is unclear, and it is difficult to make a strict distinction between the two. Therefore, the terms "semiconductor" and "insulator" in this specification can be read interchangeably. It may be possible.

[0039] In addition, even if a material is written as a "semiconductor," if the material has a sufficiently high electrical conductivity, it may be written as a "conductor." Therefore, it is possible to use "semiconductor" as "conductor". In this case, the boundary between "semiconductor" and "conductor" is vague, and it is difficult to make a strict distinction between the two. Therefore, the terms "semiconductor" and "conductor" in this specification may be read interchangeably. It may be possible.

[0040] In this specification, ordinal numbers such as "first" and "second" are used to avoid confusion of components. The names are given for the purpose of illustrating the order or sequence of steps, stacking, etc. In addition, even if a term is not designated by an ordinal number in this specification, it is not considered to be a mismatch of constituent elements. In order to avoid confusion, ordinal numbers may be used in the claims. Even if a term has an ordinal number in the above, a different ordinal number may be used in the claims. In addition, even if a term is accompanied by an ordinal number in this specification, In some cases, ordinal numbers may be omitted in the claims, etc.

[0041] In this specification, the "on state" of a transistor refers to the state in which the source This refers to a state in which the drain and the transistor can be considered to be electrically shorted (also called the "conducting state"). The "off state" of a transistor means that the source and drain of the transistor are electrically isolated. This refers to a state in which a circuit can be considered to be disconnected (also called a "non-conducting state").

[0042] In this specification, the term "on-state current" refers to the current that flows through the source when a transistor is in an on-state. The off-state current is the current that flows between the drain and the gate of a transistor. It may refer to the current that flows between the source and drain when in the off state.

[0043] In addition, in this specification, a high power supply voltage VDD (hereinafter, simply referred to as "VDD", "H voltage", or "H") refers to the low power supply voltage VSS (hereinafter simply referred to as "VSS", "L voltage", VSS is a power supply voltage that is higher than VDD. It also refers to the power supply voltage that is lower than the ground voltage (hereafter simply referred to as "GND" or "GN The VDD voltage (also called the “power supply voltage”) can be used as VDD or VSS. For example, if VDD is In the case of earth voltage, VSS is a voltage lower than the ground voltage, and in the case of VSS is earth voltage, , VDD is a voltage higher than the ground voltage.

[0044] In this specification, the term "gate" refers to a gate electrode and a part or whole of a gate wiring. The gate wiring is a part that is connected to the gate electrode of at least one transistor and another This refers to wiring for electrically connecting electrodes or other wiring.

[0045] In this specification, the source includes a source region, a source electrode, and a source wiring. The source region is a part or the whole of the semiconductor layer with a resistivity below a certain value. The source electrode refers to the conductive layer connected to the source region. The source wiring is a wiring that connects the source electrode of at least one transistor to another electrode or another wiring. This refers to wiring that electrically connects lines.

[0046] In this specification, the term "drain" refers to a drain region, a drain electrode, and a drain The drain region is a part or the whole of the in-wiring. The drain electrode is the conductive part connected to the drain region. The drain wiring is a layer that is connected to the drain electrode of at least one transistor. The term "electrode" refers to wiring for electrically connecting another electrode or another wiring.

[0047] In addition, in drawings, etc., the voltages of wiring and electrodes are shown in order to make them easier to understand. When "H" indicating H voltage or "L" indicating L voltage is added next to an electrode, etc. In addition, wiring and electrodes where a voltage change occurs are marked with "H" or "L" in brackets. When a transistor is in an off state, the transistor An "x" symbol may be added over the

[0048] (Embodiment 1) A display device according to one embodiment of the present invention will be described with reference to the drawings. 1 is a diagram illustrating the configuration of a display device 10 included in the device 10.

[0049] Note that the configuration of the display device exemplified in this specification is an example, and it is not necessary to include all of the components. The display device may include any necessary components among those shown in this specification. In addition, the device may have components other than those shown in this specification.

[0050] The electronic device 100 includes, for example, a display device 10, a substrate 100A, an FPC 100B, and The display device 10 includes a FP via bumps 101A, for example. C100B. The FPC 100B is controlled via bumps 101B. Therefore, the display device 10 is electrically connected to the control device 100C via the FPC 100B. The control device 100C is electrically connected thereto.

[0051] In one embodiment of the present invention, the display device 10 includes a layer L1 and a layer L2. The layer L1 has a gate driver and a part of the sensor Sen, and the layer L2 has a gate driver and a plurality of pixels. The plurality of pixels include a first pixel, a second pixel, and a remaining part of the sensor Sen. The first pixel and the second pixel have a light-emitting element. The second pixel has The second pixel further has a part of the function of a gate driver. The combination of these elements realizes the function of the gate driver. In other words, the gate driver The second pixel is configured by a plurality of second pixels. The second pixel is described in detail in FIG. In addition, the layer L1 has an opening in which a part of the sensor Sen is formed, and a source drain. A first terminal to be connected to a driver is provided on the back side of the surface of the layer L2 on which the pixels are arranged. A second terminal is provided.

[0052] The first terminal is electrically connected to the second terminal by being bonded to the sensor S The first terminal is connected to the substrate via a conductive bump (hereinafter, referred to as a bump). The first terminal and the second terminal may be electrically connected to each other via a bump. This process of directly joining the plates is called InFO (Integrated Fan-Out wafer). This is sometimes called the "first terminal and A direct bonding method for directly bonding the first terminal to the second terminal can be used. When used, the first terminal and the second terminal are preferably a conductive film containing copper (Cu). Alternatively, either the first terminal or the second terminal is a conductive film containing tungsten (W). This is also fine.

[0053] The output signal of the source driver of the layer L1 is input to the multiplexer via the first terminal and the second terminal. In other words, the source driver is Therefore, the source driver is provided on the periphery of the display area. Alternatively, the gate driver may not be provided. This allows a wide display area to be secured. If the gate drivers are not located on the periphery of the display area, the display area is surrounded by opposite sides. Symmetrical shapes, straight and curved lines combined, symmetrical shapes, straight and curved lines combined Shapes that are not symmetrical, such as circles, ellipses, or triangles, do not have opposite sides. The gate driver or source can be used for a display area with a shape surrounded by sides (hereafter, a free shape). In particular, there is no need to provide an area for arranging a source driver or a gate driver. Since there is no need to consider the placement of the FPC that supplies signals to the driver, the display can be freely shaped. It is possible to provide a display device or electronic device having a region.

[0054] The substrate 100A has an area larger than the layer L2, and the layer L2 has an area larger than the layer L1. However, the substrate 100A may have an area as large as that of the layer L2. In addition, the layer L2 may have the same area as the layer L1. It is preferable that the layer L2 is disposed at a position where the layer L2 overlaps the layer L1. It is preferable that the display area 110 of the display device 10 is the same size as the layer L2. or preferably has an area smaller than layer L2.

[0055] The light-emitting element of the first pixel or the second pixel preferably contains an organic material. The light-emitting device having the device is an organic light-emitting device (OLED). Alternatively, a light-emitting device can be called a light-emitting device that uses inorganic materials. For example, an LED (light emitting diode) may be used as a display element having an inorganic substance. tting diode) or micro LED.

[0056] In addition, the first terminal is electrically connected to the second terminal, so that the first terminal does not overlap with the second terminal. As an example, the sensor Sen can be formed at a position other than the first end. A conductive layer containing the same elements as the first terminal forms part of the sensor Sen and has the same elements as the second terminal. It is preferable that the remaining part of the sensor Sen is formed by a conductive layer containing silicon. The sensor Sen is preferably a MEMS. The element contained in the first terminal or the second terminal is different from the element contained in the conductive film. It is possible.

[0057] As an example, the sensor Sen of the display device 10 is preferably an acceleration sensor. However, the sensor Sen is not limited to an acceleration sensor. For example, the sensor Sen may be configured as By changing the structure, it is possible to use pressure sensors, gyroscopes, or bolometer-type infrared sensors. Which functions can it have?

[0058] The substrate 100A has a function of protecting the display device. For example, the substrate 100A may be made of glass, The substrate 100A may be made of quartz, plastic, or the like. A flexible substrate is a substrate that can be bent. For example, plastics made of polycarbonate, polyarylate, and polyethersulfone are used. Also, polypropylene, polyester, polyvinyl fluoride, etc. Alternatively, a film made of polyvinyl chloride or the like, or an inorganic vapor deposition film, etc. may be used. .

[0059] 2A to 2D are diagrams illustrating the display device 10. For the sake of simplicity, the substrate 100A is not shown and its description is omitted. The size of the pixel Pix1 and the pixel Pix2 ( Gate driver GD, source driver SD, sensor A sensor Sen formed by the sensor Sen1 and the sensor Sen2, and an antenna A NT. In the case of the display device 10 having the pixel Pix2, In this case, the pixel Pix2 functions as a gate driver. In the case of 0, it is preferable that the gate driver GD exists independently.

[0060] Note that the layer L1 includes a first transistor, and the layer L2 includes a second transistor. The first semiconductor layer of the first transistor is a second semiconductor layer of the second transistor. It is preferable that the first semiconductor layer contains an element different from that of the conductor layer. For example, the first semiconductor layer contains silicon (S i), the second semiconductor layer contains oxygen and further contains indium (In), zinc (Zn ), gallium (Ga), or tin (Sn).

[0061] In other words, the second semiconductor layer includes an oxide semiconductor. The second semiconductor layer in which the transistor channel is formed is made of oxide, a type of metal oxide. Transistors containing oxide semiconductors (OS) are called "O The OS transistor is called an "OS-FET" or "OS-FET." It is known that the variation in electrical characteristics due to the change in temperature is small. Because the energy gap of the layers is large, the current value per 1 μm of channel width is several yA / μm. ) and can exhibit extremely low off-state current characteristics. It is preferable to apply the OS transistor to a memory device. This will be explained in detail in embodiment 3 or embodiment 4.

[0062] In addition, the off-state current of an OS transistor hardly increases even in a high-temperature environment. The off-state current hardly increases even in environments with temperatures between room temperature and 200°C. In addition, the on-state current of OS transistors is not easily reduced even under low temperature conditions. High withstand voltage. By using OS transistors as transistors that constitute a semiconductor device, This makes it possible to realize a semiconductor device that operates stably even in a hot environment and has good reliability.

[0063] In addition, the OS transistor is used in the back end (BEOL) that forms the wiring of the semiconductor device. It can be formed by using a sputtering method during the process of (of line). A display device 10 can be formed using transistors having transistor characteristics. In other words, by using OS transistors, SOC (System on chip) p) can be easily formed.

[0064] FIG. 2A is a diagram illustrating the configuration of the display device 10 illustrated in FIG. 1 as an example. Layer L1 includes a source driver SD and a sensor Sen1. Layer L2 includes pixels Pix1, Pix2 and a sensor Sen2. The sensor Sen2 overlaps with the sensor Sen1. The pixel Pix1 or pixel Pi The light-emitting element of x2 is preferably an OLED, an LED, or a micro LED. stomach.

[0065] Here, a display device 10 having a display area capable of performing high-definition display will be described. For example, the display device 10 can be applied to a head-mounted display. preferable.

[0066] The resolution of the pixels Pix formed on the layer L2 is determined by the manufacturing equipment used in the transistor manufacturing process. For example, the number of transistors that can be formed on a silicon substrate is determined by the processing resolution. The gate length is more than one order of magnitude shorter than the smallest gate length of a transistor that can be formed on a glass substrate. Therefore, a high-definition display area can be formed on a silicon substrate. It is preferable to form the

[0067] As an example, a pixel Pix1 and a pixel Pix2 having the function of a gate driver GD are The layer L2 is formed by forming each pixel on a silicon substrate and then peeling off the silicon substrate. The peeled silicon substrate is used again as a substrate for forming layer L2. Therefore, the substrate for forming the layer L2 can be reused. Costs can be reduced.

[0068] A layer L1 is then preferably formed on the silicon substrate. The layer L1 comprises at least The source driver SD converts digital signals to analog signals. In addition, the source driver SD A plurality of pixels are connected to the wiring provided in the display area. The wiring has a large capacitive load with added parasitic capacitance. The SD is required to have a high current supply capability to charge and discharge the capacitive load.

[0069] The source driver SD of the layer L1 is composed of a plurality of pixels of the layer L2. For example, a free-form display can be realized in an area smaller than the display area. When a layer L1 having the same size and shape as a layer L2 having a display area is processed into a chip, The number of pieces that can be taken from one silicon substrate is reduced, resulting in high material costs. The area of ​​the source driver SD in the layer L1 is larger than the area of ​​the display area in the layer L2. Therefore, the layer L1 is formed independently of the layer L2 and then bonded to the layer L2. This can reduce material costs.

[0070] Furthermore, the layer L1 can be provided with a sensor Sen1 above the source driver SD. Furthermore, the sensor Sen2 included in the layer L2 is disposed at a position overlapping the sensor Sen1. By bonding the layer L1 and the layer L2 together, the sensor Sen is composed of the sensor Sen1 and the sensor Sen 2. The sensor Sen is preferably a MEMS.

[0071] The sensor Sen will be described in detail in FIG. 6A and FIG. 6B. As an example, A case where the sensor Sen1 has first to third electrodes will be described. The sensor Sen1 has: A change in capacitance formed between the first electrode and the third electrode is detected, and a capacitance between the second electrode and the third electrode is detected. A change in capacitance between the third electrode and the layer L2 is detected. It is preferable that the sensor Sen2 is formed in the layer L2. , lateral motion or acceleration, as well as vertical motion, acceleration, or pressure such as pressing. can be detected.

[0072] FIG. 2B illustrates a display device 10A having a different configuration from the display device 10 illustrated in FIG. 2A. In the display device 10A, a gate driver GD and a source driver SD are arranged on a layer L1. The display device 10 is different from the display device 10 in that the layer L2 is formed by a plurality of pixels P ix1, and a sensor Sen2 is provided on the surface of the layer L2 opposite to the surface on which the pixel Pix1 is disposed. By electrically connecting the first terminal and the second terminal, the second terminal is positioned so as not to overlap with the first terminal. A sensor Sen is formed at the position.

[0073] FIG. 2C illustrates a display device 10B having a different configuration from the display device 10A illustrated in FIG. 2B. The display device 10B is different from the display device 10 in that the layer L1 has layers L1A and L1B. The layer L1A is formed with a source driver SD, and the layer L1B is formed with a The difference is that the gate driver GD and the sensor Sen1 are formed. Layer L1A contains a first transistor and layer L1B contains a second transistor. Therefore, the layer L1B is laminated with the layer L2, so that the first transistor and the second transistor The resistor has a layered structure.

[0074] FIG. 2D illustrates a display device 10C having a different configuration from the display device 10A illustrated in FIG. 2B. The display device 10C differs from the display device 10A in that it has an antenna ANT. In addition, the display device 10C has a layer L2 that includes a layer L2A and a layer L2B. The layer L2A is different from the device 10A. The layer L2A is provided with an antenna ANT, and the layer L2B is provided with The pixel Pix1 is formed in the layer L2B. The layer L2B has a second transistor. Preferably, a plurality of antennas ANT are formed in the antenna 1. Each antenna ANT is , electrically connected to a third terminal of the layer L1, the third terminal being of the same material as the first terminal. It is preferred that the compound contains an element.

[0075] FIG. 3 is a circuit diagram illustrating in detail the layer L2 of the display device 10. , a plurality of pixels 40, a plurality of pixels 40A, a plurality of pixels 40B, a plurality of wirings 45, a plurality of wirings The pixel 40 has a pixel electrode 46, a wiring 48, and a plurality of wirings 49. The pixel Pix2 corresponds to the pixel Pix1 described above, and the pixel Pix2 includes the gate driver GD function in a distributed manner. Therefore, the pixel 40A and the pixel 40B are preferably the same as those described in the display device 10. The gate driver GD corresponds to the pixel Pix2. This is explained in detail in FIG. 8B.

[0076] For example, each of the wirings 49 includes a plurality of pixels 40, 40A, and 40B. The pixel 40A is a circuit having a part of the function of the gate driver GD. Pixel 40D1 has a gate driver GD, and pixel 40B has a circuit 40D2 which is the remaining function of the gate driver GD. Therefore, the gate driver is provided by the circuit 40D1 and the circuit 40D2 connected to the wiring 49. In Figure 3, the function of one stage of the gate driver GD is The example shows that the gate driver GD is distributed to two pixels. The number of pixels is not limited. For example, the function of one stage of the gate driver GD is three or more pixels. The above-mentioned components can be distributed among the above-mentioned components.

[0077] First, the gate driver configured by the circuit 40D1 and the circuit 40D2 will be described. The circuit 40D1 has an input terminal LIN, an input terminal CK1, and an output terminal NDO. The circuit 40D2 has an input terminal CK2, an input terminal NDI, an output terminal FO, and an output terminal Has SROUT.

[0078] As an example, the wiring 48 is connected to at least the input terminal LIN, the input terminal CK1, or the input terminal The output terminal NDO is electrically connected to the input terminal NDI. The output terminal FO is electrically connected to the wiring 49(n-1). n-1) is electrically connected to pixel 40, pixel 40A, and pixel 40B. SROUT is a reference voltage of the circuit 40D1 in the pixel 40A that is electrically connected to the wiring 49(n). It is electrically connected to the input terminal LIN, where n is a positive integer.

[0079] The input terminal LIN, the input terminal CK1, and the input terminal CK2 are connected to the wiring 48 through the circuit 40D1 A signal for driving the circuit 40D2 is provided to the output terminal NDO. The output signal is input to the input terminal NDI of the circuit 40D2. The output signal given to the output terminal FO corresponds to a scanning signal in a display device. The output terminal SROUT is connected to the line 49(n) of the pixel 40A. A carry signal is provided to drive a circuit 40D1 which in turn carries a carry signal.

[0080] Next, the pixel 40, the pixel 40A, and the pixel 40B will be described. The pixel 40A and the pixel 40B have a light emitting element and control the intensity of the light emitted by the light emitting element. The pixel 40 will be described in detail with reference to Figures 9A to 9D.

[0081] Here, as an example, pixel 40(m, n) will be described. Pixel 40(m, n) , and are electrically connected to the wiring 45(m), the wiring 46(m), and the wiring 49(n). 45(m) is a layer L1 having a source driver SD and a first terminal and a second terminal. Image data is provided via the wiring 46(m). A reset signal is applied from D through the first terminal and the second terminal. (m, n) is the threshold voltage variation of the second transistor of pixel 40(m, n), or Wiring of monitor signals to monitor changes in the electrical characteristics of pixels, such as the amount of deterioration in the brightness of the optical element 46(m), where m is a positive integer.

[0082] The output terminal of the source driver SD is connected to the wiring 45 and the wiring 46 at a position within the display area. The display area includes the pixels 40 electrically connected to the wiring 45. The outside of the display area means an area where there are no pixels 40 electrically connected to the wiring 45. This means the right direction.

[0083] The source driver SD is arranged in a direction perpendicular to the wirings 45. Therefore, it is preferable that the source driver is connected to the wiring via the first terminal and the second terminal. When electrically connected to the wiring 45 or the wiring 46, the connection can be made over the shortest distance.

[0084] Also, a part of the wiring 48 may be routed outside the display area. The circuit 40D1 and the circuit 40D2 located at the ends of the display area are connected to the circuit 40D1 through the wiring 48. It is necessary to provide a control signal for driving the circuit 40D1 and the circuit 40D2. The control signal is provided from a timing controller in the layer L1. The controller is described in more detail in FIG. 4A.

[0085] 4A and 4B are diagrams illustrating the display device 10. FIG. 4A shows the display device 10. FIG. 4B is a schematic cross-sectional view of the display device 10. The explanation of the layer L2 can be taken into consideration in the explanation of FIG. 3. In the configuration of the invention described below, the same parts or parts having similar functions are referred to as the same parts. Reference numerals are used commonly among different drawings, and their explanations will be omitted.

[0086] FIG. 4A shows a layer L1 including a source driver 20A functioning as a source driver SD, a source The source driver 20A includes a driver 20B and a timing controller 30. The source driver 20B has a function of outputting image data. Furthermore, the source driver 20B has a function of monitoring changes in the electrical characteristics of the pixel 40. It has a monitor function.

[0087] As an example, the output terminal 20A1 of the source driver 20A includes a first terminal and a second terminal. The source driver 20B is electrically connected to the wiring 45(m) in the display area via the terminal. The output terminal 20B1 is connected to the wiring 46(m) in the display area via the first terminal and the second terminal. and electrically connected to the

[0088] The timing controller has an output terminal 30a connected to a first terminal and a second terminal. A part of the wiring 48 is disposed on the outer periphery of the display area. A part of the display area is electrically connected to a plurality of circuits 40D1 and a plurality of circuits 40D2. To be continued.

[0089] FIG. 4B is a schematic cross-sectional view of a portion of the display device 10. As an example, the layer L1 is a The layer L2 includes a source driver 20A and a source driver 20B, and the layer L2 includes pixels 40. In FIG. 4B, the pixel 40A and the pixel 40B are omitted. The element 40 includes, for example, a light emitting element 41, a transistor 42, a transistor 43, and a transistor The light emitting element 41 emits light in the direction of the substrate 100A. The pixel circuit of pixel 40 will be described in detail with reference to FIGS. 9A to 9D.

[0090] The source driver 20A in the layer L1 is connected to the source 57b via the plug 57b and the electrode 61b. The source driver 20B is electrically connected to the wiring 45 through a plug 57a and It is shown that the electrode 61a is electrically connected to the wiring 46. The plug 57b corresponds to a first terminal, and the electrode 61a and the electrode 61b correspond to a second terminal. Equivalent.

[0091] 5A and 5B are diagrams illustrating a display device 10 different from that shown in FIGS. 4A and 4B. FIG. 5A is a perspective view of the display device 10, and FIG. 4A and 4B are schematic cross-sectional views of the layer L2. Therefore, in the configuration of the invention described below, The same reference numerals are used in different drawings to indicate parts or parts having similar functions. The explanation will not be repeated.

[0092] FIG. 5A shows the display device 10 having the sensor 20C in the same manner as described in FIG. 4A and FIG. 4B. FIG. 5A illustrates that layer L1 has a sensor 20C1. The sensor 20C1 is sandwiched between the source driver 20A and the source driver 20B. However, the position at which the sensor 20C1 is disposed is not limited.

[0093] FIG. 5B is a schematic cross-sectional view of a portion of the display device 10. The layer L1 includes a sensor 20C. The layer L2 is provided with a sensor 20C1 that is a part of the structure. The sensor 20C is provided above the sensor 20C1. The sensor 20C is a MEMS that functions by being arranged on the sensor 20C2. and is explained in detail in FIG. 6B.

[0094] Furthermore, FIG. 5B shows bumps 59 (bumps 59a) for bonding the layers L1 and L2 together. and bumps 59b). In order to bond the layer L1 and the layer L2 together using the bumps 59, Between the layers L1 and L2, the height of the bumps 59 is provided between the sensors 20C1 and 20C2. A space is formed between the sensor 20C1 and the sensor 20C2. The space creates a capacitance component between the sensor 20C1 and the sensor 20C2. Therefore, the capacitance component is subjected to the acceleration in the same direction as the display direction of the display device. The sensor is suitable for detecting temperature or pressure.

[0095] 6A and 6B are diagrams illustrating the sensor 20C described in FIG. 5B in detail. The sensor 20C is constituted by electrodes 51a to 51c and an electrode 61c.

[0096] In addition, for example, a source driver 20A included in the layer L1 is provided around the sensor 20C. Alternatively, the source driver 20B is electrically connected to the wiring 45 and the wiring 46 of the layer L2. The bumps 59a and 59b are disposed on the layer L1. It is preferable to use a plurality of layers for electrical connection to layer L2.

[0097] FIG. 6A is a schematic cross-sectional view of the sensor 20C taken along the dashed line X1-X2. In the schematic diagram, the sensor 20C is illustrated as the center, so the source driver of the layer L1 20A, source driver 20B, pixels 40 of layer L2, etc. are not shown due to space on the page. Therefore, the source driver 20A is not provided below the plugs 55a to 55e. , the source driver 20B is electrically connected, and further, the plugs 63a to 63c The explanation will be continued on the assumption that the pixel 40 is electrically connected above.

[0098] First, the layer L1 will be described. The insulating layer 72 includes a plurality of conductive plugs 55a to 55c. An insulating layer 74 is formed on the insulating layer 72. The insulating layer 74 has an opening The sensor 20C1 is formed in the opening. When forming the openings for the plugs 57a and 57b, Then, a conductive film is formed to form plugs 57a and 57b and the opening. The mouth can be filled with a conductive film.

[0099] Next, CMP (Chemical Mechanical Polishing) The conductive film is polished and planarized using a static mechanical polishing (SMP) method until the insulating layer 74 is exposed. The conductive film formed on the mouth is processed by dry etching to form electrodes 51a to 51c. On the plug 57a and the plug 57b, a bump 59a and a bump 59b are formed. The plugs 55c to 55e are timing controllers formed in the layer L1. The timing controller is electrically connected to the The change in capacitance value of the capacitances (first capacitance and second capacitance) of the sensor 20C1 is detected. do.

[0100] By forming the electrodes 51a to 51c, a space 58 is formed in the sensor 20C1. The first capacitance is generated by a space 58 between the electrodes 51a and 51c. The second capacitance is a capacitance formed by a space 58 between the electrodes 51b and 51c. The third capacitance is a capacitance generated by the height of the bumps 59a and 59b. The space between the electrode 61c and the electrodes 51a to 51c is The third capacitance is a capacitance that is oriented in the same direction as the light emission direction of the light emitting element of the display device or The electrode 51a is suitable for detecting acceleration received from the opposite direction. The electrode 51b is electrically connected to the plug 55d. The electrode 51c is The electrode 61c is electrically connected to the plug 55e, and the electrode 61c is electrically connected to the plug 63c.

[0101] Next, the layer L2 will be described. The layer L2 has an electrode 61a on the back side of the surface on which the pixels are arranged, and an electrode In this state, the electrodes 61a, 61b, and 61c are exposed. The electrode 61c is formed by being embedded in the insulating film 76. An insulating film 78 is formed on the insulating film 76. In the insulating film 78, a plug 63a and a plug 63b are formed. The plug 63a is electrically connected to the electrode 61a, and the plug 63b is electrically connected to the electrode 61b. are electrically connected.

[0102] The bumps 59a and 59b are provided on the layer L1 for electrically connecting the layer L2. In other words, the bump 59a electrically connects the plug 57a and the electrode 61a. Next, the output signals of the source driver SD of the layer L1 are transmitted to the pixels of the layer L2. The bump 59b electrically connects the plug 57b and the electrode 61b. The output signals of the source driver SD of the layer L1 are applied to the pixels of the layer L2. It is possible to do so.

[0103] FIG. 6B is a diagram illustrating a cross section of the sensor 20 different from that shown in FIG. 6A. 1c is electrically connected to electrode 51c via bump 59c. It is preferable that the electrode 6 is electrically connected to the electrode 51c via a plurality of bumps 59c. 1c is electrically connected to the electrode 51c, so that the light emitted from the light-emitting element is also in the same direction as the light-emitting element. The distortion of the electrode 61c due to the acceleration from the opposite direction is transmitted to the electrode 51c. The change in capacitance of the first to third capacitors is detected as a change in capacitance of the first to third capacitors. Therefore, the display device 10 can detect the light received by the display device 10 in all directions without providing multiple acceleration sensors. It is possible to detect the acceleration from the

[0104] <Example of gate driver GD configuration> FIG. 7 shows a circuit 40D1 and a circuit 40D2 that are distributed in the pixel 40A and the pixel 40B. The gate driver GD is an n-channel transistor. The circuit 40D includes a plurality of circuits 40D each of which is configured by a transistor. The circuit 40D includes the circuit 40D1 and the circuit 40D2 described above. This will be explained in detail with reference to FIG. 8B.

[0105] The gate driver GD receives a signal SP via a line 48a and a signal line 48b to 48e. signals CLK[1] through CLK[4], a signal PWC through line 48f, and a signal A signal RES is given via 48g. A signal SP is a start pulse signal. A signal R ES is a reset signal, and by setting the signal RES to a high potential, the output of the circuit 40D is All of the signals can be set to low potential. The signal PWC is a pulse width control signal. The signal C has a function of controlling the pulse width of the signal output from the circuit 40D to the wiring 49. LK[1], signal CLK[2], signal CLK[3], and signal CLK[4] are clock signals. The circuit 40D includes, for example, two of the signals CLK[1] to CLK[4]. gives a signal.

[0106] For example, in the configuration shown in FIG. 7, the circuit 40D is electrically connected to another wiring. It can also be applied to the source driver SD.

[0107] FIG. 8A is a diagram illustrating a circuit 40D. The circuit 40D includes a circuit 40D1 and The circuit 40D has an input terminal LIN, an input terminal CK1, and an input terminal CK 2. The input terminal PWC, the input terminal RES, the output terminal FO, and the output terminal SROUT do.

[0108] The circuit 40D1 receives a signal SP or a signal from the preceding circuit 40D2 via an input terminal LIN. A carry signal is provided through an output terminal SROUT connected to the input terminal 40D1. A clock signal is applied via an input terminal CK1. The circuit 40D1 also has an input terminal R A reset signal is applied via ES. The circuit 40D1 has an output terminal NDO. The intermediate signal generated by the circuit 40D1 is output to the terminal NDO.

[0109] The circuit 40D2 has an input terminal NDI, and the input terminal NDI receives the signal generated by the circuit 40D1. The circuit 40D2 is provided with a clock signal via an input terminal CK2. A pulse width control signal is also applied to the circuit 40D2 via an input terminal PWC. The circuit 40D2 is connected to the input terminal of the next stage circuit 40D1 via the output terminal SROUT. The circuit 40D2 also outputs a carry signal to the output terminal LIN. A scan signal is provided on line 49.

[0110] FIG. 8B is a detailed circuit diagram of circuit 40D. Circuit 40D includes transistor 8. 1 to 91 and capacitors 94 to 96.

[0111] One of the source and drain of the transistor 81 is connected to the source and drain of the transistor 82. One of the inputs of the transistor 86 and one of the source or drain of the transistor 89. The gate of the transistor 82 is electrically connected to either the source or the drain of the transistor 82. One of the source or drain of the transistor 83 and one of the source or drain of the transistor 84 On the other hand, one of the source and drain of the transistor 85, the gate of the transistor 88, The transistor 91 is electrically connected to one electrode of the capacitor 94. The other of the source and drain of the capacitor 86 is connected to the gate of a transistor 87 and one of the capacitors 95. The other of the source and drain of the transistor 89 is electrically connected to The gate of the transistor 90 and one electrode of the capacitor 96 are electrically connected to each other. One of the source or drain of the transistor 90 is connected to one of the source or drain of the transistor 91. The output terminal FO is electrically connected to the wiring 49 via the other end of the capacitor 96 and the output terminal FO. do.

[0112] A signal LIN is input to the gate of the transistor 81 and the gate of the transistor 85. The signal CLK[3] is input to the gate of the transistor 83. A signal RES is input to the gate of transistor 4. A signal CLK[1] is input to the other of the source and drain of the transistor 90. The other of the source and drain of the transistor 87 is connected to the transistor A signal SRO is output from one of the source or drain of the transistor 88 and the other electrode of the capacitor 95. UT is output.

[0113] The other of the source or drain of the transistor 81 and the source or drain of the transistor 83 the other of the source or drain of transistor 84; the gate of transistor 86; The gate of the transistor 82 is supplied with a potential VDD. the other of the source or drain of transistor 85; the other of the source or drain of transistor the other of the source or drain of transistor 88, the other of the source or drain of transistor 91, and The other electrode of the capacitor 94 is supplied with a potential VSS.

[0114] The circuit 40D1 includes transistors 81 to 85 and a capacitor 94. The circuit 40D2 includes transistors 86 to 91, a capacitor 95, and a capacitor 96. One of the source or drain of the transistor 81 and the source or drain of the transistor 86 For the sake of explanation, the wiring electrically connected to one of the drains is called a node ND2. In addition, the gate of the transistor 82 and the gate of the transistor 88 are electrically connected to each other. The line is referred to as node ND3 for purposes of illustration.

[0115] The input terminal NDI is electrically connected to the output terminal NDO via the nodes ND2 and ND3. In FIG. 8B, the signal CLK[3] is applied to the input terminal CK1, and An example is shown in which the signal CLK[1] is provided to CK2.

[0116] <Example of pixel Pix configuration> 9A-9D are circuit diagrams illustrating pixel 40 in greater detail.

[0117] The pixel 40 in FIG. 9A includes a light emitting element 41, transistors 42 to 44, and a capacitance C One of the electrodes of the light-emitting element 41 is connected to one of the source and drain of the transistor 43. On the other hand, one of the source or drain of the transistor 44 and one of the electrodes of the capacitor C1 are electrically connected to each other. The gate of the transistor 43 is connected to the other electrode of the capacitor C1. The source or drain of transistor 42 is electrically connected to one of the source and drain of transistor 42. The other drain is electrically connected to a wiring 45. The other of the source and the drain of the transistor 43 is electrically connected to the wiring An The gate of the transistor 44 is electrically connected to the wiring 49b. The other of the source and the drain of the transistor 44 is electrically connected to a wiring 46. The other electrode of the light emitting element 41 is electrically connected to the wiring Cath.

[0118] Transistors 42 to 44 are preferably OS transistors. However, the transistors 42 to 44 are not limited to OS transistors. For example, the semiconductor layer can be made of silicon. Crystalline silicon, Low Temperature Polysilicon (LTPS) y-Silicon, or single crystal silicon can be used.

[0119] In FIG. 9B, the pixel 40 has a transistor different from that in FIG. 9A. Each of the transistors 42 to 44 has a back gate. The gate and the back gate are disposed so as to sandwich the channel forming region of the second semiconductor layer. The back gate can be made to function like a gate. Also, the back gate voltage can be changed By changing the back gate, the threshold voltage of the transistor can be changed. The voltage may be the same as that of the gate, or may be GND or any other voltage.

[0120] In addition, since the gate and back gate are generally formed of a conductive layer, the outside of the transistor The function of preventing the electric field generated by the electrostatic discharge from acting on the semiconductor layer in which the channel is formed (especially the electrostatic discharge In other words, it has the function of blocking static electricity and other external electric fields. Fluctuations in the electrical characteristics of the transistor can be prevented.

[0121] FIG. 9C is a diagram illustrating a pixel 40 different from that in FIG. 9A. 9A in that it has a capacitor 42a and a capacitance C2. In the configuration of the present invention, the same parts as those in FIG. 9A or parts having similar functions are denoted by the same reference numerals. are commonly used and their explanation will be omitted.

[0122] The gate of the transistor 42a is electrically connected to the wiring 49b. One of the source and the drain of the transistor 42a is electrically connected to the wiring 45b. The other of the source and drain of a is electrically connected to one of the electrodes of the capacitance C2. The other of the two electrodes is electrically connected to the gate of the transistor 43 .

[0123] The voltage applied to the gate of transistor 43 is the voltage applied to capacitance C1 and capacitance C 2. Therefore, the output of the source driver A voltage value larger than the maximum voltage can be applied to the pixel as image data.

[0124] The pixel 40 described in FIG. 9C provides the first image data to the capacitance C1 and the second image data to the capacitance C2. The second image data is then subjected to a capacitive coupling operation to generate third image data. This is because an OS transistor with a small off-state current is used as a selection switch. This can be achieved by using the pixel as a computation function, as shown in pixel 40. This can be called Pixel AI technology.

[0125] FIG. 9D is a diagram illustrating a pixel 40 having a liquid crystal element. The gate of the transistor 42 is connected to the wiring 49a. One of the source and the drain of the transistor 42 is electrically connected to the wiring 45. The other of the source and drain of the transistor 42 is electrically connected to the electrode of the capacitor C1. The other electrode of the capacitor C1 is electrically connected to the wiring The other electrode of the liquid crystal element LC is electrically connected to the wiring Com. The other electrode of the capacitor C1 may be electrically connected to the wiring Com.

[0126] In addition, the Pixel AI technology can be applied to the pixel 40 in FIG. 9D, the pixel 40 is provided with a transistor 42a and a capacitor C2. AI technology can be applied.

[0127] For example, it will be installed in wearable electronic devices such as head-mounted displays. In the case of display devices, there is a demand for display devices that are small, lightweight, and capable of displaying high-definition images. In addition, the position or direction of the head is changed while wearing the head-mounted display. Therefore, the display information needs to change accordingly. By providing the acceleration sensors at different positions, This improves the tracking of the display contents compared to the updated display data.

[0128] Therefore, below the L2 layer, which has a free-form display area, there is a source driver, etc. By bonding the layer L1, a display device of any shape can be provided. The display device 10 includes an acceleration sensor, thereby providing a display device with a novel configuration. Alternatively, since the display device includes MEMS as a component, it is possible to manufacture the display device with good productivity. As described above, the display device 10 includes pixels, gate electrodes, and It contains drivers, source drivers, and MEMS as components, making it suitable for use in electronic devices. In addition, the number of components required can be reduced by using capacitive coupling. A voltage larger than the maximum output voltage can be applied to the pixel as image data. As a result, an electronic device having the display device 10 can reduce power consumption.

[0129] The configuration, structure, method, etc. described in this embodiment may be the same as the configuration, structure, method, etc. described in other embodiments. It can be used in appropriate combination with the above methods.

[0130] (Embodiment 2) A display device according to one embodiment of the present invention will be described with reference to the drawings. 0B is a diagram illustrating a configuration of a display device 10 different from that of the first embodiment. In the configuration of the invention to be described, the same parts as those in the first embodiment or parts having similar functions The same reference numerals are used in common between different drawings, and the repeated explanations will be omitted.

[0131] In the display device 10 described in FIG. 10A, the layer L1 further includes a plurality of transmitting / receiving devices. The difference from FIG. 5A is that L2A has multiple antenna regions. In the antenna region, the electrodes 61a and 61b are exposed on the back surface of the surface on which the pixels are arranged. Preferably, the antenna area is provided with a plurality of antennas.

[0132] As an example, the antenna area may be a plurality of antenna areas ANT1 and a plurality of antenna areas A The frequency band in which the antenna region ANT1 transmits and receives is 2 is the same as or different from the frequency band used for transmitting and receiving.

[0133] For example, the antenna and the transceiver 20D1 in the antenna area ANT1 are in an overlapping position. It is preferable that the antenna and the transceiver 20D in the antenna area ANT1 are arranged in the same manner as in the embodiment. 1 is electrically connected to an amplifier circuit of the transmitting / receiving device 20D1 at the shortest distance. In addition, the antenna and the transmitting / receiving device 20D2 in the antenna area ANT2 are preferably It is preferable that the amplifier circuit of the transmitting / receiving device 20D2 is electrically connected to the transmitting / receiving device 20D2 at a distance of .

[0134] For example, the length of the wiring connecting the antenna and the amplifier circuit is It is preferable that the length of the wiring connecting the amplifier circuit and the sensor is the same as that of the wiring connecting the amplifier circuit and the sensor. The length of the wiring electrically connecting each antenna and the amplifier circuit should be the same. This suppresses the variation in transmitted and received signals that changes depending on the length of the wiring.

[0135] As a different example, the length of the wiring electrically connecting each antenna and the amplifier circuit is By intentionally making the lengths different, it is possible to widen the frequency band that can be received. Since the impedance components of the wiring differ depending on the length, the wiring is filtered. It can function as part of

[0136] FIG. 10B is a schematic cross-sectional view of a portion of the display device 10. A layer L1 includes a transceiver device. Further, the layer L2A is provided with an electrode 61d that functions as an antenna. 5B in that the electrode 61d is disposed in a position different from that in FIG.

[0137] Furthermore, between the layer L1 and the layer L2A, there are bumps 59 (bumps The electrode 61d is connected to the plug 57c via the bump 59c. The plug 57c is electrically connected to the transmitting / receiving device 20D. By bonding the layer L1 and the layer L2A together using the bump 59, A space is formed by the height of the bump 59. The space is filled by the insulating film in contact with the electrode 61d. The area of ​​the insulating film that contacts the electrode 61d that functions as an antenna is reduced. The membrane acts as a dielectric when transmitting and receiving through the antenna. The presence of a large number of dielectric materials in contact with 61d adds proportionally to the capacitive impedance. Therefore, when designing the electrode 61d, the target frequency and the dielectric constant of the insulating film are taken into consideration. It is preferable to take the dielectric constant into consideration when designing.

[0138] In FIG. 10B, the layer L1 is electrically connected to the layers L2A and L2B via bumps 59. However, as a different example, the layer L1 is connected to the layers L2A and L2B without the bump 59. As an example, the plug 57a in the layer L1 and the layer L2A and The electrode 61a of the layer L2B is preferably a conductive film containing copper (Cu). Alternatively, either plug 57a or electrode 61a may be made of tungsten (W).

[0139] FIG. 11 is a diagram for explaining the antenna described in FIG. 10B in detail. The upper part of FIG. FIG. 2 is a top view illustrating the antenna region ANT1 and the antenna region ANT2. In the antenna region ANT2, the electrodes 61d functioning as a plurality of antennas are provided. We will explain about this.

[0140] For example, when communicating using 5G, 3.7GHz, 4.5GHz, or 28GHz For example, the antenna area ANT When the electrode 61d functions as an antenna in the second embodiment, communication is performed using 28 GHz. I will explain about this.

[0141] The electrode 61d of the antenna region ANT2 is a patch antenna (microstrip This section explains the case where the antenna is composed of a 10-GHz band antenna (a 10-GHz band antenna or a 10-GHz band antenna). A patch antenna is a device that is made by arranging multiple square conductive films in an array. The distance d between the electrodes 61d is determined according to the frequency band to be transmitted and received. For example, when the frequency band is 28 GHz, the distance d1 is about 5 mm. This can be calculated using the following formula 1.

[0142] Distance d [m] = (speed of light [m / s] / frequency band [s -1 ]) / twenty one)

[0143] The length of one side of the electrode 61d functioning as an antenna is set to be equal to the length of the insulating film in contact with the antenna. The relative dielectric constant has an effect. For example, the length of one side of the electrode 61d can be calculated using the following formula 2. can be done.

[0144] Length of one side [m] = distance d [m] / √ relative dielectric constant (2)

[0145] For example, if the relative dielectric constant of a silicon dioxide film, a typical insulating film, is 3.9, The length of one side of 61d is approximately 2.5 mm. However, the distance d and the length of one side are It is preferable to change the value appropriately depending on the frequency band to be received and the relative dielectric constant of the area in contact with the antenna. For example, the antenna region ANT1 has electrodes 61e that function as multiple antennas. As shown in FIG. 11, the distance d2 between the electrodes 61e is greater than the distance d1. The frequency band in which the electrode 61e of the antenna region ANT1 transmits and receives is at least 28 GHz. means less than z.

[0146] In other words, the antenna areas for transmitting and receiving signals in different frequency bands are adjacent to each other or alternately. By placing them together, it is possible to transmit and receive signals in different frequency bands. In some cases, the frequency band used may be switched depending on the situation in which the electronic device is placed. For example, antenna areas that transmit and receive different frequency bands can be arranged alternately to target Only the antenna area corresponding to the frequency band of interest transmits and receives signals, and the frequency bands not of interest The antenna area is inactive, improving the signal-to-noise ratio.

[0147] The lower part of FIG. 11 illustrates a schematic cross-sectional view of the electrode 61d taken along the dashed line X1-X2 in the top view. In this schematic cross-sectional view, the electrode 61d is illustrated as the center, and therefore the layer L 1 includes a source driver 20A, a source driver 20B, a transceiver 20D, and a layer L2. The pixel 40 and the like having the same are not shown due to space limitations. Below the plug 55c, the source driver 20A, the source driver 20B, and the transmitting / receiving device are provided. The pixel 20D is electrically connected to the plug 63a and the plug 63b. 11, the electrode 61d is electrically connected to the bump 59c. , and is electrically connected to the transmitting / receiving device 20D via the plug 57c and the plug 55c in the shortest distance. It is preferable that

[0148] FIG. 12 is a diagram for explaining a configuration example of a wireless transceiver 900 as an example of the transceiver device 20D. The wireless transceiver 900 includes a low noise amplifier 901 (LNA). amplifier), Band Pass Filter 902 (BPF: Band Pass Filter ter), mixer 903 (MIX: Mixer), band pass filter 904, demodulator 9 05 (DEM: Demodulator), Power Amplifier 911 (PA: Power A mplifier), bandpass filter 912, mixer 913, bandpass filter 9 14, Modulator 915 (MOD: Modulator), Duplexer 921 (DUP: Duplexer) exer), local oscillator 922 (LO: local oscillator), and The antenna 931 is connected to the electrode 61d or the electrode 61e in FIG. is equivalent to.

[0149] <Received> A signal 941 transmitted from another semiconductor device or a base station is input to an antenna 931 and The received signal is input to the low noise amplifier 901 via the duplexer 921. 1 has the function of transmitting and receiving wireless signals using a single antenna.

[0150] The low noise amplifier 901 converts a weak received signal into a signal strong enough to be processed by the wireless transceiver 900. The signal 941 amplified by the low noise amplifier 901 is The signal is supplied to a mixer 903 via a filter 902 .

[0151] The bandpass filter 902 filters out the necessary frequency components from the frequency components contained in the signal 941. It has the function of attenuating frequency components outside a certain band and passing a required frequency band.

[0152] The mixer 903 mixes the signal 941 that has passed through the bandpass filter 902 with the signal 942 of the local oscillator 92. 2. The signal 943 generated by the first and second filters 941 and 942 is mixed by the superheterodyne method. The amplifier 903 mixes the signals 941 and 943 and outputs the difference frequency component and sum frequency component of the two signals. A signal having a magnitude of 1000 Hz is fed to a bandpass filter 904.

[0153] The bandpass filter 904 has a function of passing one of the two frequency components. For example, the band pass filter 904 passes the difference frequency component. The bandpass filter 904 also has a function of removing noise components generated in the mixer 903. The signal that has passed through is supplied to a demodulator 905. The demodulator 905 controls the supplied signal. The signal output from the demodulator 905 is converted into a digital signal, a data signal, etc., and output. The signals are provided to various processing devices (arithmetic units, storage devices, etc.).

[0154] <Send> The modulator 915 transmits control signals, data signals, etc. from the wireless transceiver 900 to another semiconductor device. Or, it has a function of generating a basic signal to be transmitted to a base station, etc. The signal is supplied to the mixer 913 via a double pass filter 914 .

[0155] The bandpass filter 914 filters out noise components that occur when the fundamental signal is generated by the modulator 915. It has the function of removing impurities.

[0156] The mixer 913 mixes the fundamental signal that has passed through the bandpass filter 914 with the local oscillator 922 The mixer has a function of mixing the signal 944 generated by the superheterodyne method. 913 mixes the fundamental signal with signal 944 and produces a signal with a difference frequency component and a sum frequency component. The signal is provided to a bandpass filter 912 .

[0157] The bandpass filter 912 has a function of passing one of two frequency components. For example, the band pass filter 912 passes the sum frequency component. The bandpass filter 912 also has a function of removing noise components generated in the mixer 913. The signal that has passed through is supplied to a power amplifier 911.

[0158] The power amplifier 911 has a function of amplifying a supplied signal to generate a signal 942. The signal 942 is radiated to the outside from the antenna 931 via the duplexer 921 .

[0159] Regarding a wireless transceiver 900A which is a modification of the wireless transceiver 900 described above, FIG. In order to reduce repetition of the description, the wireless transmission and reception of the wireless transceiver 900A will be mainly described. The differences from machine 900 will be described.

[0160] The wireless transceiver 900A has multiple antennas 931 to support the 5G communication standard. In addition, a plurality of duplexers 921, a plurality of low noise amplifiers 901, and a plurality of power amplifiers The radio transceiver 900A also includes a decoder circuit 906 (DEC) and It has a decoder circuit 916 .

[0161] In FIG. 13, an antenna 931, a duplexer 921, a low-noise amplifier 901, and a power amplifier In FIG. 13, the first antenna 93 has five amplifiers 911. The first antenna 931 is designated as antenna 931[1], and the fifth antenna 931 is designated as antenna 931[5]. The duplexer 921, the low noise amplifier 901, and the power amplifier 911 are also The antenna 931, the duplexer 921, and the low noise amplifier 90 are also denoted as antenna 931. The numbers of the power amplifiers 911 and the power amplifiers 912 are not limited to five.

[0162] The antenna 931[1] is electrically connected to the duplexer 921[1]. 1] is electrically connected to a low noise amplifier 901[1] and a power amplifier 911[1]. The antenna 931[5] is electrically connected to the duplexer 921[5]. 1[5] is electrically connected to the low noise amplifier 901[5] and the power amplifier 911[5]. The second to fourth antennas 931 are also connected in the same manner as the antenna 931[1]. The second to fourth shared devices 921 are also electrically connected to the shared device 921 [1], the second to fourth low noise amplifiers 901 and the second to fourth power It is electrically connected to the amplifier 911 .

[0163] The decoder circuit 906 is electrically connected to the plurality of low noise amplifiers 901. In the decoder 901, five low noise amplifiers 901 are connected to a decoder circuit 906. The circuit 916 is electrically connected to a plurality of power amplifiers 911. In FIG. The power amplifier 911 is connected to a decoder circuit 916 .

[0164] The decoder circuit 906 includes low noise amplifiers 901[1] to 901[5]. The decoder circuit 906 has a function of selecting one or more of the low-noise The low-noise amplifier 901[1] through the low-noise amplifier 901[5] have a function of sequentially selecting the low-noise amplifier 901[1] through the low-noise amplifier 901[5]. Similarly, the decoder circuit 916 outputs the power amplifiers 911[1] to 911[5] The decoder circuit 916 has a function of selecting one or more of the following: The power amplifier 911 has a function of sequentially selecting the power amplifiers 911[1] through 911[5].

[0165] For example, it will be installed in wearable electronic devices such as head-mounted displays. In the case of a display device, the display device is small, lightweight, has high-speed communication capabilities, or is capable of displaying high-definition images. In addition, when the environment or location where the head mounted display is used changes, However, it is necessary to provide stable high-speed communication. In the case of a display device, the amount of image data increases in order for the display device to display high-definition images. There is.

[0166] Therefore, below the L2 layer, which has a free-form display area, there is a source driver, etc. By bonding the layer L1, a display device of any shape can be provided. The display device 10 is a display device having a new configuration having antennas corresponding to a plurality of frequency bands. Or, since the display device 10 has an antenna, productivity can be improved. As described above, the display device has pixels, gates, and the like. It is used in electronic devices because it includes a light driver, a source driver, and an antenna as components. This allows the number of parts used to be reduced.

[0167] The configuration, structure, method, etc. described in this embodiment may be the same as the configuration, structure, method, etc. described in other embodiments. It can be used in appropriate combination with the above methods.

[0168] (Embodiment 3) In this embodiment, a structure of a transistor applicable to the display device described in the above embodiment will be described. 14A and 14B show a transistor 500 included in a display device. 14A is a schematic cross-sectional view of a transistor 500 in the channel length direction. 14B is a schematic cross-sectional view of the transistor 500 in the channel width direction.

[0169] The transistor 500 is merely an example, and the circuit configuration and driving method are not limited to this configuration. For example, a semiconductor device may be formed by using an OS transistor. A unipolar circuit (only n-channel transistors, meaning transistors of the same polarity, etc.) In this case, it can be applied to pixels, gate drivers, source drivers, memories, etc. can.

[0170] As shown in FIGS. 14A and 14B, transistor 500 includes an insulator 514 and an insulator 516. A conductor 503 disposed so as to be embedded in an insulator 516, an insulator 516 and a conductor An insulator 520 disposed on the insulator 503, and an insulator 522 disposed on the insulator 520. 522, an insulator 524 disposed on the insulator 522, and an oxide layer disposed on the insulator 524. 530a, an oxide 530b disposed on the oxide 530a, and an oxide 530b disposed on the oxide 530b. Conductor 542a and conductor 542b are spaced apart from each other, and conductor 542a and conductor The conductive material 542a is disposed on the conductive material 542b, and an opening is formed between the conductive material 542a and the conductive material 542b so as to overlap the conductive material 542a. The insulating material 580 is disposed on the bottom and sides of the opening, and the insulating material 545 is disposed on the bottom and sides of the opening. and a conductor 560 disposed on the forming surface of the substrate 5.

[0171] As shown in FIGS. 14A and 14B, the oxide 530a, the oxide 530b, and the conductive The insulator 544 is disposed between the conductor 542a and the conductor 542b and the insulator 580. As shown in FIG. 14A and FIG. 14B, the conductor 560 is preferably made of an insulator 5 45, and a conductor 560a is provided inside the conductor 560a so as to be embedded inside the conductor 560a. It is preferable that the conductor 560b is provided. As shown in FIG. 1, an insulator 574 is disposed over the insulator 580, the conductor 560, and the insulator 545. It is preferable that the above-mentioned arrangement is adopted.

[0172] In this specification and the like, the oxide 530a and the oxide 530b are collectively referred to as oxides. This may be called item 530.

[0173] In the transistor 500, an oxide is formed in the region where the channel is formed and in the vicinity thereof. In the illustrated embodiment, two layers of a nitride 530a and an oxide 530b are stacked. The present invention is not limited to this. For example, a single layer of oxide 530b or a stack of three or more layers may be used. A layer structure may be provided.

[0174] In addition, although the conductor 560 in the transistor 500 has a two-layer structure, The present invention is not limited to this. For example, the conductor 560 may have a single layer structure. Alternatively, it may have a laminated structure of three or more layers.

[0175] Here, the conductor 560 functions as a gate electrode of the transistor, and the conductors 542a and and the conductor 542b function as a source electrode and a drain electrode, respectively. Thus, conductor 560 is exposed through the opening in insulator 580 and through conductors 542a and 542b. The conductor 560, the conductor 542a, and the conductor 542b are formed so as to be embedded in the region between them. The arrangement of the conductor 542b is selected to be self-aligned with respect to the opening of the insulator 580. In the transistor 500, the gate electrode is disposed between the source electrode and the drain electrode. Therefore, the conductor 560 can be arranged in a self-aligning manner without providing a margin for alignment. Since the transistor 500 can be formed without any problem, the area occupied by the transistor 500 can be reduced. This allows miniaturization and high integration of semiconductor devices.

[0176] Furthermore, a conductor 560 is formed in a self-aligned manner in the region between the conductors 542a and 542b. Since the conductor 560 is formed, the conductor 560 overlaps with the conductor 542a or the conductor 542b. As a result, the conductor 560 does not have a gap between the conductor 542a and the conductor 542b. The parasitic capacitance formed can be reduced. It is possible to improve the scanning speed and provide high frequency characteristics.

[0177] The conductor 560 may function as a first gate (also called a top gate) electrode. The conductor 503 also functions as a second gate (also called a bottom gate) electrode. In this case, the voltage applied to the conductor 503 may be the same as the voltage applied to the conductor 560. By changing the threshold voltage of the transistor 500 independently, the threshold voltage of the transistor 500 can be controlled. In particular, applying a negative voltage to the conductor 503 turns on the transistor 5 It is possible to increase the threshold voltage of 00 to be higher than 0V and reduce the off-current. Therefore, applying a negative voltage to the conductor 503 increases the current flow rate of the conductor 560 compared to when no voltage is applied. This can reduce the drain current when the voltage applied to is 0V.

[0178] The conductor 503 is disposed so as to overlap the oxide 530 and the conductor 560. When a voltage is applied to the conductor 560 and the conductor 503, The electric field generated by the conductor 503 is connected to the electric field generated by the conductor 503, and a channel is formed in the oxide 530. The channel forming area can be covered.

[0179] In this specification, a pair of gate electrodes (a first gate electrode and a second gate electrode The structure of a transistor in which the channel formation region is electrically surrounded by the electric field of sur This is called the rounded channel (S-channel) configuration. In the S-channel configuration, The conductors 542a and 542b function as a source electrode and a drain electrode. The side and periphery of the oxide 530 have the same conductivity type as the channel formation region, that is, the i-type. In addition, the side of the oxide 530 in contact with the conductor 542a and the conductor 542b The surface and the periphery are in contact with the insulator 544, so they become i-type like the channel formation region. In this specification and the like, the i-type is treated as the same as the high-purity intrinsic type described later. In addition, the S-channel configuration disclosed in this specification and the like can be used in a fin type configuration and Different from the planar type configuration. By adopting the S-channel configuration, the short channel effect In other words, to make a transistor less susceptible to short channel effects. can be done.

[0180] Moreover, a conductor 503a is formed in contact with the inner walls of the openings of the insulators 514 and 516. The transistor 500 has a conductor 503b formed on the inner side. The present invention is not limited to the above-described structure in which the conductive material 503a and the conductive material 503b are laminated. For example, the conductor 503 may be a single layer or a laminated structure of three or more layers. The insulator 514 may be made of aluminum oxide, hafnium oxide, or the like. It is preferable to use a metal oxide such as aluminum oxide or tantalum oxide.

[0181] Here, the conductor 503a is a diffusion layer for impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms. It is preferable to use a conductive material that has a function of suppressing the impurities (i.e., the impurities are less likely to permeate). Alternatively, the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.) is suppressed. It is preferable to use a conductive material that has the function of preventing oxygen from permeating through the conductive material. In this specification, the function of suppressing the diffusion of impurities or oxygen refers to the function of suppressing the diffusion of the above impurities or oxygen. has the function of suppressing the diffusion of any one or all of the above oxygen.

[0182] For example, the conductor 503a has a function of suppressing the diffusion of oxygen, so that the conductor 503 It is possible to suppress the oxidation of b and the decrease in electrical conductivity.

[0183] In addition, when the conductor 503 also functions as a wiring, the conductor 503b is made of tungsten, copper, etc. It is preferable to use a conductive material having high conductivity, which is mainly composed of aluminum. In this embodiment, the conductor 503 is illustrated as a laminate of conductors 503a and 503b. However, the conductor 503 may have a single layer structure.

[0184] The insulators 520, 522, and 524 function as a second gate insulating film. Possesses the ability.

[0185] Here, the insulator 524 in contact with the oxide 530 has more oxygen than the stoichiometric composition. It is preferable to use an insulator containing a large amount of oxygen. The oxygen is released from the film by heating. In this specification and elsewhere, the oxygen released by heating is sometimes referred to as "excess oxygen." That is, the insulator 524 has a region containing excess oxygen (also called an "excess oxygen region"). It is preferable that the insulator containing such excess oxygen is formed in contact with the oxide 530. By providing the oxide 530, the oxygen vacancy (V O :oxygen vacancy (also referred to as "oxide dispersibility"), thereby improving the reliability of the transistor 500. When hydrogen enters the oxygen vacancy in the compound 530, the defect (hereinafter referred to as V O Sometimes called H. ) can act as a donor, producing electrons as carriers. Some of them may combine with oxygen, which bonds with metal atoms, to generate electrons that act as carriers. Therefore, a transistor using an oxide semiconductor containing a large amount of hydrogen is a normally-on transistor. In addition, hydrogen in the oxide semiconductor is easily moved by stress such as heat and electric field. Therefore, if an oxide semiconductor contains a large amount of hydrogen, the reliability of a transistor decreases. In one embodiment of the present invention, the V in the oxide 530 O Reduce H as much as possible It is preferable to make the V O H is ten In order to obtain an oxide semiconductor with reduced impurities, it is necessary to remove impurities such as moisture and hydrogen from the oxide semiconductor. (also called "dehydration" or "dehydrogenation treatment") and supplying oxygen to the oxide semiconductor. It is important to compensate for the oxygen deficiency by adding oxygen to the water (also called "oxygenation treatment"). O H etc. By using an oxide semiconductor in which impurities are sufficiently reduced for a channel formation region of a transistor, This makes it possible to impart stable electrical characteristics.

[0186] As an insulator having an excess oxygen region, specifically, an oxide insulator in which a part of oxygen is released by heating is used. It is preferable to use oxide materials that release oxygen when heated. Thermal Desorption Spectroscopy (DSA) analysis revealed that oxygen atoms The converted amount of oxygen released is 1.0 x 10 18 atoms / cm 3 More than or equal to 1.0 ×10 19 atoms / cm 3 More preferably, 2.0×10 19 atoms / c m 3 or more, or 3.0×10 20 atoms / cm3 The oxide film is as described above. The surface temperature of the film during the TDS analysis is 100°C or higher and 700°C or lower, or The range of 00°C or more and 400°C or less is preferable.

[0187] In addition, the insulator having the excess oxygen region is brought into contact with the oxide 530 and then heat-treated. Alternatively, one or more of microwave processing, RF processing, or the like may be performed. By performing the above process, water or hydrogen in the oxide 530 can be removed. For example, At 530, a reaction occurs in which the VoH bond is broken, in other words, "V O H→Vo+ This causes the reaction "H" to occur, resulting in dehydrogenation. Some of the hydrogen produced at this time is Combines with oxygen to form H 2 O, removed from the oxide 530 or from the insulator adjacent to the oxide 530 In addition, some of the hydrogen may be gettered into the conductor 542a and the conductor 542b. It may be ringed.

[0188] The microwave treatment may be carried out using, for example, an apparatus having a power source for generating high-density plasma. Alternatively, it is preferable to use an apparatus having a power source for applying RF to the substrate side. By using a gas containing oxygen and high-density plasma, high-density oxygen radicals are generated. By applying RF to the substrate side, the high-density plasma is generated. Efficiently introduce oxygen radicals into the oxide 530 or into the insulator near the oxide 530 The microwave treatment can be carried out at a pressure of 133 Pa or more, preferably 200 The pressure may be 400 Pa or more, and more preferably 400 Pa or more. The gases introduced into the apparatus are, for example, oxygen and argon, with an oxygen flow rate ratio (O 2 / (O 2 +Ar)) is set to 50% or less, preferably 10% or more and 30% or less.

[0189] In addition, during the manufacturing process of the transistor 500, the surface of the oxide 530 is exposed. The heat treatment is preferably performed at a temperature of, for example, 100° C. or higher and 450° C. or lower. More preferably, the heat treatment is performed at a temperature of 350° C. or higher and 400° C. or lower. Or in an inert gas atmosphere, or oxidizing gas is 10 ppm or more, 1% or more, or For example, the heat treatment is preferably carried out in an oxygen atmosphere. This supplies oxygen to the oxide 530 to eliminate oxygen vacancies (V O ) can be reduced. The heat treatment may be carried out under reduced pressure. Alternatively, the heat treatment may be carried out under nitrogen gas or nitrogen gas. After heat treatment in an active gas atmosphere, oxidizing gas was added at 10p to replace the oxygen that was removed. pm or more, 1% or more, or 10% or more. Alternatively, After heat treatment in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more, Alternatively, the heat treatment may be performed in a nitrogen gas or inert gas atmosphere.

[0190] In addition, by performing an oxygen addition treatment on the oxide 530, oxygen vacancies in the oxide 530 are filled with oxygen. The oxygen that is absorbed repairs the molecule, in other words, promotes the reaction "Vo+O→null" Furthermore, the supplied oxygen reacts with the hydrogen remaining in the oxide 530. The hydrogen is then H 2 O can be removed (dehydrated). Hydrogen remaining in sample 530 recombines with the oxygen vacancies to form V O Inhibits the formation of H It is possible.

[0191] Also, if the insulator 524 has an excess oxygen region, the insulator 522 may be oxygen-absorbed (e.g., It has the function of suppressing the diffusion of oxygen atoms, oxygen molecules, etc. (the oxygen is less likely to permeate). is preferred.

[0192] The insulator 522 has a function of suppressing the diffusion of oxygen and impurities, and the oxide 530 The oxygen contained in the conductor 503 is preferably not diffused to the insulator 520 side. In this way, reaction with the oxygen contained in the insulator 524 and the oxide 530 can be suppressed.

[0193] The insulator 522 may be, for example, aluminum oxide, hafnium oxide, aluminum and hafnium oxide, or the like. Oxides containing hafnium (hafnium aluminate), tantalum oxide, zirconium oxide, Lead zirconate titanate (PZT), strontium titanate (SrTiO 3 ),or( Ba,Sr)TiO 3 A single layer of insulators, including so-called high-k materials such as (BST) As transistors become smaller and more highly integrated, Thinning of the gate insulating film may cause problems such as leakage current. By using a high-k material as an insulator that functions as a gate insulator, the thickness of the transistor can be increased while maintaining the physical thickness. This makes it possible to reduce the gate voltage during transistor operation.

[0194] In particular, it has the function of suppressing the diffusion of impurities and oxygen (the oxygen is less likely to permeate). a) Insulators containing oxides of one or both of the insulating materials aluminum and hafnium It is recommended to use an insulator containing oxides of either or both of aluminum and hafnium. Aluminum oxide, hafnium oxide, oxides containing aluminum and hafnium ( It is preferable to use materials such as hafnium aluminate. When 522 is formed, the insulator 522 prevents oxygen from being released from the oxide 530 and prevents the transistor from being damaged. This layer functions as a layer for suppressing the intrusion of impurities such as hydrogen from the periphery of the capacitor 500 into the oxide 530. do.

[0195] Alternatively, for example, aluminum oxide, bismuth oxide, germanium oxide, etc. may be added to these insulators. tungsten oxide, yttrium oxide, Zirconium oxide may be added, or these insulators may be nitrided. Silicon oxide, silicon oxynitride or silicon nitride may be laminated on the insulator. .

[0196] In addition, the insulator 520 is preferably thermally stable. For example, silicon oxide and Silicon oxide nitride and silicon oxynitride are preferred because they are thermally stable. By combining the insulator with silicon oxide or silicon oxynitride, Moreover, it is possible to obtain the insulator 520 having a laminated structure with a high relative dielectric constant.

[0197] In addition, in the transistor 500 of FIG. 14A and FIG. 14B, the first layer is a three-layer laminate. As the second gate insulating film, an insulator 520, an insulator 522, and an insulator 524 are illustrated. However, the second gate insulating film has a single layer, two layers, or a laminated structure of four or more layers. In this case, the laminated structure is not limited to the same material, and may be made of different materials. It may also be composed.

[0198] In the transistor 500, an oxide semiconductor is added to an oxide 530 including a channel formation region. The oxide semiconductor is made of at least one of In and Zn. For example, the oxide 530 may contain In-M-Zn oxide (element M is aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, Titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium , neodymium, hafnium, tantalum, tungsten, magnesium, etc. It is preferable to use a metal oxide such as one or more metal oxides.

[0199] The metal oxide that functions as an oxide semiconductor may be formed by a sputtering method. Alternatively, the deposition may be performed by an atomic layer deposition (ALD) method. Note that a metal oxide functioning as an oxide semiconductor will be described in detail in another embodiment. do.

[0200] In addition, the metal oxide that functions as a channel formation region in the oxide 530 is a band It is preferable to use a material with a gap of 2 eV or more, preferably 2.5 eV or more. By using metal oxides with a wide band gap, the off-state current of a transistor can be reduced. can be reduced.

[0201] The oxide 530 has an oxide 530a under the oxide 530b. The diffusion of impurities from a structure formed below the oxide 530b can be suppressed. can.

[0202] The oxide 530 has a laminated structure of a plurality of oxide layers having different atomic ratios of metal atoms. Specifically, in the metal oxide used for the oxide 530a, The atomic ratio of element M in the metal oxide used for oxide 530b is It is preferable that the atomic ratio of the metal oxide used for the oxide 530a is larger than that of the element M. In the oxide 530b, the atomic ratio of element M to In is In the oxide 530b, the atomic ratio of element M to In is preferably larger than that of element M to In. In the metal oxide used in the oxide 530a, the atomic ratio of In to the element M is It is preferable that the atomic ratio of In is larger than the atomic ratio of In to the element M in the metal oxide.

[0203] In addition, the energy of the conduction band minimum of the oxide 530a is greater than that of the oxide 530b. In other words, the electron affinity of the oxide 530a is preferably higher than the electron affinity of the oxide 530a. is preferably smaller than the electron affinity of oxide 530b.

[0204] Here, at the junction between the oxide 530a and the oxide 530b, the energy of the conduction band minimum is In other words, the junction of oxide 530a and oxide 530b changes gradually. The energy level of the conduction band minimum at the junction changes continuously or is called a continuous junction. In order to achieve this, at the interface between oxide 530a and oxide 530b, In this case, the defect level density of the mixed layer formed by the above process is preferably reduced.

[0205] Specifically, the oxide 530a and the oxide 530b have a common element other than oxygen (mainly By using SiO2 as a component, it is possible to form a mixed layer with a low defect level density. When the material 530b is an In-Ga-Zn oxide, the oxide 530a is an In-Ga-Zn It is preferable to use oxide, Ga-Zn oxide, gallium oxide, etc.

[0206] At this time, the main path of the carriers is the oxide 530b. By forming the oxide 530a and the oxide 530b in the above-mentioned structure, the defect state density at the interface between the oxide 530a and the oxide 530b is reduced. Therefore, the effect of interface scattering on carrier conduction is reduced, and the Transistor 500 can obtain a high on-current.

[0207] On the oxide 530b, a conductor 542 is formed, which functions as a source electrode and a drain electrode. The conductors 542a and 542b are provided as the conductors 542a and 542b. are aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium nium, beryllium, indium, ruthenium, iridium, strontium, lanthanum or an alloy containing the above-mentioned metal element or the above-mentioned metal element It is preferable to use an alloy of a combination of these. For example, tantalum nitride, titanium nitride, tantalum tantalum, titanium and aluminum nitride, tantalum and aluminum nitride , ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, lanthanum It is preferable to use oxides containing tantalum and nickel. titanium and aluminum nitrides, tantalum and aluminum nitrides, ruthenium oxides Ruthenium, ruthenium nitride, oxides containing strontium and ruthenium, lanthanum and nickel Oxides containing fluorine are conductive materials that are resistant to oxidation or that maintain their conductivity even when they absorb oxygen. Furthermore, metal nitride films such as tantalum nitride are preferred because they are materials that can withstand hydrogen or This is preferred because it has a barrier property against oxygen.

[0208] In addition, in FIG. 14A, the conductor 542a and the conductor 542b are shown as having a single layer configuration. However, a laminated structure of two or more layers may be used. For example, a tantalum nitride film and a tungsten film may be laminated. Alternatively, a titanium film and an aluminum film may be stacked. A two-layer structure with an aluminum film laminated on top, and a copper-magnesium-aluminum alloy film laminated on top Two-layer structure with a copper film on a titanium film, two-layer structure with a copper film on a tungsten film A two-layer structure in which these are laminated may also be used.

[0209] In addition, a titanium film or titanium nitride film and an alumina film are laminated on the titanium film or titanium nitride film. An aluminum film or a copper film is laminated, and then a titanium film or a titanium nitride film is formed on the aluminum film or a copper film. A three-layer structure consisting of a molybdenum film or molybdenum nitride film and a molybdenum film or molybdenum nitride film. An aluminum or copper film is layered on top of the molybdenum film, and then a molybdenum film or Indium oxide, tin oxide or molybdenum nitride are also used. Alternatively, a transparent conductive material containing zinc oxide may be used.

[0210] As shown in FIG. 14A, the conductor 542a (conductor 542b) of the oxide 530 At the interface and in the vicinity thereof, a region 543a and a region 543b are formed as low resistance regions. In this case, the region 543a may be used as either a source region or a drain region. The region 543b functions as the other of the source region and the drain region. A channel forming region is formed in the region between the region 543a and the region 543b.

[0211] By providing the conductor 542a (conductor 542b) so as to be in contact with the oxide 530, The oxygen concentration in the region 543a (region 543b) may decrease. The metal contained in the conductor 542a (conductor 542b) and the oxide 530 are In such a case, a metal compound layer containing the component may be formed in the region 543a (region The carrier density in the region 543a (region 543b) increases, and the region 543a (region 543b) becomes a low resistance region. become.

[0212] The insulator 544 is provided to cover the conductor 542a and the conductor 542b. The insulator 544 prevents oxidation of the conductive body 542a and the conductive body 542b. It may be provided to cover the side of object 530 and to be in contact with insulator 524 .

[0213] Insulator 544: hafnium, aluminum, gallium, yttrium, zirconium tungsten, titanium, tantalum, nickel, germanium, neodymium, lanthanum Alternatively, a metal oxide containing one or more selected from magnesium, etc. is used. The insulator 544 may be made of silicon oxynitride or silicon nitride. can be used.

[0214] In particular, the insulator 544 may be an oxide of aluminum or hafnium or both. Aluminum oxide, hafnium oxide, aluminum, and hafnium oxide are insulators containing It is preferable to use oxides containing hafnium (e.g., hafnium aluminate). Hafnium aluminate has higher heat resistance than hafnium oxide film. This is preferable because it is difficult to crystallize during heat treatment at room temperature. The body 542b is made of a material having oxidation resistance or a material that does not significantly decrease in conductivity even when it absorbs oxygen. In this case, the insulator 544 is not an essential component. Just calculate it.

[0215] By including the insulator 544, impurities such as water and hydrogen contained in the insulator 580 can be prevented. Diffusion into the oxide 530b can be suppressed via the insulator 545. The excess oxygen contained in the insulator 580 can suppress the oxidation of the conductor 560. do.

[0216] The insulator 545 functions as a first gate insulating film. Similar to the body 524, an insulator that contains excess oxygen and releases oxygen when heated is used. It is preferable to form

[0217] Specifically, silicon oxide having excess oxygen, silicon oxynitride, silicon nitride oxide, Silicon nitride, silicon oxide doped with fluorine, silicon oxide doped with carbon, carbon, and Silicon oxide doped with nitrogen and silicon oxide having vacancies can be used. In particular, silicon oxide and silicon oxynitride are preferable because they are stable to heat.

[0218] By providing an insulator containing excess oxygen as the insulator 545, oxygen can be removed from the insulator 545. In addition, oxygen can be effectively supplied to the channel forming region of the insulator 530b. As with 524, the concentration of impurities such as water or hydrogen in the insulator 545 is reduced. The thickness of the insulator 545 is preferably 1 nm or more and 20 nm or less.

[0219] In addition, in order to efficiently supply excess oxygen contained in the insulator 545 to the oxide 530, A metal oxide may be provided between the edge 545 and the conductor 560. The metal oxide may be an insulating material. It is preferable to suppress the diffusion of oxygen from the body 545 to the conductor 560. By providing a metal oxide, the diffusion of excess oxygen from the insulator 545 to the conductor 560 is suppressed. In other words, the reduction in the amount of excess oxygen supplied to the oxide 530 can be suppressed. In addition, the oxidation of the conductor 560 due to excess oxygen can be suppressed. Any material that can be used for the insulator 544 may be used.

[0220] Note that the insulator 545 may have a stacked structure like the second gate insulating film. As transistors become smaller and more highly integrated, the gate insulating film becomes thinner, which reduces leakage current and other problems. Therefore, the insulator that functions as the gate insulating film should be made of high-k By using a laminated structure of a material that is thermally stable, the thickness of the material can be maintained while maintaining the thickness of the material. This allows the gate voltage to be reduced during transistor operation. In addition, it is thermally stable and has a high relative dielectric constant. A simple laminated structure can be achieved.

[0221] The conductor 560 functioning as the first gate electrode has a two-layer structure in FIGS. 14A and 14B. However, it may have a single layer structure or a laminated structure of three or more layers.

[0222] The conductor 560a is a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, or a nitrogen oxide molecule. (N 2 O, NO, NO 2 ), conductive materials that suppress the diffusion of impurities such as copper atoms It is preferable to use a material containing a small amount of oxygen (e.g., oxygen atoms, oxygen molecules, etc.). It is preferable to use a conductive material having a function of suppressing the diffusion of at least one of the conductive materials. Since 60a has a function of suppressing the diffusion of oxygen, the oxygen contained in the insulator 545 This can prevent the conductor 560b from being oxidized and the conductivity from decreasing. Examples of conductive materials that have the function of suppressing scattering include tantalum, tantalum nitride, and ruthenium. It is preferable to use ruthenium oxide or ruthenium oxide as the conductor 560a. In this case, an oxide semiconductor that can be used for the oxide 530 can be used. By forming the conductive material 60b by a sputtering method, the electrical resistance value of the conductive material 560a is reduced. It can be made into a conductor. This is called an OC (Oxide Conductor) electrode. It is possible.

[0223] The conductor 560b is a conductive material mainly composed of tungsten, copper, or aluminum. In addition, since the conductor 560b also functions as wiring, It is preferable to use a conductor with high electrical conductivity, such as tungsten, copper, or aluminum. The conductive material 560b may be a conductive material mainly composed of aluminum. For example, a laminated structure of titanium or titanium nitride and the above conductive material may be used. good.

[0224] The insulator 580 is disposed on the conductor 542a and the conductor 542b via the insulator 544. The insulator 580 preferably has an excess oxygen region. For example, the insulator 5 80 includes silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, and fluorine. Silicon oxide doped with nitrogen, silicon oxide doped with carbon, and silicon oxide doped with carbon and nitrogen. It is preferable that the material is silicon oxide, silicon oxide having voids, or resin. Silicon oxide and silicon oxynitride are particularly preferred because they are thermally stable. Silicon oxide and silicon oxide with vacancies easily form excess oxygen regions in later processes. This is preferable because it is possible to

[0225] The insulator 580 preferably has an excess oxygen region. Oxygen is released upon heating. By providing the insulator 580, oxygen in the insulator 580 can be efficiently supplied to the oxide 530. In addition, the concentration of impurities such as water or hydrogen in the insulator 580 is reduced. It is preferable that

[0226] The opening of the insulator 580 is formed to overlap the region between the conductor 542a and the conductor 542b. As a result, the conductor 560 is in contact with the opening of the insulator 580 and the conductor 542a. It is formed so as to be embedded in the region sandwiched between bodies 542b.

[0227] In miniaturizing semiconductor devices, it is necessary to shorten the gate length. It is necessary to prevent the conductivity of the conductor 60 from decreasing. In this embodiment, the conductor 560 may have a high aspect ratio. The conductor 560 is provided so as to be embedded in the opening of the insulator 580. Even if the shape has a high ratio, the conductor 560 can be formed without collapsing during the process. Cut.

[0228] The insulator 574 is disposed on the top surface of the insulator 580, the top surface of the conductor 560, and the top surface of the insulator 545. It is preferable that the insulator 574 is provided in contact with the surface. Thus, an excess oxygen region can be provided in the insulator 545 and the insulator 580. This allows oxygen to be supplied from the excess oxygen region into the oxide 530.

[0229] For example, the insulator 574 may be hafnium, aluminum, gallium, yttrium, Zirconium, tungsten, titanium, tantalum, nickel, germanium, or magnesium It is possible to use a metal oxide containing one or more metals selected from the group consisting of ruthenium, cadmium, and ruthenium. Cut.

[0230] In particular, aluminum oxide has high barrier properties and is a thin film with a thickness of 0.5 nm to 3.0 nm. Therefore, the diffusion of hydrogen and nitrogen can be suppressed even if the sputtering The aluminum oxide film formed by this method is a source of oxygen and also a barrier against impurities such as hydrogen. It can also function as a film.

[0231] In addition, it is preferable to provide an insulator 581 functioning as an interlayer film over the insulator 574. The insulator 581, like the insulator 524, has a low impurity concentration such as water or hydrogen in the film. is preferably reduced.

[0232] Also, the insulating material 581, the insulating material 574, the insulating material 580, and the insulating material 544 are formed The conductor 540a and the conductor 540b are disposed in the opening. The bodies 540b are provided opposite each other with the conductor 560 therebetween.

[0233] In particular, aluminum oxide is highly resistant to oxygen and water, which can cause fluctuations in the electrical characteristics of transistors. It has a high blocking effect that does not allow impurities such as oxygen and moisture to pass through the membrane. Aluminum oxide is highly resistant to hydrogen, moisture, etc. during and after the transistor manufacturing process. This can prevent impurities from entering the transistor 500. This can suppress the release of oxygen from the oxide that constitutes the 00. It is suitable for use as a protective film for the substrate 500.

[0234] After the transistor 500 is formed, an opening is formed to surround the transistor 500. An insulator having high barrier properties against hydrogen or water may be formed so as to cover the opening. By encasing the transistor 500 in the insulator with high barrier properties as described above, moisture, Also, it is possible to prevent hydrogen from entering the transistors 500. The whole may be wrapped in an insulator that has high barrier properties against hydrogen or water. When forming an opening to surround the transistor 500, for example, the insulator 522 or the insulator An opening is formed that reaches the insulator 514, and the above-mentioned barrier is formed so as to contact the insulator 522 or the insulator 514. If a highly reactive insulator is formed, the manufacturing process of the transistor 500 can be performed in the same manner. For example, the insulator having high barrier properties against hydrogen or water is A material similar to that of the insulator 522 or the insulator 514 may be used.

[0235] By using this structure, a semiconductor device including a transistor having an oxide semiconductor This allows miniaturization or high integration to be achieved.

[0236] Examples of a substrate that can be used for the semiconductor device of one embodiment of the present invention include a glass substrate, a quartz substrate, and the like. Plate, sapphire substrate, ceramic substrate, metal substrate (e.g. stainless steel substrate, Substrate with stainless steel foil, tungsten substrate, tungsten foil semiconductor substrate (e.g., single crystal semiconductor substrate, polycrystalline semiconductor substrate, or chemical semiconductor substrates), SOI (Silicon on Insulator) substrates, etc. In addition, a plastic having a heat resistance capable of withstanding the processing temperature of this embodiment can be used. A stick substrate may also be used. Examples of glass substrates include barium borosilicate glass, Aluminosilicate glass, or aluminoborosilicate glass, or soda lime glass In addition, crystallized glass can be used.

[0237] Alternatively, the substrate may be a flexible substrate, a laminated film, a paper containing a fibrous material, or A flexible substrate, a laminated film, a base film, etc. can be used. Examples of films include the following: Polyethylene naphthalate (PET), Polyethersulfone (PES) ), and polytetrafluoroethylene (PTFE). An example of the material is a synthetic resin such as acrylic. Another example is polypropylene. Examples of the materials include polyethylene, polyester, polyvinyl fluoride, and polyvinyl chloride. Examples include polyamide, polyimide, aramid resin, epoxy resin, and inorganic vapor deposition film. In particular, semiconductor substrates, single crystal substrates, and SOI substrates are used. By manufacturing transistors using this method, there is less variation in characteristics, size, or shape. This makes it possible to manufacture small-sized transistors with high current capability. By constructing a circuit using such transistors, it is possible to reduce the power consumption of the circuit or to increase the integration density of the circuit. It is possible to achieve this.

[0238] In addition, a flexible substrate is used as the substrate, and transistors, resistors, and Alternatively, the substrate and the transistors, resistors, and / or capacitors may be formed. A release layer may be provided between the semiconductor device and / or the capacitor. Or, after the whole process is completed, it can be separated from the substrate and used for transferring to another substrate. In this case, the transistors, resistors, and / or capacitors are mounted on substrates with poor heat resistance or flexible substrates. The above-mentioned peeling layer may be formed, for example, of a tungsten film and a silicon oxide film. The laminated structure of the inorganic film and the polyimide film, and the organic resin film such as polyimide formed on the substrate. For example, a silicon film containing hydrogen can be used.

[0239] That is, a semiconductor device is formed on a substrate, and then the semiconductor device is transferred to another substrate. An example of the substrate to which the semiconductor device is transferred is a substrate for forming the above-mentioned transistor. In addition to the substrates that can be used, paper substrates, cellophane substrates, aramid film substrates, polyimide substrates Film substrate, stone substrate, wood substrate, fabric substrate (natural fibers (silk, cotton, hemp), synthetic fibers (nylon) lon, polyurethane, polyester) or regenerated fiber (acetate, cupra, rayon These include recycled polyester, leather substrates, and rubber substrates. By using the substrate, it is possible to manufacture a semiconductor device having flexibility and a semiconductor device that is not easily broken. It is possible to improve the structure, provide heat resistance, and reduce weight or thickness.

[0240] By providing a semiconductor device on a flexible substrate, an increase in weight can be suppressed and the semiconductor device is less likely to be damaged. It is possible to provide a semiconductor device having a high resistance.

[0241] <Transistor modification 1> The transistor 500A shown in FIGS. 15A, 15B, and 15C is the same as that shown in FIGS. 15A is a modification of the transistor 500 shown in FIG. FIG. 15B is a schematic cross-sectional view of the L1-L2 region indicated by the dashed line in FIG. 15A. FIG. 15C is a schematic cross-sectional view of the W1-W2 region shown by the dashed line in FIG. 15A. In the top view of FIG. 15A, some elements are omitted for clarity. The structures illustrated in FIGS. 15A, 15B, and 15C are the same as those of the semiconductor device of one embodiment of the present invention. The present invention can also be applied to other transistors.

[0242] The transistor 500A having the configuration shown in FIGS. 15A, 15B, and 15C includes an insulator 5 52, insulator 513 and insulator 404 are included in the configuration shown in FIG. 14A and FIG. 14B. The transistor 500 is different from the transistor 500. In addition, an insulator 552 is provided in contact with the side surface of the conductor 540a. 14A and 14B, and an insulator 552 is provided in contact with the side surface of the conductor 540b. 5B. Furthermore, the transistor 500 does not have an insulator 520. 14A and 14B.

[0243] The transistor 500A having the configuration shown in FIGS. 15A, 15B, and 15C includes an insulator 5 An insulator 513 is provided on the insulator 574 and the insulator 513. An edge 404 is provided.

[0244] In the transistor 500A having the configuration shown in FIGS. 15A, 15B, and 15C, the insulator 514, insulator 516, insulator 522, insulator 524, insulator 544, insulator 580, and The insulating material 574 is patterned, and the insulating material 404 covers them. That is, the insulator 404 is disposed on the top surface of the insulator 574, the side surface of the insulator 574, the insulator 58 0 side, insulator 544 side, insulator 524 side, insulator 522 side, insulator 51 6, the side of the insulator 514, and the top surface of the insulator 513. The compound 530 and the like are isolated from the outside by the insulators 404 and 513 .

[0245] The insulator 513 and the insulator 404 are made of at least hydrogen (e.g., hydrogen atoms, hydrogen molecules, etc.). For example, the insulator 51 has a high function of suppressing the diffusion of water molecules. 3 and the insulator 404 are made of a material having high hydrogen barrier properties, such as silicon nitride or nitride. It is preferable to use silicon oxide. This prevents hydrogen and the like from diffusing into the oxide 530. This can suppress the deterioration of the characteristics of the transistor 500A. This can improve the reliability of the semiconductor device of one embodiment of the present invention.

[0246] The insulator 552 includes the insulator 581, the insulator 404, the insulator 574, the insulator 580, and The insulator 552 is provided in contact with the insulator 544. The insulator 552 suppresses the diffusion of hydrogen or water molecules. For example, the insulator 552 is preferably a material having a high hydrogen barrier property. Insulators such as silicon nitride, aluminum oxide, or silicon oxynitride are used. In particular, since silicon nitride is a material with high hydrogen barrier properties, the insulator 55 It is preferable to use a material with high hydrogen barrier properties as the insulator 552. As a result, impurities such as water or hydrogen are transported from the insulator 580 to the conductor 540a and the conductor 540b. 40b, the insulator 58 can be prevented from diffusing into the oxide 530. The oxygen contained in the conductive material 540 is prevented from being absorbed by the conductive material 540a and the conductive material 540b. As described above, the reliability of the semiconductor device of one embodiment of the present invention can be improved.

[0247] <Transistor modification 2> A configuration example of a transistor 500B will be described with reference to FIGS. 16A, 16B, and 16C. FIG. 16A is a top view of transistor 500B. FIG. 16B is a top view of transistor 500B shown in FIG. FIG. 16C is a schematic cross-sectional view of the L1-L2 region indicated by the dashed line W1 in FIG. It is to be noted that in the top view of FIG. 16A, some parts are omitted for clarity. The description of the elements is omitted.

[0248] Transistor 500B is a modification of transistor 500. Therefore, to avoid repetition, we will mainly focus on transistors. The differences between the transistor 500B and the transistor 500 will be described.

[0249] The conductor 560 functioning as the first gate electrode includes the conductor 560a and the conductor 56 Conductor 560b on conductor 560a. Conductor 560a is composed of hydrogen atoms, hydrogen molecules, water molecules, copper It is preferable to use a conductive material that has a function of suppressing the diffusion of impurities such as atoms. or a function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.). It is preferable to use a conductive material having such a property.

[0250] The conductor 560a has a function of suppressing the diffusion of oxygen, so that the material of the conductor 560b In other words, by having the conductor 560a, the conductor 560 The oxidation of b is suppressed, and the decrease in electrical conductivity can be prevented.

[0251] Also, the insulator 54 is disposed so as to cover the upper and side surfaces of the conductor 560 and the side surface of the insulator 545. It is preferable to provide the insulator 544 as a barrier against impurities such as water or hydrogen, and It is advisable to use an insulating material that has the function of suppressing the diffusion of oxygen. For example, aluminum oxide It is preferable to use tin oxide or hafnium oxide. Nesium, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, acid Metal oxides such as lanthanum oxide, neodymium oxide, or tantalum oxide, silicon oxide nitride, or Silicon nitride or the like can be used.

[0252] By providing the insulator 544, oxidation of the conductor 560 can be suppressed. By providing the insulator 544, impurities such as water and hydrogen contained in the insulator 580 are absorbed into the transistor. This can suppress diffusion to the transistor 500B.

[0253] Transistor 500B has a conductor 56 connected to a portion of conductor 542a and a portion of conductor 542b. Since the 0s overlap, the parasitic capacitance is likely to be larger than that of the transistor 500. However, the operating frequency of the insulator 580 tends to be lower than that of the insulator 500. Since there is no need to provide an opening in the substrate 540 or the like and fill the opening with the conductor 560 or the insulator 545, Compared to the transistor 500, productivity is high.

[0254] The configuration, structure, method, etc. described in this embodiment may be the same as the configuration, structure, method, etc. described in other embodiments. It can be used in appropriate combination with the above methods.

[0255] (Embodiment 4) In this embodiment, an oxide semiconductor, which is a type of metal oxide, will be described.

[0256] The metal oxide preferably contains at least indium or zinc. In addition to these, aluminum, gallium, It is preferable that the material contains yttrium, tin, etc. Also, boron, silicon, titanium, etc. Iron, Nickel, Germanium, Zirconium, Molybdenum, Lanthanum, Cerium, Selected from among odymium, hafnium, tantalum, tungsten, magnesium, cobalt, etc. One or more of these may be included.

[0257] <Classification of crystal structures> First, the classification of crystal structures in oxide semiconductors will be described with reference to FIG. 17A. FIG. 17A shows an oxide semiconductor, typically IGZO (a metal oxide containing In, Ga, and Zn). FIG. 1 is a diagram for explaining the classification of crystal structures of metal oxides.

[0258] As shown in FIG. 17A, oxide semiconductors are roughly divided into "amorphous" ) and "Crystalline" and "Crystal" In addition, "Amorphous" includes completely amorous phous is included. Also, CAAC (ca xis-aligned crystalline), nc(nanocrystall ine, and CAC (cloud-aligned composite). (excluding single crystal and poly crys tal). In addition, the classification of "Crystalline" includes single crysta l, poly crystal, and completely amorphous are excluded. In addition, "Crystal" includes single crystal and p Contains oly crystal.

[0259] The structures in the bold frames in Figure 17A are "Amorphous" and "Cr It is an intermediate state between the "crystal" and the "new crystal" In other words, the structure is in the lline phase. It is completely different from the unstable "Amorphous" and "Crystal". This can be rephrased as a structure in which

[0260] The crystal structure of the film or substrate was determined by X-ray diffraction (XRD). The crystallinity can be evaluated using the crystallinity spectrum. CAAC-IGZO films classified as "Grazing-Incidence The XRD spectrum obtained by the XRD measurement is shown in FIG. 17B (the vertical axis is the intensity). The GIXD method is a thin film method or This is also called the Seemann-Bohlin method. Hereafter, the results obtained by the GIXD measurement shown in Figure 17B are The XRD spectrum obtained by the CAAC- The composition of the IGZO film is approximately In:Ga:Zn=4:2:3 [atomic ratio]. The thickness of the CAAC-IGZO film shown in 17B is 500 nm.

[0261] As shown in FIG. 17B, the XRD spectrum of the CAAC-IGZO film shows clear crystalline Specifically, in the XRD spectrum of the CAAC-IGZO film, A peak indicating the c-axis orientation is detected near 2θ=31°. The peak near 2θ=31° is asymmetric with respect to the angle at which the peak intensity was detected. .

[0262] The crystal structure of the film or substrate was also analyzed by nano-beam electron diffraction (NBED). Diffraction patterns observed by electron diffraction (ultra-small The diffraction pattern of the CAAC-IGZO film can be evaluated by the electron beam diffraction pattern. The folding pattern is shown in FIG. 17C. FIG. 17C shows the NB method in which the electron beam is incident parallel to the substrate. The diffraction pattern observed by ED is shown in Fig. 17C. The composition of the film is In:Ga:Zn=4:2:3 [atomic ratio]. In the diffraction method, electron diffraction is performed with a probe diameter of 1 nm.

[0263] As shown in FIG. 17C, the diffraction pattern of the CAAC-IGZO film shows multiple diffraction patterns indicating the c-axis orientation. Several spots are observed.

[0264] <<Structure of oxide semiconductor>> In addition, when focusing on the crystal structure, oxide semiconductors may be classified differently from that shown in FIG. 17A. For example, oxide semiconductors include single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. As a non-single crystal oxide semiconductor, for example, the above-mentioned CAAC-OS Non-single-crystal oxide semiconductors include polycrystalline oxide semiconductors, pseudo-crystalline oxide semiconductors, and nc-OS. Amorphous-like oxide semiconductor (a-like OS) e semiconductor), amorphous oxide semiconductor, etc.

[0265] Here, we will explain the details of CAAC-OS, nc-OS, and a-like OS mentioned above. and provide an explanation.

[0266] [CAAC-OS] CAAC-OS has multiple crystalline regions, and the multiple crystalline regions have c-axes oriented in a specific direction. The specific direction is the thickness direction of the CAAC-OS film. , in the normal direction to the surface on which the CAAC-OS film is formed, or in the normal direction to the surface of the CAAC-OS film. A crystalline region is a region in which the atomic arrangement has periodicity. When considered as a child arrangement, a crystalline region is also a region with a uniform lattice arrangement. The OS has a region in which multiple crystal regions are connected in the ab-plane direction, and this region is strained. The distortion may occur when the lattice arrangement is distorted in a region where multiple crystal regions are connected. The area where the orientation of the lattice array changes between an area with one lattice array and an area with a different lattice array. In other words, the CAAC-OS has a c-axis orientation and no clear orientation in the ab-plane direction. It is an oxide semiconductor that has no

[0267] Each of the multiple crystalline regions is made up of one or more minute crystals (maximum diameter 10 When a crystalline region is made up of a single tiny crystal, the crystal size is less than 1 nm. The maximum diameter of the crystalline region is less than 10 nm. When such a crystal region is formed, the size of the crystal region may be approximately several tens of nm.

[0268] In-M-Zn oxide (where element M is aluminum, gallium, yttrium, or sulphur) CAAC-OS is one or more selected from the group consisting of aluminum, titanium, etc. The layer containing elements M, zinc (Zn), and oxygen (hereinafter referred to as the In layer) is The layered crystal structure (layered structure and Indium and element M can be substituted for each other. Therefore, the (M,Zn) layer may contain indium. Also, the In layer contains the element M. The In layer may contain Zn. The layered structure is, for example, For example, it is observed as a lattice image in a high-resolution TEM image.

[0269] For example, when the structure of the CAAC-OS film is analyzed using an XRD device, the θ / 2θ shift In the out-of-plane XRD measurement using a can, two peaks indicating the c-axis orientation were observed. The peak position indicating the c-axis orientation (value of 2θ) is detected at or near θ=31°. ) may vary depending on the type and composition of the metal elements that make up the CAAC-OS.

[0270] For example, in the electron diffraction pattern of the CAAC-OS film, multiple bright spots (spots) Note that one spot and another spot are the electron beams that have passed through the sample. The spot (also called the direct spot) is the center of symmetry, and the points are observed at point-symmetric positions. can be.

[0271] When the crystalline region is observed from the specific direction, the lattice arrangement in the crystalline region is a hexagonal lattice. However, the unit cell is not necessarily a regular hexagon, and may be a non-regular hexagon. The above distortion may have a lattice arrangement such as a pentagon or heptagon. -In the OS, clear grain boundaries were confirmed even in the vicinity of the distortion. In other words, the formation of grain boundaries is suppressed by the distortion of the lattice arrangement. This is because the arrangement of oxygen atoms in the CAAC-OS is dense in the ab-plane direction. The metal atoms are replaced by other metals, and the bond distance between the atoms changes. , it is believed that this is because distortion can be tolerated.

[0272] The crystal structure in which clear grain boundaries are observed is called polycrystal. The grain boundaries act as recombination centers, trapping carriers and forming transistor structures. It is highly likely that this will cause a decrease in on-state current and a decrease in field effect mobility. CAAC-OS, which has no visible grain boundaries, has a crystal structure suitable for the semiconductor layer of a transistor. CAAC-OS is one of the crystalline oxides that contain Zn. For example, In-Zn oxide and In-Ga-Zn oxide are preferably made of In. This is preferable since it can suppress the generation of grain boundaries more effectively than oxides.

[0273] CAAC-OS is an oxide semiconductor with high crystallinity and no clear grain boundaries. Therefore, the CAAC-OS is less susceptible to the decrease in electron mobility caused by grain boundaries. In addition, the crystallinity of an oxide semiconductor may be reduced by the incorporation of impurities or the generation of defects. Therefore, CAAC-OS is an oxide semiconductor with few impurities and defects (such as oxygen vacancies). Therefore, the physical properties of the oxide semiconductor having the CAAC-OS are stable. Therefore, oxide semiconductors having CAAC-OS are resistant to heat and have high reliability. C-OS is stable even under high temperatures (so-called thermal budget) in the manufacturing process. Therefore, using CAAC-OS for OS transistors can expand the flexibility of the manufacturing process. It is possible to

[0274] [nc-OS] nc-OS is a material that is used in microscopic regions (e.g., regions between 1 nm and 10 nm, especially regions between 1 nm and In other words, the nc-OS has a periodic atomic arrangement in the region of 3 nm or less. The size of the minute crystals is, for example, 1 nm or more and 10 nm or less. Since the size of the crystals is between 1 nm and 3 nm, these very small crystals are also called nanocrystals. In the case of nc-OS, the crystal orientation of different nanocrystals is not regular. Therefore, depending on the analysis method, the nc-OS may be a-like In some cases, it may be difficult to distinguish between OS and amorphous oxide semiconductors. For example, The structure was analyzed using an XRD device, and the out-of-phase structure was analyzed using θ / 2θ scan. In the XRD measurement, no peaks indicating crystallinity were detected. In addition, electron beam circuits using electron beams with probe diameters larger than nanocrystals (e.g., 50 nm or more) are used. When electron diffraction (also called selected area electron diffraction) is performed, a diffraction pattern resembling a halo pattern appears. On the other hand, for the nc-OS film, the size of the nanocrystals is close to or smaller than that of the nanocrystals. Electron beam diffraction (nanobeam) using an electron beam with a probe diameter (e.g., 1 nm to 30 nm) When electron diffraction is performed, a ring-shaped region is formed around the direct spot. An electron diffraction pattern may be obtained in which multiple spots are observed.

[0275] [a-like OS] The a-like OS is an oxide semiconductor that has a structure between the nc-OS and the amorphous oxide semiconductor. A-like OS is a semiconductor. It has voids or low density regions. The OS has a lower crystallinity than the nc-OS and CAAC-OS. e-OS has a higher hydrogen concentration in the film compared to nc-OS and CAAC-OS.

[0276] <<Oxide semiconductor structure>> Next, the details of the above-mentioned CAC-OS will be explained. Concerning formation.

[0277] [CAC-OS] CAC-OS is a type of metal oxide in which the elements constituting the metal oxide are 0.5 nm to 10 nm in diameter. Preferably, the material is unevenly distributed in a size range of 1 nm to 3 nm or less, or in the vicinity thereof. In the following, it is assumed that one or more metal elements are unevenly distributed in the metal oxide. The region having the metal element has a size of 0.5 nm to 10 nm, preferably 1 nm to 3 nm. A state where the mixture is smaller than m or close to that size is called a mosaic or patch pattern. .

[0278] Furthermore, CAC-OS is a material that is separated into a first region and a second region. The first region has a structure in which the first region is distributed throughout the film (hereinafter, also referred to as a cloud-like structure). ) In other words, the CAC-OS is a mixture of the first and second regions. It is a composite metal oxide having a structure in which

[0279] Here, the I ratio for the metal elements constituting the CAC-OS in the In-Ga-Zn oxide is The atomic ratios of n, Ga, and Zn are defined as [In], [Ga], and [Zn], respectively. For example, in the CAC-OS of In-Ga-Zn oxide, the first region is a region where [In] is larger than [In] in the composition of the CAC-OS film. The second region is a region where [Ga] is larger than [Ga] in the composition of the CAC-OS film. Or, for example, the first region has [In] that is greater than the [In] in the second region. The first region has a larger Ga than the second region, and the second region has a smaller Ga than the first region. In addition, the second region has a larger [Ga] than the first region and a smaller [I [n] is smaller than [In] in the first region.

[0280] Specifically, the first region is mainly composed of indium oxide, indium zinc oxide, etc. The second region is a region that is a portion of the gallium oxide, gallium zinc oxide, etc. In other words, the first region is called a region in which In is the main component. The second region can be rephrased as a region containing Ga as the main component. It is possible.

[0281] In addition, there are cases where a clear boundary between the first region and the second region cannot be observed. .

[0282] For example, in the case of CAC-OS of In-Ga-Zn oxide, Optical method (EDX:Energy Dispersive X-ray spectrosc) The EDX mapping obtained using the opy revealed that the region containing In as the main component (the first region) The structure has a structure in which a first region (a region mainly made of Ga) and a region mainly made of Ga (a second region) are unevenly distributed and mixed. It can be confirmed that.

[0283] When the CAC-OS is used in a transistor, the conductivity due to the first region and the conductivity due to the second region are different. The insulating properties due to the region of the gate insulating film act complementary to each other to provide a switching function (On In other words, CAC-OS and has a conductive function in a part of the material and an insulating function in a part of the material, and By separating the conductive function from the insulating function, Therefore, by using CAC-OS in transistors, This results in a high on-state current (I on ), high field-effect mobility (μ), and good switching It is possible to realize a switching operation.

[0284] The oxide semiconductor has various structures and has different characteristics. The oxide semiconductors in Two or more of AC-OS, nc-OS, and CAAC-OS may be included.

[0285] <Transistor Having Oxide Semiconductor> Next, the case where the oxide semiconductor is used for a transistor will be described.

[0286] By using the oxide semiconductor for a transistor, a transistor with high field-effect mobility can be obtained. In addition, a highly reliable transistor can be realized.

[0287] For the transistor, an oxide semiconductor with a low carrier concentration is preferably used. For example, , the carrier concentration of the oxide semiconductor is 1×10 17 cm -3 Less than or equal to 1×10 15 c m -3 Less than 1×10, more preferably 13 cm -3 Less than or equal to 1×10 11 cm -3 Less than 1×10, more preferably 10 cm -3 Less than 1 x 10 -9 cm - 3 In addition, in order to reduce the carrier concentration of the oxide semiconductor film, The impurity concentration in the semiconductor film may be reduced to reduce the defect state density. A low impurity concentration and a low defect level density are called high purity intrinsic or substantially high purity intrinsic. Note that the oxide semiconductor having a low carrier concentration is preferably a high-purity intrinsic or substantially high-purity intrinsic oxide. These are sometimes called compound semiconductors.

[0288] In addition, a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a low density of defect states. Therefore, the trap level density may be low.

[0289] In addition, the time required for the charge trapped in the trap level of the oxide semiconductor to disappear is Therefore, the trap level density is high. A transistor in which a channel formation region is formed in an oxide semiconductor has unstable electrical characteristics. There may be cases where this occurs.

[0290] Therefore, in order to stabilize the electrical characteristics of a transistor, the impurity concentration in the oxide semiconductor In order to reduce the impurity concentration in the oxide semiconductor, It is preferable to reduce the impurity concentration in the adjacent film. These include alkali metals, alkaline earth metals, iron, nickel, and silicon.

[0291] <Impurities> Here, the influence of each impurity in an oxide semiconductor will be described.

[0292] When oxide semiconductors contain silicon or carbon, which is one of the group 14 elements, they become oxidized. Defect levels are formed in oxide semiconductors. The concentration of silicon and carbon near the interface with the oxide semiconductor (secondary ion mass spectrometry) (SIMS: Secondary Ion Mass Spectrometry) The concentration that can be obtained is 2 x 10 18 atoms / cm 3 Less than or equal to 2 x 10 17 a toms / cm 3 The following applies.

[0293] In addition, when an oxide semiconductor contains an alkali metal or an alkaline earth metal, a defect level is formed. Therefore, when alkali metals or alkaline earth metals are included, Transistors using oxide semiconductors, which are widely used in semiconductor manufacturing, tend to be normally on. Therefore, the concentration of alkali metals or alkaline earth metals in oxide semiconductors obtained by SIMS Degrees, 1×10 18 atoms / cm 3 Less than or equal to 2 x 10 16 atoms / cm 3 To the following:

[0294] In addition, when nitrogen is contained in an oxide semiconductor, electrons that serve as carriers are generated, and As a result, the nitrogen-containing oxide semiconductor is easily converted to n-type. The transistor used for the oxide semiconductor tends to be normally on. In addition, when nitrogen is contained, trap states may be formed. Therefore, the electrical properties of the oxide semiconductor obtained by SIMS may become unstable. The nitrogen concentration in 19 atoms / cm 3 Less than 5 x 10 18 ato ms / cm 3 Less than or equal to 1×10 18 atoms / cm 3 The following is more preferable: 5×10 17 atoms / cm 3 To the following:

[0295] In addition, hydrogen contained in oxide semiconductors reacts with oxygen that bonds with metal atoms to form water. When hydrogen enters the oxygen vacancy, the carrier, In some cases, hydrogen atoms are formed by bonding with oxygen atoms that bond with metal atoms. Therefore, it is necessary to use an oxide semiconductor that contains hydrogen. Therefore, the hydrogen in the oxide semiconductor tends to cause a transistor to be normally on. It is preferable that the Si content in the oxide semiconductor is as low as possible. The hydrogen concentration obtained by MS is 1×10 20 atoms / cm 3 Less than 1x, preferably 10 19 atoms / cm 3 less than 5×10 18 atoms / cm 3 less than , and more preferably 1×10 18 atoms / cm 3 Make it less than.

[0296] By using an oxide semiconductor in which impurities are sufficiently reduced for a channel formation region of a transistor, This makes it possible to impart stable electrical characteristics.

[0297] The configuration, structure, method, etc. described in this embodiment may be the same as the configuration, structure, method, etc. described in other embodiments. It can be used in appropriate combination.

[0298] (Embodiment 5) In this embodiment, a display device having a freely shaped display region according to one embodiment of the present invention can be used. This paper describes a head-mounted display that can be used in a variety of situations.

[0299] The display device of one embodiment of the present invention can be used as a display portion of a head mounted display. Therefore, a head mounted display with high display quality can be realized. This allows for the realization of extremely high-definition head-mounted displays. This makes it possible to realize a wide-area mounted display.

[0300] The display device of the head mounted display may have an antenna. By receiving a signal via the antenna, images and information can be displayed on the display unit.

[0301] In addition, the head mounted display uses sensors (force, displacement, position, velocity, acceleration, angular velocity, degree, rotation speed, distance, light, liquid, magnetism, temperature, chemicals, sound, time, hardness, electric field, current, Includes the ability to measure pressure, power, radiation, flow, humidity, gradient, vibration, odor or infrared The sensor may be a MEMS.

[0302] The head mounted display can have various functions. For example, The function to display information (still images, videos, text images, etc.) on the display unit, touch panel function, Render, display date or time, etc., run various software (programs) functions, wireless communication functions including 5G communications, and programs recorded on recording media Or, it may have a function of reading out data.

[0303] Furthermore, in a head mounted display having a plurality of display units, A function that displays mainly image information on one display unit and mainly displays text information on another display unit, Or a function to display a stereoscopic image by displaying an image that takes parallax into account on multiple displays. Furthermore, in a head mounted display having an image receiving unit, A function to automatically or manually correct the captured image. A function to store the captured image on a recording medium (external or built into the head-mounted display) The present invention can have a function of displaying a captured image on a display unit. The functions of the head mounted display are not limited to these, and may have a variety of functions. It is possible.

[0304] The display device of one embodiment of the present invention can display an extremely high-definition image. Head-mounted displays are used in VR (Virtual Reality) devices and AR The present invention can be suitably used in Augmented Reality (Augmented Reality) and the like.

[0305] FIG. 18A shows the appearance of head mounted display 860.

[0306] The head mounted display 860 includes a mounting part 861, a lens 862, a main body 863, and a surface The mounting portion 861 has a display unit 864, a cable 865, etc. It is built in.

[0307] A cable 865 supplies power from a battery 866 to the main body 863. The device is equipped with a line receiver and the like, and can display image information such as received image data on the display unit 864. In addition, a camera installed in the main body 863 captures the movement of the user's eyeballs and eyelids, By calculating the coordinates of the user's line of sight based on the information, the user's line of sight can be used as an input means. It can be used.

[0308] Furthermore, the mounting section 861 may be provided with a plurality of electrodes at positions that come into contact with the user. The main body 863 detects the current flowing through the electrodes in accordance with the movement of the user's eyeball, The electrode may have a function of recognizing the line of sight of the wearer. In addition, the mounting part 861 may have a function of monitoring the pulse of the user. The device may have various sensors such as a temperature sensor, a pressure sensor, and an acceleration sensor. The display unit 864 may have a function to display biological information. etc., and the image displayed on the display unit 864 may be changed in accordance with that movement.

[0309] The display device of one embodiment of the present invention can be applied to the display portion 864.

[0310] 18B and 18C show the external appearance of head mounted display 870.

[0311] The head mounted display 870 includes a housing 871, two display units 872, and an operation button. 873 and a band-shaped fastener 874.

[0312] The head mounted display 870 has the same structure as the head mounted display 860. In addition to its functionality, it is equipped with two displays.

[0313] By having two displays 872, the user can see one display per eye. This allows high-resolution images to be displayed even when performing 3D display using parallax. The display unit 872 can display an image in an arc shape with the user's eye as the approximate center. This ensures that the distance from the user's eyes to the display surface is constant. In addition, the brightness and chromaticity of the light coming from the display can be seen more clearly. Even if the angle of the display changes, the display is used in the normal direction to the display surface. Since the subject's eyes are located at the same distance from the camera, the effect of the camera can be virtually ignored, resulting in a more realistic appearance. It is possible to display the image.

[0314] The operation button 873 has functions such as a power button. It may have a tan.

[0315] As shown in FIG. 18D, a lens 87 is provided between the display unit 872 and the position of the user's eyes. 5. The lens 875 allows the user to magnify the display 872. This increases the sense of realism. At this time, as shown in FIG. 18D, The lens may have a dial 876 that changes the position of the lens.

[0316] The display device of one embodiment of the present invention can be applied to the display portion 872. The display device has extremely high definition, so it is magnified using a lens 875 as shown in FIG. 18D. Even if the pixels are not visible to the user, a more realistic image can be displayed. can be done.

[0317] Note that the display unit 872 in FIG. 18B to FIG. 18D is not limited to a shape surrounded by two opposing sides. The shape of the display unit 872 can be selected from various shapes depending on the size and structure of the housing. For example, it may have an elliptical shape. For example, the shape shown in FIG. 18A A display device that matches the shape of the lens 862 may be provided.

[0318] 19A and 19B show an example in which one display unit 872 is provided. With such a configuration, the number of parts can be reduced.

[0319] The display unit 872 has two areas, one on the left and one on the right, each of which displays an image for the right eye and an image for the left eye. This allows the display of stereoscopic images using binocular parallax. This can be done.

[0320] Alternatively, a single image that can be viewed by both eyes may be displayed across the entire area of ​​the display unit 872. This makes it possible to display panoramic images across both ends of the field of view, The realization grows.

[0321] The above-mentioned lens 875 may be provided. The display unit 872 displays two images side by side. Alternatively, one image may be displayed on the display unit 872 and viewed by both eyes through the lens 875. The same image may be viewed on both the front and rear monitors.

[0322] In addition, the display unit 872 does not have to be curved, and the display surface may be flat. For example, 19C and 19D show an example in which a single display unit 872 does not have a curved surface. is.

[0323] The configuration, structure, method, etc. described in this embodiment may be the same as the configuration, structure, method, etc. described in other embodiments. It can be used in appropriate combination.

[0324] (Embodiment 6) In this embodiment, an application example of the display device having the above-mentioned freely shaped display area will be described. Reveal.

[0325] [Electronic equipment] Next, an electronic device equipped with a display device having a freely shaped display area according to one embodiment of the present invention. An example of the above will be described.

[0326] As an electronic device using a display device having a freely shaped display area according to one embodiment of the present invention, , televisions, monitors and other display devices, lighting devices, desktop or notebook personal computers Computers, word processors, DVDs (Digital Versatile Di sc) and other recording media for playing still or moving images, CD players, radios, tape recorders, headphone stereos, stereos, table clocks, wall Wall clocks, cordless telephone handsets, transceivers, mobile phones, car phones, portable game consoles , tablet devices, large game machines such as pachinko machines, calculators, portable electronic devices ("mobile phones"), (also called "portable electronic devices"), electronic organizers, e-book terminals, electronic translators, voice input devices, video digital still cameras, electric shavers, microwave ovens and other high-frequency heating devices, Rice cookers, electric washing machines, vacuum cleaners, water heaters, electric fans, hair dryers, air conditioners , air conditioning equipment such as humidifiers and dehumidifiers, dishwashers, dish dryers, clothes dryers, futon dryers, Electric refrigerators, electric freezers, electric refrigerator-freezers, freezers for storing DNA, flashlights, chainsaws tools, smoke detectors, medical equipment such as dialysis machines. Traffic lights, conveyor belts, elevators, escalators, industrial robots, power storage systems The control units of industrial equipment, such as power storage devices for power leveling and smart grids, are equipped with Examples of such devices include display devices.

[0327] In addition, display devices having a freely shaped display area include head mounted displays, smartphones, etc. watches, vital information measuring devices, helmets, clothing, digital signage displays It can be incorporated into wearable electronic devices such as sprayers.

[0328] In addition, a display device having a free-form display area can be mounted on the interior or exterior walls of a house or building. It can be installed along a wall or curved surface in the interior or exterior of a vehicle.

[0329] In addition, moving objects propelled by electric motors using power from a power storage device are also included in the category of electronic devices. The above-mentioned moving body includes, for example, an electric vehicle (EV), an internal combustion engine, and Hybrid electric vehicles (HEV) and plug-in hybrid electric vehicles (PHEV) These tires and wheels are converted into tracks, and motorized vehicles including electric-assisted bicycles Bicycles, motorcycles, electric wheelchairs, golf carts, small or large boats, submarines, helicopters Examples include supercomputers, aircraft, rockets, satellites, space probes, planetary probes, and spacecraft. do.

[0330] In addition, the display device of the electronic device preferably has an antenna. By receiving a signal through the antenna, images and information can be displayed on the display. Therefore, the display device according to one embodiment of the present invention can be used as a communication device or the like built into these electronic devices. can be used.

[0331] In addition, the display device of the electronic device described above may include a sensor (force, displacement, position, velocity, acceleration, etc.) Degrees, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemicals, sound, time, hardness, electric field, Devices that measure current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor, or infrared rays The sensor may have a function of detecting a magnetic field, etc. It is preferable that the sensor is a MEMS. stomach.

[0332] Electronic devices can have various functions. For example, they can store various information (still images, videos, Functions for displaying text images, etc. on the display, touch panel function, calendar, date, or It has the function of displaying the time, the function of running various software (programs), and 5G wireless communication function, including communication by wireless communication, reading programs or data recorded on recording media It may have the function of outputting a signal.

[0333] 20A to 20F show an example of an electronic device. The display device of one embodiment of the present invention can be used as the display device or the display portion.

[0334] FIG. 20A shows an example of a wristwatch-type portable electronic device. The portable electronic device 6100 has a housing 6 101, a display unit 6102, a band 6103, and an operation button 6105. The portable electronic device 6100 includes a secondary battery and a semiconductor device or The semiconductor device or electronic component according to one embodiment of the present invention is provided in the portable electronic device 61. 00, the portable electronic device 6100 can function as an IoT device. do.

[0335] FIG. 20B shows an example of a mobile phone. A mobile phone 6200 has a housing 6201. In addition to the built-in display unit 6202, operation buttons 6203, a speaker 6204, a microphone It is equipped with a 6205 and other models.

[0336] The mobile phone 6200 also includes a fingerprint sensor 6209 in an area overlapping the display unit 6202. The fingerprint sensor 6209 may be an organic optical sensor. Therefore, the fingerprint sensor 6209 can obtain a fingerprint pattern and perform personal authentication. The light emitted from the display unit 6202 is used as a light source for acquiring a fingerprint pattern by the sensor 6209. The light thus obtained can be used.

[0337] The mobile phone 6200 includes a secondary battery and a semiconductor device according to one embodiment of the present invention. The semiconductor device or electronic component according to one aspect of the present invention may be a mobile phone. By using the above-mentioned in the mobile phone 6200, the mobile phone 6200 can function as an IoT device. can.

[0338] FIG. 20C shows an example of a cleaning robot. The cleaning robot 6300 includes a housing 630 1, a display unit 6302 arranged on the top surface, a plurality of cameras 6303 arranged on the side, and a brush 6 304, an operation button 6305, various sensors, etc. The cleaning robot 6300 is equipped with tires, a suction port, etc. It moves, detects dirt 6310, and sucks the dirt from the suction port on the bottom. Cut.

[0339] For example, the cleaning robot 6300 analyzes the image captured by the camera 6303 and detects walls, furniture, etc. It can also determine whether there are obstacles such as steps. When an object that is likely to get tangled in the brush 6304 is detected, the rotation of the brush 6304 is stopped. The cleaning robot 6300 includes a secondary battery and a battery according to one embodiment of the present invention. The semiconductor device or electronic component according to one aspect of the present invention is provided. By using it with the Cleaning Robot 6300, the Cleaning Robot 6300 can function as an IoT device. It can be done.

[0340] FIG. 20D shows an example of a robot. The robot 6400 shown in FIG. Device 6409, illuminance sensor 6401, microphone 6402, upper camera 6403, A peaker 6404, a display unit 6405, a lower camera 6406 and an obstacle sensor 6407, It is equipped with a moving mechanism 6408.

[0341] The microphone 6402 has the function of detecting the user's voice, environmental sounds, and the like. The speaker 6404 has a function of emitting sound. The phone 6402 and the speaker 6404 can be used to communicate with the user. It is possible.

[0342] The display unit 6405 has a function of displaying various information. The display unit 6405 can display information desired by the user. The display unit 6405 may be a removable electronic device. By placing it in a fixed position on the robot 6400, charging and data transfer can be performed. This makes it possible.

[0343] The upper camera 6403 and the lower camera 6406 capture images of the surroundings of the robot 6400. The obstacle sensor 6407 also detects the obstacles of the robot 64 using the moving mechanism 6408. Robot 6 can detect the presence or absence of obstacles in its path as it moves forward. 400 uses an upper camera 6403, a lower camera 6406, and an obstacle sensor 6407. The light-emitting device according to one embodiment of the present invention can recognize the surrounding environment and move safely. can be used for the display portion 6405.

[0344] The robot 6400 includes a secondary battery and a semiconductor device or The semiconductor device or electronic component according to one embodiment of the present invention is provided to a robot 6400. By using this, the robot 6400 can function as an IoT device.

[0345] FIG. 20E shows an example of an aircraft. The aircraft 6500 shown in FIG. 20E has a propeller 6501, a camera 6502, and a battery 6503, and has the function of flying autonomously. has.

[0346] For example, image data captured by the camera 6502 is stored in the electronic component 6504. The child part 6504 analyzes image data and detects the presence or absence of obstacles when moving. Also, the electronic component 6504 can detect the change in the storage capacity of the battery 6503. The flying object 6500 has a battery remaining capacity of 1000A according to an embodiment of the present invention. The semiconductor device or electronic component according to one aspect of the present invention includes a semiconductor device or electronic component. By using this in the Air Vehicle 6500, the Air Vehicle 6500 can function as an IoT device. can be done.

[0347] FIG. 20F shows an example of a car. The car 7160 has an engine, tires, brakes, and other components. The car 7160 has a brake, a steering device, a camera, etc. The present invention relates to a semiconductor device or electronic device. By using this product in a car 7160, the car 7160 can function as an IoT device. This can be done.

[0348] The configuration, structure, method, etc. described in this embodiment may be the same as the configuration, structure, method, etc. described in other embodiments. It can be used in appropriate combination. [Explanation of symbols]

[0349] : ANT1: Antenna area, ANT2: Antenna area, C1: Capacitance, C2: Capacitance, CK1 : Input terminal, CK2: Input terminal, d1: Distance, d2: Distance, L1: Layer, L1A: Layer, L1 B: Layer, L2: Layer, L2A: Layer, L2B: Layer, ND2: Node, ND3: Node, Pix 1: pixel, Pix2: pixel, Sen1: sensor, Sen2: sensor, 10: display device, 1 0A: display device, 10B: display device, 10C: display device, 20: sensor, 20A: source driver, 20A1: output terminal, 20B: source driver, 20B1: output terminal, 20C : sensor, 20C1: sensor, 20C2: sensor, 20D: transmitter / receiver, 20D1: transmitter / receiver receiving device, 20D2: transmitting / receiving device, 30: timing controller, 30a: output terminal, 4 0: pixel, 40A: pixel, 40B: pixel, 40D: circuit, 40D1: circuit, 40D2: circuit 41: light emitting element; 42: transistor; 42a: transistor; 43: transistor , 44: transistor, 45: wiring, 45b: wiring, 46: wiring, 48: wiring, 48a: Wiring, 48g: Wiring, 49: Wiring, 49a: Wiring, 49b: Wiring, 51a: Electrode, 51b : electrode, 51c: electrode, 55a: plug, 55b: plug, 55c: plug, 55d: plug Lug, 55e: plug, 57a: plug, 57b: plug, 57c: plug, 58: space , 59: bump, 59a: bump, 59b: bump, 59c: bump, 61a: electrode, 6 1b: electrode, 61c: electrode, 61d: electrode, 61e: electrode, 63a: plug, 63b: plug lug, 63c: plug, 72: insulating layer, 74: insulating layer, 76: insulating film, 78: insulating film, 8 1: transistor, 82: transistor, 83: transistor, 84: transistor, 8 5: transistor, 86: transistor, 87: transistor, 88: transistor, 8 9: transistor, 90: transistor, 91: transistor, 94: capacitance, 95: capacitance , 96: Capacitance, 100: Electronic device, 100A: Board, 100B: FPC, 100C: Control Device, 101A: bump, 101B: bump, 110: display area, 404: insulator, 50 0: transistor, 500A: transistor, 500B: transistor, 503: conductor , 503a: conductor, 503b: conductor, 512: insulator, 513: insulator, 514: insulator Insulator, 516: Insulator, 520: Insulator, 522: Insulator, 524: Insulator, 530: Acid 530a: oxide, 530b: oxide, 540a: conductor, 540b: conductor, 42: Conductor, 542a: Conductor, 542b: Conductor, 543a: Area, 543b: Area , 544: insulator, 545: insulator, 550: transistor, 552: insulator, 560: Conductor, 560a: Conductor, 560b: Conductor, 574: Insulator, 580: Insulator, 58 1: insulator, 860: head mounted display, 861: mounting part, 862: lens, 863: Main unit, 864: Display unit, 865: Cable, 866: Battery, 870: Head Mount display, 871: housing, 872: display unit, 873: operation button, 874: Fixture, 875: Lens, 876: Dial, 900: Radio transmitter / receiver, 900A: Radio transmitter Receiver, 901: low noise amplifier, 902: bandpass filter, 903: mixer, 90 4: bandpass filter, 905: demodulator, 906: decoder circuit, 911: power amplifier 912: bandpass filter, 913: mixer, 914: bandpass filter, 91 5: Modulator, 916: Decoder circuit, 921: Shared device, 922: Local oscillator, 931: A Antenna, 941: Signal, 942: Signal, 943: Signal, 944: Signal, 6100: Mobile phone Child device, 6101: housing, 6102: display unit, 6103: band, 6105: operation buttons 6200: mobile phone, 6201: housing, 6202: display unit, 6203: operation button, 6204: Speaker, 6205: Microphone, 6209: Fingerprint sensor, 6300: Sweeper Removal robot, 6301: housing, 6302: display unit, 6303: camera, 6304: brush ,6305: Operation button, 6310: Garbage, 6400: Robot, 6401: Illuminance sensor ,6402: Microphone, 6403: Upper camera, 6404: Speaker, 6405: Display unit, 6406: lower camera, 6407: obstacle sensor, 6408: moving mechanism, 640 9: Calculation unit, 6500: Aircraft, 6501: Propeller, 6502: Camera, 6503: Batteries, 6504: Electronic Components, 7160: Automotive

Claims

[Claim 1] A display device having a first layer and a second layer, the first layer includes a source driver; the second layer includes a gate driver, a plurality of pixels, and an antenna; Either one or both of the gate driver and the plurality of pixels are formed in a region overlapping with the antenna, the first layer has a first terminal and a third terminal; the first terminal is electrically connected to the source driver; The pixel is provided on a first surface of the second layer, a second terminal is provided on a second surface opposite to the first surface; the second terminal is electrically connected to the pixel; the first terminal is electrically connected to the second terminal; The third terminal of the display device is electrically connected to an end of the antenna.

Images