Substrate and electronic device
The substrate design for flexible printed circuit boards, featuring a higher solder contact angle covering portion, addresses the challenges of short circuits, solder usage, and bump height by enabling controlled solder distribution and increased reliability.
Patent Information
- Application Number
- JP2023150764
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-09-19
- Publication Date
- 2025-04-01
AI Technical Summary
Flexible printed circuit boards used in hard disk drives face challenges in achieving high reliability, suppressing short circuits between solder bumps, reducing solder usage, and maintaining desired solder bump heights due to narrowing pitch.
A substrate design that includes a wiring pattern covered by an insulating member with openings for solder bump formation, and a covering portion with a higher solder contact angle than the bump forming portion, allowing for controlled solder distribution and increased bump height while reducing solder usage.
The solution effectively reduces solder usage, maintains desired solder bump heights, and suppresses short circuits between adjacent solder bumps, even as pitch narrows, thereby enhancing the reliability and manufacturing quality of flexible printed circuit boards.
Smart Images

Figure 2025043471000001_ABST
Abstract
Description
[Technical field]
[0001] The present embodiment relates to a substrate and an electronic device. [Background technology]
[0002] In recent years, there has been a demand for high-density mounting technology to accommodate the increased capacity of printed circuit boards mounted on hard disk drives (HDDs). In particular, flexible printed circuit boards (FPCs), which electrically connect the magnetic head to a printed circuit board containing a control circuit or drive circuit, and which also contain a preamplifier IC that amplifies the signal from the magnetic head, are subject to strict geometric constraints, and the increasing number of pins and size of preamplifier ICs makes them more difficult to mount. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Japanese Patent Application Publication No. 9-283908 [Patent Document 2] Japanese Patent Application Publication No. 2-140936 Summary of the Invention [Problem to be solved by the invention]
[0004] For this reason, it is desirable for flexible printed circuit boards to achieve high reliability while taking into consideration manufacturing quality, mountability, and the like. More specifically, flexible printed circuit boards have a large number of solder bumps formed for electrically connecting the magnetic head, and it is desirable to prevent short circuits between adjacent solder bumps, reduce the amount of solder used, and ensure the desired solder bump height in response to narrower pitches.
[0005] The present invention has been made in consideration of the above, and aims to provide a substrate and electronic device that can accommodate narrower pitches of solder bumps while reducing the amount of solder used and ensuring the desired solder bump height. [Means for solving the problem]
[0006] The substrate of the embodiment includes a base material, a wiring pattern provided on the base material, an insulating member covering the base material and the wiring pattern and having an opening corresponding to a bump formation portion of the wiring pattern, and a covering portion formed of a material having a larger contact angle of solder at the opening than the bump formation portion, and covering a portion of the bump formation portion. [Brief description of the drawings]
[0007] [Figure 1] FIG. 1 is an explanatory diagram of a flexible substrate assembly for a HDD according to an embodiment. [Diagram 2] FIG. 2 is a schematic perspective view of the appearance of a solder bump portion. [Diagram 3] FIG. 3 is an explanatory diagram (part 1) of the formation of solder bumps. [Figure 4] FIG. 4 is an explanatory diagram (part 2) of the formation of solder bumps. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0008] Next, the embodiment will be described in detail with reference to the drawings. Prior to describing the embodiments, problems with the prior art will be described. Conventionally, HDDs have achieved high density and high reliability boards by implementing optimized design and then conducting reliability verification.
[0009] The flexible substrates used in HDDs are equipped with a SoC (System on a Chip) that incorporates multiple CPUs, a signal processing circuit for analog signals read from multiple magnetic heads, a host interface circuit, etc., memory devices such as DRAM, and a motor driver IC that drives the spindle motor and voice coil motor.
[0010] Furthermore, the flexible substrate is equipped with a preamplifier IC that connects the magnetic head and writes and reads data using the magnetic head. In addition, flexible substrates are required to have good flexibility against the repeated bending motions caused by the high-speed seek operations of HDDs, as well as durability and cleanliness that does not emit dust.
[0011] In recent years, in order to realize even larger capacities for HDDs, the number of magnetic disks and magnetic heads has been increased and technologies such as Two Dimensional Magnetic Recording (TDMR) and Microwave Assisted Magnetic Recording (MAMR) have been incorporated. From this perspective, it is desirable to further suppress short circuits between adjacent solder bumps, reduce the amount of solder used, and ensure the desired solder bump height in response to narrower pitches.
[0012] FIG. 1 is an explanatory diagram of a flexible substrate assembly for a HDD according to an embodiment. 1A is a front view of a flexible substrate assembly, and FIG 1B is a rear view of the flexible substrate assembly. The flexible substrate assembly 10 includes a flexible substrate 11, a first support plate 12, a second support plate 13, and a third support plate 14.
[0013] In this configuration, the first support plate 12 is fixed to a predetermined position near the magnetic head inside the housing of the HDD device, the second support plate 13 is disposed at a predetermined position inside the housing of the HDD device, and the third support plate 14 is fixed to a predetermined position near the controller board of the HDD device.
[0014] The flexible substrate 11 includes a head portion 11-1, a wiring pattern portion 11-2, and a base portion 11-3. The head section 11-1 includes an amplifier connection terminal section 21 in which a preamplifier IC is disposed, and a solder bump formation section 22 in which a plurality of solder bumps to which terminal groups of connection cables of a plurality of magnetic heads are connected are formed.
[0015] More specifically, the solder bump forming portion 22 has terminal groups 25 corresponding to the number of connectable magnetic heads (20 in the example of Fig. 1). In the example of Fig. 1, the terminal groups 25 extend in the vertical direction, and each terminal group 25 has solder bump portions (terminal portions) 26 in a number corresponding to the number of functions of the magnetic heads. For example, each of the terminal groups 25 has ten solder bump portions 26 .
[0016] The wiring pattern section 11-2 has a wiring pattern (not shown) made of copper foil covered with a coverlay film, and electrically connects the wiring pattern of the head section 11-1 and the wiring pattern of the base section 11-3. The base portion 11-3 has connection terminals (not shown) for connecting to a controller board of the HDD device and the like arranged thereon.
[0017] FIG. 2 is a schematic perspective view of the appearance of a solder bump portion. The solder bump portion 26 is formed on the flexible substrate 11 as shown in FIG. Specifically, the solder bump portion 26 is formed by providing a base material 11A constituting the flexible substrate 11 and a wiring pattern 11B made of copper foil or the like on the base material 11A.
[0018] The material of the base material 11A is a resin film such as a polyimide film or a PET film.
[0019] A base film 11C serving as an insulating member is provided on the substrate 11A. This base film 11C covers the substrate 11A and the wiring pattern 11B, and has openings 11C1 formed therein corresponding to bump formation portions 11B1 of the wiring pattern 11B. The base film 11C is made of a resin film such as a polyimide film or a PET film.
[0020] The wiring pattern 11B uses, for example, a copper thin film as a conductor. Furthermore, the wiring pattern 11B, except for the opening 11C1, and a part of the base film 11C are formed of a material having a larger contact angle with solder than the bump formation portion 11B1 (a material having lower wettability with solder than the bump formation portion 11B1), i.e., a material having a larger contact angle (lower wettability) than the material of the wiring pattern 11B, and are provided with a coverlay film 11D that functions as a covering portion 11D1 that covers a part of the bump formation portion 11B1.
[0021] 2, the bump formation portion 11B1 has a rectangular shape in a plan view. Parts of the coverlay film 11D function as covering portions 11D1, and are provided at both ends in the longitudinal direction of the bump formation portion 11B1 (the upper left portion and the lower right portion of the bump formation portion 11B1 in the example of FIG. 2).
[0022] Furthermore, the cover portion 11D1 has a convex shape extending from both ends of the bump formation portion 11B1 in the longitudinal direction toward the center of the bump formation portion 11B1. In the example of FIG. 2, the planar shape of the cover portion 11D1 is triangular.
[0023] The covering portion 11D1 is formed by punching the coverlay film 11D or cutting the coverlay film 11D with a cutter before attaching the coverlay film 11D, or by cutting the coverlay film with a laser cutter.
[0024] Here, the planar shape of the cover portion 11D1 only needs to be a convex shape that is convex from both ends of the bump formation portion 11B1 in the longitudinal direction toward the center of the bump formation portion 11B1, and is not limited to a triangular shape as shown in FIG. 2, but may be a polygonal shape, a semicircular shape, a semielliptical shape, or any other shape.
[0025] In the above description, the covering portion 11D1 is formed integrally with the coverlay film 11D, which is an insulating member; however, it is also possible to form the covering portion 11D1 separately from the coverlay film 11D, which is an insulating member, using a material that has a larger contact angle with solder (lower wettability) than the wiring pattern 11B and is made of a different material from or the same material as the coverlay film 11D, which is an insulating member.
[0026] Here, the formation of the solder bumps will be described. FIG. 3 is an explanatory diagram (part 1) of the formation of solder bumps. Fig. 3(A) is a plan view of the solder paste application in the solder bump formation of the embodiment, Fig. 3(B) is a cross-sectional view taken along line AA in Fig. 3(A), and Fig. 3(C) is a plan view of the solder paste application in the conventional solder bump formation.
[0027] The solder bumps are formed by a screen printing method. More specifically, solder paste SP is supplied to a metal mask (printing mask), and the mask is lifted up to form the solder paste SP on the bump formation portion 11B1 of the flexible substrate 11, as shown in FIGS. 3(A) and 3(B).
[0028] In this case, as shown in FIG. 3(B), the solder paste SP is applied onto the covering portion 11D1 in the portion where the covering portion 11D1 is formed, which is different from the conventional case shown in FIG. 3(C) where the solder paste SP is applied to the entire area on the wiring pattern constituting the bump forming portion 11B1.
[0029] Then, a reflow oven is used to form solder bumps. In this case, examples of the heating method in the reflow furnace include hot air heating, infrared heating, and steam heating. In order to maintain a uniform temperature inside the furnace and prevent excessive heating, it is also possible to combine a plurality of heating methods.
[0030] More specifically, in a reflow furnace, the temperature is raised while volatilizing the solvent contained in the solder paste, and preheating is performed to maintain a constant temperature at which the flux (solder auxiliary) is easily activated.
[0031] FIG. 4 is an explanatory diagram (part 2) of the formation of solder bumps. FIG. 4A is a plan view of the embodiment during the formation of the solder bump portion, and FIG. 4B is a cross-sectional view taken along the line AA of FIG. 4A.
[0032] Following the preheating, the main heating is carried out, in which the temperature of the flexible board and mounted components is raised uniformly until the temperature reaches the point where the solder melts.
[0033] As a result, the solder paste SP is completely liquefied, and the liquefied solder gradually becomes spherical due to surface tension.
[0034] In this case, as explained in FIG. 3(C), conventionally, solder paste SP is applied to all areas on the wiring pattern constituting bump formation portion 11B1, and therefore the contact angle of the solder in the areas where solder paste SP is applied is the same, so that the solder bump is formed simply according to the contact angle of the wiring pattern constituting solder bump formation portion 11B1.
[0035] In contrast, according to the embodiment, the contact angle of the covering portion 11D1, which is part of the coverlay film 11D, is larger than the contact angle of the wiring pattern 11B, so that when the solder paste SP applied to the covering portion 11D1 melts, more solder is repelled.
[0036] In other words, the molten solder moves to the center of the bump formation portion 11B1 and ultimately to the upper portion of the bump formation portion 11B1, and with the same amount of solder paste SP, the solder bump SB is formed to be taller than when the covering portion 11D1 is not provided.
[0037] In this case, if the height of the solder bumps SB is made the same as in the conventional method, it is possible to use less solder than in the conventional solder bump forming method. After the solder bumps are formed into the desired shape, they are cooled by blowing air.
[0038] Furthermore, once the formation of the solder bumps is complete, flux cleaning is performed to remove the flux, since it is undesirable from the standpoint of reliability for flux residue to remain on the flexible substrate. As a result, it is possible to form solder bumps that can accommodate narrower pitches of the solder bumps while reducing the amount of solder used and ensuring a desired solder bump height.
[0039] The above description has been a qualitative description of the formation of solder bumps, but the effects of the embodiment will now be described more specifically. In the following, in order to explain the effects of the embodiment, the results of a simulation performed on the formation of solder bumps will be described. In this case, the simulation model used is as follows: The composition of the solder was Sn-3.0Ag-0.5Cu. The density of solder is 7400 [g / m 3 ]. The surface tension of the solder was set to 500 mN / m. The thickness of the solder paste was 108.5 μm, and the transfer rate was 100%.
[0040] The thickness of the wiring pattern (conductive material) was set to 12 μm, and the contact angle was set to 10 degrees. The thickness of the coverlay film was 12.5 μm, and the contact angle was 160 degrees. The thickness of the base film was 12.5 μm, and the contact angle was 160 degrees. The thickness of the adhesive layer was 15 μm, and the contact angle was 160 degrees.
[0041] (First simulation) First, a simulation (first simulation) was performed to check whether the method of the embodiment can form a solder bump with a higher height than the conventional method when the mounting area of the solder bump is the same. In the first simulation, the shape of the conventional (comparison) solder bump formation portion is rectangular as shown in FIG. 3(C), the dimensions are 0.1463 mm×0.382 mm, and the area is 0.0559 mm. 2 It was. The shape of the solder bump formation portion in this embodiment is a rectangular shape with both ends in the longitudinal direction cut out into an isosceles triangle corresponding to the cover portion, as shown in FIG. 3(A) (a drum shape with the short bases of two identical trapezoids abutting against each other). The length of the long base of the trapezoid is 0.450 mm, the height of the isosceles triangle (cutout height) is 0.068 mm, and the area is 0.0559 mm. 2 It was.
[0042] The solder bumps obtained as a result of the simulation were as follows: (conventional solder bumps) Metal solder volume: 9.766×10 -12 mm 3 Bump height: 188 μm Bump width: 243 μm (Solder bumps according to an embodiment) Metal solder volume: 9.753 x 10-12 mm 3 Bump height: 191 μm Bump width: 244 μm That is, according to the embodiment, it is possible to form solder bumps that are taller than those formed by the conventional solder bump forming method with the same mounting area.
[0043] (Second simulation) In the first simulation, the cover portion was triangular in shape, but in the present second simulation, the cover portion was semicircular in shape. In the second simulation, the shape of the conventional (comparison) solder bump formation portion was rectangular, the dimensions were 0.1463 mm × 0.396 mm, and the area was 0.058 mm. 2 It was. The solder bump formation portion in this embodiment has a rectangular shape with both ends in the longitudinal direction cut out in a semicircular shape that corresponds to the cover portion (a spool shape). The length of the base of the solder bump formation portion is 0.450 mm, the radius of the semicircle (cutout height) is 0.038 mm, and the area is 0.058 mm. 2 It was.
[0044] The solder bumps obtained as a result of the simulation were as follows: (conventional solder bumps) Metal solder volume: 9.817 x 10 -12 mm 3 Bump height: 183 μm Bump width: 240 μm (Solder bumps according to an embodiment) Metal solder volume: 9.800 x 10 -12 mm 3 Bump height: 186 μm Bump width: 242 μm That is, according to the embodiment, it is possible to form solder bumps that are taller than those formed by the conventional solder bump forming method with the same mounting area.
[0045] As described above, according to this embodiment, it is possible to provide a substrate and electronic device that can ensure a desired solder bump height while reducing the amount of solder used and accommodating narrower pitches of solder bumps.
[0046] Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included in the scope and spirit of the invention, and are included in the scope of the invention and its equivalents described in the claims. [Explanation of symbols]
[0047] 10 Flexible PCB Assembly 11 Flexible substrate 11-1 Head section 11-2 Wiring pattern section 11-3 Base section 11A Base material 11B Wiring pattern 11B1 Bump forming section 11C Base Film 11D Coverlay Film 11D1 Cover 12 First support plate 13 Second Support Plate 14 Third support plate 21 Amplifier connection terminal 22 Solder bump forming section 25 terminal group 26 Solder bump part 11C1 opening SB solder bump SP solder paste
Claims
1. A substrate; A wiring pattern provided on the substrate; an insulating member covering the base material and the wiring pattern and having an opening corresponding to a bump formation portion of the wiring pattern; a cover portion that is made of a material having a larger contact angle of solder than the bump formation portion in the opening and that covers a part of the bump formation portion; A substrate comprising:
2. The bump formation portion has a rectangular shape, The cover portion is provided at both ends of the bump forming portion in a longitudinal direction. The substrate of claim 1 .
3. The cover portion has a convex shape extending from the end portion toward a center portion of the bump formation portion. The substrate of claim 2.
4. The covering portion has a planar shape of a portion covering the bump forming portion, the planar shape being triangular, polygonal, or semicircular. The substrate according to claim 3 .
5. The cover portion is formed integrally with the insulating member using the same material as the insulating member. The substrate of claim 1 .
6. The cover portion is formed of a material different from that of the insulating member. The substrate of claim 1 .
7. A substrate according to any one of claims 1 to 3; an electronic component connected to a solder bump formed on the bump forming portion; Electronic equipment equipped with
Citation Information
Patent Citations
Solder bump formation
JP1990140936A
Method of forming solder bumps on wiring board
JP1997283908A