Electric power conversion device

Abstract

To reduce power loss of an electric power conversion device comprising a balancer circuit, and downsize the device.SOLUTION: An electric power conversion device converts DC power obtained by rectifying and smoothing AC input power and the DC power from a battery into AC output power by an inverter circuit to supply the power to a load. The electric power conversion device comprises: a rectifying circuit; a smoothing circuit which has high-side and low-side capacitors which are connected in series and smoothes the power after rectification by the rectifying circuit; a balancer circuit which has high-side and low-side switching elements connected in parallel with the high-side and low-side capacitors and balances the voltage of the high-side and low-side capacitors; and a control unit which performs on / off control of the high-side and low-side switching elements. The control unit alternately turns on the high-side and low-side switching elements, and performs the on / off control with a duty ratio independent with each other.SELECTED DRAWING: Figure 6

Description

[Technical field]

[0001] The present invention relates to a power conversion device, and more particularly to a control method for a balancer circuit of a power conversion device. [Background technology]

[0002] Power conversion devices, usually known as uninterruptible power supplies (UPS), are designed to monitor the DC power supply voltage within the device, sound an alarm, and shut down the device, as overvoltages caused by control failures or breakdowns can occur that exceed the withstand voltage of the device's electrolytic capacitors. For this reason, a control circuit (balancer circuit) is provided to prevent the UPS device from stopping due to an abnormality in the DC power supply voltage being detected due to an inconvenience caused by the type of load connected to the UPS device.

[0003] The power conversion device shown in Fig. 6 of Patent Document 1 is an invention that includes such a control circuit (see Fig. 10). This power conversion device realizes stable and continuous operation of the inverter by having a balancing function for two capacitors for unbalanced load characteristics.

[0004] When the load 1 of the inverter output is unbalanced while the system power supply 10 is normal, an unbalanced current flows through the load 1, so this power conversion device controls the voltages of the capacitors 8 and 9 to be the desired voltage values. That is, when there is an unbalanced current in load 1, where current flows on the positive side and no current flows on the negative side, the amount of discharge from capacitor 8 is greater than the amount of discharge from capacitor 9. As a result, a voltage difference occurs between the voltage VC1 of capacitor 8 and the voltage VC2 of capacitor 9, so the power conversion device detects the voltage difference and controls capacitor 8 to charge more.

[0005] In addition, in order to stably operate inverter 26 when system power supply 10 experiences a power outage and load 1 has the above-mentioned unbalanced load characteristics, relay 54 and switches 50, 51 are used as shown in FIG. 11, and further a control circuit shown in FIG. 12 is used to control so that the voltages of capacitors 8 and 9 are stabilized. In other words, the power of battery 11 is passed through switch 31 and diode 32 to charge capacitors 8 and 9 simultaneously with the same power via reactor 12 and relay 24. Therefore, if load 1 has unbalanced load characteristics, the voltages of capacitors 8 and 9 will become unbalanced and unstable.

[0006] For this reason, the control circuit in FIG. 12 turns on and off the switches (SW) 50 and 51 to control so that the voltages of the capacitors 8 and 9 are stabilized. In the block diagram of the control circuit shown in FIG. 12, 70 and 72 are subtractors, 71 and 73 are controllers such as a PI controller, 74 is a comparator, 75 is a triangular wave signal, and 76 is a NOT circuit. The control circuit controls the voltage VC2 of the capacitor 9 to become a command value VC2*.

[0007] 12, a subtractor 70 calculates the error from the command value of voltage VC2, and the calculated value is output to a controller 71. The controller 71 outputs a signal IBAL* corresponding to the calculated value, and a subtractor 72 calculates the error from the command value of current IBAL so that the current IBAL shown in FIG. 11 becomes equal to signal IBAL*, and the calculated value is output to a controller 73. The controller 73 outputs a voltage command VBAL* corresponding to the calculated value, which is compared with a triangular wave signal by a comparator 74. The result is used as an on signal SW50 for switch 50, and the result inverted by a NOT circuit 76 is used as an on signal SW51 for switch 51.

[0008] By configuring such a control circuit, voltage VC2 is controlled to coincide with its command value VC2*. As a result, voltage VC2 is stabilized, and since the sum of voltages VC1 and VC2 is controlled to a desired value, voltage VC1 is also stabilized. Here, when voltage VC1 and voltage VC2 reach an equilibrium state, the on-times of SW50 and SW51 become equal, and the duty ratios (on-time / cycle) of each become 50%. [Prior art documents] [Patent documents]

[0009] [Patent Document 1] JP 2000-278954 A Summary of the Invention [Problem to be solved by the invention]

[0010] In the invention shown in Patent Document 1, the duty ratios of SW50 and SW51 are both 50% at the time of equilibrium. The energy excited in coil 55 at this time passes between the positive and negative power supplies, and thus generates losses such as iron loss, the conductor resistance of coil 55, and the on-resistance of the semiconductor switch. In order to suppress the losses, measures such as keeping the carrier frequency of SW50 and SW51 low and increasing the inductance of coil 55 are necessary, but in order to increase the energy to be compensated, the inductance of coil 55 must be reduced, resulting in a trade-off problem.

[0011] In the conventional technique shown in FIG. 10, the duty ratio of SW50 and SW51 in one period is SW50+SW51=1.0 as shown in FIG. 13, and at equilibrium when the positive and negative DC voltages are balanced, SW50≈SW51≈0.5. In this case, the power P to be commutated through coil 55 is calculated by equation (1) from Ip=Vp / L×Ton and Ton=D / f, where Vp is the voltage applied to coil 55, Ip is the current flowing through the coil, D is the duty ratio of the switching element, L is the inductance of coil 55, and f is the frequency of the switching element. TIFF2025050523000002.tif10141

[0012] If a balancer circuit were to be added to 100% compensate for the power imbalance, a mounting area equivalent to that of one inverter (increasing the size of the device) would be required, and increased component costs would also become an issue. In addition, even when the DC voltages of the positive and negative poles are balanced, the power that moves alternately through the coils is commutated, so the balancer circuit always experiences a loss of approximately 5 to 10% of the maximum allowable power (assuming the device efficiency is around 85%). In view of the above-mentioned problems, an object of the present invention is to reduce the power loss caused by commutation in a balancer circuit and to reduce the size of a power conversion device (balancer circuit). [Means for solving the problem]

[0013] In order to reduce the power generated by the commutation of the balancer circuit and the associated power loss, it is conceivable to reduce the current value Ip of the coil 55 and / or suppress the duty ratio, based on equation (1). The power conversion device targeted by this invention has restrictions on the use of inductive loads and rectifier loads, so it is expected that the current market bottlenecks caused by imbalances can be eliminated by compensating for about 20% of the rated power. Therefore, in order to compensate for approximately 20% of the rated power, the present invention aims to reduce the power loss caused by the commutation of the balancer circuit while downsizing the power conversion device by adopting the following configuration.

[0014] That is, the present invention provides a power conversion device that converts DC power obtained by rectifying and smoothing AC input power and DC power from a battery into AC output power using an inverter circuit and supplies the AC output power to a load, the power conversion device comprising: a rectifier circuit that rectifies the AC input power; a smoothing circuit having high-side and low-side capacitors connected in series and smoothing the power after rectification by the rectifier circuit; a balancer circuit having high-side and low-side switching elements connected in parallel to the high-side and low-side capacitors, respectively, and balancing the voltages of the high-side and low-side capacitors; and a control unit that controls the on / off of the high-side and low-side switching elements, wherein the control unit alternately turns on the high-side and low-side switching elements and controls them on and off with duty ratios that are independent of each other.

[0015] According to this configuration, the high-side and low-side switching elements are alternately turned on and controlled to be turned on and off with duty ratios independent of each other, so that switching loss can be reduced. Specifically, if the duty ratios of both switching elements are fixed when there is a deviation in the capacitor voltage, the switching element on the side where the capacitor voltage is low is also driven, causing power loss, while the switching element is discharged to the capacitor on the opposite side during the on-time even if the capacitor voltage is in a balanced state. In contrast, according to the present invention, the high-side and low-side switching elements are alternately turned on and controlled to be turned on and off with duty ratios independent of each other, so that the power generated by the commutation of the balancer circuit and the associated switching loss can be reduced, and the power conversion device can be made smaller.

[0016] The power conversion device of the present invention is characterized in that one end of the input terminal of the rectifier circuit and one end of the output terminal of the inverter circuit are connected to a connection point of the high-side and low-side capacitors. By configuring the power conversion device in this manner, the neutral line can be shared between the input and output without being insulated, and the device can be made safe, inexpensive, and small.

[0017] The present invention is characterized in that in the balancer circuit, the connection point of the high-side and low-side switching elements is connected to the connection point of the high-side and low-side capacitors via a coil. With this configuration, the charges stored in the two capacitors can be controlled to be equal to each other via the coil. The charges stored in the two capacitors move via the coil, exciting energy to the coil, but as described above, by alternately turning on the high-side and low-side switching elements and controlling their on / off with independent duty ratios, the excitation energy of the coil can be reduced, and the power conversion device can be made smaller.

[0018] In addition, the control unit of the present invention is characterized in that when the voltages of the high-side and low-side capacitors are in a balanced state, the control unit operates both the high-side and low-side switching elements at the lower limit of the duty ratio, and when the voltages of the both capacitors are in an unbalanced state and the duty ratio of one of the switching elements is large, the control unit operates the other switching element at the lower limit of the duty ratio. By configuring in this manner, it is possible to suppress discharge to the capacitor on the opposite electrode side during the on-time of the switching element in a balanced state, and to effectively reduce power loss caused by commutation in the balancer circuit.

[0019] The present invention is also characterized in that a predetermined upper limit is set for the duty ratios of both the high-side and low-side switching elements, and the control unit operates the duty ratios of both switching elements at the upper limit even if the voltages of both the high-side and low-side capacitors are in an unbalanced state. With this configuration, the current flowing through the coil can be reduced, thereby enabling the device to be made more compact.

[0020] Furthermore, the control unit of the present invention is characterized in that when the voltage value of the high-side capacitor or the low-side capacitor becomes equal to or greater than a predetermined value, the control unit reduces the upper limit of the duty ratio of the switching element connected in parallel to the capacitor as the voltage value of the high-side capacitor or the low-side capacitor increases, so that the product of the duty ratio and the voltage value of the switching element connected in parallel to the capacitor becomes constant. This method makes it possible to suppress the current flowing through the coil even if the capacitor voltage rises, making it possible to miniaturize the device. Effect of the Invention

[0021] The balance control method of the present invention makes it possible to reduce power loss due to commutation and to realize a compact device by limiting the current value. [Brief description of the drawings]

[0022] [Figure 1] 1 is a circuit configuration diagram of a power conversion device according to an embodiment of the present invention. [Diagram 2] FIG. 2 is a circuit diagram of the balancer circuit shown in FIG. [Diagram 3] 2 is a circuit diagram of the rectifier circuit shown in FIG. 1. [Figure 4] 2 is a circuit diagram of the inverter circuit shown in FIG. 1. [Diagram 5] 2 is a circuit diagram of the converter circuit shown in FIG. 1. [Figure 6] FIG. 2 is a control block diagram of a balancer circuit; [Figure 7] 4 is a diagram illustrating the relationship between the Q1 control amount and the Q2 control amount of a switching element and a voltage deviation. FIG. [Figure 8] 10 is a diagram for explaining the on / off of two switching elements of a balancer circuit by comparing the Q1 and Q2 control amounts with a triangular wave. FIG. [Figure 9] 11 is a diagram illustrating a limit to an upper limit value of a duty ratio of a switching element due to a voltage rise. FIG. [Figure 10] 1 is a circuit diagram of a power conversion device described in Patent Document 1. [Figure 11] 11 is a diagram for explaining a control circuit during charging using the battery shown in the circuit diagram of FIG. 10. FIG. [Figure 12] FIG. 12 is a control block diagram of a control circuit shown in FIG. [Figure 13] FIG. 4 is a diagram illustrating the on / off state of a switching element of a control circuit. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0023] A power conversion device according to an embodiment of the present invention will be described with reference to FIGS. 1 to 5. FIG. Fig. 1 is a circuit configuration diagram of a power conversion device 1 according to an embodiment of the present invention. Fig. 2 is a circuit diagram of a balancer circuit 2 of the power conversion device 1 shown in Fig. 1, and Fig. 3 is a rectifier circuit 3 shown in Fig. 1. Fig. 4 is an inverter circuit 4 shown in Fig. 1, and Fig. 5 is a converter circuit 5 shown in Fig. 1.

[0024] 1 rectifies AC input power from an AC input power source AC using a rectifier circuit 3, and charges capacitors C1 and C2. Capacitors C1 and C2 form a smoothing circuit that smoothes the rectified power from the rectifier circuit 3, with capacitor C1 being a high-side (positive-side) capacitor and capacitor C2 being a low-side (negative-side) capacitor. The DC voltages VC1 and VC2 charged in the capacitors C1 and C2 are converted to AC voltages by the inverter circuit 4 and supplied to the load.

[0025] The balancer circuit 2 is a circuit that balances the voltages of the high-side and low-side capacitors C1 and C2 so that the voltage VC1 of the capacitor C1 and the voltage VC2 of the capacitor C2 are not unbalanced, that is, it is a circuit that controls so that the difference between the two voltages becomes zero. These voltages are the voltages of the capacitors C1 and C2 based on the potential of the connection point (N line) of the capacitors C1 and C2. Furthermore, the converter circuit 5 is a circuit that charges the capacitors C1 and C2 with DC power from the battery VB when the AC input power source AC fails.

[0026] Although the details of signals between each circuit are not shown, the control unit 6 performs on / off control of the switching elements Q1 and Q2 of the balancer circuit 2 and processes the necessary input / output signals, as well as performs the necessary on / off control of the switching elements Q3 and Q4 of the rectifier circuit 3, the switching elements Q5 and Q6 of the inverter circuit 4, and the switching elements Q11 and Q12 of the converter circuit 5, and processes the input / output signals associated with them. In addition, the current value flowing through the coil and the voltage value applied to the coil are also detected, and the detected current value and voltage value are input to the control unit 6 and used for switching control.

[0027] 2, a switching element Q1 and a switching element Q2 are connected in series, and a coil L1 and a fuse F1 are connected in series from the connection point of the two elements to the connection point of the capacitors C1 and C2. The connection point of the capacitors C1 and C2 is connected to the neutral line (N line). Diodes D1 and D2 are connected in anti-parallel to switching elements Q1 and Q2, respectively.

[0028] Balancer circuit 2 is a well-known push-pull circuit, and when controlling the voltage balance of capacitors C1 and C2, switching element Q1 (high side or positive side) and switching element Q2 (low side or negative side) are turned on alternately, and the duty ratios are controlled independently of each other, thereby achieving low loss and miniaturization by reviewing the ratings of the components used.

[0029] The rectifier circuit 3 shown in FIG. 3 is a circuit that converts AC power from an AC input power source AC into DC power, and is a highly efficient rectifier circuit (power factor correction: PFC) that is composed of a boost converter using a bridgeless non-polar switching circuit and a backflow prevention diode. The ACL line (live side) and N line (neutral side) of the AC input power supply AC are input to the rectifier circuit 3. A capacitor C3 and switching elements Q3 and Q4 connected in series are connected in parallel to the AC input power supply AC between the ACL line and N line of the AC input power supply, and a coil L2 is inserted between the capacitor C3 and the series circuit of the switching elements Q3 and Q4 on the ACL line. Furthermore, diodes D3 and D4 are connected in anti-parallel to the switching elements Q3 and Q4.

[0030] The output of the coil L2 is connected to the anode of the diode D5, and the cathode of the diode D5 is connected to the balancer circuit 2 and the inverter circuit 4 via the DCP line. In addition, the output of the coil L2 is connected to the cathode of the diode D6, and the anode of the diode D6 is connected to the balancer circuit 2 and the inverter circuit 4 via the DCM line on the negative side of the DC voltage.

[0031] The inverter circuit 4 shown in FIG. 4 is a circuit that converts the DC power converted to DC by the rectification and smoothing circuit into AC power and supplies it to a load. It is composed of a half-bridge DC / AC converter and applies a PWM-modulated signal from the control unit 6 to the gates of switching elements Q5 and Q6 to perform power conversion. A current is supplied from the connection point of the switching elements Q5 and Q6 to one end of a capacitor C4 via a coil L3 and one end of the output terminal to a load. The other end of the capacitor C4 is connected to the N line and also to the other end of the output terminal.

[0032] Converter circuit 5 shown in Fig. 5 is a circuit that converts DC power stored in battery VB into AC power when AC input power AC is lost (power outage occurs). Converter circuit 5 is composed of a push-pull resonant boost converter, and converts the low-voltage DC voltage of battery VB into a boosted DC voltage. A transformer is used to convert the single power supply of battery VB into a dual power supply, and the voltage is converted to any desired voltage.

[0033] In the converter circuit 5, the positive side of the battery VB is connected to the midpoint of the primary winding of the transformer T1, one end of switching elements Q11 and Q12 is connected to both ends of the primary winding, and the other end is connected to the negative side of the battery VB. Diodes D11 and D12 are connected in reverse in parallel to the switching elements Q11 and Q12. The midpoint of the secondary winding of the transformer T1 is directly connected to the N line, and one end of the secondary winding is connected to the DCP line through a series connection of a diode D13 and a coil L11. The other end of the secondary winding is connected to the DCM line through a series connection of a diode D14 and a coil L12. One end of the capacitor C12 is connected to the connection point of the diode D13 and the coil L11, and one end of the capacitor C13 is connected to the connection point of the diode D14 and the coil L12, and the other ends of the capacitors C12 and C13 are connected to the N line.

[0034] Here, the N line of the AC input power source AC becomes the midpoint between the positive DC voltage (DCP) and the negative DC voltage (DCM) as it is, and is also connected to the balancer circuit 2 and the inverter circuit 4, and one end of the load also becomes a common line. Specifically, one end of the input terminal of the rectifier circuit 3 and one end of the output terminal of the inverter circuit 4 are connected to the connection point between the high-side capacitor C1 and the low-side capacitor C2 via the N line.

[0035] The rectifier circuit 3, the inverter circuit 4, and the converter circuit 5 are well-known circuits, and detailed description of their operation will be omitted. The balancer circuit 2 is a technology related to the control method of the present invention, and therefore its operation will be described with reference to FIG.

[0036] It is assumed that the voltages of the capacitors C1 and C2 connected to the balancer circuit 2 in FIG. 2 are voltages VC1 and VC2, respectively, and that, for example, voltage VC1 is higher than voltage VC2, causing an imbalance. When switching element Q1 is turned on, current flows from capacitor C1 through switching element Q1 to coil L1, and energy in capacitor C1 is stored in coil L1. When switching element Q1 is turned off, the energy stored in coil L1 is charged to capacitor C2 via capacitor C2, diode D2, and coil L1, and voltage VC2 of capacitor C2 rises. Switching element Q1 is repeatedly turned on and off until the two voltages VC1 and VC2 reach an equilibrium state (a state in which the voltage values ​​are equal).

[0037] Similarly, when the voltage VC2 is higher than the voltage VC1, the switching element Q2 repeats turning on and off until the capacitor voltages VC1 and VC2 reach an equilibrium state.

[0038] In this embodiment, the current flowing through the coil L1 is limited by setting an upper limit value for the duty ratio of the switching elements Q1 and Q2. Furthermore, even when the voltage balance of both capacitors C1 and C2 is lost and an unbalanced state occurs, and the duty ratio of one switching element becomes large, the other switching element is turned on with the duty ratio of the lower limit value, and when the balanced state is reached, both switching elements Q1 and Q2 are turned on alternately with the duty ratio of the lower limit value, thereby reducing the energy loss caused by commutation and realizing the miniaturization of the balancer circuit 2.

[0039] Here, we consider the setting of the duty ratio of the balancer circuit 2 of the power conversion device 1 in Fig. 1. The circuit system of the power conversion device 1 of the present invention reduces the number of switching elements and shares a non-insulated neutral line (N line) for input and output, making it a safe and inexpensive uninterruptible power supply (UPS) device.

[0040] The balancer circuit 2 uses a push-pull modulation method, and is generally turned on and off with a duty ratio (D ratio) that satisfies the following conditions. (a) D ratio of switching element Q1 + D ratio of switching element Q2 < 0.8 (b) 0<D ratio of switching element Q1<0.8 (c) 0<D ratio of switching element Q2<0.8 (d) Furthermore, switching elements Q1 and Q2 are not turned on at the same time. The above-mentioned maximum duty ratio of the switching element varies depending on the characteristics and allowable loss of the components.

[0041] It is possible to operate within the above range of duty ratio, but if the duty ratio is increased beyond a certain level, a period of overlap with the cycle in which the excitation current is discharged will occur, resulting in increased loss. Furthermore, although it is possible to prevent the circuit from burning out by using the fuse F1 provided in the balancer circuit 2, if the fuse F1 blows, it will require the trouble of maintenance such as replacement.

[0042] As a concrete solution to these problems, the current flowing through the coil L1 is measured and limited to the allowable current of the coil or less. Also, the coil L1 is excited alternately with positive and negative currents, and the excitation current is reset each time. Furthermore, by alternately exciting the coil L1 with positive and negative currents, superposition of direct currents is prevented, and the duty ratio is limited by the voltage applied across the coil L1 (applied voltage) in order to limit the upper limit of the current.

[0043] Therefore, in the control method of the present invention, the duty ratio is limited so that the device operates in an intermittent mode (a mode in which the coil has periods of charging, discharging, and rest in one cycle) or in a critical mode (a mode in which the coil has two periods of charging and discharging in one cycle) rather than in a continuous mode, and the excitation current of the coil is reset by toggling on the excitation current of the coil with a different polarity (the lower limit of the duty ratio). Furthermore, in the present invention, in order to prevent the coil L1 from reaching a saturation current, the relationship between the applied voltage (Vp) to the coil L1 and the maximum duty ratio (D ratio) at rated current is calculated, and drooping control (coil saturation prevention control) is performed when the applied voltage rises above a predetermined value.

[0044] Fig. 6 is a control block diagram of the balancer circuit 2. In Fig. 6, 50 and 51 are low-pass filters, 52 is an adder, 53 is a controller (P control, control for DC deviation), 54 and 55 are limiters, 56 and 57 are multipliers, 58 is a controller (coil saturation prevention control), 59 is a triangular wave signal, 60 is a level shifter, 61 is a constant voltage input, 62 and 63 are comparators, 64 is a coefficient for normalization, and 65 is a bias.

[0045] Voltages VC1 and VC2 of capacitors C1 and C2 of power conversion device 1 are input to a control block. High frequency components are removed by low pass filters 50 and 51, respectively, and the voltages are output to an adder 52. A voltage difference (hereinafter referred to as voltage deviation) between the voltages VC1 and VC2 input to the adder 52 is calculated. The voltage deviation calculated by the adder 52 is output to a controller 53 that performs calculations for P control or PI control. In FIG. 6, the voltage VC2 is input as "-VC2" and added by adder 52 to calculate the voltage deviation, but the voltage VC2 may be input as "+VC2" and the voltage deviation may be calculated using a subtractor instead of adder 52.

[0046] The output of controller 53 is connected to limiters 54 and 55. Limiter 54 sets upper and lower limits on the input voltage deviation and outputs it. That is, it outputs the lower limit value when the voltage deviation is below the lower limit value, and outputs the voltage deviation value between the lower limit value and the upper limit value as is. The limiter outputs the upper limit value when the voltage deviation is above the upper limit value. The upper limit value of limiter 54 is set to the "Q1 upper limit value" and the lower limit value is set to the "Q1 lower limit value". Like limiter 54, limiter 55 outputs the upper limit value when the voltage deviation is equal to or greater than the upper limit value, outputs the voltage deviation value as is from the upper limit value to the lower limit value, and outputs the lower limit value when the voltage deviation is equal to or less than the lower limit value. The upper limit value of limiter 55 is set to the "Q2 upper limit value" and the lower limit value is set to the "Q2 lower limit value".

[0047] In this embodiment, the upper and lower limit values ​​of limiter 54 are 148 V and 10 V, respectively, and the upper and lower limit values ​​of limiter 55 are -10 V and -148 V, respectively. The absolute values ​​of the upper and lower limit values ​​of the two limiters 54 and 55 are the same, but the upper and lower limit values ​​of limiter 55 are negative numbers, so the upper and lower limit values ​​are opposite to those of limiter 54.

[0048] The multiplier 56 receives the output of the limiter 54 and multiplies the input value by a coefficient. In this embodiment, the coefficient is 0.003. Therefore, the output of the multiplier 56 has an output value of 0.03 to 0.44 for a voltage deviation of 10V to 148V. Similarly, the output of the limiter 55 is input to the multiplier 57 and multiplied by the same coefficient, so that the output of the multiplier 57 becomes −0.03 to −0.44. Incidentally, the high-side and low-side limiters 54 and 55 are both subjected to saturation prevention control by a controller 58, which will be described later.

[0049] The output of the high-side multiplier 56 (called the Q1 control amount) is input to a comparator 62 together with a triangular wave 59 (wave height 1.0), and the comparator 62 outputs the duty ratio of the switching element Q1. The output of the low-side multiplier 57 (called the Q2 control amount) is a triangular wave 59 which is adjusted by a level shifter 60 so that its peak value becomes 0 V, and the output is input to a comparator 63 which outputs the duty ratio of the switching element Q2.

[0050] As described above, by processing the voltage values ​​VC1 and VC2 of the capacitors C1 and C2 using the configuration in the control block diagram, the duty ratios of the high-side and low-side switching elements Q1, Q2 are calculated in relation to the voltage deviation between the two input voltages. 7 is a diagram for explaining the relationship between the Q1 control amount and the Q2 control amount of the switching elements and the voltage deviation. The graph of the voltage deviation shown in FIG. 7 is the output of controller 53. The Q1 control amount is the output of multiplier 56, and the Q2 control amount is the output of multiplier 57.

[0051] The vertical axis of Fig. 7 is the voltage value (V) or the normalized value (0 to ±1.0) of the Q1 and Q2 controlled variables, and the horizontal axis is the voltage deviation (V). In the graph of the voltage deviation, the Q1 upper limit value, the Q1 lower limit value, the Q2 upper limit value, and the Q2 lower limit value are shown as voltage values, and the Q1 controlled variables and the Q2 controlled variables are shown as normalized values. Fig. 7 is a diagram showing how the duty ratio of the two switching elements changes depending on the voltage deviation value of the voltages of the capacitors C1 and C2. 6, the Q1 control amount is the output of limiter 54 multiplied by a constant, and although the scale of the vertical axis is different, it has the same waveform as the output of limiter 54. Similarly, the Q2 control amount and the output of limiter 55 have the same waveform. As will be described later, the Q1 and Q2 control amounts also become the duty ratio as they are.

[0052] As a result of the processing of the control block shown in FIG. 6, the high-side switching element Q1 turns on with a duty ratio of the Q1 lower limit value when the voltage deviation goes from a negative value to the Q1 lower limit value, and then the duty ratio increases as the voltage deviation increases, and when the voltage deviation is above the Q1 upper limit value, the high-side switching element Q1 turns on with a duty ratio of the Q1 upper limit value. The duty ratio of the low-side switching element Q2 is similar; when the voltage deviation is equal to or less than the Q2 lower limit, it is set to the Q2 lower limit, and when the voltage deviation is equal to or more than the Q2 upper limit, it is set to the Q2 upper limit.

[0053] 7 shows the Q1 control amount and the Q2 control amount, each control amount is a normalized value by multipliers 56, 57, and the triangular wave compared by comparators 62 and 63 has a peak value of 1.0, so the Q1 control amount and the Q2 control amount shown in Fig. 7 can be used as the duty ratio of the switching elements Q1 and Q2 as they are. However, since the Q2 control amount is a negative value, when considering the absolute value of the Q2 control amount, the Q2 upper limit value becomes the lower limit value of the duty ratio, and the Q2 lower limit value becomes the upper limit value of the duty ratio.

[0054] The voltage signals of capacitors C1 and C2 input to the control block are divided and connected to an AD conversion unit in the microcomputer in the control unit 6 via a filter or the like. The AD conversion unit quantizes the voltage level and converts it into a digital value. Then, as shown in Figure 6, calculation processes such as "control for DC deviation (P control) 53" and "coil saturation prevention control 58" are performed, and the duty ratio is passed to the PWM unit in the microcomputer in the control unit 6.

[0055] The processing of the control block diagram of the balancer circuit 2, except for the AD conversion unit and the PWM unit, is realized by calculation processing using software stored in the memory in the control unit 6. The AD conversion unit and the PWM unit are peripheral devices built into the microcomputer in the control unit 6. In addition, the upper and lower limit values ​​of the limiters 54 and 55 shown in FIG. 6 are converted into duty ratios (D ratios) by processing by multipliers 56 and 57 and comparators 62 and 63, with the predetermined upper limit value being 0.44 (low side - 0.44) and the predetermined lower limit value being 0.03 (low side - 0.03).

[0056] 8, the process of finding the duty ratio by comparing the Q1 controlled variable and the Q2 controlled variable calculated from the voltage deviation using the control block diagram shown in FIG. 6 with the triangular wave 59 will be described again. 8 is a diagram explaining the on / off of two switching elements of the balancer circuit 2 by comparing the Q1 and Q2 control amounts with a triangular wave. From the top, (A) is the Q1 control amount (1) of the switching element Q1 and the triangular wave (2), (B) is the Q2 control amount (3) of the switching element Q2 and the triangular wave (4), (C) is the gate signal (duty ratio) of the switching element Q1, and (D) is the gate signal (duty ratio) of the switching element Q2. The horizontal axis shows the transition from an unbalanced state when the voltage VC1 of the capacitor C1 is high to a balanced state, and then to an unbalanced state when the voltage VC2 of the capacitor C2 is high. Note that the reference 0 for the waveforms shown in (A) and (B) is the 0V line.

[0057] When the voltage VC1 is high, the Q1 control amount of the switching element Q1 is large, the duty ratio of the switching element Q1 is large, and the duty ratio of the switching element Q2 is at the lower limit. When the duty ratio of the switching element Q1 becomes small and an equilibrium state is reached, the duty ratios of the switching elements Q1 and Q2 are at the lower limit. Furthermore, when the voltage VC2 becomes high, the Q2 control amount of the switching element Q2 is a negative value, but the absolute value is large, so the duty ratio of the switching element Q2 becomes large. This is because the comparator 63 is configured so that the switching element Q2 is turned on when the triangular wave is larger than the Q2 control amount of the switching element Q2. On the other hand, the duty ratio of the switching element Q1 becomes the lower limit value.

[0058] Here, the coil saturation prevention controller 58 shown in FIG. 6 will be described. The prevention control of saturation of the coil L1 is given by the current Ip flowing through the coil L1, the inductance L of the coil, the voltage Vp applied to the coil, and the on-time of the switching element Q1 or Q2 Ton. Since Ton = duty ratio (D ratio) × period (1 / f), TIFF2025050523000003.tif13141, and if the product of the voltage Vp and the D ratio is the same, the current Ip will be constant.

[0059] If the product of voltage Vp x D ratio is constant, the current value does not change. Taking advantage of this, when the voltage value (predetermined value) is reached or exceeded, a limit is set on the D ratio and control is performed. In other words, saturation prevention control is performed to suppress the current value so that the coil does not reach saturation current. In this embodiment, if the allowable current of the coil is 5 A, the design rated current is 3 A, the coil inductance L is 300 μH, the frequency f is 100 kHz, the rated DC voltage Vp is 200 V, and the upper limit value of the duty ratio (D ratio) is 0.44 as described above, the current value Ip flowing through coil L1 is 2.93 A, which satisfies the design rated current of 3 A. TIFF2025050523000004.tif13151

[0060] Here, if the DC voltage Vp rises to 250V, in order to limit the allowable coil current to 3A, the current value will increase if the duty ratio remains the same, but by limiting the duty ratio, it is possible to prevent the current value from exceeding 3A. In other words, if the voltage value is 200V and the duty ratio is 0.44, From TIFF2025050523000005.tif13151, If the TIFF2025050523000006.tif12140D ratio is set to 0.352, the coil current will not exceed 3A and will be prevented from reaching the saturation current.

[0061] Therefore, when voltage VC1 or voltage VC2 reaches a value of, for example, 200 V or more, saturation prevention controller 58 shown in FIG. 6 reduces the limiter upper limit values ​​of limiters 54 and 55 so that the product of voltage VC1 or VC2 and the duty ratio becomes constant. Specifically, the upper limit of the duty ratio is determined by measuring voltages VC1 and VC2 and calculating, when the voltages VC1 and VC2 reach or exceed a predetermined voltage value (200 V in this embodiment), the upper limit of the D ratio is calculated from the measured voltage value based on the previously calculated "product of Vp x D ratio", and the switching element is controlled based on the calculated upper limit of the D ratio, thereby reducing the current value.

[0062] The upper limit limit in the coil saturation prevention control will be described again with reference to FIG. 9 is a diagram for explaining the restriction of the upper limit of the duty ratio of the switching element with an increase in voltage. The vertical axis is the upper limit of the duty ratio (0 to 1.0), and the horizontal axis is the voltage value of the two capacitors C1 and C2. The diagram shows that the upper limit is constant (upper limit 1) up to a voltage value of 200V (point A in the diagram), and that the upper limit decreases when the voltage exceeds 200V. When the voltage rises to 250V, the product of the voltage and the duty ratio remains constant, so the upper limit becomes the value at point B (upper limit 2). For upper limit value 2 at point B, the duty ratio of upper limit value 1 becomes 0.44 to 0.352, and the voltage value for this duty ratio is 117.3 V, which is calculated by "0.352÷0.003 (coefficient of multipliers 56, 57)". Therefore, by setting the upper limit of limiter 54 to 117.3 V and the lower limit of limiter 55 to −117.3 V, the upper limit of the duty ratio is reduced, and the value of the current flowing through coil L1 can be suppressed.

[0063] Incidentally, the voltage Vp applied to the coil L1 is approximately the same as the voltage VC1 or VC2 when the switching element Q1 or Q2 is turned on, since the voltage drop due to the on-resistance of the switching element is an extremely small value. Furthermore, while FIG. 9 shows the upper limit of the duty ratio, the duty ratio is determined by the voltage deviation, and FIG. 9 does not show the duty ratio relative to the voltage. In this embodiment, when the voltage VC1 or VC2 becomes 200V or higher, the upper limit of the duty ratio is reduced to suppress the current value and prevent saturation of the coil.

[0064] As described above, the power conversion device of this embodiment is useful for achieving miniaturization while reducing power loss caused by commutation in the balancer circuit by alternately turning on and off two switching elements of the balancer circuit with duty ratios that are independent of each other, setting upper and lower limits for the duty ratios, and further implementing coil saturation prevention control. [Explanation of symbols]

[0065] 1...power conversion device, 2...balancer circuit, 3...rectifier circuit, 4...inverter circuit, 5...converter circuit, 6...control unit.

Claims

1. A power conversion device that converts DC power obtained by rectifying and smoothing AC input power and DC power from a battery into AC output power using an inverter circuit and supplies the AC output power to a load, a rectifier circuit that rectifies the AC input power; a smoothing circuit having high-side and low-side capacitors connected in series and smoothing the power rectified by the rectifier circuit; a balancer circuit having high-side and low-side switching elements connected in parallel to the high-side and low-side capacitors, respectively, for balancing the voltages of the high-side and low-side capacitors; a control unit that controls the on / off of the high-side and low-side switching elements; Equipped with The power conversion device, wherein the control unit alternately turns on the high-side and low-side switching elements and controls them to be on and off with duty ratios that are independent of each other.

2. 2. The power conversion device according to claim 1, wherein one end of the input terminal of the rectifier circuit and one end of the output terminal of the inverter circuit are connected to a connection point of the high-side and low-side capacitors.

3. 3. The power conversion device according to claim 2, wherein in the balancer circuit, a connection point of the high-side and low-side switching elements is connected to a connection point of the high-side and low-side capacitors via a coil.

4. 4. The power conversion device according to claim 1, wherein the control unit operates both the high-side and low-side switching elements at a lower limit of a duty ratio when the voltages of the high-side and low-side capacitors are in a balanced state, and operates one of the switching elements at a lower limit of a duty ratio when the voltages of the high-side and low-side capacitors are in an unbalanced state and the duty ratio of one of the switching elements is large.

5. A predetermined upper limit value is set for the duty ratio of each of the high-side and low-side switching elements, 5. The power conversion device according to claim 4, wherein the control unit operates the duty ratios of both the switching elements at the upper limit value even when the voltages of the high-side and low-side capacitors are in an unbalanced state.

6. 6. The power conversion device according to claim 5, wherein when a voltage value of the high-side capacitor or the low-side capacitor becomes equal to or greater than a predetermined value, the control unit reduces the upper limit of the duty ratio of the switching element connected in parallel to the capacitor as the voltage value of the high-side capacitor or the low-side capacitor increases so that a product of the duty ratio of the switching element connected in parallel to the capacitor and the voltage value becomes constant.

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