Display device and source driver

Abstract

To provide a display device capable of adjusting an image quality without occurrence of gradation crush in a case where images of different gradations are displayed in a subregion within a display screen.SOLUTION: A video data signal output section includes a gamma setting data generation section for generating gamma setting data which are setting information of a gamma correction corresponding to at least one subregion of a display screen of a display panel regarding the at least one subregion based on video data. A source driver includes: a gamma curve generation section for receiving supply of the gamma setting data and generating a local gamma correction curve which is a gamma correction curve corresponding to the at least one subregion based on the gamma setting data; a decoder section for performing a gamma correction of a gradation voltage corresponding to a plurality of pixel data pieces on at least one subregion basis on the basis of the local gamma correction curve; and an output section for outputting a pixel drive voltage on the basis of the gradation voltage subjected to the gamma correction.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present invention relates to a display device and a source driver. [Background technology]

[0002] In display devices consisting of display devices such as liquid crystal and organic light emitting diode (OLED), brightness correction (gamma correction) using a gamma curve is performed. As a circuit for performing such gamma correction, a gamma correction circuit has been proposed that performs gamma correction that matches a desired gamma correction curve by selecting a grayscale voltage corresponding to a specific scenario using a grayscale voltage generator and fine-tuning the selected grayscale voltage by changing first and second reference voltages set in a setting register (for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2009-25665 A Summary of the Invention [Problem to be solved by the invention]

[0004] In recent years, in TV conference systems and the like, multiple images from different sources are displayed on a display. When such multiple images include images with different average luminances, image quality adjustment is performed so that more gradations are allocated to the vicinity of each average luminance. For example, when multiple images include both images with crushed blacks and images with blown whites, more gradations are allocated to the black and white regions, respectively.

[0005] However, when the gradation is allocated in this way, the number of gradations near the intermediate gradations in the black and white regions is reduced, resulting in a coarse gradation, which causes a problem of so-called gradation collapse.

[0006] The present invention has been made in consideration of the above-mentioned problems, and aims to provide a display device that is capable of adjusting image quality without causing gradation collapse when images with different gradations are displayed in partial areas of the display screen. [Means for solving the problem]

[0007] A display device according to the present invention includes a display panel having a plurality of source lines and a plurality of gate lines, and a plurality of pixel units arranged in a matrix at each intersection of the plurality of source lines and the plurality of gate lines; a video data signal output unit that receives input of video data and outputs the video data signal including a series of a plurality of pixel data pieces based on the video data; and a source driver that receives the video data signal from the video data signal output unit and outputs a pixel drive voltage to be applied to the plurality of pixel units based on the video data signal, wherein the video data signal output unit outputs, for at least one partial region of a display screen of the display panel: The source driver has a gamma setting data generation unit that generates gamma setting data, which is gamma correction setting information corresponding to the at least one partial region, based on the video data, and the source driver has a gamma curve generation unit that receives the gamma setting data and generates a local gamma correction curve, which is a gamma correction curve corresponding to the at least one partial region, based on the gamma setting data, a decoder unit that performs gamma correction of gradation voltages corresponding to the plurality of pixel data pieces for each of the at least one partial region based on the local gamma correction curve, and an output unit that outputs the pixel drive voltage based on the gradation voltage that has undergone the gamma correction.

[0008] The source driver of the present invention is a source driver that is connected to a display panel having a plurality of source lines and a plurality of pixel units connected to the plurality of source lines, receives a video data signal including a series of a plurality of pixel data pieces, and outputs a pixel driving voltage to be applied to the plurality of pixel units based on the video data signal, and is characterized in having a gamma curve generation unit that receives input of gamma setting data, which is gamma correction setting data corresponding to at least one partial area of ​​a display screen of the display panel, and generates a local gamma correction curve, which is a gamma correction curve corresponding to the at least one partial area, based on the gamma setting data, a decoder unit that performs gamma correction of grayscale voltages corresponding to the plurality of pixel data pieces for each of the at least one partial area based on the local gamma correction curve, and an output unit that outputs the pixel driving voltage based on the grayscale voltage that has undergone the gamma correction. Effect of the Invention

[0009] According to the display device of the present invention, when images with different gradations are displayed in partial regions within the display screen, it is possible to adjust the image quality without causing gradation loss. [Brief description of the drawings]

[0010] [Figure 1] 1 is a block diagram showing a configuration of a display device according to an embodiment of the present invention. [Diagram 2] FIG. 13 is a diagram showing an example of a display screen on which different images are displayed in a plurality of windows. [Diagram 3] FIG. 2 is a block diagram showing the configuration of a timing controller and a source driver. [Figure 4] 2 is a block diagram showing configurations of an image data latch circuit, a decoder circuit, and a decoder selection circuit; [Figure 5A] FIG. 3 is a diagram showing an example of a gamma correction curve corresponding to the first window of FIG. 2. [Figure 5B] FIG. 3 is a diagram showing an example of a gamma correction curve corresponding to the second window of FIG. 2. [Figure 5C]3 is a diagram showing an example of a gamma curve for the entire display image of FIG. 2. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will now be described in detail. In the following description of the embodiments and the accompanying drawings, the same reference numerals are used to designate substantially the same or equivalent parts.

[0012] 1 is a block diagram showing the configuration of a display device according to an embodiment of the present invention. The display device 100 is an active matrix liquid crystal display device. The display device 100 includes a display panel 11, a timing controller 12, a gate driver 13, and source drivers 14-1 to 14-k.

[0013] The display panel 11 includes a plurality of pixel units P 11 ~P nm and pixel switch M 11 ~M nm The display panel 11 is made up of a semiconductor substrate in which n gate lines GL1 to GLn (n, m: natural numbers of 2 or more) are arranged in a matrix. The display panel 11 has n gate lines GL1 to GLn which are scanning lines extending in the horizontal direction, and m source lines SL1 to SLm which are data lines arranged to intersect with the gate lines GL1 to GLn. 11 ~P nm and pixel switch M 11 ~M nm are provided at the intersections of the gate lines GL1 to GLn and the source lines SL1 to SLm.

[0014] Pixel Switch M 11 ~M nm are controlled to be on or off in response to gate signals Vg1 to Vgn supplied from the gate driver 13.

[0015] Pixel section P 11 ~P nmThe pixel switches M are supplied with grayscale voltages (driving voltages) corresponding to video data from the source drivers 14-1 to 14-k. Specifically, the pixel driving voltage signals Vd1 to Vdm are output from the source drivers 14-1 to 14-k to the source lines SL1 to SLm, and the pixel switches M 11 ~M nm When each of the pixel driving voltage signals Vd1 to Vdm is on, 11 ~P nm This applies a voltage to the pixel unit P 11 ~P nm Each pixel electrode is charged to control the brightness.

[0016] Pixel section P 11 ~P nm Each of the pixel switches M 11 ~M nm The pixel unit P is connected to the source lines SL1 to SLm via a transparent electrode, and a liquid crystal is sealed between the transparent electrode and a counter substrate that is provided opposite the semiconductor substrate and has a single transparent electrode formed over the entire surface. 11 ~P nm The transmittance of the liquid crystal changes according to the potential difference between the gray scale voltage (drive voltage) applied to the liquid crystal panel and the voltage applied to the opposing substrate, thereby producing a display.

[0017] The timing controller 12 generates a series (serial signal) of pixel data pieces PD that express the luminance level of each pixel in, for example, 256 8-bit luminance gradations based on the video data VS. The timing controller 12 also generates a clock signal CLK of an embedded clock system having a constant clock period based on the synchronization signal SS. The timing controller 12 generates a video data signal VDS, which is a serial signal that integrates the series of pixel data pieces PD and the clock signal CLK, and supplies the signal to the source drivers 14-1 to 14-k to control the display of the video data. The video data signal VDS is configured as a video data signal serialized according to the number of transmission paths for each of a predetermined number of source lines.

[0018] In this embodiment, one frame of video data signal VDS is constituted by serially connecting n pixel data fragment groups, each of which is made up of m pixel data fragments PD. Each of the n pixel data fragment groups is a pixel data fragment group made up of pixel data fragments corresponding to the gradation voltages to be supplied to pixels on one horizontal scanning line (i.e., each of the gate lines GL1 to GLn). Through the operation of the source drivers 14-1 to 14-k, n×m pixel sections (i.e., pixel sections P 11 ~P nm ) are applied via source lines.

[0019] Furthermore, the timing controller 12 generates a frame synchronization signal FS indicating the timing of each frame of the video data signal VDS based on the synchronization signal SS, and supplies the frame synchronization signal FS to the source driver 14. The timing controller 12 generates a gate control signal GS for controlling the operation of the gate driver 13, and supplies the gate driver 13.

[0020] The gate driver 13 operates by receiving a gate control signal GS from the timing controller 12, and sequentially supplies gate signals Vg1 to Vgn to the gate lines GL1 to GLn based on the clock timing included in the gate control signal GS. 11 ~P nm Then, pixel drive voltage signals Vd1 to Vdm are applied from the source drivers 14-1 to 14-k to the selected pixel portion, thereby writing the grayscale voltages to the pixel electrodes.

[0021] In other words, by the operation of the gate driver 13, m pixel units arranged along the extension direction of the gate lines (i.e., in a horizontal row) are selected as targets to which pixel drive voltage signals Vd1 to Vdm are to be supplied. The source drivers 14-1 to 14-k apply the pixel drive voltage signals Vd1 to Vdm to the selected pixel units in the horizontal row, causing them to display a color according to the voltage. One frame of screen display is performed by selectively switching the pixel units in the horizontal row selected as targets to which the pixel drive voltage signals Vd1 to Vdm are to be supplied, and repeating this in the extension direction of the source lines (i.e., the vertical direction).

[0022] The source drivers 14-1 to 14-k are provided for each of a predetermined number of data lines obtained by dividing the source lines SL1 to SLm. The source drivers 14-1 to 14-k are formed on separate semiconductor IC (Integrated Circuit) chips. For example, if each source driver has 960 outputs and the display panel has one data line per pixel column, the source lines are driven by 12 source drivers for a 4K panel and 24 source drivers for an 8K panel. The source drivers 14-1 to 14-k receive a frame synchronization signal FS and a serial signal in which a clock signal CLK and a video data signal VDS are integrated from the timing controller 12 via separate transmission paths. When there is one pair (two lines) of transmission paths between the timing controller 12 and each data driver, video data VD for the number of outputs of the source driver is supplied as serialized differential signals in one data period.

[0023] In this embodiment, a plurality of windows are displayed on a screen (hereinafter referred to as a display screen DS) displayed on the display panel 11, and a plurality of images from different sources are displayed in the plurality of windows. In the following description, the area in which these windows are displayed is referred to as a partial area of ​​the display screen DS. For example, such a display is performed when a TV conference is held using a computer connected to the display device 100, or when a navigation screen and an image from a rear camera are simultaneously displayed using an in-vehicle navigation device connected to the display device 100.

[0024] 2 is a diagram showing an example of a display screen DS on which different images are displayed in multiple partial regions (multiple windows). Here, an example is shown in which images of different people are displayed in a first window W1 and a second window W2.

[0025] The first window W1 displays an image with a dark background and predominantly black gradations, while the second window W2 displays an image with a light background and predominantly white gradations.

[0026] The display device 100 of this embodiment has a function for performing image quality adjustment in response to such a case where an image with different gradations is displayed on the display screen. This function will be described below.

[0027] 3 is a block diagram showing the configuration of the timing controller 12 and the parts related to the image quality adjustment function of the source drivers 14-1 to 14-k. Here, only the source drivers 14-1 and 14-2 are shown among the source drivers 14-1 to 14-k.

[0028] The timing controller 12 has an overall image quality adjustment circuit 21, a partial region setting section 22, and an image data control circuit 23. The overall image quality adjustment circuit 21 adjusts the overall image quality of the video data VS.

[0029] The partial region setting unit 22 sets, as a partial region, a part of the display screen DS of the display panel 11 where an image is to be displayed, based on the video data VS. For example, the partial region setting unit 22 sets a partial region based on information on the display position and gradation when image data included in the video data VS is displayed on the display screen DS. For example, in the example of Fig. 2, the regions in the display screen DS where the first window W1 and the second window W2 are displayed are each set as a partial region.

[0030] The image data control circuit 23 supplies a video data signal VDS generated based on the video data VS together with information on the partial region set by the partial region setting unit 22 to the source drivers 14-1 and 14-2.

[0031] The timing controller 12 also has a plurality of local image analysis circuits and gamma curve adjustment circuits, of which only the local image analysis circuits 24A and 24B and the gamma curve adjustment circuits 25A and 25B are shown in FIG.

[0032] The local image analysis circuit 24A performs a gradation analysis on a local image, which is an image displayed in one or more partial regions set by the partial region setting unit 22. The gamma curve adjustment circuit 25A generates gamma setting data GSD, which is setting information for a gamma correction curve corresponding to the partial region, based on the analysis result of the local image analysis circuit 24A. The gamma curve adjustment circuit 25A supplies the generated gamma setting data GSD to the source drivers 14-1 and 14-2.

[0033] Similarly, the local image analysis circuit 24B performs a gradation analysis on a local image displayed in a partial area different from the local image analyzed by the local image analysis circuit 24A. The gamma curve adjustment circuit 25B generates gamma setting data GSD based on the analysis result of the local image analysis circuit 24B and supplies it to the source drivers 14-1 and 14-2.

[0034] The source driver 14-1 has an image data latch circuit 31, a gamma curve generation circuit 32, a decoder circuit 33, a decoder selection circuit 34, and an output circuit 35. A plurality of gamma curve generation circuits 32 and a plurality of decoder circuits 33 are provided.

[0035] The image data latch circuit 31 sequentially captures a series of pixel data pieces PD included in the video data signal VDS supplied from the timing controller 12. The image data latch circuit 31 supplies the captured pixel data pieces PD to the decoder circuit 33 every time the image data latch circuit 31 captures, among the pixel data pieces PD for one horizontal scanning line, a number (m pieces) of pixel data pieces PD corresponding to the gradation voltage signal to be supplied by the source driver 14-1.

[0036] The gamma curve generation circuit 32 generates a local gamma correction curve, which is a gamma correction curve corresponding to a partial region, based on the gamma setting data GSD supplied from the timing controller 12. When there are multiple partial regions, multiple local gamma correction curves are generated by multiple gamma curve generation circuits.

[0037] The plurality of decoder circuits 33 are provided corresponding to the plurality of gamma curve generation circuits 32, respectively. The decoder selection circuit 34 selects one of the plurality of decoder circuits 33 based on the pixel data piece PD output from the image data latch circuit 31 and the partial region information supplied from the timing controller 12.

[0038] The decoder circuit 33 receives pixel data pieces PD from the image data latch circuit 31 and receives a local gamma correction curve from the gamma curve generation circuit 32. The decoder circuit 33 performs gamma correction corresponding to a partial area using the local gamma correction curve, while performing DA conversion of the pixel data pieces PD. That is, the decoder circuit 33 selects a gradation voltage corresponding to the luminance indicated by the pixel data pieces PD that it receives from among the gradation voltages supplied from a gradation voltage generation unit (not shown). The decoder circuit 33 performs gamma correction of the gradation voltages based on the local gamma correction curve supplied from the gamma curve generation circuit 32.

[0039] The output circuit 35 amplifies the grayscale voltage signal that reflects the gamma correction performed by the decoder circuit 33, and outputs it as a pixel drive voltage signal Vd.

[0040] FIG. 4 is a block diagram showing the configurations of the image data latch circuit 31, the decoder circuit 33, and the decoder selection circuit .

[0041] The video data signal VDS supplied from the timing controller 12 is input to the source driver 14 - 1 via the interface 51 and is supplied to each of the data latches in the image data latch circuit 31 .

[0042] Moreover, the gamma setting data GSD is supplied from the timing controller 12 via an interface 51, is stored in a register 52, and is then supplied to the gamma curve generating circuits 32-1 to 32-3.

[0043] The image data latch circuit 31 includes data latches 41A to 41F. The data latches 41A to 41F are provided for each channel, and sequentially capture, via an interface 51, a series of pixel data pieces PD included in the video data signal VDS.

[0044] The decoder circuit 33 includes first decoders D1A to D1F, second decoders D2A to D2F, and third decoders D3A to D3F. That is, the decoder circuit 33 is provided with three decoders for each channel.

[0045] The gamma curve generation circuits 32-1 to 32-3 are provided corresponding to the first to third decoders. The gamma curve generation circuit 32 generates a gamma correction curve based on the gamma setting data GSD read from the register 52. The gamma curve generation circuit 32-1 supplies a gamma correction curve to the first decoders D1A to D1F, the gamma curve generation circuit 32-2 supplies a gamma correction curve to the second decoders D2A to D2F, and the gamma curve generation circuit 32-3 supplies a gamma correction curve to the third decoders D3A to D3F.

[0046] The decoder selection circuit 34 includes selection circuits 44A to 44F. The selection circuits 44A to 44F are provided for each channel, and select a decoder for each channel.

[0047] The output circuit 35 is provided for each channel, and outputs a pixel drive voltage signal Vd for each channel from an output terminal ST based on a grayscale voltage signal that has been subjected to gamma correction in a decoder selected by the decoder selection circuit 34.

[0048] Although channels A to F are shown here, in reality there are many more channels, and each channel has a similar configuration.

[0049] As described above, in the display device 100 of this embodiment, partial regions are set and a local gamma correction curve is generated for each partial region, and the pixel driving voltage signal Vd is generated by performing gamma correction on the gradation voltage based on the generated gamma correction curve.

[0050] 5A is a diagram showing a gamma correction curve for the entire display screen DS, which is different from the local gamma correction curve described above. This gamma correction curve is determined by the characteristics of the display panel 11, and has a shape that is not biased toward either the black side or the white side.

[0051] Fig. 5B is a diagram showing a local gamma correction curve corresponding to a partial region in which the first window W1 of the display screen DS of Fig. 2 is located. Since the local image displayed in the first window W1 is a dark image, the local gamma correction curve has a steep portion surrounded by a dashed line in the gradation on the black side. By performing gamma correction using this local gamma correction curve, the image in the first window W1 is displayed with the gradation on the black side emphasized.

[0052] Fig. 5C is a diagram showing a local gamma correction curve corresponding to a partial region in which the second window W2 of the display screen DS of Fig. 2 is located. Since the local image displayed in the second window W2 is a bright, whitish image, the local gamma correction curve has a steep portion surrounded by a dashed line in the gradation on the white side. By performing gamma correction using this local gamma correction curve, the image in the second window W2 is displayed with the gradation on the white side emphasized.

[0053] In this way, in the display device 100 of this embodiment, a local gamma correction curve is generated for each partial region image, and gamma correction is performed according to the gradation of the local image displayed in the partial region. Therefore, a problem that occurs when gamma correction is performed using only one gamma correction curve corresponding to the entire display screen for a display screen including images with significantly different gradations, that is, the problem of so-called gradation collapse in which the gradation near intermediate gradations becomes rough, does not occur.

[0054] Therefore, according to the display device 100 of this embodiment, when images with different gradations are displayed in partial regions within the display screen, it is possible to perform image quality adjustment without causing gradation collapse.

[0055] The present invention is not limited to the above embodiment. For example, in FIG. 2, a first window W1 and a second window W2 are displayed in a plurality of partial regions of a display screen DS, and images with different gradations are displayed in each window. However, the number of divided regions in the display screen is not limited to this, and the display device 100 of the present embodiment can be applied to a case where there is at least one partial region. In this case, it is sufficient that the display device 100 is configured to generate a gamma correction curve corresponding to the at least one partial region and perform gamma correction for each partial region.

[0056] Also, in FIG. 4, an example has been described in which three decoders, the first to third decoders, are provided for each channel, but the number of decoders is not limited to this.

[0057] In the above embodiment, the timing controller 12 has the overall image quality adjustment circuit 21, the partial region setting unit 22, the image data control circuit 23, the local image analysis circuits 24A and 24B, and the gamma curve adjustment circuits 25A and 25B. However, these functions may be provided in a video data signal output unit other than the timing controller 12, and may be provided in, for example, a SoC (System on Chip).

[0058] In the above embodiment, the display device 100 is an active matrix liquid crystal display device, but the display device 100 may be an organic electroluminescence (OLED) display device. [Explanation of symbols]

[0059] 100 display device 11 Display Panel 12 Timing Controller 13 Gate Driver 14 Source Driver 21 Overall image quality adjustment circuit 22 Partial area setting section 23 Image data control circuit 24A, 24B Local image analysis circuit 25A, 25B Gamma curve adjustment circuit 31 Image data latch circuit 32 Gamma curve generation circuit 33 Decoder circuit 34 Decoder selection circuit 35 Output circuit

Claims

1. a display panel including a plurality of source lines and a plurality of gate lines, and a plurality of pixel units provided in a matrix at each of the intersections of the source lines and the gate lines; a video data signal output unit that receives video data and outputs a video data signal including a series of a plurality of pixel data pieces based on the video data; a source driver that receives the video data signal from the video data signal output unit and outputs pixel driving voltages to be applied to the plurality of pixel units based on the video data signal; having the video data signal output unit has a gamma setting data generation unit that generates, for at least one partial region of a display screen of the display panel, gamma setting data that is setting information for gamma correction corresponding to the at least one partial region based on the video data; The source driver includes: a gamma curve generating unit that receives the gamma setting data and generates a local gamma correction curve, which is a gamma correction curve corresponding to the at least one partial region, based on the gamma setting data; a decoder unit that performs gamma correction of grayscale voltages corresponding to the plurality of pixel data pieces for each of the at least one partial area based on the local gamma correction curve; an output unit that outputs the pixel driving voltage based on the gray scale voltage that has been subjected to the gamma correction; A display device comprising:

2. the image data signal output unit has a local image analysis unit that analyzes a gradation of a local image, which is an image displayed in the at least one partial region, based on the image data; The display device according to claim 1 , wherein the gamma setting data generating section generates the gamma setting data based on a result of analysis by the local image analyzing section.

3. a plurality of the gamma curve generating units and a plurality of the decoder units are provided for each channel configured from the plurality of source lines; 2. The display device according to claim 1, wherein the source driver includes a decoder selection circuit that selects one of the plurality of decoder units for each channel.

4. A source driver is connected to a display panel having a plurality of source lines and a plurality of pixel units connected to the plurality of source lines, receives a video data signal including a series of a plurality of pixel data pieces, and outputs a pixel drive voltage to be applied to the plurality of pixel units based on the video data signal, a gamma curve generator that receives an input of gamma setting data, which is setting data for gamma correction corresponding to at least one partial region of a display screen of the display panel, and generates a local gamma correction curve, which is a gamma correction curve corresponding to the at least one partial region, based on the gamma setting data; a decoder unit that performs gamma correction of grayscale voltages corresponding to the plurality of pixel data pieces for each of the at least one partial area based on the local gamma correction curve; an output unit that outputs the pixel driving voltage based on the gray scale voltage that has been subjected to the gamma correction; 13. A source driver comprising:

5. a plurality of the gamma curve generating units and a plurality of the decoder units are provided for each channel configured from the plurality of source lines; 5. The source driver according to claim 4, further comprising a decoder selection circuit which selects one of the plurality of decoder units for each channel.

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