Power source device

Abstract

To prevent deterioration in noise suppressing effect of a power source circuit.SOLUTION: A power source device 1 includes a power source circuit 1a, a load circuit 1b, and a capacitor group Cg10. The power source circuit 1a supplies a power source voltage to the load circuit 1b, monitors the voltage variation caused by the operation of the load circuit 1b, and outputs a current I1 that suppresses a first noise in a first frequency band out of frequency bands of the voltage variation to the load circuit 1b in accordance with the monitoring result. The capacitor group Cg10 includes capacitors C11, C12, C13, and C14, is mounted in a separation region r0 apart from a propagation route L10 of the current I1 that is output from the power source circuit 1a to the load circuit 1b, and suppresses a second noise in a second frequency band in a border range between the first frequency band and a third frequency band with the frequency range higher than that of the first frequency band.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a power supply device. [Background technology]

[0002] In recent years, power supply voltages have been lowered to reduce the power consumption of IT devices. However, to achieve stable circuit operation at low voltages, it is important to suppress voltage fluctuations (noise) caused by circuit operation, and there is a demand for power supply designs that can operate at low voltages and also satisfy the requirements for noise suppression.

[0003] As a related technique, for example, a technique has been proposed in which a power supply pattern for an IC separated from a main power supply is formed on the back surface of a printed wiring board of a ground pattern. Also, a technique has been proposed in which a first conductive layer for power supply and an island-shaped second conductive layer for power supply separated from the first conductive layer are connected by a first conductive piece, a third conductive layer for ground and an island-shaped fourth conductive layer for ground separated from the third conductive layer are connected by a second conductive piece, and a capacitor is connected to the first and second conductive pieces. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Publication No. 10-223997 [Patent Document 2] JP 2007-173665 A Summary of the Invention [Problem to be solved by the invention]

[0005] Noise generated by the operation of the load circuit is suppressed by the power supply circuit and a capacitor (bypass capacitor). The power supply circuit monitors voltage fluctuations when the load circuit, which is the destination of the power supply voltage, is operating, and based on the monitoring results, a current that cancels out the noise is passed through the load circuit, thereby suppressing noise (stabilizing voltage fluctuations). However, if a capacitor is connected on the path along which the current propagates, it becomes difficult for the current to reach the load circuit, which causes a problem of deteriorating the noise suppression effect of the power supply circuit.

[0006] In one aspect, the present invention has an object to provide a power supply device that makes it possible to prevent deterioration of the noise suppression effect of a power supply circuit. [Means for solving the problem]

[0007] In order to solve the above problem, a power supply device is provided, which includes a load circuit, a power supply circuit that supplies a power supply voltage to the load circuit, monitors voltage fluctuations caused by the operation of the load circuit, and outputs to the load circuit a current that suppresses a first noise in a first frequency band of the voltage fluctuation frequency band according to the monitoring result, and one or more first capacitors that are mounted in a remote area away from a propagation path of a current from the power supply circuit to the load circuit and suppress a second noise in a second frequency band that is in a boundary range between the first frequency band and a third frequency band that is higher in frequency range than the first frequency band.

[0008] Also, to solve the above problem, a power supply device is provided, which includes a load circuit, a power supply circuit that supplies a power supply voltage to the load circuit, monitors voltage fluctuations caused by the operation of the load circuit, and outputs a current to the load circuit that suppresses a first noise in a first frequency band of the voltage fluctuation frequency bands according to the monitoring result, one or more first capacitors that suppress a second noise in a second frequency band that is in a boundary range between the first frequency band and a third frequency band that is higher in frequency range than the first frequency band, a power supply layer provided on a substrate on which the load circuit, the power supply circuit, and the first capacitor are mounted, and a slit formed in the power supply layer at a position that separates the first capacitor from a propagation path of a current from the power supply circuit to the load circuit. Effect of the Invention

[0009] According to one aspect, it is possible to prevent deterioration of the noise suppression effect of a power supply circuit. [Brief description of the drawings]

[0010] [Figure 1] FIG. 1 is a diagram illustrating an example of a power supply device. [Diagram 2] FIG. 1 is a diagram illustrating a first comparative example of a power supply device. [Diagram 3] 1 is a diagram illustrating an example of the configuration of a power supply device according to a first comparative example. [Figure 4] FIG. 4 is a diagram showing an example of a frequency band in which a power supply circuit and a capacitor contribute to noise suppression. [Diagram 5] FIG. 11 is a diagram illustrating a second comparative example of a power supply device. [Figure 6] FIG. 13 is a diagram for explaining an example of capacitor arrangement. [Figure 7] FIG. 11 is a diagram illustrating an example of a capacitor characteristic. [Figure 8] FIG. 13 is a diagram illustrating an example of the configuration of a power supply device according to a second comparative example. [Figure 9] FIG. 11 is a diagram showing an example of the relationship between the number of mounted capacitors and the noise suppression effect. [Figure 10] FIG. 1 illustrates an example of the configuration of a power supply device. [Figure 11] FIG. 1 illustrates an example of the configuration of a power supply device. [Figure 12] FIG. 2 is a diagram illustrating a first configuration example of a cross section of a power supply device. [Figure 13] FIG. 11 is a diagram illustrating a second configuration example of a cross section of a power supply device. [Figure 14] 1A and 1B are diagrams illustrating an example of the configuration of a power supply device, in which (a) shows a configuration in which slits are provided in a power supply layer, and (b) shows the state in which the slits are formed in the power supply layer, omitting the LSI. [Figure 15] FIG. 2 is a diagram illustrating an example of a cross section of a power supply device. [Figure 16] FIG. 2 illustrates an example of a configuration of a server device. [Figure 17] FIG. 13 is a diagram illustrating an example of a simulation result. [Figure 18] FIG. 13 is a diagram illustrating an example of a simulation result. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] The present embodiment will be described below with reference to the drawings. 1 is a diagram illustrating an example of a power supply device. The power supply device 1 includes a power supply circuit 1a, a load circuit 1b, and a capacitor group Cg10 (first capacitor). The power supply circuit 1a, the load circuit 1b, and the capacitor group Cg10 are mounted on a substrate pt.

[0012] The load circuit 1b is, for example, a processor such as an LSI (Large Scale Integration) or a CPU (Central Processing Unit). The capacitor group Cg10 includes capacitors C11, C12, C13, and C14. The capacitor group Cg10 includes four capacitors, but may include any number of capacitors. Also, the capacitor group Cg10 may include only one capacitor instead of multiple capacitors.

[0013] The power supply circuit 1a supplies a power supply voltage to the load circuit 1b, monitors voltage fluctuations caused by the operation of the load circuit 1b, and outputs a current I1 to the load circuit 1b in accordance with the monitoring results, the current I1 suppressing a first noise in a first frequency band among the frequency bands of the voltage fluctuations.

[0014] The capacitor group Cg10 is a bypass capacitor that suppresses a second noise in a second frequency band that is in a boundary range between the first frequency band and a third frequency band that is higher than the first frequency band. The capacitor group Cg10 is mounted in a remote area r0 that is remote from a propagation path L10 of a current I1 from the power supply circuit 1a to the load circuit 1b.

[0015] For example, when the current I1 required for suppressing the first noise is consumed by the load circuit 1b, a region that does not hinder the current consumption by the load circuit 1b is defined as a separate region, and the capacitor group Cg10 is mounted in this separate region. By mounting the capacitor group Cg10 in such a region that does not reduce the current consumption by the load circuit 1b, i.e., in the separate region r0 that is separated from the propagation path L10 of the current I1, the consumption of the current I1 by the load circuit 1b is not hindered by the capacitor group Cg10.

[0016] In this way, in the power supply device 1, the power supply circuit 1a outputs a current I1 that suppresses noise in a first frequency band to the load circuit 1b. Also, the capacitor group Cg10 that suppresses noise in a second frequency band different from the first frequency band is mounted in a separate area away from the propagation path L10 of the current I1. This makes it possible to prevent the noise suppression effect of the power supply circuit 1a from deteriorating. In other words, since the propagation of the current I1 from the power supply circuit 1a to the load circuit 1b is not hindered by the capacitor group Cg10, it is possible to prevent the suppression effect of the power supply circuit 1a of noise in the first frequency band from deteriorating.

[0017] Next, we will explain the suppression control of noise that occurs when the load circuit is operating. In a power supply device, the power supply voltage supply is designed to satisfy noise requirements using a power supply circuit that supplies power supply voltage to the load circuit and a capacitor. In addition, when the power supply circuit is supplying power supply voltage to the load circuit, it has the function of monitoring (sensing) the voltage at a specified point (for example, the power input terminal of the load circuit or a point nearby) and keeping the sensed voltage at that point constant. Note that hereinafter, the load circuit may be referred to as an LSI. Furthermore, the control that suppresses noise based on the voltage fluctuations sensed by the power supply circuit may be referred to as constant sense voltage control.

[0018] With constant sense voltage control, even if noise is generated by the operation of the LSI, a predetermined current that keeps the sensed voltage constant is output from the power supply circuit to the LSI, thereby suppressing the noise generated during operation of the LSI.

[0019] However, while the noise suppression function provided by the power supply circuit using constant sense voltage control is effective for low-frequency noise, the noise suppression effect tends to weaken as the frequency range increases. For this reason, for high-frequency noise that cannot be suppressed by constant sense voltage control, a capacitor is installed to suppress high-frequency noise, and the high-frequency noise is removed using this capacitor.

[0020] FIG. 2 is a diagram showing a first comparative example of a power supply device. A schematic diagram showing an example of the arrangement of capacitors between a power supply circuit and an LSI is shown. The power supply device 10a includes a power supply circuit 11, an LSI 12, and a capacitor group Cg20. The capacitor group Cg20 includes capacitors C21, . . . , C25. The power supply circuit 11 supplies a power supply voltage to the LSI 12 through a path L1.

[0021] One end of the capacitor C21 is connected to the path L1, and the other end of the capacitor C21 is connected to ground (hereinafter, referred to as GND). Similarly, one end of the capacitor C22 is connected to the path L1, and the other end of the capacitor C22 is connected to GND, one end of the capacitor C23 is connected to the path L1, and the other end of the capacitor C23 is connected to GND. In addition, one end of the capacitor C24 is connected to the path L1, and the other end of the capacitor C24 is connected to GND, one end of the capacitor C25 is connected to the path L1, and the other end of the capacitor C25 is connected to GND.

[0022] Here, when the power supply circuit 11 supplies a power supply voltage to the LSI 12, it remotely senses the voltage at point p1 and performs constant sense voltage control to keep the remotely sensed voltage at point p1 constant. By performing such constant sense voltage control, noise in the low frequency band is suppressed. Meanwhile, noise in the high frequency band that cannot be suppressed by the constant sense voltage control is suppressed by the capacitors C21, ..., C25.

[0023] Fig. 3 is a diagram showing an example of the configuration of a power supply device in a first comparative example. It shows a plan view of the power supply device when the configuration shown in the schematic diagram in Fig. 2 is realized. The power supply device 10a includes a power supply circuit 11, an LSI 12, and a capacitor group Cg20, and the power supply circuit 11 and the LSI 12 are mounted on the front surface side of the substrate pt.

[0024] The capacitor group Cg20 includes a plurality of capacitors and is mounted on the lower back surface of the substrate pt on which the LSI 12 is mounted. The capacitors included in the capacitor group Cg20 are, for example, chip capacitors or film capacitors. The path L1 corresponds to a power supply layer laid on the substrate pt.

[0025] Figure 4 shows an example of a frequency band in which a power supply circuit and a capacitor contribute to noise suppression. The vertical axis represents the impedance of the supply path of the power supply voltage, and the horizontal axis represents frequency. The amount of noise generated in the supply path is the product of the impedance of the supply path and the current fluctuation flowing through the supply path (amount of noise = impedance x current fluctuation), and is an index for estimating the amount of noise.

[0026] As described above, noise in the low frequency band fL (noise in the first frequency band) is suppressed by constant sense voltage control by the power supply circuit 11. Moreover, noise in the high frequency band fH (noise in the third frequency band) is difficult to suppress by constant sense voltage control, so noise is suppressed by a capacitor (capacitor group Cg20) connected to the supply path.

[0027] On the other hand, the frequency band fM located in the boundary range between the low frequency band fL and the high frequency band fH is a frequency band in which the noise suppression effect by the constant sense voltage control by the power supply circuit 11 is not completely lost but is not sufficiently effective. A capacitor (capacitor group Cg10) is also installed to suppress noise in such a frequency band fM (noise in the second frequency band). Note that hereinafter, the frequency band located in the boundary range between the low frequency band and the high frequency band may be referred to as the boundary frequency band.

[0028] Here, as an example of the numerical values ​​of the low frequency band, the border frequency band, and the high frequency band, the low frequency band is a frequency band below about 50 kHz, the border frequency band is a frequency band between about 50 kHz and 500 kHz, and the high frequency band is a frequency band above 500 kHz.

[0029] 5 is a diagram showing a second comparative example of a power supply device, showing a schematic diagram of an example of the arrangement of capacitors between a power supply circuit 11 and an LSI 12. A power supply device 10b includes a power supply circuit 11, an LSI 12, a capacitor group Cg10, and a capacitor group Cg20.

[0030] In order to suppress noise in the boundary frequency band, the power supply device 10b further includes a capacitor group Cg10 including capacitors C11 and C12 in addition to the power supply device 10a shown in Fig. 2. One end of the capacitor C11 is connected to the path L1 and the other end of the capacitor C11 is connected to GND, one end of the capacitor C12 is connected to the path L1 and the other end of the capacitor C12 is connected to GND.

[0031] Figure 6 is a diagram explaining an example of capacitor placement. The noise suppression effect of capacitors C21, ..., C25 is to suppress noise by lowering the impedance of the noise frequency that occurs on path L1 in the high frequency band. Therefore, capacitors are selected that have a low impedance (hereinafter referred to as capacitor impedance) in the target high frequency band. The frequency at which this capacitor impedance becomes low is called the self-resonant frequency.

[0032] A capacitor has a resistance component R, an inductance component L, and a capacitance component C, and the capacitor impedance Z is calculated using the following equation (1). Z = |R + jωL + 1 / (jωC)| (1) For example, when selecting a capacitor, if a noise frequency of 550 kHz in the high frequency band needs to be suppressed, a capacitor with a self-resonant frequency near 550 kHz is selected. Capacitors C21, ..., C25 selected in this way reduce the impedance of the high frequency band noise generated on path L1, thereby reducing the noise amplitude and bypassing the high frequency band noise current to GND, thereby eliminating the noise.

[0033] Similarly, the capacitors C11 and C12 suppress noise by lowering the impedance of the frequency of noise generated in the boundary frequency band, so that the capacitors C11 and C12 are selected to have a self-resonant frequency in the boundary frequency band.

[0034] For example, to suppress a noise frequency of 100 kHz as the boundary frequency band, a capacitor with a self-resonant frequency near 100 kHz is selected. Capacitors C11 and C12 selected in this way reduce the impedance of the noise in the boundary frequency band, thereby reducing the noise amplitude and bypassing the noise current in the boundary frequency band to GND, thereby eliminating the noise.

[0035] If the target frequency band is wide, multiple types of capacitors are used to suppress noise over the entire band, in which case capacitors with higher self-resonant frequencies are placed closer to the noise source, and capacitors with lower self-resonant frequencies are placed as the distance from the noise source increases.

[0036] In the example of FIG. 6, it is assumed that the self-resonant frequencies of the capacitors C21, . . . , C25 for suppressing noise in the high frequency band are fc21, . . . , fc25, and that the relationship is fc21>fc22>fc23>fc24>fc25.

[0037] In this case, capacitor C21, which has the highest self-resonant frequency, is placed at a position on path L1 closest to a noise source (here, noise is caused by voltage fluctuations due to operation of the LSI12 circuit). Capacitors C22, C23, C24, and C25 are placed in this order so that the self-resonant frequencies gradually decrease from the vicinity of LSI12 toward the power supply circuit 11.

[0038] Also, the self-resonant frequencies of capacitors C11 and C12 for noise suppression in the boundary frequency band are fc11 and fc12, respectively, and fc11>fc12. In this case, the capacitor C11 having the self-resonant frequency fc11 is placed on the path L1 at a position close to the LSI12, but considering that the boundary frequency band is a lower frequency than the high frequency band and fc25>fc11, in this example, the capacitor C25 is placed between the capacitor C25 and the power supply circuit 11. Then, the capacitor C12 having the self-resonant frequency fc12 is placed between the capacitor C11 and the power supply circuit 11.

[0039] In the above example, for the capacitors C21, ···, C25 corresponding to high-frequency band noise exceeding 500 kHz, the capacitors are selected, for example, in a range where the capacitance component C is 47 μF or more and the inductance component L is 300 pH or more. Also, for the capacitors C11 and C12 corresponding to the noise in the boundary frequency band from 50 kHz to 500 kHz, the capacitors are selected, for example, in a range where the capacitance component C is less than 47 μF and the inductance component L is less than 300 pH.

[0040] Next, with reference to FIG. 7, the reason for arranging the capacitor with a high self-resonant frequency closer to the noise source when arranging a plurality of capacitors will be explained. FIG. 7 is a diagram showing an example of capacitor characteristics. The vertical axis represents the impedance of the power supply voltage supply path, and the horizontal axis represents the frequency. There are four capacitors Ca, Cb, Cc, and Cd, and it is assumed that the capacitance component C decreases in the order of capacitors Ca, Cb, Cc, and Cd. Also, let the self-resonant frequencies of the capacitors Ca, Cb, Cc, and Cd be fCa, fCb, fCc, and fCd, respectively. In the frequency band targeted for noise suppression, the self-resonant frequencies have the relationship of fCa < fCb < fCc < fCd.

[0041] Here, when arranging the capacitors Ca, Cb, Cc, and Cd as a plurality of capacitors in the power supply voltage supply path, it is generally performed to arrange them in the order of capacitors Cd, Cc, Cb, and Ca from near the load circuit (arranged in the order of decreasing self-resonant frequency).

[0042] Placing a plurality of types of capacitors in the load circuit that becomes the noise source aims to reduce the impedance in a wide frequency band. As described above, the noise amount = impedance × current fluctuation. A plurality of types of capacitors suitable for various frequencies are arranged so that noise can be suppressed at any frequency with respect to the frequency components of the current fluctuation. In this case, it is important to determine the arrangement order of the capacitor types based on whether the characteristics of the capacitors are easily affected by the path.

[0043] The approximate equation for impedance from the load circuit's perspective, taking into account both the path and the capacitor, is given by the following equation (2). Impedance = R1 + jωL1 + 1 / (jωC1) + R2 + jωL2 (2) R1, L1, and C1 are parameters that indicate the resistance, inductance, and capacitance components of the capacitor, respectively, and R2 and L2 are parameters that indicate the resistance and inductance components of the path from the capacitor to the load circuit, respectively. As shown in equation (2), when considering the noise suppression effect of a capacitor at the noise source (load circuit), it is important to consider the impedance including the path.

[0044] If we consider the ratio of the L1 component of the capacitor to the L2 component of the path, a capacitor with a smaller L1 is more susceptible to the influence of L2 (path influence), and a capacitor with a larger L1 is less susceptible to L2. Furthermore, the farther the capacitor is located from the load circuit (the longer the path), the larger L2 becomes, and the greater the influence of the path appears to be. On the other hand, the smaller the physical size of the capacitor, the smaller L1 and C1 become, and the higher the self-resonant frequency becomes. In other words, a capacitor with a high self-resonant frequency is more susceptible to the influence of the path.

[0045] The above is the reason why the theory behind the placement of bypass capacitors to suppress noise is that it is best to place capacitors with smaller capacitive components or physical sizes closer to the load circuit.

[0046] FIG. 8 is a diagram showing an example of the configuration of a power supply device in a second comparative example. It shows a plan view of the power supply device when the configuration shown in the schematic diagram in FIG. 5 is realized. The power supply device 10b includes a power supply circuit 11, an LSI 12, and capacitor groups Cg10 and Cg20, and the power supply circuit 11 and the LSI 12 are mounted on the front surface of the substrate pt. The capacitor group Cg20 for high frequency band noise is mounted on the rear surface below the position where the LSI 12 is disposed with respect to the substrate pt. In addition, the capacitor group Cg10 for boundary frequency band noise is mounted in the area between the power supply circuit 11 and the LSI 12. However, such an arrangement of the capacitor group Cg10 deteriorates the noise suppression effect based on the constant sense voltage control by the power supply circuit 11.

[0047] Next, the reason why the noise suppression effect deteriorates will be described. When the power supply circuit 11 detects a voltage fluctuation in the LSI 12 to which power is supplied by the constant sense voltage control, the power supply circuit 11 supplies a current to the LSI 12 through the supply path of the power supply voltage to make the voltage fluctuation constant and suppress noise.

[0048] However, constant sense voltage control by power supply circuit 11 has a low effect of suppressing high-frequency noise because it is difficult for the power supply circuit 11 to respond to the speed of the amplitude fluctuation of high-frequency noise. Therefore, constant sense voltage control has a suppression effect on low-frequency noise, the speed of which the power supply circuit 11 can respond to.

[0049] On the other hand, since the power supply circuit 11 alone cannot sufficiently suppress the boundary frequency band noise, it is necessary to mount a capacitor that can deal with boundary frequency band noise. However, if a capacitor that can deal with boundary frequency band noise is placed in the area between the power supply circuit 11 and the LSI 12, there is a possibility that the effect of noise suppression by the constant sense voltage control of the power supply circuit 11 may be deteriorated.

[0050] This is because the capacitor placed in the area between the power supply circuit 11 and the LSI 12 makes it difficult for the current output from the power supply circuit 11 to reach the LSI 12 in order to cancel out low-frequency band noise, delaying noise suppression. As a result, the frequency at which the power supply circuit 11 can sufficiently suppress noise shifts further to the lower frequency side, deteriorating the effect of suppressing noise.

[0051] 9 is a diagram showing an example of the relationship between the number of capacitors mounted and the noise suppression effect. Note that the number of capacitors mounted for boundary frequency band noise in Table T1 refers to the number of capacitors mounted in the area between the power supply circuit 11 and the LSI 12.

[0052] In Table T1, when the number of capacitors corresponding to boundary frequency band noise (hereinafter sometimes referred to as boundary capacitors) installed is small, the effect of suppressing boundary frequency band noise by the boundary capacitors becomes small, but the effect of suppressing low frequency band noise performed by constant sense voltage control becomes large.

[0053] Furthermore, when a large number of boundary capacitors are mounted, the effect of suppressing boundary frequency band noise by the boundary capacitors becomes large, but the effect of suppressing low frequency band noise performed by constant sense voltage control becomes small.

[0054] As described above, since the power supply circuit 11 alone cannot sufficiently suppress the boundary frequency band noise, a boundary capacitor is required. However, the inclusion of a boundary capacitor deteriorates the effect of suppressing low frequency noise on the power supply circuit 11 side.

[0055] Furthermore, if a capacitor capable of suppressing low-frequency noise is added to compensate for the deterioration of low-frequency noise suppression, the component mounting area will increase. Also, since the noise suppressed by the power supply circuit 11 shifts to the low-frequency side, the capacitance of the capacitor to suppress that noise will increase. This means that a larger capacitor will be added, which will increase the mounting area.

[0056] Next, a power supply device that prevents deterioration of the noise suppression effect will be described in detail. Fig. 10 is a diagram showing an example of the configuration of a power supply device. It shows a schematic diagram of an example of the arrangement of capacitors between a power supply circuit 11 and an LSI 12. A power supply device 10-1 includes a power supply circuit 11, an LSI 12, and a group of capacitors Cg10 and Cg20.

[0057] 5 in that the capacitor group Cg10 including the capacitors C11 and C12 is connected to a path L2 different from the path L1. One end of the capacitor C11 is connected to the path L2, the other end of the capacitor C11 is connected to GND, one end of the capacitor C12 is connected to the path L2, and the other end of the capacitor C12 is connected to GND.

[0058] When the capacitor group Cg10 is installed as a countermeasure against boundary frequency band noise, in order to prevent deterioration of the noise suppression effect of the power supply circuit 11, the capacitor group Cg10 is installed at a position (schematically shown as path L2 in Figure 10) away from the path L1 along which the current I1 flows between the power supply circuit 11 and the LSI 12 to which the power supply voltage is supplied, so as to prevent deterioration of the noise suppression effect of the power supply circuit 11.

[0059] The path L1 is connected to a power supply terminal of the LSI 12, and is a path through which the power supply voltage supplied from the power supply circuit 11 and the current I1 output from the power supply circuit 11 when the power supply circuit 11 performs constant sense voltage control are transmitted. The path L2 is connected to a power supply terminal of the LSI 12.

[0060] FIG. 11 is a diagram showing an example of the configuration of a power supply device. It shows a plan view of the power supply device when the configuration shown in the schematic diagram in FIG. 10 is realized. The power supply device 10-1 includes a power supply circuit 11, an LSI 12, and capacitor groups Cg10 and Cg20, and the power supply circuit 11 and LSI 12 are mounted on the front surface of a multilayer substrate 13-1 (showing an example in which the multilayer substrate 13-1 is used as the substrate pt). The capacitor located at the right end of the capacitor group Cg10 in FIG. 11 is capacitor Ca1, and the capacitor located at the lower right end of the capacitor group Cg20 in FIG. 11 is capacitor Cb1.

[0061] The capacitor group Cg20 for dealing with high frequency band noise is mounted on the back surface of the multilayer substrate 13-1. The capacitor group Cg10 for dealing with boundary frequency band noise is mounted at a position away from the path of the current I1 flowing between the power supply circuit 11 and the LSI 12.

[0062] In this case, it is desirable to place the bypass capacitors as close as possible to the target circuit, and specifically, since there is a propagation path for the current I1 in the region r1 (intercircuit region) between the power supply circuit 11 and the LSI 12, the bypass capacitors are mounted in the region r0 (separate region) located on the opposite side of the LSI 12 from the region r1. In other words, the capacitor group Cg10 is mounted at a position opposite the position where the power supply circuit 11 is mounted, as viewed from the LSI 12 to which the power supply voltage is supplied.

[0063] Here, when current I1 is output by power supply circuit 11 under constant sense voltage control, since no capacitor group is arranged in region r1, current I1 flows through the power supply layer to LSI 12 and is consumed by LSI 12. Therefore, current propagation of current I1 output by constant sense voltage control is not hindered by the capacitor group, and current consumption by LSI 12 is not hindered, so that it is possible to prevent deterioration of the noise suppression effect of power supply circuit 11.

[0064] Fig. 12 is a diagram showing a first configuration example of a cross section of a power supply device. It shows a cross section taken along X1-X1 in Fig. 11. Power supply circuit 11, LSI 12, and capacitor Ca1 are mounted on the front surface side of multilayer substrate 13-1, and capacitor Cb1 is mounted on the back surface side of multilayer substrate 13-1.

[0065] Capacitor Ca1 is one of the capacitors included in a capacitor group Cg10 mounted to deal with boundary frequency band noise, and capacitor Cb1 is one of the capacitors included in a capacitor group Cg20 mounted to deal with high frequency band noise.

[0066] Multilayer substrate 13-1 includes insulating layer 13a, power layer 13b, and GND layer 13c. Power layer 13b includes power patterns 13b1 and 13b2, and is bonded to the lower surface of insulating layer 13a. GND layer 13c includes GND patterns 13c1, 13c2, 13c3, and 13c4, and is bonded to the upper surface of insulating layer 13a.

[0067] The power supply patterns 13b1 and 13b2 are connected to each other at connection points (not shown) in the insulating layer 13a, and the GND patterns 13c1, 13c2, 13c3, and 13c4 are connected to each other at connection points (not shown) in the insulating layer 13a.

[0068] The GND terminal of the capacitor Ca1 is connected to the GND pattern 13c1, the power supply terminal of the capacitor Ca1 is connected to the power supply pattern 13b1, the GND terminal of the capacitor Cb1 is connected to the GND pattern 13c2, and the power supply terminal of the capacitor Cb1 is connected to the power supply pattern 13b2.

[0069] The GND terminal of the LSI 12 is connected to the GND pattern 13c2, and the power terminal of the LSI 12 is connected to the power pattern 13b2. The GND terminal of the power supply circuit 11 is connected to the GND pattern 13c3, and the power terminal of the power supply circuit 11 is connected to the power pattern 13b2.

[0070] 13 is a diagram showing a second example of the cross section of a power supply device. The cross section shows a case where capacitors Ca1 and Cb1 are both mounted on the back side of a multi-layer substrate. A power supply circuit 11 and an LSI 12 are mounted on the front side of a multi-layer substrate 13-2, and capacitors Ca1 and Cb1 are mounted on the back side of the multi-layer substrate 13-2. The multi-layer substrate 13-2 includes an insulating layer 13a, a power supply layer 13b10, and a GND layer 13d.

[0071] The power supply layer 13b10 includes power supply patterns 13b11, 13b12, and 13b13, and is bonded to the lower surface of the insulating layer 13a. The GND layer 13d includes GND patterns 13d1, 13d2, and 13d3, and is bonded to the upper surface of the insulating layer 13a. The power supply patterns 13b11, 13b12, and 13b13 are connected to each other by connection points (not shown) in the insulating layer 13a. The GND patterns 13d1, 13d2, and 13d3 are connected to each other by connection points (not shown) in the insulating layer 13a.

[0072] The GND terminal of the capacitor Ca1 is connected to the GND pattern 13d1, and the power supply terminal of the capacitor Ca1 is connected to the power supply pattern 13b11. The GND terminal of the capacitor Cb1 is connected to the GND pattern 13d1, and the power supply terminal of the capacitor Cb1 is connected to the power supply pattern 13b13.

[0073] The GND terminal of LSI12 is connected to GND pattern 13d1, and the power terminal of LSI12 is connected to power pattern 13b13. The GND terminal of power supply circuit 11 is connected to GND pattern 13d2, and the power terminal of power supply circuit 11 is connected to power supply pattern 13b3. In this way, when the capacitor group Cg10 for dealing with boundary frequency band noise is mounted on the opposite side of LSI12 from the position where power supply circuit 11 is mounted, it may be mounted on the back side of the multilayer board.

[0074] 14A and 14B are diagrams showing an example of the configuration of a power supply device, in which (a) shows a configuration in which slits are provided in a power supply layer, and (b) shows the state in which the slits are formed in the power supply layer without the LSI.

[0075] In the power supply device 10-2, slits st1 and st2 are formed in the power supply layer 13e. The slits st1 and st2 are formed at a location that separates the capacitor group Cg10 from the propagation path through which the current I1 output from the power supply circuit 11 flows. That is, the slits st1 and st2 are formed in the power supply layer 13e between a first region r11 in which the power supply circuit 11 and the LSI 12 are mounted, and a second region r12 in which the capacitor group Cg10 is mounted.

[0076] For example, if a location for mounting the capacitor group Cg10 cannot be secured on the opposite side of the LSI 12 from the location where the power supply circuit 11 is mounted (region r0 shown in FIG. 11), slits st1 and st2 are formed in the power supply layer 13e at positions as shown in FIG. 14. This makes it possible to separate the current propagation path from the capacitor group Cg10.

[0077] In this way, when a capacitor group for suppressing boundary frequency band noise is mounted near the current propagation path between the power supply circuit 11 and the LSI 12, a slit is formed in the power supply layer to separate the current propagation path from the capacitor group. This prevents the capacitor group from impeding current propagation and prevents the noise suppression effect from deteriorating.

[0078] Fig. 15 is a diagram showing an example of a cross section of a power supply device. It shows a cross section taken along X2-X2 in Fig. 14(a). A power supply circuit 11, an LSI 12, and a capacitor Ca1 are mounted on the front surface side of a multi-layer substrate 13-3, and a capacitor Cb1 is mounted on the back surface side of the multi-layer substrate 13-3. The multi-layer substrate 13-3 includes an insulating layer 13a, a power supply layer 13e, and a GND layer 13f. The power supply layer 13e includes power supply patterns 13e1 and 13e2, and is bonded to the lower surface of the insulating layer 13a.

[0079] In addition, a slit st2 is provided in the power supply pattern 13e1, and the power supply patterns 13e1-1 and 13e1-2 are formed on either side of the slit st2. The power supply pattern 13e1-1 is separated from a current propagation path through which a current output from the power supply circuit 11 flows, and separates the capacitor Ca1 connected to the power supply pattern 13e1-1 from the current propagation path.

[0080] The GND layer 13f includes GND patterns 13f1, 13f2, 13f3, and 13f4, and is bonded to the upper surface of the insulating layer 13a. The power supply patterns 13e1 and 13e2 are connected to each other by connection points (not shown) in the insulating layer 13a, and the GND patterns 13f1, 13f2, 13f3, and 13f4 are connected to each other by connection points (not shown) in the insulating layer 13a.

[0081] The GND terminal of the capacitor Ca1 is connected to the GND pattern 13f1, the power supply terminal of the capacitor Ca1 is connected to the power supply pattern 13e1-1, the GND terminal of the capacitor Cb1 is connected to the GND pattern 13f2, and the power supply terminal of the capacitor Cb1 is connected to the power supply pattern 13e1-2.

[0082] The GND terminal of the LSI 12 is connected to the GND pattern 13f1, and the power terminal of the LSI 12 is connected to the power pattern 13e2. The GND terminal of the power supply circuit 11 is connected to the GND pattern 13f3, and the power terminal of the power supply circuit 11 is connected to the power pattern 13e2.

[0083] Next, a server device having the functions of the above power supply devices 1, 10-1, and 10-2 will be described. Fig. 16 is a diagram showing an example of the configuration of a server device. The server device 20 has a power supply device 100. The power supply device 100 includes a power supply circuit 11, a processor 12a, and capacitor groups Cg10 and Cg20. The power supply device 100 provided in the server device 20 corresponds to a power supply unit that supplies power from the power supply circuit 11 to the processor 12a.

[0084] The server device 20 is entirely controlled by a processor 12a. The processor 12a is a CPU, a micro processing unit (MPU), or a digital signal processor (DSP). A memory group 21, a storage device 22, and an IO interface group 23 are connected to the processor 12a via a bus.

[0085] The memory group 21 is used as a main storage device of the server device 20. The memory included in the memory group 21 is, for example, a RAM (Random Access Memory). The memory group 21 temporarily stores at least a part of an OS (Operating System) program and application programs to be executed by the processor 12a. The memory group 21 also stores various data used for processing by the processor 12a.

[0086] The storage device 22 is used as an auxiliary storage device for the server device 20, and stores the OS program, application programs, and various data. The storage device 22 is, for example, a hard disk drive (HDD) or a solid state drive (SSD).

[0087] The IO interface group 23 performs input / output interface with the outside of the device. For example, it is connected to a user terminal and transmits / receives signals between the user terminal and the processor 12a. The IO interface group 23 is also connected to a network and transmits / receives signals with other computers or communication devices via the network.

[0088] The power supply unit (PSU) 24 converts an AC power supply voltage into a DC power supply voltage and supplies power to each component in the server device 20. The power supply circuit 11 is a POL (Point of Load) regulator that generates a power supply voltage at a level required by the processor 12a based on the voltage generated by the power supply unit 24 and supplies the generated power supply voltage to the processor 12a.

[0089] 17 is a diagram showing an example of a simulation result. The figure shows the simulation result of the noise suppression effect when a capacitor group Cg10 is mounted on the opposite side of the LSI 12 to which power is supplied from the mounting position of the power supply circuit 11. The horizontal axis represents frequency, and the vertical axis represents the impedance of the path through which the power supply voltage and current are supplied.

[0090] Waveform k1 (solid line) is the case where capacitors are mounted between power supply circuit 11 and LSI 12, while waveform k2 (dashed line) is the case where the same number of capacitors as those in waveform k1 are mounted on the opposite side of LSI 12 from power supply circuit 11. Waveform k3 (dotted line) is the case where, when mounting capacitors between power supply circuit 11 and LSI 12, twice the number of capacitors mounted as in waveform k1 are mounted.

[0091] In the simulation results shown in Figure 17, when comparing waveforms k1 and k2, with the same number of capacitors, the impedance is kept lower when the capacitors are mounted on the opposite side of the power supply circuit 11 from the LSI 12. Also, when comparing waveforms k1 and k3, when the capacitors are mounted between the power supply circuit 11 and the LSI 12, the impedance improvement is slight even if the number of capacitors is doubled. Therefore, it is clear that there is an advantage to arranging the capacitors on the opposite side of the power supply circuit 11 from the LSI 12.

[0092] Fig. 18 is a diagram showing an example of a simulation result. The figure shows the simulation result of the noise suppression effect when a slit is made in the power supply layer between the power supply circuit 11 and the LSI 12 to separate the current path from the target capacitor. The horizontal axis is frequency, and the vertical axis is the power supply voltage and the impedance of the path through which the current is supplied.

[0093] Waveform k11 shows the case where there is no slit in the power layer, and waveform k12 shows the case where there is a slit in the power layer. By providing a slit, the peak of the impedance curve is kept low. In this way, when a slit is provided in the power layer, the noise suppression effect can be improved in the same way as when the capacitor is mounted on the opposite side of the power circuit 11 when viewed from the LSI 12.

[0094] Although the embodiments have been described above, the configurations of the parts shown in the embodiments can be replaced with other parts having similar functions. Any other components or steps may be added. Furthermore, any two or more configurations (features) of the above-mentioned embodiments may be combined. [Explanation of symbols]

[0095] 1 Power supply 1a power circuit 1b Load circuit pt board Cg10 capacitor group C11, C12, C13, C14 capacitors I1 current L10 Propagation Path r0 isolated area

Claims

1. A load circuit; a power supply circuit that supplies a power supply voltage to the load circuit, monitors voltage fluctuations caused by an operation of the load circuit, and outputs to the load circuit a current that suppresses a first noise in a first frequency band among frequency bands of the voltage fluctuations in accordance with a result of the monitoring; one or more first capacitors mounted in a remote area away from a propagation path of the current from the power supply circuit to the load circuit, and configured to suppress a second noise in a second frequency band in a boundary range between the first frequency band and a third frequency band having a frequency range higher than that of the first frequency band; A power supply device having

2. 2. The power supply device according to claim 1, wherein the first capacitor is mounted in the isolated area so as not to interfere with current consumption by the load circuit when the current required to suppress the first noise is consumed by the load circuit.

3. 3. The power supply device according to claim 2, wherein when the current propagation path is in an inter-circuit area between the power supply circuit and the load circuit, the first capacitor is mounted in the isolated area located on the opposite side of the load circuit from the inter-circuit area.

4. 2. The power supply device according to claim 1, further comprising one or more second capacitors for suppressing a third noise in the third frequency band, the second capacitors being mounted on a back surface below a mounting position of the load circuit on a substrate on which the power supply circuit, the load circuit and the first capacitor are mounted.

5. A load circuit; a power supply circuit that supplies a power supply voltage to the load circuit, monitors voltage fluctuations caused by an operation of the load circuit, and outputs to the load circuit a current that suppresses a first noise in a first frequency band among frequency bands of the voltage fluctuations in accordance with a result of the monitoring; one or more first capacitors that suppress a second noise in a second frequency band that is in a boundary range between the first frequency band and a third frequency band that is higher in frequency than the first frequency band; a power supply layer provided on a substrate on which the load circuit, the power supply circuit, and the first capacitor are mounted; a slit formed in the power supply layer at a position that separates the first capacitor from a propagation path of the current from the power supply circuit to the load circuit; A power supply device having

6. 6. The power supply device according to claim 5, wherein the slit is formed between a first region of the power supply layer in which the power supply circuit and the load circuit are arranged, and a second region in which the first capacitor is arranged.

7. 6. The power supply device of claim 5, further comprising one or more second capacitors for suppressing a third noise in the third frequency band, the second capacitors being mounted on a back surface of the substrate below a mounting position of the load circuit.

Images