Rush current reduction circuit

Abstract

To provide a rush current reduction circuit that reduces generation of an inrush current when connecting a Battery Management System (BMS) module and a battery cell module.SOLUTION: A rush current reduction circuit includes a switching element that is connected between a power supply side of a Battery Management System (BMS) module and a power supply side of a battery cell module, and has a gate connected to a ground side via a first resistor, a diode having one end connected to a source of the switching element, a second resistor having one end connected to the other end of the diode and the other end connected to the ground side via the first resistor, and a Zener diode connected in parallel to the second resistor.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present invention relates to an inrush current reduction circuit that can reduce the occurrence of inrush current when a BMS (Battery Management System) module is connected to a battery cell module. [Background technology]

[0002] Generally, in a modular application in which a BMS (Battery Management System) module and a battery cell module must be connected, when the BMS module and the battery cell module are connected, an inrush current generated by inductance and capacitance components may cause damage to circuit elements.

[0003] As a result, there is a need for an inrush current reduction circuit that can reduce the occurrence of inrush current that may occur when a BMS module and a battery cell module are connected. Summary of the Invention [Problem to be solved by the invention]

[0004] The present invention is devised to solve the above problems, and aims to provide an inrush current reduction circuit that can reduce the generation of inrush current when a BMS (Battery Management System) module is connected to a battery cell module. [Means for solving the problem]

[0005] According to one aspect of the present invention, an inrush current reduction circuit includes a switching element connected between a power supply side of a BMS module and a power supply side of a battery cell module, the switching element having a gate connected to a ground side via a first resistor, a diode having one end connected to a source of the switching element, a second resistor having one end connected to the other end of the diode and the other end connected to the ground side via the first resistor, and a Zener diode connected in parallel to the second resistor.

[0006] In the present invention, the switching element includes a P-CH FET (Field Effect Transistor).

[0007] In the present invention, the switching element has a drain connected to a power supply side of the BMS module.

[0008] In the present invention, a source of the switching element is connected to a power supply side of the battery cell module.

[0009] In the present invention, the diode has an anode connected to the source of the switching element.

[0010] In the present invention, the Zener diode is connected between one end of the first resistor and the other end of the diode.

[0011] In the present invention, the Zener diode has an anode connected to one end of the first resistor and a cathode connected to the cathode of the diode.

[0012] In the present invention, the switching element blocks an inrush current generated at the initial connection between the BMS module and the battery cell module in an off state, and as the voltage level of the inrush current continues to increase, the switching element turns on when the voltage (Vgs) across the second resistor becomes equal to or higher than a critical voltage (Vth) using voltage distribution by the first resistor and the second resistor, thereby allowing only a portion of the inrush current to flow.

[0013] In the present invention, the switching element further includes a capacitor and a third resistor connected in parallel to both ends thereof.

[0014] In the present invention, the capacitor and the third resistor are connected in series.

[0015] In the present invention, the voltage applied to the input terminal of the switching element is adjusted according to the capacitance of the capacitor and the resistance value of the third resistor. Effect of the Invention

[0016] The present invention makes it possible to reduce the occurrence of inrush current when a Battery Management System (BMS) module is connected to a battery cell module.

[0017] The present invention makes it possible to prevent damage to circuit elements by reducing the occurrence of inrush current that may occur when a BMS module and a battery cell module are connected. [Brief description of the drawings]

[0018] [Figure 1] FIG. 1 is an example diagram showing a conventional connection circuit between a BMS module and a battery cell module. [Diagram 2] FIG. 2 is an exemplary diagram showing an inrush current waveform generated when the BMS module and the battery cell module are connected in FIG. [Diagram 3]1 is an exemplary diagram showing a schematic configuration of an inrush current reduction circuit according to a first embodiment of the present invention; [Figure 4] FIG. 3 is an exemplary diagram illustrating an operation of a switching element of an inrush current reduction circuit due to an inrush current generated when a BMS module and a battery cell module are connected. [Diagram 5] FIG. 11 is an exemplary diagram showing a schematic configuration of an inrush current reducing circuit according to a second embodiment of the present invention. [Figure 6] FIG. 5 is an illustrative diagram showing a voltage waveform illustrating a reduction in the voltage level applied to the input terminal of a switching element when a capacitor and a resistor circuit are connected in series between the gate and drain of the switching element. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0019] Hereinafter, an embodiment of the present invention will be described with reference to the accompanying drawings.

[0020] In this process, the thickness of each line and the size of each component shown in the drawings may be exaggerated for clarity and convenience of explanation. In addition, each term described below is defined in consideration of the function of the present invention, and may vary depending on the intention or practice of a user or operator. Therefore, these terms should be defined based on the contents of this specification.

[0021] FIG. 1 is an exemplary diagram showing a conventional connection circuit between a BMS module and a battery cell module.

[0022] As shown in FIG. 1, conventionally, no inrush current reduction circuit is included between the BMS module 10 (for convenience of explanation, FIG. 1 shows only the input section of the BMS module) and the battery cell module 20.

[0023] As a result, when the BMS module 10 and the battery cell module 20 are connected, an inrush current of a high voltage level occurs.

[0024] FIG. 2 is an example diagram showing an inrush current waveform generated when the BMS module and the battery cell module in FIG. 1 are connected to each other.

[0025] For example, referring to FIG. 2, when a battery cell module 20 with an input voltage of 114V is connected, an inrush current of about 220V level is instantaneously generated due to inductance and capacitance components, which may cause damage to the circuit elements of the BMS module 10.

[0026] Therefore, in this embodiment, an inrush current reduction circuit (110 in FIG. 3, 120 in FIG. 5) is further included between the BMS module 10 and the battery cell module 20, thereby reducing the occurrence of inrush current that may occur when the BMS module 10 and the battery cell module 20 are connected, thereby preventing damage to the circuit elements of the BMS module 10.

[0027] FIG. 3 is an exemplary diagram showing a schematic configuration of an inrush current reducing circuit according to a first embodiment of the present invention.

[0028] 3, the inrush current reduction circuit 110 according to the first embodiment of the present invention includes a switching element Q1 having a drain connected to a power supply side of the BMS module 10, a source connected to a power supply side of the battery cell module 20, and a gate connected to a ground side via a first resistor R6, a diode D6 having an anode connected to the source of the switching element Q1, a second resistor R5 having one end connected to the cathode of the diode D6 and the other end connected to the ground side via the first resistor R6, and a Zener diode D4 connected in parallel to the second resistor R5.

[0029] Here, the switching element Q1 includes a P-CH FET (Field Effect Transistor), and the Zener diode D4 has an anode connected to one end of the first resistor R6 and a cathode connected to the cathode of the diode D6.

[0030] For reference, a conventional inrush current prevention circuit prevents inrush current by connecting a resistor and a switch in parallel and controlling the switch.

[0031] However, the inrush current reduction circuit of the first embodiment of the present invention is different in that it does not control a switch, but instead uses an RC circuit (see FIG. 5) and a switching element Q1 (see FIG. 3) to prevent inrush current that occurs when the modules are initially connected, and the circuit is configured so that the switching element Q1 operates above a specified voltage.

[0032] FIG. 4 is an exemplary diagram shown to explain the operation of a switching element of an inrush current reduction circuit caused by an inrush current generated when a BMS module and a battery cell module are connected in FIG.

[0033] Referring to (a) of FIG. 4, an inrush current that occurs at the initial connection between the BMS module 10 and the battery cell module 20 is blocked by the switching element Q1 in the off state, so that the inrush current is not transmitted to the BMS module 10.

[0034] However, if the voltage level of the inrush current continues to increase, the stress on the switching element Q1 increases.

[0035] Referring to FIG. 4(b), after the BMS module 10 and the battery cell module 20 are connected, if the voltage level of the inrush current continues to increase, i.e., if the voltage (Vgs) across the second resistor R5 becomes equal to or greater than the critical voltage (Vth) using voltage distribution by the first resistor R6 and the second resistor R5, the switching element Q1 turns on, causing a portion of the inrush current to flow.

[0036] FIG. 5 is a diagram illustrating a schematic configuration of an inrush current reducing circuit according to a second embodiment of the present invention.

[0037] Referring to FIG. 5, the inrush current reduction circuit 120 according to the second embodiment of the present invention further includes a capacitor C17 and a third resistor R1 circuit connected in series between the gate and drain of the switching element Q1 of the inrush current reduction circuit 110 according to the first embodiment shown in FIG.

[0038] The capacitor C17 and the third resistor R1 connected in parallel between the gate and drain of the switching element Q1 allow current to flow through the capacitor C17 and the third resistor R1 connected in parallel when the BMS module 10 and the battery cell module 20 are connected, and due to the characteristics of the capacitor C17, if no voltage change occurs, the current will stop flowing after a certain time (i.e., a time depending on the capacitance of the capacitor).

[0039] At this time, the capacitor C17 and the third resistor R1 are connected in series.

[0040] Therefore, assuming that approximately 150V is applied to the input terminal of the switching element Q1 before the capacitor C17 and the third resistor R1 circuit connected in series between the gate and drain of the switching element Q1 are included (see FIG. 4(b)), when the capacitor C17 and the third resistor R1 circuit connected in series between the gate and drain of the switching element Q1 are included, approximately 125V (i.e., a voltage reduced by approximately 25V from 150V) is applied to the input terminal of the switching element Q1, thereby reducing the burden on the switching element Q1.

[0041] At this time, the voltage applied to the input terminal of the switching element Q1 can be adjusted by the capacitance of the capacitor C17 and the resistance value of the third resistor R1.

[0042] FIG. 6 is an illustrative diagram showing voltage waveforms illustrating a reduction in the voltage level applied to the input terminal of the switching element Q1 when a capacitor C17 and a third resistor R1 circuit are included in series between the gate and drain of the switching element Q1 in FIG. 5.

[0043] Referring to FIG. 6 and FIG. 4(b), when a circuit including a capacitor C17 and a third resistor R1 connected in series between the gate and drain of the switching element Q1 is included, a voltage reduced to about 125V (i.e., a voltage reduced by about 25V from 150V) is applied to the input terminal of the switching element Q1, thereby reducing the burden on the switching element Q1.

[0044] As described above, the inrush current reduction circuit of the present embodiment prevents damage to each circuit element of the BMS module 10 connected to the battery cell module 20, reduces the inrush current by turning on / off the switching element included in the inrush current reduction circuit, and reduces the burden on the switching element Q1 by the capacitor C17 and third resistor R1 circuit connected in parallel to the switching element.

[0045] The present invention has been described with reference to the embodiments shown in the drawings, which are merely illustrative, and a person skilled in the art will appreciate that various modifications and other equivalent embodiments are possible. Accordingly, the scope of technical protection of the present invention should be defined by the following claims. Also, the implementations described herein may be embodied as, for example, a method or process, an apparatus, a software program, a data stream, or a signal. Even if only a single implementation is discussed (e.g., only a method), the implementation of the discussed features may be embodied in other forms (e.g., an apparatus or a program). An apparatus may be embodied in appropriate hardware, software, firmware, and the like. A method may be embodied in an apparatus, such as, for example, a processor, which generally refers to a processing device including a computer, a microprocessor, an integrated circuit, or a programmable logic device. Also, a processor includes communication devices such as computers, cell phones, portable / personal digital assistants ("PDAs"), and other devices that facilitate communication of information between the apparatus and an end user. [Explanation of symbols]

[0046] 10 BMS Modules 20 Battery Cell Module

Claims

1. a switching element connected between a power source of a BMS (Battery Management System) module and a power source of a battery cell module, the switching element having a gate connected to a ground via a first resistor; a diode having one end connected to the source of the switching element; a second resistor having one end connected to the other end of the diode and the other end connected to a ground via the first resistor; a Zener diode connected in parallel to the second resistor; An inrush current reduction circuit comprising:

2. The switching element is 2. The inrush current reduction circuit according to claim 1, comprising a P-CH FET (Field Effect Transistor).

3. The switching element is The inrush current reduction circuit as claimed in claim 1 , wherein the drain is coupled to the power supply side of the BMS module.

4. The switching element is 2. The inrush current reduction circuit as set forth in claim 1, wherein a source is coupled to a power supply side of the battery cell module.

5. The diode is 2. The inrush current reduction circuit of claim 1, wherein an anode is coupled to a source of the switching element.

6. The Zener diode is 2. The inrush current reduction circuit according to claim 1, further comprising a first resistor connected between one end of the first resistor and the other end of the diode.

7. The Zener diode is 7. The inrush current reduction circuit of claim 6, wherein an anode is connected to one end of the first resistor and a cathode is connected to the cathode of the diode.

8. The switching element is The inrush current generated at the initial connection between the BMS module and the battery cell module is cut off in the OFF state, As the voltage level of the inrush current continues to increase, the first resistor and the second resistor are used to divide the voltage, and when the voltage (Vgs) across the second resistor reaches or exceeds a threshold voltage (Vth), the second resistor is turned on, thereby allowing only a portion of the inrush current to flow.

2. The inrush current reduction circuit according to claim 1 .

9. 2. The inrush current reduction circuit according to claim 1, wherein the switching element further comprises a capacitor and a third resistor connected in parallel to both ends of the switching element.

10. The inrush current reduction circuit of claim 9 , wherein the capacitor and the third resistor are connected in series.

11. 10. The inrush current reducing circuit according to claim 9, wherein the voltage applied to the input terminal of the switching element is adjusted by a capacitance of the capacitor and a resistance value of the third resistor.

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