Image sensor

Abstract

To provide an image sensor with an improved structure.SOLUTION: An image sensor 100 includes: a substrate including a plurality of pixel regions PX including a first pixel region PX1 and a second pixel region PX2 that are adjacent to each other; a photoelectric conversion part 120 existing on the substrate; and a pixel separation part for sectioning the first pixel region and the second pixel region penetrating at least a part of the substrate between the first pixel region and the second pixel region. The pixel separation part includes: insulating parts 202 adjacent to the first and second pixel regions; and a conductive layer 204 and an internal layer located between the insulating parts and including different materials. The pixel separation part includes: a first part 210 including a part filled with the conductive layer between the insulating parts in an intersecting direction intersecting with the pixel separation part; and a second part 220 including the conductive layer and the internal layer located between the first and second insulating parts in the intersecting direction.SELECTED DRAWING: Figure 5

Description

[Technical field]

[0001] The present disclosure relates to image sensors, and more particularly, to image sensors with improved structures. [Background technology]

[0002] An image sensor is a semiconductor device that converts optical images into electrical signals. Image sensors can be classified into charge coupled device (CCD) type image sensors based on silicon semiconductors and complementary metal oxide semiconductor (CMOS) type image sensors (CIS).

[0003] Among these, CMOS image sensors have a simple driving method and can integrate signal processing circuits on a single chip, making them compact and allowing them to consume less power and be applied to products with limited battery capacity. As the electronics industry develops, various research efforts are ongoing to improve the performance of CMOS image sensors. Summary of the Invention [Problem to be solved by the invention]

[0004] The embodiment aims to provide an image sensor having excellent performance. [Means for solving the problem]

[0005] The image sensor according to the embodiment includes a substrate including a plurality of pixel regions including a first pixel region and a second pixel region adjacent to each other, a photoelectric conversion unit located on the substrate, and a pixel separation portion penetrating at least a portion of the substrate between the first pixel region and the second pixel region and separating the first pixel region from the second pixel region. The pixel separation portion includes first and second insulating portions adjacent to the first and second pixel regions, respectively, and a conductive layer and an internal layer located between the first and second insulating portions and including different materials. The pixel separation portion includes a first portion including a portion where a conductive layer is filled between the first and second insulating portions in a cross direction crossing the pixel separation portion, and a second portion including a conductive layer and an internal layer located between the first and second insulating portions in the cross direction.

[0006] The image sensor according to the embodiment includes a substrate including a plurality of pixel regions, a photoelectric conversion unit disposed on the substrate, a light scattering pattern disposed adjacent to one surface of the substrate, and a pixel separation unit penetrating at least a portion of the substrate between the first pixel region and the second pixel region to separate the first pixel region from the second pixel region. The pixel separation unit includes a first portion and a second portion having a width greater than that of the first portion in a cross direction crossing the pixel separation unit. The second portion includes an insulating layer adjacent to the pixel region, a conductive layer disposed on the insulating layer, and an inner layer disposed inside the conductive layer and having a refractive index lower than that of the conductive layer.

[0007] The image sensor according to the embodiment includes a substrate including a plurality of pixel regions including a first pixel region and a second pixel region adjacent to each other, a photoelectric conversion unit disposed on the substrate, and a pixel separation portion penetrating at least a portion of the substrate between the first pixel region and the second pixel region to separate the first pixel region from the second pixel region. The pixel separation portion includes first and second insulating portions adjacent to the first and second pixel regions, respectively, and a first portion including a conductive layer filling between the first and second insulating portions in a cross direction crossing the pixel separation portion, and a second portion having a width larger than the first portion, a stacking structure different from that of the first portion, and an electrically insulating structure. Effect of the Invention

[0008] According to the embodiment, the thickness of the conductive layer in the pixel separator, which may absorb a relatively large amount of light, can be reduced, thereby reducing the amount of light absorbed in the conductive layer. As a result, the amount of light reaching the photoelectric conversion unit can be increased, quantum efficiency can be improved, and efficiency of the image sensor can be improved. A part of the pixel separator can be a part having an electrical connection structure to which a negative voltage can be applied, and another part of the pixel separator can be a part in which total reflection is induced by an internal layer having a refractive index lower than that of the conductive layer. As a result, dark current and crosstalk can be reduced. Therefore, performance of the image sensor can be improved.

[0009] According to the embodiment, it is possible to form pixel separators having different stacking structures according to the difference in width without adding an additional process. It is possible to form an image sensor having excellent performance through a simple manufacturing process. This can reduce manufacturing costs and / or the complexity of the manufacturing process, and reduce the possibility of process defects occurring in the image sensor. Therefore, it is possible to improve the reliability of the image sensor. [Brief description of the drawings]

[0010] [Figure 1] FIG. 1 is a block diagram illustrating an example of an image sensor. [Diagram 2] 1 is a plan view illustrating an image sensor according to an embodiment of the present invention; [Diagram 3] 3 is a cross-sectional view taken along lines AA', BB' and CC' in FIG. 2. [Figure 4] 3 is a cross-sectional view showing a first portion, a second portion, and a third portion of a pixel separator included in the image sensor shown in FIG. 2. [Diagram 5] FIG. 4 is a plan view taken along line DD' in FIG. [Figure 6] FIG. 4 is a plan view taken along line EE' in FIG. [Figure 7]5 is a perspective view illustrating roughly an example of an internal layer included in the second or third portion of the pixel separator illustrated in FIG. 4. FIG. [Figure 8a] 8a to 8h are cross-sectional views illustrating a method for manufacturing an image sensor according to an embodiment. [Figure 8b] 8a to 8h are cross-sectional views illustrating a method for manufacturing an image sensor according to an embodiment. [Figure 8c] 8a to 8h are cross-sectional views illustrating a method for manufacturing an image sensor according to an embodiment. [Figure 8d] 8a to 8h are cross-sectional views illustrating a method for manufacturing an image sensor according to an embodiment. [Figure 8e] 8a to 8h are cross-sectional views illustrating a method for manufacturing an image sensor according to an embodiment. [Figure 8f] 8a to 8h are cross-sectional views illustrating a method for manufacturing an image sensor according to an embodiment. [Figure 8g] 8a to 8h are cross-sectional views illustrating a method for manufacturing an image sensor according to an embodiment. [Figure 8h] 8a to 8h are cross-sectional views illustrating a method for manufacturing an image sensor according to an embodiment. [Figure 9] 11 is a cross-sectional view of an image sensor according to another embodiment. [Figure 10] 11 is a cross-sectional view showing a pixel separator included in an image sensor according to another embodiment. [Figure 11] 11 is a cross-sectional view showing a pixel separator included in an image sensor according to another embodiment. [Figure 12] 11 is a cross-sectional view showing a pixel separator included in an image sensor according to another embodiment. [Figure 13] FIG. 13 is a plan view of an image sensor according to another embodiment. [Figure 14] FIG. 13 is a plan view of an image sensor according to another embodiment. [Figure 15] FIG. 13 is a plan view of an image sensor according to another embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] Hereinafter, various embodiments will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily carry out the embodiments. The embodiments can be carried out in various forms and are not limited to the embodiments described herein.

[0012] In order to clearly describe the present disclosure, parts that are not relevant to the description will be omitted, and the same reference numerals will be used throughout the specification to refer to the same or similar components.

[0013] In addition, the size and thickness of each component shown in the drawings are arbitrarily shown for convenience of explanation, and the present disclosure is not limited to the drawings. For convenience of explanation and / or simple illustration, the thickness of some layers and regions are enlarged or exaggerated.

[0014] Furthermore, when a part such as a layer, film, region, or plate is said to be "on" or "above" another part, it does not only mean that it is "directly above" the other part, but also when there is another part in between. Conversely, when a part is said to be "directly above" another part, it means that there is no other part in the middle. Furthermore, when a part is said to be "on" or "above" a reference part, it means that it is located above or below the reference part, and does not necessarily mean that it is located "above" or "above" the direction opposite to gravity.

[0015] Additionally, throughout the specification, when a part "comprises" a certain element, unless otherwise specified to the contrary, it does not mean that it excludes other elements, but that it may further include other elements.

[0016] Also, throughout the specification, "on a plane" or "when viewed from a plane" can mean when the target part is viewed from above, and "on a cross section" or "when viewed from a cross section" can mean when the target part is cut vertically and viewed from the side.

[0017] Hereinafter, an image sensor and a manufacturing method thereof according to an embodiment will be described in detail with reference to FIGS. 1 to 7 and 8a to 8h.

[0018] FIG. 1 is a block diagram illustrating an example of an image sensor.

[0019] 1, an image sensor 100 according to an embodiment may include a pixel array 10 and a logic circuit 20 that controls the pixel array 10. The logic circuit 20 is a circuit for controlling the pixel array 10, and may include, for example, a controller 22, a timing generator 24, a row driver 26a, a readout circuit 26b, a ramp signal generator 26c, and a data buffer 28. The image sensor 100 may further include an image signal processor 30. According to an embodiment, the image signal processor 30 may be located outside the image sensor 100.

[0020] The image sensor 100 may convert light received from the outside into an electrical signal to generate an image signal, and the image signal generated by the image sensor 100 may be provided to the image signal processor 30 .

[0021] The image sensor 100 may be mounted in an electronic device having an image or light sensing function. For example, the image sensor 100 may be mounted in an electronic device such as a camera, a smartphone, a wearable device, an Internet of Things (IoT) device, a home appliance, a tablet, a personal digital assistant (PDA), a portable multi media player (PMP), a navigation device, a drone, or an advanced driver assistance system (ADAS). Alternatively, the image sensor 100 may be mounted in an electronic device provided as a component in a vehicle, furniture, manufacturing equipment, a door, or various measuring instruments.

[0022] The pixel array 10 may include a plurality of pixel areas (PX), and a plurality of row lines (RL) and a plurality of column lines (CL) respectively connected to the plurality of pixel areas (PX).

[0023] In one embodiment, each pixel region (PX) may include at least one photoelectric conversion element. The photoelectric conversion element may sense incident light and convert the incident light into an electrical signal corresponding to the amount of light, i.e., a plurality of analog pixel signals. The photoelectric conversion element may be a photodiode or a pinned diode. Alternatively, the photoelectric conversion element may be a single-photon avalanche diode (SPAD) applied to a 3D sensor pixel. The level of the analog pixel signal output from the photoelectric conversion element may be proportional to the amount of light provided to each pixel region (PX) or the amount of charge output from the photoelectric conversion element.

[0024] The row lines (RL) may extend in one direction and be connected to the pixel regions (PX) arranged along the one direction. For example, a control signal output from the row driver 26a to the row line (RL) may be transmitted to the gates of transistors in the pixel regions (PX) connected to the row line (RL). The column lines (CL) may extend in a direction intersecting the one direction and be connected to the pixel regions (PX) arranged along the direction intersecting the one direction. The pixel signals output from the pixel regions (PX) may be transmitted to the readout circuit 26b via the column lines (CL).

[0025] In one embodiment, a plurality of pixel regions (PX) may be connected in the form of a plurality of columns and a plurality of rows to form one unit pixel group. That is, a plurality of pixels arranged in the extending direction of the row line (RL) and a plurality of pixels arranged in the extending direction of the column line (CL) may form one unit pixel group. For example, one unit pixel group may include a plurality of pixels arranged in the form of two columns and two rows, and one unit pixel group may output one analog pixel signal. However, the embodiment is not limited thereto, and various modifications are possible.

[0026] According to an embodiment, each pixel region (PX) may include a pixel circuit that processes charges generated by a photoelectric conversion element and outputs an electrical signal. The pixel circuit may include a transfer transistor, a reset transistor, a selection transistor, a driving transistor, etc. The embodiment is not limited thereto, and the pixel circuit may have various structures.

[0027] The controller 22 may generally control the timing generator 24, the row driver 26a, the readout circuit 26b, the ramp signal generator 26c, the data buffer 28, etc., included in the image sensor 100. For example, the controller 22 may control operation timing using a control signal. In one embodiment, the controller 22 may receive a mode signal indicating an imaging mode from the application processor, and generally control the image sensor 100 based on the received mode signal.

[0028] The timing generator 24 can generate a signal that serves as a reference for the operation timing of the image sensor 100. The timing generator 24 can provide a control signal that controls the timing of the row driver 26a, the readout circuit 26b, and the ramp signal generator 26c.

[0029] The row driver 26a may generate control signals for driving the pixel array 10 in response to a control signal from the timing generator 24, and provide control signals to a plurality of pixel regions (PX) of the pixel array 10 via a plurality of row lines (RL). For example, the row driver 26a may generate a transfer signal for controlling a transfer transistor, a reset control signal for controlling a reset transistor, a selection control signal for controlling a selection transistor, and the like, and provide them to the pixel array 10.

[0030] The readout circuit 26b can convert the pixel signal (or electrical signal) outputted through the corresponding column line (CL) into a pixel value indicating the amount of light. The ramp signal generator 26c can generate a reference signal or a ramp signal and transmit it to the readout circuit 26b. For example, the readout circuit 26b can compare the ramp signal with the pixel signal and convert the pixel signal into a pixel value. The pixel value may be image data having multiple bits.

[0031] The data buffer 28 can store pixel values ​​of the pixel area (PX) transmitted from the readout circuit 26b, and output the stored pixel values ​​in response to a signal from the controller 22.

[0032] The image signal processor 30 can perform image signal processing on the image signal received from the data buffer 28. For example, the image signal processor 30 can receive a plurality of image signals from the data buffer 28 and combine the received image signals to generate one image.

[0033] An element, apparatus, system, module, part, unit, controller, circuit, and / or part thereof (e.g., image sensor 100, pixel array 10, logic circuit 20, controller 22, timing generator 24, row driver 26a, readout circuit 26b, ramp signal generator 26c, data buffer 28, image signal processor 30, part thereof, etc.) according to an embodiment may include, be included in, or be implemented by one or more processing circuits. The one or more processing circuits may include hardware including logic circuits, a hardware / software combination such as a processor executing software, or a combination thereof. For example, the processing circuit may include, but is not limited to, a central processing unit (CPU), an arithmetic logic unit (ALU), a graphics processing unit (GPU), an application processor (AP), a digital signal processor (DSP), a micro computer, a field programmable gate array (FPGA), a programmable logic unit, a micro processor, an application-specific integrated circuit (ASIC), a neural network processing unit (NPU), an electronic control unit (ECU), an image signal processor (ISP), and the like.In one embodiment, the processing circuitry may include a non-transitory computer readable storage device (e.g., memory) and a processor (e.g., CPU). For example, the non-transitory computer readable storage device may be a solid state drive (SSD) that stores instructions. The processor may execute instructions to implement functions and / or methods performed by various elements, devices, systems, modules, parts, units, controllers, circuits and / or portions thereof.

[0034] The image sensor 100 described above is merely an example, and the structure and method of the image sensor 100 may be modified in various ways.

[0035] The image sensor 100 (more specifically, the pixel array 10) according to the embodiment will be described in more detail with reference to FIGS.

[0036] Fig. 2 is a plan view showing an image sensor 100 according to an embodiment, and Fig. 3 is a cross-sectional view taken along lines A-A', B-B', and C-C' in Fig. 2. Fig. 2 is based on a first surface 111 of a substrate 110 adjacent to a wiring unit 140, and the element isolation unit 300 is omitted for clear understanding and simplified illustration. In Fig. 3, a dummy pixel isolation unit 200d provided in a dummy cell located outside a plurality of pixel regions (PX) and a contact unit 180 for applying a voltage thereto are additionally shown in part X-X'.

[0037] Referring to Figures 2 and 3, in one embodiment, an image sensor 100 may include a substrate 110 including a plurality of pixel regions (PX), a photoelectric conversion unit 120 positioned on the substrate 110, and a pixel separation unit 200 separating the plurality of pixel regions (PX).

[0038] In the embodiment, the substrate 110 may be a semiconductor substrate including a semiconductor material. For example, the substrate 110 may be a bulk substrate including a semiconductor material, a substrate having an epitaxial layer formed on a bulk substrate, or a semiconductor-on-insulator. In this case, the semiconductor material included in the substrate 110 may have a first conductivity type (e.g., p-type or n-type) including a first conductivity type dopant.

[0039] The semiconductor material included in the substrate 110 may include at least one of a group IV semiconductor, a group III-V compound semiconductor, and a group II-VI compound semiconductor. For example, the semiconductor material included in the substrate 110 may include at least one of Si, Ge, SiGe, SiC, GaAs, InAs, GaP, InP, InSb, InGaAs, ZnTe, and CdS. As an example, the bulk substrate may be a single crystal or polycrystalline semiconductor substrate and may include Si, Ge, or SiGe. As an example, the semiconductor-on-insulator may be a silicon-on-insulator (SOI), a germanium-on-insulator (SGOI), or a silicon-germanium-on-insulator (SGOI).

[0040] In the embodiment, the plurality of pixel regions (PX) provided on the substrate 110 may include a first pixel region (PX1) and a second pixel region (PX2) adjacent to each other in a first direction (X-axis direction in the drawing), and may further include a third pixel region (PX3) and a fourth pixel region (PX4) adjacent to the first pixel region (PX1) and the second pixel region (PX2), respectively, in a second direction (Y-axis direction in the drawing) intersecting the first direction (X-axis direction in the drawing). For example, the first pixel region (PX1), the second pixel region (PX2), the third pixel region (PX3), and the fourth pixel region (PX4) shown in FIG. 2 may constitute one unit pixel group, but the embodiment is not limited thereto.

[0041] A photoelectric conversion unit 120 for converting light incident from the outside into an electrical signal may be located on the substrate 110. The photoelectric conversion unit 120 may include a second conductive type dopant contained in the substrate 110 and may have a second conductive type (e.g., n-type or p-type) opposite to that of the substrate 110.

[0042] The substrate 110 and the photoelectric conversion unit 120 may constitute a photodiode. The photodiode may be constituted by a pn junction between the substrate 110 having a first conductivity type and the photoelectric conversion unit 120 having a second conductivity type. The photoelectric conversion unit 120 constituting the photodiode may generate and accumulate charges in proportion to the amount of light provided to each pixel region (PX).

[0043] The photoelectric conversion unit 120 may be formed to correspond to each pixel region (PX) by the device isolation unit 300. For example, the device isolation unit 300 may be located in a first trench 300a having a first depth, and an active region may be defined in each pixel region (PX). For example, the first trench 300a may be a shallow trench (ST). The device isolation unit 300 may include at least one of silicon oxide, silicon nitride, and silicon oxynitride, and may include a single layer or multiple layers. However, the embodiment is not limited thereto. Therefore, the material of the device isolation unit 300 may be variously modified, and the device isolation unit 300 may not be provided.

[0044] A pixel separating portion 200 may be disposed between the pixel regions PX, penetrating at least a portion of the substrate 110 to separate the pixel regions PX. The pixel separating portion 200 may also be referred to as a pixel separating structure. In this case, the pixel separating portion 200 may be formed by penetrating a portion (e.g., a central portion) of the device separating portion 300.

[0045] In one embodiment, the pixel separator 200 may include a first pixel separator extending in a first direction (the X-axis direction in the drawing) and a second pixel separator extending in a second direction (the Y-axis direction in the drawing). For example, the pixel separator 200 may have a lattice shape that defines a plurality of pixel regions (PX) and may separate at least two adjacent pixel regions (PX). Thus, each pixel region (PX) may be surrounded by a pair of first pixel separators and a pair of second pixel separators.

[0046] The pixel isolation portion 200 may be located in a second trench 200a having a second depth greater than the first depth to define a pixel region (PX). For example, the second trench 200a may be a deep trench (DT). In an embodiment, the pixel isolation portion 200 may be a front deep trench-isolation (FDTI) formed from the first surface 111 of the substrate 110. As an example, the pixel isolation portion 200 may extend from the first surface 111 to the second surface 112 of the substrate 110. However, the embodiment is not limited thereto. The pixel isolation portion 200 may not extend to the second surface 112, but may be located in a part of the substrate 110 in a thickness direction of the substrate 110. Alternatively, the pixel isolation portion 200 may further include a back deep trench-isolation (BDTI) formed from the second surface 112 of the substrate 110.

[0047] In one embodiment, the pixel separator 200 may include a conductive layer 204. A negative voltage may be applied to the conductive layer 204 of the pixel separator 200 to improve dark current through hole accumulation, thereby improving the performance of the image sensor 100.

[0048] A dummy cell and a dummy pixel separator 200d for separating the dummy cells may be located in an outer region of a plurality of pixel regions (PX). In this case, the dummy pixel separator 200d may include a conductive layer 204d connected to the conductive layer 204 included in the pixel separator 200. For example, the conductive layer 204d of the dummy pixel separator 200d may be formed in a process of forming the conductive layer 204 included in the pixel separator 200. Thus, the conductive layer 204d of the dummy pixel separator 200d may be made of the same material as the conductive layer 204 included in the pixel separator 200. However, the embodiment is not limited thereto, and the conductive layer 204d of the dummy pixel separator 200d may be formed in a process different from that of the conductive layer 204 included in the pixel separator 200, or may include a different material from that of the conductive layer 204.

[0049] A contact unit 180 electrically connected to the conductive layer 204d of the dummy pixel separating unit 200d may be located on the second surface 112 side of the substrate 110 in a portion where the dummy pixel separating unit 200d is located. The contact unit 180 may be connected to the conductive layer 204d of the dummy pixel separating unit 200d and apply a negative voltage to the conductive layer 204 of the pixel separating unit 200 via the conductive layer 204d of the dummy pixel separating unit 200d.

[0050] In one embodiment, a contact trench may be formed in the second surface 112 of the substrate 110. The contact portion 180 may include a wiring layer 182 located on the second surface 112 and on an inner surface of the contact trench, and a pad 184 located on the wiring layer 182 in the contact trench and filling a remaining portion of the contact trench. The wiring layer 182 may be connected to an external circuit by penetrating the substrate 110 and connecting to the wiring portion 140. The wiring layer 182 may be electrically connected to a conductive layer 204d included in the dummy pixel separation portion 200d. The conductive layer 204d and the contact portion 180 may be stably connected to each other by the contact trench.

[0051] The wiring layer 182 or the pad 184 may include a conductive material. For example, the wiring layer 182 or the pad 184 may include at least one of copper, aluminum, tungsten, nickel, gold, tin, manganese, cobalt, titanium, tantalum, ruthenium, and beryllium, or an alloy including any of the above. As an example, the wiring layer 182 may include tungsten, and the pad 184 may include aluminum. However, the embodiments are not limited to the materials of the wiring layer 182 and the pad 184.

[0052] The above-mentioned structure is presented as an example of a structure for applying a negative voltage to the conductive layer 204d of the dummy pixel separating portion 200d, and the embodiment is not limited thereto. That is, in the embodiment, the pad 184 is electrically connected to the conductive layer 204d of the dummy pixel separating portion 200d via the wiring layer 182, but the pad 184 may be in direct contact with the conductive layer 204d of the dummy pixel separating portion 200d. Various other modifications are possible.

[0053] In the drawings, a surface of the element isolation unit 300 and a surface of the pixel isolation unit 200 are shown to be on the same plane as the first surface 111 of the substrate 110 from the first surface 111 of the substrate 110. However, the embodiment is not limited thereto, and the first surface 111 of the substrate 110 and the surface of the element isolation unit 300 and / or the surface of the pixel isolation unit 200 may be on different planes.

[0054] The pixel circuit 130 may be located on the first surface 111 of the substrate 110. More specifically, the pixel circuit 130 may be located within a pixel region (PX) defined by the pixel isolation portion 200 and / or the element isolation portion 300. For example, the pixel circuit 130 may include at least one transistor 132, a transfer transistor 134, and an impurity region 136.

[0055] A transfer transistor 134 may be located on the first surface 111 of the substrate 110. The transfer transistor 134 may be electrically connected to the photoelectric conversion unit 120. The transfer transistor 134 may include a transfer gate structure 134a and a floating diffusion region 134b. The floating diffusion region 134b may be a region having a second conductivity type opposite to the conductivity type of the substrate 110, and may be a region in which charges generated by the photoelectric conversion unit 120 are accumulated. The floating diffusion region 134b may be adjacent to at least one side of the transfer gate structure 134a. The shape of the floating diffusion region 134b is not limited to that shown in FIG. 2 and may be variously modified according to the embodiment.

[0056] The transfer gate structure 134a can control whether or not the charges generated in the photoelectric conversion unit 120 are transferred to the floating diffusion region 134b according to an applied voltage. The transfer gate structure 134a can include a transfer gate electrode, a gate dielectric film, and / or a gate spacer.

[0057] The transistor 132 may include at least one of a reset transistor, a selection transistor, and a driving transistor included in the pixel circuit. The transistor 132 may include a gate structure and source and drain regions located on both sides of the gate structure. As an example, the pixel circuit 130 may be realized by multiple adjacent pixel regions (PX) sharing the transistor 132.

[0058] The impurity region 136 may be isolated from the floating diffusion region 134b and the transistor 132. The impurity region 136 may be doped with a first conductive type dopant and may have the same conductive type as the substrate 110, and a ground voltage may be applied to the impurity region 136.

[0059] The pixel circuit 130 described above is provided by way of example only and is not intended to be limiting, and thus the pixel circuit 130 may have a variety of structures or configurations.

[0060] The wiring unit 140 may be located on the first surface 111 of the substrate 110. The wiring unit 140 may include a plurality of wiring layers 144 located with an interlayer insulating layer 142 therebetween, and contact vias 146 that penetrate the interlayer insulating layer 142 and connect the plurality of wiring layers 144. The wiring layers 144 and the contact vias 146 may be connected to configure a desired circuit. The contact vias 146 may be formed in the same process as the wiring layers 144, or may be formed in a process separate from the wiring layers 144. The wiring unit 140 may be electrically connected to the pixel circuit 130.

[0061] The interlayer insulating layer 142 may include an insulating material, such as silicon oxide, silicon nitride, silicon oxynitride, or a low-k material, where the low-k material may have a lower dielectric constant than silicon oxide.

[0062] The wiring layer 144 or the contact via 146 may include at least one of a metal, a metal alloy, a metal nitride, a metal silicide, and a doped semiconductor material. Here, the metal or metal alloy may include at least one of tungsten, molybdenum, aluminum, copper, and cobalt, and the metal nitride may include at least one of tungsten nitride, molybdenum nitride, titanium nitride, and tantalum nitride. The wiring layer 144 or the contact via 146 may further include a metal oxide or a metal oxynitride formed by oxidizing the above-mentioned materials. The wiring layer 144 or the contact via 146 may be formed of a single layer or multiple layers.

[0063] However, embodiments are not limited thereto, and the interlayer insulating layer 142 may include various insulating materials, and the wiring layer 144 or the contact via 146 may include various conductive materials.

[0064] According to an embodiment, a supporting substrate or a logic chip having a logic circuit may be further provided on the wiring unit 140. However, the supporting substrate may not be provided, or the image sensor 100 may be located adjacent to the logic chip. Various other modifications are possible.

[0065] On the second surface 112 of the substrate 110 may be included a horizontal insulating layer 150 , a color filter 160 , a filter separator 162 , a planarization layer 164 and a microlens 170 .

[0066] More specifically, a horizontal insulating layer 150 may be positioned on the second surface 112 of the substrate 110. The horizontal insulating layer 150 may be positioned to cover the second surface 112 of the substrate 110 and the pixel separator 200.

[0067] The horizontal insulating layer 150 may include various insulating materials. For example, the anti-reflection layer may include an oxide, a nitride, a nitride oxide, or a fluoride containing at least one of hafnium, zirconium, aluminum, tantalum, titanium, yttrium, cerium, lanthanum, neodymium, praseodymium, ytterbium, and silicon. As an example, the horizontal insulating layer 150 may function as an anti-reflection layer, but the embodiment is not limited thereto.

[0068] In one embodiment, the horizontal insulating layer 150 may include a plurality of layers including different materials and having different thicknesses. For example, in the horizontal insulating layer 150, a first horizontal insulating layer located adjacent to the second surface 112 of the substrate 110 may be a fixed charge layer having a negative fixed charge. In this case, the dark current may be improved (e.g., reduced) due to hole accumulation around the fixed charge layer. This may improve the performance of the image sensor 100. In one embodiment, the first horizontal insulating layer may include a metal oxide or a metal fluoride including at least one of hafnium, zirconium, aluminum, tantalum, titanium, and yttrium. As an example, the horizontal insulating layer 150 or the anti-reflection layer may include a first horizontal insulating layer including hafnium oxide, a second horizontal insulating layer including silicon oxide or silicon nitride, and a third horizontal insulating layer including hafnium oxide. However, the embodiment is not limited thereto, and the number and thickness of layers included in the horizontal insulating layer 150 may be variously modified.

[0069] The filter separator 162 may be located on the horizontal insulating layer 150. In a plan view, the filter separator 162 may be located at a position overlapping a portion of the pixel separator 200. The filter separator 162 may be located at a boundary portion of the color filter 160, and may be formed to surround at least a portion of the color filter 160. For example, the filter separator 162 may have the same or similar lattice structure as the pixel separator 200, but the embodiment is not limited thereto. The filter separator 162 may also be called a fence pattern, a grid pattern, or the like.

[0070] The filter separator 162 can prevent, reduce or minimize light that is obliquely incident on the color filter 160 of one of the pixel regions (PX) from entering the color filter 160 of another adjacent pixel region (PX), thereby preventing, reducing or minimizing crosstalk between the pixel regions (PX) and improving the performance of the image sensor 100.

[0071] In one embodiment, the filter separator 162 may include a material having a refractive index smaller than that of the color filter 160 or silicon oxide, or a material having a refractive index of about 1.0 to about 1.4. When the filter separator 162 includes a material having a small refractive index, light incident on the filter separator 162 may be totally reflected and directed toward the inside of the pixel region (PX).

[0072] For example, the filter separator 162 may include polymethyl methacrylate (PMMA), silicon acrylate, cellulose acetate butyrate (CAB), silica, or fluoro-silicon acrylate (FSA). For example, the filter separator 162 may include a polymer material having silica particles dispersed therein. However, the embodiment is not limited thereto, and the filter separator 162 may include materials other than those mentioned above.

[0073] The plurality of color filters 160 may be disposed on the horizontal insulating layer 150 and may be separated from each other by filter separators 162. The plurality of color filters 160 may include, for example, a green filter, a blue filter, and a red filter. The plurality of color filters 160 may include, for example, cyan, magenta, or yellow. According to an embodiment, the color filter 160 may further include an infrared filter for passing infrared light.

[0074] A planarization layer 164 may be positioned on the color filter 160, and a microlens 170 may be positioned on the planarization layer 164. The planarization layer 164 may include various materials such as organic materials, silicon oxide, silicon oxynitride, etc. However, the embodiments are not limited to the materials of the planarization layer 164, and the planarization layer 164 may not be provided.

[0075] The microlens 170 may include a portion having a convex shape so as to condense light incident on the pixel region (PX). The microlens 170 may include various resin materials, for example, styrene-based resin, acrylic-based resin, styrene-acrylic copolymer-based resin, siloxane-based resin, etc. However, the embodiment is not limited thereto, and the shape, material, etc. of the microlens 170 may be variously modified.

[0076] In the drawings, the microlenses 170 are illustrated as being positioned to correspond to a plurality of pixel regions (PX). However, the embodiment is not limited thereto, and one microlens 170 may be positioned to correspond to a plurality of pixel regions (PX). According to an embodiment, a protective layer may be further disposed on the outer surface of the microlens 170.

[0077] In the image sensor 100 according to the embodiment, light incident from the outside may be collected by the microlens 170 and may be incident on the photoelectric conversion unit 120 via the color filter 160. The light incident on the photoelectric conversion unit 120 may be converted into an electrical signal according to the amount of light.

[0078] The pixel separator 200 according to the embodiment may have a first portion 210, a second portion 220, and / or a third portion 230 having different structures located between two adjacent pixel regions (PX). This will be described in detail with reference to Figures 2 and 3 as well as Figures 4 to 7.

[0079] The following description will be based on a pixel separator 200 located between a first pixel region (PX1) and a second pixel region (PX2) located on one side of the first pixel region (PX1) (right side of FIG. 2) and extending in the second direction (Y-axis direction in the drawing). The following description may be applied to at least one of the pixel separators 200 extending in the second direction between two pixel regions (PX) adjacent in the first direction (X-axis direction in the drawing). The following description may be applied to at least one of the pixel separators 200 extending in the first direction between two pixel regions (PX) adjacent in the second direction. For example, the following description may be applied to a pixel separator 200 located between the first pixel region (PX1) and the third pixel region (PX3) or between the second pixel region (PX2) and the fourth pixel region (PX4) and extending in the first direction. That is, the following description of the pixel separator 200 may be applied to at least one of the pixel separators 200 surrounding one pixel region (PX).

[0080] 4 is a cross-sectional view showing the first portion 210, the second portion 220, and the third portion 230 of the pixel isolation unit 200 included in the image sensor 100 shown in FIG. 2. Here, FIG. 4(a) shows the first portion 210 of the pixel isolation unit 200 together with the element isolation unit 300, FIG. 4(b) shows the second portion 220 of the pixel isolation unit 200 together with the element isolation unit 300, and FIG. 4(c) shows the third portion 230 of the pixel isolation unit 200 together with the element isolation unit 300. FIG. 5 is a plan view taken along line D-D' in FIG. 3, and FIG. 6 is a plan view taken along line E-E' in FIG. 3.

[0081] 2 and 3, the pixel separator 200 may include first and second insulating portions 202a and 202b adjacent to adjacent pixel regions (PX) in a cross direction crossing the pixel separator 200, and a conductive layer 204 and an internal layer 205 that are located between the first and second insulating portions 202a and 202b and contain different materials. Hereinafter, adjacent pixel regions (PX) in the cross direction crossing the pixel separator 200 are referred to as a first pixel region (PX1) and a second pixel region (PX2). For example, the first insulating portion 202a may be adjacent to the first pixel region (PX1) located on one side of the pixel separator 200, and the second insulating portion 202b may be adjacent to the second pixel region (PX2) located on the other side of the pixel separator 200. For example, the cross direction may include at least one of an X-axis direction and a Y-axis direction in the drawings, but the embodiment is not limited thereto.

[0082] The first insulating portion 202a or the second insulating portion 202b may include various insulating materials. In one embodiment, the first insulating portion 202a or the second insulating portion 202b may include an oxide, a nitride, an oxynitride, etc., and more specifically, may include an insulating material including silicon (e.g., silicon oxide, silicon nitride, silicon oxynitride, etc.). However, embodiments are not limited to the material of the first insulating portion 202a or the second insulating portion 202b.

[0083] Conductive layer 204 may include various conductive materials. For example, conductive layer 204 may include a semiconductor material including a dopant (e.g., a polycrystalline semiconductor, for example, polycrystalline silicon). The dopant included in conductive layer 204 may be an n-type dopant or a p-type dopant, for example, a p-type dopant. For example, conductive layer 204 may be polycrystalline silicon including boron, aluminum, gallium, indium, etc. However, embodiments are not limited to the material of conductive layer 204.

[0084] At this time, the internal layer 205 may include a material different from that of the conductive layer 204 and may have a refractive index different from that of the conductive layer 204. For example, the internal layer 205 may have a refractive index smaller than that of the conductive layer 204. For example, the refractive index of the internal layer 205 may be 4.0 or less (for example, 0 to 4, 0.01 to 4, or 0.1 to 4). In one embodiment, the internal layer 205 may include at least one of an internal insulating layer 206 including an insulating material and a space portion 208g having an internal space. The internal layer 205 may further include an end insulating portion 209 located at one end of the space portion 208g (for example, an end adjacent to the second surface 112 of the substrate 110). For example, the internal layer 205 may include an end insulating portion 209 defining one end of the space portion 208g as shown in FIG. 4(b) and (c), and the end insulating portion 209 may include a surface defining at least a part of one end of the space portion 208g.

[0085] The end insulating portion 209 blocks one end of the space 208g from the second surface 112 side of the substrate 110, thereby preventing undesirable other materials from being formed in the space 208g during subsequent processes for forming the horizontal insulating layer 150, the color filter 160, the filter separation portion 162, etc.

[0086] The inner insulating layer 206 or the edge insulating portion 209 may include various insulating materials such as oxides, nitrides, oxynitrides, fluorides, etc. For example, the inner insulating layer 206 or the edge insulating portion 209 may include at least one of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, and hafnium oxide. However, embodiments are not limited to the material of the inner insulating layer 206 or the edge insulating portion 209.

[0087] In one embodiment, the pixel separator 200 may include a first portion 210 having a first width (W1), a second portion 220 having a second width (W2) greater than the first width (W1), and may further include a third portion 230 having a third width (W3) greater than the first width (W1) and the second width (W2).

[0088] Here, the first width (W1), the second width (W2), and the third width (W3) may be measured at the same position in the thickness direction of the substrate 110 (the Z-axis direction in the drawing). The first width (W1) of the first portion 210 may mean the minimum width among the widths in the intersecting direction intersecting (for example, perpendicular) with the pixel separating portion 200. The second width (W2) of the second portion 220 may mean the maximum width among the widths in the intersecting direction intersecting (for example, perpendicular) with the pixel separating portion 200. The third width (W3) of the third portion 230 may mean the minimum width among the widths in the intersecting direction intersecting (for example, perpendicular) with the pixel separating portion 200.

[0089] The third portion 230 may be located at both ends of each pixel separating portion 200 in the extending direction of the pixel separating portion 200. More specifically, the third portion 230 may be located at a corner where four adjacent first to fourth pixel regions (PX1, PX2, PX3, PX4) in the first direction (X-axis direction in the drawing) and the second direction (Y-axis direction in the drawing) are adjacent to each other. Here, the first and second pixel regions (PX1, PX2) may be adjacent to each other in the first direction, the third and fourth pixel regions (PX3, PX4) may be adjacent to each other in the first direction, and the first and second pixel regions (PX1, PX2) and the third and fourth pixel regions (PX3, PX4) may be adjacent to each other in the second direction.

[0090] The third portion 230 may be located at a corner where the pixel separator 200 extending in the first direction and the pixel separator 200 extending in the second direction intersect with each other, and may have a gradually wider width as it approaches an end of each pixel separator 200. For example, the third portion 230 may have a rounded shape that is concave toward the center of the pixel region (PX), but the embodiment is not limited thereto.

[0091] The first portion 210 and the second portion 220 are portions located between two third portions 230 located at both ends of the pixel separator 200, and may have a first width (W1) and a second width (W2) that are different from each other. In the embodiment, the first portion 210 and the second portion 220 having different widths are included between the third portions 230 located at both ends, and the first portion 210 and the second portion 220 may have different stacking structures and perform different roles.

[0092] In the drawings, the side surfaces of the first portion 210, the second portion 220, and the third portion 230 are illustrated as being perpendicular to the substrate 110. However, the embodiment is not limited thereto, and at least one side surface of the first portion 210, the second portion 220, and the third portion 230 may include a portion that is inclined with respect to the substrate 110. For example, at least one side surface of the first portion 210, the second portion 220, and the third portion 230 may include a portion that is inclined such that the width decreases in a direction away from the substrate 110. Various other modifications are possible.

[0093] In one embodiment, the first portion 210 may include a first isolated portion 210j located adjacent to the first surface 111 of the substrate 110 and a first internal portion 210i extending from the first isolated portion 210j toward the second surface 112 of the substrate 110. The second portion 220 may include a second isolated portion 220j located adjacent to the first surface 111 of the substrate 110 and a second internal portion 220i extending from the second isolated portion 220j toward the second surface 112 of the substrate 110. The third portion 230 may include a third isolated portion 230j located adjacent to the first surface 111 of the substrate 110 and a third internal portion 230i extending from the third isolated portion 230j toward the second surface 112 of the substrate 110.

[0094] For example, the first isolation portion 210j, the second isolation portion 220j, and the third isolation portion 230j may be positioned to penetrate at least a portion of the element isolation portion 300. The first internal portion 210i, the second internal portion 220i, and the third internal portion 230i may refer to portions where the conductive layer 204 is positioned.

[0095] In the embodiment, the first isolated portion 210j, the second isolated portion 220j, and the third isolated portion 230j located adjacent to the first surface 111 of the substrate 110 may have different widths but may have the same stack structure. For example, the first isolated portion 210j, the second isolated portion 220j, and the third isolated portion 230j may be entirely made of an insulating material.

[0096] More specifically, the first isolation portion 210j, the second isolation portion 220j, and the third isolation portion 230j may include first and second insulating portions 202a, 202b located adjacent to the first and second pixel regions (PX1, PX2), respectively, and an internal insulating layer 206 located between the first and second insulating portions 202a, 202b. At this time, the internal insulating layer 206 provided in the first isolation portion 210j, the second isolation portion 220j, and the third isolation portion 230j may include a buried insulating portion 206c filling between the first and second insulating portions 202a, 202b. As a result, in the cross direction crossing the pixel isolation portion 200, the first isolation portion 210j, the second isolation portion 220j, and the third isolation portion 230j may have the first insulating portion 202a, the buried insulating portion 206c, and the second insulating portion 202b sequentially located in each of the first isolation portion 210j, the second isolation portion 220j, and the third isolation portion 230j.

[0097] The first isolation portion 210j, the second isolation portion 220j, and the third isolation portion 230j enable stable insulation between the conductive layer 204 provided in the pixel isolation portion 220 and the wiring portion 140 located on the first surface 111 of the substrate 110.

[0098] In some embodiments, the first inner portion 210i may have a different stacking structure than the second inner portion 220i and / or the third inner portion 230i.

[0099] More specifically, each of the first internal portion 210i, the second internal portion 220i, and the third internal portion 230i may include a first insulating portion 202a located on one side of the second trench 200a adjacent to the first pixel region (PX1) and a second insulating portion 202b located on the other side of the second trench 200a adjacent to the second pixel region (PX2). That is, each of the first internal portion 210i, the second internal portion 220i, and the third internal portion 230i may include substantially identical first and second insulating portions 202a, 202b.

[0100] In the embodiment, the first insulating portion 202a and the second insulating portion 202b may be included in one insulating layer 202 formed in the same process. Thus, the first insulating portion 202a and the second insulating portion 202b provided in the pixel separator 200 may have the same material and the same thickness. For example, the first insulating portion 202a and / or the second insulating portion 202b provided in the first portion 210, the second portion 220, and the third portion 230 may have the same thickness.

[0101] Here, the thickness may refer to a thickness measured in a direction perpendicular to a side surface of the second trench 200a in which the pixel separating portion 200 is provided. Here, having the same thickness may include a case where the thickness at the same position in the thickness direction of the substrate 110 (the Z-axis direction in the drawing) is within a process error (for example, within 10%).

[0102] However, the embodiment is not limited thereto. The first insulating portion 202a and / or the second insulating portion 202b provided in the first portion 210, the second portion 220, and the third portion 230 may include portions having different thicknesses.

[0103] In some embodiments, the conductive layer 204 provided in the first inner portion 210i may have a different structure than the conductive layer 204 provided in the second inner portion 220i and / or the third inner portion 230i.

[0104] More specifically, the first inner portion 210i may be a portion in which the inner layer 205 is not provided. That is, in the first inner portion 210i, the conductive layer 204 may include a buried conductive portion 204c that fills between the first insulating portion 202a and the second insulating portion 202b. For example, the inner layer 205 may not be located in the first inner portion 210i. The buried conductive portion 204c may entirely fill the space between the first insulating portion 202a and the second insulating portion 202b. For example, the buried conductive portion 204c or the conductive layer 204 may fill the entire portion of the space defined by the first insulating portion 202a and the second insulating portion 202b in the first inner portion 210i (e.g., the entire portion between the first insulating portion 202a and the second insulating portion 202b at least in the cross direction). In this case, being completely filled may refer to a case where the pixel separator 200 has a portion where the conductive layer 204 or the buried conductive portion 204c is entirely located in the intersecting cross direction. In one embodiment, there may be a portion between the first insulating portion 202a and the second insulating portion 202b where the buried conductive portion 204c or the conductive layer 204 is not located.

[0105] For example, in the first inner portion 210i of the first portion 210 having a relatively small first width (W1), the buried conductive portion 204c may have a plane extending in the extension direction of the pixel separating portion 200 and in the thickness direction of the substrate 110, and may have a sheet shape or a liner shape having a certain width in a cross direction intersecting the pixel separating portion 200. This allows for a stable electrical connection structure.

[0106] The buried conductive portion 204c allows the first internal portion 210i or the first portion 210 to have an electrical connection structure between the first insulating portion 202a and the second insulating portion 202b. For example, in the first internal portion 210i, the buried conductive portion 204c forms an electrical connection structure at least partially between the first insulating portion 202a and the second insulating portion 202b, so that the first portion 210 can have an electrical connection structure formed by the conductive layer 204 at least partially between the first insulating portion 202a and the second insulating portion 202b. That is, the conductive layer 204 of the pixel separation unit 200 located between the first insulating portion 202a and the second insulating portion 202b can provide a negative voltage to the first and second pixel regions (PX1, PX2) located adjacent to each other.

[0107] The second inner portion 220i and / or the third inner portion 230i may include an inner layer 205 inside the conductive layer 204 (e.g., between both sides of the conductive layer 204 facing each other). That is, the conductive layer 204 of the second inner portion 220i and / or the third inner portion 230i may include a first conductive portion 204a located on the first insulating portion 202a and a second conductive portion 204b located on the second insulating portion 202b. At this time, a space where the inner layer 205 is located may be located between the first conductive portion 204a and the second conductive portion 204b. For example, the second inner portion 220i and / or the third inner portion 230i may include the conductive layer 204 and the inner layer 205 located between the first insulating portion 202a and the second insulating portion 202b in the cross direction (e.g., the X-axis direction and / or the Y-axis direction of the drawing). For example, as shown in Figures 4(b) and (c), in the cross direction, the conductive layer 204 can include first and second conductive portions 204a, 204b located on the opposing first and second insulating portions 202a, 202b, respectively, and the inner layer 205 can be located between the first conductive portion 204a and the second conductive portion 204b.

[0108] The buried conductive portion 204c, the first conductive portion 204a, and the second conductive portion 204b may be formed by the same process and may include the same material. In this case, the thickness of the buried conductive portion 204c provided in the first portion 210 may be greater than the thickness of the first conductive portion 204a or the second conductive portion 204b provided in the second portion 220 or the third portion 230. For example, the thicknesses of the first conductive portion 204a and / or the second conductive portion 204b provided in the second portion 220 and the third portion 230 may be the same. However, the embodiment is not limited thereto. As another example, the thickness of the buried conductive portion 204c provided in the first portion 210 may be the same as or smaller than the thickness of the first conductive portion 204a or the second conductive portion 204b provided in the second portion 220 or the third portion 230. The first conductive portion 204a and / or the second conductive portion 204b included in the second and third portions 220, 230 may include portions having different thicknesses.

[0109] The inner layer 205 located in the second inner portion 220i and / or the third inner portion 230i may include an inner insulating layer 206 containing an insulating material. In one embodiment, the inner insulating layer 206 located in the second inner portion 220i and / or the third inner portion 230i may include a first inner insulating portion 206a located on the first conductive portion 204a and a second inner insulating portion 206b located on the second conductive portion 204b. In this case, a space 208g may be located between the first inner insulating portion 206a and the second inner insulating portion 206b in the second inner portion 220i and / or the third inner portion 230i. As shown in FIGS. 4(b) and (c), the inner layer 205 may include first and second inner insulating portions 206a and 206b located on the first and second conductive portions 204a and 204b facing each other, respectively. And, the inner layer 205 can include one or more inner surfaces (e.g., an inner surface of the inner insulating layer 206 including the inner surfaces of the first and second inner insulating portions 206a, 206b facing each other) that define at least a portion of the space 208g. The space 208g can include an inner space located between the first and second inner insulating portions 206a, 206b in the cross direction.

[0110] Since the inner insulating layer 206 is located on the first or second conductive portion 204a, 204b of the second inner portion 220i and / or the third inner portion 230i, the thickness of the first or second conductive portion 204a, 204b can be reduced and the structural stability of the pixel separator 200 can be improved. This reduces defects due to structural deterioration and improves the reliability of the image sensor 100. If the inner insulating layer 206 is not provided, the structural stability may be reduced if the conductive layer 204 has a small thickness. In this case, there may be a limit to reducing the thickness of the first conductive portion 204a or the second conductive portion 204b in consideration of the structural stability.

[0111] In the second portion 220 and / or the third portion 230 , the first inner insulating portion 206 a and the second inner insulating portion 206 b can be connected to a buried insulating portion 206 c located adjacent to the first surface 111 of the substrate 110 .

[0112] The height of the space 208g in the second portion 220 in the thickness direction of the substrate 110 (Z-axis direction in the drawing) may be smaller than the height of the second inner portion 220i. Here, the height of the space 208g may be the maximum length between the second surface 112 of the substrate 110 and the other end of the space 208g opposite thereto in the thickness direction of the substrate 110. That is, the second inner portion 220i may not include the space 208g in a part thereof, and may include a part (part of the second portion 220 shown in FIG. 5) where the first insulating portion 202a, the first conductive portion 204a, the embedded insulating portion 206c, the second conductive portion 204b, and the second insulating portion 202b are located. The space 208g may include an internal space at least partially defined by one or more internal surfaces of the internal insulating layer 206, the end insulating portion 209, etc. Thus, as shown in FIG. 4(b), the second inner portion 220i may include an inner insulating layer 206 including at least one of a first inner sub-portion and a second inner sub-portion. The first inner sub-portion of the inner insulating layer 206 may include an insulating material (e.g., a buried insulating portion 206c) extending to be entirely located between both sides of the conductive layers 204 facing each other in the cross direction. The second inner portion of the inner insulating layer 206 may include an inner surface that defines at least a portion of a space portion 208g having an inner space between both sides of the conductive layers 204 facing each other in the cross direction and / or between both sides of the inner insulating layer 206 facing each other in the cross direction. However, the embodiment is not limited thereto, and the height of the space portion 208g provided in the second portion 220 may be equal to or greater than the height of the second inner portion 220i in the thickness direction of the substrate 110.

[0113] The height of the space 208g in the third portion 230 in the thickness direction of the substrate 110 (the Z-axis direction in the drawing) may be smaller than the height of the third internal portion 230i. That is, the third internal portion 230i may not include the space 208g in a part thereof, but may include a part (the part of the third portion 230 shown in FIG. 5) where the first insulating portion 202a, the first conductive portion 204a, the embedded insulating portion 206c, the second conductive portion 204b, and the second insulating portion 202b are located. The space 208g may include an internal space at least partially defined by one or more inner surfaces of the internal insulating layer 206, the end insulating portion 209, etc. Thus, as shown in FIG. 4(c), the third internal portion 230i may include the internal insulating layer 206 including at least one of the first internal sub-portion and the second internal sub-portion. The first inner sub-portion of the inner insulating layer 206 may include an insulating material (e.g., a buried insulating portion 206c) extending generally between the opposing sides of the conductive layers 204 in the cross direction. The second inner portion of the inner insulating layer 206 may include an inner surface defining at least a portion of a space 208g having an internal space between the opposing sides of the conductive layers 204 in the cross direction and / or between the opposing sides of the inner insulating layer 206 in the cross direction. However, the embodiment is not limited thereto, and the height of the space 208g provided in the third portion 230 in the thickness direction of the substrate 110 may be equal to or greater than the height of the third inner portion 230i.

[0114] As an example, the height of the space 208g provided in the third portion 230 in the thickness direction of the substrate 110 (the Z-axis direction in the drawing) may be greater than the height of the space 208g provided in the second portion 220. In the intersecting direction intersecting with the pixel separator 200, the width of the space 208g provided in the third portion 230 may be greater than the width of the space 208g provided in the second portion 220. This is because the third portion 230 has a greater width and volume than the second portion 220, and the space 208g having a relatively greater depth, width, or volume may be formed in the third portion 230. However, the embodiment is not limited thereto. In the thickness direction of the substrate 110, the height of the space 208g provided in the third portion 230 may be the same as or smaller than the height of the space 208g provided in the second portion 220, and in the cross direction, the width of the space 208g provided in the third portion 230 may be the same as or smaller than the width of the space 208g provided in the second portion 220.

[0115] In the embodiment, the second inner portion 220i and / or the third inner portion 230i may have a space portion 208g having a refractive index lower than that of the conductive layer 204 or the inner insulating layer 206 and having an internal space or an air gap. The space portion 208g may be an internal space or an air gap (e.g., a sealed space) at least partially defined by one or more internal surfaces and / or end insulating portions 209 of the inner insulating layer 206. As a result, the inner layer 205 may have a refractive index lower than that of the conductive layer 204, and there is no need to add a separate process for filling the interior of the space portion 208g, thereby reducing process time and process costs. As a result, the efficiency of the manufacturing process of the image sensor 100 may be improved.

[0116] For example, the buried insulating portion 206c, the first inner insulating portion 206a, and the second inner insulating portion 206b provided in the first portion 210, the second portion 220, or the third portion 230 may be portions formed by the same process and containing the same material.

[0117] For example, the thickness of the embedded insulating portion 206c in the second portion 220 may be greater than the thickness of the embedded insulating portion 206c in the first portion 210, and the thickness of the embedded insulating portion 206c in the third portion 230 may be greater than the thickness of the embedded insulating portion 206c in the second portion 220. This is because the second portion 220 has a greater width than the first portion 210, and the third portion 230 has a greater width than the second portion 220.

[0118] For example, the thickness of the embedded insulating portion 206c provided in the first portion 210, the second portion 220, or the third portion 230 may be greater than the thickness of the first inner insulating portion 206a or the second inner insulating portion 206b provided in the second portion 220 or the third portion 230. For example, the thicknesses of the first inner insulating portion 206a and / or the second inner insulating portion 206b provided in the second portion 220 and the third portion 230 may be the same. However, the embodiment is not limited thereto. Thus, the first inner insulating portion 206a and / or the second inner insulating portion 206b provided in the second and third portions 220, 230 may include portions having different thicknesses.

[0119] The internal layer 205 allows the second portion 220 and / or the third portion 230 to have an electrical insulating structure between the first insulating portion 202a and the second insulating portion 202b. For example, the internal layer 205 forms an electrical insulating structure at least partially between the first insulating portion 202a and the second insulating portion 202b in the second portion 220 and / or the third portion 230, so that the second portion 220 and / or the third portion 230 can have an electrical insulating structure formed by the internal layer 205 at least partially between the first insulating portion 202a and the second insulating portion 202b. The second portion 220 and / or the third portion 230 can have a total reflection structure between the first and second insulating portions 202a and 202b due to the conductive layer 204 having a relatively high refractive index and the internal layer 205 having a relatively low refractive index. For example, in the second portion 220 and / or the third portion 230, the conductive layer 204 and the internal layer 205 form a total reflection structure at least partially between the first insulating portion 202a and the second insulating portion 202b, so that the second portion 220 and / or the third portion 230 can have a total reflection structure formed by the conductive layer 204 and the internal layer 205 at least partially between the first insulating portion 202a and the second insulating portion 202b. Since the first conductive portion 204a or the second conductive portion 204b provided in the second portion 220 or the third portion 230 has a small thickness, light can pass through the first conductive portion 204a or the second conductive portion 204b and travel toward the internal layer 205. The light directed toward the internal layer 205 can be totally reflected and travel toward the photoelectric conversion unit 120. This can improve the performance of the image sensor 100.

[0120] 2 to 6, the shape of internal layer 205 included in second portion 220 or third portion 230 of pixel separating unit 200 will be specifically described. Figure 7 is a perspective view that illustrates an example of internal layer 205 included in second portion 220 or third portion 230 of pixel separating unit 200 shown in Figure 4.

[0121] 2 to 7, in one embodiment, the internal layer 205 may have a plane extending in the extension direction of the pixel separating portion 200 and the thickness direction of the substrate 110, and may have a sheet shape having a width in a cross direction crossing the pixel separating portion 200. For example, in a pixel separating portion 200 extending in a first direction (X-axis direction in the drawings), the internal layer 205 may have a plane (XZ plane in the drawings) extending in the first direction and the thickness direction (Z-axis direction in the drawings), and may have a width in a second direction (Y-axis direction in the drawings) crossing the first direction. For example, in a pixel separating portion 200 extending in a second direction, the internal layer 205 may have a plane (YZ plane in the drawings) in the second direction and the thickness direction, and may have a width in the first direction.

[0122] 7 illustrates an example in which both side surfaces of the internal layer 205 are formed with vertical surfaces in a cross section perpendicular to the extension direction of the pixel separator 200. In this case, the internal layer 205 may have a uniform thickness in the thickness direction of the substrate 110 (the Z-axis direction in the drawing), and the internal layer 205 may have a quadrangular shape in a cross section perpendicular to the extension direction of the pixel separator 200. As an example, the internal layer 205 may have a rectangular parallelepiped shape.

[0123] However, the embodiment is not limited thereto. Therefore, the internal layer 205 may include a portion in which both side surfaces have an inclined surface in a cross section perpendicular to the extension direction of the pixel separator 200. For example, the side surface of the internal layer 205 may be configured as an inclined surface whose width narrows from the first surface 111 to the second surface 112 of the substrate 110. As an example, the width of the internal layer 205 may gradually decrease from the first surface 111 to the second surface 112 of the substrate 110, and the internal layer 205 may have a trapezoidal shape in a cross section perpendicular to the extension direction of the pixel separator 200.

[0124] When the inner layer 205 has a sheet shape, total reflection can be stably performed in the second portion 220 and the third portion 230. In contrast, when the pixel separator 200 has voids that are undesirably formed due to limitations in the manufacturing process, it may not have a sheet shape, but may be formed to have an irregular shape in a small area. In such a void that is irregularly formed in a small area, light is unlikely to be totally reflected, and light may be scattered. As a result, it is not suitable for reflecting light toward the photoelectric conversion portion.

[0125] As an example, the width of the internal layer 205 may be 1 nm or more (e.g., 1 to 500 nm) in the intersecting direction intersecting the pixel separating portion 200. If the width of the internal layer 205 is 1 nm or more, a total reflection structure can be stably formed. However, the embodiment is not limited thereto, and the width of the internal layer 205 or the width of the space portion 208g may be less than 1 nm (e.g., 0.01 nm to 1 nm, 0.1 nm to 1 nm, or 0.5 nm to 1 nm).

[0126] In a cross direction crossing the pixel separator 200, the first internal portion 210i may include a portion where the first insulating portion 202a, the buried conductive portion 204c, and the second insulating portion 202b are sequentially located. In a cross direction crossing the pixel separator 200, the second internal portion 220i or the third internal portion 230i may include a portion where the first insulating portion 202a, the first conductive portion 204a, the first internal insulating portion 206a, the space portion 208g, the second internal insulating portion 206b, the second conductive portion 204b, and the second insulating portion 202b are sequentially located.

[0127] In one embodiment, the first portion 210 may be located on both sides of the second portion 220. More specifically, the first portion 210 may be located between the second portion 220 and the third portion 230 located on both sides thereof. As a result, the second portion 220 may be located at a center portion in an extension direction of the pixel separator 200. As a result, the second portion 220 having a total reflection structure is located at the center portion, and the amount of light reaching the photoelectric conversion unit 120 may be increased or maximized by reflecting light. As a result, the performance of the image sensor 100 may be improved. However, the embodiment is not limited thereto.

[0128] In a plan view, the length (L1) of the first portion 210 may be smaller than the length (L2) of the second portion 220 in the extension direction of the pixel separator 200. More specifically, the total length of the first portion 210 in the extension direction of the pixel separator 200 may be smaller than the length (L2) of the second portion 220. The length (L1) of the first portion 210 can be relatively reduced, and the length (L2) of the second portion 220 having a total reflection structure can be sufficiently secured. This increases the reflection of light at the second portion 220, and increases the amount of light directed toward the photoelectric conversion unit 120. This improves the performance of the image sensor 100. However, the embodiment is not limited thereto, and the length (L1) of the first portion 210 or the total length of the first portion 210 may be equal to or greater than the length (L2) of the second portion 220.

[0129] In a plan view, the ratio (L2 / L0) of the length (L2) (e.g., the entire length) of the second portion 220 to the length (L0) of the pixel separating portion 200 in the extension direction of the pixel separating portion 200 may be 50% or more. For example, the ratio (L2 / L0) of the length (L2) (e.g., the entire length) of the second portion 220 to the length (L0) of the pixel separating portion 200 in the extension direction of the pixel separating portion 200 may be 70% to 95%. The length (L2) of the second portion 220 can be sufficiently secured. This increases the reflection of light at the second portion 220, and increases the amount of light directed toward the photoelectric conversion portion 120. This improves the performance of the image sensor 100. However, the embodiment is not limited thereto, and the ratio (L2 / L0) of the length (L2) (e.g., the entire length) of the second portion 220 to the length (L0) of the pixel separating portion 200 in the extension direction of the pixel separating portion 200 may be less than 50%.

[0130] The first width (W1) of the first portion 210 may be equal to or less than twice the thickness of the first or second insulating portion 202a, 202b, or the sum of the thickness of the first insulating portion 202a and the thickness of the second insulating portion 202b. The second width (W2) of the second portion 220 may be greater than twice the thickness of the first or second insulating portion 202a, 202b, or the sum of the thickness of the first insulating portion 202a and the thickness of the second insulating portion 202b.

[0131] For example, the ratio (W2 / W1) of the second width (W2) of the second portion 220 to the first width (W1) of the first portion 210 may be 1.05 to 3. As an example, the ratio (W2 / W1) of the second width (W2) of the second portion 220 to the first width (W1) of the first portion 210 may be 1.05 to 2. If the ratio (W2 / W1) is less than 1.05, it is difficult to form the stacked structures of the first portion 210 and the second portion 220 to be different from each other. If the ratio (W2 / W1) is more than 3 (for example, 2), the second width (W2) of the second portion 220 may be larger than a certain level. However, the embodiment is not limited thereto. As an example, the ratio (W2 / W1) of the second width (W2) of the second portion 220 to the first width (W1) of the first portion 210 may be less than 1.05 or more than 3.

[0132] In one embodiment, the thickness (T1) of the first or second insulating portion 202a, 202b may be greater than the thickness (T2) of the first or second conductive portion 204a, 204b in the thickness direction (z-axis direction in the drawing). And, the thickness (T3) of the first or second inner insulating portion 206a, 206b may be greater than the thickness (T2) of the first or second conductive portion 204a, 204b in the thickness direction. Or, the thickness (e.g., thickness in the cross direction) of the inner layer 205 may be greater than the thickness (T2) of the first or second conductive portion 204a, 204b (e.g., thickness in the cross direction). In this way, by reducing the thickness (T2) of the first or second conductive portion 204a, 204b or the thickness of the conductive layer 204 in the second portion 220 and / or the third portion 230, the light absorption by the conductive layer 204 can be reduced or minimized.

[0133] However, the embodiment is not limited thereto. Thus, the thickness (T1) of the first or second insulating portion 202a, 202b may be equal to or smaller than the thickness (T2) of the first or second conductive portion 204a, 204b. Or, the thickness (T3) of the first or second inner insulating portion 206a, 206b may be equal to or smaller than the thickness (T2) of the first or second conductive portion 204a, 204b. Or, the thickness of the inner layer 205 may be equal to or smaller than the thickness (T2) of the first or second conductive portion 204a, 204b.

[0134] As described above, the conductive layer 204 included in the pixel separator 200 may be a semiconductor layer including a dopant. In some embodiments, the conductive layer 204 included in the pixel separator 200 may not include a semiconductor layer including no dopant.

[0135] In this manner, the thickness of the conductive layer 204 in the pixel separator 200, which may absorb a relatively large amount of light, is reduced, thereby reducing the amount of light absorbed in the conductive layer 204. This increases the amount of light reaching the photoelectric converter 120, thereby improving quantum efficiency (QE). This improves the performance of the image sensor 100. In addition, the process of forming a semiconductor layer that does not include a dopant in the pixel separator 200 can be omitted. This simplifies the manufacturing process of the image sensor 100.

[0136] In this case, the pixel separating portion 200 located between the first pixel region (PX1) and the second pixel region (PX2) may include the first portion 210, the second portion 220, and / or the third portion 230 having different widths and stacking structures. That is, a part of the pixel separating portion 200 (for example, the first portion 210) may be a portion having an electrical connection structure by the buried conductive portion 204c, and another part of the pixel separating portion 200 (for example, the second portion 220 and / or the third portion 230) may be a portion where total reflection is induced by the conductive layer 204 and the internal layer 205. This can reduce dark current and crosstalk, thereby improving the modulation transfer function (MTF) or resolution.

[0137] This can improve the performance (e.g., image sensing performance) of the image sensor 100. The improvement in performance of the image sensor 100 can include improvement in the power consumption efficiency of the image sensor 100. For example, the image sensing performance of the image sensor 100 can be improved without increasing the power consumption of the image sensor 100, or the power consumption of the image sensor 100 can be reduced without impairing the image sensing performance of the image sensor 100.

[0138] The image sensor 100 according to the embodiment may be an infrared image sensor capable of detecting optical depth information of an object using infrared light. Thus, the color filter 160 may include an infrared filter for passing infrared light, or the pixel area (PX) may include an infrared pixel for detecting optical depth information from infrared wavelengths. When the pixel separator 200 according to the embodiment is applied to an infrared image sensor, infrared light having a large wavelength and a large amount of light that passes through the photoelectric conversion unit 120 without being absorbed can be used more effectively.

[0139] 3, the dummy pixel separator 200d has the same structure and shape as the first portion 210, but the embodiment is not limited thereto. The dummy pixel separator 200d may have the same structure or shape as the second portion 220, the third portion 230, or a structure or shape different therefrom.

[0140] A method for manufacturing the above-mentioned image sensor 100 will now be described in more detail with reference to FIGS. 8a to 8h.

[0141] Figures 8a to 8h are cross-sectional views showing a method for manufacturing an image sensor according to an embodiment. Figures 8a to 8h show a portion corresponding to Figure 3. Detailed descriptions of portions that are the same as or very similar to those already described will be omitted, and only different portions will be described in detail.

[0142] As shown in FIG. 8a, a first trench 300a may be formed in a first surface 111 of a substrate 110 having a first surface 111 and a preliminary surface 112p facing each other.

[0143] More specifically, a mask pattern 310 having an opening 310a exposing a region corresponding to the isolation portion 300 may be formed on the first surface 111 of the substrate 110. The mask pattern 310 may include various insulating materials, for example, silicon nitride. A portion of the substrate 110 exposed through the opening 310a of the mask pattern 310 may be etched to form the first trench 300a. Various processes such as a wet etching process and a dry etching process may be used for the etching process.

[0144] Then, a preliminary element isolation portion 300p and a second trench 200a may be formed on the first surface 111 side of the substrate 110, as shown in FIG. 8b.

[0145] More specifically, a preliminary isolation portion 300p may be formed on the first surface 111 of the substrate 110. At this time, the preliminary isolation portion 300p may fill the first trench 300a. A portion of the substrate 110 may be etched to form the second trench 200a. At this time, the preliminary isolation portion 300p may be used as a mask pattern, or a separate mask pattern may be used. As the etching process, various processes such as a wet etching process and a dry etching process may be used.

[0146] In this case, the second trench 200a may be formed to have a size corresponding to a first portion (reference number 210 in FIG. 8c, the same hereinafter), a second portion (reference number 220 in FIG. 8c, the same hereinafter), and a third portion (reference number 230 in FIG. 8c, the same hereinafter) of the pixel separating portion 200. That is, a portion of the second trench 200a corresponding to the second portion 220 may have a larger width than a portion of the second trench 200a corresponding to the first portion 210, and a portion of the second trench 200a corresponding to the third portion 230 may have a larger width than a portion of the second trench 200a corresponding to the second portion 220.

[0147] Next, as shown in FIG. 8c, an insulating layer 202, a conductive layer 204 and an internal insulating layer 206 are sequentially formed inside the second trench 200a, and the mask pattern (reference number 310 in FIG. 8b, the same below) located on the first surface 111 of the substrate 110, a portion of the preliminary element isolation portion (reference number 300p in FIG. 8b, the same below), the insulating layer 202 and the internal insulating layer 206 can be removed.

[0148] More specifically, the insulating layer 202 may be formed to have a uniform thickness on the inner surface of the second trench 200a. At this time, the insulating layer 202 may be formed entirely on the inner surface and bottom surface of the second trench 200a in the first portion 210, the second portion 220, and the third portion 230. The insulating layer 202 may also be entirely located on the first surface 111 of the substrate 110. The insulating layer 202 may include a first insulating portion 202a and a second insulating portion 202b.

[0149] Then, a conductive layer 204 may be formed on the insulating layer 202 inside the second trench 200a. In the first portion 210 having a relatively small width, the conductive layers 204 formed on the inner surfaces on both sides of the second trench 200a may contact each other and be entirely located inside the first portion 210. Thus, the conductive layer 204 in the first portion 210 may be configured as a single buried conductive portion 204c filling the inside of the insulating layer 202. In the second portion 220 or the third portion 230 having a relatively large width, the conductive layers 204 formed on both sides of the second trench 200a may be located apart from each other (e.g., separated so as not to contact each other). Thus, in the second portion 220 and the third portion 230, the conductive layer 204 may include a first conductive portion 204a and a second conductive portion 204b located on the inner surfaces on both sides, respectively.

[0150] At this time, the conductive layer 204 may be located only on the inner side of the portion corresponding to the first to third inner portions (reference numerals 210i, 220i, 230i in FIG. 4, the same below) of the second trench 200a, and may not be provided on the portion corresponding to the first to third isolation portions (210j, 220j, 230j, the same below). The conductive layer 204 may be formed overall and then partially removed to form the above-mentioned structure, or the conductive layer 204 may be formed in a pattern to form the above-mentioned structure.

[0151] Subsequently, an inner insulating layer 206 may be formed inside the second trench 200a. In the first portion 210, the inner insulating layer 206 may include a buried insulating portion 206c located in the first isolation portion 210j. In the second portion 220, the inner insulating layer 206 may include a buried insulating portion 206c located in the second isolation portion 220j, and a portion located on the conductive layer 204 in the second inner portion 220i. In the third portion 230, the inner insulating layer 206 may include a buried insulating portion 206c located in the third isolation portion 230j, and a portion located on the conductive layer 204 in the third inner portion 230i.

[0152] In the second inner portion 220i and / or the third inner portion 230i, the inner insulating layer 206 may be formed entirely on the inner side and bottom surface of the second trench 200a on the conductive layer 204. In one embodiment, in the second inner portion 220i and / or the third inner portion 230i, the inner insulating layer 206 may include first and second inner insulating portions 206a, 206b located on the first and second conductive portions 204a, 204b, respectively. And, the inner insulating layer 206 may be located entirely on the first surface 111 of the substrate 110 on the insulating layer 202.

[0153] In one embodiment, a space 208g may be located within the second inner portion 220i and the third inner portion 230i between the first and second inner insulating portions 206a, 206b.

[0154] Then, the mask pattern 310, the portion of the preliminary element isolation portion 300p, the insulating layer 202, and the inner insulating layer 206 located on the first surface 111 of the substrate 110 may be removed. For example, a chemical mechanical polishing (CMP) process, a wet etching process, or the like may be used as the removing process. As a result, the element isolation portion 300 and the pixel isolation portion 200 may be formed.

[0155] Subsequently, as shown in FIG. 8d, the photoelectric conversion section 120 can be formed, and then the pixel circuit 130 and the wiring section 140 can be formed.

[0156] More specifically, a second conductive type dopant opposite to the first conductive type dopant may be implanted from the first surface 111 of the substrate 110 toward the second surface 112 of the substrate 110 using a high energy implantation method. Then, a photoelectric conversion unit 120 corresponding to each pixel region (PX) may be formed by the element isolation unit 300 and / or the pixel isolation unit 200. However, the process of forming the photoelectric conversion unit 120 may be modified in various ways.

[0157] Subsequently, the pixel circuit 130 and the wiring portion 140 can be formed on the first surface 111 of the substrate 110. As a process for forming the pixel circuit 130 and the wiring portion 140, various processes can be applied.

[0158] Then, as shown in Fig. 8e, a portion of the substrate 110 (reference numeral 110 in Fig. 5e, the same below) where a preliminary surface (reference numeral 112p in Fig. 8d, the same below) of the substrate 110 is located may be removed. For example, a grinding process, a polishing process, a grinding process, an etching process, etc. may be performed on the preliminary surface 112p of the substrate 110 to remove the portion of the substrate 110. As an example, the portion of the substrate 110 may be removed such that the pixel separator 200 is located on the second surface 112 of the substrate 110.

[0159] At this time, as shown in the enlarged view, the space 208g provided in the second portion 220 and the third portion 230 may be open from the second surface 112. For clear understanding and simple illustration, the enlarged view of Fig. 8e shows the second portion 220 and the third portion 230 having the same laminated structure together, but the second portion 220 and the third portion 230 may have different widths or sizes.

[0160] Subsequently, as shown in Figures 8f and 8g, an end insulating portion 209 located at one end of the space portion 208g can be formed. For clear understanding and simple representation, the second portion 220 and the third portion 230 having the same laminated structure are shown together in the enlarged views of Figures 8f and 8g, but the second portion 220 and the third portion 230 can have different widths or sizes from each other.

[0161] More specifically, as shown in Fig. 8f, a preliminary end insulating layer 209p may be formed on the second surface 112 of the substrate 110. The preliminary end insulating layer 209p may be partially formed inside the space 208g. At this time, the preliminary end insulating layer 209g may be partially formed at one end of the space 208g adjacent to the second surface 112 of the substrate 110 using a process method, process speed, etc. that does not entirely fill the inside of the space 208g.

[0162] Then, as shown in Fig. 8g, a portion of the preliminary end insulating layer (reference numeral 209p in Fig. 8f) located on the second surface 112 of the substrate 110 can be removed. For example, the removing process can be a chemical mechanical polishing process, a wet etching process, etc. In this way, the end insulating portion 209 can be formed.

[0163] 8h, the contact portion 180, the horizontal insulating layer 150, the color filter 160, the filter separation portion 162, and the microlens 170 can be formed. Various processes can be applied to form the contact portion 180, the horizontal insulating layer 150, the color filter 160, the filter separation portion 162, and the microlens 170.

[0164] According to the embodiment, the pixel separator 200 may be formed in which the first portion 210, the second portion 220 and / or the third portion 230 have different stacking structures depending on the width difference between the first portion 210, the second portion 220 and / or the third portion 230 without adding an additional process. That is, the image sensor 100 having excellent performance may be formed through a simple manufacturing process. This may reduce the manufacturing cost and / or the complexity of the manufacturing process, and may reduce the possibility of process defects occurring in the image sensor 100. Therefore, the reliability of the image sensor 100 may be improved.

[0165] Hereinafter, image sensors and manufacturing methods thereof according to the above-mentioned embodiments (for example, the embodiments described with reference to FIGS. 2 to 7) and other embodiments will be described in more detail with reference to Figures 9 to 13. Detailed descriptions of parts that are the same as or very similar to parts already described will be omitted, and only other parts will be described in detail.

[0166] Fig. 9 is a cross-sectional view of an image sensor according to another embodiment. Fig. 9 shows a portion corresponding to Fig. 3. For clear understanding and simple representation, the light scattering pattern 114 is conceptually shown in Fig. 9.

[0167] 9, in the image sensor according to the embodiment, the light scattering pattern 114 may be located in a portion adjacent to the second surface 112 of the substrate 110. The surface of the light scattering pattern 114 may be located on the same plane as the second surface 112 of the substrate 110. The light scattering pattern 114 may have various planar shapes such as a circle, a polygon, a cross, etc., and the embodiment is not limited to the planar shape of the light scattering pattern 114. In the drawing, the light scattering pattern 114 is shown to have a constant thickness so that the image sensor including the light scattering pattern 114 can be manufactured by a simple manufacturing process. This can reduce manufacturing costs and / or the complexity of the manufacturing process and reduce the possibility of process defects occurring in the image sensor. Therefore, the reliability of the image sensor can be improved. However, the embodiment is not limited thereto, and the light scattering pattern 114 may include portions having different thicknesses.

[0168] The light scattering pattern 114 may be formed by removing a portion of the substrate 110 and then filling the insulating material. For example, the light scattering pattern 114 may be made of a high dielectric constant insulating material having a higher dielectric constant than silicon oxide. As an example, the light scattering pattern 114 may include a metal oxide or metal fluoride including at least one of hafnium, zirconium, aluminum, tantalum, titanium, and yttrium. This allows holes to accumulate around the light scattering pattern 114, thereby improving (e.g., reducing) dark current. This allows the performance of the image sensor to be improved.

[0169] The light scattering pattern 114 can increase the optical path by scattering light of a long wavelength. In this case, the image sensor according to the embodiment may be an infrared image sensor. For example, the light scattering pattern 114 can increase the optical path by scattering infrared light. When the light scattering pattern 114 is provided in an infrared image sensor, the amount of infrared light reaching the photoelectric conversion unit 120 can be increased. This can improve the performance of the image sensor.

[0170] When a pixel separator 200 including a first portion 210, a second portion 220 and a third portion 230 is applied to an image sensor having a light scattering pattern 114, light scattered by the light scattering pattern 114 and proceeding toward the pixel separator 200 can be totally reflected by the second portion 220 and / or the third portion 230 and can be absorbed in greater amounts by the photoelectric conversion unit 120.

[0171] That is, in the embodiment, infrared rays are used and applied to an infrared-oriented image sensor having a light scattering pattern 114, and the effect of improving crosstalk between pixel areas (PX) or resolution can be further improved.

[0172] 10 is a cross-sectional view showing a pixel separator included in an image sensor according to another embodiment of the present invention, which corresponds to FIG.

[0173] Referring to FIG. 10, the image sensor according to the embodiment may include an inner layer 205, an inner insulating layer 206, and an additional inner insulating layer 208.

[0174] More specifically, in the second internal portion 220i, the conductive layer 204 may include a first conductive portion 204a and a second conductive portion 204b located on the first insulating portion 202a and the second insulating portion 202b, respectively. In the second internal portion 220i, the internal layer 205 may include a first internal insulating portion 206a and a second internal insulating portion 206b located on the first conductive portion 204a and the second conductive portion 204b, respectively, and an additional internal insulating layer 208 located between the first internal insulating portion 206a and the second internal insulating portion 206b (e.g., in the cross direction, between the first internal insulating portion 206a and the second internal insulating portion 206b).

[0175] In the third internal portion 230i, the conductive layer 204 may include a first conductive portion 204a and a second conductive portion 204b located on the first insulating portion 202a and the second insulating portion 202b, respectively. In the third internal portion 230i, the internal layer 205 may include a first internal insulating portion 206a and a second internal insulating portion 206b located on the first conductive portion 204a and the second conductive portion 204b, respectively, and an additional internal insulating layer 208 located between the first internal insulating portion 206a and the second internal insulating portion 206b.

[0176] In one embodiment, the conductive layer 204 may include a polycrystalline semiconductor including a dopant, and the additional inner insulating layer 208 may have a refractive index less than that of the conductive layer 204. For example, the refractive index of the additional inner insulating layer 208 may be 4.0 or less. For example, the additional inner insulating layer 208 may include various insulating materials such as oxides, nitrides, oxynitrides, and fluorides. For example, the additional inner insulating layer 208 may include at least one of silicon oxide, silicon nitride, aluminum oxide, and hafnium oxide. However, embodiments are not limited to the material of the additional inner insulating layer 208.

[0177] The additional inner insulating layer 208 may be made of the same material as the inner insulating layer 206, or may be made of a different material than the inner insulating layer 206. When the additional inner insulating layer 208 and the inner insulating layer 206 are made of the same material, the boundary between the additional inner insulating layer 208 and the inner insulating layer 206 may or may not be visible.

[0178] The manufacturing method of the image sensor shown in FIG. 10 may be the same as the manufacturing method shown in FIG. 8a to FIG. 8h, except for the differences described below. In the manufacturing method of the image sensor shown in FIG. 10, in a process corresponding to FIG. 8c, an insulating layer 202, a conductive layer 204, and an internal insulating layer 206 are sequentially formed inside the second trench (reference symbol 200a in FIG. 8b, the same applies below), and then an additional internal insulating layer 208 is formed inside the internal insulating layer 206 in the second portion 220 and the third portion 230, and the mask pattern 310, the second mask pattern, the insulating layer 202, the internal insulating layer 206, and the additional internal insulating layer 208 located on the first surface 111 of the substrate 110 may be removed. In addition, the process of forming the end insulating portion 209 shown in FIG. 8f and FIG. 8g may not be performed.

[0179] 11 is a cross-sectional view of an image sensor according to another embodiment of the present invention, which shows a portion corresponding to FIG.

[0180] Referring to FIG. 11, in the image sensor according to the embodiment, the inner layer 205 may include an inner insulating layer 206 .

[0181] More specifically, in the second inner portion 220i, the conductive layer 204 may include a first conductive portion 204a and a second conductive portion 204b located on the first insulating portion 202a and the second insulating portion 202b, respectively. In the second inner portion 220i, the inner layer 205 may include a buried insulating portion 206c located between the first conductive portion 204a and the second conductive portion 204b. For example, in the second inner portion 220i, the inner layer 205 may include a buried insulating portion 206c that fills the entire portion between the first conductive portion 204a and the second conductive portion 204b in the cross direction. This allows the buried insulating portion 206c to extend to be entirely located between the first conductive portion 204a and the second conductive portion 204b in the cross direction.

[0182] In the third inner portion 230i, the conductive layer 204 may include a first conductive portion 204a and a second conductive portion 204b located on the first insulating portion 202a and the second insulating portion 202b, respectively. In the third inner portion 230i, the inner layer 205 may include a buried insulating portion 206c located between the first conductive portion 204a and the second conductive portion 204b. For example, in the third inner portion 230i, the inner layer 205 may include a buried insulating portion 206c that fills the entire portion between the first conductive portion 204a and the second conductive portion 204b in the cross direction. Thus, the buried insulating portion 206c may extend to fill the entire portion between the first conductive portion 204a and the second conductive portion 204b in the cross direction. In one embodiment, a portion where the inner insulating layer 206 or the buried insulating portion 206c is not located may be located between the first conductive portion 204a and the second conductive portion 204b.

[0183] The manufacturing method of the image sensor shown in Fig. 11 can be the same as the manufacturing method described with reference to Figs. 8a to 8h, except for the differences described below. In the manufacturing method of the image sensor shown in Fig. 11, in the step corresponding to Fig. 8c (i.e., the step of sequentially forming the insulating layer 202, the conductive layer 204, and the internal insulating layer 206 inside the second trench (reference number 200a in Fig. 8b, the same applies below)), the internal insulating layer 206 can be formed to fill the inside of the conductive layer 204. And, the step of forming the end insulating portion 209 with reference to Figs. 8f and 8g can be omitted.

[0184] 12 is a cross-sectional view showing a pixel separator included in an image sensor according to another embodiment of the present invention, which corresponds to FIG.

[0185] 12, in the image sensor according to the embodiment, the inner layer 205 provided in the second portion 220 and the inner layer 205 provided in the third portion 230 may have different stacking structures.

[0186] More specifically, in the second inner portion 220i, the conductive layer 204 may include a first conductive portion 204a and a second conductive portion 204b located on the first insulating portion 202a and the second insulating portion 202b, respectively. In the second inner portion 220i, the inner layer 205 may include a buried insulating portion 206c located between the first conductive portion 204a and the second conductive portion 204b.

[0187] In the third internal portion 230i, the conductive layer 204 may include a first conductive portion 204a and a second conductive portion 204b located on the first insulating portion 202a and the second insulating portion 202b, respectively. In the third internal portion 230i, the internal layer 205 may include a first inner insulating portion 206a and a second inner insulating portion 206b located on the first conductive portion 204a and the second conductive portion 204b, respectively, and an additional inner insulating layer 208 located between the first inner insulating portion 206a and the second inner insulating portion 206b.

[0188] 12, the second portion 220 and / or the third portion 230 can include an inner layer 205 including an inner insulating layer 206 including an insulating material (e.g., embedded insulating portion 206c) extending generally between opposite sides of the conductive layers 204 in the cross direction, and / or an inner layer 205 including an inner layer 206 and an additional inner insulating layer 208. For example, the second inner portion 220i can include an inner insulating layer 206 including an insulating material (e.g., embedded insulating portion 206c). For example, the third inner portion 230i can include an inner layer 205 including an inner layer 206 and an additional inner insulating layer 208.

[0189] The manufacturing method of the image sensor shown in FIG. 12 may be the same as that described with reference to FIGS. 8a to 8h, except for the differences described below.

[0190] In the method of manufacturing an image sensor shown in FIG. 12, the process corresponding to FIG. 8c is as follows. In the process of sequentially forming the insulating layer 202, the conductive layer 204, and the internal insulating layer 206 inside the second trench (reference symbol 200a in FIG. 8b, the same applies below), the internal insulating layer 206 may be formed to fill the inside of the conductive layer 204 in the second portion 220. An additional internal insulating layer 208 may be formed inside the internal insulating layer 206 in the third portion 230. The mask pattern 310, the second mask pattern, the insulating layer 202, the internal insulating layer 206, and the additional internal insulating layer 208 located on the first surface 111 of the substrate 110 may be removed. Then, the process of forming the end insulating portion 209 referring to FIG. 8f and FIG. 8g may not be performed.

[0191] When forming the additional internal insulating layer 208, due to the width difference between the second portion 220 and the third portion 230, the internal insulating layer 206 may be formed to entirely fill the inside of the conductive layer 204 in the second portion 220, but may not entirely fill the inside of the conductive layer 204 in the third portion 230. In such a case, the additional internal insulating layer 208 may be formed inside the internal insulating layer 206 in the third portion 230, as described above.

[0192] 4(c), the space 208g and the end insulating portion 209 may be located inside the third portion 230. In addition, various structures in which the second portion 220 and the third portion 230 have different stacking structures may be applied.

[0193] 13 and 14 are plan views of an image sensor according to another embodiment, in which a portion corresponding to FIG.

[0194] 13 and 14, in the embodiment, one first portion 210 may be located in each pixel separator 200. More specifically, the first portion 210 may be located between the second portion 220 and the third portion 230 located on one side thereof, and the second portion 220 may extend to the other third portion 230. As a result, the second portion 220 may be located at a center portion and one edge portion in the extension direction of the pixel separator 200. As shown in FIG. 13 and FIG. 14, the first portion 210 may be located at the other edge portion of the pixel separator 200. And, the second portion 220 and the third portion 230 having a total reflection structure may be connected at one edge portion. As a result, the second portion 220 having a total reflection structure may be located at the center portion and one edge portion, and the amount of light reaching the photoelectric conversion unit 120 may be maximized by reflecting light.

[0195] 13, the second portion 220 provided in the pixel separator 200 extending in the first direction (X-axis direction in the drawing) and the second portion 220 provided in the pixel separator 200 extending in the second direction (Y-axis direction in the drawing) may be positioned adjacent to the third portion 230 based on each third portion 230. As a result, the second portion 220 and the third portion 230 of the pixel separator 200 extending in the first direction and the internal layer 205 of the second portion 220 of the pixel separator 200 extending in the second direction are continuously connected, and total reflection by the internal layer 205 may be increased or maximized. As a result, the performance of the image sensor may be improved.

[0196] 14, the second portions 220 of the two pixel separators 200 extending in the first direction (X-axis direction in the drawing) from both sides of the third portion 230 may be positioned adjacent to the third portion 230, and the first portions 210 of the two pixel separators 200 extending in the second direction (Y-axis direction in the drawing) from both sides of the third portion 230 may be positioned adjacent to the third portion 230. Alternatively, the first portions 210 of the two pixel separators 200 extending in the first direction (X-axis direction in the drawing) from both sides of the third portion 230 may be positioned adjacent to the third portion 230, and the second portions 220 of the two pixel separators 200 extending in the second direction (Y-axis direction in the drawing) from both sides of the third portion 230 may be positioned adjacent to the third portion 230. This allows the first portions 210 to be more uniformly distributed in each pixel region (PX), improving the stability of the electrical connection structure, thereby improving the performance of the image sensor and / or reducing defects caused by structural degradation, thereby improving the reliability of the image sensor.

[0197] 15 is a plan view of an image sensor according to another embodiment, which shows a portion corresponding to FIG.

[0198] 15, in one embodiment, the first portion 210 may be located in a central portion of each pixel separator 200 in a plan view. Although the drawing illustrates an example in which one first portion 210 is located in the central portion, the embodiment is not limited thereto, and the first portion 210 may be formed in the central portion of the pixel separator 200, and a plurality of first portions 210 may be provided in each pixel separator 200. In addition, the position, number, etc. of the first portion 210 may be modified in various ways.

[0199] 13 to 15, the first portion 210, the second portion 220, and the third portion 230 have the structure shown in FIG. 6. However, the embodiment is not limited to this, and the structures of the first portion 210, the second portion 220, and the third portion 230 of the embodiment with reference to FIGS. 10 to 12 can be applied to the first portion 210, the second portion 220, and the third portion 230 of the embodiment with reference to FIGS. 13 to 15. Various other modifications are possible.

[0200] Although the embodiments have been described in detail above, the scope of the present invention is not limited thereto. Various modifications and improvements made by those skilled in the art using the basic concept of the present invention defined in the following claims are also within the scope of the present invention. [Explanation of symbols]

[0201] 100 Image Sensor 110 Substrate 120 Photoelectric conversion unit 130 Pixel Circuit 140 Wiring section 150 Anti-reflection layer 160 Color Filters 162 Filter separation section 170 Micro Lens 200 pixel separation 210 Part 1 220 Part 2 230 Part 3

Claims

1. a substrate including a plurality of pixel regions including a first pixel region and a second pixel region adjacent to each other; A photoelectric conversion portion located on the substrate; and a pixel separator penetrating at least a portion of the substrate between the first pixel region and the second pixel region and separating the first pixel region from the second pixel region; Including, the pixel separator includes first and second insulating portions adjacent to the first and second pixel regions, respectively, and a conductive layer and an internal layer located between the first and second insulating portions and including different materials; An image sensor, wherein the pixel separation portion includes a first portion including a portion where the conductive layer is filled between the first and second insulating portions in a cross direction intersecting the pixel separation portion, and a second portion including the conductive layer and the internal layer located between the first and second insulating portions in the cross direction.

2. the inner layer has a refractive index less than that of the conductive layer; 2. The image sensor of claim 1, wherein the internal layer includes at least one of an internal insulating layer including an insulating material and an internal surface defining a space portion having an internal space located between both sides of the conductive layer facing each other in the cross direction.

3. 2. The image sensor of claim 1, wherein in the second portion, the conductive layer includes first and second conductive portions located on the first and second insulating portions, respectively, and the internal layer is located between the first conductive portion and the second conductive portion in the cross direction.

4. 4. The image sensor of claim 3, wherein in the second portion, the internal layer includes first and second internal insulating portions located on the first and second conductive portions, respectively, and one or more internal surfaces defining at least a portion of a space located between the first and second internal insulating portions in the cross direction.

5. The image sensor of claim 4 , wherein in the second portion, the internal layer includes an end insulating portion that defines at least a portion of one end of the space.

6. 4. The image sensor of claim 3, wherein in the second portion, the internal layer includes first and second internal insulating portions located on the first and second conductive portions, respectively, and an additional internal insulating layer located between the first and second internal insulating portions.

7. 4. The image sensor of claim 3, wherein in the second portion, the internal layer includes a buried insulating portion filling a space between the first and second conductive portions in the cross direction.

8. the thickness of the first or second conductive portion is less than the thickness of the first or second insulating portion; or 4. The image sensor of claim 3, wherein a thickness of the first or second conductive portion is less than a thickness of the inner layer.

9. The image sensor of claim 1 , wherein the width of the second portion is greater than the width of the first portion.

10. In a plan view, the total length of the second portion is longer than the total length of the first portion; or The image sensor according to claim 1 , wherein in a plan view, a ratio of an overall length of the second portion to a length of the pixel separating portion is 50% or more.

11. The image sensor of claim 1 , wherein the first portion is located at an edge portion or a central portion of the pixel separator.

12. 2. The image sensor of claim 1, wherein the pixel separation portion further includes a third portion having a width greater than the second portion, the third portion including the conductive layer and the internal layer located between the first and second insulating portions in the cross direction.

13. the first pixel region and the second pixel region are adjacent to each other in a first direction; a third pixel region and a fourth pixel region adjacent to the first pixel region and the second pixel region, respectively, in a second direction intersecting the first direction, The image sensor of claim 12, wherein the third portion is located in a portion where the first, second, third and fourth pixel regions are adjacent to each other.

14. the conductive layer includes a polycrystalline semiconductor including a dopant; 10. The image sensor of claim 1, wherein the interior layer comprises at least one of an oxide, a nitride, an oxynitride, a fluoride, and a cavity having one or more interior surfaces defining an interior cavity.

15. A substrate including a plurality of pixel regions; a photoelectric conversion portion located on the substrate; a light scattering pattern located adjacent to one surface of the substrate; and a pixel separator penetrating at least a portion of the substrate between the pixel regions and separating the pixel regions; Including, the pixel separator includes a first portion and a second portion having a width greater than that of the first portion in a cross direction crossing the pixel separator, The second portion of the image sensor includes an insulating layer adjacent to the pixel region, a conductive layer disposed on the insulating layer, and an inner layer disposed within the conductive layer and having a lower refractive index than the conductive layer.

16. the plurality of pixel regions include a first pixel region and a second pixel region adjacent to each other in one direction, the pixel separation portion extends between the first pixel region and the second pixel region in a direction intersecting the one direction, the insulating layer includes first and second insulating portions adjacent the first and second pixel regions, respectively; 16. The image sensor of claim 15, wherein the first portion has an electrical connection structure by the conductive layer at least in a portion between the first and second insulating portions, and the second portion has a total reflection structure by the conductive layer and the internal layer at least in a portion.

17. 16. The image sensor of claim 15, wherein the interior layer includes at least one of an interior insulating layer including an insulating material and an interior surface defining at least a portion of a cavity having an interior space.

18. a substrate including a plurality of pixel regions including a first pixel region and a second pixel region adjacent to each other; A photoelectric conversion portion located on the substrate; and a pixel separator penetrating at least a portion of the substrate between the first pixel region and the second pixel region to separate the first pixel region from the second pixel region; Including, The pixel separator includes: a first portion including first and second insulating portions adjacent to the first and second pixel regions, respectively, and a conductive layer filling a space between the first and second insulating portions in a cross direction crossing the pixel separation portion; The image sensor includes a second portion having a width greater than the first portion and a stack structure different from that of the first portion, the second portion having an electrically insulating structure.

19. 20. The image sensor of claim 18, wherein the second portion includes the first and second insulating portions, first and second conductive portions located on the first and second insulating portions, respectively, and an internal layer located between the first and second conductive portions.

20. 20. The image sensor of claim 19, wherein the interior layer includes at least one of an interior insulating layer including an insulating material and an interior surface defining at least a portion of a cavity having an interior space.

Images