Information processing apparatus and control method

Abstract

To provide an information processing apparatus and a control method capable of increasing an opportunity to use a battery when there is a margin of a battery remaining capacity.SOLUTION: A power supply circuit is configured to supply power supplied from an external power source or a battery to a computer system. The computer system is configured to switch a system state among a normal state, a first low power state in which power consumption is lower than that in the normal state, and a second low power state in which power consumption is lower than that in the first low power state. The computer system is configured to determine a setting value for a decrease in remaining battery level such that the setting value is larger as the remaining battery level is higher when starting the first low power state, and to change the system state to the second low power state when the first low power state continues until the amount of decrease from the remaining battery level at the start of the first low power state reaches the setting value.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present invention relates to an information processing device and a control method. [Background technology]

[0002] In recent years, the way information processing devices such as PCs (Personal Computers) are used has changed. For example, it was common for employees to use PCs installed in the office when performing work for business purposes. However, with the spread of remote work and hybrid work, PCs are increasingly being used in a variety of places, such as at home, rental offices, restaurants, and public transportation. As a result, the time periods during which PCs are used are becoming more diverse, and it is becoming common for them not to be limited to designated working hours.

[0003] Information processing devices are not always used in environments where commercial power is available, and may consume power that has been stored in a battery in advance. To maintain a continuous usable state for a long time, it is expected that power consumption will be reduced. On the other hand, information processing devices may be provided with two or more low-power states that consume less power than a normal operating state. In general, the lower the power consumption of a system state, the longer the time it takes to return to a normal operating state. Therefore, two or more low-power states may be used depending on whether the priority is to shorten the return time or to reduce power consumption.

[0004] For example, Patent Document 1 describes an information processing device that receives power from a battery, and when the battery is in a low power state where the remaining charge is below a predetermined threshold, sets a portion of the memory to a low-power, unusable standby mode, and releases the memory standby mode when the low power state is no longer present.

[0005] In Patent Document 2, the device is configured to transition from an active state to an idle state as a first sleep state, and if the device transitions to the first sleep state after a preset scheduled time for starting use and before a scheduled time for ending use, the device transitions to a second sleep state in which the recovery time to the active state is longer than that of the first sleep state if there is no user operation for the first idle time, and if the device transitions to the first sleep state after a scheduled time for ending use and before a scheduled time for starting use, the device transitions to the second sleep state if there is no user operation for the second idle time that is shorter than the first idle time. For example, Modern Standby and Hibernation are applied as the first sleep state and the second sleep state, respectively. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] JP 2015-49808 A [Patent Document 2] JP 2019-220101 A Summary of the Invention [Problem to be solved by the invention]

[0007] However, in the information processing devices described in Patent Documents 1 and 2, the transition conditions from modern standby to a state with extremely low power consumption, such as hibernation, are standardized. Even if a user wants to use the information processing device, it may not immediately return to a normal operating state because the power consumption is extremely low. On the other hand, as the power consumption of information processing devices has been reduced, it is possible to maintain a modern standby state, which consumes more power than hibernation, for a long time if there is a certain amount of battery remaining. Alternatively, even if the battery is not fully charged, it may be possible to maintain an active state for a certain amount of time. [Means for solving the problem]

[0008] The present application has been made to solve the above-mentioned problems, and an information processing device according to one embodiment of the present application includes a computer system and a power supply circuit, the power supply circuit supplies power to the computer system from an external power source or a battery, and the computer system is capable of switching a system state between a normal state, a first low power state, and a second low power state, the first low power state being a state that consumes less power than the normal state, and the second low power state being a state that consumes less power than the first low power state.When starting the first low power state, the computer system sets a setting value for the remaining charge decrease so that the larger the remaining charge of the battery is, and when the first low power state continues until the amount of decrease from the remaining charge at the start of the first low power state reaches the setting value, the computer system changes the system state to the second low power state.

[0009] In the above information processing device, the computer system may determine the setting value to be equal to or greater than a predetermined lower limit value.

[0010] In the above information processing device, the computer system may determine, as the set value, the greater of a difference between the remaining capacity at the start of the first low power state and a predetermined target value, or the lower limit value.

[0011] In the above information processing device, the target value of the computer system may be equal to or greater than 50% and equal to or less than 70% of the capacity of the battery.

[0012] In the above information processing device, the first low power state may be modern standby, and the second low power state may be hibernation.

[0013] In the above-mentioned information processing device, the power supply circuit may, when power is supplied from an external power source, store in the battery any surplus power that is not consumed, and, when power is not supplied from the external power source, supply power discharged from the battery to the computer system.

[0014] Another aspect of the present application relates to a control method for an information processing device comprising a computer system and a power supply circuit that supplies power to the computer system from an external power source or a battery, the computer system being switchable between a normal state, a first low power state and a second low power state, the first low power state being a state that consumes less power than the normal state and the second low power state being a state that consumes less power than the first low power state, the control method comprising the steps of: when the information processing device starts the first low power state, setting a setting value for remaining battery charge decrease that is larger the greater the remaining battery charge of the battery; and when the first low power state continues until the amount of decrease from the remaining charge at the start of the first low power state reaches the setting value, changing the system state to the second low power state. Effect of the Invention

[0015] According to the embodiment of the present application, it is possible to increase the chances of immediate use of the battery when there is a margin of remaining charge. [Brief description of the drawings]

[0016] [Figure 1] 1 is an external view showing an example of the external configuration of an information processing device according to an embodiment of the present invention; [Diagram 2] 1 is a schematic block diagram illustrating an example of a hardware configuration of an information processing device according to an embodiment of the present invention. [Diagram 3] 1 is a schematic block diagram illustrating an example of a functional configuration of an information processing device according to an embodiment of the present invention. [Figure 4] FIG. 1 is an explanatory diagram showing the relationship between the standby budget and the system state. [Diagram 5] 1 is a table illustrating standby budget setting values ​​according to the present embodiment. [Figure 6] 10 is a diagram illustrating a relationship between a standby budget setting value and a remaining battery charge according to the embodiment; FIG. [Figure 7]5 is a flowchart showing an example of a system state control according to the embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0017] First, a hardware configuration example of an information processing device 1 according to an embodiment of the present application will be described with reference to the drawings. In the following description, the information processing device 1 is mainly a notebook PC (sometimes referred to as a "notebook PC" in the present application) as an example.

[0018] FIG. 1 is an external view showing an example of the external configuration of an information processing device 1 according to this embodiment. The information processing device 1 includes two housings 102 and 104. The housings 102 and 104 each have a horizontally elongated surface with a width greater than its height, and a flat shape with a thickness less than its height. One side of each of the housings 102 and 104 is arranged in parallel in the width direction and engaged with each other using hinges 108a and 108b. One of the housings 102 and 104 is connected to the other so as to be rotatable around a rotation axis A. That is, the housings 102 and 104 open and close by varying the angle formed by the surfaces of each of the housings 102 and 104 (hereinafter, sometimes referred to as the "opening angle"). An opening angle of 0° or close to 0° (for example, 45° to 60° or less) corresponds to a state in which the housings 102 and 104 are closed. An opening angle that is sufficiently large (for example, an angle greater than 45° to 60°) corresponds to a state in which the housings 102 and 104 are open. When no external force is applied to the housings 102 and 104, the opening angle is maintained constant.

[0019] The housing 102 is provided with a lid sensor 44 at a position away from the rotation axis A. The lid sensor 44 detects whether the housings 102, 104 are open or closed. In the example of FIG. 1, the lid sensor 44 is provided with a magnetic sensor. A permanent magnet 46 is provided in the housing 104 at a position facing the lid sensor 44 when the housing 102 is closed. When the housings 102, 104 are closed, the magnetic sensor is close to the permanent magnet and detects a relatively strong magnetic field. When the housings 102, 104 are open, the magnetic sensor is farther away from the permanent magnet and detects a weaker magnetic field. Therefore, the open or closed state of the housings 102, 104 can be determined based on the strength of the detected magnetic field.

[0020] A keyboard 32k, a touchpad 32t, and a power button 38 are arranged on the surface of the housing 102. A socket (outlet) 42o is provided on a side surface in the width direction of the housing 102. The socket 42o has a hollow portion into which a plug of an AC adapter 42 can be inserted, and by fitting with the inserted plug, the position of the plug is fixed in a state of contact with an electrode provided on the inner surface of the hollow portion. DC power is supplied from the AC adapter 42 to the information processing device 1 via the plug inserted into the socket 42o. AC adapter 42 receives AC power from a commercial power source and converts the supplied AC power into DC power having a constant voltage (for example, 3V to 12V).

[0021] 2 is a schematic block diagram showing an example of a hardware configuration of the information processing device 1 according to the present embodiment. The information processing device 1 includes a processor 11, a main memory 12, a video subsystem 13, a display 14, a chipset 21, a basic input-output system (BIOS) memory 22, a storage 23, an audio system 24, a wireless local area network (WLAN) card 25, a universal serial bus (USB) connector 26, an embedded controller (EC) 31, an input device 32, a power supply circuit 33, a battery 34, a power button 38, and a lid sensor 44.

[0022] The processor 11 executes arithmetic processing according to various commands written in a program, and controls the overall operation of the information processing device 1. The processor 11 may include, for example, one or more central processing units (CPUs). The main memory 12 is a writable memory used as a read area for a program executed by the processor 11 or a work area for writing processing data for the executed program. The main memory 12 includes, for example, one or more DRAM (Dynamic Random Access Memory) chips. The programs include, for example, an OS (Operating System), drivers for controlling the operation of peripheral devices, various service / utility programs (sometimes referred to as "utilities" in this application), application programs (sometimes referred to as "apps" in this application), and the like.

[0023] Processor 11, main memory 12, and chipset 21 are the minimum hardware that constitutes host system 110 (FIG. 3). In this application, the devices that constitute host system 110 may be collectively referred to as "system device 10." Host system 110 is a computer system that serves as the core of information processing device 1. Processor 11 executes a predetermined program and realizes the functions of host system 110 in cooperation with main memory 12 and other hardware. In this application, "executing a program" or "running a program" includes the meaning of performing processing instructed by instructions written in the program.

[0024] Video subsystem 13 is a subsystem for realizing functions related to image display. Video subsystem 13 includes a video controller (not shown). The video controller performs processing instructed by a drawing command input from processor 11, and writes display data obtained by the processing to a video memory (not shown) provided in itself. The video controller reads the written display data from the video memory, and outputs the read display data to display 14.

[0025] The display 14 displays various display screens based on display data input from the video subsystem 13. The display 14 may be any type of display, such as an LCD (Liquid Crystal Display) or an OLED (Organic Light Emitting Diode) display.

[0026] The chipset 21 connects to one or more peripheral devices and controls input and output of various data. The chipset 21 has various input and output interfaces and connects devices corresponding to the interfaces. The chipset 21 has controllers corresponding to various input and output methods. The chipset 21 has controllers related to, for example, one or a combination of a Universal Serial Bus (USB), a Serial ATA (Advanced Technology Attachment), a Serial Peripheral Interface (SPI) bus, a Peripheral Component Interconnect (PCI) bus, a PCI-Express bus, and a Low Pin Connect (LPC) bus. In FIG. 1, a BIOS memory 22, a storage 23, an audio system 24, a WLAN card 25, a USB connector 26, and an EC 31 are illustrated as peripheral devices connected to the chipset 21.

[0027] System firmware such as a BIOS is prestored in the BIOS memory 22. Firmware for controlling the operation of the EC 31 and other devices may be stored in the BIOS memory 22. The BIOS memory 22 includes a rewritable non-volatile memory (for example, an EEPROM (Electrically Erasable Programmable Read Only Memory), a flash ROM, etc.).

[0028] The storage 23 is an auxiliary storage device that stores various programs and data executed by the processor 11. The storage 23 includes a rewritable nonvolatile memory. The storage 23 may be any of an SSD (Solid State Drive) and an HDD (Hard Disk Drive). The audio system 24 executes input, output, and recording of audio data. The audio system 24 includes a speaker and emits sound based on the audio data input to the audio system 24. The audio system 24 includes a microphone and picks up sounds arriving at the audio system 24 and obtains audio data indicating the picked up sounds.

[0029] A WLAN (Wireless Local Area Network) card 25 connects to a wireless LAN and performs data communication with other devices directly or indirectly connected to the wireless LAN. A wireless LAN enables various data to be transmitted and received between devices according to a predetermined wireless communication method (e.g., IEEE802.11). The USB connector 26 is a connector for connecting peripheral devices in accordance with the USB (Universal Serial Bus) standard so as to enable input and output of data.

[0030] Regardless of the system state of the host system, the EC 31 monitors the operating environment and monitors and controls the states of various devices (peripheral devices, sensors, etc.). The EC 31 has its own processor, memory, and input / output terminals, and is configured as a microcomputer. An input device 32, a power circuit 33, a power button 38, a lid sensor 44, etc. are connected to the EC 31 via the input / output terminals.

[0031] The EC 31 has a power management function and controls the operation state of the power circuit 33. The EC 31 controls the power circuit 33 based on, for example, a system state notified from the host system 110. The system states that the host system 110 can take are, for example, a normal operating state (sometimes referred to as an "active state" or "normal state" in this application) and two stages of low power states. The normal mode is the most active state (referred to as an S0 state) among multiple stages of system states defined by ACPI (Advanced Configuration and Power Interface). The low power state is a system state that consumes less power than the normal mode. In the low power state, the operation or function of at least some devices (for example, the video subsystem 13 and the display 14) is stopped. In the low power state, the operation or function of devices related to the user interface, for example, the audio system 24, the input device 32, etc. may be stopped.

[0032] The two-stage low power state includes, for example, modern standby and hibernation. Modern standby is an extended state of the S0 state, and allows for quicker return to normal mode than hibernation. Modern standby is sometimes called the S0ix state. Hibernation is a system state that consumes even less power than modern standby. Hibernation is a resting state in which power supply to the processor 11 and main memory 12 is stopped and the operation of the host system 110 is stopped, and corresponds to the S4 state defined by ACPI. In hibernation, the operation of even more peripheral devices than in modern standby, for example, all peripheral devices connected to the chipset 21, is stopped. Modern standby and hibernation correspond to examples of the first low power state and the second low power state, respectively.

[0033] The input device 32 receives a user's operation, generates an operation signal according to the received operation, and outputs the generated operation signal to the EC 31. The input device 32 includes, for example, any one of a keyboard, a touch pad, and a pointing device such as a mouse, or any combination thereof. The EC 31 outputs the operation signal input from the input device 32 to the host system 110 via the chipset 21.

[0034] The power supply circuit 33 is supplied with DC power from an AC (Alternating Current) adapter (not shown) via the socket 42o or from the battery 34. The power supply circuit 33 converts the voltage of the supplied DC power to a voltage required for the operation of each device constituting the information processing device 1, and supplies the converted voltage to the device. The power supply circuit 33 includes a voltmeter that measures the voltage of the power supplied from the AC adapter, and notifies the EC 31 of the measured voltage as the supply voltage. The EC 31 determines whether or not the power is supplied from the AC adapter based on the supply voltage notified from the power supply circuit 33. The EC 31 can determine whether or not the mode is an AC mode or a DC mode depending on whether or not the supply voltage notified from the power supply circuit 33 is equal to or higher than a predetermined supply voltage threshold. The AC mode is a power supply mode that mainly consumes power supplied from the AC adapter. The DC mode is a power supply mode that mainly consumes power discharged from the battery 34. The EC 31 notifies the host system 110 of the determined power supply mode via the chipset 21.

[0035] The power supply circuit 33 includes, for example, a DC / DC (Direct Current) converter and a charge / discharge unit. The power supply circuit 33 controls whether or not power is supplied to each device of the information processing device 1 under the control of the EC 31. The power supply circuit 33 adjusts the amount of operating power supplied to a specific device (for example, the processor 11) among the devices that require power supply.

[0036] When power is being supplied from the AC adapter, the charge / discharge unit supplies the remaining power not consumed in each device to the battery 34. When power is not supplied from the AC adapter 42 or when the power supplied from the AC adapter 42 is insufficient for the required power, the charge / discharge unit supplies the power discharged from the battery 34 to each device via a DC / DC converter. Based on a command from the EC 31, the power supply circuit 33 identifies a device to be operated and supplies the identified device with the power required for operation.

[0037] The power supply circuit 33 also includes a voltmeter that measures the electromotive force of the battery 34, and notifies the EC 31 of the electromotive force measured without charging. Information indicating the relationship between electromotive force and remaining charge is set in the EC 31 in advance, and the amount of charge stored in the battery 34 is estimated as the remaining charge based on the electromotive force notified from the power supply circuit 33. The EC 31 notifies the system device 10 of the estimated remaining charge of the battery 34 via the chipset 21. The EC 31 may notify the system device 10 of the estimated remaining charge of the battery 34 at regular intervals (e.g., 1 to 15 minutes), or may notify the system device 10 of the estimated remaining charge of the battery 34 at intervals of a predetermined value range (e.g., in increments of 1%). Each time the remaining amount changes to a new remaining amount that has been discretized, the remaining amount obtained by the change may be notified to the system device 10. As will be described later, the remaining amount notified to the system device 10 is used to control the system state.

[0038] A secondary battery is used as the battery 34. The secondary battery is a storage battery that can be charged and discharged. An example of the secondary battery is a lithium ion battery. Each time a pressing operation is accepted, the power button 38 controls the state of power supply to the host system 110 of the information processing device 1 to be either power on (Power ON) or power off (Power OFF). When a pressing operation is accepted, the power button 38 outputs a pressing signal indicating the pressing to the EC 31.

[0039] The lid sensor 44 detects whether the housings 102, 104 are open or closed. The lid sensor 44 generates a detection signal indicating the detected open or closed state and outputs it to the EC 31. The EC 31 identifies the open or closed state based on the detection signal input from the lid sensor 44. For example, when the lid sensor 44 is a magnetic sensor, the EC 31 can determine whether the housings 102, 104 are closed based on whether the strength of the magnetic field indicated by the detection signal is equal to or greater than a predetermined strength threshold.

[0040] In the following description, a state in which the housings 102, 104 are open may be referred to as an "open state" (lid open), and a state in which the housings 102, 104 are closed may be referred to as a "closed state" (lid closed). The EC 31 notifies the system device 10 of the determined open / closed state via the chipset 21. The open / closed state notified to the system device 10 may be used to control the system state.

[0041] Next, an example of the functional configuration of the information processing device 1 according to this embodiment will be described. Fig. 3 is a schematic block diagram showing an example of the functional configuration of the information processing device 1 according to this embodiment. The host system 110 of the information processing device 1 includes an event processing unit 114 and a mode control unit .

[0042] The event processing unit 114 acquires an event related to the control of the system state of the host system 110. The event processing unit 114 acquires, for example, notification information from the EC 31. The notification information from the EC 31 includes the power mode, the remaining charge of the battery 34, the open / closed state of the housings 102 and 104, and the input of an operation signal input from the input device 32. The event processing unit 114 detects the operating status of the host system 110. Elements of the operating status include the execution state of each program, the power consumption of the processor 11, and the like. The event processing unit 114 notifies the mode control unit 116 of the acquired event.

[0043] The mode control unit 116 controls the system state (operation mode) based on one or both of the operating status and the usage environment of the information processing device 1. The mode control unit 116 pre-sets a transition condition from the system state 1 as the transition source to the system state 2 as the transition destination for each pair of a certain system state 1 and another system state 2. The mode control unit 116 refers to the transition condition from the current system state 1 to the system state 2, and when the current operating state or the usage environment satisfies the transition condition to the system state 2 based on an event notified from the event processing unit 114, transitions the current system state 1 to the system state 2. The mode control unit 116 notifies the EC 31 of the system state determined by the control via the chipset 21. Specific examples of the system states of the host system 110 will be described later.

[0044] A standby budget is set in the mode control unit 116. The standby budget is an element of the transition conditions from modern standby to hibernation. In other words, the standby budget is one of the parameters referenced when determining whether or not to transition the system state from modern standby to hibernation. More specifically, the standby budget corresponds to the decrease in the remaining charge of the battery 34 from the start of modern standby to the remaining charge when the system state transitions to hibernation.

[0045] The standby budget setting value is set so that the higher the remaining charge of the battery 34 at the start (entry) of modern standby (hereinafter, sometimes referred to as the "start remaining charge"), the larger the standby budget setting value. In general, the smaller the standby budget setting value, the higher the possibility of transitioning to hibernation frequently, and the larger the standby budget setting value, the higher the possibility of maintaining modern standby (see Figure 4). When the system state transitions to hibernation, the risk of the remaining charge of the battery 34 being depleted (battery dead) decreases, but the disadvantage of the longer time required to return to normal mode increases. Therefore, when the remaining charge of the battery 34 is low and there is a high need to save power consumption, transition to hibernation is encouraged. On the other hand, when the remaining charge of the battery 34 is high and a state of high power consumption is acceptable, the standby budget setting is increased to increase the possibility of maintaining modern standby and to achieve a quick return to normal mode.

[0046] That is, when modern standby is started by transition from another system state (for example, normal mode), the mode control unit 116 identifies the remaining charge of the battery 34 in response to an event notified by the event processing unit 114. The mode control unit 116 refers to setting information indicating a correspondence between a preset remaining charge of the battery 34 and a standby budget, and identifies a setting value of the standby budget corresponding to the identified starting remaining charge. When modern standby continues as the system state until the decrease in the remaining charge of the battery 34 notified by the event processing unit 114 from the starting remaining charge reaches the identified setting value of the standby budget, the mode control unit 116 transitions the system state to hibernation.

[0047] Next, an example of the system state according to this embodiment will be described. A power off state is a state in which power supplied from an external power source or a battery 34 is not consumed. In the power off state, most peripheral devices stop operating, except for some devices that consume little power. When a press signal is input from a power button 38 in the power off state, the EC 31 causes the power circuit 33 to start supplying power to each device of the information processing device 1 (power on). When the processor 11 detects the start of power supply to itself, it reads the BIOS from the BIOS memory 22, loads the read BIOS into the main memory 12, and executes a startup process (boot) according to the BIOS. In the startup process, the processor 11 loads data saved in the storage 23 into the main memory 12. Thereafter, the processor 11 starts the OS, and after the startup of the OS is completed, starts executing device drivers related to the control of other devices. At this stage, the system state transitions to a normal mode (S0 state).

[0048] Hibernation (S4 state) is a pause state in which the operation of the system device 10 is stopped. In hibernation, image data showing the program execution state immediately before the transition to hibernation is saved in the storage 23. In hibernation, most peripheral devices stop operating, except for some devices with low power consumption. When a press signal is input from the power button 38 in the hibernation state, the EC 31 transitions the system state to the normal mode, similar to the power-off state. At this time, the processor 11 resumes program execution from the execution state immediately before the transition to hibernation, using the saved image data.

[0049] When the system state is normal mode or modern standby and a request from the OS or a press signal is input from the power button 38, the EC 31 causes the system device 10 to execute a stop process (shutdown). In the stop process, the mode control unit 116 saves data that exists in the main memory 12 as a working area at that time to the storage 23. After completing the data save, the mode control unit 116 stops processing by the application, device driver, and other programs that are being executed at that time. Thereafter, the processor 11 notifies the EC 31 of the completion of the stop process. The EC 31 causes the power supply circuit 33 to stop the power supply to each device. At this time, the system state becomes power off.

[0050] When a predetermined transition condition to modern standby is satisfied in the normal mode, the mode control unit 116 transitions the system state to modern standby (S0ix state). The transition condition from the normal mode to modern standby includes events such as when the display screen does not change for a certain period of time (e.g., 3 to 10 minutes) or more and an operation signal from the input device 32 is not detected, when there is no application to be instructed to be executed in response to an operation, and when the open / closed state of the housings 102 and 104 changes from an open state to a closed state. In the modern standby, in addition to the EC 31, some peripheral devices such as the storage 23 and the WLAN card 25 may continue to operate. Also, the input device 32 may be operated, and the event processing unit 114 may wait for an operation signal from the input device 32 via the EC 31 and the chipset 21.

[0051] When a predetermined transition condition to hibernation is satisfied in modern standby, the mode control unit 116 transitions the system state to hibernation (S4 state). At this time, the mode control unit 116 saves image data that exists in the main memory 12 as a working area at that time to the storage 23. After completing the data save, the mode control unit 116 stops processing by the application, device driver, and other programs that are being executed at that time. After that, the processor 11 notifies the EC 31 of the completion of the stop processing. The EC 31 causes the power supply circuit 33 to stop the power supply to each device.

[0052] The transition conditions from modern standby to hibernation include the case where the decrease in the remaining battery charge since the start of modern standby is equal to or greater than the standby budget setting value, as described above. In addition, any one of the following conditions or any combination of the following may be applied as the transition conditions: when modern standby continues for a certain period of time (e.g., 10 to 30 minutes) or more, when the time at that point reaches a preset pause time, when sleep is instructed by an operation signal, when the remaining charge of battery 34 is equal to or less than a predetermined limit value, when the actual measured value of power consumption of information processing device 1 is equal to or less than a preset reference value of power consumption, etc.

[0053] The mode control unit 116 transitions the system state to the normal mode when a predetermined transition condition to the normal mode is satisfied in the modern standby mode. The transition condition from the modern standby mode to the normal mode is, for example, when an operation signal is input from the input device 32, when a press signal is input from the power button 38, when the open / close state of the housings 102, 104 changes from a closed state to an open state, or other events. The mode control unit 116 may apply a transition condition that is defined in advance in the OS or other programs.

[0054] Next, an example of setting the standby budget will be described. FIG. 5 is a table showing standby budget setting values ​​according to this embodiment. FIG. 5 shows the standby budget setting value and duration for each remaining battery charge at the start of modern standby. The remaining battery charge and the standby budget setting value are expressed as a ratio (%) to the capacity of the battery 34. The duration is the time until the decrease in the remaining battery charge from the remaining charge at the start of modern standby reaches the standby budget setting value while modern standby continues as the system state. However, in the example of FIG. 5, it is assumed that the capacity of the battery 34 is 50 Wh and the power consumption of the information processing device 1 in modern standby is 200 mW.

[0055] The standby budget setting values ​​exemplified in Fig. 5 are set so that the greater the remaining battery charge at the start of modern standby, the higher the standby budget setting values ​​will be. For example, the standby budget setting values ​​are set to 20%, 30%, and 40% for battery charges of 80%, 90%, and 100%, respectively. Assuming that the capacity of battery 34 is 50Wh and the power consumption in modern standby is 200mW, the duration for these standby budget setting values ​​will be 100h (approximately 4 days), 75h (approximately 3 days), and 50h (approximately 2 days), respectively.

[0056] A lower limit may be set for the standby budget setting value. In the example of Fig. 5, the lower limit of the standby budget setting value is set to 10% when the remaining battery charge is 70% or less. By setting a lower limit for the standby budget setting value, even if the remaining battery charge is low, transition to hibernation immediately after the start of modern standby is avoided, and the number of opportunities to quickly return to normal mode is ensured (maximized) as much as possible.

[0057] However, when the remaining battery charge falls below a predetermined lower limit, it is not realistic to continue operating the information processing device 1 in the normal mode by consuming power supplied from the battery 34. The lower limit of the remaining battery charge is set to a value (e.g., 3 to 8%) smaller than the lower limit of the standby budget. Therefore, when the system state is the normal mode or the modern standby mode and the remaining battery charge falls below the limit value, the mode control unit 116 transitions the system state to hibernation.

[0058] The setting information indicating the standby budget setting value for each remaining battery amount is set in the mode control unit 116 as information indicating a transition condition related to the state transition from modern standby to hibernation. The setting information may be expressed as a data table as exemplified in FIG. 5, or may be expressed as a parameter of a function for deriving the standby budget setting value from the remaining battery amount. The relationship between the remaining battery amount X and the standby budget setting value Y as exemplified in FIG. 6 is expressed as Y=XT when X is T+M or more and 100% or less, and as T=M when X is 0% or more and T+M or less. In this case, the target value (Target) T and the lower limit (Lower Limit) M are parameters. The target value corresponds to a reference value of the remaining battery amount when the system state is transitioned from modern standby to hibernation when the remaining battery amount X is T+M or more.

[0059] 5 and 6, the target value T and the lower limit M are 60% and 10%, respectively, but are not limited to these. The target value T and the lower limit M may be changed as appropriate depending on the designed battery life and the user's psychology. Typically, the target value T and the lower limit M may be about 50 to 70% and 5 to 15%, respectively.

[0060] In the examples of Figures 5 and 6, a lower limit is set for the standby budget when the remaining battery charge falls below a first threshold (e.g., 70%). An upper limit may be set for the standby budget when the remaining battery charge is equal to or greater than a second threshold. The second threshold is set to a value greater than the first threshold (e.g., 85-95%). In this case, the duration of modern standby is controlled so that the decrease in the remaining battery charge falls within the upper limit of the standby budget.

[0061] Furthermore, the rate of change of the standby budget setting value Y with respect to the remaining battery charge X is not limited to 1, but may be a value greater than 0 and less than 1, for example, 0.5. The function that gives the relationship between the remaining battery charge X and the standby budget setting value Y is not limited to the linear function exemplified in Fig. 6. For example, it may be a function that gives a function value that approaches a lower limit M as X approaches 0%. If an upper limit is set for the standby budget, it may be a function that gives a function value that approaches the upper limit as X approaches 100%. For example, a sigmoid function, an arc tangent function, etc. can be used as such a function.

[0062] The function that gives the standby budget setting value Y is not limited to a continuous function, but may be a discrete function, so long as it gives a larger function the larger the remaining battery level X. In other words, a different constant value may be associated as the standby budget setting value Y with each of multiple (at least two or more) ranges of the remaining battery level X. The standby budget parameters (target value T and lower limit M in the examples of FIGS. 5 and 6) may be configurable by a user operation. In this case, host system 110 displays a setting screen on display 14, and sets the specified values ​​as parameters for the setting items specified by operation signals input from input device 32.

[0063] Next, an example of the system state control according to the present embodiment will be described. Fig. 7 is a flowchart showing an example of the system state control according to the present embodiment. The process illustrated in Fig. 7 is started when the system state of the host system 110 is in the active state, and includes a process until the system state transitions to hibernation. (Step S102) The mode control unit 116 judges whether or not the current operating state or the usage environment satisfies the transition condition from the active state to the modern standby state. If it is judged that the condition is satisfied (step S102 YES), the mode control unit 116 proceeds to the process of step S104. If it is judged that the condition is not satisfied (step S102 NO), the mode control unit 116 repeats the process of step S102.

[0064] (Step S104) The mode control unit 116 acquires the information on the remaining battery capacity notified from the EC 31 via the chipset 21 and the event processing unit 114. The remaining battery capacity notified at this time corresponds to the start time remaining capacity. (Step S106) Mode control unit 116 refers to preset setting information and identifies a standby budget setting value that corresponds to the obtained remaining battery charge.

[0065] (Step S108) The mode control unit 116 judges whether or not the current operating state or the usage environment satisfies the transition condition from the modern standby state to the active state. If it is judged that the condition is satisfied (step S108 YES), the process returns to step S102. If it is judged that the condition is not satisfied (step S108 NO), the process proceeds to step S110. (Step S110) The mode control unit 116 acquires information on the remaining battery level notified from the EC 31 via the chipset 21 and the event processing unit 114.

[0066] (Step S112) The mode control unit 116 calculates the decrease in the remaining battery charge by subtracting the latest remaining battery charge from the remaining charge at the start. The mode control unit 116 determines whether the calculated decrease reaches the specified standby budget setting value. If it is determined that it has reached the setting (YES in step S112), the mode control unit 116 proceeds to the process of step S114. If it is determined that it has not reached the setting (NO in step S112), the mode control unit 116 returns to the process of step S110.

[0067] (Step S114) The mode control unit 116 transitions the system state of the host system 110 from modern standby to hibernation. Here, the mode control unit 116 saves data currently present in the main memory 12 to the storage 23, and after completing the data save, stops the processing by the application, device driver, and other programs currently being executed. After that, the processor 11 notifies the EC 31 of the completion of the stop processing. The EC 31 causes the power supply circuit 33 to stop the power supply to each device. After that, the processing of FIG. 7 ends.

[0068] In the above description, the information processing device 1 is not limited to a notebook PC, and may be realized as a portable electronic device having a different form, such as a tablet PC or a 2-in-1 PC. Moreover, the first low power state and the second low power state are not limited to modern standby and hibernation, respectively. The second low power state may be any system state in which the host system 110 consumes less power than the first low power state, that is, a system state in which it takes more time to return to the normal state. For example, the first low power state and the second low power state may be the S3 state and the S4 state, respectively, defined by ACPI.

[0069] As described above, the information processing device 1 according to the present embodiment includes a computer system (e.g., a host system 110) and a power supply circuit 33. The power supply circuit 33 supplies power from an external power supply or a battery 34 to the computer system. The computer system can switch the system state among a normal state (e.g., an active state), a first low power state, and a second low power state. The first low power state is a state in which power consumption is less than that of the normal state (e.g., an active state), and the second low power state is a state in which power consumption is less than that of the first low power state. When the computer system starts the first low power state, the computer system determines a set value (e.g., a standby budget) for remaining charge reduction so that the set value is larger as the remaining charge of the battery 34 increases. When the first low power state continues until the amount of reduction from the remaining charge at the start of the first low power state reaches the set value, the computer system changes the system state to the second low power state. The first low power state may be, for example, modern standby and the second low power state may be hibernation. According to this configuration, the higher the remaining charge of the battery 34, the higher the set value for the remaining charge decrease is set. Therefore, when the remaining charge of the battery 34 is high, the time elapsed from the start of the first low power state is lengthened to suppress the transition to the second low power state, thereby quickly returning to the normal state and increasing the opportunities for using the information processing device 1.

[0070] The computer system may also determine the set value for the remaining charge reduction to be equal to or greater than a predetermined lower limit. According to this configuration, the set value for the remaining charge reduction is set to be equal to or greater than the predetermined lower limit, so that the transition to the second low power state immediately after the start of the first low power state is avoided. Therefore, by continuing the first low power state, an opportunity to quickly return to the normal state is ensured.

[0071] Furthermore, the computer system may set the set value for the low remaining charge to the greater of either the difference between the remaining charge of the battery 34 at the start of the first low power state and a predetermined target value, or a predetermined lower limit value. According to this configuration, when the remaining charge of battery 34 at the start of the first low power state is high and the difference from a predetermined target value exceeds a predetermined lower limit, the difference between the remaining charge of battery 34 and the target value is determined as the set value for the remaining charge reduction, and when the remaining charge of battery 34 at the start of the first low power state is low and the difference from the target value is equal to or smaller than the predetermined lower limit, the predetermined lower limit is determined as the set value for the remaining charge reduction. Therefore, the set value for the remaining charge reduction is determined to be equal to or larger than the predetermined lower limit.

[0072] The predetermined target amount may also be greater than or equal to 50% and less than or equal to 70% of the capacity of the battery 34. According to this configuration, when the remaining charge of battery 34 at the start of the first low power state is high and the difference from a predetermined target value exceeds a predetermined lower limit, the first low power state continues until the remaining charge of battery 34 reaches the target value, thereby ensuring an opportunity to quickly return to the normal state, and when the remaining charge of battery 34 falls below the target value, the state transitions to the second low power state, thereby maintaining the remaining charge of battery 34. By setting the target value to be 50% or more and 70% or less of the capacity of battery 34, a duration of battery 34 desired from the design or the user's psychology is ensured.

[0073] In addition, when power is supplied from an external power source, the power supply circuit 33 may store surplus power that is not consumed in the battery 34, and when power is not supplied from the external power source, the power supply circuit 33 may supply power discharged from the battery 34 to the computer system. According to this configuration, surplus power that is not consumed out of the power supplied from the external power source is stored in the battery 34. As the remaining capacity of the battery 34 increases due to the accumulation of surplus power, the set value for the remaining power reduction becomes larger. By extending the duration of the first low power state, the opportunity to quickly return to the normal state can be increased.

[0074] Although the embodiment of the present invention has been described in detail above with reference to the drawings, the specific configuration is not limited to the above embodiment, and the present invention also includes designs that do not deviate from the gist of the present invention. The configurations described in the above embodiment can be combined in any combination. [Explanation of symbols]

[0075] 1...information processing device, 10...system device, 11...processor, 12...main memory, 13...video subsystem, 14...display, 21...chipset, 22...BIOS memory, 23...storage, 24...audio system, 25...WLAN card, 26...USB connector, 31...EC, 32...input device, 32k...keyboard, 32t...touchpad, 33...power circuit, 34...battery, 38...power button, 42o...outlet, 44...lid sensor, 102, 104...housing, 108a, 108b...hinge, 110...host system, 114...event processing unit, 116...mode control unit

Claims

1. A computer system; A power supply circuit, The power supply circuit includes: Supplying power to the computer system from an external power source or a battery; The computer system includes: The system state can be switched between a normal state, a first low power state, and a second low power state; the first low power state is a state consuming less power than the normal state, The second low power state is a state in which power consumption is less than that of the first low power state. The computer system includes: determining a set value for low remaining battery charge to be larger as the remaining battery charge of the battery increases when the first low power state is started; When the first low power state continues until the decrease in the remaining capacity from the start time of the first low power state reaches the set value, the system state is changed to the second low power state. Information processing device.

2. The computer system includes: The set value is set to be equal to or greater than a predetermined lower limit. The information processing device according to claim 1 .

3. The computer system includes: The set value is determined to be the greater of the difference between the remaining capacity at the start of the first low power state and a predetermined target value, or the lower limit value. The information processing device according to claim 2 .

4. the first low power state is modern standby, The second low power state is hibernation. The information processing device according to claim 1 .

5. When power is supplied from an external power source, the power supply circuit stores in the battery any surplus power that is not consumed from the power supply; When power is not supplied from the external power source, power discharged from the battery is supplied to the computer system. The information processing device according to claim 1 .

6. A computer system; a power supply circuit for supplying power from an external power supply or a battery to a computer system; The computer system includes: The system state can be switched between a normal state, a first low power state, and a second low power state; the first low power state is a state consuming less power than the normal state, A method for controlling an information processing device, the second low power state being a state consuming less power than the first low power state, The information processing device, determining a low remaining charge setting value so that the lower remaining charge setting value is larger as the remaining charge of the battery increases when the first low power state is initiated; changing the system state to the second low power state when the first low power state continues until a decrease in the remaining capacity from the start of the first low power state reaches the set value. Control methods.

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