Display device and manufacture method of display device

Abstract

To provide a new display panel excellent in convenience or reliability, or a new display panel excellent in being stored in a housing.SOLUTION: The display panel comprises: a terminal; a first substrate supporting the terminal; a second substrate including a region overlapping the first substrate; a joint layer bonding the first substrate to the second substrate; a display element electrically connected to the terminal between the first substrate and the second substrate; and an insulation layer in contact with the first substrate, the second substrate and the joint layer. The insulation layer includes an opening in a region overlapping the display element.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] One aspect of the present invention relates to a display panel. Another aspect of the present invention relates to a display module.

[0002] Note that one aspect of the present invention is not limited to the above technical field. The technical field of one aspect of the invention disclosed in this specification and the like relates to an article, a method, or a manufacturing method. Or, one aspect of the present invention relates to a process, a machine, a manufacture, or a composition (composition ·of·matter). Therefore, more specifically, examples of the technical field of one aspect of the present invention disclosed in this specification include semiconductor devices, display devices, light-emitting devices, power storage devices, memory devices , their driving methods, or their manufacturing methods.

Background Art

[0003] There are functional elements whose functions are impaired due to the diffusion of impurities. In order to maintain the functions of such functional elements, there is known an invention in which a functional element is sealed in a space surrounded by a substrate on which the functional element is provided, a sealing substrate, and a sealing material for bonding the substrate and the sealing substrate together (Patent Document 1).

[0004] In the manufacturing process of a light-emitting device, after manufacturing an electrode layer and an element layer, a process of forming a shape is performed to manufacture a light-emitting panel that is at least partially bent, and a protective film covering the surface of the at least partially bent light-emitting panel is formed to add high functionality and high reliability to a light-emitting device using the light-emitting panel (Patent Document 2).

Prior Art Documents

Patent Documents

[0005] [Patent Document 1] U.S. Patent Application Publication No. 2007 / 0170854 [Patent Document 2] Japanese Patent Application Laid-Open No. 2011-003537 [Summary of the Invention] [Problems to be Solved by the Invention]

[0006] One aspect of the present invention is to provide a novel display panel excellent in convenience or reliability as one of the problems. Or, to provide a novel display panel excellent in storability in a housing as one of the problems. Or, to provide a novel display panel with suppressed power consumption as one of the problems. Or, to provide a novel display module or a novel semiconductor device as one of the problems. Note that the description of these problems does not prevent the existence of other problems. Note that one aspect of the present invention does not need to solve all of these problems. Note that other problems will be apparent from the description in the specification, drawings, claims, etc., and it is possible to extract these other problems from the description in the specification, drawings, claims, etc. Note that the description of these problems does not prevent the existence of other problems. Note that one aspect of the present invention does not need to solve all of these problems. Note that other problems will be apparent from the description in the specification, drawings, claims, etc., and it is possible to extract these other problems from the description in the specification, drawings, claims, etc. Note that the description of these problems does not prevent the existence of other problems. Note that one aspect of the present invention does not need to solve all of these problems. Note that other problems will be apparent from the description in the specification, drawings, claims, etc., and it is possible to extract these other problems from the description in the specification, drawings, claims, etc. Note that the description of these problems does not prevent the existence of other problems. Note that one aspect of the present invention does not need to solve all of these problems. Note that other problems will be apparent from the description in the specification, drawings, claims, etc., and it is possible to extract these other problems from the description in the specification, drawings, claims, etc.

[0007] Note that the description of these problems does not prevent the existence of other problems. Note that one aspect of the present invention does not need to solve all of these problems. Note that other problems will be apparent from the description in the specification, drawings, claims, etc., and it is possible to extract these other problems from the description in the specification, drawings, claims, etc. Note that the description of these problems does not prevent the existence of other problems. Note that one aspect of the present invention does not need to solve all of these problems. Note that other problems will be apparent from the description in the specification, drawings, claims, etc., and it is possible to extract these other problems from the description in the specification, drawings, claims, etc. Note that the description of these problems does not prevent the existence of other problems. Note that one aspect of the present invention does not need to solve all of these problems. Note that other problems will be apparent from the description in the specification, drawings, claims, etc., and it is possible to extract these other problems from the description in the specification, drawings, claims, etc. Note that the description of these problems does not prevent the existence of other problems. Note that one aspect of the present invention does not need to solve all of these problems. Note that other problems will be apparent from the description in the specification, drawings, claims, etc., and it is possible to extract these other problems from the description in the specification, drawings, claims, etc. [Means for Solving the Problems]

[0008] One aspect of the present invention has a terminal, a first base material that supports the terminal, a second base material that has a region overlapping the first base material, a bonding layer that bonds the first base material and the second base material, a display element that is electrically connected to the terminal between the first base material and the second base material, and an insulating layer that contacts the first base material, the second base material, and the bonding layer, and the insulating layer is a display panel having an opening in a region overlapping the display element.

[0009] Also, one aspect of the present invention has a resin layer, and the insulating layer includes a region sandwiched between the bonding layer and the resin layer, and is the above-described display panel.

[0010] Also, one aspect of the present invention is the above-described display panel in which the display element contains a light-emitting organic compound.

[0011] Also, one aspect of the present invention is the above-described display panel in which the first substrate has flexibility and the second substrate has flexibility.

[0012] Also, one aspect of the present invention is the above-described display panel in which the display element contains liquid crystal.

[0013] Also, one aspect of the present invention is a display module having the above-described display panel and a flexible printed circuit board electrically connected to the terminals.

[0014] Also, one aspect of the present invention prepares a processing member having terminals, a first substrate that supports the terminals, a second substrate that includes a region overlapping the first substrate, a bonding layer that bonds the first substrate and the second substrate, and a display element that is electrically connected to the terminals between the first substrate and the second substrate, and includes: a first step of forming a mask in a region overlapping the region where the display element is disposed; a second step of forming an insulating layer in contact with the first substrate, the second substrate, and the bonding layer using atomic layer deposition; and a third step of removing a part of the insulating layer together with the mask, and is a method for manufacturing the above-described display panel.

[0015] In this specification, the EL layer refers to a layer provided between a pair of electrodes of a light-emitting element. Therefore, a light-emitting layer containing an organic compound, which is a light-emitting substance sandwiched between electrodes, is one aspect of the EL layer. ​​​​​​​​​

[0016] In addition, in this specification, when substance A is dispersed in a matrix composed of another substance B, the substance B constituting the matrix is referred to as the host material, and the substance A dispersed in the matrix is referred to as the guest material. Note that each of substance A and substance B may be a single substance or a mixture of two or more substances.

[0017] Note that in this specification, the light-emitting device refers to a display device or a light source (including a lighting device). In addition, a module in which a connector, for example, a flexible printed circuit board (FPC) or a TCP (Tape Carrier Package), is attached to the light-emitting device, a module in which a printed wiring board is provided at the tip of the TCP, or a module in which an IC (integrated circuit) is directly mounted on a substrate on which a light-emitting element is formed by the COG (Chip On Glass) method may be included in the light-emitting device.

[0018] Note that the term "film" and the term "layer" may be interchangeable depending on the case or the situation. For example, the term "conductive layer" may be changed to the term "conductive film". Or, for example, the term "insulating film" may be changed to the term "insulating layer" in some cases.

[0019] In addition, in this specification, one of the first electrode or the second electrode of the transistor refers to the source electrode, and the other refers to the drain electrode.

[0019]

Advantages of the Invention

[0020] ​​According to one aspect of the present invention, a novel display panel excellent in convenience or reliability can be provided. Or, a novel display panel excellent in housing property in a housing can be provided. Or, a novel display panel with suppressed power consumption can be provided. Or, a novel display module or a novel semiconductor device can be provided.

[0021] Note that the description of these effects does not prevent the existence of other effects. Note that one aspect of the present invention does not necessarily have to have all of these effects. Note that other effects will be apparent from the description in the specification, drawings, claims, etc., and it is possible to extract these other effects from the description in the specification, drawings, claims, etc.

Brief Description of Drawings

[0022]

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Embodiments for Carrying Out the Invention

[0023] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and those skilled in the art can easily understand that the form and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention is not construed as being limited to the description of the embodiments shown below. In the configuration of the invention described below, the same reference numerals are commonly used between different drawings for the same part or parts having the same function, and the repeated description thereof will be omitted.

[0024] (Embodiment 1) In this embodiment, the configuration of a display panel according to an aspect of the present invention will be described with reference to the drawings.

[0025] FIG. 2 is a diagram for explaining the configuration of a display panel according to an aspect of the present invention. FIG. 2(A) is a top view of a display panel 200 according to an aspect of the present invention. FIG. 2(B) is a cross-sectional view taken along cutting lines A- B and C-D of FIG. 2(A).

[0026] FIG. 2(C) is a cross-sectional view for explaining the configuration of a display panel 200B having a configuration different from that of the display panel 200 shown in FIG. 2(B).

[0027] <Example configuration 1 of the display panel.> The display panel 200 described in this embodiment includes a terminal 219, a first base material 210 that supports the terminal 219, a second base material 270 having a region overlapping the first base material 210, a bonding layer 205 that bonds the first base material 210 and the second base material 270, a display element 250 that is electrically connected to the terminal 219 between the first base material 210 and the second base material 270, and the first base material 210 ​​​​​, an insulating layer 290 in contact with the second base material 270 and the bonding layer 205. The insulating layer 29 0 has an opening 291 and an opening 295.

[0028] The display panel 200 described in this embodiment includes a first base material 210 that supports a terminal 219 , a second base material 270 that overlaps the first base material 210, and an insulating layer 290 that is in contact with the bonding layer 205 that bonds the first base material 210 and the second base material 27 0. Thus, , the diffusion of impurities into the region surrounded by the insulating layer 290 can be suppressed. As a result, a new display panel with excellent convenience or reliability can be provided.

[0029] In addition, the display panel 200 described in this embodiment has an insulating layer 290 provided with an opening 291 in a region overlapping the region where the display element 250 is disposed. Thus, an insulating layer that suppresses the diffusion of impurities can be provided in other regions without forming a layer that absorbs light emission in the region overlapping the display element 25 0. As a result, a new display panel with excellent reliability and suppressed power consumption can be provided.

[0030] In addition, the display panel 200 has a wiring 211 that is electrically connected to the terminal 219 and the display element 250.

[0031] In addition, the display panel 200 has a drive circuit 203G between the region where the display element 250 is disposed and the end of the first base material 210.

[0032] Note that the display panel 200 described with reference to FIG. 2(B) includes a material (such as gas, liquid, or liquid crystal) different from the bonding layer 205 in a region surrounded by the first base material 210, the second base material 270, and the bonding layer 205.

[0033] On the other hand, the display panel 200B to be described with reference to FIG. 2(C) is different from the display panel 200 to be described with reference to FIG. 2(B) in that the bonding layer 205 fills the space between the display element 250 and the second substrate 270 of 2.

[0034] Incidentally, the display panel 200 has a drive circuit 203G, and the distance L2 from the drive circuit 203G to the end of the first substrate 210 closest thereto is 1.0 mm or less, preferably 0.3 mm or less and greater than 0 mm.

[0035] For example, the display panel 200 has a display element 250 arranged so as to sandwich the drive circuit 203G between the display element 250 and the end of the first substrate 210, and the distance L 1 from the display element 250 to the end of the first substrate 210 closest thereto is 4.0 mm or less, preferably 2 mm or less, more preferably 1.0 mm or less, and greater than 0 m m.

[0036] For example, the display panel 200 has a display element 250, and the distance L3 from the end of the first substrate 210 or the end of the second substrate 270 to the display element 250 closest thereto is less than 3.0 mm, preferably less than 1.5 mm, and greater than 0 mm.

[0037] For example, the display panel 200 has a bonding layer 205, and the longest distance L4 of either the distance from the end of the first substrate 210 overlapping the second substrate 270 to the end of the bonding layer 205 or the distance from the end of the second substrate 270 overlapping the first substrate 210 to the end of the bonding layer 205 is 0.3 mm or more, preferably 0.5 mm or more and less than 10 mm. For example, by using the atomic layer deposition method it is possible to form the insulating layer 290 by wrapping the film-forming material (see FIG. 2(B)). ​​​​

[0038] The individual elements that make up the display panel 200 will be described below. Note that these configurations cannot be clearly separated, and there are cases where one configuration also serves as another configuration or includes a part of another configuration.

[0039] 《Display Panel 200》 The display panel 200 includes a terminal 219, a first base material 210, a second base material 270, a bonding layer 205 , a display element 250, and an insulating layer 290.

[0040] The display panel 200 also includes wiring 211.

[0041] 《First Base Material 210》 At least one of the first base material 210 or the second base material 270 has a light-transmissive region that overlaps with the display element 250.

[0042] The first base material 210 is not particularly limited as long as it has heat resistance sufficient to withstand the manufacturing process and a thickness and size applicable to the manufacturing apparatus.

[0043] An organic material, an inorganic material, a composite material of an organic material and an inorganic material, or the like can be used for the first base material 210. For example, an inorganic material such as glass, ceramics, or metal can be used for the first base material 210.

[0044] Specifically, non-alkali glass, soda-lime glass, potash glass, or crystal glass or the like can be used for the first base material 210. Specifically, an inorganic oxide film, an inorganic nitride film, or an inorganic oxynitride film or the like can be used for the first base material 210. For example, silicon oxide, silicon nitride, silicon oxynitride, an alumina film, or the like can be used for the first base material 210. ​​​​It is possible to use SUS, aluminum, or the like for the first base material 210.

[0045] For example, an organic material such as resin, resin film, or plastic can be used for the first base material 210. Specifically, a resin film or resin plate such as polyester, polyolefin, polyamide, polyimide, polycarbonate, or acrylic resin can be used for the first base material 210.

[0046] For example, a composite material in which a film such as a metal plate, a thin glass plate, or an inorganic material is laminated on a resin film or the like can be used for the first base material 210. For example, a composite material in which fibrous or particulate metal, glass, or inorganic material is dispersed in a resin film can be used for the first base material 210. For example, a composite material in which fibrous or particulate resin or organic material is dispersed in an inorganic material can be used for the first base material 210.

[0047] In addition, a single-layer material or a material in which a plurality of layers are laminated can be used for the first base material 210. For example, a material in which an insulating layer or the like that prevents diffusion of impurities contained in the base material is laminated can be used for the first base material 210. Specifically, a material in which one or more films selected from a silicon oxide layer, a silicon nitride layer, or a silicon oxynitride layer that prevents diffusion of impurities contained in glass are laminated can be applied to the first base material 210. Alternatively, a material in which a silicon oxide film, a silicon nitride film, or a silicon oxynitride film that prevents diffusion of impurities that permeate through the resin is laminated can be applied to the first base material 210.

[0048] A material having flexibility can be used for the first base material 210. For example, when bending It is possible to use a material having flexibility to such an extent that it can be bent or folded. Specifically, a material that can be bent with a radius of curvature of 5 mm or more, preferably 4 mm or more, more preferably 3 mm or more, and particularly preferably 1 mm or more can be used. Also, a material having a thickness of 2.5 μm or more and 3 mm or less, preferably 5 μm or more and 1.5 mm or less, and more preferably 10 μm or more and 500 μm or less can be used for the first base material 210. For example, a laminate including a flexible base material 210b, a barrier film 210a for preventing diffusion of impurities, and an adhesive layer 210c for bonding the base material 210b and the barrier film 210a can be used for the first base material 210.

[0049]

[0050] 《Second base material 270》 The materials that can be used for the first base material 210 can also be used for the second base material 270.

[0051] For example, the second base material 270 includes a flexible base material 270b, a barrier film 270a for preventing diffusion of impurities, and an adhesive layer 270c for bonding the base material 270b and the barrier film 270a.

[0052] 《Bonding layer 205》 Materials that can bond the first base material 210 and the second base material 270 can be used for the bonding layer 205.

[0053] Inorganic materials, organic materials, or composite materials of inorganic materials and organic materials, etc. can be used for the bonding layer 205.

[0054] For example, glass having a melting point of 400 °C or lower, preferably 300 °C or lower can be used for the bonding layer 205. ​

[0055] For example, an organic material such as a heat-meltable resin or a curable resin can be used for the bonding layer 205. This is possible.

[0056] For example, an organic material such as a photocurable adhesive, a reaction-curable adhesive, a thermosetting adhesive, and / or an anaerobic adhesive can be used for the bonding layer 205. This is possible.

[0057] Specifically, an adhesive containing an epoxy resin, an acrylic resin, a silicone resin, a phenolic resin, a polyimide resin, an imide resin, a PVC (polyvinyl chloride) resin, a PVB (polyvinyl butyral) resin, an EVA (ethylene vinyl acetate) resin, etc. can be used. This is possible. This is possible.

[0058] 《Wiring 211, Terminal 219》 A material having conductivity can be used for the wiring 211 or the terminal 219.

[0059] For example, an inorganic conductive material, an organic conductive material, a metal, or a conductive ceramic can be used for the wiring 211 or the terminal 219. This is possible.

[0060] Specifically, a metal element selected from aluminum, gold, platinum, silver, copper, chromium, tantalum, titanium, molybdenum, tungsten, nickel, iron, cobalt, palladium, or manganese can be used for the wiring 211 or the terminal 219. Or, an alloy containing the above-mentioned metal element can be used for the wiring 211 or the terminal 219. Or, an alloy combining the above-mentioned metal elements can be used for the wiring 211 or the terminal 219. This is possible. This is possible. This is possible. This is possible.

[0061] Specifically, conductive oxides such as indium oxide, indium tin oxide, indium zinc oxide, zinc oxide, and zinc oxide doped with gallium can be used for wiring 211 or terminal 219.

[0062] Specifically, a film containing graphene or graphite can be used for wiring 211 or terminal 219.

[0063] For example, a film containing graphene can be formed by forming a film containing graphene oxide and then reducing the film containing graphene oxide. Examples of the reduction method include heating and using a reducing agent.

[0064] Specifically, a conductive polymer can be used for wiring 211 or terminal 219.

[0065] 《Display element 250》 Various display elements can be used for display element 250.

[0066] For example, a display medium whose contrast, brightness, reflectance, transmittance, etc. change due to an electrical or magnetic action can be used for the display element.

[0067] Specifically, an EL (electroluminescence) element (including organic and inorganic EL elements, organic EL elements, inorganic EL elements), LED (white LED, red LED, green LED, blue LED, etc.), transistor (a transistor that emits light according to current), electron emission element, liquid crystal element, electrochromic ink, electrophoretic element, grating light valve (GLV), plasma display panel (PDP), MEMS (micro-electro-mechanical system) Display elements, digital micromirror devices (DMDs), DMSs (digital micro shutters), MIRASOL (registered trademark), IMOD (interference modulation) elements, shutter-type MEMS display elements, optical interference-type MEMS display elements, electro-wetting elements, piezoelectric ceramic displays, display elements using carbon nanotubes, etc. can be used. · modulation) elements, shutter-type MEMS display elements, optical interference-type MEMS display elements, electro-wetting elements, piezoelectric ceramic displays, display elements using carbon nanotubes, etc. can be used. display elements, electro-wetting elements, piezoelectric ceramic displays, display elements using carbon nanotubes, etc. can be used.

[0068] 《Insulating layer 290》 The insulating layer 290 has an opening 291 in a region overlapping the region where the display element 250 is disposed. It also has an opening 295 in a region overlapping the terminal 219.

[0069] For example, a film containing an oxide, nitride, fluoride, ternary compound, or polymer can be formed. It is possible.

[0070] Specifically, materials containing aluminum oxide, hafnium oxide, aluminum silicate, hafnium silicate, lanthanum oxide, silicon oxide, strontium titanate, tantalum oxide, titanium oxide, zinc oxide, niobium oxide, zirconium oxide, tin oxide, yttrium oxide, cerium oxide, scandium oxide, erbium oxide, vanadium oxide, or indium oxide, etc. can be used.

[0071] For example, materials containing aluminum nitride, hafnium nitride, or silicon nitride, etc. can be used. It is possible.

[0072] Note that the display panel 200 and the display panel 200B described with reference to FIG. 2 have openings 2 in the insulating layer 290 so that the surfaces of the first substrate 210 and the second substrate 270 are exposed. Although 91 is provided, it is not limited thereto. As shown in FIG. 3, the display panel 200 and the display panel 200B may be provided with an opening 291 in the insulating layer 290 so that the surface of the second base material 270 is exposed. Further, the display panel 200 and the display panel 200B may be provided with an opening 291 in the insulating layer 290 so that the surface of the first base material 210 is exposed.

[0073] By the way, in the display panel 200 and the display panel 200B, the insulating layer 290 may be provided in a region in contact with the bonding layer 205 as shown in FIG. 1.

[0074] Further, instead of the opening 295, a mask having a function of forming the opening 295 may be provided between the insulating layer 290 and the terminal 219. Specifically, a masking tape or the like can be used as the mask. For example, when connecting the flexible printed circuit board 221 to the display panel, the terminal 219 can be exposed by removing the mask.

[0075] A material having electrical insulation properties or a material having a function of suppressing the diffusion of impurities can be used for the insulating layer 290.

[0076] For example, a material that suppresses the permeation of water vapor can be used for the insulating layer 290. Specifically, a material having a water vapor transmission rate of 10 -5 g / (m 2 ·day) or less, preferably 10 -6 g / (m 2 ·day) or less can be used for the insulating layer 290.

[0077] For example, the atomic layer deposition (ALD: Atomic Layer Deposition) method ​​​​​The material that can be formed using [specific method] can be used for the insulating layer 290.

[0078] By the way, defects such as cracks and pinholes contained in the insulating layer 290 or unevenness in the thickness of the insulating layer 29 0 may promote the diffusion of impurities. When the insulating layer 2 90 is formed using atomic layer deposition, the defects contained in the insulating layer 290 or the unevenness in the thickness of the insulating layer 290 can be reduced Moreover, the insulating layer 290 can be made dense. As a result, an insulating layer 290 that can suppress the diffusion of impurities can be provided.

[0079] When the first substrate 210 or the second substrate 270 is separated from other substrates, fine cracks (also called microcracks) may be formed on the end faces. Specifically, when scribing (also called scribe) is performed and stress is applied so as to concentrate on the scribe, fine cracks may be formed on the end faces of the glass that has been separated. When the insulating layer 290 is formed using atomic layer deposition, it may be possible to close the fine cracks formed on the end faces.

[0080] Also, atomic layer deposition can be used as the method for forming the insulating layer 290. When atomic layer deposition is used, the damage to the processing member can be reduced compared to, for example, plasma CVD and thermal CVD

[0081] By the way, a film containing an inorganic compound having a thickness of 3 nm or more and 200 nm or less, preferably 5 nm or more and 50 nm or less, can be used for the insulating layer 290.

[0082] In particular, using atomic layer deposition having a step of supplying an element containing a precursor and a step of supplying an element containing a radical, an inorganic compound formed with good coverage in mind ​ The film containing the substance can be used for the insulating layer 290. Thereby, impurities such as moisture in the atmosphere and the like can be prevented from touching the bonding layer 205.

[0083] Note that the atomic layer deposition method has a first step of supplying a first element to the surface of the processing substrate, and a second step of supplying a second element that reacts with the first element, and is a film formation method for depositing a reaction product of the first element and the second element on the surface of the processing substrate.

[0084] Note that in the first step, the amount of the first element adsorbed on the surface of the processing substrate is limited based on processing conditions such as temperature. This is also referred to as the condition under which the self-limiting mechanism acts. Thereby, in one cycle including one first step and one second step, a limited amount of the reaction product of the first element and the second element can be deposited.

[0085] For example, by alternately repeating the first step and the second step, a predetermined amount of the reaction product of the first element and the second element can be deposited on the surface of the processing substrate.

[0086] Also, after the first step, a step of discharging the first element that was supplied in excess in the first step may be included.

[0087] Also, after the second step, a step of discharging the second element that was supplied in excess in the second step may be included.

[0088] Specifically, in the first step, the processing substrate is disposed, and the first element is supplied to a reaction chamber prepared in a predetermined environment. Thereby, the first element is adsorbed on the surface of the processing substrate. .

[0089] Next, while supplying purge gas, the excess first element remaining in the reaction chamber is exhausted.

[0090] In a second step, a second element is supplied. Thereby, the first element adsorbed on the surface of the processed substrate reacts with the second element, and a reaction product is deposited on the surface of the processed substrate. The deposited first element reacts with the second element, and a reaction product is deposited on the surface of the processed substrate.

[0091] Next, while supplying purge gas, the excess second element remaining in the reaction chamber is exhausted.

[0092] Thereafter, the first step and the second step are repeated to deposit a predetermined amount of reaction product on the surface of the processed substrate. A reaction product is deposited.

[0093] Precursors (also referred to as precursors) selected according to the type of reaction product to be deposited can be used as the first element. Specifically, volatile organometallic compounds, metal alkoxides, etc. can be used as the first element. Specifically, volatile organometallic compounds, metal alkoxides, etc. can be used as the first element. The precursors vaporized using a vaporizer (also referred to as a vaporizer or bubbling device) can be used as the first element.

[0094] In addition, materials containing a plurality of elements can be used as the first element. Also, in the repeated first step, different materials can be used as the first element. The precursors vaporized using a vaporizer (also referred to as a vaporizer or bubbling device) can be used as the first element.

[0095] In addition, materials containing a plurality of elements can be used as the first element. Also, in the repeated first step, different materials can be used as the first element. In the repeated first step, different materials can be used as the first element.

[0096] For example, various materials that react with the first element, selected according to the type of reaction product to be deposited and the first element, can be used as the second element. For example, materials that contribute to an oxidation reaction, materials that contribute to a reduction reaction, materials that contribute to an addition reaction, materials that contribute to a decomposition reaction For example, various materials that react with the first element, selected according to the type of reaction product to be deposited and the first element, can be used as the second element. For example, materials that contribute to an oxidation reaction, materials that contribute to a reduction reaction, materials that contribute to an addition reaction, materials that contribute to a decomposition reaction Materials that contribute to an oxidation reaction, materials that contribute to a reduction reaction, materials that contribute to an addition reaction, materials that contribute to a decomposition reaction Materials or materials contributing to the hydrolysis reaction can be used for the second element.

[0097] In addition, plasma can be used for the second element. Specifically, oxygen radicals or nitrogen radicals etc. can be used for the second element. Thereby, the reaction rate with the first element can be increased. As a result, the rise in temperature of the processed substrate can be suppressed. Also the film formation time can be shortened.

[0098] <Configuration Example 2 of Display Panel.> Another configuration of the display panel according to an aspect of the present invention will be described with reference to FIG. 4.

[0099] FIG. 4 is a diagram for explaining the configuration of the display panel according to an aspect of the present invention. FIG. 4(A) is a top view of the display panel 200C according to an aspect of the present invention. Also, FIG. 4(B) is a cross-sectional view taken along the cutting lines A -B and C-D of FIG. 4(A). -B and C-D of FIG. 4(A).

[0100] Also, FIG. 4(C) is a cross-sectional view for explaining the configuration of the display panel 200D having a configuration different from that of the display panel 200C shown in FIG. 4(B).

[0101] Note that the display panel 200C is different from the display panel 200 described with reference to FIG. 2 in that the positions of the openings in the insulating layer 290 are different. Here, different configurations will be described in detail and the parts where the same configurations can be used will refer to the above description.

[0102] The display panel 200C described in the present embodiment is the above-described display panel in which the insulating layer 290 has the opening 292 and the opening 295. Also, the substrates 210b and 270b have flexibility.

[0103] The display panel 200C described in this embodiment has an opening 292 in a region where the insulating layer 290 overlaps with the wiring 211. As a result, the flexibility at the position of the opening 292 of the display panel 200C can be enhanced compared to other regions. As a result, a novel display panel excellent in housing property or reliability can be provided.

[0104] 《Display Panel 200C》 The display panel 200C includes a terminal 219, a first base material 210, a second base material 270, a bonding layer 20 5, a display element 250, and an insulating layer 290.

[0105] The display panel 200C also has a wiring 211.

[0106] The insulating layer 290 has an opening 292 in a region overlapping with the wiring 211.

[0107] Note that the insulating layer 290 may have an opening 292 in a region overlapping with a part of the region where the display element 250 is disposed. For example, the opening 292 may be provided in a strip shape including a line that bisects the region where the display element 250 is disposed (see FIG. 4(B)). Further, for example, the opening 292 may be provided in a strip shape including a line that trisects the region where the display element 250 is disposed.

[0108] <Configuration Example 3 of Display Panel.> Another configuration of the display panel according to an aspect of the present invention will be described with reference to FIG. 5.

[0109] FIG. 5 is a diagram for explaining the configuration of the display panel according to an aspect of the present invention. FIG. 5(A) is a top view of a display panel 200E according to an aspect of the present invention. Further, FIG. 5(B) is a cross-sectional view taken along cutting lines A -B and C-D in FIG. 5(A).

[0110] In addition, FIG. 5(C) is a cross-sectional view for explaining the configuration of a display panel 200F having a configuration different from that of the display panel 200E shown in FIG. 5(B).

[0111] Note that the display panel 200E is different from the display panel 200 described with reference to FIG. 2 in that it has a resin layer 298. Here, different configurations will be described in detail, and parts where the same configuration can be used will be incorporated by reference to the above description.

[0112] The display panel 200E described in this embodiment is the above-described display panel having a resin layer 298. The insulating layer 290 includes a region sandwiched between the bonding layer 205 and the resin layer 298.

[0113] The display panel 200E described in this embodiment includes an insulating layer 290 sandwiched between the bonding layer 205 and the resin layer 298. Thereby, various stresses can be dispersed, and destruction of the insulating layer due to stress concentration can be prevented. As a result, a novel display module excellent in convenience or reliability can be provided.

[0114] 《Display Panel 200E》 The display panel 200E has a resin layer 298, terminals 219, a first base material 210, a second base material 270, a bonding layer 205, a display element 250, and an insulating layer 290.

[0115] In addition, the display panel 200E has wirings 211.

[0116] 《Resin Layer 298》 The display panel 200E has a resin layer 298 arranged such that the insulating layer 290 has a region sandwiched between it and the bonding layer 205.

[0117] ​​​​​​​​​​For example, a material similar to the material that can be used for the bonding layer 205 is used for the resin layer 298. This can be done.

[0118] Note that this embodiment can be appropriately combined with other embodiments shown in this specification. This is possible.

[0119] (Embodiment 2) In this embodiment, the configuration of the display module according to one aspect of the present invention will be described with reference to FIGS. 6 and 7. This will be described while referring to FIGS. 6 and 7.

[0120] FIG. 6 is a diagram for explaining the configuration of the display module according to one aspect of the present invention. FIG. 6(A) is a top view of the display module 200M according to one aspect of the present invention. Further, FIG. 6(B) is a cross-sectional view taken along the cutting lines A-B and C-D in FIG. 6(A). This is a top view of the display module 200M according to one aspect of the present invention. Further, FIG. 6(B) is a cross-sectional view taken along the cutting lines A-B and C-D in FIG. 6(A). This is a cross-sectional view taken along the cutting lines A-B and C-D in FIG. 6(A).

[0121] Further, FIG. 6(C) is a cross-sectional view for explaining the configuration of the display module 200MB having a configuration different from that of the display module 200M shown in FIG. 6(B). This is a cross-sectional view for explaining the configuration of the display module 200MB having a configuration different from that of the display module 200M shown in FIG. 6(B).

[0122] <Configuration Example 1 of the Display Module.> The display module 200M described in this embodiment includes a terminal 219, a first base material 210 that supports the terminal 219, a second base material 270 having a region overlapping the first base material 210, a bonding layer 205 that bonds the first base material 210 and the second base material 270, a display element 250 that is electrically connected to the terminal 219 between the first base material 210 and the second base material 270, a flexible printed circuit board 221 that is electrically connected to the terminal 219, and an insulating layer 290 that contacts the first base material 210, the second base material 270, and the bonding layer 205. This is a cross-sectional view for explaining the configuration of the display module 200MB having a configuration different from that of the display module 200M shown in FIG. 6(B). This is a cross-sectional view for explaining the configuration of the display module 200MB having a configuration different from that of the display module 200M shown in FIG. 6(B). This is a cross-sectional view for explaining the configuration of the display module 200MB having a configuration different from that of the display module 200M shown in FIG. 6(B). This is a cross-sectional view for explaining the configuration of the display module 200MB having a configuration different from that of the display module 200M shown in FIG. 6(B). This is a cross-sectional view for explaining the configuration of the display module 200MB having a configuration different from that of the display module 200M shown in FIG. 6(B).

[0123] The display module 200M described in this embodiment includes a first base material that supports the terminal 219 210, a second base material 270 that overlaps the first base material 210, and an insulating layer 290 that contacts a bonding layer 205 for bonding the first base material 210 and the second base material 270, and a flexible printed circuit board 221 that is electrically connected to the terminal 219. Thereby, diffusion of impurities into the region surrounded by the insulating layer 2 90 can be suppressed. As a result, a novel display module excellent in convenience or reliability can be provided.

[0124] Further, the display module 200M has a wiring 211 that is electrically connected to the terminal 219 and the display element 250.

[0125] Note that the display module 200M described with reference to FIG. 6(B) has a region containing a material different from the bonding layer 205 between the display element 250 and the second base material 270. For example, it has a region containing a gas

[0126] On the other hand, the display module 200MB described with reference to FIG. 6(C) is different from the display module 200M described with reference to FIG. 6(B) in that it has a bonding layer 205 between the display element 25 0 and the second base material 270.

[0127] Note that the display module 200M is different from the display panel 200 described with reference to FIG. 2 in that it has a flexible printed circuit board 221 and an anisotropic conductive film 222. Here, different configurations will be described in detail, and parts where the same configurations can be used will be incorporated by reference to the above description.

[0128] 《Flexible Printed Circuit Board 221》 The flexible printed circuit board 221 includes wiring that is electrically connected to the terminal 219 and a The wiring has a substrate and a covering layer having an area overlapping the wiring. and a region that does not overlap with the coating layer.

[0129] The area that does not overlap with the wiring coating layer is used as the terminal of the flexible printed circuit board 221. It is possible.

[0130] A conductive material can be used for the wiring of the flexible printed circuit board 221 . For example, the material that can be used for the wiring 211, etc. is used for the wiring of the flexible printed circuit board 221. It can be used for the wire. Specifically, copper or the like can be used.

[0131] The insulating region is provided with a material in the region that contacts the wiring of the flexible printed circuit board 221. It can be used as a base material for the flexible printed circuit board 221.

[0132] For example, organic materials such as resins, resin films, or plastics can be used as the substrate. Specifically, polyester, polyolefin, polyamide, polyimide, polycarbonate, A resin layer, a resin film or a resin plate made of carbonate or acrylic resin is used as the substrate. The glass transition temperature is 150° C. or more, preferably 200° C. or more, and more preferably 2 Stretched films at 50° C. or higher can be used as the substrate.

[0133] The anisotropic conductive film 222 electrically connects the flexible printed circuit board 221 and the terminal 219. It can be used as a connecting material. For example, it can be a material containing conductive particles and resin. The material can be used for the anisotropic conductive film 222. The terminal 221 and the terminal 219 can be electrically connected using conductive particles or the like.

[0134] <Configuration Example 2 of the Display Module.> Another configuration of the display module according to one aspect of the present invention will be described with reference to FIG. 7.

[0135] FIG. 7 is a diagram for explaining the configuration of the display module according to one aspect of the present invention. FIG. 7(A) is a top view of the display module 200MC according to one aspect of the present invention. Further, FIG. 7(B) is a cross-sectional view taken along the cutting lines A-B and C-D in FIG. 7(A). It is a top view of the display module 200MC according to one aspect of the present invention. Also, FIG. 7(B) is a cross-sectional view taken along the cutting lines A-B and C-D in FIG. 7(A). It is a cross-sectional view taken along the cutting lines A-B and C-D in FIG. 7(A).

[0136] Further, FIG. 7(C) is a cross-sectional view for explaining the configuration of the display module 200MD having a configuration different from that of the display module 200MC shown in FIG. 7(B). It is a cross-sectional view for explaining the configuration of the display module 200MD having a configuration different from that of the display module 200MC shown in FIG. 7(B).

[0137] Note that the display module 200MC is different from the display module 200M described with reference to FIG. 6 in that it has a resin layer 298. Here, different configurations will be described in detail, and parts where the same configurations can be used will be incorporated by reference to the above description. Here, different configurations will be described in detail, and parts where the same configurations can be used will be incorporated by reference to the above description. Here, different configurations will be described in detail, and parts where the same configurations can be used will be incorporated by reference to the above description.

[0138] The display module 200MC described in the present embodiment is the above-described display module having a resin layer 298. And the insulating layer 290 includes a region sandwiched between the bonding layer 205 and the resin layer 298. And the insulating layer 290 includes a region sandwiched between the bonding layer 205 and the resin layer 298. It includes a region sandwiched between the bonding layer 205 and the resin layer 298.

[0139] The display module 200MC described in the present embodiment is configured to include an insulating layer 290 sandwiched between the bonding layer 205 and the resin layer 298. Thereby, various stresses can be dispersed, and destruction of the insulating layer due to stress concentration can be prevented. As a result, a new display module excellent in convenience or reliability can be provided. Thereby, various stresses can be dispersed, and destruction of the insulating layer due to stress concentration can be prevented. Thereby, various stresses can be dispersed, and destruction of the insulating layer due to stress concentration can be prevented. As a result, a new display module excellent in convenience or reliability can be provided.

[0140] 《Display Module 200MC》 The display module 200MC includes a resin layer 298, terminals 219, a first base material 210, a second base material 270, a bonding layer 205, a display element 250, a flexible printed circuit board 221 or an insulating layer 290.

[0141] Also, the display module 200MC has wirings 211.

[0142] 《Resin Layer 298》 The resin layer 298 is arranged such that the insulating layer 290 has a region sandwiched between it and the bonding layer 205. The resin layer 298 has.

[0143] For example, a material similar to the material that can be used for the bonding layer 205 can be used for the resin layer 298. This can be done.

[0144] Note that this embodiment can be appropriately combined with other embodiments shown in this specification. This can be done.

[0145] (Embodiment 3) In this embodiment, a method for manufacturing a display panel according to an aspect of the present invention will be described with reference to FIGS. 8 to 1 11.

[0146] FIG. 8 is a flowchart for explaining a method for manufacturing a display panel according to an aspect of the present invention.

[0147] FIG. 9 is a diagram for explaining a method for manufacturing a display panel according to an aspect of the present invention. FIGS. 9(A) to 9(C) are cross-sectional views of the display panel during the manufacturing process.

[0148] <Example 1 of the Method for Manufacturing a Display Panel> The method for manufacturing a display panel described in this embodiment has the following three steps (see FIG. 8).

[0149] "The First Step" In the first step, prepare a processing member having a terminal 219, a first base material 210 that supports the terminal 219, a second base material 270 having a region overlapping the first base material 210, a bonding layer 205 that bonds the first base material 210 and the second base material 270, and a display element 250 that is electrically connected to the terminal 219 between the first base material 210 and the second base material 270, and form a mask 223 so as to be in contact with each of the first base material 210 and the second base material 270 in a region overlapping the region where the display element 250 is disposed (see FIGS. 8(S1) and 9(A)). A second base material 270 having a region overlapping the first base material 210, a bonding layer 205 that bonds the first base material 210 and the second base material 270, and a display element 250 that is electrically connected to the terminal 219 between the first base material 210 and the second base material 270 are prepared, and a mask 223 is formed so as to be in contact with each of the first base material 210 and the second base material 270 in a region overlapping the region where the display element 250 is disposed (see FIGS. 8(S1) and 9(A)). A bonding layer 205 that bonds the first base material 210 and the second base material 270, and a display element 250 that is electrically connected to the terminal 219 between the first base material 210 and the second base material 270 are prepared, and a mask 223 is formed so as to be in contact with each of the first base material 210 and the second base material 270 in a region overlapping the region where the display element 250 is disposed (see FIGS. 8(S1) and 9(A)). A display element 250 that is electrically connected to the terminal 219 between the first base material 210 and the second base material 270 is prepared, and a mask 223 is formed so as to be in contact with each of the first base material 210 and the second base material 270 in a region overlapping the region where the display element 250 is disposed (see FIGS. 8(S1) and 9(A)). A mask 223 is formed so as to be in contact with each of the first base material 210 and the second base material 270 in a region overlapping the region where the display element 250 is disposed (see FIGS. 8(S1) and 9(A)). (See FIGS. 8(S1) and 9(A)).

[0150] In addition, in the first step, a mask 224 may be formed in a region overlapping the terminal 219. It is also acceptable.

[0151] "The Second Step" In the second step, using the atomic layer deposition method, form an insulating layer 290 that contacts the first base material 210, the second base material 270, the bonding layer 205, and the terminal 219 (see FIG. 8(S2)). An insulating layer 290 that contacts the first base material 210, the second base material 270, the bonding layer 205, and the terminal 219 is formed using the atomic layer deposition method (see FIG. 8(S2)). .

[0152] In addition, when the mask 224 covers all the surfaces where the terminal 219 is exposed, the insulating layer 290 is not formed on the terminal 219 in the second step. In the second step, the insulating layer 290 is not formed on the terminal 219 when the mask 224 covers all the surfaces where the terminal 219 is exposed.

[0153] By the way, defects such as cracks and pinholes in the insulating layer 290 or unevenness in the thickness of the insulating layer 290 may promote the diffusion of impurities. When the insulating layer 290 is formed using the atomic layer deposition method, the defects included in the insulating layer 290 or the unevenness in the thickness of the insulating layer 290 can be reduced. Also, the insulating layer 290 can be made dense. As a result, an insulating layer 290 that can suppress the diffusion of impurities can be provided. When the insulating layer 290 is formed using the atomic layer deposition method, the defects included in the insulating layer 290 or the unevenness in the thickness of the insulating layer 290 can be reduced. Also, the insulating layer 290 can be made dense. As a result, an insulating layer 290 that can suppress the diffusion of impurities can be provided. When the insulating layer 290 is formed using the atomic layer deposition method, the defects included in the insulating layer 290 or the unevenness in the thickness of the insulating layer 290 can be reduced. Also, the insulating layer 290 can be made dense. As a result, an insulating layer 290 that can suppress the diffusion of impurities can be provided. When the insulating layer 290 is formed using the atomic layer deposition method, the defects included in the insulating layer 290 or the unevenness in the thickness of the insulating layer 290 can be reduced. Also, the insulating layer 290 can be made dense. As a result, an insulating layer 290 that can suppress the diffusion of impurities can be provided. As a result, an insulating layer 290 that can suppress the diffusion of impurities can be provided.

[0154] When the first substrate 210 or the second substrate 270 is separated from other substrates, fine cracks (microcracks 225) may be formed on the end face. Specifically, scribing (also called scribe) is performed, stress is applied so as to concentrate on the scribe, and separation (also called break) is performed. Fine cracks may be formed on the end face of the glass obtained by this method. When the insulating layer 290 is formed using the atomic layer deposition method, there are cases where the fine cracks formed on the end face can be closed (see Fig. 9(B)). For example, using the film forming apparatus 190 described in Embodiment 4, the insulating layer 290 can be formed by the atomic layer deposition method.

[0155]

[0156] 《Third Step》 In the third step, a part of the insulating layer 290 is removed together with the mask 223, and an opening 291 is formed in the region overlapping the display element 250 of the insulating layer 290 (see Fig. 8(S3) and Fig. 9 (B)).

[0157] When the mask 224 overlaps on the terminal 219, in the third step, a part of the insulating layer 290 is removed together with the mask 224, and an opening 295 is formed in the region overlapping the terminal 219 of the insulating layer 290.

[0158] The method for manufacturing the display panel described in this embodiment includes a first step of forming a mask 223 in a region overlapping the display element 250, a second step of forming the insulating layer 290 using the atomic layer deposition method, and a third step of forming an opening 291 in the region of the insulating layer 290 overlapping the display element 250. Thereby, an opening is provided in the region overlapping the display element. An insulating layer can be formed. As a result, a novel display panel with excellent reliability can be fabricated. A method can be provided.

[0159] <Modification example of the method for fabricating a display panel> The method for fabricating a display panel described in this embodiment has a fourth step in addition to the above steps. It has.

[0160] <<Fourth step>> In the fourth step, the resin layer 298 is formed such that the region sandwiched between the bonding layer 205 and the resin layer 298 is formed into the insulating layer 290 (see FIG. 9(C)). (See FIG. 9(C)).

[0161] <Example 2 of the method for fabricating a display panel> Another example of the method for fabricating a display panel according to an aspect of the present invention will be described with reference to FIG. 10. It will be described.

[0162] FIG. 10 is a diagram for explaining the method for fabricating a display panel according to an aspect of the present invention. FIGS. 10(A) and 10(B) are cross-sectional views of the display panel during the fabrication process. It is.

[0163] Note that the fabrication method described with reference to FIG. 10 is different from the fabrication method described with reference to FIG. 9 in that the region where the mask 223 is formed is different. Here, the differences will be described in detail, and the parts where the same fabrication method can be applied will refer to the above description. It is different from the fabrication method described with reference to FIG. 9. Here, the differences will be described in detail, and the parts where the same fabrication method can be applied will refer to the above description. It will be described in detail, and the parts where the same manufacturing method can be applied will refer to the above description.

[0164] <<First step>> In the first step, the terminal 219, the first base material 210 that supports the terminal 219, the second base material 270 having a region overlapping the first base material 210, the bonding layer 205 that bonds the first base material 210 and the second base material 270, and the terminal 2 between the first base material 210 and the second base material 270. 0 and the terminal 2 Prepare a processing member having a display element 250 that is electrically connected to 19, and overlap the wiring 211 In a region where they overlap, a mask 223 is formed so as to be in contact with each of the first base material 210 and the second base material 270 (see FIGS. 8(S1) and 10(A)).

[0165] Note that in the first step, the mask 223 may be formed in a region that overlaps a part of the region where the display element 250 is disposed. For example, the mask 223 may be formed in a strip shape including a line that bisects the region where the display element 250 is disposed (see FIG. 10(A)). Also, for example, the mask 223 may be formed in a strip shape including a line that trisects the region where the display element 250 is disposed (see FIG. 10(A)). Also, for example, the mask 223 may be formed in a strip shape including a line that trisects the region where the display element 250 is disposed (see FIG. 10(A)). Also, for example, the mask 223 may be formed in a strip shape including a line that trisects the region where the display element 250 is disposed (see FIG. 10(A)). Also, for example, the mask 223 may be formed in a strip shape including a line that trisects the region where the display element 250 is disposed .

[0166] Further, the cross-sectional shape of the mask 223 is not limited to a rectangle. By using a mask 223 in which the angle formed by the side surface of the mask 223 and the surface of another film (here, the first base material and the second base material) is 90° or more in the cross-section of the portion where the end of the mask 223 contacts the other film, the end of the insulating layer 29 0 can be made into a tapered shape. As a result, the adhesion of the insulating layer 290 can be improved . For example, the cross-sectional shape of the mask 223 may be circular or oval (see FIGS 11(A) and 11(B)). 11(A) and 11(B)). .

[0167] Note that this embodiment can be appropriately combined with other embodiments shown in this specification .

[0168] (Embodiment 4) In this embodiment, a film forming apparatus that can be used for manufacturing a display module according to one aspect of the present invention will be described with reference to FIGS. 12 and 13 .

[0169] FIG. 12 is a cross-sectional view for explaining a film forming apparatus 190 that can be used in manufacturing a display module according to an aspect of the present invention.

[0170] FIG. 13(A) is a perspective view of a processing member 10 that can be used in manufacturing a display module according to an aspect of the present invention.

[0171] FIG. 13(B) is a view for explaining a state in which a processing member 10 is supported by a support 186 and can be used in manufacturing a display module according to an aspect of the present invention.

[0172] <Configuration example of film forming apparatus 190> The film forming apparatus 190 described in this embodiment includes a film forming chamber 180 and a control unit 182 connected to the film forming chamber 180.

[0173] The control unit 182 includes a control device (not shown) that supplies a control signal and flow controllers 182a, 182b, and 182c to which the control signal is supplied. For example, a high-speed valve can be used as the flow controller. Specifically, by using a valve for ALD or the like, the flow rate can be precisely controlled. Further, it has a heating mechanism 182h for controlling the temperature of the flow controller and the piping.

[0174] The flow controller 182a is supplied with a control signal, a first raw material, and an inert gas, and has a function of supplying the first raw material or the inert gas based on the control signal.

[0175] The flow controller 182b is supplied with a control signal, a second raw material, and an inert gas, and has a function of supplying the second raw material or the inert gas based on the control signal.

[0176] ​​​​​​​​​​The flow controller 182c is supplied with a control signal and has a function of connecting to the exhaust device 185 based on the control signal. It has subsequent functions.

[0177] 《Raw material supply section》 In addition, the raw material supply section 181a has a function of supplying the first raw material and is connected to the flow controller 182a. It is connected.

[0178] The raw material supply section 181b has a function of supplying the second raw material and is connected to the flow controller 182b. It is connected.

[0179] A vaporizer or heating means or the like can be used for the raw material supply section. Thereby, a gaseous raw material can be generated from a solid raw material or a liquid raw material. It can generate a gaseous raw material from a solid raw material or a liquid raw material.

[0180] Note that the raw material supply section is not limited to two, and it can have three or more raw material supply sections.

[0181] 《Raw materials》 Various materials can be used for the first raw material.

[0182] For example, a volatile organometallic compound, a metal alkoxide, etc. can be used for the first raw material. It can be used.

[0183] Various materials that react with the first raw material can be used for the second raw material. For example, materials contributing to an oxidation reaction, materials contributing to a reduction reaction, materials contributing to an addition reaction, materials contributing to a decomposition reaction or materials contributing to a hydrolysis reaction, etc. can be used for the second raw material. It can be used.

[0184] In addition, a material containing radicals can be used for the second raw material. For example, a material is supplied to a plasma source, and the material in a plasma state can be used for the second raw material. Specifically, oxygen is used. Radicals, nitrogen radicals, etc. can be used as the second raw material.

[0185] Also, the second raw material is preferably a raw material that reacts with the first raw material at a temperature close to room temperature. For example , a material with a reaction temperature of room temperature or higher and 200°C or lower, preferably 50°C or higher and 150°C or lower, is preferred.

[0186] 《Exhaust device 185》 The exhaust device 185 has a function of exhausting and is connected to the flow controller 182c. Note that it may also have a trap for capturing the discharged material between the discharge port 184 and the flow controller 182c.

[0187] 《Control unit 182》 The control device supplies a control signal for controlling the flow controller or a control signal for controlling the heating mechanism, etc. For example, in the first step, the first raw material is supplied to the surface of the processing substrate. And in the second step, the second raw material that reacts with the first raw material is supplied. As a result the first raw material reacts with the second raw material, and the reaction product can be deposited on the surface of the processing member 10.

[0188] Note that the amount of the reaction product deposited on the surface of the processing member 10 can be controlled by repeating the first step and the second step.

[0189] Note that the amount of the first raw material supplied to the processing member 10 is limited by the amount that the surface of the processing member 10 can adsorb. For example, the conditions for forming a monomolecular layer of the first raw material on the surface of the processing member 10 are selected, and the second raw material is reacted with the formed monomolecular layer of the first raw material to form a layer containing a very uniform reaction product of the first raw material and the second raw material. ​​​​​​​​

[0190] As a result, various materials can be formed into a film on the surface of the processing member 10 having a complex structure on the surface. For example, a film having a thickness of 3 nm or more and 200 nm or less can be formed on the processing member 1 0.

[0191] For example, when small holes called pinholes are formed on the surface of the processing member 10 , the film forming material can be wrapped inside the pinholes to fill the pinholes.

[0192] In addition, the excess first raw material or second raw material is discharged from the film forming chamber 180 using the exhaust device 185. For example, it may be exhausted while introducing an inert gas such as argon or nitrogen.

[0193] 《Film Forming Chamber 180》 The film forming chamber 180 includes an inlet 183 to which the first raw material, the second raw material, and the inert gas are supplied , and an outlet 184 for discharging the first raw material, the second raw material, and the inert gas.

[0194] The film forming chamber 180 includes a support 186 having a function of supporting one or a plurality of processing members 10 , a heating mechanism 187 having a function of heating the processing member, and a door 188 having a function of opening and closing a region for loading and unloading the processing member 10.

[0195] For example, a resistance heater or an infrared lamp can be used for the heating mechanism 187.

[0196] The heating mechanism 187 has a function of heating, for example, to 80 °C or higher, 100 °C or higher, or 150 °C or higher.

[0197] Incidentally, the heating mechanism 187 heats the processing member 10 to a temperature of, for example, room temperature or higher and 200°C or lower, preferably 50°C or higher and 1 50°C or lower.

[0198] The film forming chamber 180 also has a pressure regulator and a pressure detector.

[0199] 《Support 186》 The support 186 supports the processing member 10.

[0200] For example, a state in which six processing members 10 are supported using seven supports 186 is shown in FIGS. 1 2 and 13(B).

[0201] The support 186 is, for example, larger in outer shape than the region where the display element 250 is arranged and is smaller than the processing member 10 and smaller than the processing member 10.

[0202] Examples of materials used for the support 186 include plastics, metals, alloys, paper, glass and the like. Further, by using a material having a weak adhesiveness on the surface (for example, a micro-adhesive sheet, a silicone sheet, a rubber sheet, etc.), the support 186 can be arranged on the processing member 10 without a gap between them.

[0203] Another support 186 can be placed on one processing member 10 supported by one support 186, and another processing member 10 can be supported using the other support 186. By alternately stacking the supports 186 and the processing members 10 in this way, a plurality of processing members can be prepared in the film forming chamber 180 in this way. This is possible.

[0204] Using a support 186 smaller than the outer shape of the processing member 10, the processing member 10 is arranged so that the end portion protrudes outside the support 186 so that the end portion of the processing member 10 and the original material on its side surface The material can be supplied uniformly (see Fig. 13(B)).

[0205] Also, the end of the processing member 10 is arranged away from the wall surface of the film forming chamber 180. For example, the distance from the end of the processing member 10 to the wall surface of the film forming chamber 180 is made larger than the interval between one processing member 10 and another processing member 10. Thereby, the raw material can be supplied uniformly.

[0206] The support 186 may be configured to be individually arranged, or may be provided with a beam portion connecting a plurality of supports 186 .

[0207] By the way, a mask 186a may be placed at a position overlapping the terminal 219. The mask 186a may be configured to be individually arranged, or may be configured to be connected to one support 186 . Examples of the material used for the mask 186a include the same material as the support 186 .

[0208] In addition, as shown in Fig. 13(C), instead of the support 186, a support 186B having a circular or oval cross section may be used. Examples of the material used for the support 186B include plastic, metal, alloy, glass, etc. .

[0209] By the way, as shown in Figs. 26 and 27, instead of the support 186, a separate film 196 may be used. The separate film 196 is arranged above and below the processing member 10 . The separate film 196 has a function of protecting the surface of the processing member 10. The separate film 196 may coincide with the outer shape of the processing member 10. Also, the separate film 196 is processed so as to be smaller than the outer shape of the processing member 10, and the separate film ​​​​The end of the processed member 10 may be arranged to protrude outside the roll 196 (see FIG. 26(A)). The processed member 10 shown in FIG. 26(A) is a first base material 210, a second base material 270, and a bonding A laminate 205, wiring 211 including terminals, a display element 250, and a separate film 196. and a colored layer 845. A plurality of processed members 10 are stacked to form an insulating layer 290 (see FIG. 26(B)), and then by removing the separation film 196, the result is as shown in FIG. As shown, an insulating layer is formed on the first substrate 210, the second substrate 270, and the bonding layer 205 in the region in contact with the first substrate 210, the second substrate 270, and the bonding layer 205. The layer 290 can be formed. Also, the separation film 196 and the processing member 10 can form the opening 1 99, the uppermost and lowermost separate layers of the multiple stacked processed members 10 A support 186 may be provided at a position overlapping with the film 196 (see FIG. 27(A)). As shown in FIG. 7(A), after the support 186 is provided, an insulating layer 290 is formed. 27(C) is removed, and the separation film 196 is removed. As shown in FIG. 1, an insulating layer 290 is formed only on the side of the workpiece 10 having the opening 199. In addition, in FIG. 26(B), FIG. 27(A), and FIG. 2 and a part of the second base material 270 are omitted.

[0210] <Membrane example> A film that can be formed using the film forming apparatus 190 described in this embodiment will be described. Reveal.

[0211] For example, oxides, nitrides, fluorides, sulfides, ternary compounds, metals or polymers. A film can be formed.

[0212] For example, materials containing aluminum oxide, hafnium oxide, aluminum silicate, hafnium silicate, lanthanum oxide, silicon oxide, strontium titanate, tantalum oxide, titanium oxide, zinc oxide, niobium oxide, zirconium oxide, tin oxide, yttrium oxide, cerium oxide, scandium oxide, erbium oxide, vanadium oxide, indium oxide, etc. can be used. For example, materials containing aluminum nitride, hafnium nitride, silicon nitride, tantalum nitride, titanium nitride, niobium nitride, molybdenum nitride, zirconium nitride, gallium nitride, etc. can be used. For example, materials containing copper, platinum, ruthenium, tungsten, iridium, palladium, iron, cobalt, nickel, etc. can be used. For example, materials containing zinc sulfide, strontium sulfide, calcium sulfide, lead sulfide, calcium fluoride, strontium fluoride, zinc fluoride, etc. can be used.

[0213] For example, materials containing titanium and aluminum nitride, titanium and aluminum oxide, aluminum and zinc oxide, manganese and zinc sulfide, cerium and strontium sulfide, erbium and aluminum oxide, yttrium and zirconium oxide, etc. can be used.

[0214] For example, materials containing copper, platinum, ruthenium, tungsten, iridium, palladium, iron, cobalt, nickel, etc. can be used.

[0215] For example, materials containing zinc sulfide, strontium sulfide, calcium sulfide, lead sulfide, calcium fluoride, strontium fluoride, zinc fluoride, etc. can be used.

[0216] For example, materials containing titanium and aluminum nitride, titanium and aluminum oxide, aluminum and zinc oxide, manganese and zinc sulfide, cerium and strontium sulfide, erbium and aluminum oxide, yttrium and zirconium oxide, etc. can be used.

[0217] "Film Containing Aluminum Oxide" For example, a gas obtained by vaporizing a material containing an aluminum precursor compound can be used as the first raw material. ​​​​​​​​It is possible. Specifically, trimethylaluminum (TMA, chemical formula: Al(CH 3 ) 3 ) or tris(dimethylamido)aluminum, triisobutylaluminum, aluminum tris(2,2,6,6-tetramethyl-3,5-heptanedionate), etc. can be used. It is possible.

[0218] Water vapor (chemical formula: H 2 O) can be used as the second raw material.

[0219] Using the film forming apparatus 190, a film containing aluminum oxide can be formed from the above-mentioned first raw material and second raw material. It is possible.

[0220] 《Film Containing Hafnium Oxide》 For example, a gas obtained by vaporizing a material containing a hafnium precursor compound can be used as the first raw material. Specifically, tetrakis(dimethylamido)hafnium (TDMAH, chemical formula: H f[N(CH 3 ) 2 ) 4 ) or a material containing hafnium amide such as tetrakis(ethylmethylamido)hafnium can be used. It is possible.

[0221] Ozone can be used as the second raw material.

[0222] 《Film Containing Tungsten》 For example, WF 6 gas can be used as the first raw material.

[0223] B 2 H 6 gas or SiH 4 gas, etc. can be used as the second raw material.

[0224] Note that this embodiment can be appropriately combined with other embodiments described in this specification. It can be.

[0225] (Embodiment 5) In this embodiment, a configuration example of a transistor applicable to pixels of a display module described later will be described with reference to the drawings. It will be described with reference to the drawings.

[0226] <Configuration Example of Transistor> FIG. 14(A) shows a schematic top view of a transistor 100 exemplified below. Also, FIG. 14 (B) shows a schematic cross-sectional view of the transistor 100 along the cutting line A-B shown in FIG. 14(A). The transistor 100 exemplified in FIGS. 14(A) and 14(B) is a bottom gate type transistor. It is a transistor. It is.

[0227] The transistor 100 includes a gate electrode 102 provided on a substrate 101, an insulating layer 103 provided on the substrate 101 and the gate electrode 102, an oxide semiconductor layer 104 provided so as to overlap the gate electrode 102 on the insulating layer 103, and a pair of electrodes 105a and 105b in contact with the upper surface of the oxide semiconductor layer 104. Further, an insulating layer 106 covering the insulating layer 103, the oxide semiconductor layer 104, and the pair of electrodes 105a and 105b, and an insulating layer 107 are provided on the insulating layer 106. It is provided. It is provided. It has. It has. It is provided.

[0228] 《Substrate》 There are no major restrictions on the material of the substrate 101, etc., but at least a material having heat resistance enough to withstand subsequent heat treatment is used. For example, a glass substrate, a ceramic substrate, a quartz substrate, a sapphire substrate, a YSZ (yttria-stabilized zirconia) substrate, etc. may be used as the substrate 101. Also, a single crystal semiconductor substrate or a polycrystalline semiconductor substrate made of silicon or silicon carbide may be used. It has heat resistance. It can be used. It can be used. It is also possible to apply a board, a compound semiconductor substrate made of silicon germanium, an SOI substrate, etc. Moreover, a substrate on which semiconductor elements are provided may be used as the substrate 101. It may be used.

[0229] In addition, as the substrate 101, a flexible substrate such as plastic may be used, and the transistor 100 may be directly formed on the flexible substrate. Alternatively, a release layer may be provided between the substrate 101 and the transistor 100. After forming part or all of the transistor on the upper layer of the release layer, it can be separated from the substrate 101 and used for transfer to another substrate. As a result, the transistor 100 can be transferred to a substrate with poor heat resistance or a flexible substrate.

[0230] 《Gate Electrode》 The gate electrode 102 can be formed using a metal selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, tungsten, an alloy containing the above-described metals as components, or an alloy obtained by combining the above-described metals. Also, a metal selected from one or more of manganese and zirconium may be used. Further, the gate electrode 102 may have a single-layer structure or a laminated structure of two or more layers. For example, a single-layer structure of an aluminum film containing silicon, a two-layer structure in which a titanium film is laminated on an aluminum film, a two-layer structure in which a titanium film is laminated on a titanium nitride film, a two-layer structure in which a tungsten film is laminated on a titanium nitride film, a two-layer structure in which a tungsten film is laminated on a tantalum nitride film or a tungsten nitride film, a three-layer structure in which a titanium film, an aluminum film is laminated on the titanium film, and a titanium film is further formed thereon, etc. are available. Also, to aluminum, titanium, tantalum, tungsten, molybdenum, chromium ​​​​​​​​​​​​​an alloy film made by combining one or more of the following: aluminum, neodymium, and scandium; or A nitride film may also be used.

[0231] The gate electrode 102 is made of indium tin oxide or indium containing tungsten oxide. Oxide, indium zinc oxide with tungsten oxide, indium oxide with titanium oxide Indium tin oxide, indium zinc oxide, silicon oxide, etc. A light-transmitting conductive material such as doped indium tin oxide can also be used. Alternatively, the light-transmitting conductive material and the metal may be laminated together.

[0232] In addition, an In-Ga-Zn-based oxynitride semiconductor is provided between the gate electrode 102 and the insulating layer 103. film, In-Sn-based oxynitride semiconductor film, In-Ga-based oxynitride semiconductor film, In-Zn-based oxynitride semiconductor film Semiconductor film, Sn-based oxynitride semiconductor film, In-based oxynitride semiconductor film, metal nitride film (InN These films have a surface area of ​​5 eV or more, preferably 5.5 eV or more. The threshold voltage of the transistor can be shifted to the positive side. It is possible to realize a switching element with a turn-off characteristic. For example, In-Ga-Zn oxynitride In the case of using an oxide semiconductor film, the nitrogen concentration is at least higher than that of the oxide semiconductor layer 104. uses an In-Ga-Zn-based oxynitride semiconductor film with a content of 7 atomic % or more.

[0233] Insulating layer The insulating layer 103 functions as a gate insulating film. The insulating layer 103 is preferably an oxide insulating film.

[0234] The insulating layer 103 is made of, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, or silicon oxide. Recon, aluminum oxide, hafnium oxide, gallium oxide, or a Ga-Zn-based metal oxide, etc. can be used, and it can be provided in a laminated or single-layer structure.

[0235] Also, as the insulating layer 103, hafnium silicate (HfSiO x ), hafnium silicate (HfSi to which nitrogen is added x O y N z ), hafnium aluminate (HfAl to which nitrogen is added x O y N z ), high-k materials such as hafnium oxide and yttrium oxide can be used to reduce the gate leakage of the transistor.

[0236] 《A pair of electrodes》 A pair of electrodes 105a and 105b function as the source electrode or drain electrode of the transistor.

[0237] The pair of electrodes 105a and 105b can use, as the conductive material, metals such as aluminum, titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten, or an alloy mainly composed of these in a single-layer structure or a laminated structure. For example, a single-layer structure of an aluminum film containing silicon, a two-layer structure in which a titanium film is laminated on an aluminum film, a two-layer structure in which a titanium film is laminated on a tungsten film, a two-layer structure in which a copper film is laminated on a copper-magnesium-aluminum alloy film, a titanium film or a titanium nitride film, and an aluminum film or a copper film are laminated on the titanium film or the titanium nitride film, and further a titanium film or a titanium nitride film is formed thereon, a three-layer structure, a molybdenum film or a titanium nitride film, and an aluminum film or a copper film is laminated on the titanium film or the titanium nitride film, and further a titanium film or a titanium nitride film is formed thereon. ​​​​​​is a molybdenum nitride film, on which an aluminum film or a copper film is laminated on the molybdenum film or the molybdenum nitride film, and further a molybdenum film or a molybdenum nitride film is formed thereon, such as a three-layer structure. In addition, a transparent conductive material containing indium oxide, tin oxide or zinc oxide may be used. A molybdenum film or a molybdenum nitride film is formed on the aluminum film or the copper film laminated on the molybdenum nitride film, and there is a three-layer structure or the like. In addition, a transparent conductive material containing indium oxide, tin oxide or zinc oxide may be used.

[0238] 《Insulating layer》 The insulating layer 106 is preferably an oxide insulating film containing more oxygen than oxygen satisfying the stoichiometric composition. The oxide insulating film containing more oxygen than oxygen satisfying the stoichiometric composition desorbs some oxygen by heating. The oxide insulating film containing more oxygen than oxygen satisfying the stoichiometric composition has an oxygen desorption amount of 1.0×10 atoms / cm or more, preferably 3.0×10 atoms / cm or more, in terms of oxygen atoms, as analyzed by temperature-programmed desorption spectroscopy (TDS: Thermal Desorption Ion Spectroscopy). The surface temperature of the film during the above TDS analysis is preferably in the range of 100°C or higher and 700°C or lower, or 100°C or higher and 500°C or lower. The insulating layer 106 is preferably an oxide insulating film containing more oxygen than oxygen satisfying the stoichiometric composition. The oxide insulating film containing more oxygen than oxygen satisfying the stoichiometric composition desorbs some oxygen by heating. The oxide insulating film containing more oxygen than oxygen satisfying the stoichiometric composition desorbs some oxygen by heating. The oxide insulating film containing more oxygen than oxygen satisfying the stoichiometric composition is an oxide insulating film with an oxygen desorption amount of 1.0×10 atoms / cm or more, preferably 3.0×10 atoms / cm or more, in terms of oxygen atoms, as analyzed by temperature-programmed desorption spectroscopy (TDS: Thermal Desorption Ion Spectroscopy). The oxide insulating film containing more oxygen than oxygen satisfying the stoichiometric composition is an oxide insulating film with an oxygen desorption amount of 1.0×10 atoms / cm or more, preferably 3.0×10 atoms / cm or more, in terms of oxygen atoms, as analyzed by temperature-programmed desorption spectroscopy (TDS: Thermal Desorption Ion Spectroscopy). .0×10 18 atoms / cm 3 or more, preferably 3.0×10 20 atoms / cm 3 or more. The surface temperature of the film during the above TDS analysis is preferably in the range of 100°C or higher and 700°C or lower, or 100°C or higher and 500°C or lower. The surface temperature of the film during the above TDS analysis is preferably in the range of 100°C or higher and 700°C or lower, or 100°C or higher and 500°C or lower.

[0239] As the insulating layer 106, silicon oxide, silicon oxynitride, etc. can be used.

[0240] In addition, the insulating layer 106 also functions as a damage relaxation film for the oxide semiconductor layer 104 when forming the insulating layer 107 formed later. In addition, the insulating layer 106 also functions as a damage relaxation film for the oxide semiconductor layer 104 when forming the insulating layer 107 formed later.

[0241] In addition, an oxide film permeable to oxygen may be provided between the insulating layer 106 and the oxide semiconductor layer 104. In addition, an oxide film permeable to oxygen may be provided between the insulating layer 106 and the oxide semiconductor layer 104.

[0242] ​As the oxide film that permeates oxygen, silicon oxide, silicon oxynitride, etc. can be used. In this specification, the silicon oxynitride film refers to a film having a higher oxygen content than nitrogen in its composition, and the silicon nitride oxide film refers to a film having a higher nitrogen content than oxygen in its composition.

[0243] As the insulating layer 107, an insulating film having a blocking effect on oxygen, hydrogen, water, etc. can be used. By providing the insulating layer 107 on the insulating layer 106, it is possible to prevent the diffusion of oxygen from the oxide semiconductor layer 104 to the outside and the intrusion of hydrogen, water, etc. from the outside into the oxide semiconductor layer 104. Examples of the insulating film having a blocking effect on oxygen, hydrogen, water, etc. include silicon nitride, silicon nitride oxide, aluminum oxide, aluminum oxynitride, gallium oxide, gallium oxynitride, yttrium oxide, yttrium oxynitride, hafnium oxide, hafnium oxynitride, etc.

[0244] <Example of manufacturing method of transistor> Subsequently, an example of the manufacturing method of the transistor 100 illustrated in FIG. 14 will be described.

[0245] First, as shown in FIG. 15(A), a gate electrode 102 is formed on a substrate 101, and an insulating layer 103 is formed on the gate electrode 102.

[0246] Here, a glass substrate is used as the substrate 101.

[0247] 《Formation of gate electrode》 The method of forming the gate electrode 102 is shown below. First, a conductive film is formed by a sputtering method, a CVD method, an evaporation method, etc., and photolithography is performed on the conductive film using a first photomask. ​​​​​A resist mask is formed by the lithography process. Next, a part of the conductive film is etched using the resist mask to form the gate electrode 102. Then, the resist mask is removed. Note that the gate electrode 102 may be formed by an electroplating method, a printing method, an inkjet method, etc. instead of the above-described forming method.

[0248] In addition, the gate electrode 102 may be formed by an electrolytic plating method, a printing method, an inkjet method, etc. instead of the above forming method.

[0249] 《Formation of Gate Insulating Layer》 The insulating layer 103 is formed by a sputtering method, a PECVD method, a vapor deposition method, etc.

[0250] When forming a silicon oxide film, a silicon oxynitride film, or a silicon nitride oxide film as the insulating layer 103, it is preferable to use a deposition gas containing silicon and an oxidizing gas as the source gas. Representative examples of the deposition gas containing silicon include silane, disilane, trisilane, silane fluoride, etc. Examples of the oxidizing gas include oxygen, ozone, nitrous oxide, nitrogen dioxide, etc. When forming a silicon nitride film as the insulating layer 103, it is preferable to use a two-step forming method. First, a first silicon nitride film with few defects is formed by a plasma CVD method using a mixed gas of silane, nitrogen, and ammonia as the source gas. Next, the source gas is switched to a mixed gas of silane and nitrogen to form a second silicon nitride film with a low hydrogen concentration and capable of hydrogen blocking. By such a forming method, a silicon nitride film with few defects and having hydrogen blocking properties can be formed as the insulating layer 103.

[0251] Also, when forming a silicon nitride film as the insulating layer 103, it is preferable to use a two-step forming method. First, a first silicon nitride film with few defects is formed by a plasma CVD method using a mixed gas of silane, nitrogen, and ammonia as the source gas. Next, the source gas is switched to a mixed gas of silane and nitrogen to form a second silicon nitride film with a low hydrogen concentration and capable of hydrogen blocking. By such a forming method, a silicon nitride film with few defects and having hydrogen blocking properties can be formed as the insulating layer 103. First, a first silicon nitride film with few defects is formed by a plasma CVD method using a mixed gas of silane, nitrogen, and ammonia as the source gas. Next, the source gas is switched to a mixed gas of silane and nitrogen to form a second silicon nitride film with a low hydrogen concentration and capable of hydrogen blocking. By such a forming method, a silicon nitride film with few defects and having hydrogen blocking properties can be formed as the insulating layer 103.

[0252] ​​​​​​​​Also, when forming a gallium oxide film as the insulating layer 103, it can be formed by using the MOCVD (Metal Organic Chemical Vapor Deposition) method.

[0253] 《Formation of Oxide Semiconductor Layer》 Next, as shown in FIG. 15(B), an oxide semiconductor layer 104 is formed on the insulating layer 103. .

[0254] The method for forming the oxide semiconductor layer 104 is shown below. First, an oxide semiconductor film is formed. Subsequently, a resist mask is formed by a photolithography process using a second photomask on the oxide semiconductor film. Next, a part of the oxide semiconductor film is etched using the resist mask to form the oxide semiconductor layer 104. Thereafter, the resist mask is removed. .

[0255] After this, heat treatment may be performed. When performing heat treatment, it is preferably performed in an atmosphere containing oxygen. Also, as the temperature of the above heat treatment, for example, it may be 150°C or higher and 600°C or lower, preferably 200°C or higher and 500°C or lower.

[0256] 《Formation of a Pair of Electrodes》 Next, as shown in FIG. 15(C), a pair of electrodes 105a and 105b are formed.

[0257] The method for forming the pair of electrodes 105a and 105b is shown below. First, a conductive film is formed by a sputtering method, PECVD method, evaporation method, or the like. Next, a resist mask is formed by a photolithography process using a third photomask on the conductive film. Next, a part of the conductive film is etched using the resist mask to form the pair of electrodes 105a and 105b. ​​After that, the resist mask is removed.

[0258] Note that, as shown in FIG. 15(B), a part of the upper portion of the oxide semiconductor layer 104 may be etched and thinned during the etching of the conductive film. Therefore, it is preferable to set the thickness of the oxide semiconductor film to be thick in advance when forming the oxide semiconductor layer 104. During the formation of the oxide semiconductor layer 104, a part of the upper portion of the oxide semiconductor layer 104 may be etched and thinned. Therefore, it is preferable to set the thickness of the oxide semiconductor film to be thick in advance when forming the oxide semiconductor layer 104. During the formation of the oxide semiconductor layer 104, a part of the upper portion of the oxide semiconductor layer 104 may be etched and thinned. Therefore, it is preferable to set the thickness of the oxide semiconductor film to be thick in advance when forming the oxide semiconductor layer 104.

[0259] <<Formation of Insulating Layer>> Next, as shown in FIG. 15(D), an insulating layer 106 is formed over the oxide semiconductor layer 104 and the pair of electrodes 105a and 105b, and then an insulating layer 107 is formed over the insulating layer 106. Next, as shown in FIG. 15(D), an insulating layer 106 is formed over the oxide semiconductor layer 104 and the pair of electrodes 105a and 105b, and then an insulating layer 107 is formed over the insulating layer 106.

[0260] When forming a silicon oxide film or a silicon oxynitride film as the insulating layer 106, it is preferable to use a deposition gas containing silicon and an oxidizing gas as raw materials. Representative examples of the deposition gas containing silicon include silane, disilane, trisilane, silane fluoride, etc. Examples of the oxidizing gas include oxygen, ozone, nitrous oxide, nitrogen dioxide, etc. When forming a silicon oxide film or a silicon oxynitride film as the insulating layer 106, it is preferable to use a deposition gas containing silicon and an oxidizing gas as raw materials. Representative examples of the deposition gas containing silicon include silane, disilane, trisilane, silane fluoride, etc. Examples of the oxidizing gas include oxygen, ozone, nitrous oxide, nitrogen dioxide, etc. When forming a silicon oxide film or a silicon oxynitride film as the insulating layer 106, it is preferable to use a deposition gas containing silicon and an oxidizing gas as raw materials. Representative examples of the deposition gas containing silicon include silane, disilane, trisilane, silane fluoride, etc. Examples of the oxidizing gas include oxygen, ozone, nitrous oxide, nitrogen dioxide, etc. When forming a silicon oxide film or a silicon oxynitride film as the insulating layer 106, it is preferable to use a deposition gas containing silicon and an oxidizing gas as raw materials. Representative examples of the deposition gas containing silicon include silane, disilane, trisilane, silane fluoride, etc. Examples of the oxidizing gas include oxygen, ozone, nitrous oxide, nitrogen dioxide, etc.

[0261] For example, a substrate placed in a vacuum-exhausted processing chamber of a plasma CVD apparatus is held at 180°C or higher and 260°C or lower, more preferably 200°C or higher and 240°C or lower. Raw materials are introduced into the processing chamber to set the pressure in the processing chamber to 100 Pa or higher and 250 Pa or lower, more preferably 100 Pa or higher and 200 Pa or lower. High-frequency power of 0.17 W / cm or higher and 0.5 W / cm or lower, more preferably 0.25 W / cm or higher and 0.35 W / cm or lower is supplied to the electrode provided in the processing chamber to form a silicon oxide film or a silicon oxynitride film. For example, a substrate placed in a vacuum-exhausted processing chamber of a plasma CVD apparatus is held at 180°C or higher and 260°C or lower, more preferably 200°C or higher and 240°C or lower. Raw materials are introduced into the processing chamber to set the pressure in the processing chamber to 100 Pa or higher and 250 Pa or lower, more preferably 100 Pa or higher and 200 Pa or lower. High-frequency power of 0.17 W / cm or higher and 0.5 W / cm or lower, more preferably 0.25 W / cm or higher and 0.35 W / cm or lower is supplied to the electrode provided in the processing chamber to form a silicon oxide film or a silicon oxynitride film. For example, a substrate placed in a vacuum-exhausted processing chamber of a plasma CVD apparatus is held at 180°C or higher and 260°C or lower, more preferably 200°C or higher and 240°C or lower. Raw materials are introduced into the processing chamber to set the pressure in the processing chamber to 100 Pa or higher and 250 Pa or lower, more preferably 100 Pa or higher and 200 Pa or lower. High-frequency power of 0.17 W / cm or higher and 0.5 W / cm or lower, more preferably 0.25 W / cm or higher and 0.35 W / cm or lower is supplied to the electrode provided in the processing chamber to form a silicon oxide film or a silicon oxynitride film. For example, a substrate placed in a vacuum-exhausted processing chamber of a plasma CVD apparatus is held at 180°C or higher and 260°C or lower, more preferably 200°C or higher and 240°C or lower. Raw materials are introduced into the processing chamber to set the pressure in the processing chamber to 100 Pa or higher and 250 Pa or lower, more preferably 100 Pa or higher and 200 Pa or lower. High-frequency power of 0.17 W / cm or higher and 0.5 W / cm or lower, more preferably 0.25 W / cm or higher and 0.35 W / cm or lower is supplied to the electrode provided in the processing chamber to form a silicon oxide film or a silicon oxynitride film. 2 or higher or higher 2 and 2 or higher 2 and or lower to form a silicon oxide film or a silicon oxynitride film.

[0262] As a film formation condition, high-frequency power with the above power density is supplied to the reaction chamber at the above pressure, so that the decomposition efficiency of the source gas increases in the plasma, the oxygen radicals increase, and the oxidation of the source gas proceeds. Therefore, the oxygen content in the oxide insulating film becomes higher than the stoichiometric ratio. However, when the substrate temperature is the above temperature, since the bonding force between silicon and oxygen is weak, part of the oxygen desorbs due to heating. As a result, it is possible to form an oxide insulating film that contains more oxygen than the oxygen that satisfies the stoichiometric composition and part of the oxygen desorbs due to heating. and thus the decomposition efficiency of the source gas increases in the plasma, the oxygen radicals increase, and the oxidation of the source gas proceeds, so that the oxygen content in the oxide insulating film becomes higher than the stoichiometric ratio. However, when the substrate temperature is the above temperature, since the bonding force between silicon and oxygen is weak, part of the oxygen desorbs due to heating. As a result, it is possible to form an oxide insulating film that contains more oxygen than the oxygen that satisfies the stoichiometric composition and part of the oxygen desorbs due to heating. and thus the oxidation of the source gas proceeds, so that the oxygen content in the oxide insulating film becomes higher than the stoichiometric ratio. However, when the substrate temperature is the above temperature, since the bonding force between silicon and oxygen is weak, part of the oxygen desorbs due to heating. As a result, it is possible to form an oxide insulating film that contains more oxygen than the oxygen that satisfies the stoichiometric composition and part of the oxygen desorbs due to heating. However, when the substrate temperature is the above temperature, since the bonding force between silicon and oxygen is weak, part of the oxygen desorbs due to heating. As a result, it contains more oxygen than the oxygen that satisfies the stoichiometric composition, and it is possible to form an oxide insulating film in which part of the oxygen desorbs due to heating. As a result, it contains more oxygen than the oxygen that satisfies the stoichiometric composition, and it is possible to form an oxide insulating film in which part of the oxygen desorbs due to heating.

[0263] In addition, when an oxide insulating film is provided between the oxide semiconductor layer 104 and the insulating layer 106, in the formation process of the insulating layer 106, the oxide insulating film serves as a protective film for the oxide semiconductor layer 104. As a result, it is possible to form the insulating layer 106 using high-frequency power with a high power density while reducing the damage to the oxide semiconductor layer 104. In addition, when an oxide insulating film is provided between the oxide semiconductor layer 104 and the insulating layer 106, in the formation process of the insulating layer 106, the oxide insulating film serves as a protective film for the oxide semiconductor layer 104. As a result, it is possible to form the insulating layer 106 using high-frequency power with a high power density while reducing the damage to the oxide semiconductor layer 104. As a result, it is possible to form the insulating layer 106 using high-frequency power with a high power density while reducing the damage to the oxide semiconductor layer 104.

[0264] For example, a substrate placed in a vacuum-exhausted processing chamber of a PECVD apparatus is held at 180°C or higher and 400°C or lower, more preferably 200°C or higher and 370°C or lower. A source gas is introduced into the processing chamber to make the pressure in the processing chamber 20 Pa or higher and 250 Pa or lower, more preferably 100 Pa or higher and 250 Pa or lower. Under the condition of supplying high-frequency power to the electrode provided in the processing chamber, it is possible to form a silicon oxide film or a silicon oxynitride film as the oxide insulating film. Further, by setting the pressure in the processing chamber to 100 Pa or higher and 250 Pa or lower, it is possible to reduce the damage to the oxide semiconductor layer 104 when forming the oxide insulating layer. For example, a substrate placed in a vacuum-exhausted processing chamber of a PECVD apparatus is held at 180°C or higher and 400°C or lower, more preferably 200°C or higher and 370°C or lower. A source gas is introduced into the processing chamber to make the pressure in the processing chamber 20 Pa or higher and 250 Pa or lower, more preferably 100 Pa or higher and 250 Pa or lower. Under the condition of supplying high-frequency power to the electrode provided in the processing chamber, it is possible to form a silicon oxide film or a silicon oxynitride film as the oxide insulating film. For example, a substrate placed in a vacuum-exhausted processing chamber of a PECVD apparatus is held at 180°C or higher and 400°C or lower, more preferably 200°C or higher and 370°C or lower. A source gas is introduced into the processing chamber to make the pressure in the processing chamber 20 Pa or higher and 250 Pa or lower, more preferably 100 Pa or higher and 250 Pa or lower. Under the condition of supplying high-frequency power to the electrode provided in the processing chamber, it is possible to form a silicon oxide film or a silicon oxynitride film as the oxide insulating film. For example, a substrate placed in a vacuum-exhausted processing chamber of a PECVD apparatus is held at 180°C or higher and 400°C or lower, more preferably 200°C or higher and 370°C or lower. A source gas is introduced into the processing chamber to make the pressure in the processing chamber 20 Pa or higher and 250 Pa or lower, more preferably 100 Pa or higher and 250 Pa or lower. Under the condition of supplying high-frequency power to the electrode provided in the processing chamber, it is possible to form a silicon oxide film or a silicon oxynitride film as the oxide insulating film. For example, a substrate placed in a vacuum-exhausted processing chamber of a PECVD apparatus is held at 180°C or higher and 400°C or lower, more preferably 200°C or higher and 370°C or lower. A source gas is introduced into the processing chamber to make the pressure in the processing chamber 20 Pa or higher and 250 Pa or lower, more preferably 100 Pa or higher and 250 Pa or lower. Under the condition of supplying high-frequency power to the electrode provided in the processing chamber, it is possible to form a silicon oxide film or a silicon oxynitride film as the oxide insulating film. For example, a substrate placed in a vacuum-exhausted processing chamber of a PECVD apparatus is held at 180°C or higher and 400°C or lower, more preferably 200°C or higher and 370°C or lower. A source gas is introduced into the processing chamber to make the pressure in the processing chamber 20 Pa or higher and 250 Pa or lower, more preferably 100 Pa or higher and 250 Pa or lower. Under the condition of supplying high-frequency power to the electrode provided in the processing chamber, it is possible to form a silicon oxide film or a silicon oxynitride film as the oxide insulating film. Further, by setting the pressure in the processing chamber to 100 Pa or higher and 250 Pa or lower, it is possible to reduce the damage to the oxide semiconductor layer 104 when forming the oxide insulating layer.

[0265] As the raw material gas for the oxide insulating film, a depositable gas containing silicon and an oxidizing gas are preferably used. This is preferable. Representative examples of the depositable gas containing silicon include silane, disilane, tri silane, silicon fluoride, and the like. Examples of the oxidizing gas include oxygen, ozone, nitrous oxide, di nitrogen oxide, and the like.

[0266] The insulating layer 107 can be formed by a sputtering method, a PECVD method, or the like.

[0267] When forming a silicon nitride film or a silicon oxynitride film as the insulating layer 107, as the raw material gas, a depositable gas containing silicon, an oxidizing gas, and a gas containing nitrogen are preferably used. Representative examples of the depositable gas containing silicon include silane, disilane, trisi lane, silicon fluoride, and the like. Examples of the oxidizing gas include oxygen, ozone, nitrous oxide, di nitrogen oxide, and the like. Examples of the gas containing nitrogen include nitrogen, ammonia, and the like.

[0268] Through the above steps, the transistor 100 can be formed.

[0269] <Modification Example of Transistor> Hereinafter, a configuration example of a transistor that is partially different from the transistor 100 will be described. .

[0270] <<Modification Example 1>> FIG. 16(A) shows a schematic cross-sectional view of a transistor 110 exemplified below. The transis tor 110 is different from the transistor 100 in that the configuration of the oxide semiconductor layer is different.

[0271] The oxide semiconductor layer 114 included in the transistor 110 is composed of a stacked oxide semiconductor layer 114a and an oxide semiconductor layer 114b.

[0272] Note that when the boundary between the oxide semiconductor layer 114a and the oxide semiconductor layer 114b is unclear, in the drawings such as FIG. 16(A), these boundaries are indicated by broken lines.

[0273] The oxide semiconductor layer 114a typically uses In-Ga oxide, In-Zn oxide, In- M-Zn oxide (M is Al, Ti, Ga, Y, Zr, La, Ce, Nd, or Hf). When the oxide semiconductor layer 114a is In-M-Zn oxide, the atomic ratio of In and M excluding Zn and O is preferably such that In is less than 50 atomic% and M is 50 atomic% or more, more preferably In is less than 25 atomic% and M is 7 5 atomic% or more. For example, the oxide semiconductor layer 114a uses a material with an energy gap of 2 eV or more, preferably 2.5 eV or more, more preferably 3 eV or more.

[0274] The oxide semiconductor layer 114b contains In or Ga and typically is In-Ga oxide, In-Zn oxide, In-M-Zn oxide (M is Al, Ti, Ga, Y, Zr, La, C e, Nd or Hf), and the lower end energy of the conduction band is closer to the vacuum level than that of the oxide semiconductor layer 114a. Typically, the difference between the lower end energy of the conduction band of the oxide semiconductor layer 114b and the lower end energy of the conduction band of the oxide semiconductor layer 114a is 0.05 eV or more , 0.07 eV or more, 0.1 eV or more, or 0.15 eV or more, and 2 eV or less, 1e V or less, 0.5 eV or less, or 0.4 eV or less, which is preferable.

[0275] When the oxide semiconductor layer 114b is In-M-Zn oxide, excluding Zn and O, ​​The atomic ratio of In to M is preferably such that In is 25 atomic% or more and M is less than 75 a tomic%, more preferably In is 34 atomic% or more and M is less than 66 ato mic%.

[0276] For example, as the oxide semiconductor layer 114a, an In-Ga-Zn oxide with an atomic ratio of In:Ga:Zn = 1:1:1, In:Ga: Zn = 1:1:1.2, or In:Ga:Zn = 3:1:2 can be used. Also, as the oxide semiconductor layer 114b, an In-Ga-Zn oxide with an atomic ratio of In:Ga:Z n = 1:3:2, 1:6:4, or 1:9:6 can be used. Note that the atomic ratios of the oxide semiconductor layer 114a and the oxide semiconductor layer 114b each include a variation of plus or minus 20% of the above atomic ratio as an error. By using an oxide with a large content of Ga that functions as a stabilizer for the oxide semiconductor layer 114b provided in the upper layer, the release of oxygen from the oxide semiconductor layer 114a and the oxide semiconductor layer 11 4b can be suppressed.

[0277]

[0278] Note that it is not limited to these, and those with an appropriate composition may be used according to the required semiconductor characteristics and electrical characteristics (field effect mobility, threshold voltage, etc.) of the transistor. Also, in order to obtain the required semiconductor characteristics of the transistor, it is preferable to make the carrier density, impurity concentration, defect density, atomic ratio of metal elements to oxygen, interatomic distance of the oxide semiconductor layer 114a and the oxide semiconductor layer 1 14b appropriate values such as density, etc.

[0279] Note that in the above, as the oxide semiconductor layer 114, a structure in which two oxide semiconductor layers are stacked ​Although an example has been given with two oxide semiconductor layers, a structure in which three or more oxide semiconductor layers are stacked may also be used.

[0280] <<Modification 2>> FIG. 16(B) shows a schematic cross-sectional view of the transistor 120 exemplified below. The transistor 120 is different from the transistors 100 and 110 in that the structure of the oxide semiconductor layer is different.

[0281] The oxide semiconductor layer 124 included in the transistor 120 is formed by stacking an oxide semiconductor layer 124a, an oxide semiconductor layer 124b, and an oxide semiconductor layer 124c in this order.

[0282] The oxide semiconductor layer 124a and the oxide semiconductor layer 124b are stacked on the insulating layer 103. The oxide semiconductor layer 124c is provided in contact with the upper surface of the oxide semiconductor layer 124b, and the upper surfaces and side surfaces of the pair of electrodes 105a and 105b.

[0283] For example, as the oxide semiconductor layer 124b, the same structure as the oxide semiconductor layer 11 4a exemplified in the above Modification 1 can be used. Further, for example, as the oxide semiconductor layers 124a and 124 c, the same structure as the oxide semiconductor layer 114b exemplified in the above Modification 1 can be used.

[0284] For example, by using an oxide with a high Ga content that functions as a stabilizer for the oxide semiconductor layer 124a provided in the lower layer of the oxide semiconductor layer 124b and the oxide semiconductor layer 124c provided in the upper layer, it is possible to suppress the release of oxygen from the oxide semiconductor layer 124a, the oxide semiconductor layer 124b, and the oxide semiconductor layer 124c.

[0285] Also, for example, when a channel is mainly formed in the oxide semiconductor layer 124b, an oxide semiconductor layer 124b using an oxide with a high In content is used, and a pair of electrodes 105a and 105b are provided in contact with the oxide semiconductor layer 124b so that the on-current of the transistor 120 can be increased.

[0286] <Other configuration examples of the transistor> Hereinafter, a configuration example of a top-gate type transistor to which the oxide semiconductor film according to one aspect of the present invention can be applied will be described.

[0287] Note that hereinafter, components having the same configuration or the same function as those described above are denoted by the same reference numerals, and redundant descriptions are omitted.

[0288] <<Configuration example>> FIG. 17(A) shows a schematic cross-sectional view of a top-gate type transistor 150 exemplified below.

[0289] The transistor 150 includes an oxide semiconductor layer 104 provided on a substrate 101 provided with an insulating layer 151, a pair of electrodes 105a and 105b in contact with the upper surface of the oxide semiconductor layer 104 , an insulating layer 103 provided on the oxide semiconductor layer 104 and the pair of electrodes 105a and 105b , and a gate electrode 102 provided on the insulating layer 103 so as to overlap the oxide semiconductor layer 104 . Further, an insulating layer 152 is provided so as to cover the insulating layer 103 and the gate electrode 102 .

[0290] The insulating layer 151 has a function of suppressing the diffusion of impurities from the substrate 101 to the oxide semiconductor layer 104. For example, the same configuration as the insulating layer 107 described above can be used. Note that the insulating layer 151 may not be provided if it is unnecessary. ​​​​​​​

[0291] Similar to the insulating layer 107, an insulating film having a blocking effect on oxygen, hydrogen, water, etc. can be applied to the insulating layer 152. If the insulating layer 107 is not necessary, it may not be provided. Similar to the insulating layer 107, an insulating film having a blocking effect on oxygen, hydrogen, water, etc. can be applied to the insulating layer 152. If the insulating layer 107 is not necessary, it may not be provided. It is okay.

[0292] <<Modification Example 1>> Hereinafter, a configuration example of a transistor that is partially different from the transistor 150 will be described. .

[0293] Fig. 17(B) shows a schematic cross-sectional view of a transistor 160 exemplified below. The transistor 160 is different from the transistor 150 in that the structure of the oxide semiconductor layer is different. The transistor 160 is different from the transistor 150 in that the structure of the oxide semiconductor layer is different.

[0294] The oxide semiconductor layer 164 included in the transistor 160 is composed of an oxide semiconductor layer 164a, an oxide semiconductor layer 164b, and an oxide semiconductor layer 164c laminated in this order. The oxide semiconductor layer 164 included in the transistor 160 is composed of an oxide semiconductor layer 164a, an oxide semiconductor layer 164b, and an oxide semiconductor layer 164c laminated in this order.

[0295] Among the oxide semiconductor layer 164a, the oxide semiconductor layer 164b, and the oxide semiconductor layer 164c, the oxide semiconductor film described above can be applied to any one, or any two, or all of them. Among the oxide semiconductor layer 164a, the oxide semiconductor layer 164b, and the oxide semiconductor layer 164c, the oxide semiconductor film described above can be applied to any one, or any two, or all of them. It can be done.

[0296] For example, as the oxide semiconductor layer 164b, the same configuration as the oxide semiconductor layer 114a exemplified in the above Modification Example 1 can be used. Also, for example, as the oxide semiconductor layers 164a and 164c, the same configuration as the oxide semiconductor layer 114b exemplified in the above Modification Example 1 can be used. 4a can be used. Also, for example, as the oxide semiconductor layers 164a and 164c, the same configuration as the oxide semiconductor layer 114b exemplified in the above Modification Example 1 can be used. c, the same configuration as the oxide semiconductor layer 114b exemplified in the above Modification Example 1 can be used. It can be done.

[0297] In addition, the oxide semiconductor layer 164a provided under the oxide semiconductor layer 164b and the oxide semiconductor layer 164c provided above, which have a high content of Ga that functions as a stabilizer. In addition, the oxide semiconductor layer 164a provided under the oxide semiconductor layer 164b and the oxide semiconductor layer 164c provided above, which have a high content of Ga that functions as a stabilizer. By using indium oxide, the release of oxygen from the oxide semiconductor layer 164a, the oxide semiconductor layer 164b, and the oxide semiconductor layer 164c can be suppressed.

[0298] <<Modification 2>> Hereinafter, a configuration example of a transistor that is partially different from the transistor 150 will be described. .

[0299] FIG. 17(C) shows a schematic cross-sectional view of a transistor 170 exemplified below. The transistor 170 is different from the transistor 150 in the shapes of a pair of electrodes 105a and 105b in contact with the oxide semiconductor layer 104, the shape of the gate electrode 102, and the like. The transistor 170 includes an oxide semiconductor layer 104 provided on a substrate 101 provided with an insulating layer 151, an insulating layer 103 on the oxide semiconductor layer 104, a gate electrode 102 on the insulating layer 103, an insulating layer 154 on the insulating layer 151 and the oxide semiconductor layer 104, an insulating layer 156 on the insulating layer 154, a pair of electrodes 105a and 105b electrically connected to the oxide semiconductor layer 104 through openings provided in the insulating layers 154 and 156, and an insulating layer 152 on the insulating layer 156 and the pair of electrodes 105a and 105b.

[0300] The insulating layer 154 is formed of, for example, an insulating film containing hydrogen. Examples of the insulating film containing hydrogen include a silicon nitride film. The hydrogen contained in the insulating layer 154 combines with oxygen vacancies in the oxide semiconductor layer 104 to become carriers in the oxide semiconductor layer 104. Therefore, in the configuration shown in FIG. 17(C), the regions where the oxide semiconductor layer 104 and the insulating layer 154 are in contact are represented as an n-type region 104b and an n-type region 104c. Note that the n-type region

[0301] As the insulating layer 154, for example, an insulating film containing hydrogen is formed. Examples of the insulating film containing hydrogen include a silicon nitride film. The hydrogen contained in the insulating layer 154 combines with oxygen vacancies in the oxide semiconductor layer 104 to become carriers in the oxide semiconductor layer 104. Therefore, in the configuration shown in FIG. 17(C), the regions where the oxide semiconductor layer 104 and the insulating layer 154 are in contact are represented as an n-type region 104b and an n-type region 104c. ​​ The region sandwiched between the 104b and the n-type region 104c becomes the channel region 104a.

[0302] By providing the n-type regions 104b and 104c in the oxide semiconductor layer 104, the contact resistance with the pair of electrodes 1 05a and 105b can be reduced. Note that the n-type regions 104b and 1 04c can be formed self-alignedly when the gate electrode 102 is formed and by using the insulating layer 154 covering the gate electrode 102. The transistor 170 shown in FIG. 17(C) is a so-called self-aligned top-gate type transistor. By adopting a self-aligned top-gate type transistor structure, there is no overlap between the gate electrode 102 and the pair of electrodes 105a and 105b that function as source and drain electrodes, so the parasitic capacitance generated between the electrodes can be reduced. Further, as the insulating layer 156 included in the transistor 170, for example, it can be formed of a silicon oxynitride film or the like. This embodiment can be implemented in appropriate combination with other embodiments described in this specification.

[0303]

[0304] This embodiment can be implemented in appropriate combination with other embodiments described in this specification.

[0305] (Embodiment 6) In this embodiment, the configuration of an oxide semiconductor applicable to a display module according to one aspect of the present invention will be described.

[0306] The oxide semiconductor has a large energy gap of 3.0 eV or more, and an oxide semiconductor film obtained by processing the oxide semiconductor under appropriate conditions and sufficiently reducing its carrier density is applied. In a transistor, the off-current is compared with that of a conventional transistor using silicon ​​It can be made extremely low.

[0307] As an applicable oxide semiconductor, it is preferably at least indium (In) or zinc (Zn ). In particular, it is preferably containing In and Zn. Further, as a stabilizer for reducing the variation in the electrical characteristics of a transistor using the oxide semiconductor, in addition to those , one or more selected from gallium (Ga), tin (Sn), hafnium (Hf), zirconium (Zr) , titanium (Ti), scandium (Sc), yttrium (Y), lanthanoids (for example , cerium (Ce), neodymium (Nd), gadolinium (Gd)) are preferably contained.

[0308] For example, as the oxide semiconductor, indium oxide, tin oxide, zinc oxide, In-Zn-based oxide , Sn-Zn-based oxide, Al-Zn-based oxide, Zn-Mg-based oxide, Sn-Mg-based oxide , In-Mg-based oxide, In-Ga-based oxide, In-Ga-Zn-based oxide (also denoted as IGZO ), In-Al-Zn-based oxide, In-Sn-Zn-based oxide, Sn-Ga- Zn-based oxide, Al-Ga-Zn-based oxide, Sn-Al-Zn-based oxide, In-Hf-Z n-based oxide, In-Zr-Zn-based oxide, In-Ti-Zn-based oxide, In-Sc-Zn -based oxide, In-Y-Zn-based oxide, In-La-Zn-based oxide, In-Ce-Zn-based oxide , In-Pr-Zn-based oxide, In-Nd-Zn-based oxide, In-Sm-Zn-based oxide , In-Eu-Zn-based oxide, In-Gd-Zn-based oxide, In-Tb-Zn-based oxide , In-Dy-Zn-based oxide, In-Ho-Zn-based oxide, In-Er-Zn-based oxide, In-Tm-Zn-based oxide, In-Yb-Zn-based oxide, In-Lu-Zn-based oxide, I n-Sn-Ga-Zn based oxide, In-Hf-Ga-Zn based oxide, In-Al-Ga- Zn based oxide, In-Sn-Al-Zn based oxide, In-Sn-Hf-Zn based oxide, I n-Hf-Al-Zn based oxide can be used.

[0309] Here, the In-Ga-Zn based oxide means an oxide having In, Ga, and Zn as main components, and the ratio of In, Ga, and Zn is not limited. Also, metal elements other than In, Ga, and Zn may be contained.

[0310] Also, as the oxide semiconductor, InMO 3 (ZnO) m (m > 0 and m is not an integer ) may be used. Here, M represents one metal element or a plurality of metal elements selected from Ga, Fe, Mn, and Co, or the elements as the above stabilizer. Also, as the oxide semiconductor, In . Also, as the oxide semiconductor, In 2 SnO 5 (ZnO) n (n > 0 and n is an integer) may be used.

[0311] For example, In-Ga-Zn based oxides with an atomic ratio of In:Ga:Zn = 1:1:1, In:Ga:Zn = 1:3:2, In:Ga :Zn = 1:3:4, In:Ga:Zn = 1:3:6, In:Ga:Zn = 3:1:2 or In:Ga:Zn = 2:1:3, or oxides in the vicinity of their compositions may be used.

[0312] When the oxide semiconductor film contains a large amount of hydrogen, by combining with the oxide semiconductor, a part of the hydrogen becomes a donor and generates electrons as carriers. As a result, the transistor ​​​​​The threshold voltage of the Ta shifts in the negative direction. Therefore, after forming the oxide semiconductor film, it is preferable to perform a dehydration treatment (dehydrogenation treatment) to remove hydrogen or moisture from the oxide semiconductor film and purify it to a high purity so that it contains as few impurities as possible.

[0313] Note that, due to the dehydration treatment (dehydrogenation treatment) of the oxide semiconductor film, oxygen may also decrease simultaneously from the oxide semiconductor film. Therefore, in order to compensate for the oxygen deficiency increased by the dehydration treatment (dehydrogenation treatment) of the oxide semiconductor film, it is preferable to perform a treatment to add oxygen to the oxide semiconductor film. In this specification etc., the case of supplying oxygen to the oxide semiconductor film may be referred to as an oxygen addition treatment. Or the case of making the oxygen contained in the oxide semiconductor film more than the stoichiometric composition may be referred to as a peroxygenation treatment.

[0314] Thus, the oxide semiconductor film can be made into an oxide semiconductor film that is i-type (intrinsic) or substantially i-type approaching i-type infinitely by removing hydrogen or moisture by dehydration treatment (dehydrogenation treatment) and compensating for oxygen deficiency by oxygen addition treatment. Note that substantially intrinsic means that the carrier density of the oxide semiconductor layer is less than 1×10 17 / cm 3 , preferably less than 1×10 / cm 15 , more preferably less than 1×1 3 0 / cm 13 , even more preferably less than 8×10 3 / cm 11 , even more preferably less than 1 3 ×10 / cm 11 , even more preferably less than 1×10 3 / cm 10 , and even more preferably less than 1×10 3 / cm, and 1×10​​​​​​​ -9 / cm 3 It means the above.

[0315] Also, a transistor including an oxide semiconductor film of type I or substantially type I can achieve extremely excellent off-current characteristics. For example, when a transistor using an oxide semiconductor film is in the off state, the drain current at room temperature (about 25 °C) is 1 × 10 -18 A or less, preferably 1 × 10 -21 A or less, more preferably 1 × 10 -24 A or less, or at 85 °C is 1 × 10 -15 A or less, preferably 1 × 10 -18 A or less, more preferably 1 × 10 -21 A or less. Note that the off state of a transistor means, in the case of an n-channel type transistor, a state where the gate voltage is sufficiently smaller than the threshold voltage. Specifically speaking, if the gate voltage is 1 V or more, 2 V or more, or 3 V or more smaller than the threshold voltage , the transistor is in the off state.

[0316] Hereinafter, the structure of the oxide semiconductor film will be described.

[0317] In this specification, "parallel" means a state where two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, the case of -5° or more and 5° or less is also included. Also , "substantially parallel" means a state where two straight lines are arranged at an angle of -30° or more and 30° or less. Also, "perpendicular" means a state where two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, the case of 85° or more and 95° or less is also included. Also, "substantially perpendicular" means a state where two straight lines are arranged at an angle of 60° or more and 120° or less.

[0318] In addition, in this specification, when the crystal is trigonal or rhombohedral, it is represented as a hexagonal system. That's all.

[0319] Oxide semiconductors can be divided into single crystal oxide semiconductors and other non-single crystal oxide semiconductors. Examples of non-single crystal oxide semiconductors include CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor), polycrystalline oxide semiconductors, microcrystalline oxide semiconductors, amorphous oxide semiconductors, and the like. semiconductors, microcrystalline oxide semiconductors, amorphous oxide semiconductors, and the like.

[0320] From another perspective, oxide semiconductors can be divided into amorphous oxide semiconductors and other crystalline oxide semiconductors. Examples of crystalline oxide semiconductors include single crystal oxide semiconductors, CAAC-OS, polycrystalline oxide semiconductors, microcrystalline oxide semiconductors, and the like. OS, polycrystalline oxide semiconductors, microcrystalline oxide semiconductors, and the like.

[0321] First, CAAC-OS will be described. Note that CAAC-OS can also be called an oxide semiconductor having CANC (C-Axis Aligned nanocrystals). That's all.

[0322] CAAC-OS is one of the oxide semiconductors having a plurality of crystal parts (also referred to as pellets) oriented along the c-axis.

[0323] When a composite analysis image (also referred to as a high-resolution TEM image) of the bright-field image and the diffraction pattern of CAAC-OS is observed by a transmission electron microscope (TEM: Transmission Electron Microscope), a plurality of pellets can be confirmed. On the other hand, in the high-resolution TEM image, the boundaries between the pellets, that is, the grain boundaries (grain boundaries) ​​​​​​​It cannot be clearly confirmed. Therefore, it can be said that in CAAC-OS, a decrease in electron mobility due to grain boundaries is less likely to occur.

[0324] Hereinafter, CAAC-OS observed by TEM will be described. Fig. 18(A) shows a high-resolution TEM image of a cross-section of CAAC-OS observed from a direction substantially parallel to the sample surface. For the observation of the high-resolution TEM image, a spherical aberration correction (Spherical Aberratio n Corrector) function was used. The high-resolution TEM image using the spherical aberration correction function is especially called a Cs-corrected high-resolution TEM image. The acquisition of the Cs-corrected high-resolution TEM image can be performed, for example, by a JEOL JEM-ARM200F atomic resolution analytical electron microscope manufactured by JEOL Ltd.

[0325] Fig. 18(B) shows a magnified Cs-corrected high-resolution TEM image of the region (1) in Fig. 18(A). From Fig. 18(B), it can be confirmed that in the pellet, metal atoms are arranged in layers. The arrangement of each layer of metal atoms reflects the unevenness of the surface (also referred to as the surface to be formed) or the upper surface of the CAAC-OS film, and is parallel to the surface to be formed or the upper surface of the CAAC-OS.

[0326] As shown in Fig. 18(B), CAAC-OS has a characteristic atomic arrangement. Fig. 18(C ) shows the characteristic atomic arrangement indicated by auxiliary lines. From Fig. 18(B) and Fig. 18(C ), it can be seen that the size of one pellet is about 1 nm or more and 3 nm or less, and the size of the gap generated by the inclination between pellets is about 0.8 nm. Therefore, the pellet can also be called a nanocrystal (nc).

[0327] Here, based on the Cs-corrected high-resolution TEM image, the pellets of CAAC-OS on the substrate 5120 were The layout of the 5100 is shown diagrammatically as a stack of bricks or blocks. (See FIG. 18(D)). Between the pellets observed in FIG. 18(C), The portion where the inclination occurs corresponds to an area 5161 shown in FIG.

[0328] FIG. 19(A) shows the C 19(A) shows the s-corrected high-resolution TEM images of regions (1), (2) and (3) in FIG. ) are enlarged Cs-corrected high-resolution TEM images shown in Fig. 19(B), (C) and (D), respectively. As shown in Figure 19(D), Figure 19(B), Figure 19(C) and Figure 19(D) show that the pellet It can be seen that the metal atoms are arranged in a triangular, quadrangular or hexagonal shape. However, no regularity is observed in the arrangement of metal atoms among different pellets.

[0329] Next, C was analyzed by X-ray diffraction (XRD). AAC-OS will be explained. For example, InGaZnO 4 CAAC-O When the structure of S is analyzed using the out-of-plane method, the result is as shown in Figure 20(A). As shown in the figure, a peak may appear at a diffraction angle (2θ) of around 31°. ZnO 4 Since the crystal orientation of CAAC-OS is attributed to the (009) plane of the crystal, it is considered that the crystal orientation of CAAC-OS is c-axis oriented. It can be seen that the crystal has a c-axis oriented in a direction substantially perpendicular to the surface on which the crystal is formed or to the upper surface.

[0330] In addition, in the out-of-plane structural analysis of CAAC-OS, 2θ is 31 In addition to the peak near °, a peak may also appear near 2θ = 36°. When 2θ is near 36° The peak near indicates that a part of the CAAC-OS contains crystals without c-axis orientation is shown. A more preferable CAAC-OS has a structure by the out-of-plane method In the analysis, the peak appears near 2θ = 31°, and no peak appears near 2θ = 36°.

[0331] On the other hand, for CAAC-OS, when performing structural analysis by the in-pla ne method in which X-rays are incident from a direction substantially perpendicular to the c-axis, a peak appears near 2θ = 56°. This peak is the I nGaZnO 4 is attributed to the (110) plane of the crystal. In the case of CAAC-OS, fixing 2θ near 5 6° and analyzing while rotating the sample with the normal vector of the sample surface as the axis (φ-axis) (φ scan), as shown in Fig. 20(B), no distinct peak appears. In contrast, for the single-crystalline oxide semiconductor of InGaZnO 4 if 2θ is fixed near 56° and φ is scanned, as shown in Fig. 20(C), six peaks attributed to crystal planes equivalent to the (110) plane are observed. Therefore, from the structural analysis using XRD, it can be confirmed that the CAAC-OS has irregular orientations of the a-axis and b-axis.

[0332] Next, the CAAC-OS analyzed by electron diffraction will be described. For example, InGa ZnO 4 For the CAAC-OS having the crystal of, when an electron beam with a probe diameter of 300 nm is incident parallel to the sample surface a diffraction pattern (also called a limited-field transmission electron diffraction pattern) as shown in Fig. 21(A) may appear. In this diffraction pattern, InGaZnO 4 ​It includes spots resulting from the (009) plane of the crystal. Therefore, also by electron diffraction , it can be seen that the pellets included in CAAC-OS have c-axis orientation, and the c-axis is oriented in a direction substantially perpendicular to the surface to be formed or the upper surface. On the other hand, for the same sample, the diffraction pattern when an electron beam with a probe diameter of 300 nm is incident perpendicular to the sample surface is shown in Fig. 21(B). From Fig. 21(B), a ring-shaped diffraction pattern is confirmed. Therefore, it can also be seen by electron diffraction that the a-axis and b-axis of the pellets included in CAAC-OS do not have orientation . Note that the first ring in Fig. 21(B) is considered to be due to the (010) plane and the (100) plane, etc. of the crystal of InGaZnO . Also, the second ring in Fig. 21(B) 4 is considered to be due to the (110) plane, etc. .

[0333] Also, CAAC-OS is an oxide semiconductor with a low density of defect levels. Defects in oxide semiconductors include, for example, defects caused by impurities and oxygen deficiencies. Therefore, CA AC-OS can also be said to be an oxide semiconductor with a low impurity concentration. Also, CAAC-O S can also be said to be an oxide semiconductor with few oxygen deficiencies.

[0334] Impurities included in the oxide semiconductor may become carrier traps or carrier generation sources. Also, oxygen deficiencies in the oxide semiconductor may become carrier traps or become carrier generation sources by capturing hydrogen.

[0335] Note that impurities are elements other than the main components of the oxide semiconductor, and include hydrogen, carbon, silicon, transition metal elements, etc. For example, elements such as silicon, which are more acidic than the metal elements constituting the oxide semiconductor Elements with a strong binding force with the matrix can cause disorder in the atomic arrangement of the oxide semiconductor by depriving it of oxygen, which becomes a factor in reducing the crystallinity. Also, heavy metals such as iron and nickel, argon, carbon dioxide, etc., have a large atomic radius (or molecular radius), so they become a factor in disturbing the atomic arrangement of the oxide semiconductor and reducing the crystallinity.

[0336] In addition, an oxide semiconductor with a low defect level density (few oxygen deficiencies) can have a low carrier density. Such an oxide semiconductor is called a high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor. CAAC-OS has a low impurity concentration and a low defect level density. That is, it is likely to become a high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor. Therefore, a transistor using CA AC-OS is less likely to have electrical characteristics (also called normally-on) where the threshold voltage becomes negative. Also, a high-purity intrinsic or substantially high-purity intrinsic oxide semiconductor has few carrier traps. The charge trapped in the carrier traps of the oxide semiconductor takes a long time to be released and behaves like a fixed charge in some cases. Therefore, a transistor using an oxide semiconductor with a high impurity concentration and a high defect level density may have unstable electrical characteristics. On the other hand, a transistor using CAAC-OS has small fluctuations in electrical characteristics and becomes a highly reliable transistor.

[0337] Also, since CAAC-OS has a low defect level density, carriers generated by light irradiation, etc., are less likely to be trapped in the defect levels. Therefore, a transistor using CAAC-OS has small fluctuations in electrical characteristics due to visible light or ultraviolet light irradiation.

[0338] ​​Next, a microcrystalline oxide semiconductor will be described.

[0339] Microcrystalline oxide semiconductors have regions where crystals can be confirmed in high-resolution TEM images. The microcrystalline oxide semiconductor has a crystal structure including a region in which a crystal part is not clearly observed and a region in which a crystal part is not clearly observed. The crystal part contained is 1 nm to 100 nm or 1 nm to 10 nm in size. In particular, fine crystals with sizes between 1 nm and 10 nm or between 1 nm and 3 nm are often The oxide semiconductor with nanocrystals is called nc-OS (nanocrystallin The nc-OS is called NC-Oxide Semiconductor. In some cases, the grain boundaries cannot be clearly seen in the TEM images. It is possible that the origin of the pellets in C-OS is the same as that of the pellets in C-OS. The crystalline part of the OS is sometimes called a pellet.

[0340] nc-OS is a material that is used in microscopic regions (e.g., regions between 1 nm and 10 nm, especially regions between 1 nm and The atomic arrangement has periodicity in the region of 3 nm or less. There is no regularity in the crystal orientation between the layers. Therefore, no orientation is observed throughout the film. Therefore, depending on the analysis method, nc-OS may be indistinguishable from amorphous oxide semiconductors. For example, an XRD apparatus that uses X-rays with a diameter larger than that of the pellet for nc-OS may be used. When the structure was analyzed using the out-of-plane method, the crystal plane was not shown. In addition, the probe diameter ( For example, electron diffraction (also called selected area electron diffraction) is performed using an electron beam of 50 nm or more. And a diffraction pattern such as a halo pattern is observed. On the other hand, for nc-OS, when nano-beam electron diffraction is performed using an electron beam with a probe diameter close to or smaller than the pellet size, spots are observed. Also, when nano-beam electron diffraction is performed on nc-OS, there are cases where regions with high luminance are observed in a circular (ring-shaped) pattern. Furthermore, there are cases where a plurality of spots are observed within the ring-shaped region. When using an electron beam with a probe diameter close to or smaller than the pellet size, nano-beam electron diffraction is performed. Spots are observed. Also, when nano-beam electron diffraction is performed on nc-OS, There are cases where regions with high luminance are observed in a circular (ring-shaped) pattern. Furthermore, there are cases where a plurality of spots are observed within the ring-shaped region. There are cases where a plurality of spots are observed within the ring-shaped region.

[0341] Thus, since the crystal orientations between pellets (nanocrystals) do not have regularity, nc-OS can also be called an oxide semiconductor having RANC (Random Aligned nanocrystals) or an oxide semiconductor having NANC (Non-Aligned nanocrystals). -OS can also be called an oxide semiconductor having RANC (Random Aligned nanocrystals) or an oxide semiconductor having NANC (Non-Aligned nanocrystals). or an oxide semiconductor having NANC (Non-Aligned nanocrystals). s).

[0342] nc-OS is an oxide semiconductor with higher regularity than an amorphous oxide semiconductor. Therefore, the density of defect levels in nc-OS is lower than that in an amorphous oxide semiconductor. However, nc-OS does not show regularity in crystal orientation between different pellets. Therefore, the density of defect levels in nc-OS is higher than that in C AAC-OS.

[0343] Next, the amorphous oxide semiconductor will be described.

[0344] An amorphous oxide semiconductor is an oxide semiconductor in which the atomic arrangement in the film is irregular and has no crystal part. An example is an oxide semiconductor having an amorphous state such as quartz. An oxide semiconductor having an amorphous state such as quartz is an example.

[0345] In a high-resolution TEM image of an amorphous oxide semiconductor, no crystal part can be confirmed.

[0346] When performing structural analysis on an amorphous oxide semiconductor using an XRD apparatus, out-of-p no peak indicating a crystal plane is detected in the analysis by the out-of-lane method. Also, when performing electron diffraction on an amorphous oxide semiconductor, a halo pattern is observed. Further, when performing nano-beam electron diffraction on an amorphous oxide semiconductor, no spots are observed, and only a halo pattern is observed. For the amorphous structure, various views have been presented. For example, a structure with no order in the atomic arrangement at all may be called a completely amorphous structure. Also, a structure that has no long-range order but may have order in the range from a certain atom to its nearest neighboring atom or the second nearest neighboring atom may also be called an amorphous structure. Therefore, according to the strictest definition, an oxide semiconductor having even a slight order in the atomic arrangement cannot be called an amorphous oxide semiconductor. Also, at least an oxide semiconductor having long-range order cannot be called an amorphous oxide semiconductor. Thus, since it has a crystalline part, for example, CAAC-OS and nc-OS cannot be called an amorphous oxide semiconductor or a completely amorphous oxide semiconductor.

[0347] ucture). Also, a structure that has no long-range order but may have order in the range from a certain atom to its nearest neighboring atom or the second nearest neighboring atom may also be called an amorphous structure. Therefore, according to the strictest definition, an oxide semiconductor having even a slight order in the atomic arrangement cannot be called an amorphous oxide semiconductor. Also, at least an oxide semiconductor having long-range order cannot be called an amorphous oxide semiconductor. Thus, since it has a crystalline part, for example, CAAC-OS and nc-OS cannot be called an amorphous oxide semiconductor or a completely amorphous oxide semiconductor. Therefore, since it has a crystalline part, for example, CAAC-OS and nc-OS cannot be called an amorphous oxide semiconductor or a completely amorphous oxide semiconductor.

[0348] Note that an oxide semiconductor may have a structure between nc-OS and an amorphous oxide semiconductor. An oxide semiconductor having such a structure is particularly called an amorphous-like oxide semiconductor (a-l ike OS:amorphous-like Oxide Semiconducto r).

[0349] a-like OS shows voids (also called voids) in the high-resolution TEM image. There may be cases. Also, in the high-resolution TEM image, there are regions where the crystal part can be clearly confirmed and regions where the crystal part cannot be confirmed.

[0350] Since it has looseness, a-like OS has an unstable structure. Below, it is shown that a-like OS has a more unstable structure compared to CAAC-OS and nc-OS by showing the change in structure due to electron irradiation.

[0351] As samples for electron irradiation, a-like OS (denoted as sample A), nc-OS (denoted as sample B) and CAAC-OS (denoted as sample C) are prepared. Any of the samples is an In-Ga-Zn oxide.

[0352] First, high-resolution cross-sectional TEM images of each sample are obtained. From the high-resolution cross-sectional TEM images, it can be seen that each sample has a crystal part.

[0353] The determination of which part is regarded as one crystal part can be performed as follows. For example , the unit cell of the crystal of InGaZnO 4 has 3 In-O layers and also has 6 Ga-Zn-O layers , and it is known to have a structure in which a total of 9 layers are stacked in the c-axis direction in a layered manner. The spacing between these adjacent layers is about the same as the lattice plane spacing of the (009) plane (also called the d value), and from crystal structure analysis, the value is determined to be 0.29 nm. Therefore, a location where the spacing of the lattice fringes is between 0.28 nm and 0.30 nm can be regarded as the crystal part of InGaZnO . Note that the lattice fringes correspond to the a-b plane of the crystal of InGaZnO . 4 seen as. Note that the lattice fringes correspond to the a-b plane of the crystal of InGaZnO 4 .

[0354] ​Figure 22 shows an example in which the average size of the crystal portions (from 22 to 45 locations) of each sample was investigated. However, the length of the lattice fringes described above is regarded as the size of the crystal portion. From Figure 22, it can be seen that a-like OS has crystal portions that increase in size according to the cumulative electron irradiation dose. Specifically, as shown by (1) in Figure 22, at the initial stage of observation by TEM, the crystal portions (also referred to as initial nuclei) that were about 1.2 nm in size grew to about 2.6 nm in size at a cumulative irradiation dose of 4.2×10 e / nm. On the other hand, it can be seen that nc-OS and CAAC-OS show no change in the size of the crystal portions in the range up to a cumulative electron irradiation dose of 4.2×10 e / nm. Specifically, as shown by (2) and (3) in Figure 22, regardless of the cumulative electron irradiation dose, the sizes of the crystal portions of nc-OS and CAAC-OS are about 1.4 nm and about 2.1 nm, respectively. That is. It can be seen that a-like OS has crystal portions that increase in size according to the cumulative electron irradiation dose. Specifically, as shown by (1) in Figure 22, at the initial stage of observation by TEM, the crystal portions (also referred to as initial nuclei) that were about 1.2 nm in size grew to about 2.6 nm in size at a cumulative irradiation dose of 4.2×10 8 e - / n m 2 On the other hand, it can be seen that nc-OS and CAAC-OS show no change in the size of the crystal portions in the range up to a cumulative electron irradiation dose of 4.2×10 e / nm. Specifically, 8 e - / nm 2 as shown by (2) and (3) in Figure 22, regardless of the cumulative electron irradiation dose, the sizes of the crystal portions of nc-OS and CAAC-OS are about 1.4 nm and about 2.1 nm, respectively. That is, it can be seen that a-like OS has crystal portions that increase in size according to the cumulative electron irradiation dose. On the other hand, it can be seen that nc-OS and CAAC-OS show no change in the size of the crystal portions in the range up to a cumulative electron irradiation dose of 4.2×10 e / nm. Specifically, as shown by (2) and (3) in Figure 22, regardless of the cumulative electron irradiation dose, the sizes of the crystal portions of nc-OS and CAAC-OS are about 1.4 nm and about 2.1 nm, respectively. It can be seen that a-like OS has crystal portions that increase in size according to the cumulative electron irradiation dose. On the other hand, it can be seen that nc-OS and CAAC-OS show no change in the size of the crystal portions in the range up to a cumulative electron irradiation dose of 4.2×10

[0355] As described above, a-like OS may have crystal portion growth due to electron irradiation. On the other hand, it can be seen that nc-OS and CAAC-OS show little crystal portion growth due to electron irradiation. That is, it can be seen that a-like OS has a less stable structure compared to nc-OS and CAAC- OS. That is, it can be seen that a-like OS has a less stable structure compared to nc-OS and CAAC- OS.

[0356] Also, because it has voids, a-like OS has a lower density structure compared to nc-OS and CAAC- OS. Specifically, the density of a-like OS is that of a single crystal of the same composition. It becomes 78.6% or more and less than 92.3% of the density of the crystal. Also, the density of nc-OS and CAA The density of C-OS becomes 92.3% or more and less than 100% of the density of a single crystal of the same composition. A single crystal An oxide semiconductor with a density of less than 78% of the density of a single crystal is difficult to form a film itself.

[0357] For example, in an oxide semiconductor satisfying In:Ga:Zn = 1:1:1 [atomic ratio], A single crystal InGaZnO having a rhombohedral crystal structure 4 has a density of 6.357 g / cm 3 Thus, for example, in an oxide semiconductor satisfying In:Ga:Zn = 1:1:1 [atomic ratio], the density of a-like OS is 5.0 g / cm or more and less than 5.9 g / cm 3 or more and less than 5.9 g / cm 3 less than. Also Furthermore, for example, in an oxide semiconductor satisfying In:Ga:Zn = 1:1:1 [atomic ratio], the density of nc-OS and the density of CAAC-OS are 5.9 g / cm 3 or more and less than 6.3 g / cm 3 less than.

[0358] Note that there may be no single crystal of the same composition. In that case, by combining single crystals with different compositions in an arbitrary ratio, the density corresponding to a single crystal in the desired composition can be estimated . The density corresponding to a single crystal of the desired composition may be estimated using a weighted average with respect to the ratio of combining single crystals with different compositions. However, it is preferable to estimate the density by combining as few types of single crystals as possible . .

[0359] As described above, the oxide semiconductor has various structures, each having various characteristics. Note that the oxide semiconductor is, for example, an amorphous oxide semiconductor, a-like OS, microcrystalline oxide It may be a laminated film having two or more of an organic semiconductor and a CAAC-OS.

[0360] The CAAC-OS film can be formed, for example, by the following method.

[0361] The CAAC-OS film is formed, for example, by a sputtering method using a target for sputtering an oxide semiconductor that is polycrystalline. to form a film.

[0362] By increasing the substrate temperature during film formation, migration of sputtering particles occurs after reaching the substrate. Specifically, the film is formed with the substrate temperature being 100°C or higher and 740°C or lower, preferably 200°C or higher and 500°C or lower. By increasing the substrate temperature during film formation, when sputtering particles reach the substrate, migration occurs on the substrate, and the flat surface of the sputtering particles adheres to the substrate. At this time, since the sputtering particles are positively charged, the sputtering particles adhere to the substrate while repelling each other, so that the sputtering particles do not overlap unevenly and a CAAC-OS film with uniform thickness can be formed. become ring particles adhere to the substrate while repelling each other, so that the sputtering particles do not overlap unevenly and a CAAC-OS film with uniform thickness can be formed. adhere to the substrate without overlapping unevenly, and a CAAC-OS film with uniform thickness can be formed.

[0363] By reducing the incorporation of impurities during film formation, it is possible to suppress the crystal state from being disrupted by the impurities. For example, the impurity concentration (such as hydrogen, water, carbon dioxide, and nitrogen) present in the film formation chamber may be reduced. Alternatively, the impurity concentration in the film formation gas may be reduced. Specifically, a film formation gas having a dew point of -80°C or lower, preferably -100°C or lower, is used. Moreover, it is preferable to increase the oxygen ratio in the film formation gas and optimize the power to reduce plasma damage during film formation. The oxygen ratio in the film formation gas is 30% by volume or more, preferably 100% by volume. is used.

[0364] In addition, it is preferable to increase the oxygen ratio in the film formation gas and optimize the power to reduce plasma damage during film formation. The oxygen ratio in the film formation gas is 30% by volume or more, preferably 100% by volume. volume %.

[0365] Alternatively, the CAAC-OS film is formed by the following method.

[0366] First, a first oxide semiconductor film is formed to have a thickness of 1 nm or more and less than 10 nm. The first oxide semiconductor film is formed by a sputtering method. Specifically, the substrate temperature is 100°C or higher and 500°C or lower, preferably 150°C or higher and 450°C or lower, and the oxygen ratio in the film-forming gas is 30 volume% or more, preferably 100 volume%, for film formation.

[0367] Next, heat treatment is performed to obtain a first CAAC-OS film with high crystallinity from the first oxide semiconductor film. The temperature of the heat treatment is 350°C or higher and 740°C or lower, preferably 450°C or higher and 650 °C or lower. Also, the time of the heat treatment is 1 minute or more and 24 hours or less, preferably 6 minutes or more and 4 hours or less. Further, the heat treatment may be performed in an inert atmosphere or an oxidizing atmosphere. Preferably, after performing the heat treatment in an inert atmosphere, the heat treatment is performed in an oxidizing atmosphere. By the heat treatment in the inert atmosphere, the impurity concentration of the first oxide semiconductor film can be reduced in a short time. On the other hand, oxygen vacancies may be generated in the first oxide semiconductor film by the heat treatment in the inert atmosphere. In that case, the oxygen vacancies can be reduced by the heat treatment in the oxidizing atmosphere. Note that the heat treatment may be performed under a reduced pressure of 1000 Pa or less, 100 Pa or less, 10 Pa or less, or 1 Pa or less. Under reduced pressure, the impurity concentration of the first oxide semiconductor film can be reduced even more in a short time. Since the first oxide semiconductor film has a thickness of 1 nm or more and less than 10 nm, it can be more easily crystallized by heat treatment than when the thickness is 1

[0368] 0 nm or more. When compared with the case where the thickness is 10 nm or more, it can be easily crystallized by heat treatment.

[0369] Next, a second oxide semiconductor film having the same composition as the first oxide semiconductor film is formed with a thickness of 10 nm or more and 5 0 nm or less. The second oxide semiconductor film is formed by a sputtering method. Specifically, the substrate temperature is 100°C or more and 500°C or less, preferably 150°C or more and 450 °C or less, and the oxygen ratio in the film-forming gas is 30 vol% or more, preferably 100 vol%, and the film is formed.

[0370] Next, heat treatment is performed to cause solid-phase growth of the second oxide semiconductor film from the first CAAC-OS film, resulting in a second CAAC-OS film with high crystallinity. The temperature of the heat treatment is 350 °C or more and 740°C or less, preferably 450°C or more and 650°C or less. Also, the time of the heat treatment is 1 minute or more and 24 hours or less, preferably 6 minutes or more and 4 hours or less. Also, the heat treatment may be performed in an inert atmosphere or an oxidizing atmosphere. Preferably, after heat treatment in an inert atmosphere, heat treatment is performed in an oxidizing atmosphere. By heat treatment in an inert atmosphere, the impurity concentration of the second oxide semiconductor film can be reduced in a short time. On the other hand, oxygen vacancies may be generated in the second oxide semiconductor film by heat treatment in an inert atmosphere. In that case, the oxygen vacancies can be reduced by heat treatment in an oxidizing atmosphere. Note that the heat treatment may be performed under a reduced pressure of 1 000 Pa or less, 100 Pa or less, 10 Pa or less, or 1 Pa or less. Under reduced pressure, the impurity concentration of the second oxide semiconductor film can be reduced even more in a short time.

[0371] As described above, a CAAC-OS film having a total thickness of 10 nm or more can be formed.

[0372] ​​​​​​​ Using the oxide semiconductor film having any of the above configurations, a display module according to one aspect of the present invention can be configured.

[0373] Note that this embodiment can be appropriately combined with other embodiments shown in this specification.

[0374] (Embodiment 7) In this embodiment, the configuration of a display module according to one aspect of the present invention will be described with reference to FIG. 23.

[0375] FIG. 23 is a diagram for explaining the configuration of a display module according to one aspect of the present invention. FIG. 23(A) is a top view of a display module according to one aspect of the present invention, and FIG. 23(B) is a cross-sectional view taken along the cutting line A2 - B2 in FIG. 23(A).

[0376] The display module shown in this embodiment is a top emission type display module using a color filter method. In this embodiment, the display module may have, for example, a configuration in which one color is represented by three sub-pixels of R (red), G (green), and B (blue), a configuration in which one color is represented by four sub-pixels of R, G, B, and W (white), a configuration in which one color is represented by four sub-pixels of R, G, B, and Y (yellow), etc. The color elements are not particularly limited, and colors other than RGBWY may be used, for example, cyan or magenta may be used.

[0377] The display module shown in FIG. 23(A) includes an insulating layer 890, a display unit 804, an operation circuit unit 806, and an FPC 808. The display unit 804 has an organic EL element as a light-emitting element. The operation circuit unit 806 includes, for example, a scanning line driving circuit and a signal line driving circuit.

[0378] In FIG. 23(B), the display module includes a first base material 800 (substrate 801, adhesive layer 8 03, insulating layer 805), a plurality of transistors, terminal 857, insulating layer 815, insulating layer 816 , insulating layer 817, a plurality of light-emitting elements, insulating layer 821, bonding layer 822, coloring layer 845, light-shielding layer 847, and a second base material 810 (insulating layer 815, adhesive layer 813, substrate 811). The bonding layer 822, insulating layer 815, adhesive layer 813, and substrate 811 are transmissive to visible light. The light-emitting elements and transistors included in the display unit 8 04 and the operation circuit unit 806 are sealed by the insulating layer 805, the insulating layer 8 15, and the bonding layer 822.

[0379] The display module described in this embodiment includes a first base material 800 that supports the terminal 857, a second base material 810 that overlaps the first base material, and an insulating layer 890 that is in contact with the bonding layer 822 that bonds the first base material 800 and the second base material 810. As a result, diffusion of impurities into the region surrounded by the insulating layer 890 can be suppressed. As a result, a novel display module excellent in convenience and reliability can be provided.

[0380] Note that, as shown in FIGS. 28(A) and 28(B), the insulating layer 890 may be formed such that the first base material 800 and the light-emitting element 830 are included in the space surrounded by the insulating layer 890.

[0381] The display unit 804 has transistors 8 20 and light-emitting elements 830 on the substrate 801 via the adhesive layer 803 and the insulating layer 805. The light-emitting element 830 has a lower electrode 8 31 on the insulating layer 817, an EL layer 833 on the lower electrode 831, and an upper electrode 835 on the EL layer 833. It does. That is, the light-emitting element 830 includes a lower electrode 831, an upper electrode 835, and an EL layer 833 sandwiched between the lower electrode 8 31 and the upper electrode 835.

[0382] The lower electrode 831 is electrically connected to the source electrode or the drain electrode of the transistor 820. The end of the lower electrode 831 is covered with an insulating layer 821. The lower electrode 831 preferably reflects visible light. The upper electrode 835 transmits visible light.

[0383] Further, the display unit 804 has a coloring layer 845 overlapping the light-emitting element 830 and a light-shielding layer 847 overlapping the insulating layer 821. The space between the light-emitting element 830 and the coloring layer 845 is filled with a bonding layer 822.

[0384] The insulating layers 815 and 816 have the effect of suppressing the diffusion of impurities into the semiconductor constituting the transistor. Further, it is preferable to select an insulating layer having a planarizing function for the insulating layer 817 to reduce surface irregularities caused by the transistor.

[0385] The operation circuit unit 806 has a plurality of transistors on the substrate 801 via an adhesive layer 803 and an insulating layer 805. In FIG. 23(B), one of the transistors included in the operation circuit unit 806 is shown.

[0386] By using a film with high moisture resistance for the insulating layer 805 and the insulating layer 815, it is possible to suppress the intrusion of impurities such as water into the light-emitting element 830 and the transistor 820, and improve the reliability of the display module. Further, it is preferable that the display module has a substrate to protect the surface of the display module from physical impact. The substrate 801 is attached to the adhesive layer 803. Therefore, it is bonded to the insulating layer 805. Also, the substrate 811 is bonded to the insulating layer 815 by the adhesive layer 813.

[0387] The terminal 857 is electrically connected to an external electrode that transmits an external signal (such as a video signal, a clock signal, a start signal, or a reset signal) or a potential to the operation circuit unit 806. Here, an example of providing the FPC 808 as an external electrode is shown. To prevent an increase in the number of processes, it is preferable that the terminal 857 be manufactured from the same material and in the same process as the electrodes and wirings used in the display unit and the drive circuit unit. Here, an example of manufacturing the terminal 857 from the same material and in the same process as the electrodes constituting the transistor 820 is shown.

[0388] In the display module shown in FIG. 23(B), the FPC 808 is located on the insulating layer 815. The connector 825 is connected to the terminal 857 through openings provided in the insulating layer 815, the bonding layer 822, the insulating layer 817, and the insulating layer 816. Also, the connector 825 continues to the FPC 808. The FPC 808 and the terminal 857 are electrically connected through the connector 825.

[0389] <An Example of Material and Forming Method> Next, materials and the like that can be used for the display module will be described. Note that descriptions of the configurations described above may be omitted.

[0390] For the substrate, materials such as glass, quartz, organic resin, metal, and alloy can be used. The substrate on the side where light is extracted from the light-emitting element uses a material that transmits the light.

[0391] In particular, it is preferable to use a flexible substrate. For example, organic resin or a degree of flexibility Glass, metal, or alloy with a certain thickness can be used.

[0392] Since the specific gravity of the organic resin is smaller than that of glass, using the organic resin as the flexible substrate can make the display module lighter than when using glass, which is preferable.

[0393] It is preferable to use a material with high toughness for the substrate. This can realize a display module with excellent shock resistance and difficult to break. For example, by using an organic resin substrate, a thin metal substrate or an alloy substrate, a lighter and less breakable display module can be realized compared with the case of using a glass substrate.

[0394] Metal materials and alloy materials have high thermal conductivity and can easily conduct heat throughout the substrate. Therefore, local temperature rise of the display module can be suppressed, which is preferable. The thickness of the substrate made of metal materials or alloy materials is preferably 10 μm or more and 200 μm or less, and more preferably 20 μm or more and 50 μm or less.

[0395] The materials constituting the metal substrate or alloy substrate are not particularly limited. For example, aluminum, copper, nickel, or alloys of metals such as aluminum alloy or stainless steel can be preferably used.

[0396] In addition, using a material with a high heat emissivity for the substrate can suppress the increase in the surface temperature of the display module and can suppress the destruction and reliability degradation of the display module. For example, the substrate can be a laminated structure of a metal substrate and a layer with a high heat emissivity (for example, metal oxides or ceramic materials can be used).

[0397] Examples of substrates having flexibility and translucency include film-like plastic substrates, such as polyimide (PI), aramid, polyethylene terephthalate (PET), polyethersulfone (PES), polyethylene naphthalate (PEN), polycarbonate (PC), nylon, polyetheretherketone (PEEK), polysulfone (PSF), polyetherimide (PEI), polyarylate (PAR), polybutylene terephthalate (P BT), silicone resin, and other plastic substrates can be used. Further, the substrate may contain fibers or the like, for example, it may contain prepregs or the like. Further, the substrate is not limited to a resin film, and may be a transparent nonwoven fabric obtained by continuously processing pulp into a sheet, a sheet containing artificial spider silk fibers containing a protein called fibroin, a composite obtained by mixing these with resin, a laminate of a nonwoven fabric made of cellulose fibers having a fiber width of 4 nm or more and 100 nm or less and a resin film, or a laminate of a sheet containing artificial spider silk fibers and a resin film may be used.

[0398] As the flexible substrate, a layer using the above materials may be laminated with a hard coat layer (for example, a silicon nitride layer or the like) that protects the surface of the device from scratches, or a layer made of a material capable of dispersing pressure (for example, an aramid resin layer or the like).

[0399] The flexible substrate can also be used by laminating a plurality of layers. In particular, when a structure having a glass layer is used, the barrier property against water and oxygen can be improved, and a highly reliable display module can be obtained.

[0400] For example, a flexible substrate having a glass layer, an adhesive layer, and an organic resin layer laminated from the side closer to the light-emitting element A plate can be used. The thickness of the glass layer is 20 μm or more and 200 μm or less, preferably 25 μm or more and 100 μm or less. The glass layer with such a thickness can simultaneously achieve high barrier properties against water and oxygen and flexibility. The thickness of the organic resin layer is 1 0 μm or more and 200 μm or less, preferably 20 μm or more and 50 μm or less. By providing such an organic resin layer, cracks and fractures in the glass layer can be suppressed, and the mechanical strength can be improved. By applying such a composite material of the glass material and the organic resin to the substrate, a highly reliable flexible display module can be obtained.

[0401] Here, a method for forming a flexible display module will be described.

[0402] Here, for the sake of convenience, a configuration including pixels and a driving circuit, a configuration including optical members such as color filters, a configuration including a touch sensor circuit, or a configuration including other functional members will be referred to as an element layer. The element layer includes, for example, a display element, and may further include wirings electrically connected to the display element, and elements such as transistors used for pixels and circuits.

[0403] Here, the support having an insulating surface on which the element layer is formed will be referred to as a

[0404] substrate. As a method for forming an element layer on a flexible substrate, there are a method of directly

[0405] forming the element layer on the substrate, and a method of forming the element layer on a supportWhen the material constituting the substrate has heat resistance against the heat applied in the element layer formation process, , it is preferable to form the element layer directly on the substrate because the process is simplified. At this time, when the element layer is formed with the substrate fixed to the support substrate, it is preferable because transportation within the apparatus and between apparatuses becomes easy.

[0406] Also, when using the method of transferring to the substrate after forming the element layer on the support substrate, first, a release layer and an insulating layer are laminated on the support substrate, and the element layer is formed on the insulating layer. Subsequently, the element layer is peeled off from the support substrate and transferred to the substrate. At this time, as the release layer, a material that causes peeling at the interface between the support substrate and the release layer, the interface between the release layer and the insulating layer, or within the release layer may be selected. By such a method, it becomes possible to perform processing at a temperature higher than the heat-resistant temperature of the substrate in the element layer formation process, so that the reliability of the display module can be improved. .

[0407] For example, as the release layer, a layer containing a high melting point metal material such as tungsten and a layer containing an oxide of the metal material are laminated and used, and as the insulating layer on the release layer, a layer in which a plurality of silicon nitride or silicon oxynitride layers are laminated is preferably used. When using a high melting point metal material, high-temperature processing can be performed during the formation of the element layer, and the reliability can be improved. For example, impurities contained in the element layer can be further reduced, and the crystallinity of semiconductors and the like contained in the element layer can be further enhanced. .

[0408] The peeling may be performed by applying a mechanical force to peel it off, removing the release layer by etching, or by dropping a liquid onto a part of the peeling interface and allowing it to penetrate the entire peeling interface.

[0409] Also, when peeling is possible at the interface between the support substrate and the insulating layer, the peeling layer may not be provided. For example, using glass as the support substrate and an organic resin such as polyimide as the insulating layer , a starting point for peeling is formed by locally heating a part of the organic resin with a laser beam or the like, and peeling may be performed at the interface between the glass and the insulating layer. Alternatively, between the support substrate and the insulating layer containing the organic resin , a layer of a material with high thermal conductivity such as metal or semiconductor is provided, and an electric current is passed through this to heat it to make it in a state where peeling is easy, and peeling may be performed. At this time, the insulating layer containing the organic resin can also be used as a substrate.

[0410] For the adhesive layer, various curable resins such as ultraviolet curable type photocurable resins, reaction curable resins, thermosetting resins, anaerobic resins can be used. Examples of these resins include epoxy resins, acrylic resins, silicone resins, phenolic resins, polyimide resins, imide resins, PVC (polyvinyl chloride) resins, PVB (polyvinyl butyral) resins, EVA (ethylene vinyl acetate) resins, etc. In particular, materials with low moisture permeability such as epoxy resins are preferred . Also, a two-component mixed resin may be used. Also, an adhesive sheet or the like may be used.

[0411] Also, a desiccant may be included in the above resin. For example, substances that adsorb moisture by chemical adsorption, such as oxides of alkaline earth metals (calcium oxide, barium oxide, etc.), can be used . Or, substances that adsorb moisture by physical adsorption, such as zeolite or silica gel, may be used . When a desiccant is included, it is possible to suppress the intrusion of impurities such as moisture into the light-emitting element, which is preferable because the reliability of the display module is improved.

[0412] Also, by mixing a filler or a light-scattering member having a high refractive index into the above resin, the light extraction efficiency from the light-emitting element can be improved. For example, titanium oxide, barium oxide, zeolite, zirconium, etc. can be used.

[0413] As the insulating layer 805 and the insulating layer 815, it is preferable to use an insulating film having high moisture resistance . Alternatively, it is preferable that the insulating layer 805 and the insulating layer 815 have a function of preventing the diffusion of impurities into the light-emitting element .

[0414] Examples of the insulating film having high moisture resistance include films containing nitrogen and silicon such as a silicon nitride film and a silicon oxynitride film, and films containing nitrogen and aluminum such as an aluminum nitride film. Also, a silicon oxide film, a silicon oxynitride film, an aluminum oxide film, etc. may be used.

[0415] For example, the water vapor transmission rate of the insulating film having high moisture resistance is 1×10 -5 [g / (m 2 ·day) or less, preferably 1×10 -6 [g / (m 2 ·day)] or less, more preferably 1×1 0 -7 [g / (m 2 ·day)] or less, even more preferably 1×10 -8 [g / (m 2 ·d ay)] or less.

[0416] In the display module, at least the insulating layer on the light-emitting surface side among the insulating layer 805 or the insulating layer 815 needs to transmit the light emitted by the light-emitting element. When the display module has the insulating layer 805 and the insulating layer 815, among the insulating layer 805 or the insulating layer 815, the light emitted by the light-emitting element is transmitted The insulating layer on the passing side preferably has a higher average transmittance at wavelengths of 400 nm or more and 800 nm or less than the other insulating layer. Preferably, the average transmittance is high.

[0417] The insulating layer 805 and the insulating layer 815 preferably contain oxygen, nitrogen, and silicon. For example, the insulating layer 805 and the insulating layer 815 preferably contain silicon oxynitride. Also, the insulating layer 805 and the insulating layer 815 preferably contain silicon nitride or silicon oxynitride. Further, the insulating layer 805 and the insulating layer 815 preferably have a silicon oxynitride film and a silicon nitride film, and the silicon oxynitride film and the silicon nitride film preferably contact each other. By alternately laminating the silicon oxynitride film and the silicon nitride film so that a lot of interference of opposite phases occurs in the visible region, the transmittance in the visible region of the laminate can be increased.

[0418] As for the material and formation method of the insulating layer 890, reference can be made to the description of the insulating layer 290 described in Embodiment 1. Further, as the insulating layer 890, the same material as that of the insulating layer 805 or the insulating layer 815 may be used.

[0419] The structure of the transistor included in the display module is not particularly limited. For example, it may be a staggered transistor or an inverted staggered transistor. Also, it may be any of a top gate type or a bottom gate type transistor structure. The semiconductor material used for the transistor is not particularly limited, and examples thereof include silicon, germanium, organic semiconductors, etc. Or, an oxide semiconductor containing at least one of indium, gallium, and zinc, such as an In-Ga-Zn-based metal oxide, may be used. Note that a transistor using an oxide semiconductor ​​​​​​​​​Regarding the configuration example of the transistor, the transistor described in the previous embodiment can be applied. This is possible.

[0420] For the purpose of stabilizing the characteristics of the transistor and the like, it is preferable to provide an underlayer film. As the underlayer film, inorganic insulating films such as a silicon oxide film, a silicon nitride film, a silicon oxynitride film, and a silicon nitride oxide film can be used and can be formed as a single layer or by lamination. The underlayer film can be formed by a sputtering method, a CVD (Chemical Vapor Deposition) method (such as a plasma CVD method, a thermal CVD method, a MOCVD (Metal Organic CVD) method, etc.), an ALD (Atomic Layer Deposition) method, a coating method, a printing method, or the like. Note that the underlayer film may not be provided if it is not necessary. In each of the above configuration examples, the insulating layer 805 can also serve as the underlayer film of the transistor. (Atomic Layer Deposition) method, a coating method, a printing method, etc. can be used for forming. Note that the underlayer film may not be provided if it is not necessary. In each of the above configuration examples, the insulating layer 805 can also serve as the underlayer film of the transistor. As the light-emitting element, an element capable of self-emission can be used, and an element whose luminance is controlled by current or voltage is included in that category. For example, a light-emitting diode (LED), an organic

[0421] EL element, an inorganic EL element, or the like can be used. EL element, an inorganic EL element, etc. can be used. As the light-emitting element, an element capable of self-emission can be used, and an element whose luminance is controlled by current or voltage is included in that category. For example, a light-emitting diode (LED), an organic

[0422] The light-emitting element may be any of a top emission type, a bottom emission type, and a dual emission type. For the electrode on the side where light is extracted, a conductive film that transmits visible light is used. The light-emitting element may be any of a top emission type, a bottom emission type, and a dual emission type. For the electrode on the side where light is extracted, a conductive film that transmits visible light is used. Also, for the electrode on the side where light is not extracted, it is preferable to use a conductive film that reflects visible light. This is preferred.

[0423] Examples of the conductive film that transmits visible light include indium oxide, indium tin oxide (ITO: Indium Tin Oxide), indium zinc oxide, zinc oxide (ZnO), and gallium It can be formed using zinc oxide added with lithium. Also, metals such as gold, silver, platinum, magnesium, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, or titanium, alloys containing these metal materials, or nitrides (e.g., titanium nitride) of these metal materials can also be used by forming them thinly enough to have light transmittance. Further, a laminated film of the above materials can be used as a conductive layer. For example, using a laminated film of an alloy of silver and magnesium and ITO can enhance conductivity, which is preferable. Also, graphene or the like may be used. A conductive film that reflects visible light can be formed using, for example, metal materials such as aluminum, gold, platinum, silver, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, or palladium, or alloys containing these metal materials. Also, rare earths such as lanthanum, neodymium, or germanium may be added to the above metal materials or alloys. Further, alloys containing aluminum such as an alloy of aluminum and titanium, an alloy of aluminum and nickel, an alloy of aluminum and neodymium, an alloy of aluminum, nickel, and lanthanum (Al-Ni-La), etc. (aluminum alloys), alloys containing silver such as an alloy of silver and copper, an alloy of silver, palladium, and copper (also denoted as Ag-Pd-Cu, APC), and an alloy of silver and magnesium can be used. An alloy containing silver and copper is preferable because of its high heat resistance. Furthermore, oxidization of the aluminum alloy film can be suppressed by laminating a metal film or a metal oxide film in contact with the aluminum alloy film. Examples of the materials for the metal film and the metal oxide film include titanium and titanium oxide. Also, a film composed of the above conductive film that transmits visible light and a metal material may be laminated. It can be formed using metal materials such as magnesium, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, or titanium, alloys containing these metal materials, or nitrides (e.g., titanium nitride) of these metal materials by forming them thinly enough to have light transmittance. Also, a laminated film of the above materials can be used as a conductive layer. For example, using a laminated film of an alloy of silver and magnesium and ITO can enhance conductivity, which is preferable. Also, graphene or the like may be used. It can be formed using metal materials such as magnesium, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, or titanium, alloys containing these metal materials, or nitrides (e.g., titanium nitride) of these metal materials by forming them thinly enough to have light transmittance. Also, a laminated film of the above materials can be used as a conductive layer. For example, using a laminated film of an alloy of silver and magnesium and ITO can enhance conductivity, which is preferable. Also, graphene or the like may be used. It can be formed using metal materials such as magnesium, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, or titanium, alloys containing these metal materials, or nitrides (e.g., titanium nitride) of these metal materials by forming them thinly enough to have light transmittance. Also, a laminated film of the above materials can be used as a conductive layer. For example, using a laminated film of an alloy of silver and magnesium and ITO can enhance conductivity, which is preferable. Also, graphene or the like may be used. Using a laminated film of an alloy of silver and magnesium and ITO, for example, can enhance conductivity, which is preferable. Also, graphene or the like may be used. Using a laminated film of an alloy of silver and magnesium and ITO, for example, can enhance conductivity, which is preferable. Also, graphene or the like may be used.

[0424] A conductive film that reflects visible light can be formed using, for example, metal materials such as aluminum, gold, platinum, silver, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, or palladium, or alloys containing these metal materials. A conductive film that reflects visible light can be formed using, for example, metal materials such as aluminum, gold, platinum, silver, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, or palladium, or alloys containing these metal materials. Also, rare earths such as lanthanum, neodymium, or germanium may be added to the above metal materials or alloys. Also, rare earths such as lanthanum, neodymium, or germanium may be added to the above metal materials or alloys. Also, alloys containing aluminum such as an alloy of aluminum and titanium, an alloy of aluminum and nickel, an alloy of aluminum and neodymium, etc. Also, alloys containing aluminum such as an alloy of aluminum and titanium, an alloy of aluminum and nickel, an alloy of aluminum and neodymium, an alloy of aluminum, nickel, and lanthanum (Al-Ni-La), etc. (aluminum alloys) Also, alloys containing aluminum such as an alloy of aluminum and titanium, an alloy of aluminum and nickel, an alloy of aluminum and neodymium, an alloy of aluminum, nickel, and lanthanum (Al-Ni-La), etc. (aluminum alloys), alloys containing silver such as an alloy of silver and copper, an alloy of silver, palladium, and copper (also denoted as Ag-Pd-Cu, APC), and an alloy of silver and magnesium can be used. Also, alloys containing aluminum such as an alloy of aluminum and titanium, an alloy of aluminum and nickel, an alloy of aluminum and neodymium, an alloy of aluminum, nickel, and lanthanum (Al-Ni-La), etc. (aluminum alloys), alloys containing silver such as an alloy of silver and copper, an alloy of silver, palladium, and copper (also denoted as Ag-Pd-Cu, APC), and an alloy of silver and magnesium can be used. An alloy containing silver and copper is preferable because of its high heat resistance. Furthermore, oxidization of the aluminum alloy film can be suppressed by laminating a metal film or a metal oxide film in contact with the aluminum alloy film. Examples of the materials for the metal film and the metal oxide film include titanium and titanium oxide. Also, a film composed of the above conductive film that transmits visible light and a metal material may be laminated. For example, a laminated film of silver and ITO, a laminated film of an alloy of silver and magnesium and ITO, etc. can be used. This is possible.

[0425] As the materials used for the lower electrode 831 and the upper electrode 835, the above-mentioned conductive film that transmits visible light or a conductive film that reflects visible light can be used.

[0426] The electrodes may be formed by using a vapor deposition method or a sputtering method, respectively. In addition, a discharge method such as an inkjet method, a printing method such as a screen printing method, or a plating method can be used for formation.

[0427] When a voltage higher than the threshold voltage of the light-emitting element is applied between the lower electrode 831 and the upper electrode 835, holes are injected into the EL layer 833 from the anode side, and electrons are injected from the cathode side. The injected electrons and holes recombine in the EL layer 833, and the light-emitting substance contained in the EL layer 833 emits light.

[0428] The EL layer 833 has at least a light-emitting layer. As layers other than the light-emitting layer, the EL layer 833 may further have a layer containing a substance with high hole injection property, a substance with high hole transport property, a hole blocking material, a substance with high electron transport property, a substance with high electron injection property, or a bipolar substance (a substance with high electron transport property and high hole transport property), etc.

[0429] Either a low molecular weight compound or a high molecular weight compound can be used for the EL layer 833, and it may contain an inorganic compound. The layers constituting the EL layer 833 can be formed by methods such as a vapor deposition method (including a vacuum vapor deposition method), a transfer method, a printing method, an inkjet method, a coating method, etc.

[0430] The light-emitting element 830 may contain two or more light-emitting substances. Thereby, for example, white light-emitting light-emitting elements can be realized. For example, white light emission can be obtained by selecting light-emitting substances such that the light emission of each of the two or more light-emitting substances is in a complementary color relationship. For example, light-emitting substances that exhibit light emission such as R (red), G (green), B (blue), Y (yellow), or O (orange), or light-emitting substances that exhibit light emission including spectral components of two or more colors among R, G, and B can be used. For example, a light-emitting substance that exhibits blue light emission and a light-emitting substance that exhibits yellow light emission may be used. At this time, the emission spectrum of the light-emitting substance that exhibits yellow light emission preferably includes spectral components of green and red. In addition, the emission spectrum of the light-emitting element 830 preferably has two or more peaks within the range of wavelengths in the visible region (for example, 350 nm or more and 750 nm or less, or 400 nm or more and 800 nm or less, etc.).

[0431] The EL layer 833 may have a plurality of light-emitting layers. In the EL layer 833, the plurality of light-emitting layers may be laminated in contact with each other, or may be laminated via a separation layer. For example, a separation layer may be provided between the fluorescent light-emitting layer and the phosphorescent light-emitting layer.

[0432] The separation layer can be provided, for example, to prevent energy transfer (particularly triplet energy transfer) by the Dexter mechanism from a phosphorescent material or the like generated in the phosphorescent light-emitting layer to a fluorescent material or the like in the fluorescent light-emitting layer. The separation layer may have a thickness of about several nm. Specifically, it is 0 .1 nm or more and 20 nm or less, or 1 nm or more and 10 nm or less, or 1 nm or more and 5 n m or less. The separation layer contains a single material (preferably a bipolar substance) or a plurality of materials (preferably a hole-transporting material and an electron-transporting material). ​

[0433] The separation layer may be formed using the materials contained in the light-emitting layer in contact with the separation layer. Thereby the production of the light-emitting element becomes easy, and the driving voltage is reduced. For example, when the phosphorescent light-emitting layer is composed of a host material, an assist material, and a phosphorescent material (guest material), the separation layer may be formed of the host material and the assist material. In other words, the separation layer has a region that does not contain the phosphorescent material, and the phosphorescent light-emitting layer has a region that contains the phosphorescent material. Thereby, it becomes possible to deposit the separation layer and the phosphorescent light-emitting layer separately by selecting the presence or absence of the phosphorescent material. Also, with such a configuration, it becomes possible to form the separation layer and the phosphorescent light-emitting layer in the same chamber. Thereby, the manufacturing cost can be reduced.

[0434] Also, the light-emitting element 830 may be a single element having one EL layer, or may be a tandem element having a plurality of EL layers stacked via a charge generation layer.

[0435] The light-emitting element is preferably provided surrounded by an insulating film with high moisture resistance. Thereby it is possible to suppress the intrusion of impurities such as water into the light-emitting element, and to suppress a decrease in the reliability of the display module.

[0436] As the insulating layer 815 and the insulating layer 816, for example, an inorganic insulating film such as a silicon oxide film, a silicon oxynitride film, or an aluminum oxide film can be used. Note that the insulating layer 815 and the insulating layer 816 may be formed of different materials. Also, as the insulating layer 817, for example, polyimide, acrylic, polyamide, polyimide amide, benzocyclobutene-based can be used. ​​Organic materials such as resins can be used respectively. Also, low dielectric constant materials (low-k materials ) etc. can be used. Also, by laminating a plurality of insulating layers, each insulating layer can be formed as well.

[0437] As the insulating layer 821, it is formed using an organic insulating material or an inorganic insulating material. As the resin , for example, polyimide resin, polyamide resin, acrylic resin, siloxane resin, epoxy resin, or phenolic resin etc. can be used. In particular, using a photosensitive resin material, an opening is formed on the lower electrode 831, and it is preferably formed such that the side wall of the opening becomes an inclined surface formed with a continuous curvature .

[0438] The method for forming the insulating layer 821 is not particularly limited, but a photolithography method, a sputtering method , an evaporation method, a droplet discharge method (inkjet method etc.), a printing method (screen printing, offset printing etc.) etc. can be used.

[0439] The conductive layer that functions as an electrode or wiring of a transistor, or an auxiliary electrode of a light-emitting element etc., and is used in a display module can be formed as a single layer or laminated using a metal material such as molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, scandium etc. or an alloy material containing these elements . Also, the conductive layer may be formed using a conductive metal oxide. As the conductive metal oxide, indium oxide (In 2 O 3 etc.), tin oxide (SnO 2 etc.), ZnO, ITO, indium zinc oxide (In 2 O 3 -ZnO etc.) or those obtained by including silicon oxide in these metal oxide materials can be used. It is possible.

[0440] The colored layer is a colored layer that transmits light in a specific wavelength band. For example, a color filter that transmits light in the wavelength band of red, green, blue, or yellow can be used. Each colored layer can be formed at a desired position by using various materials and by methods such as printing, inkjet, and etching using photolithography. Also, in the case of white sub-pixels, a resin such as transparent or white may be disposed so as to overlap with the light-emitting element. The light-shielding layer is provided between adjacent colored layers. The light-shielding layer shields light from adjacent light-emitting elements and suppresses color mixing between adjacent light-emitting elements. Here, by providing the end portion of the colored layer so as to overlap with the light-shielding layer, light leakage can be suppressed. As the light-shielding layer, a material that blocks light emission from the light-emitting element can be used. For example, a black matrix may be formed using a resin material containing a metal material, pigment, or dye. Note that it is preferable to provide the light-shielding layer in a region other than the display portion such as the drive circuit portion in order to suppress unintentional light leakage due to waveguide light or the like.

[0441]

[0442] An overcoat that covers the colored layer and the light-shielding layer may be provided. By providing the overcoat, diffusion of impurities contained in the colored layer into the light-emitting element can be prevented. The overcoat is composed of a material that transmits light emission from the light-emitting element. For example, an inorganic insulating film such as a silicon nitride film or a silicon oxide film, or an organic insulating film such as an acrylic film or a polyimide film can be used, and a laminated structure of an organic insulating film and an inorganic insulating film may be used.

[0443] In addition, when the material for the adhesive layer is applied onto the colored layer and the light-shielding layer, the material for the overcoat is It is preferable to use a material that has high wettability with respect to the material of the adhesive layer. As the substrate, an oxide conductive film such as an ITO film or a metal film such as an Ag film that is thin enough to have transparency is used. It is preferred to use a membrane.

[0444] As connectors, various anisotropic conductive films (ACF: Anisotropic Conductive Films) Conductive Film) and Anisotropic Conductive Paste (ACP) c Conductive Paste) can be used.

[0445] Note that this embodiment mode can be appropriately combined with other embodiment modes shown in this specification. do.

[0446] (Embodiment 8) In this embodiment, a display module according to one embodiment of the present invention will be described, which is different from that of the seventh embodiment. This will be described with reference to FIGS. 24 and 25.

[0447] FIG. 24 is a top view illustrating a display module of one embodiment of the present invention. The module 700 includes a pixel section 702 provided on a first base material 701 and a A source driver circuit portion 704 and a gate driver circuit portion 706 are provided in the pixel portion 7 02, arranged to surround the source driver circuit section 704 and the gate driver circuit section 706 A bonding layer 712 is attached to the first base material 701, and a second base material 705 is provided so as to face the first base material 701. and an insulating layer 790 arranged to surround the bonding layer 712. 701 and the second substrate 705 are sealed by a bonding layer 712 and an insulating layer 790 . That is, the pixel section 702, the source driver circuit section 704, and the gate driver circuit section 70 6 are sealed by the first base material 701, the bonding layer 712, the insulating layer 790, and the second base material 705 Although not shown in FIG. 24, a display element is provided between the first base material 701 and the second base material 705 .

[0448] In addition, the display module 700 has a region different from the region surrounded by the bonding layer 712 on the first base material 701, where the pixel section 702, the source driver circuit section 704, and the gate driver circuit section 706 are electrically connected to an FPC terminal section 708 (FPC: Flexible printed circuit), respectively . An FPC 716 is connected to the FPC terminal section 70 8, and various signals and the like are supplied to the pixel section 702, the source driver circuit section 704, and the gate driver circuit section 706 through the FPC 716. Also, signal lines 710 are connected to the pixel section 702, the source driver circuit section 704, the gate driver circuit section 706, and the FPC terminal section 708, respectively. Various signals and the like supplied by the FPC 716 are given to the pixel section 702, the source driver circuit section 704, the gate driver circuit section 706, and the FPC terminal section 708 via the signal lines 710 .

[0449] Also, a plurality of gate driver circuit sections 706 may be provided in the display module 700. Also , as the display module 700, an example is shown in which the source driver circuit section 704 and the gate driver circuit section 706 are formed on the same first base material 701 as the pixel section 702, but the configuration is not limited to this . For example, only the gate driver circuit section 706 is formed on the first base material 701 ​Alternatively, only the source driver circuit section 704 may be formed on the first base material 701. In this case, a substrate on which a source driver circuit or a gate driver circuit is formed ( For example, a driving circuit board formed of a single crystal semiconductor film or a polycrystalline semiconductor film is attached to a first base material 7 The method of connecting the separately formed drive circuit board is not particularly limited. Examples include, but are not limited to, COG (Chip On Glass) method, wire bonding A method such as a filtering method can be used.

[0450] The display module 700 includes a pixel portion 702, a source driver circuit portion 704, and The gate driver circuit section 706 includes a plurality of transistors. As the transistor, any of the transistors described in the above embodiments can be used.

[0451] The display module 700 can also include a liquid crystal element. An example of a display device is a liquid crystal display (transmissive liquid crystal display, semi-transmissive liquid crystal display, etc.). LCD, reflective LCD, direct-view LCD, projection LCD In addition, there are other types of LCDs that can realize semi-transmissive and reflective LCD displays. In this case, a part or the whole of the pixel electrode may be made to function as a reflective electrode. For example, a part or the whole of the pixel electrode may be made of aluminum, silver, etc. In this case, a memory circuit such as an SRAM should be provided under the reflective electrode. This makes it possible to further reduce power consumption.

[0452] The display method of the display module 700 may be a progressive method or an interleaved method. The s method or the like can be used. Also, when performing color display, the color elements controlled by pixels are not limited to the three colors of RGB (where R represents red, G represents green, and B represents blue). For example, it may be composed of four pixels: an R pixel , a G pixel, a B pixel, and a W (white) pixel. Or, like a pentile array, one color element may be composed of two of RGB, and different two colors may be selected and configured by the color elements. Or, one or more colors such as yellow, cyan, and magenta may be added to RGB. Note that the size of the display area may be different for each dot of the color element . However, the disclosed invention is not limited to a color display device, and can also be applied to a monochrome display device.

[0453] Also, in order to perform full-color display of a display device using white light ( W) for a backlight (such as an organic EL element, an inorganic EL element, an LED, a fluorescent lamp, etc.), a coloring layer (also referred to as a color filter .) may be used. The coloring layer can be used by appropriately combining, for example, red (R), green (G), blue (B) , yellow (Y), etc. By using the coloring layer, the color reproducibility can be improved compared to the case where the coloring layer is not used. At this time, by arranging the area having the coloring layer and the area not having the coloring layer, the white light in the area not having the coloring layer can be directly used for display. By arranging an area that does not have a coloring layer in part, when performing bright display, the decrease in luminance due to the coloring layer can be reduced, and the power consumption can be reduced by about 20% to 30%. However, when performing full-color display using a self-luminous There may be a case where power consumption can be further reduced compared to the case where [it is]. Note that in the present embodiment will describe a configuration without providing a backlight or the like, a so-called reflective liquid crystal display module, as follows explain.

[0454] The cross-sectional view taken along the dashed-dotted line A3 - B3 shown in FIG. 24 is shown in FIG. 25. Regarding the details of the display module shown in FIG. 25, the following explanation will be given.

[0455] <Explanation regarding the display module> The display module 700 shown in FIG. 25 includes a routing wiring portion 711, a pixel portion 702, a source driver circuit portion 704, and an FPC terminal portion 708. Further, the routing wiring portion 711 has signal lines 710. Also, the pixel portion 702 includes transistors 750 and capacitors 740. Further, the source driver circuit portion 704 includes a transistor 752 has.

[0456] As the transistors 750 and 752, the transistors shown above can be used be.

[0457] The transistor used in the present embodiment has an oxide semiconductor film with high purity and suppression of the formation of oxygen vacancies has. The transistor can reduce the current value (off-current value) in the off state can. Therefore, the holding time of an electrical signal such as an image signal can be lengthened, and the write interval can also be set long in the power-on state can. Therefore, since the frequency of the refresh operation can be reduced, the effect of suppressing power consumption is achieved.

[0458] Also, the transistor used in the present embodiment can obtain a relatively high field-effect mobility For example, a transistor capable of such high speed operation can be used for a liquid crystal display. By using this in a display device, the switching transistor in the pixel section and the driver circuit section In other words, the driver transistor can be formed on the same substrate as the driver circuit. Therefore, it is not necessary to use a semiconductor device formed from a silicon wafer or the like. The number of components can be reduced. By using a register, a high quality image can be provided.

[0459] The capacitor 740 has a structure having a dielectric between a pair of electrodes. One electrode of the transistor 740 is a conductive film that functions as a gate electrode of the transistor 750. The other electrode of the capacitor 740 is formed using a conductive film formed in the same process as that of the transistor. A conductive film is used to function as the source electrode and the drain electrode of the transistor 750. The dielectric sandwiched between the electrodes functions as a gate insulating layer for the transistor 750. An insulating layer is used.

[0460] 25, a transistor 750, a transistor 752, and a capacitor 74 0, insulating layers 764, 768 and a planarizing insulating layer 770 are provided.

[0461] The insulating layer 764 is formed by depositing, for example, a silicon oxide film or an oxynitride film using a PECVD apparatus. A silicon film or the like may be formed. The insulating layer 768 may be formed by, for example, a PECVD apparatus. A silicon nitride film or the like may be formed using a polyimide film. Polyimide resin, acrylic resin, polyimide amide resin, benzocyclobutene resin, polya Organic materials having heat resistance such as mid resin and epoxy resin can be used. Note that this By laminating a plurality of insulating layers formed of these materials, the planarized insulating layer 770 may be formed. Further, a configuration without providing the planarized insulating layer 770 may be employed. Also, as the material and formation method of the insulating layer 790, reference can be made to the description of the insulating layer 290 in Embodiment 1. As the insulating layer 790, the same material as the insulating layer 764 or the insulating layer 768 may be used.

[0462] Also, the signal line 710 is formed in the same process as the conductive film that functions as the source electrode and drain electrode of the transistors 750 and 752. Note that the signal line 710 may be a conductive film formed in a process different from the source electrode and drain electrode of the transistors 750 and 752, for example, a conductive film that functions as a gate electrode. When a material containing copper element is used as the signal line 710, signal delay due to wiring resistance is small, and display on a large screen is possible.

[0463] Also, the FPC terminal portion 708 includes a terminal 760, an anisotropic conductive film 780, and an FPC 716. Note that the terminal 760 is formed in the same process as the conductive film that functions as the source electrode and drain electrode of the transistors 750 and 752. Also, the terminal 760 is electrically connected to the terminal of the FPC 716 via the anisotropic conductive film 780.

[0464] As the first base material 701 and the second base material 705, for example, a glass substrate can be used. Also, as the first base material 701 and the second base material 705, a flexible substrate may be used. Examples of the flexible substrate include a plastic substrate.

[0465] Also, a structure 778 is provided between the first substrate 701 and the second substrate 705. The structure 778 is a columnar spacer obtained by selectively etching an insulating layer, and is provided to control the distance (cell gap) between the first substrate 701 and the second substrate 705. Note that a spherical spacer may be used as the structure 778. Also, in this embodiment, although the configuration in which the structure 778 is provided on the first substrate 701 side has been illustrated, it is not limited thereto. For example, a configuration in which the structure 778 is provided on the second substrate 705 side, or a configuration in which the structure 778 is provided on both the first substrate 701 and the second substrate 705 may be used. .

[0466] Also, on the second substrate 705 side, a light-shielding film 738 that functions as a black matrix, a colored film 736 that functions as a color filter, and an insulating layer 734 in contact with the light-shielding film 738 and the colored film 736 are provided.

[0467] The display module described in this embodiment includes a first substrate 701 that supports terminals 760, a second substrate 705 that overlaps the first substrate, and an insulating layer 790 in contact with a bonding layer 712 that bonds the first substrate 701 and the second substrate 705 together. Thereby, diffusion of impurities into the region surrounded by the insulating layer 790 can be suppressed. As a result, a novel display module excellent in convenience and reliability can be provided.

[0468] <Configuration example using a liquid crystal element as a display element> The display module 700 shown in FIG. 25 has a liquid crystal element 775. The liquid crystal element 775 has a conductive film 772, a conductive film 774, and a liquid crystal layer 776. The conductive film 774 is on the second substrate It is provided on the 705 side and has the function as a counter electrode. The display module 70 shown in FIG. 25 0 controls the transmission and non-transmission of light by changing the alignment state of the liquid crystal layer 776 according to the voltage applied to the conductive film 772 and the conductive film 774, and can display an image.

[0469] As the liquid crystal element used for the liquid crystal layer 776, thermotropic liquid crystal, low molecular liquid crystal, polymer liquid crystal, polymer dispersed liquid crystal, ferroelectric liquid crystal, antiferroelectric liquid crystal, etc. can be used. These liquid crystal materials show cholesteric phase, smectic phase, cubic phase, chiral nematic phase, isotropic phase, etc. depending on conditions.

[0470] In addition, the conductive film 772 is connected to a conductive film that functions as either the source electrode or the drain electrode of the transistor 750. The conductive film 772 is formed on the planarization insulating layer 770 and functions as a pixel electrode, that is, one electrode of the display element. Also, the conductive film 77 2 has the function as a reflective electrode. The display module 700 shown in FIG. 25 is a so-called reflective color liquid crystal display device that utilizes external light, reflects light with the conductive film 772, and displays through the coloring film 736.

[0471] As the conductive film 772, a conductive film that is transparent to visible light or a conductive film that is reflective to visible light can be used. As the conductive film that is transparent to visible light, for example, a material containing one selected from indium (In), zinc (Zn), and tin (Sn) may be used. As the conductive film that is reflective to visible light, for example, aluminum or a material containing silver may be used. In the present embodiment, as the conductive film 772, In visible light, a reflective conductive film is used.

[0472] In addition, when a conductive film 772 that is reflective in visible light is used as the conductive film, the conductive film may have a laminated structure. For example, an aluminum film with a thickness of 100 nm is formed on the lower layer, and a silver alloy film (for example, an alloy film containing silver, palladium, and copper) with a thickness of 30 nm is formed on the upper layer. By adopting the above structure, the following excellent effects can be achieved.

[0473] (1) The adhesion between the base film and the conductive film 772 can be improved. (2) It is possible to etch the aluminum film and the silver alloy film together with a chemical solution. (3) The cross-sectional shape of the conductive film 772 can be made into a good shape (for example, a tapered shape). (3) The reason for this is that the etching rate of the aluminum film by the chemical solution is slower than that of the silver alloy film, or when the lower aluminum film is exposed after the etching of the upper silver alloy film, electrons are drawn from aluminum, which is a base metal compared to the silver alloy film, or in other words, a metal with a high ionization tendency, so the etching of the silver alloy film is suppressed and the etching of the lower aluminum film proceeds faster.

[0474] In addition, in the display module 700 shown in FIG. 25, unevenness is provided on a part of the planarization insulating layer 7 70 of the pixel portion 702. The unevenness can be formed, for example, by forming the planarization insulating layer 770 with an organic resin film or the like and providing unevenness on the surface of the organic resin film. Also, the conductive film 772 that functions as a reflective electrode is formed along the above unevenness. Therefore, when external light is incident on the conductive film 772, the light is diffusely reflected on the surface of the conductive film 772. It becomes possible to improve visibility. As shown in FIG. 25, by using a reflective color liquid crystal display device, it becomes possible to display without using a backlight, so that power consumption can be reduced.

[0475] Note that the display module 700 shown in FIG. 25 is an example of a reflective color liquid crystal display module, but it is not limited thereto. For example, by using a conductive film that is translucent in visible light for the conductive film 772, a transmissive color liquid crystal display module may be used. In the case of a transmissive color liquid crystal display module, the unevenness provided on the planarization insulating layer 770 may not be provided.

[0476] Although not shown in FIG. 25, an alignment film may be provided on the side of the conductive films 772 and 774 that is in contact with the liquid crystal layer 776, respectively. Also, although not shown in FIG. 25, optical members (optical substrates) such as polarizing members, retardation members, and antireflection members may be provided as appropriate . For example, circular polarization using a polarizing substrate and a retardation substrate may be used. Also, in the case of a transmissive display module or a transflective display module, a backlight, a side light, etc. may be provided as a light source .

[0477] Note that when the horizontal electric field method is adopted as the liquid crystal element, a liquid crystal showing a blue phase without using an alignment film may be used. The blue phase is one of the liquid crystal phases and is a phase that appears immediately before the cholesteric liquid crystal is heated and transitions from the cholesteric phase to the isotropic phase. Since the blue phase appears only in a narrow temperature range, a liquid crystal composition in which several weight % or more of a chiral agent is mixed is used for the liquid crystal layer in order to improve the temperature range. A liquid crystal showing a blue phase and a chiral agent are included ​​​​​The liquid crystal composition has a short response time and is optically isotropic, so no alignment treatment is required. Also, The liquid crystal material exhibiting a blue phase has little viewing angle dependence. Also, since an alignment film does not need to be provided rubbing treatment is also unnecessary, so electrostatic breakdown caused by the rubbing treatment can be prevented, and defects and breakage of the liquid crystal display device during the manufacturing process can be reduced.

[0478] Also, when using a liquid crystal element as a display element, TN (Twisted Nematic ) mode, IPS (In-Plane-Switching) mode, FFS (Frin ge Field Switching) mode, ASM (Axially Symme tric aligned Micro-cell) mode, OCB (Optical Compensated Birefringence) mode, FLC (Ferroe lectric Liquid Crystal) mode, AFLC (AntiFerr oelectric Liquid Crystal) mode, etc. can be used .

[0479] Also, it may be a normally black type liquid crystal display device, for example, a transmissive liquid crystal display device adopting a vertical alignment (VA) mode. Examples of the vertical alignment mode include , for example, MVA (Multi-Domain Vertical Alignment ), PVA (Patterned Vertical Alignment) mode, ASV mode, etc. can be used.

[0480] Note that this embodiment can be appropriately combined with other embodiments shown in this specification.

[0481] For example, in this specification or the like, it is explicitly described that X and Y are connected In this case, the case where X and Y are electrically connected, the case where X and Y are functionally connected And the case where X and Y are directly connected are disclosed in this specification or the like Therefore, it is not limited to a predetermined connection relationship, for example, the connection relationship shown in the figure or the text And those other than the connection relationship shown in the figure or the text are also regarded as those described in the figure or the text That is

[0482] Here, it is assumed that X and Y are objects (for example, devices, elements, circuits, wirings, electrodes, terminals, conductive films Layers, etc.)

[0483] As an example of the case where X and Y are directly connected, an element that enables an electrical connection between X and Y (for example, a switch, a transistor, a capacitive element, an inductor, a resistive element, a diode A display element, a light-emitting element, a load, etc.) is not connected between X and Y And X and Y are connected without passing through an element that enables an electrical connection between X and Y (for example, a switch, a transistor, a capacitive element, an inductor, a resistive element, a diode A display element, a light-emitting element, a load, etc.) That is, the case where X and Y are connected is

[0484] As an example of the case where X and Y are electrically connected, an element that enables an electrical connection between X and Y (for example, a switch, a transistor, a capacitive element, an inductor, a resistive element, a diode A display element, a light-emitting element, a load, etc.) can be connected by one or more between X and Y It is possible. Note that the switch has a function of controlling on / off. That is, the switch Can be in a conductive state (on state) or a non-conductive state (off state) and conduct current flows It has a function of controlling whether current flows or not. Alternatively, the switch has a function of selecting and switching the path through which current flows. When X and Y are electrically connected, it shall include the case where X and Y are directly connected.

[0485] As an example of the case where X and Y are functionally connected, a circuit that enables the functional connection between X and Y (for example, a logic circuit (such as an inverter, NAND circuit, NOR circuit, etc.), a signal conversion circuit (DA conversion circuit, AD conversion circuit, gamma correction circuit, etc.), a potential level conversion circuit ( a power supply circuit (boost circuit, buck circuit, etc.), a level shifter circuit that changes the potential level of a signal etc.), a voltage source, a current source, a switching circuit, an amplification circuit (a circuit that can increase the signal amplitude or the amount of current, such as an operational amplifier, a differential amplification circuit, a source follower circuit, a buffer circuit, etc.), a signal generation circuit, a memory circuit, a control circuit, etc.) can be connected with one or more between X and Y. Even if another circuit is sandwiched between X and Y, when the signal output from X is transmitted to Y, X and Y are considered to be functionally connected. When X and Y are functionally connected, it shall include the case where X and Y are directly connected and the case where X and Y are electrically connected.

[0486] When it is explicitly described that X and Y are electrically connected, the case where X and Y are electrically connected (that is, the case where they are connected with another element or another circuit sandwiched between X and Y) and the case where X and Y are functionally connected (that is, the case where they are functionally connected with another circuit sandwiched between X and Y), and the case where X and Y are directly connected when (that is, when connected without another element or another circuit between X and Y) shall be as disclosed in this specification and the like. That is, when it is explicitly described as being electrically connected in the specification, it is assumed that the same content as when it is explicitly described simply as being connected is disclosed in this specification and the like.

[0487] For example, when the source (or the first terminal, etc.) of a transistor is electrically connected to X via (or without) Z1, and the drain (or the second terminal, etc.) of the transistor is electrically connected to Y via (or without) Z2, or when the source (or the first terminal, etc.) of the transistor is directly connected to a part of Z1, another part of Z1 is directly connected to X, the drain (or the second terminal, etc.) of the transistor is directly connected to a part of Z2, and another part of Z2 is directly connected to Y, it can be expressed as follows. It can be expressed as follows.

[0488] For example, it can be expressed as "X, Y, the source (or the first terminal, etc.) and the drain (or the second terminal, etc.) of the transistor are electrically connected to each other, and are electrically connected in the order of X, the source (or the first terminal, etc.) of the transistor, the drain (or the second terminal, etc.) of the transistor, Y." Or, "The source (or the first terminal, etc.) of the transistor is electrically connected to X, the drain (or the second terminal, etc.) of the transistor is electrically connected to Y, and X, the source (or the first terminal, etc.) of the transistor, the drain (or the second terminal, etc.) of the transistor, Y are electrically connected in this order." ​​​​​​​​​​​​Alternatively, "X is the source (or first terminal) of the transistor." ) and the drain (or the second terminal, etc.), and Y is electrically connected to X, The source (or first terminal, etc.) of a transistor, the drain (or second terminal, etc.) of a transistor, In these examples, Y is provided in this order. By using various expressions to specify the order of connections in a circuit configuration, The source (or first terminal, etc.) and the drain (or second terminal, etc.) of the transistor are separated. The technical scope can be determined separately.

[0489] Alternatively, for example, "the source (or first terminal, etc.) of a transistor" may be expressed as ) is electrically connected to X through at least a first connection path, and the first connection path does not have a second connection path, and the second connection path is a The source (or first terminal, etc.) of a transistor and the drain (or second terminal, etc.) of a transistor The first connection path is a path via Z1, and the second connection path is a path between the transistor The drain (or second terminal, etc.) of the transistor is connected to Y through at least a third connection path. the third connection path does not include the second connection path, and the third connection path is electrically connected to the The connection path of is the path through Z2. The source (or first terminal, etc.) of the resistor is connected to Z1 by at least the first connection path. and the first connection path does not have a second connection path. The second connection path has a connection path through a transistor, and the drain of the transistor The pin (or the second terminal, etc.) is connected to Y through Z2 by at least a third connection path. is electrically connected, and the third connection path does not have the second connection path. It can be expressed as follows. Or, "The source (or the first terminal, etc.) of the transistor is electrically connected to X via Z1 by at least the first electrical path, and the first electrical path does not have the second electrical path. The second electrical path is an electrical path from the source (or the first terminal, etc.) of the transistor to the drain (or the second terminal, etc.) of the transistor. The drain (or the second terminal, etc.) of the transistor is electrically connected to Y via Z2 by at least the third electrical path, and the third electrical path does not have the fourth electrical path. The fourth electrical path is an electrical path from the drain (or the second terminal, etc.) of the transistor to the source (or the first terminal, etc.) of the transistor." By using an expression method similar to these examples to define the connection paths in the circuit configuration, the source (or the first terminal, etc.) and the drain (or the second terminal, etc.) of the transistor can be distinguished to determine the technical scope. This can appear. Or, "The source (or the first terminal, etc.) of the transistor is electrically connected to X via Z1 by at least the first electrical path, and the first electrical path does not have the second electrical path. The second electrical path is an electrical path from the source (or the first terminal, etc.) of the transistor to the drain (or the second terminal, etc.) of the transistor. The drain (or the second terminal, etc.) of the transistor is electrically connected to Y via Z2 by at least the third electrical path, and the third electrical path does not have the fourth electrical path. The fourth electrical path is an electrical path from the drain (or the second terminal, etc.) of the transistor to the source (or the first terminal, etc.) of the transistor." It can be expressed in this way. By using an expression method similar to these examples to define the connection paths in the circuit configuration, the source (or the first terminal, etc.) and the drain (or the second terminal, etc.) of the transistor can be distinguished to determine the technical scope. is electrically connected to X via Z1 by at least the first electrical path, and the first electrical path does not have the second electrical path. The second electrical path is an electrical path from the source (or the first terminal, etc.) of the transistor to the drain (or the second terminal, etc.) of the transistor. The drain (or the second terminal, etc.) of the transistor is electrically connected to Y via Z2 by at least the third electrical path, and the third electrical path does not have the fourth electrical path. The fourth electrical path is an electrical path from the drain (or the second terminal, etc.) of the transistor to the source (or the first terminal, etc.) of the transistor." It can be expressed in this way. By using an expression method similar to these examples to define the connection paths in the circuit configuration, the source (or the first terminal, etc.) and the drain (or the second terminal, etc.) of the transistor can be distinguished to determine the technical scope. The first electrical path does not have the second electrical path. The second electrical path is an electrical path from the source (or the first terminal, etc.) of the transistor to the drain (or the second terminal, etc.) of the transistor. The drain (or the second terminal, etc.) of the transistor is electrically connected to Y via Z2 by at least the third electrical path, and the third electrical path does not have the fourth electrical path. The fourth electrical path is an electrical path from the drain (or the second terminal, etc.) of the transistor to the source (or the first terminal, etc.) of the transistor." It can be expressed in this way. By using an expression method similar to these examples to define the connection paths in the circuit configuration, the source (or the first terminal, etc.) and the drain (or the second terminal, etc.) of the transistor can be distinguished to determine the technical scope. from the source (or the first terminal, etc.) of the transistor to the drain (or the second terminal, etc.) of the transistor. The drain (or the second terminal, etc.) of the transistor is electrically connected to Y via Z2 by at least the third electrical path, and the third electrical path does not have the fourth electrical path. The fourth electrical path is an electrical path from the drain (or the second terminal, etc.) of the transistor to the source (or the first terminal, etc.) of the transistor." It can be expressed in this way. By using an expression method similar to these examples to define the connection paths in the circuit configuration, the source (or the first terminal, etc.) and the drain (or the second terminal, etc.) of the transistor can be distinguished to determine the technical scope. The drain (or the second terminal, etc.) of the transistor is electrically connected to Y via Z2 by at least the third electrical path, and the third electrical path does not have the fourth electrical path. The fourth electrical path is an electrical path from the drain (or the second terminal, etc.) of the transistor to the source (or the first terminal, etc.) of the transistor." It can be expressed in this way. By using an expression method similar to these examples to define the connection paths in the circuit configuration, the source (or the first terminal, etc.) and the drain (or the second terminal, etc.) of the transistor can be distinguished to determine the technical scope. is electrically connected to Y via Z2 by at least the third electrical path, and the third electrical path does not have the fourth electrical path. The fourth electrical path is an electrical path from the drain (or the second terminal, etc.) of the transistor to the source (or the first terminal, etc.) of the transistor." It can be expressed in this way. By using an expression method similar to these examples to define the connection paths in the circuit configuration, the source (or the first terminal, etc.) and the drain (or the second terminal, etc.) of the transistor can be distinguished to determine the technical scope. The third electrical path does not have the fourth electrical path. The fourth electrical path is an electrical path from the drain (or the second terminal, etc.) of the transistor to the source (or the first terminal, etc.) of the transistor." It can be expressed in this way. By using an expression method similar to these examples to define the connection paths in the circuit configuration, the source (or the first terminal, etc.) and the drain (or the second terminal, etc.) of the transistor can be distinguished to determine the technical scope. from the drain (or the second terminal, etc.) of the transistor to the source (or the first terminal, etc.) of the transistor." It can be expressed in this way. By using an expression method similar to these examples to define the connection paths in the circuit configuration, the source (or the first terminal, etc.) and the drain (or the second terminal, etc.) of the transistor can be distinguished to determine the technical scope. By using an expression method similar to these examples to define the connection paths in the circuit configuration, the source (or the first terminal, etc.) and the drain (or the second terminal, etc.) of the transistor can be distinguished to determine the technical scope. By defining the connection paths in the circuit configuration in this way, the source (or the first terminal, etc.) and the drain (or the second terminal, etc.) of the transistor can be distinguished to determine the technical scope. the source (or the first terminal, etc.) and the drain (or the second terminal, etc.) of the transistor can be distinguished to determine the technical scope. This can be done.

[0490] Note that these expression methods are just examples and are not limited to these expression methods. Here, X, Y, Z1, and Z2 are assumed to be objects (such as devices, elements, circuits, wirings, electrodes, terminals, conductive films, layers, etc.). It is assumed that X, Y, Z1, and Z2 are objects (such as devices, elements, circuits, wirings, electrodes, terminals, conductive films, layers, etc.).

[0491] Note that even if components that are independent on the circuit diagram are shown as being electrically connected, there may be a case where one component has the functions of multiple components. For example, when a part of the wiring also functions as an electrode, one conductive film has the functions of the wiring and even if components that are independent on the circuit diagram are shown as being electrically connected, there may be a case where one component has the functions of multiple components. For example, when a part of the wiring also functions as an electrode, one conductive film has the functions of the wiring and functions of the wiring and and has the functions of both the connection and the electrode. Therefore, in this specification electrically connecting means that even in a case where one conductive film has the functions of a plurality of components it is included in this category.

Explanation of Signs

[0492] 10 Processing member 100 Transistor 101 Substrate 102 Gate electrode 103 Insulating layer 104 Oxide semiconductor layer 104a Channel region 104b n-type region 104c n-type region 105a Electrode 105b Electrode 106 Insulating layer 107 Insulating layer 110 Transistor 114 Oxide semiconductor layer 114a Oxide semiconductor layer 114b Oxide semiconductor layer 120 Transistor 124 Oxide semiconductor layer 124a Oxide semiconductor layer 124b Oxide semiconductor layer 124c Oxide semiconductor layer 150 Transistor 151 Insulating layer 152 Insulating layer 154 Insulating layer 156 Insulating layer 160 Transistor 164 Oxide semiconductor layer 164a Oxide semiconductor layer 164b Oxide semiconductor layer 164c Oxide semiconductor layer 170 Transistor 180 Film formation chamber 181a Raw material supply section 181b Raw material supply section 182 Control Unit 182a Flow Controller 182b Flow Controller 182c Flow Controller 182h Heating Mechanism 183 Inlet 184 Outlet 185 Exhaust Device 186 Support 186a Mask 186B Support 187 Heating Mechanism 188 Door 190 Film Coating Device 196 Separate Film 199 Opening 200 Display Panel 200B Display Panel 200C Display Panel 200D Display Panel 200E Display Panel 200F Display Panel 200M Display Module 200MB Display Module 200MC Display Module 200MD Display Module 203G Drive Circuit 205 Bonding Layer 210 Substrate 210a Barrier Film 210b Substrate 210c Adhesive Layer 211 Wiring 219 Terminal 221 Flexible Printed Circuit Board 222 Anisotropic Conductive Film 223 Mask 224 Mask 225 Microcrack 250 Display Element 270 Substrate 270a Barrier Film 270b Substrate 270c Adhesive Layer 290 Insulating Layer 291 Opening 292 Opening 295 Opening 298 Resin layer 700 Display module 701 Substrate 702 Pixel section 704 Source driver circuit section 705 Substrate 706 Gate driver circuit section 708 FPC terminal section 710 Signal line 711 Wiring section 712 Bonding layer 716 FPC 734 Insulating layer 736 Colored film 738 Light-shielding film 740 Capacitive element 750 Transistor 752 Transistor 760 Terminal 764 Insulating layer 768 Insulating layer 770 Planarizing insulating layer 772 Conductive film 774 Conductive film 775 Liquid crystal element 776 Liquid crystal layer 778 Structure 780 Anisotropic conductive film 790 Insulating layer 800 Substrate 801 Substrate 803 Adhesive layer 804 Display section 805 Insulating layer 806 Operation circuit section 808 FPC 810 Substrate 811 Substrate 813 Adhesive layer 815 Insulating layer 816 Insulating layer 817 Insulating layer 820 Transistor 821 Insulating layer 822 Bonding layer 825 Connector 830 Light-emitting element 831 Lower electrode 833 EL layer 835 Upper electrode 845 Coloring layer 847 Light-shielding layer 857 Terminal 890 Insulating layer 5100 Pellet 5120 Substrate 5161 Region

Claims

1. The terminals and A first substrate supporting the terminal; a second substrate having an area overlapping the first substrate; a bonding layer that bonds the first base material and the second base material together; a display element electrically connected to the terminal between the first base material and the second base material; an insulating layer in contact with the first base material, the second base material, and the bonding layer; the insulating layer has an opening in a region overlapping the display element; Display panel.

2. A resin layer is provided. The insulating layer has a region sandwiched between the bonding layer and the resin layer. The display panel according to claim 1 .

3. The display element includes a light-emitting organic compound. The display panel according to claim 1 or 2.

4. The first substrate is flexible. The second substrate is flexible. The display panel according to claim 1 .

5. The display element includes a liquid crystal. The display panel according to claim 1 or 2.

6. A display module according to any one of claims 1 to 5; and a flexible printed circuit board electrically connected to the terminal.

7. a first step of preparing a processed member having a terminal, a first base material supporting the terminal, a second base material having an area overlapping the first base material, a bonding layer bonding the first base material and the second base material, and a display element electrically connected to the terminal between the first base material and the second base material, and forming a mask in the area overlapping the display element; a second step of forming an insulating layer in contact with the first substrate, the second substrate, and the bonding layer by atomic layer deposition; 2. The method for producing a display panel according to claim 1, further comprising a third step of removing a part of the insulating layer together with the mask.

Images