Light-emitting display device

Abstract

To block or reduce a horizontal leakage current between sub-pixels.SOLUTION: According to an embodiment of the present invention, a light-emitting display device may include: a substrate including a first sub-pixel and a second sub-pixel, each comprising a light-emitting portion and a non-light-emitting portion surrounding the light-emitting portion; a first electrode disposed in each of the first and second sub-pixels; a bank including a bank hole located in the light-emitting portion and a bank trench located in the non-light-emitting portion; a second spacer disposed in the bank trench; a light-emitting layer disposed on the first electrode and the second spacer, the light-emitting layer including a plurality of stacks and at least one charge generation layer disposed between the stacks; and a second electrode disposed on the light-emitting layer.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] The present invention relates to a light-emitting display device, and more particularly to a light-emitting display device having a structure for preventing leakage current between adjacent sub-pixels. More specifically, it is for solving the problem of poor visibility due to leakage current between adjacent sub-pixels that occurs when the interval between sub-pixels becomes narrow at high resolution, and relates to a light-emitting display device that blocks leakage current generated between adjacent sub-pixels to improve color reproducibility.

Background Art

[0002] Recent display devices that can display various information and interact with users who view the relevant information are required to have various sizes, various forms, and various functions.

[0003] Such display devices include a liquid crystal display device (LCD), an electrophoretic display device (FPD), and a light-emitting display device (LED).

[0004] The light-emitting display device is a self-luminous display device, and unlike a liquid crystal display device (LCD), it does not require a separate light source, so it can be manufactured to be lightweight and thin. In addition, the light-emitting display device is not only advantageous in terms of power consumption by low-voltage driving, but also excellent in terms of hue composition, response speed, viewing angle, and contrast ratio (CR), so it is being studied as a next-generation display.

[0005] Although the description will be made on the assumption that the light-emitting display device is an organic light-emitting display device, the type of the light-emitting layer is not limited thereto.

[0006] The light-emitting display device emits light from a plurality of pixels including a light-emitting layer having a light-emitting substance layer and displays information on a screen. Depending on the method of driving the pixels, it can be classified into an active matrix type light-emitting display device or a passive matrix type light-emitting display device.

[0007] The active matrix type light-emitting display device controls the current flowing through the light-emitting diode using a thin film transistor (Thin Film Transistor; or "TFT") to display an image.

[0008] The light-emitting display device has an anode electrode, a light-emitting layer, and a cathode electrode. When voltages are applied to the anode electrode and the cathode electrode respectively, holes are moved to the light-emitting layer at the anode electrode and electrons are moved to the light-emitting layer at the cathode electrode. When holes and electrons combine in the light-emitting layer, excitons are formed in the excitation process, and light is generated by the energy from the excitons.

[0009] In order to provide high-quality video information, the resolution of the light-emitting display device is gradually increasing. As the resolution increases, the separation distance between each sub-pixel becomes narrower, but there is a problem that the image information is distorted by the current leaking in the lateral direction between adjacent pixels.

[0010] Accordingly, in order to configure a high-resolution light-emitting display device, various studies have been made to prevent lateral leakage current (Lateral Leakage Current, LLC), but since it is not yet sufficient, development for this is urgently required.

Summary of the Invention

Problems to be Solved by the Invention

[0011] The problem to be solved by the present invention is to provide a light-emitting display device having a bank trench including at least one second spacer between adjacent sub-pixels in order to block or reduce the horizontal leakage current that increases due to the reduction in the interval between adjacent sub-pixels.

[0012] Another problem to be solved by the present invention is to provide a light-emitting display device that prevents electrons from moving to adjacent sub-pixels by cutting the light-emitting layer disposed between adjacent sub-pixels in order to prevent electrons formed inside the light-emitting layer from moving to adjacent sub-pixels during driving.

[0013] Another problem to be solved by the present invention is to provide a light-emitting display device having a structure that blocks horizontal leakage current in order to solve the problem of poor visibility in which adjacent sub-pixels emit light in a low tone and improve the color reproduction rate.

Means for Solving the Problems

[0014] According to an embodiment of the present invention, a light-emitting display device can include a substrate including a first sub-pixel and a second sub-pixel each including a light-emitting portion and a non-light-emitting portion surrounding the light-emitting portion, a first electrode disposed on the first sub-pixel and the second sub-pixel, a bank including a bank hole located in the light-emitting portion and a bank trench located in the non-light-emitting portion, a second spacer disposed in the bank trench, a light-emitting layer disposed on the first electrode and the second spacer and including a plurality of stacks and at least one charge generation layer disposed between the plurality of stacks, and a second electrode disposed on the light-emitting layer.

Effects of the Invention

[0015] The light-emitting display device according to an embodiment of the present invention can block the horizontal leakage current that increases as the interval between adjacent sub-pixels decreases by disposing a bank trench including at least one second spacer.

[0016] Since the light-emitting layer of the light-emitting display device according to an embodiment of the present invention is cut between adjacent sub-pixels by a bank trench including at least one second spacer, it is possible to prevent electrons formed inside the light-emitting layer from moving to adjacent pixels during driving.

[0017] The light-emitting display device according to an embodiment of the present invention can solve the visibility problem of adjacent pixels emitting light at a low tone and improve the color reproduction rate because the horizontal leakage current is blocked between adjacent sub-pixels.

[0018] The effects of the present invention are not limited to the effects mentioned above, and other effects not mentioned will be clearly understood by those skilled in the art from the following description.

Brief Description of the Drawings

[0019]

Figure 1

Figure 2

Figure 3

Figure 4a

Figure 4b

Figure 4c

Figure 4d

Figure 5

Modes for Carrying Out the Invention

[0020] The advantages and features of the present invention, and the method for achieving them, will become clear by referring to the embodiments described in detail below together with the attached drawings. However, this specification is not limited to the embodiments disclosed below and will be configured in various different forms, provided that these embodiments make the disclosure of the present invention complete and are provided to fully inform those with ordinary knowledge in the technical field to which the present invention pertains of the scope of the invention, and this specification is only defined by the scope of the claims.

[0021] The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining the embodiments of the present invention are exemplary, so the present invention is not limited to the matters illustrated. The same reference numerals throughout the specification indicate the same components. Also, in the description of this specification, when it is determined that a specific description of related known technologies may unnecessarily obscure the gist of the present invention, the detailed description thereof will be omitted. When terms such as "including", "having", "consisting of", etc. are used in this specification, other parts may be added as long as "only" is not used. When a component is expressed in the singular, it includes the case of including a plurality unless otherwise explicitly stated.

[0022] In the interpretation of components, even if there is no separate explicit description of the error range, it is interpreted as including the error range.

[0023] In the case of an explanation of the positional relationship, for example, when the positional relationship between two parts is explained by "above", "on the upper part", "on the lower part", "sideways", etc., for example, as long as "immediately" or "directly" is not used, one or more other parts may be located between the two parts.

[0024] In the case of an explanation of the time relationship, when the time sequence relationship is explained by "after", "subsequent to", "next", "before", etc., as long as "immediately" or "directly" is not used, the case of not being continuous can also be included.

[0025] The terms such as "first", "second", etc. are used to describe various components, but these components are not limited by these terms. These terms are merely used to distinguish one component from another. Therefore, the first component mentioned below may be the second component within the technical concept of the present invention.

[0026] In the description of the components of the present invention, terms such as "first", "second", "A", "B", "(a)", "(b)", etc. can be used. Such terms are merely for distinguishing the components from others, and the essence, order, sequence, or number of the corresponding components are not limited by these terms. When a component is described as being "connected", "coupled", or "joined" to another component, the component can be directly connected or joined to the other component, but it should be understood that other components may "intervene" between the components that can be indirectly connected or joined, unless otherwise explicitly stated.

[0027] "At least one" should be understood to include all combinations of one or more of the related components. For example, the meaning of "at least one of the first, second, and third components" can be said to include not only the first, second, or third components, but also combinations of two or more of the first, second, and third components.

[0028] As used herein, the "device" can include display devices such as a liquid crystal module (LCM) including a display panel and a driving unit for driving the display panel, and an organic light emitting display module (OLED Module). And it can also include electronic equipment devices such as a notebook computer, a television, a computer monitor, an automotive apparatus or other forms of a vehicle including a complete product or a final product containing an LCM, an OLED module, etc., and a set electronic device or a set device such as a mobile electronic apparatus like a smartphone or an electronic pad.

[0029] Therefore, the device herein can include the display device itself such as an LCM, an OLED module, etc., and also include a set device which is an application product or a device for the end consumer containing an LCM, an OLED module, etc.

[0030] And in some embodiments, the LCM and OLED module composed of a display panel, a driving unit, etc. may be expressed as a "display device", and the electronic device as a complete product containing the LCM and OLED module may be distinguished and expressed as a "set device". For example, the display device can include a liquid crystal (LCD) or an organic light emitting (OLED) display panel and a source PCB which is a control unit for driving the display panel. The set device can further include a set PCB which is a set control unit electrically connected to the source PCB to drive the whole set device.

[0031] The display panel used in the embodiments of the present invention can be any form of display panel such as a liquid crystal display panel, an organic light emitting diode (OLED) display panel, and an electroluminescent display panel, and the embodiments are not limited thereto. For example, the display panel can be a display panel that can generate sound by vibrating by the vibration device according to the embodiments of the present invention. The display panel applied to the display device according to the embodiments of the present invention is not limited by the form and size of the display panel.

[0032] Each feature of the various embodiments of the present invention can be partially or wholly combined or combined with each other, various linkages and drives are possible technically, and each embodiment may be implemented independently of each other or may be implemented together in a related relationship.

[0033] Hereinafter, the embodiments of the present invention will be examined in detail through the attached drawings and examples as follows. Since the scale of the components illustrated in the drawings has a scale different from the actual one for convenience of explanation, it is not limited to the scale illustrated in the drawings.

[0034] Hereinafter, various embodiments of the present invention will be described in detail with reference to the drawings.

[0035] FIG. 1 is a plan view of a light-emitting display device according to an embodiment of the present invention.

[0036] Referring to FIG. 1, the light-emitting display device 100 of the present invention can include various additional elements for generating various signals and driving a plurality of sub-pixels SP_1, SP_2, SP_3 within the display area AA. For example, one or more driving circuits for controlling the display panel may be included in the light-emitting display device 100. The driving circuit for controlling (or driving) the sub-pixels SP_1, SP_2, SP_3 can include a gate driving unit 112, data signal lines, a multiplexer (MUX), an electrostatic discharge (ESD) circuit, a high-potential voltage wiring VDD, a low-potential voltage wiring VSS, an inverter circuit, and the like. The light-emitting display device 100 can also include additional elements in addition to the functions for driving the sub-pixels SP_1, SP_2, SP_3. For example, the light-emitting display device 100 can include additional elements that provide a touch sensing function, a user authentication function (e.g., fingerprint recognition), a multi-level pressure sensing function, a tactile feedback function, and the like. The aforementioned additional elements can be located in the non-display area NA or an external circuit connected to the connection interface.

[0037] The substrate 110 can include an active area (AA) and a non-active area (NA). The active area AA of the substrate 110 can be an area where a plurality of pixels P are arranged and an image is displayed. The non-active area NA of the substrate 110 can be an area where an image is not displayed. For example, the non-active area NA can be a bezel area, but is not limited to this term. The non-active area NA is adjacent to the active area AA and can be arranged outside the active area AA. Or the non-active area NA can be arranged so as to surround the whole or a part of the active area AA. Or the non-active area NA can be an area where the plurality of sub-pixels SP_1, SP_2, SP_3 are not arranged, but is not limited thereto.

[0038] The pixel P disposed in the display area AA can further include a plurality of sub-pixels SP_1, SP_2, and SP_3. The sub-pixels SP_1, SP_2, and SP_3 are individual units that emit light, and the plurality of sub-pixels SP can include, but are not limited to, a red sub-pixel SP_R, a green sub-pixel SP_G, a blue sub-pixel SP_B, and / or a white sub-pixel, etc.

[0039] An organic light emitting diode and a driving circuit are formed in each of the sub-pixels SP_1, SP_2, and SP_3. For example, a display element for displaying an image and a driving circuit for driving (or controlling) the display element can be arranged in the plurality of sub-pixels SP_1, SP_2, and SP_3.

[0040] One sub-pixel SP can include a plurality of transistors, capacitors, and a plurality of wirings. For example, the sub-pixel SP can be composed of two transistors and one capacitor (2T1C), but is not limited thereto, and may be composed of sub-pixels applying 3T1C, 4T1C, 5T1C, 6T1C, 7T1C, 3T2C, 4T2C, 5T2C, 6T2C, 7T2, 8T2C, etc.

[0041] The non-display area NA is an area where various wirings, driving circuits, etc. for driving the plurality of sub-pixels SP_1, SP_2, and SP_3 disposed in the display area AA are arranged. For example, various ICs such as a gate driving unit 112 and a data driving unit and driving circuits, etc. can be arranged in the non-display area NA.

[0042] Although FIG. 1 illustrates the non-display area NA surrounding the display area AA in a rectangular form, the form of the display area AA, the form and arrangement of the non-display area NA adjacent to the display area AA are not limited to the example illustrated in FIG. 1. The display area AA and the non-display area NA can be in a form suitable for the design of the electronic device equipped with the light-emitting display device 100. In the case of a display device of a wearable device, it may have a circular form like a general wristwatch, and the concept of the embodiments of the present invention may also be applied to a free-form display device applicable to a vehicle instrument panel or the like. Exemplary forms of the display area AA can be, but are not limited to, pentagon, hexagon, octagon, circle, ellipse, etc.

[0043] A bending area (BA) can be provided in a part of the non-display area NA. The bending area BA can be provided between the display area AA and the pad portion 114 located in the non-display area NA. Also, the bending area BA can be an area where a connecting wiring portion is formed.

[0044] The bending region BA can be a region where a part of the substrate 110 is bent (bent) in order to dispose the pad portion 114 and an external module bonded to the pad portion 114 on the back side of the substrate 110. For example, when the bending region BA is bent in the back direction of the substrate 110, the external module bonded to the pad portion 114 of the substrate 110 will move to the back side of the substrate 110, and the external module may not be visible when viewed from the top of the substrate 110. FIG. 1 shows a planar view of the light-emitting display device 100 where the pad portion 114 is visible before the bending region BA is bent. After the bending region BA is bent, the pad portion 114 is disposed at the upper part of the back surface of the light-emitting display device 100, and the pad portion 114 cannot be seen from the front surface of the light-emitting display device 100. Also, when the bending region BA is bent, the size of the non-display region NA visible at the upper part of the substrate 110 can be reduced to form a narrow bezel. In the present invention, the bending region BA is illustrated as being in the non-display region NA, but it is not limited thereto. For example, the bending region BA can be located in the display region AA, and since the display region AA itself can be bent in various directions, the bending region BA located in the display region AA can also have the effects mentioned in the present invention.

[0045] The pad portion 114 is disposed on one side of the non-display region NA. The pad portion 114 is a metal pattern to which an external module, for example, an FPCB (flexible printed circuit board), and a COF (chip on film), etc. are bonded. Although the pad portion 114 is illustrated as being disposed on one side of the substrate 110, the form and arrangement of the pad portion 114 are not limited thereto.

[0046] On the other side of the non-display area NA, a gate driving unit 112 that provides a gate signal to the thin film transistor may be disposed. The gate driving unit 112 includes various gate driving circuits, and the gate driving circuits may be directly formed on the substrate 110. In this case, the gate driving unit 112 may be a GIP (Gate-In-Panel).

[0047] The gate driving unit 112 may be disposed between the display area of the substrate 110 and a dam (DAM) disposed in the non-display area NA.

[0048] A high potential voltage wiring VDD, a low potential voltage wiring VSS, a multiplexer (MUX), an electrostatic discharge prevention circuit unit (ESD), and a plurality of connection wiring units may be disposed between the pad portions 114 of the display area AA and the non-display area NA.

[0049] The high potential voltage wiring VDD, the low potential voltage wiring VSS, the multiplexer (MUX), and the electrostatic discharge prevention circuit unit (ESD) may be disposed between the display area AA and the bending area BA.

[0050] The connection wiring unit may be disposed in the non-display area NA. For example, it may be disposed in a bending area BA where the substrate bends in the non-display area NA. The connection wiring unit may be a configuration for transmitting a signal (voltage) from an external module bonded to the pad portion 114 to a circuit unit such as the display area AA or the gate driving unit 112. For example, various signals such as various signals for driving the gate driving unit 112, data signals, high potential voltages, and low potential voltages may be transmitted through the connection wiring unit.

[0051] A dam (DAM) may be disposed in the non-display area NA so as to surround the whole or a part of the display area AA. The dam (DAM) is adjacent to the display area AA and may be disposed outside the display area AA.

[0052] The dam (DAM) can be arranged along the peripheral part of the display area AA in order to control the flow of the organic layer which is the material of the second sealing layer among the sealing layers described later and arranged on the light emitting layer. The number of dams (DAMs) can be composed of one or more.

[0053] The dam (DAM) can be arranged between the display area AA and the high potential voltage wiring VDD, the low potential voltage wiring VSS, the multiplexer (multiplex, MUX), or the electrostatic discharge circuit part (Electrostatic Discharge, ESD).

[0054] A panel crack detector (PCD) can be further arranged in a part of the non-display area NA of the substrate 110.

[0055] The panel crack detector (PCD) can be arranged between the end point (or terminal) of the substrate 110 and the dam (DAM). Or the panel crack detector (PCD) can be arranged below the dam (DAM) and can overlap at least a part of the dam (DAM).

[0056] FIG. 2 is a drawing showing a subpixel and a bank trench including a second spacer according to an embodiment of the present invention.

[0057] Referring to FIG. 2, the substrate 110 can include a light emitting part EA and a non-light emitting part NEA surrounding the light emitting part. A plurality of light emitting parts EA can be arranged on the substrate and spaced apart from each other. The non-light emitting part NEA can be arranged surrounding the light emitting part.

[0058] The light emitting part EA is an area where light emits from the light emitting layer to the outside, and referring to FIG. 3, it can be an area where the bank 320 is not arranged.

[0059] The non-light emitting part NEA is an area where light does not emit from the light emitting layer to the outside, and referring to FIG. 3, it can be an area where the bank 320 is arranged.

[0060] The plurality of pixels P arranged in the display area AA can include a first sub-pixel SP_1, a second sub-pixel SP_2, and a third sub-pixel SP_3.

[0061] Each of the first to third sub-pixels SP_1, SP_2, SP_3 can include a light-emitting portion EA.

[0062] One pixel P can have one sub-pixel SP that emits a different color each. For example, each pixel P can include one first sub-pixel SP_1, one second sub-pixel SP_2, and one third sub-pixel SP_3 that emit different colors from each other.

[0063] Alternatively, as shown in FIG. 2, one pixel P can have at least one of the sub-pixels SP that emit different colors arranged in plural. For example, at least two second sub-pixels SP_2 can be arranged.

[0064] Exemplary forms of the first sub-pixel SP_1, the second sub-pixel SP_2, and the third sub-pixel SP_3 can be, but are not limited to, a quadrilateral, a pentagon, a hexagon, an octagon, a circle, an ellipse, etc.

[0065] The first sub-pixel SP_1, the second sub-pixel SP_2, and the third sub-pixel SP_3 can emit light of different colors from each other, and the first sub-pixel SP_1, the second sub-pixel SP_2, and the third sub-pixel SP_3 can emit at least one of red, green, and blue.

[0066] The third sub-pixel SP_3 may have a larger area than the other sub-pixels. Referring to FIG. 2, the third sub-pixel SP_3 may be larger than the first sub-pixel SP_1 and larger than the second sub-pixel SP_2.

[0067] By configuring a high resolution in the light-emitting display device, the separation distance between the first sub-pixel SP_1, the second sub-pixel SP_2, and the third sub-pixel SP_3 becomes smaller.

[0068] The light-emitting display device 100 can include a light-emitting layer including a plurality of stacks (light-emitting units). A charge generation layer can be further included between the plurality of stacks. The charge generation layer can adjust the charge balance between the plurality of stacks.

[0069] The charge generation layer can be composed of a plurality of layers including a first charge generation layer and a second charge generation layer. The first charge generation layer can include an N-type charge generation layer and a P-type charge generation layer. The first charge generation layer can be composed of an organic layer doped with an alkali metal such as lithium (Li), sodium (Na), potassium (K), or cesium (Cs), or an alkaline earth metal such as magnesium (Mg), strontium (Sr), barium (Ba), or radium (Ra).

[0070] The metal contained in the charge generation layer can cause a lateral leakage current (LLC). For example, when a specific sub-pixel is operated, there is a problem that adjacent sub-pixels emit light weakly due to the current leaking laterally between adjacent pixels, and the image information is distorted.

[0071] Each of the first sub-pixel SP_1, the second sub-pixel SP_2, and the third sub-pixel SP_3 may have different driving voltages required to emit light.

[0072] For example, the driving voltage required to emit blue light may be greater than the driving voltage required to emit other red or green light.

[0073] The third sub-pixel SP_3 is driven, but the adjacent sub-pixels are driven weakly. This is because electrons in the third sub-pixel SP_3 move to adjacent sub-pixels through a charge generation layer continuously arranged between adjacent pixels, causing them to be driven weakly. Therefore, adjacent sub-pixels in the non-driven state enter a state similar to the driven state and emit weak light. In this case, the color purity decreases and the color reproduction rate becomes low. Such a phenomenon is often visually recognized in low gradations.

[0074] Therefore, by arranging a bank trench BT having a second spacer 340 between sub-pixels adjacent to the non-light-emitting portion NEA, the horizontal leakage current can be blocked.

[0075] In FIG. 2, the second spacer 340 is arranged to surround the first sub-pixel SP_1, the second sub-pixel SP_2, and the third sub-pixel SP_3. However, in other embodiments, the second spacer 340 may be arranged to surround a part of the first sub-pixel SP_1, the second sub-pixel SP_2, and the third sub-pixel SP_3. For example, the second spacer 340 may be arranged to surround only the third sub-pixel SP_3 that emits blue light. Since such a sub-pixel has the highest driving voltage, there may be an even greater possibility of leakage current flowing from such a sub-pixel to adjacent sub-pixels.

[0076] The light-emitting layer is arranged on the bank trench BT having the first electrode and the second spacer 340. Since the light-emitting layer arranged between adjacent sub-pixels is cut off by the bank trench BT having the second spacer 340, it is possible to prevent electrons formed inside the light-emitting layer during driving from moving to adjacent pixels.

[0077] Therefore, since the horizontal leakage current is blocked between adjacent sub-pixels, it is possible to solve the poor visibility of adjacent pixels emitting light in low gradations and improve the color reproduction rate.

[0078] FIG. 2 illustrates that second spacers 340 and bank trenches BT are respectively disposed between adjacent first sub-pixels SP_1, second sub-pixels SP_2, and third sub-pixels SP_3. However, they do not have to be disposed for each adjacent sub-pixel and are not limited to the drawings.

[0079] The first spacer 330 can be disposed to have a separation distance of a pre-designed size from a plurality of sub-pixels SP. For example, the first spacer 330 can be separated from a plurality of sub-pixels SP by a designed distance and can be disposed surrounded by the plurality of sub-pixels SP. For example, as illustrated in FIG. 2, four sub-pixels may surround one first spacer, but it is not limited thereto. The first spacer 330 can provide a gap between sub-pixels SP_1, SP_2, and SP_3 and can be separated from sub-pixels SP_1, SP_2, and SP_3 by their respective gaps. The first spacer 330 can be referred to as an on-bank spacer, and the second spacer 340 can be referred to as an in-bank spacer.

[0080] A plurality of sub-pixels emitting at least one same color can be symmetrically disposed with respect to the first spacer 330. For example, as illustrated in FIG. 2, a plurality of second sub-pixels SP_2 can be disposed to face each other with respect to the first spacer 330. The first spacer 330 can be disposed substantially in the middle of a plurality of sub-pixels emitting at least one same color.

[0081] The first spacer 330 can buffer the empty space between the substrate 110 on which the light-emitting layer 350 is formed and the upper substrate, and can reduce the damage to the light-emitting display device 100 from an external impact.

[0082] In addition, the first spacer 330 can protect the light-emitting layer 350. For example, a fine metal mask (FMM) can be used when forming the light-emitting layer 350. The fine metal mask may droop during the process due to its weight. At this time, by arranging the first spacer 330, the fine metal mask (FMM) contacts the first spacer 330, thereby preventing the problem that the fine metal mask directly contacts the bank 320 and deforms or damages the bank 320.

[0083] Hereinafter, with reference to FIGS. 3, 4A, 4B, 4C, and 4D, the light-emitting display device of the present invention will be described in detail.

[0084] FIG. 3 is a cross-sectional view of a light-emitting display device according to an embodiment of the present invention.

[0085] FIGS. 4A, 4B, 4C, and 4D are cross-sectional views illustrating a manufacturing process of a light-emitting display device according to an embodiment of the present invention.

[0086] FIG. 3 is a cross-sectional view illustrating an I-I' region where a bank trench including the second spacer of FIG. 2 is disposed.

[0087] As illustrated in FIGS. 3 and 4A, the substrate 110 can support various components of the light-emitting display device. The substrate 110 may be made of glass or a plastic material having flexibility.

[0088] For example, the substrate 110 may be formed of at least one of polyimide (PI), polymethylmethacrylate (PMMA), polyethylene terephthalate (PET), polyethersulfone, and polycarbonate, but is not limited thereto.

[0089] When the substrate 110 is made of polyimide, it can be composed of two polyimides. And an inorganic film can be further disposed between the two polyimides.

[0090] The substrate 110 may be referred to in the concept including elements and functional layers formed on the substrate 110, such as a switching thin film transistor, a driving thin film transistor connected to the switching thin film transistor, an organic light emitting element connected to the driving thin film transistor, a protective layer, etc., and is not limited thereto.

[0091] The buffer layer 120 can be disposed on the entire surface of the substrate 110.

[0092] The buffer layer 120 can be formed of an insulating inorganic material such as silicon nitride (SiNx) or silicon oxide (SiOx), and can also be formed of an insulating organic material or the like, and is not limited thereto.

[0093] The buffer layer 120 can be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multilayer thereof. When the buffer layer 120 is composed of a multilayer, silicon oxide (SiOx) and silicon nitride (SiNx) can be alternately formed.

[0094] The buffer layer 120 may be omitted depending on the type and material of the substrate 110, the structure and type of the thin film transistor, etc.

[0095] The thin film transistor 200 can be disposed on the buffer layer 120. The thin film transistor 200 can include a semiconductor pattern, a gate electrode, a source electrode, and a drain electrode.

[0096] For convenience of explanation, only the driving thin film transistor among various thin film transistors that may be included in the light emitting display device 100 is illustrated, but other thin film transistors such as switching thin film transistors may also be included in the light emitting display device 100. Also, for convenience of explanation, the thin film transistor has been described as having a Top Gate structure, but it is not limited to this structure and may be configured with other structures such as a Bottom Gate structure.

[0097] The semiconductor pattern 210 of the thin film transistor 200 may be disposed on the buffer layer 120.

[0098] The semiconductor pattern 210 may be made of a polycrystalline semiconductor. For example, the polycrystalline semiconductor may be made of low temperature poly silicon (LTPS) having high mobility, but is not limited thereto. When the semiconductor pattern is made of a polycrystalline semiconductor, the energy consumption power is low and the reliability is high.

[0099] Also, the semiconductor pattern 210 may be made of an oxide semiconductor. For example, it may be made of any one of IGZO (Indium-gallium-zinc-oxide), IZO (Indium-zinc-oxide), IGTO (Indium-gallium-tin-oxide), and IGO (Indium-gallium-oxide), but is not limited thereto. When the semiconductor pattern 210 is made of an oxide semiconductor, the effect of blocking leakage current is excellent, so that the luminance change of the sub-pixel can be reduced during low-speed driving.

[0100] When the semiconductor pattern 210 is made of a polycrystalline semiconductor or an oxide semiconductor, it can have a region that is made conductive in a partial region of the semiconductor pattern 210.

[0101] The semiconductor pattern 210 may also be made of amorphous silicon (a-Si) and may be made of various organic semiconductor materials such as pentacene, but is not limited thereto.

[0102] The first insulating layer 130 can be disposed on the semiconductor pattern 210.

[0103] The first insulating layer 130 can be disposed between the semiconductor pattern 210 and the gate electrode 230 to insulate the semiconductor pattern 210 and the gate electrode 230 from each other.

[0104] The first insulating layer 130 can be formed of an insulating inorganic material such as silicon nitride (SiNx) or silicon oxide (SiOx), and can also be formed of an insulating organic material or the like, and is not limited thereto.

[0105] The first insulating layer 130 can be provided with holes for electrically connecting each of the source electrode 250 and the drain electrode 270 to the semiconductor pattern 210.

[0106] The gate electrode 230 of the thin film transistor 200 can be disposed on the first insulating layer 130.

[0107] The gate electrode 230 can be disposed so as to overlap the semiconductor pattern 210.

[0108] The gate electrode 230 can be formed of a single layer or a multilayer made of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), neodymium (Nd), tungsten (W), and transparent conductive oxide (TCO), or an alloy thereof, and is not limited thereto.

[0109] The second insulating layer 140 can be disposed on the gate electrode 230.

[0110] The second insulating layer 140 is disposed between the gate electrode 230 and the source electrode 250 and the drain electrode 270, and can insulate the gate electrode 230 from the source electrode 250 and the drain electrode 270.

[0111] The second insulating layer 140 can be formed of an insulating inorganic material such as silicon nitride (SiNx) or silicon oxide (SiOx), and can also be formed of an insulating organic material or the like, and is not limited thereto.

[0112] The second insulating layer 140 can have holes for electrically connecting the source electrode 250 and the drain electrode 270 to the semiconductor pattern 210, respectively.

[0113] The source electrode 250 and the drain electrode 270 can be disposed on the second insulating layer 140.

[0114] The source electrode 250 and the drain electrode 270 can be electrically connected to the semiconductor pattern 210 through the holes in the first insulating layer 130 and the second insulating layer 140.

[0115] The source electrode 250 and the drain electrode 270 can be formed of a single layer or a multilayer made of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), neodymium (Nd), tungsten (W), and transparent conductive oxide (TCO), or an alloy thereof, and is not limited thereto.

[0116] For example, the source electrode 250 and the drain electrode 270 can have a three-layer structure of titanium (Ti) / aluminum (Al) / titanium (Ti) made of a conductive metal material, and is not limited thereto.

[0117] A protective layer 150 can be disposed on the source electrode 250 and the drain electrode 270.

[0118] The protective layer 150 can protect the thin film transistor 200. The protective layer 150 can be formed of an insulating inorganic material such as silicon nitride (SiNx) or silicon oxide (SiOx), and can also be formed of an insulating organic material or the like, and is not limited thereto.

[0119] The protective layer 150 can have holes for electrically connecting the thin film transistor 200 and the connection electrode 170.

[0120] The protective layer 150 may be omitted depending on the structure and type of the thin film transistor.

[0121] A planarization layer 160 may be disposed on the protective layer 150 or the thin film transistor 200.

[0122] The planarization layer 160 can protect the thin film transistor disposed below the planarization layer 160 and relieve or planarize steps caused by various patterns.

[0123] The planarization layer 160 can be formed of at least one or more organic insulating materials such as BCB (BenzoCycloButene), acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin, but is not limited thereto.

[0124] The planarization layer 160 can be disposed as a single layer, but can be disposed as a plurality of layers of two or more layers in consideration of the arrangement of the electrodes.

[0125] As the light-emitting display device 100 evolves to high resolution, various signal wirings will increase. Therefore, it is difficult to arrange all the wirings in one layer while ensuring the minimum interval, so an additional layer can be created. Such an additional layer allows for a margin in the arrangement of the wirings, making the arrangement design of the wires / electrodes easier. Also, when a dielectric material is used in the planarization layer composed of multiple layers, the planarization layer 160 may be utilized for forming capacitance between metal layers.

[0126] When the planarization layer 160 is disposed in two layers, it may include a first planarization layer 161 and a second planarization layer 162.

[0127] For example, holes can be formed in the first planarization layer 161, and the connecting electrode 170 can be disposed in the holes. A second planarization layer 162 having holes can be disposed on the first planarization layer 161 and the connecting electrode 170. The anode electrode 310 can be disposed in the holes of the second planarization layer 162. Accordingly, the thin-film transistor 200 and the first electrode (anode electrode) 310 can be electrically connected through the connecting electrode 170.

[0128] One end (or a part) of the connecting electrode 170 can be connected to the thin-film transistor, and the other end (or another part) of the connecting electrode can be connected to the first electrode 310.

[0129] The connecting electrode 170 can be formed of a single layer or a multilayer made of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), neodymium (Nd), tungsten (W), and transparent conductive oxide (TCO), or an alloy thereof, and is not limited thereto.

[0130] The connecting electrode 170 may be omitted based on the structure and type of the light-emitting display device 100 and the like.

[0131] The first electrode 310 can be disposed on the planarization layer 160. The first electrode 310 can be disposed on at least a part of the light-emitting portion EA and the non-light-emitting portion NEA.

[0132] When the light-emitting display device 100 is a top emission type, the first electrode 310 is a reflective electrode that reflects light and can be disposed using an opaque conductive material. The first electrode 310 can be formed of at least one of silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr), or an alloy thereof. For example, the first electrode 310 can have a three-layer structure of silver (Ag) / palladium (Pd) / copper (Cu), but is not limited thereto. Alternatively, the first electrode 310 can further include a transparent conductive material layer having a high work function, such as indium tin oxide (ITO).

[0133] When the light-emitting display device 100 is a bottom emission type, the first electrode 310 can be disposed using a transparent conductive material that transmits light. For example, the first electrode 310 can be formed of at least one of indium tin oxide (ITO) and indium zinc oxide (IZO).

[0134] The bank 320 can be disposed on the first electrode 310 and the planarization layer 160.

[0135] The bank 320 can divide a plurality of sub-pixels SP, reduce the light leakage phenomenon, and prevent color mixing that occurs at various viewing angles.

[0136] The bank 320 can define (or divide) a light-emitting portion EA and a non-light-emitting portion NEA, and the bank 320 can be disposed in the non-light-emitting portion NEA.

[0137] The bank 320 can have a bank hole BH that exposes the first electrode 310. The bank 320 can have a bank trench BT in the non-light-emitting portion NEA disposed between adjacent sub-pixels.

[0138] The bank 320 can be made of at least one or more substances among inorganic insulating substances such as silicon nitride (SiNx) or silicon oxide (SiOx), or organic insulating substances such as BCB (BenzoCycloButene), acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin, or a photosensitive agent containing a black (or dark - colored) pigment, but is not limited thereto.

[0139] The bank 320 can be formed to be transparent or black (or dark - colored) or colored. The bank 320 can be disposed to cover or cover the end of the first electrode 310.

[0140] The bank trench BT can be formed by removing a part of the bank 320. When all of the bank 320 is removed in the region where the bank trench BT is formed, the bank trench BT can expose the planarization layer 160. Referring to FIG. 3, although it is illustrated that all of the bank 320 is removed in the region where the bank trench BT is formed, it may be formed by removing a part of the bank 320. In this case, the bank 320 disposed in the region where the bank trench BT is formed can have a thickness of 1 / 2 to 1 / 3 of the height contrast in other regions.

[0141] The bank trench BT can overlap at least a part of the first touch electrode 540_R, the first touch connection electrode 520, the second touch electrode, and the second touch connection electrode 540_C.

[0142] The manufacturing process of the bank trench BT will be described in detail through FIGS. 4a to 4d described later.

[0143] At least one first spacer 330 can be disposed on the bank 320. The first spacer 330 can be formed of the same material as the bank 320, can be formed simultaneously with the bank 320, or can be formed in a separate process.

[0144] The thickness of the first spacer 330 may be even greater than the thickness of the bank 320, and the thickness of the first spacer 330 can be 1 um to 2 um.

[0145] The second spacer 340 may be disposed on the bank 320 and the planarization layer 160.

[0146] The second spacer 340 can prevent electrons formed inside the light-emitting layer 350 during driving from moving to adjacent pixels in order to cut off the light-emitting layer 350 or the second electrode 360 disposed after the second spacer 340. Therefore, even if the interval between adjacent sub-pixels is reduced, the horizontal leakage current can be blocked by the second spacer 340.

[0147] The second spacer 340 may be disposed inside the bank trench BT or may partially cover the side surface of the bank trench BT.

[0148] The second spacer 340 can have an inverted taper shape. For example, the second spacer 340 has a lower surface and an upper surface, and the size of the upper surface of the second spacer may be even larger than the size of the lower surface of the second spacer.

[0149] The second spacer 340 may be formed of the same material as the bank 320 or the first spacer 330. The manufacturing process of the second spacer 340 will be described in detail through FIGS. 4a to 4d.

[0150] The thickness of the second spacer 340 may be even greater than the thickness of the bank 320.

[0151] The second height (vertical distance, H2) from the substrate 110 to the top of the second spacer 340 may be smaller than the second height (vertical distance, H1) from the substrate 110 to the top of the first spacer 330. Since the second spacer 340 is disposed in the bank trench BT formed by etching a part of the bank 320, the height (vertical distance) from the substrate 110 to the top of the second spacer 340 may be smaller than the height (vertical distance) from the substrate 110 to the top of the first spacer 330 disposed on the upper part of the bank 320. The height, or the vertical distance, can be defined along the direction perpendicular to the display surface of the light-emitting display device, that is, the direction perpendicular to the substrate 110. Also, as shown in FIG. 3, the fourth height H4 of the second spacer 340 may be smaller than the third height H3 of the first spacer 330.

[0152] When the second height H2 from the substrate 100 to the top of the second spacer 340 is the same as or similar to the first height H1 from the substrate 100 to the top of the first spacer 330, a fine metal mask (FMM) is used when forming the light-emitting layer 350. At this time, however, a problem may occur in that the second spacer 340 contacts the fine metal mask (FMM) and deforms or damages the second spacer 340. However, in the embodiments of the present invention, since the second spacer 340 is disposed in the bank trench BT, it is possible to prevent the problem that the second spacer 340 contacts the fine metal mask (FMM) and deforms or damages the second spacer 340.

[0153] The second spacer 340 may include at least three spacers. For example, the second spacer 340 may include a first spacer pattern 340a, a second spacer pattern 340b, and a third spacer pattern 340c.

[0154] The first spacer pattern 340a, the second spacer pattern 340b, and the third spacer pattern 340c can be arranged to be spaced apart. A spacer pattern hole PH can be provided between the first spacer pattern 340a, the second spacer pattern 340b, and the third spacer pattern 340c. That is, the first spacer pattern hole PH can be arranged between the first spacer pattern 340a and the second spacer pattern 340b, and the second spacer pattern hole PH can be arranged between the second spacer pattern 340b and the third spacer pattern 340c. For example, the second spacer 340 can include the first spacer pattern, the second spacer pattern, and the third spacer pattern together with the first spacer pattern hole PH between the first spacer pattern and the second spacer pattern and the second spacer pattern hole PH between the second spacer pattern and the third spacer pattern. The second spacer can include at least the first spacer pattern and the second spacer pattern together with the spacer pattern hole between the first spacer pattern and the second spacer pattern. With an increase in the spacer pattern and the spacer pattern hole, the leakage current between sub-pixels can be further reduced. The second spacer including the spacer pattern can prevent the light-emitting layer 350 (and the second electrode 360) from being deposited on the side inclined portion of the second spacer. This is because the pattern of the spacer forms a protrusion that shields the side inclined portion from deposition. The spacer pattern can form a discontinuity / cut / gap in the light-emitting layer 350, and as a result, the leakage current between sub-pixels is reduced.

[0155] At least one spacer pattern of the second spacer 340 can be arranged to be spaced apart from the bank 320. For example, the second spacer pattern 340b of the second spacer 340 can be arranged to be spaced apart from the bank 320.

[0156] At least one spacer pattern of the second spacer 340 can cover at least a portion of the bank 320. For example, the first spacer pattern 340a and the third spacer pattern 340c of the second spacer 340 can be arranged to cover a portion of the bank 320.

[0157] In FIG. 3, the first spacer pattern 340a and the third spacer pattern 340c of the second spacer 340 are illustrated as covering a portion of the bank 320. However, in other embodiments, a plurality of the second spacer patterns 340b can be arranged in the bank trench BT without covering a portion of the bank.

[0158] In FIG. 3, three segments of the second spacer 340 are illustrated, but the number can be changed according to the design and is not limited thereto.

[0159] The light-emitting layer 350 can be arranged on the first electrode 310, the bank 320, the first spacer 330, the second spacer 340, and the planarization layer 160.

[0160] Since the light-emitting layer 350 is cut by the second spacer 340 disposed in the non-emitting portion NEA and the spacer pattern hole PH, electrons formed inside the light-emitting layer 350 during driving can be blocked from moving to adjacent pixels. Therefore, the horizontal leakage current generated by reducing the interval between adjacent sub-pixels can be blocked. The light-emitting layer 350 does not form a continuous layer and may include a plurality of cut portions, or gap portions, or discontinuous portions that separate each part of the light-emitting layer 350. The cut portion, or gap portion, or discontinuous portion may be formed by the second spacer 340 inside the bank trench BT. In particular, the light-emitting layer 350 includes a discontinuous portion between a portion formed on top of the bank 320 and a portion formed on top of the first spacer pattern 340a, and a discontinuous portion between a portion formed on top of the first spacer pattern 340a and a portion formed on top of the second spacer pattern 340b (i.e., the portion by the first spacer pattern hole PH), and a discontinuous portion between a portion formed on top of the second spacer pattern 340b and a portion formed on top of the third spacer pattern 340c (i.e., the portion by the second spacer pattern hole PH), and may include a discontinuous portion between a portion formed on top of the third spacer pattern 340c and a portion formed on top of the bank 320. Here, the cut portion may mean a cut portion passing through the layer, i.e., a complete cut portion penetrating the entire layer, or a cut portion on the layer surface, i.e., a cut portion partially formed in the layer (i.e., thickness reduction). For example, the thickness of the light-emitting layer 350 may be reduced in a region corresponding to the second spacer 340. The second spacer 340 may include one or more side inclined portions where the light-emitting layer 350 is thinner, or non-uniform, or discontinuous on its top. Thereby, the transmission of leakage current through the corresponding light-emitting portion can be reduced. That is, in the region of the second spacer 340, the deposition of the light-emitting layer 350 is reduced and the transmission of leakage current is reduced. In the region of the second spacer 340, the light-emitting layer 350 does not need to be continuous or uniform.

[0161] At least a portion of the light-emitting layer 350 may be disposed on the planarization layer 160. At least a portion of the light-emitting layer 350 may be disposed within the bank trench BT. At least a portion of the light-emitting layer 350 may be disposed between the first spacer pattern 340a, the second spacer pattern 340b, and the third spacer pattern 340c of the second spacer 340.

[0162] As shown in FIG. 5, the light-emitting layer 350 may include a plurality of stacks (light-emitting units). For example, the light-emitting layer 350 may include a first light-emitting portion 351 and a second light-emitting portion 353, and a charge generation layer 352 disposed between the first light-emitting portion 351 and the second light-emitting portion 353. The detailed content of the components of the light-emitting layer 350 will be described in detail through FIG. 5 described later.

[0163] A second electrode (cathode electrode) 360 may be disposed on the light-emitting layer 350.

[0164] The second electrode 360 may be cut by the second spacer 340 in the non-light-emitting portion NEA. The second electrode 360 does not form a continuous layer, and each portion of the second electrode 360 is separated, and may include a plurality of cut portions, gap portions, or discontinuous portions corresponding to the cut portions, gaps, or discontinuous portions of the light-emitting layer 350.

[0165] At least a portion of the second electrode 360 may be disposed within the bank trench BT. At least a portion of the second electrode 360 may be disposed between the first spacer pattern 340a, the second spacer pattern 340b, and the third spacer pattern 340c of the second spacer 340.

[0166] For example, each of the first spacer pattern 340a, the second spacer pattern 340b, and the third spacer pattern 340c has an inverted taper shape in which the side surfaces of the respective spacer patterns 340a, 340b, 340c and the upper surface of the second planarization layer 162 form an acute angle. Thereby, the light-emitting layer 350 and the second electrode 360 are cut between the first spacer pattern 340a, the second spacer pattern 340b, and the third spacer pattern 340c, and a residual layer RL including the light-emitting layer 350 and the second electrode 360 can be disposed on the upper portion of the second planarization layer 162 between the first spacer pattern 340a, the second spacer pattern 340b, and the third spacer pattern 340c. That is, the residual layer RL can mean the light-emitting layer 350 and the second electrode 340 disposed in the spacer pattern hole PH of the second spacer 340. A part of the light-emitting layer 350 included in the residual layer RL can be separated from a part of the light-emitting layer 350 disposed on the upper portions of the first spacer pattern 340a, the second spacer pattern 340b, and the third spacer pattern 340c. A part of the second electrode 360 included in the residual layer RL can be separated from a part of the second electrode 350 disposed on the upper portions of the first spacer pattern 340a, the second spacer pattern 340b, and the third spacer pattern 340c. A part of the light-emitting layer 350 disposed on the upper portions of one or more spacer patterns 340a, 340b, 340c can be separated from a part of the light-emitting layer 350 disposed on the upper portion of an adjacent bank 320. A part of the light-emitting layer 350 disposed on the upper portions of one or more spacer patterns 340a, 340b, 340c can be separated from a part of the light-emitting layer 350 disposed on the upper portion of an adjacent bank 320. A part of the second electrode 360 disposed on the upper portions of one or more spacer patterns 340a, 340b, 340c can be separated from a part of the second electrode 360 disposed on the upper portion of an adjacent bank 320.

[0167] The second electrode 360 supplies electrons to the light-emitting layer 350 and can be made of a conductive material having a low work function.

[0168] When the light-emitting display device 100 is a top emission type, the second electrode 360 can be arranged using a transparent conductive material that transmits light. For example, it can be formed of at least one of indium tin oxide (ITO) and indium zinc oxide (IZO), but is not limited thereto.

[0169] Alternatively, it can be arranged using a translucent conductive material that transmits light. For example, it can be formed of at least one of alloys such as LiF / Al, CsF / Al, Mg:Ag, Ca / Ag, Ca:Ag, LiF / Mg:Ag, LiF / Ca / Ag, and LiF / Ca:Ag.

[0170] When the light-emitting display device 100 is a bottom emission type, the second electrode 360 is a reflective electrode that reflects light and can be arranged using an opaque conductive material. For example, the cathode electrode 360 can be formed of at least one of silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr), or alloys thereof.

[0171] Although not shown in the figure, a capping layer (CPL) can be arranged on the second electrode 360.

[0172] The capping layer protects the second electrode 360 and is for increasing the light extraction effect of the light-emitting layer. The capping layer can be formed as a single layer or a multilayer, but is not limited thereto.

[0173] The capping layer may be omitted based on the structure and type of the light-emitting display device, etc.

[0174] The encapsulation layer 400 can be disposed on the second electrode 360 or the capping layer. The encapsulation layer 400 can protect the first electrode 310, the light-emitting layer 350, the second electrode 360, etc. from external moisture, oxygen, foreign matter, or particles. For example, it can prevent the penetration of external oxygen and moisture to prevent the oxidation of the light-emitting substance and the electrode substance.

[0175] The encapsulation layer 400 can be made of a transparent material so that the light emitted by the light-emitting layer can pass through.

[0176] The encapsulation layer 400 can include a first encapsulation layer 410, a second encapsulation layer 420, and a third encapsulation layer 430 that block the penetration of moisture and oxygen. The first encapsulation layer 410, the second encapsulation layer 420, and the third encapsulation layer 430 can have a structure in which they are alternately laminated.

[0177] The first encapsulation layer 410 and the third encapsulation layer 430 can be made of at least one or more inorganic substances such as silicon nitride (SiNx), silicon oxide (SiOx), or aluminum oxide (AlyOz), but are not limited thereto. The first encapsulation layer 410 and the third encapsulation layer 430 can be formed using a vacuum film-forming method such as chemical vapor deposition (CVD) or atomic layer deposition (ALD), but are not limited thereto.

[0178] The first encapsulation layer 410 and the third encapsulation layer 430 can be formed of at least two or more layers. For example, the first encapsulation layer 410 can have a three-layer structure of silicon oxide (SiOx) / silicon nitride (SiNx) / silicon oxide (SiOx), but is not limited thereto. Or the first encapsulation layer 410 can have a four-layer structure of silicon oxide (SiOx) / silicon nitride (SiNx) / silicon oxide (SiOx) / silicon oxide (SiOx), but is not limited thereto.

[0179] The second encapsulation layer 420 can cover foreign matters or particles that may occur during the manufacturing process. Also, the second encapsulation layer 420 can planarize the surface of the first encapsulation layer 410. For example, the second encapsulation layer 420 can be a particle cover layer, but is not limited to this term.

[0180] The second encapsulation layer 420 can be an organic substance, for example, a polymer such as silicon oxycarbide (SiOCz) epoxy, polyimide, polyethylene, acrylate series, etc., but is not limited thereto.

[0181] The second encapsulation layer 420 can be made of a thermosetting substance or a photocurable substance that cures by heat or light.

[0182] The touch sensor layer 500 can be disposed on the encapsulation layer 400.

[0183] The touch sensor layer 500 can include a first touch electrode 540_R, a first touch connection electrode 520, a second touch electrode, and a second touch connection electrode 540_C.

[0184] A part of the first touch electrode 540_R, the first touch connection electrode 520, the second touch electrode, and the second touch connection electrode 540_C can be disposed overlapping the second spacer 340 and / or the bank trench BT.

[0185] The first touch electrode 540_R, the second touch electrode, the first touch connection electrode 520, and the second touch connection electrode 520_C can be formed in a mesh pattern in which metal lines having a small line width intersect each other. The mesh pattern can have a diamond shape, and the shape of the mesh pattern can be a quadrilateral, pentagon, hexagon, circle, ellipse, etc., and is not limited thereto.

[0186] The first touch electrode 540_R, the second touch electrode, the first touch connection electrode 520, and the second touch connection electrode 540_C can be arranged using an opaque conductive material with low resistance. For example, it can be formed of a single layer or multiple layers made of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), neodymium (Nd), tungsten (W), gold (Au), and transparent conductive oxide (TCO), and is not limited thereto.

[0187] For example, the first touch electrode 540_R, the second touch electrode, the first touch connection electrode 520, and the second touch connection electrode 540_C can be formed of a three-layer structure of titanium (Ti) / aluminum (Al) / titanium (Ti) made of a conductive metal material, and is not limited thereto.

[0188] The first touch electrode 540_R, the second touch electrode, the first touch connection electrode 520, and the second touch connection electrode 540_C can be made of the same material as the source electrode 250 and the drain electrode 270.

[0189] The touch buffer layer 510 can be disposed on the encapsulation layer 400. The touch buffer layer 510 can prevent chemicals (such as developer or etchant) used during the manufacturing process of the touch sensor layer 500 or external moisture from penetrating into the light-emitting layer 350 containing organic substances. In addition, it can prevent the problem that a large number of touch sensor metals disposed on the upper part of the touch buffer layer 510 are disconnected due to external impact, and can block interference signals that may occur during the driving of the touch sensor layer 500.

[0190] The touch buffer layer 510 can be made of at least one or more substances among inorganic insulating substances such as silicon nitride (SiNx) or silicon oxide (SiOx), or organic insulating substances such as BCB (BenzoCycloButene), acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin, but is not limited thereto.

[0191] The first touch connection electrode 520 can be disposed on the touch buffer layer 510.

[0192] For example, the first touch connection electrode 520 can be disposed between the first touch electrodes 540_R adjacent in the first direction (or X-axis direction). The first touch connection electrode 520 can electrically connect a plurality of first touch electrodes 540_R disposed adjacent to each other at a distance in the first direction (or X-axis direction), but is not limited thereto.

[0193] The first touch connection electrode 520 can be disposed so as to overlap with the second touch connection electrode 540_C that connects the second touch electrodes adjacent in the second direction (or Y-axis direction). Since the first touch connection electrode 520 and the second touch connection electrode 540_C are formed in different layers, they can be electrically insulated from each other.

[0194] The touch insulation layer 530 can be disposed on the touch buffer layer 510 and the first touch connection electrode 520.

[0195] The touch insulation layer 530 can include holes for electrically connecting the first touch electrode 540_R and the first touch connection electrode 520.

[0196] The touch insulation layer 530 can electrically insulate the second touch electrode and the second touch connection electrode 540_C.

[0197] The touch insulation layer 530 may be composed of a single layer or multiple layers of silicon nitride (SiNx) or silicon oxide (SiOx), but is not limited thereto.

[0198] The first touch electrode 540_R, the second touch electrode, and the second touch connection electrode 540_C may be disposed on the touch insulation layer 530.

[0199] The first touch electrode 540_R and the second touch electrode may be arranged at a certain interval. At least one or more first touch electrodes 540_R adjacent in the first direction (or X-axis direction) may be formed spaced apart from each other. At least one or more first touch electrodes 540_R adjacent in the first direction (or X-axis direction) may be connected to the first touch connection electrode 520 disposed between the plurality of first touch electrodes 540_R. For example, a plurality of adjacent first touch electrodes 540_R may be connected to the first touch connection electrode 520 through holes in the touch insulation layer 530.

[0200] The second touch electrodes adjacent in the second direction (or Y-axis direction) may be connected by the second touch connection electrode 540_C. The second touch electrode and the second touch connection electrode 540_C may be formed in the same layer. For example, the second touch connection electrode 540_C may be disposed between a plurality of second touch electrodes in the same layer as the second touch electrode. The second touch connection electrode 540_C may be formed by extending from the second touch electrode.

[0201] The first touch electrode 540_R, the second touch electrode, and the second touch connection electrode 540_C may be formed in the same process.

[0202] A touch planarization layer 550 may be disposed on the first touch electrode 540_R, the second touch electrode, and the second touch connection electrode 540_C.

[0203] The touch driving circuit can receive a touch sensing signal from the first touch electrode 540_R. Also, the touch driving circuit can transmit a touch driving signal to the second touch electrode. The touch driving circuit can sense a user's touch by utilizing the mutual capacitance between a plurality of the first touch electrodes 540_R and the second touch electrodes. For example, when a touch operation is performed on the light-emitting display device 100, a change in capacitance may occur between the first touch electrode 540_R and the second touch electrode. The touch driving circuit can sense such a change in capacitance and detect the touch coordinates.

[0204] Hereinafter, the manufacturing processes of the bank trench BT and the second spacer 340 will be described in detail. FIGS. 4a, 4b, 4c, and 4d are cross-sectional views illustrating the manufacturing processes of the light-emitting display device according to an embodiment of the present invention.

[0205] Referring to FIG. 4a, a first electrode 310 is disposed on the light-emitting portion EA of the substrate 110 on which the thin-film transistor 200 is disposed.

[0206] Referring to FIG. 4b, a bank 320 and a first spacer 330 are disposed on the non-light-emitting portion NEA of the substrate 110 on which the first electrode 310 is disposed.

[0207] The bank 320 can include a bank hole BH that exposes the first electrode 310 to the light-emitting portion EA. The bank hole BH can be formed by etching a part of the bank 320.

[0208] At least one first spacer 330 can be disposed on the bank 320.

[0209] In FIG. 4b, the bank 320 and the first spacer 330 are illustrated as being formed in the same process using a halftone mask, but they may be formed in separate processes.

[0210] Referring to FIG. 4c, a bank trench BT is formed between adjacent sub-pixels. The bank trench BT can be formed by etching a part of the bank 320. The planarization layer 160 can be exposed by the bank trench BT.

[0211] In FIG. 4c, it is illustrated that the entire bank 320 is etched in the region where the bank trench BT is formed, but only a part may be etched. For example, a part of the bank 320 may be arranged on the planarization layer 160 by etching only a part without etching the entire bank 320 in the region where the bank trench BT is formed.

[0212] Referring to FIG. 4d, a second spacer 340 can be arranged in the bank trench BT.

[0213] The second spacer 340 can include a first spacer pattern 340a, a second spacer pattern 340b, and a third spacer pattern 340c. The first spacer pattern 340a, the second spacer pattern 340b, and the third spacer pattern 340c can be arranged spaced apart from each other. A spacer pattern hole PH can be provided between the first spacer pattern 340a, the second spacer pattern 340b, and the third spacer pattern 340c.

[0214] At least one spacer pattern of the second spacer 340 can cover at least a part of the bank 320. For example, the first spacer pattern 340a and the third spacer pattern 340c of the second spacer 340 can be arranged spaced apart from the bank 320.

[0215] FIGS. 4a to 4d are illustrated as forming the bank hole BH, the bank trench BT, the first spacer 330, and the second spacer 340 respectively, but are not limited thereto, and the first spacer 330 and the second spacer 340 may be formed simultaneously after the bank hole BH and the bank trench BT are formed simultaneously.

[0216] Hereinafter, the light-emitting layer of the present invention will be described with reference to FIG. 5.

[0217] FIG. 5 is a drawing illustrating a light-emitting layer according to an embodiment of the present invention.

[0218] For convenience of explanation, only two stacks (light-emitting units) are illustrated, but two or more stacks and one or more charge generation layers included between two or more stacks may be further included.

[0219] The light-emitting layer 350 may include a plurality of stacks (light-emitting units). For example, the light-emitting layer 350 may include a first stack 351, a second stack 352, and a charge generation layer 352 disposed between the first stack 351 and the second stack 352.

[0220] A first electrode (310, anode), a first stack 351, a charge generation layer 352, a second stack 353, and a second electrode 360 may be sequentially disposed on a substrate 110 having a first sub-pixel SP_1, a second sub-pixel SP_2, and a third sub-pixel SP_3.

[0221] The first stack 351 may include a hole injection layer 351-A, a first hole transport layer 351-B, a first light-emitting material layer 351-C, and a first electron transport layer 351-D.

[0222] The second stack 353 may include a second hole transport layer 353-A, a second light-emitting material layer 353-B, a second electron transport layer 353-C, and an electron injection layer 353-D.

[0223] The charge generation layer 352 may further include an n-type charge generation layer n-CGL that assists in electron injection in the first stack 351 and a p-type charge generation layer p-CGL that assists in hole injection in the second stack 352.

[0224] Although not shown in the drawings, an electron blocking layer can be disposed between the first hole injection layer 351-A and the first light-emitting material layer 351-C, and a hole blocking layer can be disposed between the first light-emitting material layer 351-C and the charge generation layer 352. Further, the electron blocking layer can be disposed between the charge generation layer 352 and the second light-emitting material layer 353-B, and the hole blocking layer can be disposed between the second light-emitting material layer 353-B and the electron injection layer 353-D.

[0225] The components of the light-emitting layer 350 can be at least partially cut between adjacent sub-pixels by a bank trench BT including a second spacer 340 disposed below the light-emitting layer 350. Therefore, since electrons formed inside the light-emitting layer 350 are blocked from moving to adjacent sub-pixels, in particular, it is possible to solve the problem of poor visibility in which adjacent sub-pixels emit light in a low tone and improve the color reproducibility.

[0226] The first light-emitting material layer 351-C and the second light-emitting material layer 353-B can be arranged in a pattern separated from each other so as to correspond to their respective sub-pixels. For example, the first light-emitting material layer 353-C and the second light-emitting material layer 353-B can be disposed at least in part at the ends of the bank hole BH and the bank 320.

[0227] The hole injection layer 351-A serves to smoothly inject holes and can be composed of, but is not limited to, any one or more selected from the group consisting of HATCN (1,4,5,8,9,11-hexaazatriphenylene-hexanitrile) and CuPc (cupper phthalocyanine), PEDOT (poly(3,4)-ethylenedioxythiophene), PANI (polyaniline), and NPD (N,N-dinaphthyl-N,N’-diphenylbenzidine).

[0228] The first hole transport layer 351-B and the second hole transport layer 353-A serve to smoothly transport holes, and may be composed of, but are not limited to, any one or more selected from the group consisting of NPD (N,N-dinaphthyl-N,N’-diphenylbenzidine), TPD (N,N’-bis-(3-methylphenyl)-N,N’-bis-(phenyl)-benzidine), s-TAD, and MTDATA (4,4’,4”-Tris(N-3-methylphenyl-N-phenyl-amino)-triphenylamine).

[0229] The first electron transport layer 351-D and the second electron transport layer 353”-C serve to smoothly transport electrons, and may be composed of, but are not limited to, any one or more selected from the group consisting of Alq3 (tris(8-hydroxyquinolino)aluminum), PBD (2-(4-biphenylyl)-5-(4-tert-butylphenyl)-1,3,4-oxadiazole), TAZ, spiro-PBD, BAlq, and SAlq.

[0230] The electron injection layer 353-D serves to smoothly inject electrons, and Alq3 (tris(8-hydroxyquinolino)aluminum), PBD (2-(4-biphenylyl)-5-(4-tert-butylphenyl)-1,3,4-oxadiazole), TAZ, spiro-PBD, BAlq, or SAlq can be used, but are not limited thereto.

[0231] The first light-emitting material layer 351-C and the second light-emitting material layer 353-B are disposed within the bank hole BH and may be formed spaced apart between adjacent sub-pixels. For example, the first light-emitting material layer 351-C and the second light-emitting material layer 353-B may be deposited on respective sub-pixels using a fine metal mask (FMM).

[0232] The first light-emitting material layer 351-C and the second light-emitting material layer 353-B can overlap. The first light-emitting material layer 351-C and the second light-emitting material layer 353-B can emit the same color. The first light-emitting material layer 351-C and the second light-emitting layer 353-B can emit light in the same wavelength band, but are not limited thereto.

[0233] The first light-emitting material layer 351-C and the second light-emitting material layer 353-B can each contain a light-emitting material that emits red, green, and blue light, and the light-emitting material can be formed using a phosphorescent material or a fluorescent material.

[0234] For example, in the case of the first red light-emitting material layer 351R and the second red light-emitting material layer 353R disposed in the first sub-pixel SP_1, the first red light-emitting material layer 351R and the second red light-emitting material layer 353R contain a host material containing CBP (carbazole biphenyl) or mCP (1,3-bis(carbazol-9-yl)), and are composed of a phosphorescent material containing a dopant selected from the group consisting of PIQIr(acac) (bis(1-phenylisoquinoline)acetylacetonate iridium), PQIr(acac) (bis(1-phenylquinoline)acetylacetonate iridium), PQIr(tris(1-phenylquinoline)iridium), and PtOEP (octaethylporphyrin platinum), and can be composed of a fluorescent material containing PBD:Eu(DBM)3(Phen) or Perylene, but is not limited thereto.

[0235] For example, in the case of the first green light-emitting material layer 351G and the second green light-emitting material layer 353G disposed in the second sub-pixel SP_2, the first green light-emitting material layer 351G and the second green light-emitting material layer 353G may be composed of a phosphorescent material containing a host material including CBP or mCP and a dopant material such as an Ir complex containing Ir(ppy)3 (fac tris(2-phenylpyridine)iridium), and may be composed of a fluorescent material including Alq3 (tris(8-hydroxyquinolino)aluminum), but is not limited thereto.

[0236] For example, in the case of the first blue light-emitting material layer 351B and the second blue light-emitting material layer 353B disposed in the third sub-pixel SP_3, the first blue light-emitting material layer 351B and the second blue light-emitting material layer 353B may be composed of a phosphorescent material containing a host material including CBP or mCP and a dopant material including (4,6-F2ppy)2Irpic. Further, it may be composed of a fluorescent material including any one selected from the group consisting of spiro-DPVBi, spiro-6P, distyrylbenzene (DSB), distyrylarylene (DSA), PFO-based polymers, and PPV-based polymers, but is not limited thereto.

[0237] The first light-emitting material layer 351-C and the second light-emitting material layer 353-B can further include an auxiliary light-emitting material layer. For example, the auxiliary light-emitting material layer can be disposed below or above the first light-emitting material layer 351-C and the second light-emitting material layer 353-B. The auxiliary light-emitting material layer can emit light of the same color as or a different color from each of the first light-emitting material layer 351-C and the second light-emitting material layer 353-B.

[0238] The n-type charge generation layer n-CGL can be formed of an alkali metal, an alkali metal compound, an organic substance having an electron injection function, or these compounds. For example, it may be composed of a mixed layer of an n-type substance such as an anthracene derivative doped with lithium (Li) or cesium (Cs), but is not limited thereto.

[0239] The p-type charge generation layer p-CGL can be formed of an organic material used as a material for the hole injection layer. For example, it may be composed of a single layer of a p-type substance such as HATCN or F4-TCNQ, but is not limited thereto.

[0240] The components included in the first stack 351, the second stack 353, and the charge generation layer 352 may be formed in pluralities of two or more, or may be omitted, as the case may be.

[0241] The display device according to an embodiment of the present invention can be described as follows.

[0242] According to an embodiment of the present invention, a light-emitting display device can include a substrate including a light-emitting unit, a first subpixel and a second subpixel each including a non-light-emitting unit surrounding the light-emitting unit, a first electrode disposed on the first subpixel and the second subpixel, respectively, a bank including a bank hole located in the light-emitting unit and a bank trench located in the non-light-emitting unit, a first spacer disposed on the bank, a second spacer disposed in at least one bank trench, a light-emitting layer disposed on the first electrode and the second spacer and including a plurality of stacks and at least one charge generation layer disposed between the plurality of stacks, and a second electrode disposed on the light-emitting layer.

[0243] According to an embodiment of the present invention, the second spacer can have an inverted taper shape.

[0244] According to an embodiment of the present invention, the height from the substrate to the top of the second spacer may be different from the height from the substrate to the top of the first spacer.

[0245] According to an embodiment of the present invention, the height from the substrate to the top of the second spacer may be smaller than the height from the substrate to the top of the first spacer.

[0246] According to an embodiment of the present invention, the thickness of the second spacer may be even greater than the thickness of the bank.

[0247] According to an embodiment of the present invention, the second spacer includes at least a first spacer pattern and a second spacer pattern, and a spacer pattern hole can be disposed between the first spacer pattern and the second spacer pattern.

[0248] According to an embodiment of the present invention, the second spacer includes at least a first spacer pattern, a second spacer pattern, and a third spacer pattern, a first spacer pattern hole can be disposed between the first spacer pattern and the second spacer pattern, and a second spacer pattern hole can be disposed between the second spacer pattern and the third spacer pattern.

[0249] According to an embodiment of the present invention, at least one of the first spacer pattern, the second spacer pattern, and the third spacer pattern can cover a part of the bank.

[0250] According to an embodiment of the present invention, the light-emitting display device can further include a thin-film transistor disposed on a substrate and a planarization layer disposed on the thin-film transistor.

[0251] According to an embodiment of the present invention, the bank trench can expose the planarization layer.

[0252] According to an embodiment of the present invention, the second spacer can be disposed on the upper part of the planarization layer.

[0253] According to an embodiment of the present invention, the light-emitting layer can be disposed on the upper part of the planarization layer.

[0254] According to an embodiment of the present invention, the light-emitting layer can include a cut portion formed in a non-light-emitting portion by the second spacer.

[0255] According to an embodiment of the present invention, at least one charge generation layer can include a first charge generation layer and a second charge generation layer.

[0256] According to an embodiment of the present invention, each of the plurality of stacks can include a light-emitting material layer.

[0257] According to an embodiment of the present invention, the light-emitting display device may further include a sealing layer disposed on the second electrode and a touch sensor layer disposed on the sealing layer.

[0258] According to an embodiment of the present invention, the touch sensor layer may include a first touch electrode and a second touch electrode overlapping with the second spacer.

[0259] According to an embodiment of the present invention, the height of the second spacer may be smaller than the height of the first spacer.

[0260] According to an embodiment of the present invention, the light-emitting display device includes a substrate including a display area including a plurality of sub-pixels and a non-light-emitting portion between the plurality of sub-pixels and a non-display area adjacent to the display area, a first electrode disposed on each of the plurality of sub-pixels, a bank partitioning the plurality of sub-pixels, a light-emitting layer disposed on the first electrode, a second electrode disposed on the light-emitting layer, and a cutting portion for cutting the light-emitting layer between two adjacent sub-pixels among the plurality of sub-pixels.

[0261] According to an embodiment of the present invention, the bank may include a plurality of bank holes respectively corresponding to the plurality of sub-pixels and a bank trench corresponding to the non-light-emitting portion.

[0262] According to an embodiment of the present invention, the light-emitting display device may further include a first spacer disposed on the bank.

[0263] According to an embodiment of the present invention, the cutting portion may be formed by a second spacer disposed in the bank trench.

[0264] According to an embodiment of the present invention, the second spacer may be made of the same material as the bank.

[0265] According to an embodiment of the present invention, the height of the second spacer may be smaller than the height of the first spacer.

[0266] The embodiments of the present invention have been described in more detail with reference to the attached drawings above. However, the present invention is not necessarily limited to such embodiments, and can be variously modified and implemented without departing from the technical idea of the present invention. Therefore, the embodiments disclosed in the present invention are for the purpose of explanation rather than for limiting the technical idea of the present invention, and the scope of the technical idea of the present invention is not limited by such embodiments. Therefore, it should be understood that the embodiments described above are illustrative and not restrictive in all respects. The protection scope of the present invention should be interpreted by the following claims, and all technical ideas within the equivalent scope should be construed as being included in the scope of rights of the present invention.

Explanation of Reference Numerals

[0267] 110: Substrate 200: Thin Film Transistor 340: Second Spacer BT: Bank Trench

Claims

1. A substrate including a first sub-pixel and a second sub-pixel, each including a light-emitting portion and a non-light-emitting portion surrounding the light-emitting portion; A first electrode disposed on each of the first sub-pixel and the second sub-pixel; A bank including a bank hole located in the light-emitting portion and a bank trench located in the non-light-emitting portion; A first spacer disposed on the bank; A second spacer disposed in at least one of the bank trenches; A light-emitting layer disposed on the first electrode and the bank trench, including a plurality of stacks and at least one charge generation layer disposed between the plurality of stacks; A light-emitting display device including a second electrode disposed on the light-emitting layer.

2. The light-emitting display device according to claim 1, wherein the second spacer has an inverse taper shape.

3. The light-emitting display device according to claim 1, wherein a height from the substrate to the top of the second spacer is different from a height from the substrate to the top of the first spacer.

4. The light-emitting display device according to claim 1, wherein a height from the substrate to the top of the second spacer is smaller than a height from the substrate to the top of the first spacer.

5. The light-emitting display device according to claim 1, wherein a thickness of the second spacer is larger than a thickness of the bank.

6. The light-emitting display device according to claim 1, wherein the second spacer includes at least a first spacer pattern and a second spacer pattern, and a spacer pattern hole is disposed between the first spacer pattern and the second spacer pattern.

7. The light-emitting display device according to claim 1, wherein the second spacer includes at least a first spacer pattern, a second spacer pattern, and a third spacer pattern, a first spacer pattern hole is disposed between the first spacer pattern and the second spacer pattern, and a second spacer pattern hole is disposed between the second spacer pattern and the third spacer pattern.

8. The light-emitting display device according to claim 7, wherein at least one of the first spacer pattern, the second spacer pattern, and the third spacer pattern covers a part of the bank.

9. A thin film transistor disposed on the substrate; The light-emitting display device according to claim 1, further including a planarization layer disposed on the thin film transistor.

10. The light-emitting display device according to claim 9, wherein the bank trench exposes the planarization layer.

11. The light-emitting display device according to claim 9, wherein the second spacer is disposed on top of the planarization layer.

12. The light-emitting display device according to claim 9, wherein the light-emitting layer is disposed on top of the planarization layer.

13. The light-emitting display device according to claim 1, wherein the light-emitting layer includes a cut portion formed in the non-light-emitting portion by the second spacer.

14. The light-emitting display device according to claim 1, wherein the at least one charge generation layer includes a first charge generation layer and a second charge generation layer.

15. The light-emitting display device according to claim 1, wherein each of the plurality of stacks includes a light-emitting material layer.

16. A sealing layer disposed on the second electrode, and The light-emitting display device according to claim 1, further including a touch sensor layer disposed on the sealing layer.

17. The light-emitting display device according to claim 16, wherein the touch sensor layer includes a first touch electrode and a second touch electrode that overlap with the second spacer.

18. The light-emitting display device according to claim 1, wherein the height of the second spacer is smaller than the height of the first spacer.

19. A substrate including a display area including a plurality of sub-pixels and a non-light-emitting portion between the plurality of sub-pixels, and a non-display area adjacent to the display area, and A first electrode disposed in each of the plurality of sub-pixels, A bank partitioning the plurality of sub-pixels, A light-emitting layer disposed on the first electrode, A second electrode disposed on the light-emitting layer, and A light-emitting display device including a cut portion for cutting the light-emitting layer between two adjacent sub-pixels among the plurality of sub-pixels.

20. The light-emitting display device according to claim 19, wherein the bank includes a plurality of bank holes respectively corresponding to the plurality of sub-pixels and a bank trench corresponding to the non-light-emitting portion.

21. The light-emitting display device according to claim 19, further including a first spacer disposed on the bank.

22. The light-emitting display device according to claim 21, wherein the cut portion is formed by a second spacer disposed in the bank trench.

23. The light-emitting display device according to claim 22, wherein the second spacer is made of the same material as the bank.

24. The light-emitting display device according to claim 22, wherein the height of the second spacer is smaller than the height of the first spacer.

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