Semiconductor switch
The semiconductor switch design addresses the challenge of shortening startup time while minimizing power consumption by using a controller circuit to dynamically adjust the current limit signal based on the voltage across the power transistor, ensuring efficient operation.
Patent Information
- Application Number
- JP2024011319
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-12-15
- Filing Date
- 2024-01-29
- Publication Date
- 2025-06-26
AI Technical Summary
Existing semiconductor switches face challenges in shortening startup time while minimizing power consumption, as increasing the limit current leads to higher power consumption, and setting it too low prolongs startup time.
A semiconductor switch design that includes an input terminal, an output terminal, a power transistor, a current detection circuit, and a controller circuit. The controller adjusts the gate voltage of the power transistor to ensure the current detection signal does not exceed a current limit signal, and changes the current limit signal to have a negative correlation with the voltage across the power transistor.
This design effectively shortens the startup time while maintaining low power consumption by dynamically adjusting the current limit signal based on the voltage across the power transistor.
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Figure 2025096092000001_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to a semiconductor switch.
Background Art
[0002] A semiconductor switch is used to switch the electrical conduction and interruption of a certain path. The semiconductor switch includes a power transistor connected between an input pin and an output pin, and a controller that controls the on and off of the power transistor.
Prior Art Documents
Patent Documents
[0003]
Patent Document 1
[0004] [Summary] In designing a semiconductor switch having a current limiting function for circuit protection, the inventor has come to recognize the following problems. An input voltage V IN is input to the input pin of the semiconductor switch, and a load is connected to the output pin. When the semiconductor switch is in the off state, a voltage unrelated to the input voltage V IN is generated at the output pin of the semiconductor switch, for example, zero.
[0005] When the semiconductor switch is switched on, the voltage (output voltage) V OUT of the output pin rises with time and approaches the input voltage V IN . The limit current I LIM of the semiconductor switch needs to be designed in consideration of the rated power of the semiconductor switch. The power consumption P of the semiconductor switch is the product of the potential difference ΔV (= V IN -V OUT ) between the input pin and the output pin and the current I flowing through the semiconductor switch. P = (V IN -V OUT ) × I
[0006] The power consumption of the semiconductor switch is maximized immediately after the semiconductor switch is turned on, and the output voltage V OUT is minimum and 0 V at this time. Therefore, the maximum power consumption is P MAX =V IN ×I LIM represented by. Therefore, increasing the limit current I LIM will increase the power consumption.
[0007] Conversely, if the limit current I LIM is set too low, the startup time until the output voltage V OUT rises to near the input voltage V IN will become longer.
[0008] The present disclosure has been made in such a situation, and an exemplary object of one of its aspects is to provide a semiconductor switch capable of shortening the startup time while suppressing an increase in power consumption.
[0009] A semiconductor switch according to an aspect of the present disclosure includes an input terminal, an output terminal, a power transistor connected between the input terminal and the output terminal, a current detection circuit that generates a current detection signal indicating the current flowing through the power transistor, and a controller circuit that switches the power transistor on and off in response to a control signal and adjusts the gate voltage of the power transistor so that the current detection signal does not exceed a current limit signal when the power transistor is in the on state. The controller circuit detects the voltage across the power transistor and changes the current limit signal so as to have a negative correlation with the voltage across the power transistor.
[0010] In addition, any combination of the above components, and components and expressions that are mutually replaced between methods, devices, systems, etc. are also effective as aspects of the present invention or the present disclosure. Furthermore, the description of this item (means for solving the problem) does not explain all the essential features of the present invention, and therefore, sub-combinations of these described features can also be the present invention.
Brief Description of the Drawings
[0011]
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[0012] [Detailed Description] (Overview of the Embodiment) An overview of some exemplary embodiments of the present disclosure will be described. This overview is for the purpose of providing a basic understanding of the embodiments as a prelude to the detailed description that follows, and simplifies and describes some concepts of one or more embodiments. It does not limit the scope of the invention or the disclosure. This overview is not an all-inclusive overview of all possible embodiments, nor is it intended to identify all important elements of all embodiments or to delineate the scope of some or all aspects. For convenience, the term "one embodiment" may be used to refer to one embodiment (example or variation) or multiple embodiments (examples or variations) disclosed herein.
[0013] A semiconductor switch according to one embodiment includes an input terminal, an output terminal, a power transistor connected between the input terminal and the output terminal, a current detection circuit that generates a current detection signal indicating the current flowing through the power transistor, and a controller circuit that switches the power transistor on and off in response to a control signal and adjusts the gate voltage of the power transistor so that the current detection signal does not exceed a current limit signal when the power transistor is in the on state. The controller circuit detects the voltage across the power transistor and varies the current limit signal to have a negative correlation with the voltage across the power transistor.
[0014] According to this configuration, the larger the voltage across the power transistor, the smaller the current limit signal, and the smaller the voltage across the power transistor, the larger the current limit signal. Immediately after turning on the semiconductor switch, the voltage across the power transistor is large, so the current control signal is small. However, as the voltage across the power transistor decreases over time, the current limit signal increases accordingly, and the current flowing through the power transistor increases. This can suppress an increase in power consumption while shortening the startup time.
[0015] In one embodiment, the current limit signal may be substantially inversely proportional to the voltage across the power transistor. In this case, the power consumption when the current limit is applied can be made constant without depending on the voltage across the power transistor.
[0016] In one embodiment, the controller circuit includes a current limit value setting circuit that generates a current limit signal based on the voltage of the input terminal and the voltage of the output terminal, a gate voltage generation circuit that applies a gate voltage of a high level or a low level to the gate of the power transistor according to a control signal, and a current limit circuit that adjusts the high-level gate voltage so that the current detection signal does not exceed the current limit signal.
[0017] In one embodiment, the gate voltage generation circuit may include a voltage source and a driver that applies a gate voltage corresponding to the output voltage of the voltage source to the gate of the power transistor. The current limit circuit may adjust the output voltage of the voltage source so that the current detection signal does not exceed the current limit signal.
[0018] In one embodiment, the current limit value setting circuit includes an A / D converter that converts the voltage of the input terminal and the voltage of the output terminal into digital voltage detection signals, a digital processing circuit that detects the voltage across the power transistor based on the voltage detection signals and generates a current limit value having a negative correlation with the voltage across the terminals, and a D / A converter that converts the current limit value into an analog current limit signal.
[0019] In one embodiment, the digital processing circuit may include a look-up table showing the relationship between the voltage detection signal and the current limit value.
[0020] In one embodiment, the digital processing circuit may generate the current limit value based on an arithmetic expression defining the relationship between the voltage detection signal and the current limit value.
[0021] In one embodiment, the digital processing circuit may divide a predetermined constant by the voltage detection signal and generate a current limit value according to the division result.
[0022] In one embodiment, the controller circuit may include an A / D converter that converts the voltages at the first and second ends of the power transistor into digital voltage detection signals, a digital processing circuit that detects the voltage across the power transistor based on the voltage detection signals and generates a current limit value having a negative correlation with the voltage across the two ends, and a D / A converter that converts the current limit value into an analog current limit signal.
[0023] In one embodiment, the controller circuit may include a voltage source, a driver that applies a gate voltage corresponding to the output voltage of the voltage source to the gate of the power transistor according to a control signal, and a current limit circuit that adjusts the gate voltage so that the current detection signal does not exceed the current limit signal.
[0024] In one embodiment, the power transistor is an N-type, and the current limit circuit may be a shunt regulator that extracts a current corresponding to the error between the current detection signal and the current limit signal from the output of the voltage source.
[0025] In one embodiment, the power transistor is an N-type, and the voltage source may be a charge pump circuit.
[0026] In one embodiment, the current detection circuit includes a replica transistor of the same type as the power transistor whose first end is connected to the input terminal and whose gate is connected to the gate of the power transistor, a regulator that adjusts the voltage at the second end of the replica transistor to be equal to the voltage at the corresponding terminal of the power transistor, and a current sense resistor connected between the second end of the replica transistor and the ground, and the voltage drop across the current sense resistor may be the current detection signal.
[0027] In one embodiment, the power transistor and the replica transistor may each be configured by connecting two transistors of the same type in inverse series. In this case, reverse current through the body diode of the power transistor can be prevented.
[0028] In one embodiment, the power transistor may be of P-type.
[0029] (Embodiment) Hereinafter, preferred embodiments will be described with reference to the drawings. The same or equivalent components, members, and processes shown in each drawing are denoted by the same reference numerals, and repeated descriptions will be omitted as appropriate. Also, the embodiments are illustrative and not restrictive of the disclosure and the invention, and all features and combinations thereof described in the embodiments are not necessarily essential to the disclosure and the invention.
[0030] In this specification, the phrase "member A is in a state of being connected to member B" includes not only the case where member A and member B are physically directly connected, but also the case where member A and member B are indirectly connected via other members that do not substantially affect their electrical connection state or impair the functions and effects achieved by their combination.
[0031] Similarly, the phrase "member C is in a state of being connected (provided) between member A and member B" includes not only the case where member A and member C, or member B and member C are directly connected, but also the case where they are indirectly connected via other members that do not substantially affect their electrical connection state or impair the functions and effects achieved by their combination.
[0032] (Embodiment) FIG. 1 is a circuit diagram of a semiconductor switch 100 according to an embodiment. The semiconductor switch 100 is an integrated circuit (IC) integrated on one semiconductor substrate. In the present embodiment, the semiconductor switch 100 is a switch IC.
[0033] The semiconductor switch 100 includes an input pin IN, an output pin OUT, and a control pin CNT. An input voltage V is applied to the input pin IN from the outside. A load 2 is connected to the output pin OUT. A control signal S for instructing on and off of the semiconductor switch 100 is input to the control pin CNT. The control signal S is a binary signal of a high level and a low level, and one of them is assigned to an on level for instructing the semiconductor switch 100 to turn on, and the other is assigned to an off level for instructing the semiconductor switch 100 to turn off. IN is applied. The semiconductor switch 100 includes a power transistor 110, a current detection circuit 120, and a controller circuit 130. The power transistor 110 is connected between the input pin IN and the output pin OUT. In this embodiment, the power transistor 110 is an NMOS transistor, that is, an N-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor). CNT is input. The current detection circuit 120 generates a current detection signal V indicating the current I flowing through the power transistor 110. CNT The controller circuit 130 switches on and off of the power transistor 110 according to the control signal S. Specifically, when the control signal S is at the on level, the power transistor 110 is turned on, and when the control signal S is at the off level, the power transistor 110 is turned off.
[0034] The semiconductor switch 100 has a current limiting function. The controller circuit 130, when the power transistor 110 is in the on state, checks if the current detection signal V
[0035] is equal to the current limit signal V
[0036] flows through the power transistor 110. OUT to generate a current detection signal V CS indicating the current I flowing through the power transistor 110.
[0037] The controller circuit 130 switches on and off of the power transistor 110 according to the control signal S. Specifically, when the control signal S CNT is at the on level, the power transistor 110 is turned on, and when the control signal S CNT is at the off level, the power transistor 110 is turned off. CNT is at the off level, the power transistor 110 is turned off.
[0038] The semiconductor switch 100 has a current limiting function. The controller circuit 130, when the power transistor 110 is in the on state, checks if the current detection signal V CS is equal to the current limit signal V ILIMAdjust the gate voltage V of the power transistor 110 so that it does not exceed. G Adjust the current limit signal V ILIM is an internal signal of the controller circuit 130 and is not shown in FIG. 1.
[0039] The controller circuit 130 detects the voltage ΔV across the power transistor 110, that is, the drain-source voltage. The voltage across the power transistor 110 can also be understood as the potential difference between the input pin IN and the output pin OUT. The controller circuit 130 changes the current limit signal V ILIM so as to have a negative correlation with the voltage ΔV across the two ends.
[0040] FIG. 2 is a diagram showing the relationship (current limit characteristic) between the voltage ΔV across the power transistor 110 and the current limit signal V ILIM . The current limit signal V ILIM defines the upper limit (limit current) I OUT of the current I flowing through the power transistor 110. As described above, the current limit signal V LIM has a negative correlation with the voltage ΔV across the power transistor 110, and the larger the voltage ΔV across the power transistor 110, the smaller the current limit signal V ILIM . ILIM becomes smaller.
[0041] The dashed line indicates the maximum rating P MAX of the power transistor 110, and V = P MAX / ΔV holds.
[0042] The current limit signal V ILIM can be defined within the range that does not exceed the maximum rating P MAX . In this example, the current limit signal V LIM is defined stepwise with respect to the voltage ΔV across the power transistor 110. In this case, the controller circuit 130 may be implemented with a look-up table.
[0043] The above is the configuration of the semiconductor switch 100. The advantages of the semiconductor switch 100 will become clear by comparison with the comparative technology. Therefore, the comparative technology will be described. In the comparative technology, the current limit signal V ILIM is fixed to a predetermined value V0. That is, the upper limit (limit current) of the output current I OUT is fixed to the current amount I LIM0 corresponding to the predetermined value V0.
[0044] FIG. 3 is a diagram for explaining the operation of the semiconductor switch according to the comparative technology. Before time t0, the control signal S CNT is at a low level, and the controller circuit 130 applies 0 V to the gate of the power transistor 110 to turn it off. Here, a capacitor is considered as the load.
[0045] At time t0, the control signal S CNT becomes high level. The controller circuit 130 applies a gate voltage V IN higher than the input voltage V G to the gate of the power transistor 110 to turn on the power transistor 110.
[0046] When the power transistor 110 is turned on, the output voltage V OUT generated at the output pin OUT rises. The current I OUT flowing through the power transistor 110 is clamped to the limit current I LIM0 . When the load is a capacitor, the output voltage V OUT rises with a constant slope with respect to time at a slope corresponding to the limit current I LIM0 . At time t1, when the output voltage V OUT rises to near the input voltage V IN , the current I OUT becomes zero and the startup is completed.
[0047] The startup time τ = t1 - t0 is limited by the limit current I LIM0 . The limit current I LIM0When fixing, in a state where ΔV immediately after startup is large, so as not to exceed the maximum rating of the power transistor 110, the limit current I LIM0 needs to be determined. Therefore, the limit current I LIM0 cannot be increased. For this reason, in the comparative technology, the startup time τ becomes long.
[0048] Subsequently, the operation of the semiconductor switch 100 according to the embodiment will be described.
[0049] FIG. 4 is a diagram for explaining the operation of the semiconductor switch 100 of FIG. 1 based on the current limiting characteristics of FIG. 2. Before time t0, the control signal S CNT is at a low level, and the controller circuit 130 applies 0 V to the gate of the power transistor 110 to turn it off.
[0050] At time t0, the control signal S CNT becomes high level. The controller circuit 130 applies a gate voltage V IN higher than the input voltage V G to the gate of the power transistor 110 to turn on the power transistor 110.
[0051] When the power transistor 110 turns on, the output voltage V OUT generated at the output pin OUT rises. As the output voltage V OUT rises, the voltage ΔV across both ends of the power transistor 110 decreases. Then, according to the relationship in FIG. 2, the limit current I LIM increases. Therefore, a larger output current I OUT flows compared to the comparative technology, and the output voltage V OUT rises at a faster speed compared to the comparative technology.
[0052] The above is the operation of the semiconductor switch 100. According to this semiconductor switch 100, the startup time τ can be shortened while suppressing an increase in power consumption.
[0053] Subsequently, the voltage ΔV across both ends of the power transistor and the current limiting signal VILIM Describe a modification example of the relationship.
[0054] (Modification Example 1) FIG. 5 is a diagram showing the current limiting characteristics according to Modification Example 1.
[0055] The dashed line indicates the maximum rating P of the power transistor 110. MAX is shown. The maximum rating P MAX With respect to, P LIM ≦P MAX A predetermined constant (upper limit power) P that satisfies LIM is defined. In Modification Example 1, V ILIM =P LIM / ΔV satisfies the relationship of, and V ILIM is inversely proportional to ΔV.
[0056] FIG. 6 is a diagram for explaining the operation of the semiconductor switch of FIG. 1 based on the current limiting characteristics of FIG. 5.
[0057] According to Modification Example 1, the power consumption of the power transistor 110 can be maintained at a substantially constant value determined by the constant P LIM .
[0058] (Modification Example 2) FIG. 7 is a diagram showing the current limiting characteristics according to Modification Example 2. In this Modification Example 2, the current limiting value V ILIM is defined by a straight line using a broken line within a range not exceeding the maximum rating P MAX .
[0059] The present disclosure is understood as the block diagram or circuit diagram of FIG. 1, or extends to various devices and methods derived from the above description, and is not limited to a specific configuration. Hereinafter, in order to help understand the essence and operation of the present disclosure and the present invention, and to clarify them, more specific configuration examples and embodiments will be described, rather than narrowing the scope of the present disclosure.
[0060] (Example 1) FIG. 8 is a circuit diagram of the semiconductor switch 100A according to Embodiment 1. In this embodiment, the power transistor 110 includes NMOS transistors 112 and 114 of the same type connected in series. The back gates of the first transistor 112 and the second transistor 114 are connected such that the body diodes thereof are in opposite directions. Thereby, a reverse flow from the output pin OUT to the input pin IN is prevented.
[0061] The controller circuit 130A includes a current limit value setting circuit 132A, a gate voltage generation circuit 140, and a current limit circuit 150.
[0062] The current limit value setting circuit 132A detects the voltage ΔV across the power transistor 110 based on the voltage V IN at the input pin IN and the voltage V OUT at the output pin OUT. Then, based on the voltage ΔV across the power transistor 110, a current limit signal V ILIM is generated.
[0063] The current limit value setting circuit 132A includes a selector 133, an A / D converter 134, a digital processing circuit 136A, and a D / A converter 138. The selector 133 receives the voltage V IN at the input pin IN and the voltage V OUT at the output pin OUT, and selects them in a time-division manner.
[0064] The A / D converter 134 converts the voltages V IN , V OUT selected by the selector 133 into digital voltage detection values D VIN , D VOUT respectively.
[0065] Two voltage detection values D VIN , D VOUT are input to the digital processing circuit 136A in a time-division manner. The digital processing circuit 136A calculates the difference between the two voltage detection values D VIN , D VOUT and obtains a voltage detection value D ΔV indicating the voltage ΔV across the power transistor 110.Generate it.
[0066] In this embodiment, the digital processing circuit 136A includes a look-up table 137 that defines the relationship between the voltage detection value D ΔV and the current limit value D ILIM . The look-up table 137 can be determined based on the current limit characteristics of FIG. 2, and the current limit value D ΔV is determined for each range of the voltage detection value D ILIM . If the size of the look-up table is increased, it is also possible to approach the current limit characteristics of FIG. 5. The digital processing circuit 136A generates the current limit value D ΔV corresponding to the current voltage detection value D ILIM by referring to the table. The D / A converter 138 converts the digital current limit value D ILIM into an analog current limit signal V ILIM .
[0067] The gate voltage generation circuit 140 applies a high-level or low-level gate voltage V CNT to the gate of the power transistor according to the control signal S G . In this embodiment, since the power transistor 110 is an NMOS transistor, the gate voltage generation circuit 140 generates a high-level gate voltage V CNT when the control signal S G is at the on level (high level) indicating the on state of the power transistor 110, and generates a low-level gate voltage V CNT when the control signal S G is at the off level (low level) indicating the off state of the power transistor 110. The high-level gate voltage V G is a voltage higher than the input voltage V IN , and the low-level gate voltage V G is the ground voltage (0V). The current limit circuit 150 adjusts the voltage level of the high-level gate voltage V CS so that the current detection signal V ILIM does not exceed the current limit signal V G .
[0068] The gate voltage generation circuit 140 includes a voltage source 142 and a driver 144. The voltage source 142 generates a voltage V G corresponding to the high level of the gate voltage V H . The driver 144 receives the voltage V H at the upper power supply node 146 and the ground voltage 0V at the lower power supply node 148. When the control signal S CNT at the input node is at the low level, the driver 144 outputs a gate voltage V G at the low level (0V), and when the control signal S CNT at the input node is at the high level, the driver 144 outputs a gate voltage V H at the high level (V G ). The voltage source 142 may be, for example, a charge pump circuit that boosts the input voltage V IN or a power supply voltage V DD not shown in the figure.
[0069] The current limiting circuit 150 adjusts the voltage level of the output voltage V CS of the voltage source 142 so that the current detection signal V ILIM does not exceed the current limiting signal V H .
[0070] Note that the configuration of the gate voltage generation circuit 140 is not limited to that in FIG. 7. For example, the on and off of the voltage source 142 may be controlled in conjunction with the control signal CNT. In this case, the driver 144 may be omitted, and the output voltage V H of the voltage source 142 may be directly supplied to the gate of the power transistor 110 as the gate voltage V G .
[0071] Alternatively, the output of the current limiting circuit 150 may be connected to the gate of the power transistor 110 to directly adjust the gate voltage V G .
[0072] FIG. 9 is a circuit diagram showing a configuration example of the current limiting circuit 150. In this example, the current limiting circuit 150 draws a current I from the output of the voltage source 142 so that the current detection signal V CS approaches the current limiting signal V ILIM .ADJ is a shunt regulator that sinks current I ADJ which is responsive to an error between the current detection signal V CS and the current limit signal V ILIM . The current limit circuit 150 includes a shunt transistor 152, an error amplifier (operational amplifier) 154, and an enable switch 156. The source of the shunt transistor 152 is grounded, and the drain is connected to the output node of the voltage source 142 via the enable switch 156. The enable switch 156 is controlled in response to an enable signal ILIM_EN. When the enable switch 156 is off, the current limit function is disabled. If it is desired to operate the current limit function constantly, the enable switch 156 may be omitted.
[0073] The error amplifier 154 receives the current detection signal V CS at its first input node (+) and the current limit signal V ILIM at its second input node (-). The output node of the error amplifier 154 is connected to the gate of the shunt transistor 152.
[0074] FIG. 10 is a circuit diagram showing a configuration example of the current detection circuit 120. The current detection circuit 120 includes a replica transistor 122, a regulator 124, and a current sense resistor 128.
[0075] One end of the replica transistor 122 is connected to the input pin IN, and the gate is connected to the gate of the power transistor 110. The replica transistor 122 has the same configuration as the power transistor 110. The size of the replica transistor 122 may be smaller than the size of the power transistor 110.
[0076] The regulator 124 adjusts the voltage V S at the second end of the replica transistor 122 to be equal to the voltage V OUT at the corresponding terminal of the power transistor 110, i.e., the output pin OUT. A detection current I OUT proportional to the current IDET The regulator 124 includes a transistor 125 and an error amplifier 126. The error amplifier 126 receives at its first input node (+) the voltage V OUT , and the voltage V of the second terminal of the replica transistor 122 is input to the second input node (−). S The output of the error amplifier 126 is connected to the gate of the transistor 125.
[0077] The current sense resistor 128 is connected between the drain of the replica transistor 122 and ground. The current sense resistor 128 is connected to the drain of the replica transistor 122 and ground. DET flows, and the detection current I DET This voltage drop is proportional to the current detection signal V CS It becomes.
[0078] Example 2 11 is a circuit diagram of a semiconductor switch 100B according to a second embodiment. Differences from the first embodiment will be described.
[0079] The controller circuit 130B includes a current limit value setting circuit 132B, a gate voltage generating circuit 140, and a current limiting circuit 150.
[0080] Similar to the current limit setting circuit 132A in the first embodiment, the current limit setting circuit 132B is configured to set the voltage V IN and the voltage at the output pin OUT, V OUT Based on the voltage ΔV across the power transistor 110, a current limit signal V ILIM Generate.
[0081] The current limit value setting circuit 132B includes a selector 133, an A / D converter 134, a digital processing circuit 136B, and a D / A converter 138. The selector 133 selects the voltage V IN and the voltage V at the output pin OUT OUT and selects them in a time-division manner.
[0082] The A / D converter 134 converts the voltages V IN , V OUT selected by the selector 133 into digital voltage detection values D VIN , D VOUT respectively.
[0083] Two voltage detection values D VIN , D VOUT are input to the digital processing circuit 136B in a time-division manner. The digital processing circuit 136B calculates the difference between the two voltage detection values D VIN , D VOUT and generates a voltage detection value D ΔV indicating the voltage ΔV across both ends of the power transistor 110.
[0084] In this embodiment, the digital processing circuit 136B includes an arithmetic unit 139 that executes an operation with the voltage detection value D ΔV as the input and the current limit value D ILIM as the output. The arithmetic unit 139 may include, for example, a divider and perform the following operations. Thereby, the current limit characteristics of FIG. 5 can be realized. D ILIM = P LIM / D ΔV
[0085] Alternatively, the following operations defined using constants a and b may be performed. D ILIM = -a1·D ΔV + b1 (D ΔV < TH1) D ILIM = -a2·D ΔV + b2 (TH1 < D ΔV < TH2) Thereby, the current limit characteristics of FIG. 7 can be realized.
[0086] Subsequently, a further modification example will be described.
[0087] (Modification Example 1) In the embodiment, the power transistor 110 is an N-channel MOSFET, but it may also be a P-channel MOSFET. In this case, the controller circuit 130 (gate voltage generation circuit 140) supplies a low-level gate voltage V CNT to the gate of the power transistor 110 when the control signal S G is at the on level, and supplies a high-level (V CNT ) gate voltage V IN to the gate of the power transistor 110 when the control signal S G is at the off level. The controller circuit 130 adjusts the low-level gate voltage V CS so that the current detection signal V ILIM does not exceed the current limit signal V G when the power transistor 110 is in the on state.
[0088] (Modification 2) In the embodiment, the semiconductor switch 100 is a switch IC, but the present disclosure is not limited thereto. The semiconductor switch 100 may be incorporated into a functional IC such as a controller IC of a DC / DC converter, a linear regulator IC, or a power management IC (PMIC). In this case, the input pin IN and the output pin OUT become internal nodes of the IC.
[0089] Regarding the embodiments according to the present disclosure, specific terms have been used for the description, but this description is merely an exemplification for facilitating understanding and does not limit the present disclosure or the scope of the claims. The scope of the present invention is defined by the scope of the claims. Also, not only the embodiments but also the embodiments, examples, and modifications not described herein are included in the scope of the present invention.
[0090] (Supplementary Note) The technology disclosed in this specification is defined as follows in one aspect.
[0091] (Item 1) An input terminal, an output terminal, A power transistor connected between an input terminal and an output terminal, a current detection circuit that generates a current detection signal indicating the current flowing through the power transistor, a controller circuit that switches the power transistor on and off in response to a control signal and adjusts the gate voltage of the power transistor so that the current detection signal does not exceed a current limit signal when the power transistor is in the on state, comprising The controller circuit is a semiconductor switch that detects the voltage across the power transistor and changes the current limit signal to have a negative correlation with the voltage across the power transistor.
[0092] (Item 2) The current limit signal is substantially inversely proportional to the voltage across the power transistor. The semiconductor switch according to Item 1.
[0093] (Item 3) The controller circuit a current limit value setting circuit that generates the current limit signal based on the voltage of the input terminal and the voltage of the output terminal, a gate voltage generation circuit that applies the gate voltage of a high level or a low level to the gate of the power transistor according to the control signal, a current limit circuit that adjusts the gate voltage of the high level so that the current detection signal does not exceed the current limit signal. The semiconductor switch according to Item 1 or 2. including
[0094] (Item 4) The gate voltage generation circuit a voltage source, a driver that applies the gate voltage corresponding to the output voltage of the voltage source to the gate of the power transistor, including The current limit circuit is the semiconductor switch according to Item 3 that adjusts the output voltage of the voltage source so that the current detection signal does not exceed the current limit signal.
[0095] (Item 5) The current limit value setting circuit includes an A / D converter that converts the voltage of the input terminal and the voltage of the output terminal into digital voltage detection signals respectively, a digital processing circuit that detects the voltage across the power transistor based on the voltage detection signal and generates a current limit value having a negative correlation with the voltage across the two ends, and a D / A converter that converts the current limit value into the analog current limit signal, The semiconductor switch according to Item 3 or 4.
[0096] (Item 6) The digital processing circuit includes a look-up table showing the relationship between the voltage detection signal and the current limit value. The semiconductor switch according to Item 5.
[0097] (Item 7) The digital processing circuit generates the current limit value based on an arithmetic expression defining the relationship between the voltage detection signal and the current limit value. The semiconductor switch according to Item 5.
[0098] (Item 8) The digital processing circuit divides a predetermined constant by the voltage detection signal and generates the current limit value according to the division result. The semiconductor switch according to Item 7.
[0099] (Item 9) The power transistor is of N type, The current limiting circuit is a shunt regulator that extracts a current corresponding to the error between the current detection signal and the current limit signal from the output of the voltage source. The semiconductor switch according to Item 4.
[0100] (Item 10) The power transistor is of N type, The voltage source is a charge pump circuit. The semiconductor switch according to Item 4 or 9.
[0101] (Item 11) The current detection circuit includes: A replica transistor of the same type as the power transistor, with its first terminal connected to the input terminal and its gate connected to the gate of the power transistor; and A regulator that adjusts the voltage at the second terminal of the replica transistor to be equal to the voltage at the corresponding terminal of the power transistor; and A current sense resistor connected between the second terminal of the replica transistor and ground, The semiconductor switch according to any one of Items 1 to 10, wherein the voltage drop across the current sense resistor is the current detection signal.
[0102] (Item 12) The semiconductor switch according to Item 11, wherein the power transistor and the replica transistor are each composed of two transistors of the same type connected in inverse series.
[0103] (Item 13) The semiconductor switch according to any one of Items 1 to 8, wherein the power transistor is of P type.
Explanation of Signs
[0104] 100 Semiconductor switch IN Input pin OUT Output pin CNT Control pin 110 Power transistor 112 First transistor 114 Second transistor V CS Current detection signal V ILIM Current limit signal 120 Current detection circuit 122 Replica transistor 124 Regulator 125 Transistor 126 Error amplifier 128 Current sense resistor 130 Controller Circuit 132 Current Limit Value Setting Circuit 133 Selector 134 A / D Converter 136 Digital Processing Circuit 137 Lookup Table 139 Arithmetic Unit 138 D / A Converter 140 Gate Voltage Generation Circuit 142 Voltage Source 144 Driver 150 Current Limiting Circuit 152 Shunt Transistor 154 Error Amplifier 156 Enable Switch
Claims
1. An input terminal; An output terminal; a power transistor connected between an input terminal and an output terminal; a current detection circuit for generating a current detection signal indicative of a current flowing through the power transistor; a controller circuit that switches the power transistor on and off in response to a control signal and adjusts a gate voltage of the power transistor so that the current detection signal does not exceed a current limit signal when the power transistor is on; Equipped with The controller circuit senses a voltage across the power transistor and varies the current limit signal in a negative relationship to the voltage across the power transistor.
2. 2. The semiconductor switch of claim 1, wherein the current limit signal is substantially inversely proportional to the voltage across the power transistor.
3. The controller circuit includes: a current limit value setting circuit that generates the current limit signal based on a voltage at the input terminal and a voltage at the output terminal; a gate voltage generating circuit that applies the gate voltage of a high level or a low level to the gate of the power transistor in response to the control signal; a current limiting circuit that adjusts the high level of the gate voltage so that the current detection signal does not exceed the current limiting signal; The semiconductor switch according to claim 1 or 2, comprising:
4. The gate voltage generating circuit includes: A voltage source; a driver that applies the gate voltage corresponding to an output voltage of the voltage source to a gate of the power transistor; Including, 4. The semiconductor switch of claim 3, wherein the current limiting circuit adjusts the output voltage of the voltage source such that the current sense signal does not exceed the current limit signal.
5. The current limit value setting circuit includes: an A / D converter that converts the voltage of the input terminal and the voltage of the output terminal into digital voltage detection signals; a digital processing circuit for detecting a voltage across the power transistor based on the voltage detection signal and generating a current limit value having a negative correlation with the voltage across the power transistor; a D / A converter for converting the current limit value into an analog current limit signal; The semiconductor switch of claim 3 , comprising:
6. The semiconductor switch according to claim 5 , wherein the digital processing circuit includes a look-up table indicating a relationship between the voltage detection signal and the current limit value.
7. 6. The semiconductor switch according to claim 5, wherein the digital processing circuit generates the current limit value based on an arithmetic expression that defines a relationship between the voltage detection signal and the current limit value.
8. The semiconductor switch according to claim 7 , wherein the digital processing circuit divides a predetermined constant by the voltage detection signal, and generates the current limit value according to a result of the division.
9. the power transistor is an N-type; 5. The semiconductor switch according to claim 4, wherein the current limiting circuit is a shunt regulator that extracts a current corresponding to an error between the current detection signal and the current limiting signal from the output of the voltage source.
10. the power transistor is an N-type; 5. The semiconductor switch of claim 4, wherein the voltage source is a charge pump circuit.
11. The current detection circuit includes: a replica transistor of the same type as the power transistor, the replica transistor having a first end connected to the input terminal and a gate connected to a gate of the power transistor; a regulator that adjusts the voltage of the second end of the replica transistor to be equal to the voltage of the corresponding terminal of the power transistor; a current sense resistor connected between the second end of the replica transistor and ground; 3. The semiconductor switch according to claim 1, wherein a voltage drop across the current sense resistor is the current detection signal.
12. The semiconductor switch according to claim 11 , wherein the power transistor and the replica transistor are each configured by connecting two transistors of the same type in anti-series.
13. 3. The semiconductor switch according to claim 1, wherein the power transistor is a P-type.
Citation Information
Patent Citations
Power shutdown protection circuit, method of controlling the same, power shutdown protection controller, and data storage device
JP2023107651A