Display device

Abstract

To detect a crack which is generated in a non-display area or an optical area.SOLUTION: A display device comprises: a substrate which includes a display area, an optical area disposed in the display area and including a through hole, and a non-display area enclosing the display area; a first detection line which is disposed in the non-display area and encloses an outer periphery of the display area; a second detection line which is disposed inside more than the first detection line and encloses an outer periphery of the display area and the through hole; and a plurality of metal patterns which is disposed along an outer periphery of the through hole below the second detection line. At least one of the plurality of metal patterns is electrically connected to the second detection line. Accordingly, when a crack is generated in the non-display area or the optical area, a location where the crack is generated may be identified.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] This specification relates to a display device, and more particularly, to a display device capable of detecting cracks generated in an optical region where a camera or a sensor is disposed.

Background Art

[0002] With the advent of the information age, the field of display devices that visually display electrical information signals has been rapidly developing, and research has continued to develop performance such as thinning, lightening, and low power consumption for various display devices.

[0003] Typical display devices include a liquid crystal display (LCD), a field emission display (FED), an electro-wetting display (EWD), and an organic light emitting display (OLED), and the like.

[0004] The field emission display represented by the organic light emitting display is a self-luminous display device, and unlike the liquid crystal display, it does not require a separate light source and can be manufactured in a lightweight and thin form. In addition, the field emission display is not only advantageous in terms of power consumption by low voltage driving, but also excellent in hue reproducibility, response speed, viewing angle, and contrast ratio (CR), and is expected to be utilized in various fields.

Summary of the Invention

Problems to be Solved by the Invention

[0005] The problem to be solved in one embodiment of this specification is to provide a display device capable of detecting cracks generated in a non-display region or an optical region.

[0006] Another problem to be solved in other embodiments of this specification is to provide a display device that can identify the position where a crack occurs when the crack occurs in a non-display area or an optical area.

[0007] The problems of this specification are not limited to the problems mentioned above, and other problems not mentioned may be clearly understood by those skilled in the art from the following description.

Means for Solving the Problems

[0008] The display device according to an embodiment of this specification includes a display area, an optical area disposed in the display area and including a through hole, and a substrate including a non-display area surrounding the display area, a first detection wiring disposed in the non-display area and surrounding the outer contour of the display area, a second detection wiring disposed inside the first detection wiring and surrounding the outer contour of the display area and the through hole, and a plurality of metal patterns disposed along the outer contour of the through hole under the second detection wiring, and at least one of the plurality of metal patterns is electrically connected to the second detection wiring.

[0009] Specific matters of other embodiments are included in the detailed description and the drawings.

Advantages of the Invention

[0010] The display device according to an embodiment of this specification can detect cracks occurring in the non-display area or the optical area.

[0011] The display device according to an embodiment of this specification can identify the position where a crack occurs when the crack occurs in the non-display area or the optical area.

[0012] The display device according to an embodiment of this specification can detect any of these even if a crack occurs above the sealing portion in the optical area including the through hole or in the insulating film disposed under the plurality of thin film transistors.

[0013] The effects related to this specification are not limited to the content exemplified above, and more diverse effects are included in this specification.

Brief Description of the Drawings

[0014]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Modes for Carrying Out the Invention

[0015] The advantages, features, and the methods to achieve them of this specification will become clear by referring to the embodiments described in detail below together with the accompanying drawings. However, this specification is not limited to the embodiments disclosed below, and is configured in various different shapes. Simply, these embodiments are provided to make the disclosure of this specification complete and to fully inform those with ordinary knowledge in the technical field to which this specification pertains of the scope of one embodiment of this specification.

[0016] The shapes, areas, ratios, angles, numbers, etc. disclosed in the drawings for explaining the embodiments of this specification are exemplary, so the embodiments of this specification are not limited to the matters illustrated. Throughout the specification, the same reference numerals refer to the same components. Also, when explaining an embodiment of this specification, if it is determined that a detailed description of related known technologies may obscure the gist of the embodiment of this specification, the detailed description thereof will be omitted. When terms such as "including", "having", "being made" mentioned in this specification are used, other parts may be added as long as "only" is not used. When a component is expressed in the singular, it includes the case of including a plurality unless otherwise explicitly stated.

[0017] When interpreting a component, it is interpreted as including an error range even without a separate explicit description.

[0018] When it is an explanation about the positional relationship, for example, when the positional relationship between two parts is described such as "on ~", "above ~", "below ~", "next to ~", etc., as long as "immediately" or "directly" is not used, one or more other parts may be located between the two parts.

[0019] An element or layer referred to as "on" another element or layer includes both the case where it is immediately above the other element and the case where another layer or another element is interposed in the middle.

[0020] Also, although the first, second, etc. are used to describe various components, these components are not limited by these terms. These terms are merely used to distinguish one component from another. Therefore, the first component mentioned below may be the second component within the technical idea of this specification.

[0021] Throughout the specification, the same reference numerals refer to the same components.

[0022] The areas and thicknesses of the respective components shown in the drawings are shown for the convenience of explanation, and an embodiment of this specification is not necessarily limited to the areas and thicknesses of the shown components.

[0023] The respective features of the various embodiments of this specification can be partially or wholly combined or combined with each other, enabling various technical linkages and drives, and each embodiment may be implemented independently of each other or may be implemented together in a related relationship.

[0024] In the following, an embodiment of this specification will be described with reference to the drawings.

[0025] FIG. 1 is a plan view of a display device according to an embodiment of this specification.

[0026] Referring to FIG. 1, a display device 100 according to an embodiment of this specification can include a circuit portion where a display panel DP and detection pads PAD are arranged.

[0027] According to an embodiment of this specification, the display panel DP can include a display area DA, an optical area OA arranged within the display area DA and including a through hole TH, and a non-display area NDA surrounding the display area DA.

[0028] The display area DA is an area where an image is displayed on the display panel DP.

[0029] In the display area DA, a large number of pixels P and a circuit for driving the large number of pixels P can be arranged. The large number of pixels P are the minimum units constituting the display area DA, and a display element can be arranged in each of the large number of pixels P. For example, an organic light-emitting element including an anode, a light-emitting layer, and a cathode can be arranged in each of the large number of pixels P, but it is not limited thereto. Also, the circuit for driving the large number of pixels P can include driving elements, wirings, etc. For example, the circuit can be composed of a thin-film transistor, a storage capacitor, a gate wiring, a data wiring, etc., but it is not limited thereto.

[0030] The optical area OA is located inside the display area DA. The optical area OA may be an area where the through-holes TH formed by punching the display panel DP are located. The optical area OA may be an area for arranging optoelectronic devices such as cameras, flashes, speakers, and optical sensors within the display area DA. The display panel DP can reduce the bezel area, which is the non-display area NDA, where the through-holes TH are arranged inside the display area DA, and maximize the display area DA. A product with a design that maximizes the display area DA can maximize the user's immersive feeling on the screen and be more aesthetically pleasing.

[0031] There may be two through-holes TH as shown in FIG. 1, but it is not limited thereto and can be arranged in various ways. For example, one or two holes may be arranged inside the display area DA, a camera may be arranged in the first hole, and a distance detection sensor or a face recognition sensor and a wide-angle camera may be arranged in the second hole.

[0032] The non-display area NDA is an area where no video is displayed.

[0033] The non-display area NDA can be hidden by a bent case (not shown) that cannot be seen from the front and is also referred to as the bezel area.

[0034] In FIG. 1, the non-display area NDA is shown surrounding the rectangular display area DA, but the forms and arrangements of the display area DA and the non-display area NDA are not limited to the example shown in FIG. 1. That is, the display area DA and the non-display area NDA may be in a form suitable for the design of the electronic device equipped with the display device 100. For example, exemplary forms of the display area DA may be pentagonal, hexagonal, circular, elliptical, etc.

[0035] In the non-display area NDA, various wirings and circuits for driving the organic light-emitting elements in the display area DA can be arranged. For example, in the non-display area NDA, link wirings for transmitting signals to a large number of sub-pixels and circuits in the display area DA, GIP (Gate-In-Panel) wirings, or driving ICs such as a gate driving unit and a data driving unit can be arranged, but it is not limited thereto.

[0036] In the non-display area NDA, a detection wiring 130 for detecting cracks generated in the display panel DP can be arranged. For example, the detection wiring 130 can include a first detection wiring 131 surrounding the outer contour of the display area DA, and a second detection wiring 132 arranged inside the first detection wiring 131 and surrounding the outer contour of the display area DA and the through hole TH. The first detection wiring 131 can detect cracks generated at the outer contour of the display panel DP, and the second detection wiring 132 can detect cracks generated in the optical area OA.

[0037] One end and the other end of each of the first detection wiring 131 and the second detection wiring 132 can be connected to a detection pad PAD arranged in the non-display area NDA, and the detection pad PAD can receive a detection signal output through the detection wiring 130.

[0038] The detection pad PAD can be located on a printed circuit film PCB connected to the non-display area NDA of the display panel DP, but it is not limited thereto, and the detection pad PAD may be directly mounted on the non-display area NDA of the display panel DP. On the printed circuit film PCB, a data driving unit for generating a data signal for driving the pixel P, a timing controller, etc. can be further located, but it is not limited thereto. When the detection pad PAD is located on the printed circuit film PCB, the first detection wiring 131 and the second detection wiring 132 may extend to the printed circuit film PCB.

[0039] The detection pad PAD can apply a detection signal to the first detection wiring 131 and receive the first detection signal received through this to inspect whether the first detection wiring 131 is normal. The detection pad PAD can apply a detection signal to the second detection wiring 132 and receive the second detection signal received through this to inspect whether the second detection wiring 132 is normal. The detection pad PAD can detect cracks around the non-display area NDA and the optical area OA according to whether the first detection wiring 131 is normal and whether the second detection wiring 132 is normal.

[0040] For example, when the display panel DP is performing a lighting inspection (auto probe) for final inspection, a certain level of power can be applied to the detection pad PAD either together or separately with other equipment to compare the input value and the output value. The degree of resistance can be grasped by the difference between the output value and the input value, and based on this, the presence or absence of a disconnection in the detection wiring can be confirmed. For example, when a crack occurs in the non-display area NDA of the display panel DP, part or all of the detection wiring 130 may be disconnected. For example, when part of the detection wiring 130 is disconnected, the resistance may gradually increase and the output power may become weak. Through this, it is possible to confirm whether a crack has occurred in the display panel DP based on the resistance-related characteristics, but the method for confirming the occurrence of a crack is not limited to this.

[0041] The display device 100 can further include various additional elements for generating various signals or driving the pixels P in the display area DA. The additional elements for driving the pixels P can include an inverter circuit, a multiplexer, an Electro Static Discharge (ESD) circuit, etc. The display device 100 can also include additional elements related to functions other than driving the pixels P. For example, the display device 100 can further include additional elements that provide a touch detection function, a user authentication function (e.g., fingerprint recognition), a multi-level pressure detection function, a tactile feedback function, etc. The aforementioned additional elements can be located in the non-display area NDA and / or an external circuit connected to the connection interface.

[0042] In the following, FIG. 2 will be referred to together for a more detailed explanation of the cross-sectional structure of the display area DA of the display device 100.

[0043] FIG. 2 is a cross-sectional view showing the cross-sectional structure of one pixel arranged in the display area according to an embodiment of the present specification.

[0044] The display device 100 according to an embodiment of the present specification may include a substrate 110, a first buffer layer 111, a first thin film transistor TR1, a second thin film transistor TR2, a first gate insulating layer 112a, a first interlayer insulating layer 113a, a second buffer layer 114, a second gate insulating layer 112b, a second interlayer insulating layer 113b, a connection electrode CE, a first planarization layer 115a, a second planarization layer 115b, an auxiliary electrode 145, a bank 116a, a spacer 116b, an anode 121, a light emitting layer 122, a cathode 123, a sealing portion 117, and a touch detection portion.

[0045] The substrate 110 serves to support and protect the components of the flexible display device disposed on the upper portion.

[0046] The substrate 110 is a configuration for supporting various components included in the display device 100 and may be made of an insulating material. The substrate 110 may include a first substrate 110a, a second substrate 110b, and an interlayer insulating film 110c. The interlayer insulating film 110c may be disposed between the first substrate 110a and the second substrate 110b. By configuring the substrate 110 with the first substrate 110a, the second substrate 110b, and the interlayer insulating film 110c in this way, moisture penetration can be prevented. For example, the first substrate 110a and the second substrate 110b may be polyimide (PI) substrates, and the interlayer insulating film 110c may be made of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multilayer thereof.

[0047] A light shielding layer 125 may be disposed on the substrate 110.

[0048] The first buffer layer 111 can be disposed on the substrate 110 covering the light-shielding layer 125. Specifically, a multi-buffer layer 111a can be disposed on the substrate 110 covering the light-shielding layer 125, and an active buffer layer 111b can be disposed on the multi-buffer layer 111a.

[0049] The multi-buffer layer 111a can delay the diffusion of moisture or oxygen that has penetrated the substrate 110 and can include at least one of silicon nitride (SiNx) and silicon oxide (SiOx).

[0050] The active buffer layer 111b can protect the first active layer A1 and block various types of defects flowing in from the substrate 110. For example, the active buffer layer 111b can include at least one of a-Si, silicon nitride (SiNx), and silicon oxide (SiOx).

[0051] The first thin film transistor TR1 can be disposed on the first buffer layer 111. The first thin film transistor TR1 can include a first active layer A1, a first gate electrode G1, a first source electrode S1, and a first drain electrode D1. Here, depending on the design of the pixel circuit, the first source electrode S1 can become the first drain electrode, and the first drain electrode D1 can become the first source electrode.

[0052] The first active layer A1 can be disposed on the first buffer layer 111 so as to overlap with the light-shielding layer 125. The first active layer A1 can include amorphous silicon or polycrystalline silicon. For example, the first active layer A1 can include low-temperature polycrystalline silicon (LTPS). For example, the polycrystalline silicon material has a high mobility (100 cm 2Since it has a voltage of / Vs or higher, low energy consumption power, and excellent reliability, it can be applied to a gate driver for a driving element that drives a thin film transistor for a display element and / or a multiplexer (MUX), etc. In the display device 100 according to an embodiment of the present specification, it can be applied to the first active layer A1 of the driving thin film transistor, but is not limited thereto. For example, depending on the characteristics of the display device 100, it can also be applied to the second active layer A2 of the switching thin film transistor. An amorphous silicon (a-Si) material is deposited on the first buffer layer 111, and polysilicon is formed by performing a dehydrogenation process and a crystallization process, and the polysilicon is patterned to form the first active layer A1. Here, the first active layer A1 can include a first channel region where a channel is formed, a first source region and a first drain region on both sides of the first channel region when the first thin film transistor TR1 is driven. The first source region means a portion of the first active layer A1 connected to the first source electrode S1, and the first drain region means a portion of the first active layer A1 connected to the first drain electrode D1. For example, the first source region and the first drain region can be formed by ion doping (impurity doping) of the first active layer A1. The first source region and the first drain region can be generated by ion doping the polysilicon material, and the first channel region can mean the portion left with the polysilicon material without being ion doped.

[0053] The first gate insulating layer 112a can be disposed on the first active layer A1. The first gate insulating layer 112a can be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multilayer thereof. Contact holes can be formed in the first gate insulating layer 112a for connecting the first source electrode S1 and the first drain electrode D1 of the first thin film transistor TR1 to the first source region and the first drain region of the first active layer A1 of the first thin film transistor TR1, respectively.

[0054] On the first gate insulating layer 112a, the first gate electrode G1 of the first thin film transistor TR1 and the first capacitor electrode C1 of the storage capacitor Cst can be arranged.

[0055] At this time, the first gate electrode G1 and the first capacitor electrode C1 can be formed of a single layer or a multilayer made of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and neodymium (Nd) or an alloy thereof. The first gate electrode G1 can be formed on the first gate insulating layer 112a so as to overlap with the first channel region of the first active layer A1 of the first thin film transistor TR1.

[0056] The first capacitor electrode C1 may be omitted based on the driving characteristics of the display device 100, the structure and type of the thin film transistor, etc. The first gate electrode G1 and the first capacitor electrode C1 can be formed by the same process. And the first gate electrode G1 and the first capacitor electrode C1 can be formed of the same material and formed on the same layer.

[0057] A first interlayer insulating layer 113a can be arranged on the first gate insulating layer 112a, the first gate electrode G1, and the first capacitor electrode C1. The first interlayer insulating layer 113a can be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multilayer thereof. And a contact hole for exposing the first source region and the first drain region of the first active layer A1 of the first thin film transistor TR1 can be formed in the first interlayer insulating layer 113a.

[0058] The second capacitor electrode C2 of the storage capacitor Cst can be disposed on the first interlayer insulating layer 113a. The second capacitor electrode C2 can be formed of a single layer or a multilayer made of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and neodymium (Nd), or an alloy thereof. The second capacitor electrode C2 can be formed on the first interlayer insulating layer 113a so as to overlap the first capacitor electrode C1. Also, the second capacitor electrode C2 can be formed of the same material as the first capacitor electrode C1. The second capacitor electrode C2 may be omitted based on the driving characteristics of the display device 100, the structure and type of the thin film transistor, and the like.

[0059] The second buffer layer 114 can be disposed on the first interlayer insulating layer 113a and the second capacitor electrode C2. The second buffer layer 114 can be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx), or a multilayer thereof. Contact holes for exposing the first source region and the first drain region of the first active layer A1 of the first thin film transistor TR1 can be formed in the second buffer layer 114. Also, contact holes for exposing the second capacitor electrode C2 of the storage capacitor Cst can be formed in the second buffer layer 114.

[0060] The second buffer layer 114 can also be formed in a multilayer, but is not limited thereto.

[0061] On the second buffer layer 114, a second active layer A2 of the second thin film transistor TR2 may be disposed. Here, the second thin film transistor TR2 may include a second active layer A2, a second gate insulating layer 112b, a second gate electrode G2, a second source electrode S2, and a second drain electrode D2. Also, the first thin film transistor TR1 and the second thin film transistor TR2 may be disposed in different layers. The second thin film transistor TR2 may be disposed on the first thin film transistor TR1, but is not limited thereto. Here, depending on the design of the pixel circuit, the second source electrode S2 may become the drain electrode, and the second drain electrode D2 may become the source electrode.

[0062] Also, the second active layer A2 may include a second channel region where a channel is formed during the driving of the second thin film transistor TR2, a second source region on both sides of the second channel region, and a second drain region. The second source region may mean a portion of the second active layer A2 connected to the second source electrode S2, and the second drain region may mean a portion of the second active layer A2 connected to the second drain electrode D2.

[0063] The second active layer A2 can be made of an oxide semiconductor. Since the oxide semiconductor material has a larger bandgap compared to the silicon material, electrons cannot cross the bandgap in the off state, resulting in a low off-current. Therefore, a thin-film transistor including an active layer made of an oxide semiconductor can be suitable for a switching thin-film transistor with a short on-time and a long off-time maintenance, but is not limited thereto. Depending on the characteristics of the display device 100, it may also be applied to the driving thin-film transistor. And since the off-current is small, the size of the auxiliary capacitance can be reduced, so it is suitable for high-resolution display elements. For example, the second active layer A2 can be made of a metal oxide, such as various metal oxides like IGZO (indium-gallium-zinc-oxide). Here, the second active layer A2 of the second thin-film transistor TR2 is described assuming it is composed of IGZO among various metal oxides, but it is not limited thereto and may be formed of other metal oxides such as IZO (indium-zinc-oxide), IGTO (indium-gallium-tin-oxide), or IGO (indium-gallium-oxide) that are not IGZO.

[0064] The second active layer A2 can be formed by depositing a metal oxide on the second buffer layer 114 and performing a heat treatment process for stabilization, and then patterning the metal oxide.

[0065] The second gate insulating layer 112b can be disposed over the entire substrate 110 including the second active layer A2. For example, the second gate insulating layer 112b can be composed of a single layer or a multilayer of silicon nitride (SiNx) or silicon oxide (SiOx).

[0066] The second gate electrode G2 can be disposed on the second gate insulating layer 112b.

[0067] The second gate electrode G2 can be formed of a single layer or a multilayer composed of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and neodymium (Nd), or an alloy thereof.

[0068] For example, a metal substance is formed on the second gate insulating layer 112b. After a photoresist pattern is formed on the metal substance, the metal substance is wet-etched using the photoresist pattern as a mask to form the second gate electrode G2. A wet etching solution for etching the metal substance can be a substance that selectively etches molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and neodymium (Nd) or an alloy thereof that constitutes the metal substance and does not etch the insulating substance.

[0069] The second interlayer insulating layer 113b can be disposed on the second gate insulating layer 112b and the second gate electrode G2. Contact holes for exposing the first active layer A1 of the first thin film transistor TR1 and the second active layer A2 of the second thin film transistor TR2 can be formed in the second interlayer insulating layer 113b. For example, contact holes for exposing the first source region and the first drain region of the first active layer A1 in the first thin film transistor TR1 can be formed in the second interlayer insulating layer 113b. Contact holes for exposing the second source region and the second drain region of the second active layer A2 in the second thin film transistor TR2 can be formed in the second interlayer insulating layer 113b.

[0070] The second interlayer insulating layer 113b can be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multilayer thereof.

[0071] A connection electrode CE, the first source electrode S1 and the first drain electrode D1 of the first thin film transistor TR1, and the second source electrode S2 and the second drain electrode D2 of the second thin film transistor TR2 can be disposed on the second interlayer insulating layer 113b.

[0072] The connecting electrode CE can be electrically connected to the second drain electrode D2 of the second thin film transistor TR2. And the connecting electrode CE can be electrically connected to the second capacitor electrode C2 of the storage capacitor Cst through contact holes formed in the second buffer layer 114, the second gate insulating layer 112b, and the second interlayer insulating layer 113b. That is, the connecting electrode CE can play a role of electrically connecting the second capacitor electrode C2 of the storage capacitor Cst and the second drain electrode D2 of the second thin film transistor TR2.

[0073] Here, the first source electrode S1 and the first drain electrode D1 of the first thin film transistor TR1 can be connected to the first active layer A1 of the first thin film transistor TR1 through contact holes formed in the first gate insulating layer 112a, the first interlayer insulating layer 113a, the second buffer layer 114, and the second interlayer insulating layer 113b.

[0074] The second source electrode S2 and the second drain electrode D2 of the second thin film transistor TR2 can be connected to the second active layer A2 through contact holes formed in the second interlayer insulating layer 113b.

[0075] The connecting electrode CE, the first source electrode S1 and the first drain electrode D1 of the first thin film transistor TR1, and the second source electrode S2 and the second drain electrode D2 of the second thin film transistor TR2 can be formed of the same material by the same process.

[0076] For example, the connection electrode CE, the first source electrode S1 and the first drain electrode D1 of the first thin film transistor TR1, and the second source electrode S2 and the second drain electrode D2 of the second thin film transistor TR2 can be formed of a single layer or multiple layers made of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), neodymium (Nd), or an alloy thereof. For example, the connection electrode CE, the first source electrode S1 and the first drain electrode D1 of the first thin film transistor TR1, and the second source electrode S2 and the second drain electrode D2 of the second thin film transistor TR2 can be formed in a three-layer structure of titanium (Ti) / aluminum (Al) / titanium (Ti), but is not limited thereto.

[0077] The connection electrode CE can be formed integrally connected to the second drain electrode D2 of the second thin film transistor TR2, but is not limited thereto.

[0078] The first planarization layer 115a can be disposed on the connection electrode CE, the first source electrode S1 and the first drain electrode D1 of the first thin film transistor TR1, the second source electrode S2 and the second drain electrode D2 of the second thin film transistor TR2, and the upper portion of the second interlayer insulating layer 113b.

[0079] The first planarization layer 115a may be an organic layer for planarizing and protecting the upper portions of the first thin film transistor TR1 and the second thin film transistor TR2. For example, the first planarization layer 115a can be formed of an organic substance such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin.

[0080] The auxiliary electrode 145 can be disposed on the first planarization layer 115a. The auxiliary electrode 145 can be connected to the second drain electrode D2 of the second thin-film transistor TR2 through the contact hole of the first planarization layer 115a. The auxiliary electrode 145 can serve to electrically connect the second thin-film transistor TR2 and the anode 121. And the auxiliary electrode 145 can be formed of a single layer or a multilayer made of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and neodymium (Nd) or an alloy thereof. The auxiliary electrode 145 can be formed of the same material as the second source electrode S2 and the second drain electrode D2 of the second thin-film transistor TR2.

[0081] The second planarization layer 115b can be disposed on the auxiliary electrode 145 and the first planarization layer 115a. Also, although not shown in the drawings, a third planarization layer may be disposed on the second planarization layer 115b. For example, the second planarization layer 115b and the third planarization layer can be formed of an organic material such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, and a polyimide resin.

[0082] The light-emitting element 120 can be disposed on the second planarization layer 115b.

[0083] The anode 121 can be disposed on the second planarization layer 115b. At this time, the anode 121 can be electrically connected to the auxiliary electrode 145 through the contact hole provided in the second planarization layer 115b or the third planarization layer. The anode 121 can be formed of a metallic material.

[0084] When the display device 100 is of the top emission type in which the light emitted by the light emitting element 120 is emitted above the substrate 110, the anode 121 can further include a transparent conductive layer and a reflective layer on the transparent conductive layer. The transparent conductive layer can be made of a transparent conductive oxide such as, for example, ITO, IZO, etc., and the reflective layer can be made of, for example, silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr) or an alloy thereof, etc.

[0085] The bank 116a can be arranged while covering the anode 121. The bank 116a can be a pixel defining film that exposes the light emitting region of each sub-pixel. A portion of the bank 116a corresponding to the light emitting region of the sub-pixel can be open. A part of the anode 121 can be exposed in the open portion (hereinafter referred to as the open region) of the bank 116a. At this time, the bank 116a can be made of an inorganic insulating material such as silicon nitride (SiNx), silicon oxide (SiOx), or an organic insulating material such as a benzocyclobutene-based resin, an acrylic-based resin, or an imide-based resin, or an opaque material (for example, a black material) to prevent light interference between adjacent sub-pixels. In this case, the bank 116a can include a light-shielding material composed of at least one of a colored pigment, an organic black, and carbon, but is not limited thereto. A spacer 116b can be further arranged on the bank 116a.

[0086] The light emitting layer 122 can be arranged in the open region of the bank 116a. Thereby, the light emitting layer 122 can be arranged on the anode 121 exposed through the open region of the bank 116a.

[0087] The cathode 123 can be arranged so as to cover the light emitting layer 122 and the bank 116a.

[0088] The light emitting element 120 can be formed by the anode 121, the light emitting layer 122, and the cathode 123. The light emitting layer 122 can include a number of organic films.

[0089] The encapsulation portion 117 can be positioned on the above-described light-emitting element 120.

[0090] The encapsulation portion 117 can have a single-layer structure or a multilayer structure. For example, the encapsulation portion 117 can include a first encapsulation layer 117a, a second encapsulation layer 117b, and a third encapsulation layer 117c.

[0091] At this time, the first encapsulation layer 117a and the third encapsulation layer 117c can be formed of an inorganic film, and the second encapsulation layer 117b can be formed of an organic film. Among the first encapsulation layer 117a, the second encapsulation layer 117b, and the third encapsulation layer 117c, the second encapsulation layer 117b is the thickest and can serve as a planarization layer.

[0092] The first encapsulation layer 117a is disposed on the cathode 123 and can be disposed so as to be closest to the light-emitting element 120. The first encapsulation layer 117a can be formed of an inorganic insulating material capable of low-temperature vapor deposition. For example, the first encapsulation layer 117a can be formed of silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiON), aluminum oxide (Al2O3), or the like. Since the first encapsulation layer 117a is vapor-deposited in a low-temperature atmosphere, it is possible to prevent the light-emitting layer 122 containing organic substances, which is vulnerable to a high-temperature atmosphere, from being damaged during the vapor-deposition process.

[0093] The second encapsulation layer 117b can be formed in an area smaller than that of the first encapsulation layer 117a. In this case, the second encapsulation layer 117b can be formed so as to expose both ends of the first encapsulation layer 117a. The second encapsulation layer 117b can serve as a buffer to relieve stress between layers due to warping of the flexible display device and as a role to enhance planarization performance.

[0094] For example, the second encapsulation layer 117b can be formed of an organic insulating material such as an acrylic resin, an epoxy resin, a polyimide, a polyethylene, or a silicon oxycarbide (SiOC). For example, the second encapsulation layer 117b may be formed through an inkjet method, but is not limited thereto.

[0095] The third encapsulation layer 117c can be formed to cover the upper surfaces and side surfaces of the second encapsulation layer 117b and the first encapsulation layer 117a on the substrate on which the second encapsulation layer 117b is formed. At this time, the third encapsulation layer 117c can minimize or block the penetration of external moisture and oxygen into the first encapsulation layer 117a and the second encapsulation layer 117b. For example, the third encapsulation layer 117c can be made of an inorganic insulating material such as silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiON), or aluminum oxide (Al2O3).

[0096] A touch detection layer can be disposed on the encapsulation part 117.

[0097] For example, a touch buffer layer 118a can be disposed on the third encapsulation layer 117c, and a touch electrode TE can be disposed on the touch buffer layer 118a.

[0098] The touch electrode TE can include a touch sensor electrode TS and a touch bridge electrode BM located in different layers. A touch interlayer insulating layer 118b can be disposed between the touch sensor electrode TS and the touch bridge electrode BM.

[0099] The touch buffer layer 118a and the touch interlayer insulating layer 118b can be disposed to eliminate the step at the location where the touch electrode TE is disposed and to be electrically well insulated.

[0100] On the other hand, although not shown in the figure, a polarizing layer can be disposed on the touch detection layer.

[0101] The polarizing layer suppresses the reflection of external light on the display area DA of the substrate 110. When the display device 100 is used externally, external natural light may flow in and be reflected by the reflective layer included in the anode 121 of the light-emitting element 120, or be reflected by the electrode made of metal disposed under the light-emitting element 120. The image of the display device 100 may not be visible due to the light reflected in this way. The polarizing layer polarizes the light flowing in from the outside in a specific direction and prevents the reflected light from being emitted outside the display device 100.

[0102] Although not shown, a cover glass may be adhered to the polarizing layer by an adhesive layer. The adhesive layer can serve to adhere the components of the display device 100 to each other, and can be formed using, for example, a pressure-sensitive adhesive, an optically clear adhesive (OCR), an optically clear resin (OCR), or other adhesives for optically transparent displays, but is not limited thereto.

[0103] The cover glass can protect the components of the display device 100 from external impacts and prevent damage such as scratches from occurring.

[0104] FIG. 3 is a plan view showing an enlarged view of area A corresponding to the optical region of FIG. 1. FIG. 4 is a plan view showing an enlarged view of area B of FIG. 3. FIG. 5 is a cross-sectional view taken along line V-V' of the optical region of FIG. 4.

[0105] Referring to FIG. 3, the optical region OA has a through hole TH at the center for the arrangement of optoelectronic devices, and a camera module or a sensor can be arranged here. The optical region OA can include all regions where a circular or elliptical through hole TH and a dam 150, a connection prevention portion 140, etc. in the vicinity are arranged. The through hole TH can be removed by laser in the panel completion step. The non-display region NDA can be located between the through hole TH and the display region DA, and a high-potential power supply wiring PL, a gate wiring SL, etc. can be arranged. Although the light-emitting elements 120 and pixel circuits in the corresponding region are removed by the arrangement of the optical region OA, the light-emitting elements 120 and pixel circuits arranged above, below, left, and right with respect to the optical region OA must be electrically connected. For this purpose, the high-potential power supply wiring PL, the gate wiring SL, etc. can be arranged in the non-display region NDA near the optical region OA so as to be connected up, down, left, and right by bypassing the through hole TH.

[0106] Referring to FIG. 3, the connection prevention portion 140 may be composed of a first prevention portion 141 and a second prevention portion 142, and a dam 150 may be disposed between the first prevention portion 141 and the second prevention portion 142. In one embodiment of this specification, although one dam 150 is illustrated, it is not limited thereto, and further dams can be arranged depending on the spatial arrangement. Referring to FIG. 3, the first prevention portion 141, the dam 150, the second detection wiring 132, the metal wiring 162, and the second prevention portion 142 may be sequentially arranged around the through hole TH.

[0107] Generally, the dam 150 may be for the purpose of preventing a part of the second sealing layer 117b, which is a part of the sealing portion 117, from slipping down to the end of the outer peripheral portion of the display panel DP, and maintaining the adhesive force between the upper substrate and the lower substrate constituting the display panel DP.

[0108] The dam 150 in the optical region OA may also be formed to prevent the second sealing layer 117b of the sealing portion 117 for protecting the light emitting element 120 from invading or leaking into the optical region OA.

[0109] The first prevention portion 141 and the second prevention portion 142 may be arranged for the purpose of protecting the light emitting element 120 in the display region from moisture or oxygen that may flow in from the through hole TH. The cathode 123 of the light emitting element 120 may be deposited on the front surface of the display panel DP, or may be uniformly deposited on the optical region OA as well. Moisture and oxygen can be transmitted to the light emitting element 120 in the display region DA through the cathode 123. To prevent this, the first prevention portion 141 and the second prevention portion 142 can be configured to partially cut off the cathode 123. In this specification, two prevention portions are illustrated, but it is not limited thereto.

[0110] The first prevention part 141 includes a first structure 141-1 and a second structure 141-2, and the second prevention part 142 can include a third structure 142-1 and a fourth structure 142-2. Referring to FIGS. 3 and 4, it can be seen that the first prevention part 141, the dam 150, and the second prevention part 142 are arranged in a closed loop shape around the through hole TH. Arranging the first prevention part 141, the dam 150, and the second prevention part 142 in a closed loop shape is because if there is an opening even at a single location, moisture and oxygen may penetrate from the outside into the display area DA, or conversely, the second sealing layer 117b may overflow from the inside into the optical area OA and further into the through hole TH. Referring to FIG. 4, the first prevention part 141 and the second prevention part 142 can be composed of two structures each, but it is not limited thereto. For example, the structure can be composed of one or three or more, but it is not limited thereto.

[0111] Referring to FIGS. 3, 4, and 5, the second detection wiring 132 can be arranged between the first prevention part 141 and the dam 150. That is, the second detection wiring 132 can include a first branch part 132a, a first outer part 132b, an inner part 132c, a second outer part 132d, and a second branch part 132e, and the inner part 132c is arranged between the through hole TH and the first outer part 132b or the second outer part 132d. Also, the first branch part 132a and the second branch part 132e are arranged to overlap with the dam 150.

[0112] A through hole TH can be formed in the optical area OA of the display panel DP to arrange a camera or an optical sensor. A precision cutting process using a laser can be performed on the substrate 110 in the optical area OA of the display panel DP to form the through hole TH.

[0113] The laser can be irradiated in a circular or elliptical shape along the form of the optical region OA, and all regions above the substrate 110 including the substrate 110 can be removed through the laser irradiation. There may be a difference between the actual optical region OA and the laser irradiation region. For example, in the optical region OA, the laser irradiation region may be an inner region about 100 μm deeper. Only when there is a difference between the laser irradiation region and the optical region OA can the insulating layer of the optical region OA be free from damage during laser irradiation.

[0114] The laser can use a picosecond laser or a femtosecond laser, but is not limited thereto. The laser utilizes the light amplified by adding energy to a specific substance to generate induced emission, has characteristics like radio waves, has directivity in monochromatic light, and is used in communication, medical, and industrial applications. By using the laser, a pattern can be formed at a desired site or a specific site can be easily removed. The laser forms or removes a pattern by using energy. When the energy of the laser is irradiated onto the subject, the thermal energy melts the subject to form a pattern. The longer the time the laser is irradiated, the more likely a thermal effect is generated in the vicinity of the portion where the pattern is formed. Such a thermal effect can cause heat to accumulate around the laser irradiation region of the subject, and the surrounding region can be burned or deformed by heat up to a region larger than the set pattern. Due to such characteristics of the laser, if the region irradiated by the laser overlaps or is adjacent to the insulating film, the thermal energy of the laser can also cause deformation in the insulating film. Cracks are generated due to the deformation of the insulating film, and the cracks can propagate through the insulating film to cause peeling or moisture and oxygen penetration. For example, in order to prevent deformation and peeling in insulating films such as the multi-buffer layer 111a, the active buffer layer 111b, the first gate insulating layer 112a, the first interlayer insulating layer 113a, the second buffer layer 114, the second gate insulating layer 112b, and the second interlayer insulating layer 113b, all insulating films can be removed at a distance of about 100 μm from the laser irradiation position.

[0115] Cracks generated during the cutting of the substrate 110 through the laser can be transmitted through the rigid inorganic insulating layer that is not flexible. Or, cracks due to interference may occur during the assembly of the camera or sensor in the through hole TH formed by the laser. The cracks generated at this time can also be propagated through the inorganic insulating layer. When the cracks generated in the through hole TH are propagated through the inorganic insulating layer, line defects or growing dark spot (GDS) defects may occur.

[0116] To prevent this, according to an embodiment of the present specification, when a crack occurs near the through hole TH, a second detection wiring 132 capable of detecting it can be arranged.

[0117] According to an embodiment of the present specification, the second detection wiring 132 can be formed to confirm the expansion of the crack generated on the cut surface of the through hole TH.

[0118] Referring to both FIGS. 2, 4, and 5, the second detection wiring 132 according to an embodiment of the present specification can be arranged in the same layer as a plurality of touch sensor electrodes TS or a plurality of touch bridge electrodes BM arranged on the sealing portion 117. Therefore, it may be easy to detect the cracks generated on the sealing portion 117, but it may be difficult to detect the cracks generated in the inorganic insulating layer under the sealing portion 117 or transmitted through the inorganic insulating layer.

[0119] Therefore, according to an embodiment of the present specification, under the second detection wiring 132, a plurality of metal patterns 161 are further arranged so as to overlap the second detection wiring 132 and along the outer contour of the through hole TH, and at least one of the plurality of metal patterns 161 can be electrically connected to the second detection wiring 132. The plurality of metal patterns 161 can be formed in polygons such as triangles, quadrilaterals, pentagons, etc., but the shape of the plurality of metal patterns 161 is not limited thereto.

[0120] For example, when cracks occur or the generated cracks are transmitted in inorganic insulating layers such as the multi-buffer layer 111a, the active buffer layer 111b, the first gate insulating layer 112a, the first interlayer insulating layer 113a, the second buffer layer 114, the second gate insulating layer 112b, and the second interlayer insulating layer 113b, a part of the second detection wiring 132 connected to the plurality of metal patterns 161 may be disconnected and the resistance may increase. Thereby, cracks generated or transmitted in the inorganic insulating layer in the optical region OA can be precisely detected.

[0121] According to an embodiment of the present specification, a metal wiring 162 connecting the plurality of metal patterns 161 may be further included. For example, the metal wiring 162 may be arranged with the same material in the same layer as the gate wiring or the second gate electrode G2. Even if cracks occur in the region between the plurality of metal patterns 161 by connecting the metal wiring 162 between the plurality of metal patterns 161, it can be precisely detected by the metal wiring 162.

[0122] Referring to both FIGS. 4 and 5, the first prevention part 141 may include a first structure 141-1 and a second structure 141-2 as described with reference to FIG. 4. The first structure 141-1 and the second structure 141-2 may be formed in a two-stage structure of upper and lower parts for the interruption of the cathode 123 that can be a moisture permeation path from the region where the through hole TH is arranged, and an undercut structure can be formed on the upper side surface. Specifically, the upper parts of the first structure 141-1 and the second structure 141-2 are arranged to have a trapezoidal cross section with a positive taper, and the lower parts are arranged to have a rectangular cross section with a positive taper or a constant height close to vertical, so that a width difference may occur between the lower surface of the upper part and the upper surface of the lower part, which is the contact point between the upper and lower parts. Since the upper surface of the lower part may be formed thinner than the lower surface of the upper part, an undercut structure in which a part of the lower surface of the upper part is exposed may be formed. Thereby, the cathode 123 vapor-deposited on the front surface of the display panel DP can be interrupted by the undercut structure on the side surface of the upper parts of the first structure 141-1 and the second structure 141-2 described above.

[0123] The first structure 141-1 and the second structure 141-2 that constitute the first prevention part 141 can be made of an organic substance and an inorganic substance. For example, the upper parts of the first structure 141-1 and the second structure 141-2 can be made of the same material as the first planarization layer 115a or the second planarization layer 115b, but are not limited thereto. Also, the lower parts of the first structure 141-1 and the second structure 141-2 can be made of the same material as the second interlayer insulating layer 113b, but are not limited thereto.

[0124] The second prevention part 142 can include a third structure 142-1 and a fourth structure 142-2. The third structure 142-1 and the fourth structure 142-2 that constitute the second prevention part 142 can be formed in a two-stage structure of an upper part and a lower part like the first structure 141-1 and the second structure 141-2. The second sealing layer 117b disposed on the second prevention part 142 makes it difficult for moisture or oxygen to penetrate from above, and an undercut structure can be formed on the side surface of the upper part in the same manner as the first prevention part 141 in order to block the penetration path mainly on the side where the through holes TH and the first prevention part 141 are disposed. By arranging the first prevention part 141 and the second prevention part 142, it is possible to stop moisture or oxygen that penetrates through the cathode 123 to the light-emitting element 120 in the display area DA in the optical region OA.

[0125] The third structure 142-1 and the fourth structure 142-2 that constitute the second prevention part 142 can also be made of an organic substance and an inorganic substance. For example, the upper parts of the third structure 142-1 and the fourth structure 142-2 can be made of the same material as the first planarization layer 115a or the second planarization layer 115b, but are not limited thereto. The lower parts of the third structure 142-1 and the fourth structure 142-2 can be made of the same material as the second interlayer insulating layer 113b, but are not limited thereto.

[0126] As shown in FIG. 5, the dam 150 can be formed by laminating the second planarization layer 115b, the bank 116a, and the spacer 116b, but is not limited thereto, and may further include the first planarization layer 115a or other layers.

[0127] The second detection wiring 132 disposed between the second structure 141-2 of the first prevention part 141 and the dam 150 may be disposed in the same layer as the plurality of touch sensor electrodes TS or the plurality of touch bridge electrodes BM.

[0128] The second detection wiring 132 may be electrically connected by a plurality of metal patterns 161 disposed in the same layer as the second gate electrode G2 of the display panel DP and contact holes that expose a part of the plurality of metal patterns 161 on the plurality of metal patterns 161.

[0129] The line width of the second detection wiring 132 is not limited, but may be selected in consideration of the size of the structure of the first prevention part 141 and the crack detection sensitivity. The designed width of the second detection wiring 132 may be smaller than the structure of the first prevention part 141 for preventing the penetration of moisture and oxygen. The second detection wiring 132 may be disposed adjacent to the second prevention part 142, but may preferably be disposed between the first prevention part 141 and the dam 150 in order to initially detect whether a crack has occurred.

[0130] FIG. 6 is a plan view of an optical region according to an embodiment of the present specification. The plan view of FIG. 6 is for explaining the contact between the plurality of metal patterns and the second detection wiring in the optical region, and overlapping descriptions excluding the contact between the plurality of metal patterns and the second detection wiring are omitted for convenience of explanation.

[0131] According to other features of the present specification, the plurality of metal patterns 161 may be connected to the second detection wiring 132 by contact holes that expose a part of the plurality of metal patterns 161 on the plurality of metal patterns 161.

[0132] According to an embodiment of the present specification, even if only any one of a plurality of metal patterns 161 connected to each other by a plurality of metal wirings 162 is connected to the second detection wiring 132, if a crack occurs or a generated crack is transmitted in an inorganic insulating layer such as the multi-buffer layer 111a, the active buffer layer 111b, the first gate insulating layer 112a, the first interlayer insulating layer 113a, the second buffer layer 114, the second gate insulating layer 112b, and the second interlayer insulating layer 113b, a part of the second detection wiring 132 connected to the plurality of metal patterns 161 may be disconnected and the resistance may increase. As a result, it is possible to precisely detect a crack that occurs or is transmitted in the inorganic insulating layer in the optical region OA.

[0133] In the following, FIG. 7 will be referred to together for a more detailed description of the optical region OA of the display device according to another embodiment of the present specification.

[0134] FIG. 7 is a cross-sectional view of a display device according to another embodiment of the present specification. The plan view of FIG. 7 is substantially the same in other configurations except for the metal wiring connecting a plurality of metal patterns in the optical region. Therefore, for the sake of convenience of explanation, redundant explanations excluding metal wirings such as a plurality of metal patterns and the second detection wiring are omitted.

[0135] According to the display device 200 according to another embodiment of the present specification, the metal wiring 262 connecting the plurality of metal patterns 261 includes a first portion P1, a second portion P2 facing the first portion, a third portion P3 connected to one end of the first portion P1 and one end of the second portion P2, and a fourth portion P4 facing the third portion P3 and connected to the other end of the first portion P1 and the other end of the second portion P2, and at least one of the first portion P1, the second portion P2, the third portion P3, and the fourth portion P4 of the metal wiring 262 may be composed of a plurality of metal wirings.

[0136] Specifically, the first portion P1 may consist of one metal wiring, the second portion P2 may consist of two metal wirings, the third portion P3 may consist of three metal wirings, and the fourth portion P4 may consist of five metal wirings. For example, the plurality of metal wirings may be such that the metal wiring 262 is connected in parallel, or metal wirings made of the same material are further arranged in parallel in the same layer as the metal wiring 262.

[0137] According to another embodiment of the present specification, by varying the number of the metal wirings 262 depending on the position, the first portion P1, the second portion P2, the third portion P3, and the fourth portion P4 of the metal wiring 262 may have different resistance values from each other. Therefore, when the metal wiring 262 connecting between the plurality of metal patterns 261 is disconnected due to a crack, the degree of resistance increase varies depending on the number of the disconnected cracks. Accordingly, when the number varies depending on the position of the metal wiring 262, the position where the crack has occurred can be accurately detected.

[0138] In the following, FIG. 8 is referred to together for a more detailed description of the optical region OA of the display device according to another embodiment of the present specification.

[0139] FIG. 8 is a plan view of a display device according to another embodiment of the present specification. The plan view of FIG. 8 is substantially the same in other configurations except for the contacts of the plurality of metal patterns and the second detection wiring in the optical region. Therefore, for convenience of explanation, duplicate explanations except for the contacts of the plurality of metal patterns and the second detection wiring are omitted.

[0140] In the display device 300 according to another embodiment of the present specification, the plurality of metal patterns 361 may be connected to the second detection wiring 332 by contact holes that expose a part of the plurality of metal patterns 361 on the plurality of metal patterns 361. For example, the contact holes are arranged in at least two or more of the plurality of metal patterns 361, and the second detection wiring 332 may be electrically connected to at least two or more of the plurality of metal patterns 361 through the contact holes.

[0141] According to another embodiment of the present specification, when at least two or more, more preferably all of the plurality of metal patterns 361 connected to each other by the plurality of metal wirings 362 are connected to the second detection wiring 332, when cracks occur or the generated cracks are transmitted in inorganic insulating layers such as the multi-buffer layer 111a, the active buffer layer 111b, the first gate insulating layer 112a, the first interlayer insulating layer 113a, the second buffer layer 114, the second gate insulating layer 112b, and the second interlayer insulating layer 113b, a part of the second detection wiring 332 connected to the plurality of metal patterns 361 may be disconnected and the resistance may increase. Thereby, cracks generated or transmitted in the inorganic insulating layer in the optical region OA can be precisely detected.

[0142] Embodiments of the present invention can also be described as follows.

[0143] A display device according to an embodiment of the present specification includes a substrate including a display region, an optical region disposed in the display region and including a through hole, and a non-display region surrounding the display region, a first detection wiring disposed in the non-display region and surrounding the outer periphery of the display region, a second detection wiring disposed inside the first detection wiring and surrounding the outer periphery of the display region and the through hole, and a plurality of metal patterns disposed along the outer periphery of the through hole under the second detection wiring, and at least one of the plurality of metal patterns is electrically connected to the second detection wiring.

[0144] According to another feature of the present specification, it can further include a metal wiring connecting the plurality of metal patterns.

[0145] According to another feature of the present specification, the metal wiring connecting the plurality of metal patterns is composed of a first portion, a second portion facing the first portion, a third portion connected to one end of the first portion and one end of the second portion, and a fourth portion facing the third portion and connected to the other end of the first portion and the other end of the second portion, and at least one of the first portion, the second portion, the third portion, and the fourth portion of the metal wiring may be composed of a plurality of metal wirings.

[0146] According to other features of this specification, the second part may consist of two metal wirings, the third part may consist of three metal wirings, and the fourth part may consist of four metal wirings.

[0147] According to other features of this specification, the first part, the second part, the third part, and the fourth part of the metal wirings may have different resistance values from each other.

[0148] According to other features of this specification, the display area may further include a plurality of thin film transistors disposed on a substrate, a plurality of light emitting elements disposed on the plurality of thin film transistors, a sealing portion covering the plurality of light emitting elements, and a plurality of touch sensor electrodes and a plurality of touch bridge electrodes disposed on the sealing portion. The second detection wiring may be disposed in the same layer as the plurality of touch sensor electrodes or the plurality of touch bridge electrodes.

[0149] According to other features of this specification, the first detection wiring may be disposed in the same layer as the second detection wiring.

[0150] According to other features of this specification, the plurality of thin film transistors are disposed on the substrate of the display area, and further include a first thin film transistor including a first active layer containing silicon, a first gate electrode, a first source electrode, and a first drain electrode, and a second thin film transistor disposed on the first thin film transistor and including a second active layer containing an oxide, a second gate electrode, a second source electrode, and a second drain electrode. The plurality of metal patterns may be disposed in the same layer as the first gate electrode.

[0151] According to other features of this specification, the plurality of metal patterns may be connected to the second detection wiring by contact holes that expose a part of the plurality of metal patterns on the plurality of metal patterns.

[0152] According to other features of this specification, the contact holes are disposed in at least two or more of the plurality of metal patterns, and the second detection wiring may be electrically connected to at least two or more of the plurality of metal patterns through the contact holes.

[0153] According to other features of this specification, it further includes at least one dam disposed on the substrate and surrounding the through hole, and at least one connection prevention portion disposed on the substrate and closer to the through hole than the at least one dam, and the second detection wiring can be disposed between the at least one dam and the at least one connection prevention portion.

[0154] According to other features of this specification, it can further include an optoelectronic device disposed to overlap with the optical region.

[0155] As described above, with reference to the accompanying drawings, the embodiments of this specification have been described in more detail. However, this specification is not necessarily limited to such embodiments, and various modifications can be made within the scope not deviating from the technical idea of this specification. Therefore, the embodiments disclosed in this specification are not for limiting the technical idea of this specification, but for explaining it, and the scope of the technical idea of this specification is not limited by such embodiments. Therefore, it should be understood that the embodiments described above are exemplary in all aspects and not restrictive. All technical ideas within the scope equivalent to the claims of this specification should be construed as being included in the scope of rights of this specification.

Claims

1. A substrate including a display area, an optical area disposed within the display area and including a through hole, and a non-display area surrounding the display area; A first detection wiring disposed in the non-display area and surrounding the outer contour of the display area; A second detection wiring disposed inside the first detection wiring and surrounding the outer contour of the display area and the through hole; A plurality of metal patterns disposed along the outer contour of the through hole under the second detection wiring; and A display device, wherein at least one of the plurality of metal patterns is electrically connected to the second detection wiring.

2. The display device according to claim 1, further including a metal wiring connecting the plurality of metal patterns.

3. The metal wiring connecting the plurality of metal patterns is composed of a first portion, a second portion facing the first portion, a third portion connected to one end of the first portion and one end of the second portion, and a fourth portion facing the third portion and connected to the other end of the first portion and the other end of the second portion, The display device according to claim 1, wherein at least one of the first portion, the second portion, the third portion, and the fourth portion of the metal wiring is composed of a plurality of the metal wirings.

4. The second portion is composed of two of the metal wirings; The third portion is composed of three of the metal wirings; The fourth portion is composed of four of the metal wirings. The display device according to claim 3.

5. The display device according to claim 4, wherein the first portion, the second portion, the third portion, and the fourth portion of the metal wiring have different resistance values from each other.

6. The display area further includes a plurality of thin film transistors disposed on the substrate, A plurality of light emitting elements disposed on the plurality of thin film transistors, A sealing portion covering the plurality of light emitting elements, and A plurality of touch sensor electrodes and a plurality of touch bridge electrodes disposed on the sealing portion, The display device according to claim 1, wherein the second detection wiring is disposed in the same layer as the plurality of touch sensor electrodes or the plurality of touch bridge electrodes.

7. The display device according to claim 6, wherein the first detection wiring is disposed in the same layer as the second detection wiring.

8. The plurality of thin film transistors are disposed on the substrate in the display area, and include a first thin film transistor including a first active layer containing silicon, a first gate electrode, a first source electrode, and a first drain electrode. A second thin film transistor disposed on the first thin film transistor and including a second active layer containing an oxide, a second gate electrode, a second source electrode, and a second drain electrode, The display device according to claim 6, wherein the plurality of metal patterns are disposed in the same layer as the first gate electrode.

9. The display device according to claim 8, wherein the plurality of metal patterns are connected to the second detection wiring by contact holes that expose a part of the plurality of metal patterns on the plurality of metal patterns.

10. The contact holes are disposed in at least two or more of the plurality of metal patterns, The display device according to claim 9, wherein the second detection wiring is electrically connected to at least two or more of the plurality of metal patterns through the contact holes.

11. At least one dam disposed on the substrate and surrounding the through hole, Further including at least one connection prevention portion disposed on the substrate and closer to the through hole than the at least one dam, The display device according to claim 1, wherein the second detection wiring is disposed between at least one of the dams and at least one of the connection prevention portions.

12. The display device according to claim 1, further including an optoelectronic device disposed to overlap with the optical region.

13. A substrate including a display region, an optical region disposed within the display region and including a through hole, and a non-display region surrounding the display region, The second detection wiring surrounding the outer periphery of the display region and the through hole, The display region includes a plurality of thin film transistors disposed on the substrate, The plurality of thin film transistors are A first thin film transistor disposed on the substrate in the display region and including a first active layer containing polysilicon, A display device including a second thin film transistor including a second active layer containing an oxide.

14. The display device according to claim 13, wherein the first thin film transistor and the second thin film transistor are disposed in different layers from each other.

15. The display device according to claim 14, wherein the second thin film transistor is disposed on the first thin film transistor.

16. The display device according to claim 13, wherein a first planarization layer is disposed on the first thin film transistor and the second thin film transistor, and a second planarization layer is disposed on the first planarization layer.

17. The display device according to claim 16, wherein a third planarization layer is disposed on the second planarization layer.

18. The display device according to claim 17, wherein at least one of the second planarization layer and the third planarization layer is provided with an auxiliary electrode that electrically connects the second thin film transistor to the light emitting diode.

19. The display device according to claim 18, wherein the display area includes a bank, and a light emitting layer of the light emitting diode is exposed through an open area of the bank.

20. The display device according to claim 19, wherein the bank is made of an opaque material.

21. The display device according to claim 19, wherein the bank includes a light shielding substance made of at least one of a colored pigment, organic black, and carbon.

22. The display device according to claim 13, wherein a sealing portion is disposed on the light emitting diode.

23. The display device according to claim 22, wherein the display area includes a plurality of touch sensor electrodes and a plurality of touch bridge electrodes disposed on the sealing portion.

24. The display device according to claim 23, wherein the second detection wiring is disposed in the same layer as the plurality of touch sensor electrodes or the plurality of touch bridge electrodes.

25. The display device according to claim 13, wherein the second detection wiring includes a first branch portion, a first outer portion, an inner portion, a second outer portion, and a second branch portion, and the inner portion is disposed between the through hole and the first outer portion or the second outer portion.

26. The display device further includes at least one dam disposed on the substrate and surrounding the through hole, The display device according to claim 25, wherein the first branch portion and the second branch portion are disposed so as to overlap the at least one dam.

Images