Display apparatus

Abstract

To provide a display apparatus that can prevent penetration of external moisture by improving a stacked structure of an insulation layer and a protective layer in a first pattern portion of a first area formed for disposing a camera of a hole-in-display.SOLUTION: A display apparatus comprises: a substrate including a display area and a non-display area; a first area disposed in the display area; a hole area, a first pattern portion, a first dam portion and a second pattern portion in the first area; an encapsulation layer, a first insulating layer and a second insulating layer on at least a part of the first area; and a plurality of first patterns disposed in the first pattern portion. The first insulating layer and the second insulating layer are separated from each other between the plurality of first patterns. The first insulating layer and the second insulating layer are in contact with each other on at least a part of an upper surface of the plurality of first patterns.SELECTED DRAWING: Figure 6

Description

Technical Field

[0001] This specification relates to a display device, and more particularly to a display device capable of preventing penetration of external moisture.

Background Art

[0002] Recent display devices that can display various information and interact with users who view the relevant information are required to have various sizes, various forms, and various functions.

[0003] Such display devices include a liquid crystal display device (LCD), an electrophoretic display device (FPD), and an organic light emitting diode display device (OLED).

[0004] The organic light emitting display device is a self-luminous display device. Different from a liquid crystal display device (LCD), it does not require a separate light source, so it can be manufactured in a lightweight and thin form. In addition, the organic light emitting diode display device is not only advantageous in terms of power consumption due to low voltage driving, but also excellent in terms of color rendering, response speed, viewing angle, and contrast ratio (CR), so it is being studied as a next-generation display.

[0005] The organic light emitting diode display device uses a number of thin film transistors (or "TFT") to control the current flowing through the organic light emitting diode to display an image.

[0006] Display devices are being developed with additional components such as cameras, speakers, and sensors.

[0007] In particular, in order to arrange a sensor such as a camera in the display device, a hole in display (Hole In Display) structure for forming a hole in the device is applied.

[0008] There is a problem that external moisture penetrates into the display area inside the display panel by forming holes in the display device.

Summary of the Invention

Problems to be Solved by the Invention

[0009] This specification can form a through hole in an area for arranging a camera within a display area of a display device.

[0010] The through hole can be formed by removing a substrate and layers on the substrate.

[0011] To form a through hole in the display area, a first area including a hole area, a first pattern part, a first dam part, and a second pattern part can be arranged.

[0012] A plurality of first patterns including a columnar lower pattern and a trapezoidal upper pattern on the lower pattern can be arranged in the first pattern part adjacent to the hole area of the first area to cut off the connection of the light-emitting layer.

[0013] An insulating layer arranged on the plurality of first patterns can form an empty space (ES) without being filled in an inverse taper region formed between the plurality of first patterns.

[0014] A seam can be formed by the empty space (ES) and the end of the trapezoidal upper pattern.

[0015] In the hole area formed by removing the substrate and layers on the substrate, the side surface of the layer on the substrate can be exposed to the outside.

[0016] There was a problem that the quality of the display device deteriorated because external moisture flowing into the organic insulating layer formed of an organic substance among the layers on the substrate exposed to the outside penetrated into the panel display area through a seam formed in the first pattern part adjacent to the hole area.

[0017] Therefore, the present specification has invented a display device that can prevent the penetration of external moisture by improving the laminated structure of an insulating layer and a protective layer on a first pattern portion of a first region formed to dispose a camera of a Hole In Display.

[0018] The problem to be solved according to an embodiment of the present specification is to provide a display device capable of preventing the penetration of external moisture by disposing a protective layer between insulating layers on a first pattern portion of a first region formed to dispose a camera, and a manufacturing method thereof.

[0019] The problem to be solved according to an embodiment of the present specification is not limited to the problems mentioned above, and other problems not mentioned will be clearly understood by those skilled in the art from the following description.

Means for Solving the Problem

[0020] The display device according to an embodiment of the present specification includes a substrate including a display region and a non-display region, and a first region disposed in the display region, and includes a hole region, a first pattern portion, a first dam portion, and a second pattern portion in the first region, a sealing layer on at least a part of the first region, a first insulating layer, a second insulating layer, and a plurality of first patterns disposed on the first pattern portion, the first insulating layer and the second insulating layer are separated from each other between the plurality of first patterns, and the first insulating layer and the second insulating layer may be in contact with each other at least on a part of the upper surface of the plurality of first patterns.

[0021] Specific matters of other embodiments are included in the detailed description and the drawings.

[0022] The display device according to an embodiment of the present specification includes an insulating layer and a protective layer structure on a first pattern portion of a first region formed to dispose a camera within a display region, thereby effectively preventing the penetration of external moisture of the panel, and can provide a display device capable of improving the quality degradation of the panel due to moisture permeability and a manufacturing method thereof.

[0023] The effects of this specification are not limited to the effects mentioned above, and other effects not mentioned will be clearly understood by those skilled in the art from the following description.

[0024] As described above, since the content of the invention described in the problem to be solved, the means for solving the problem, and the effects does not specify the essential features of the claims, the scope of the claims is not limited by the matters described in the content of the invention.

Brief Description of the Drawings

[0025]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Modes for Carrying Out the Invention

[0026] The advantages, features, and the methods for achieving them of this specification will become clear by referring to the embodiments described in detail hereinafter together with the attached drawings. However, this specification is not limited to the embodiments disclosed below and may be embodied in various different forms, provided that these embodiments make the disclosure of this specification complete and are provided to fully inform those having ordinary knowledge in the technical field to which this specification belongs of the scope of the invention, and this specification is only defined by the scope of the claims.

[0027] The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining the embodiments of this specification are exemplary, so this specification is not limited to the illustrated matters. The same reference signs throughout the specification indicate the same components. Also, in the description of this specification, when it is determined that a specific description of related known technologies may unnecessarily obscure the gist of this specification, the detailed description thereof will be omitted. When terms such as "including", "having", "consisting of", etc. mentioned in this specification are used, other parts may be added as long as "only" is not used. When a component is expressed in the singular, it includes the case of including a plurality unless otherwise explicitly stated.

[0028] In the interpretation of components, even if there is no separate explicit description of the error range, it is interpreted as including the error range.

[0029] In the case of an explanation of the positional relationship, for example, when the positional relationship between both parts is explained by "above", "on the upper part", "on the lower part", "sideways", etc., one or more other parts may be located between both parts as long as "immediately" or "directly" is not used.

[0030] In the case of an explanation of the time relationship, when the time sequence relationship is explained by "after", "subsequent to", "next", "before", etc., it can include the case where it is not continuous as long as "immediately" or "directly" is not used.

[0031] The first, second, etc. are used to describe various components, but these components are not limited by these terms. These terms are merely used to distinguish one component from another. Therefore, the first component mentioned below may be the second component within the technical idea of this specification.

[0032] In the description of the components of this specification, terms such as first, second, A, B, (a), (b), etc. can be used. Such terms are only for distinguishing the components from other components, and do not limit the essence, order, sequence, or number of the corresponding components. When a component is described as being "connected", "coupled", or "connected" to another component, the component can be directly connected or connected to the other component, but unless otherwise explicitly stated, it should be understood that other components may "intervene" between the components that can be indirectly connected or connected.

[0033] "At least one" should be understood to include all combinations of one or more of the related components. For example, the meaning of "at least one of the first, second, and third components" includes not only the first, second, or third components, but also all combinations of two or more of the first, second, and third components.

[0034] As used herein, "apparatus" can include display devices such as liquid crystal modules (Liquid Crystal Module; LCM) including a display panel and a driving unit for driving the display panel, and organic light emitting display modules (OLED Module). And it can also include set electronic devices or set devices such as notebook computers, televisions, computer monitors, vehicle or automotive apparatus, mobile electronic apparatuses such as smartphones or electronic pads, etc., which are complete products including LCM, OLED modules, etc.

[0035] Therefore, the devices described in this specification can include the display device itself such as an LCM, an OLED module, etc., and a set device which is an application product or a device for the end consumer including an LCM, an OLED module, etc.

[0036] And in some embodiments, an LCM or an OLED module composed of a display panel, a driving unit, etc. may be expressed as a "display device", and an electronic device as a finished product including an LCM or an OLED module may be distinguished and expressed as a "set device". For example, the display device can include a liquid crystal (LCD) or an organic light emitting (OLED) display panel and a source PCB which is a control unit for driving the display panel. The set device can further include a set PCB which is a set control unit electrically connected to the source PCB to drive the whole set device.

[0037] The display panels used in the embodiments of this specification can be all forms of display panels such as a liquid crystal display panel, an organic light emitting diode (OLED) display panel, and an electroluminescent display panel, and the embodiments are not limited thereto. For example, the display panel can be a display panel capable of generating sound by vibrating by the vibration device according to the embodiments of this specification. The display panel applied to the display device according to the embodiments of this specification is not limited by the form and size of the display panel.

[0038] The respective features of the various embodiments of this specification can be partially or wholly combined or combined with each other, various linkages and drives are technically possible, and each embodiment may be implemented independently of each other or may be implemented together in a related relationship.

[0039] Hereinafter, by examining the embodiments of this specification through the attached drawings and embodiments, it is as follows. Since the scale of the components illustrated in the drawings has a scale different from the actual one for the convenience of explanation, it is not limited to the scale illustrated in the drawings.

[0040] Hereinafter, various embodiments of this specification will be described in detail with reference to the drawings.

[0041] FIG. 1 is a plan view schematically showing an example of a display device according to an embodiment of this specification.

[0042] The display device 10 can include a plurality of regions. For example, the display device 10 includes one or more display regions AA which are regions where an image is displayed, and a pixel PXL array is formed inside the display region AA. One or more non-display regions NA where an image is not displayed include a drive circuit portion and a dam portion, and may be provided on one side surface of the display region AA. For example, the non-display region NA may be adjacent to one or more side surfaces of the display region AA.

[0043] Referring to FIG. 1, the non-display region NA can be located outside surrounding the substantially rectangular display region AA. However, it should be understood that the shape of the display region AA and the arrangement of the non-display region NA adjacent to the display region AA are not specifically limited to the exemplary display device 10 illustrated in FIG. 1. The display region AA and the non-display region NA may be of any shape of the display device 10. Examples of such shapes can include a pentagon, a hexagon, a circle, an ellipse, etc., and the embodiments of this specification are not limited thereto.

[0044] Each pixel PXL of the display region AA includes sub-pixels, and the sub-pixels can display colors such as red (R), green (G), blue (B), white (W), etc. Also, each of the pixel PXL and the sub-pixels may be associated with a pixel circuit including one or more transistors (TFT: Thin Film Transistor) manufactured on the substrate of the display device 10. Each pixel circuit may be electrically connected to a gate line and a data line to communicate with one or more drive circuits, for example, a gate driver GIP and a data driver D-IC located in the non-display region NA of the display device 10.

[0045] One or more driving circuits may be implemented by TFTs configured within a non-display area NA as illustrated in FIG. 1. For example, the gate driver GIP may be implemented using a plurality of TFTs on the substrate of the display device 10. Non-limiting examples of circuits that may be implemented by the TFTs on the substrate may include an inverter circuit, a multiplexer, and an ESD (electro static discharge) circuit, etc., and the embodiments of the present specification are not limited thereto.

[0046] Some driving circuits may be provided as IC (integrated circuit) chips and may be mounted within the non-display area NA of the display device 10 using COG (chip-on-glass) or other similar methods. Also, some driving circuits may be further mounted on other substrates and may be coupled to connection interfaces (pads / bumps, pins) arranged in the non-display area NA using printed circuits such as flexible PCBs (printed circuit boards), COF (chip-on-film), TCP (tape-carrier-package), or other suitable technologies.

[0047] In the embodiments of the present specification, at least two different types of TFTs are used for the TFT substrate of the display. The types of TFTs employed in part of the pixel circuit and part of the driving circuit may vary depending on the requirements of the display.

[0048] For example, the pixel circuit may be implemented by a TFT having an oxide active layer (oxide TFT), and the driving circuit may be implemented by a TFT having a low-temperature polycrystalline silicon active layer (LTPS TFT) and a TFT having an oxide active layer. Different from LTPS TFTs, oxide TFTs do not have the problem of variation in the threshold voltage Vth from pixel to pixel. A uniform threshold voltage Vth may also be obtained in an array of pixel circuits for the display. The problem of the uniformity of the threshold voltage Vth among the TFTs implementing the driving circuit will have less direct impact on the luminance uniformity of the pixels.

[0049] A drive circuit (e.g., GIP) incorporates a gate drive IC inside the display panel, enabling cost reduction by reducing the number of drive ICs and providing a high-speed scan signal to the display area of the display panel.

[0050] Using a drive circuit on a substrate implemented with LTPS TFTs, signals and data can be provided to pixels at a higher clock than when all TFTs in the TFT panel are formed of oxide TFTs. Therefore, a display capable of high-speed operation can be provided without unevenness. For example, the advantages of oxide TFTs and LTPS TFTs can be combined with the design of the TFT panel, and oxide TFTs and LTPS TFTs can be selected and used according to each advantage.

[0051] The display area AA can include a first area PH. The first area PH includes a hole area H, a first pattern portion PT1 surrounding the hole area H, a first dam portion DM, a second pattern portion PT2, and a routing wiring area RK for arranging a camera inside the display area AA. These configurations will be described in detail later.

[0052] FIG. 2 and FIG. 3 are perspective views schematically illustrating an example of a display device according to an embodiment of the present specification.

[0053] The display device according to an embodiment of the present specification can be applied to a foldable display device.

[0054] A foldable display device can include at least one display area AA.

[0055] A foldable display device can be arranged such that one display area of the display device is folded with respect to a folding line and divided into a first display area AA1 and a second display area AA2, or can have a number of display areas on the inner and outer sides of the display device. Pixels PXL are formed in the display area.

[0056] Referring to FIG. 3, the foldable display device can further include a first display area AA1 and a second display area AA2 disposed inside the display device, and a third display area AA3 disposed outside the display device.

[0057] Referring to FIGS. 2 and 3, the first area PH for disposing a camera within the display area AA can be disposed in one or more of the first display area AA1 and the second display area AA2 disposed inside the display device, or the third display area AA3 disposed outside the display device.

[0058] FIG. 4 is an enlarged view schematically illustrating the first area PH of the display device 10 of the present specification.

[0059] The first area PH includes a hole area H, a first pattern part PT1 surrounding the hole area H, a first dam part DM, a second pattern part PT2, and a routing wiring area RK for disposing a camera within the display area AA.

[0060] FIG. 5 is a cross-sectional view schematically illustrating an example of the cross-section taken along the line A-A' of FIG. 1.

[0061] Referring to FIG. 5, the substrate 100 of the display device according to the embodiment of the present specification can be composed of a first substrate, a second substrate, and an intermediate layer between the first substrate and the second substrate.

[0062] The first substrate and the second substrate can be formed of at least one of polyimide, polyethersulfone, polyethylene terephthalate, and polycarbonate, and the embodiments of the present specification are not limited thereto. When the substrate is made of a plastic material, the manufacturing process of the display device proceeds with a support substrate made of glass disposed under the substrate, and the support substrate can be released after the manufacturing process of the display device is completed. Further, after the support substrate is released, a back plate (or plate) for supporting the substrate can be disposed under the substrate. When the substrate is made of a plastic material, moisture can penetrate the substrate and cause moisture permeation up to the thin film transistor or the light emitting element layer, thereby degrading the performance of the display device. The display device according to the embodiments of the present specification can be composed of two substrates, namely, the first substrate and the second substrate made of a plastic material, in order to prevent the performance of the display device from degrading due to moisture permeation. Then, by forming an intermediate layer, which is an inorganic film, between the first substrate and the second substrate, it is possible to block moisture from penetrating the substrate and improve the performance reliability of the product. The intermediate layer can be made of an inorganic film. For example, the intermediate layer can be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multilayer thereof, but is not limited thereto.

[0063] The display device formed on the substrate 100 can include a plurality of regions. Although the present specification describes the display region AA and the non-display region NA, it is not limited thereto.

[0064] A buffer layer composed of a single layer or multiple layers of silicon nitride (SiNx) or silicon oxide (SiOx) can be disposed on one surface of the display area AA and the non-display area NA on the substrate 100. The buffer layer can improve the adhesion between the layer formed on the buffer layer and the substrate 100, and can perform functions such as blocking various types of defect factors such as alkaline components flowing out from the substrate 10. In addition, the buffer layer can delay the diffusion of moisture or oxygen that has penetrated into the substrate 100.

[0065] The buffer layer may be omitted based on the type and material of the substrate, the structure and type of the thin film transistor, etc.

[0066] Transistors of the display area AA and the non-display area NA can be formed on the substrate 100 and the buffer layer. The transistors in the display area AA include a switching transistor SW Tr and a driving transistor DR Tr for driving sub-pixels, and the transistors in the non-display area NA can include a first gate driving transistor GT1 and a second gate driving transistor GT2 for driving the gate driver GIP.

[0067] For the driving transistor DR Tr, a light-shielding layer 200 may be disposed on the substrate 100 or the buffer layer.

[0068] The light-shielding layer 200 blocks the light directed towards the first semiconductor layer 210 of the driving transistor DR Tr, and can prevent a phenomenon in which parasitic carriers are accumulated in the first semiconductor layer 210 and the drain current increases rapidly due to the connection with the first drain electrode 230D, as well as a change in the threshold voltage due to such a phenomenon.

[0069] The light-shielding layer 200 can be formed of a single layer or multiple layers having at least one of titanium (Ti), molybdenum (Mo), copper (Cu), aluminum (Al), silver (Ag), chromium (Cr), gold (Au), neodymium (Nd), and nickel (Ni), and the embodiments of this specification are not limited thereto.

[0070] The first insulating layer 110 can be disposed on the light-shielding layer 200.

[0071] The first insulating layer 110 can be formed of an insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx), and may also be formed of other insulating inorganic or organic materials, and the embodiments of this specification are not limited thereto.

[0072] The first semiconductor layer 210 of the driving transistor DR Tr in the display region AA and the second semiconductor layer 400 of the first gate driving transistor GT1 in the non-display region NA can be disposed on the first insulating layer 110, and the first semiconductor layer 210 can overlap with the light-shielding layer 200.

[0073] The first semiconductor layer 210 and the second semiconductor layer 400 can be made of any one of metal oxide semiconductors, such as IGZO (Indium-gallium-zinc-oxide), IZO (Indium-zinc-oxide), IGTO (Indium-gallium-tin-oxide), and IGO (Indium-gallium-oxide), and are not limited thereto.

[0074] The conductivity of the metal oxide semiconductor can be improved by a doping process of injecting impurities, and can include a channel region where a channel for electrons or holes to move is formed and source and drain regions that are regions made conductive on both sides of the channel region. Source electrodes and drain electrodes can be connected to the source region and the drain region.

[0075] The first gate insulating layer 120 can be disposed on the first semiconductor layer 210 and the second semiconductor layer 400. The first gate insulating layer 120 can be formed of an insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx), and may also be formed of other insulating inorganic or organic materials, and the embodiments of this specification are not limited thereto.

[0076] The first gate electrode 220 and the second gate electrode 410 can be arranged to overlap the first semiconductor layer 210 and the second semiconductor layer 400 on the first gate insulating layer 120. The first gate electrode 220 and the second gate electrode 410 can be formed of any one or more substances among silver (Ag), molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), neodymium (Nd), tungsten (W), and gold (Au). The embodiments of this specification are not limited thereto.

[0077] In the same process as the first gate electrode 220 and the second gate electrode 410, the first capacitor electrode Cst1 of the capacitance PXL Cst included in the sub-pixel, the first metal layer 300 overlapping the switching transistor SW Tr of the sub-pixel, and the second metal layer 500 overlapping the second gate driving transistor GT2 can be formed and arranged.

[0078] The first metal layer 300 and the second metal layer 500 can be driven by the lower gate electrodes of the switching transistor SW Tr and the second gate driving transistor GT2, respectively, or can be used as a light shielding layer that blocks light reflected by the third semiconductor layer 310 and the fourth semiconductor layer 510 of the switching transistor SW Tr and the second gate driving transistor GT2. The embodiments of this specification are not limited thereto.

[0079] The second insulating layer 130 can be arranged on the first gate electrode 220, the second gate electrode 410, the first metal layer 300, the second metal layer 500, and the first capacitor electrode Cst1.

[0080] The second insulating layer 130 can be formed of an insulating substance such as silicon nitride (SiNx) or silicon oxide (SiOx), and may also be formed of other insulating inorganic or organic substances. The embodiments of this specification are not limited thereto.

[0081] A second capacitor electrode Cst2 of the sub-pixel capacitance PXL Cst may be disposed on the second insulating layer 130. The second capacitor electrode Cst2 may be disposed overlapping the first capacitor electrode Cst1 and may be formed of the same material as the first capacitor electrode Cst1.

[0082] A third insulating layer 140 may be disposed on the second capacitor electrode Cst2.

[0083] The third insulating layer 140 may be formed of an insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx), and may also be formed of an insulating organic material or the like, and the embodiments of the present specification are not limited thereto.

[0084] On the third insulating layer 140, a third semiconductor layer 310 of the switching transistor SW Tr in the display area AA and a fourth semiconductor layer 510 of the second gate driving transistor GT2 in the non-display area NA may be disposed.

[0085] The third semiconductor layer 310 and the fourth semiconductor layer 510 may be formed of low temperature polycrystalline silicon (LTPS).

[0086] A second gate insulating layer 150 may be disposed on the third semiconductor layer 310 and the fourth semiconductor layer 510. The second gate insulating layer 150 is disposed between the third semiconductor layer 310 and the fourth semiconductor layer 510 and the third gate electrode 320 and the fourth gate electrode 520 to insulate the third semiconductor layer 310 and the fourth semiconductor layer 510 from the third gate electrode 320 and the fourth gate electrode 520.

[0087] In the LPTS semiconductor layer, a channel region and a source / drain region connected to the source / drain electrodes may be formed through doping.

[0088] The second gate insulating layer 150 may be formed of an insulating inorganic material such as silicon nitride (SiNx) or silicon oxide (SiOx), and may alternatively be formed of an insulating organic material or the like, and is not limited thereto.

[0089] The third gate electrode 320 and the fourth gate electrode 520 may be arranged to overlap the third semiconductor layer 310 and the fourth semiconductor layer 510.

[0090] The third gate electrode 320 and the fourth gate electrode 520 may be formed of a single layer or a multilayer made of any one of silver (Ag), molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), neodymium (Nd), tungsten (W), and gold (Au), or an alloy thereof, and is not limited thereto.

[0091] A fourth insulating layer 160 may be disposed on the third gate electrode 320 and the fourth gate electrode 520.

[0092] The fourth insulating layer 160 may be formed of an insulating inorganic material such as silicon nitride (SiNx) and silicon oxide (SiOx), or may be formed of one or more materials of organic insulating materials such as BCB (BenzoCycloButene), acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin, and the embodiments of the present specification are not limited thereto.

[0093] A first source electrode 230S and a first drain electrode 230D connected to the first semiconductor layer 210, a second source electrode 420S and a second drain electrode 420D connected to the second semiconductor layer 400, a third source electrode 330S and a third drain electrode 330D connected to the third semiconductor layer 310, and a fourth source electrode 530S and a fourth drain electrode 530D connected to the fourth semiconductor layer 510 may be disposed on the fourth insulating layer 160.

[0094] The first source electrode 230S, the first drain electrode 230D, the second source electrode 420S, and the second drain electrode 420D are connected to the first semiconductor layer 210 and the second semiconductor layer 400 through contact holes formed in the first gate insulating layer 120, the second insulating layer 130, the third insulating layer 140, the second gate insulating layer 150, and the fourth insulating layer 160.

[0095] The third source electrode 330S, the third drain electrode 330D, the fourth source electrode 530S, and the fourth drain electrode 530D are connected to the third semiconductor layer 310 and the fourth semiconductor layer 510 through contact holes formed in the second gate insulating layer 150 and the fourth insulating layer 160.

[0096] The first source electrode 230S, the first drain electrode 230D, the second source electrode 420S, the second drain electrode 420D, the third source electrode 330S, the third drain electrode 330D, the fourth source electrode 530S, and the fourth drain electrode 530D can be formed through the same process and can be formed of any one or more of silver (Ag), molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), neodymium (Nd), tungsten (W), and gold (Au).

[0097] The first wiring 630 can be formed and arranged in the non-display area NA in the same process as the first source electrode 230S, the first drain electrode 230D, the second source electrode 420S, the second drain electrode 420D, the third source electrode 330S, the third drain electrode 330D, the fourth source electrode 530S, and the fourth drain electrode 530D.

[0098] The first wiring 630 can be a wiring for transmitting the voltage applied to the cathode electrode 620.

[0099] The first planarization layer 170 can be disposed on the first source electrode 230S, the first drain electrode 230D, the second source electrode 420S, the second drain electrode 420D, the third source electrode 330S, the third drain electrode 330D, the fourth source electrode 530S, and the fourth drain electrode 530D.

[0100] The first planarization layer 170 is formed of an organic insulating layer such as polyacrylate and polyimide, and can reduce the step caused by the wiring and contact holes formed below.

[0101] A connection electrode 240 for connecting the first drain electrode 230D and the anode electrode 600 can be disposed on the first planarization layer 170.

[0102] The connection electrode 240 can be electrically connected to the first drain electrode 230D through a hole formed in the first planarization layer 170.

[0103] The connection electrode 240 can be made of at least one or more of titanium (Ti), molybdenum (Mo), copper (Cu), aluminum (Al), silver (Ag), chromium (Cr), gold (Au), neodymium (Nd), nickel (Ni), or an alloy thereof, and the embodiments herein are not limited thereto.

[0104] A second planarization layer 180 can be disposed on the connection electrode 240. The second planarization layer 180 can be formed of an organic insulating layer such as polyacrylate and polyimide, and the embodiments herein are not limited thereto.

[0105] The anode electrode 600 can be disposed on the second planarization layer 180. The anode electrode 600 can be electrically connected to the connection electrode 240 through a hole formed in the second planarization layer 180.

[0106] In the same process of forming the anode electrode 600, the second wiring 640 can be formed in the non-display area NA. The second wiring 640 can be arranged to overlap a part of the first gate driving transistor GT1 and the second gate driving transistor GT2, and can be connected to the first wiring 630 arranged in the non-display area NA to apply a voltage to the cathode electrode 620.

[0107] The anode electrode 600 and the second wiring 640 can be formed of at least one of silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr), lead (Pd), indium tin oxide (ITO), indium zinc oxide (IZO), or an alloy thereof, and the embodiments of the present specification are not limited thereto.

[0108] The bank 190 can be arranged on the anode electrode 600, the second wiring 640, and the second planarization layer 180.

[0109] The bank 190 can divide a plurality of sub-pixels SP, minimize the light leakage phenomenon, and prevent color mixing occurring at various viewing angles.

[0110] The bank 190 can expose the anode electrode 600 corresponding to the light emitting region and can overlap the end portion of the anode electrode 600.

[0111] The bank 190 can be made of at least one of inorganic insulating materials such as silicon nitride (SiNx) or silicon oxide (SiOx), or organic insulating materials such as BCB (BenzoCycloButene), acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin, and is not limited thereto.

[0112] A spacer 191 may be further disposed on the bank 190. By supporting the gap between the substrate 100 on which the light-emitting element layer 610 is formed and the upper substrate, the spacer 191 can minimize damage to the elements inside the display panel when a physical impact occurs externally. The spacer 191 may be formed of the same material as the bank 190 and may be formed simultaneously with the bank 190, but is not limited thereto.

[0113] The light-emitting element layer 610 may be disposed on the opening of the bank 190 that exposes the anode electrode 600. The light-emitting element layer 610 may include one or more organic light-emitting layers among a red light-emitting layer, a green light-emitting layer, a blue light-emitting layer, and a white light-emitting layer to emit light of a specific color. In addition, the light-emitting element layer 610 may further include a hole injection layer, a hole transport layer, an electron transport layer, an electron injection layer, etc. in addition to the organic light-emitting layer, but is not limited thereto.

[0114] The hole injection layer, the hole transport layer, the electron transport layer, and the electron injection layer may be respectively disposed for each sub-pixel with different thicknesses and materials, or may be commonly disposed on the front surface.

[0115] When the light-emitting element layer 610 includes a white organic light-emitting layer, the light-emitting element layer 610 can be disposed on the opening of the bank 190 and the entire substrate.

[0116] A color filter for converting the light emitted from the white organic light-emitting layer into light of different colors may be disposed on the upper part of the light-emitting element layer 610.

[0117] The cathode electrode 620 can be disposed on the light-emitting element layer 610. The cathode electrode 620 supplies electrons to the light-emitting element layer 610 and can be made of a conductive material having a low work function.

[0118] When the display device 10 is of the top emission type, the cathode electrode 620 can be disposed using a transparent conductive material through which light passes. For example, it can be formed of at least one of indium tin oxide (ITO) and indium zinc oxide (IZO), but is not limited thereto.

[0119] Also, it can be disposed using a translucent conductive material through which light passes. For example, it can be formed of at least one of alloys such as LiF / Al, CsF / Al, Mg:Ag, Ca / Ag, Ca:Ag, LiF / Mg:Ag, LiF / Ca / Ag, and LiF / Ca:Ag, but is not limited thereto.

[0120] When the display device 10 is of the bottom emission type, the cathode electrode 620 can be disposed using an opaque conductive material as a reflective electrode that reflects light. For example, the cathode electrode 620 can be formed of at least one of silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr), or alloys thereof.

[0121] In the non-display area NA of the display device 10, a termination portion including a driving circuit portion and a second dam portion where a plurality of dams are disposed is disposed.

[0122] The termination portion of the non-display area NA can be a connection portion that is electrically connected to the cathode electrode 620 and a wiring for applying a voltage to the cathode electrode 620, and can be an area where the display device 10 is sealed using a plurality of dams.

[0123] On the termination portion, the first insulating layer 110, the first gate insulating layer 120, the second insulating layer 130, and the third insulating layer 140 disposed on the substrate 100 can extend and be disposed.

[0124] The wiring can be arranged at the end portion so that the power supply voltage and the touch signal applied to the FPCB of the display device 10 are connected to the display panel through the wiring.

[0125] The first wiring 630 is arranged on the upper part of the fourth insulating layer 160, contacts the side surfaces of the fourth insulating layer 160 and the second gate insulating layer 150, and can extend and be arranged between the first dam DM1 in the non-display area NA and the third insulating layer 140.

[0126] The first dam DM1 can be formed and laminated with the same material and in the same process as the first planarization layer 170 and the bank 190.

[0127] The second dam DM2 can be formed and laminated with the same material and in the same process as the first planarization layer 170, the second planarization layer 180, the bank 190, and the spacer 191.

[0128] The first dam DAM1 and the second dam DAM2 can each have a first height and a second height, and can surround the display area AA.

[0129] The second height can be formed higher than the first height. Even if the second sealing layer 720 exceeds the first dam DM1 of the second dam portion, it can be prevented from being formed on the outer contour of the second dam portion by the second dam DM2.

[0130] The first sealing layer 710 and the third sealing layer 730 can extend beyond the second dam DM2 to the outer contour portion and be arranged.

[0131] The second wiring 640 can extend and be arranged between the first planarization layer 170 of the first dam DM1 and the bank 190 and between the second planarization layer 180 of the second dam DM2 and the bank 190.

[0132] The cathode electrode 620 can extend to the area between the first dam DM1 and the second dam DM2 and be electrically connected to the first wiring 630 and the second wiring 640.

[0133] A cathode electrode 620 in the display area AA and a cathode electrode 620 in the non-display area NA and a sealing layer 700 can be disposed on the second dam DM2.

[0134] The sealing layer 700 can protect the display device 10 from external moisture, oxygen, or foreign substances. For example, the sealing layer 700 can prevent the penetration of external oxygen and moisture to prevent the oxidation of the light-emitting substance and the electrode substance.

[0135] The sealing layer 700 can be made of a transparent material so that the light emitted by the light-emitting element layer 610 can pass through.

[0136] The sealing layer 700 can include a first sealing layer 710, a second sealing layer 720, and a third sealing layer 730 that block the penetration of moisture and oxygen, and the embodiments of the present specification are not limited thereto. The first sealing layer 710, the second sealing layer 720, and the third sealing layer 730 can have a structure in which they are sequentially laminated, and the embodiments of the present specification are not limited thereto.

[0137] The first sealing layer 710 and the third sealing layer 730 can be made of at least one or more inorganic substances such as silicon nitride (SiNx), silicon oxide (SiOx), or aluminum oxide (AlyOz), but are not limited thereto.

[0138] The second sealing layer 720 can cover foreign substances or particles (Particles) that may occur during the manufacturing process. Also, the second sealing layer 720 can planarize the surface of the first sealing layer 710.

[0139] The second sealing layer 720 can be an organic substance, for example, a polymer such as silicon oxycarbon (SiOCz) epoxy, polyimide, and polyethylene, acrylate series, etc., but is not limited thereto.

[0140] A touch buffer layer 800 may be disposed on the third sealing layer 730. The touch buffer layer 800 may be disposed on the front surfaces of the display area AA and the non-display area NA and may extend to the pad portion. The touch buffer layer 800 may be a first insulating layer, but is not limited to this term.

[0141] The touch buffer layer 800 may be made of at least one or more inorganic substances such as silicon nitride (SiNx), silicon oxide (SiOx), or aluminum oxide (AlyOz), but is not limited thereto.

[0142] A first touch electrode 810 may be disposed on the touch buffer layer 800.

[0143] Touch driving may be driven by a plurality of sensing electrodes and a plurality of driving electrodes disposed in the display area AA. The sensing electrodes include a plurality of sub-sensing electrodes Rx that extend along a first direction and are arranged at regular intervals from each other along a second direction. The plurality of sensing electrodes may be continuously formed without interruption in the first direction.

[0144] The plurality of driving electrodes include a plurality of sub-driving electrodes Tx that extend along a second direction and are arranged at regular intervals from each other along a first direction. The plurality of sub-driving electrodes Tx may be electrically connected to each other in the second direction.

[0145] When the plurality of sub-sensing electrodes Rx and the plurality of sub-driving electrodes Tx are formed in the same layer, the plurality of sub-driving electrodes Tx may be electrically connected by a bridge pattern.

[0146] The plurality of sub-sensing electrodes Rx and the plurality of sub-driving electrodes Tx may have a metal mesh structure.

[0147] Alternatively, the plurality of sub-sensing electrodes Rx may be electrically connected by a bridge pattern, and the plurality of sub-driving electrodes Tx may be continuously formed without interruption and electrically connected.

[0148] The first touch electrode 810 can electrically connect a plurality of sub-sensing electrodes Rx or a plurality of sub-driving electrodes Tx to each other.

[0149] The first touch electrode 810 can have a single-layer or multi-layer structure made of a metallic substance such as molybdenum (Mo), silver (Ag), titanium (Ti), copper (Cu), aluminum (Al), titanium / aluminum / titanium (Ti / Al / Ti), molybdenum / aluminum / molybdenum (Mo / Al / Mo), etc., but is not limited thereto.

[0150] A touch insulating layer 820 can be disposed on the first touch electrode 810. The touch insulating layer 820 can be disposed on the front surfaces of the display area AA and the non-display area NA, and can extend to and be disposed in the pad portion. The touch insulating layer 820 can be a second insulating layer, but is not limited to the term.

[0151] The touch insulating layer 820 can be made of at least one or more inorganic substances such as silicon nitride (SiNx), silicon oxide (SiOx), or aluminum oxide (AlyOz), but is not limited thereto.

[0152] A second touch electrode 830 can be disposed on the touch insulating layer 820. The second touch electrode 830 can be a plurality of sub-sensing electrodes Rx or a plurality of sub-driving electrodes Tx for touch driving.

[0153] A touch line 840 for transmitting a touch driving signal to the non-display area NA can be disposed in the same process in which the second touch electrode 830 is formed.

[0154] The touch line 840 can overlap with the first gate driving transistor GT1 or the second gate driving transistor GT2, and can extend to and be disposed in the pad portion.

[0155] The second touch electrode 830 and the touch line 840 can have a single-layer or multi-layer structure made of a metallic material such as molybdenum (Mo), silver (Ag), titanium (Ti), copper (Cu), aluminum (Al), titanium / aluminum / titanium (Ti / Al / Ti), molybdenum / aluminum / molybdenum (Mo / Al / Mo), etc., but are not limited thereto.

[0156] A third planarization layer 850 can be disposed on the second touch electrode 830 and the touch line 840.

[0157] The third planarization layer 850 can cover and planarize the second touch electrode 830, the touch line 840, and the touch insulating layer 820. Further, the third planarization layer 850 can be made of one or more substances among organic insulating substances such as BCB (BenzoCycloButene), acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin, and is not limited thereto.

[0158] An adhesive layer 900 and a cover window 910 can be disposed on the third planarization layer 850.

[0159] Referring to FIGS. 6 and 7, the first region PH illustrated in FIG. 4 will be specifically described.

[0160] The first region PH includes a hole region H, a first pattern portion PT1 surrounding the hole region H, a first dam portion DM, a second pattern portion PT2, and a routing wiring region RK in order to dispose a camera within the display region AA.

[0161] The hole region H can be located at the center of the first region PH and can be formed to physically penetrate from the substrate 100 to the third planarization layer 850. The hole region H can include a camera, a sensor, and a light source, and light can be easily transmitted above the camera or the sensor by the hole region H.

[0162] The routing wiring region RK is arranged with routing wirings for electrically connecting sub-pixels in the display region AA to each other between the first regions PH.

[0163] The first routing wiring 20 can be formed in the same process as the process of forming the first gate insulating layer 120, the first gate electrode 220, the second gate electrode 410, the first metal layer 300, the second metal layer 500, and the first capacitor electrode Cst1, which are arranged to extend into the first region PH. The embodiments of the present specification are not limited thereto.

[0164] The second routing wiring 30 can be formed in the same process as the process of forming the second capacitor electrode Cst2 on the second insulating layer 130, which is arranged to extend in the first region PH. The embodiments of the present specification are not limited thereto.

[0165] The third routing wiring 40 can be formed in the same process as the process of forming the first source electrode 230S, the first drain electrode 230D, the second source electrode 420S, the second drain electrode 420D, the third source electrode 330S, the third drain electrode 330D, the fourth source electrode 530S, and the fourth drain electrode 530D on the fourth insulating layer 160, which is arranged to extend into the first region PH. The embodiments of the present specification are not limited thereto.

[0166] The fourth routing wiring 50 can be formed in the same process as the process of forming the connection electrode 240 on the first planarization layer 170, which is arranged to extend into the first region PH. The embodiments of the present specification are not limited thereto.

[0167] In the routing wiring region RK, the first touch electrode 810 and the second touch electrode 830 are formed of wirings for routing, and can electrically connect the touch drive signals in the display region AA.

[0168] The gate lines of the sub-pixels in the display area AA can be connected to the first routing wiring 20 and the second routing wiring 30 and can also be electrically connected in the first area PH. The data lines of the sub-pixels can be connected to the third routing wiring 40 and the fourth routing wiring 50 and can also be electrically connected in the first area PH.

[0169] The first pattern part PT1 and the second pattern part PT2 are arranged to surround the hole area H. The first pattern part PT1 and the second pattern part PT2 include a plurality of patterns PT, and each of the plurality of patterns PT can be composed of a lower pattern PTa and an upper pattern PTb. The lower pattern PTa can be formed simultaneously with the same material as the fourth insulating layer 160. The upper pattern PTb can be formed simultaneously with the same material as the second planarization layer 180. However, the material of the insulating layer and the number of layers of the plurality of patterns PT are not limited to this.

[0170] Also, the plurality of patterns PT can be arranged to be spaced apart from each other by a certain distance.

[0171] The plurality of patterns PT can prevent moisture from penetrating into the display area AA through the light-emitting element layer 610 that is vulnerable to moisture penetration.

[0172] The width of the lower surface of the upper pattern PTb disposed on the lower pattern PTa is wider than the upper surface of the lower pattern PTa.

[0173] The light-emitting element layer 610 disposed on the upper surface and the side surface of the upper pattern PTb can be disconnected by the plurality of patterns PT because the light-emitting element layer 610 is not formed on the side surface portion of the lower pattern PTa due to the separation space between the lower surface of the upper pattern PTb and the side surface of the lower pattern PTa.

[0174] In addition, the first sealing layer 710 disposed in the routing wiring region RK, the first pattern portion PT1, the first dam portion DM, and the second pattern portion PT2 of the first region PH can be formed on the upper surface and the side surface of the upper pattern PTb and a part of the lower surface of the upper pattern PTb, and since it is not formed on a part of the side surface of the lower pattern PTb, an empty space (ES) can be formed.

[0175] A hole dam HDM can be disposed in the first dam portion DM between the first pattern portion PT1 and the second pattern portion PT2.

[0176] The hole dam HDM can prevent the second sealing layer 720 from overflowing into the hole region H. One or more hole dams HDM can be arranged continuously and may be arranged in the first pattern portion PT1 and the second pattern portion PT2.

[0177] The hole dam HDM can be formed by laminating patterns formed of the same material and in the same process when forming the fourth insulating layer 160, the second planarization layer 180, and the bank 190, and the embodiments of the present specification are not limited thereto.

[0178] Due to the hole dam HDM, the second sealing layer 720 can be disposed only on a part of the second pattern portion PT2 and the hole dam HDM.

[0179] The third sealing layer 730 can be disposed in the routing wiring region RK, the first pattern portion PT1, the dam portion DM, and the second pattern portion PT2 of the first region PH, and can be in contact with or touch the first sealing layer 710 on the upper surface and the side surface of the plurality of patterns PT of the first pattern portion PT1.

[0180] The touch buffer layer 800 can extend and be disposed on the third sealing layer 730 in the routing wiring region RK, the first pattern portion PT1, the dam portion DM, and the second pattern portion PT2 of the first region PH.

[0181] The touch insulation layer 820 extends and is disposed in the routing wiring region RK of the first region PH, the first pattern portion PT1, the dam portion DM, and the second pattern portion PT2, and can be disposed in contact with the upper surface of the touch buffer layer 800 on the touch buffer layer 800 on the second pattern portion PT2 and the hole dam HDM.

[0182] A protective layer 60 is disposed between the touch buffer layer 800 and the touch insulation layer 820 in the region between the plurality of patterns PT of the first pattern portion PT1, so that the touch buffer layer 800 and the touch insulation layer 820 can be separated.

[0183] The end of the protective layer 60 can partially overlap with the plurality of patterns PT between the plurality of patterns PT of the first pattern portion PT1.

[0184] The protective layer 60 can be made of at least one or more organic insulating substances such as acrylic resin, epoxy resin, phenolic resin, polyamide resin, or polyimide resin, but is not limited thereto.

[0185] The moisture introduced through the hole region H penetrates into the voids (ES) formed in the patterns PT of the first pattern portion PT1 through the third planarization layer 850 formed of an organic substance, moves to the display region AA, and the quality of the display panel may be deteriorated.

[0186] The protective layer 60 is disposed between the plurality of patterns PT, and the touch buffer layer 800 and the touch insulation film 820 on the upper surfaces of the plurality of patterns PT may be in contact.

[0187] Even if the protective layer 60 is formed of an organic substance, it is not connected by the touch buffer layer 800 and the touch insulation film 820 on the upper surfaces of the plurality of patterns PT, so that the movement of moisture can be prevented by the protective layer 60.

[0188] In addition, by forming the protective layer 60, the distances between the voids (ES) and seams (Seam) and the third planarization layer 850 become longer, and moisture in the third planarization layer 850 cannot be transmitted.

[0189] The first height H1 from the lower surface of the lower pattern PTa to the upper surface of the upper pattern PTb of the plurality of patterns PT in the first pattern portion PT1 and the second height H2 from the lower surface of the lower pattern PTa to the upper surface of the protective layer 60 may be different from each other, and the second height H2 may be higher than the first height H1.

[0190] The side surfaces of insulating layers such as the pattern PT disposed at the end portion Ed of the first pattern portion PT1 adjacent to the hole region H, the first sealing layer 710, the third sealing layer 730, the touch buffer layer 800, and the touch insulating layer 820 may be exposed in the hole region H.

[0191] A support plate 70 of the display device 10 may be disposed below the substrate 100, holes may be formed in the support plate 70 corresponding to the hole region H in the hole region H, and an optical unit 101 including a camera, a sensor, a light source, etc. may be disposed in the holes.

[0192] The display device according to the embodiment of the present specification can be described as follows.

[0193] The display device according to the embodiment of the present specification includes a substrate including a display region and a non-display region, a first region disposed in the display region, a hole region in the first region, a first pattern portion, a first dam portion, and a second pattern portion, a sealing layer on at least a part of the first region, a first insulating layer, a second insulating layer, and a plurality of first patterns disposed in the first pattern portion. The first insulating layer and the second insulating layer are separated from each other between the plurality of first patterns, and the first insulating layer and the second insulating layer are in contact with each other at at least a part of the upper surfaces of the plurality of first patterns.

[0194] According to some embodiments of this specification, it includes a plurality of second patterns disposed in the second pattern portion, the encapsulation layer is on the plurality of second patterns, and at the second pattern portion, the first insulating layer and the second insulating layer may be in contact with each other.

[0195] According to some embodiments of this specification, a protective layer may be disposed between the first insulating layer and the second insulating layer between the plurality of first patterns.

[0196] According to some embodiments of this specification, the first height from the lower surface to the upper surface of the plurality of first patterns and the second height from the lower surface of the first pattern to the upper surface of the protective layer may be different from each other.

[0197] According to some embodiments of this specification, the second height may be higher than the first height.

[0198] According to some embodiments of this specification, the end of the protective layer may partially overlap with the plurality of first patterns.

[0199] According to some embodiments of this specification, it may include a plurality of pixels disposed in the display area and a plurality of transistors disposed in the plurality of pixels.

[0200] According to some embodiments of this specification, it may include an anode electrode, a light-emitting layer, and a cathode electrode electrically connected to the plurality of transistors.

[0201] According to some embodiments of this specification, the encapsulation layer may be disposed on the cathode electrode.

[0202] According to some embodiments of this specification, it may include a first touch electrode disposed on the first insulating layer, a second insulating layer, and a second touch electrode.

[0203] According to some embodiments of this specification, the encapsulation layer may include a first encapsulation layer, a second encapsulation layer, and a third encapsulation layer.

[0204] According to some embodiments of the present specification, the side surfaces of the first encapsulation layer, the third encapsulation layer, the first insulating layer, and the second insulating layer may be exposed in the first region.

[0205] According to some embodiments of the present specification, it may further include a camera, a sensor, and a light source disposed in the first region.

[0206] According to some embodiments of the present specification, it may further include a driving circuit portion and a second dam portion disposed in the non-display region.

[0207] The display device according to the embodiment of the present specification includes a substrate including a display region and a non-display region, a first region disposed in the display region, a plurality of pixels, and a plurality of transistors disposed on the plurality of pixels, a planarization layer disposed on the plurality of transistors, an anode electrode, a light-emitting layer, and a cathode electrode disposed on the planarization layer, an encapsulation layer disposed on the cathode electrode, a first insulating layer disposed on the encapsulation layer, a first touch electrode, a second insulating layer, and a second touch electrode, and a first pattern portion, a first dam portion, and a second pattern portion in the first region. The first insulating layer and the second insulating layer extend and are disposed on the first pattern portion, the first dam portion, and the second pattern portion.

[0208] According to some embodiments of the present specification, it may include a plurality of first patterns disposed in the first pattern portion.

[0209] According to some embodiments of the present specification, the first insulating layer and the second insulating layer may be in contact with each other at a part of the upper surface of the plurality of first patterns.

[0210] According to some embodiments of the present specification, the first insulating layer and the second insulating layer may be separated between the plurality of first patterns.

[0211] According to some embodiments of the present specification, a protective layer may be disposed between the first insulating layer and the second insulating layer between the plurality of first patterns.

[0212] According to some embodiments of this specification, the first height from the lower surface to the upper surface of the plurality of first patterns and the second height from the lower surface of the first pattern to the upper surface of the protective layer may be different from each other.

[0213] According to some embodiments of this specification, the second height may be higher than the first height.

[0214] According to some embodiments of this specification, the end of the protective layer may partially overlap with the plurality of first patterns.

[0215] According to some embodiments of this specification, it may include a plurality of second patterns disposed in the second pattern portion.

[0216] According to some embodiments of this specification, a sealing layer, a first insulating layer, and a second insulating layer may extend and be disposed on the plurality of second patterns.

[0217] According to some embodiments of this specification, the first insulating layer and the second insulating layer may be in contact on the second pattern portion.

[0218] According to some embodiments of this specification, the sealing layer may include a first sealing layer, a second sealing layer, and a third sealing layer.

[0219] According to some embodiments of this specification, the side surfaces of the first sealing layer, the third sealing layer, the first insulating layer, and the second insulating layer may be exposed in the first region.

[0220] According to some embodiments of this specification, the hole region disposed in the first region may further include a camera, a sensor, and a light source.

[0221] According to some embodiments of this specification, it may further include a driving circuit portion and a second dam portion disposed in the non-display region.

[0222] The embodiments of this specification have been described in more detail with reference to the attached drawings above. However, this specification is not necessarily limited to such embodiments and can be variously modified and implemented without departing from the technical idea of this specification. Therefore, the embodiments disclosed in this specification are for the purpose of explaining rather than limiting the technical idea of this specification, and the scope of the technical idea of this specification is not limited by such embodiments. Therefore, it should be understood that the embodiments described above are exemplary in all respects and not restrictive. The protection scope of this specification should be interpreted by the scope of the claims, and all technical ideas within the equivalent scope should be construed as being included in the scope of rights of this specification.

Explanation of Reference Numerals

[0223] PH: First Region RK: Routing Wiring Region PT1: First Pattern Portion PT2: Second Pattern Portion H: Hole Region 101: Optical Unit 70: Support Plate HDM: Hole Dam 60: Protective Layer 710: First Sealing Layer 720: Second Sealing Layer 730: Third Sealing Layer 800: Touch Buffer Layer 820: Touch Insulating Layer

Claims

1. A substrate including a display area and a non-display area; A first area disposed in the display area; A hole area, a first pattern portion, a first dam portion, and a second pattern portion in the first area; A sealing layer, a first insulating layer, and a second insulating layer on at least a part of the first area; and A plurality of first patterns disposed in the first pattern portion including the first insulating layer and the second insulating layer are separated from each other between the plurality of first patterns, A display device, wherein the first insulating layer and the second insulating layer are in contact with each other at least at a part of the upper surface of the plurality of first patterns.

2. Further including a plurality of second patterns disposed in the second pattern portion, the sealing layer is on the plurality of second patterns, The display device according to claim 1, wherein the first insulating layer and the second insulating layer are in contact with each other in the second pattern portion.

3. The display device according to claim 1, wherein a protective layer is disposed between the first insulating layer and the second insulating layer between the plurality of first patterns.

4. The display device according to claim 3, wherein a first height from the lower surface to the upper surface of the plurality of first patterns is different from a second height from the lower surface of the plurality of first patterns to the upper surface of the protective layer.

5. The display device according to claim 4, wherein the second height is higher than the first height.

6. The display device according to claim 3, wherein the end of the protective layer partially overlaps with the plurality of first patterns.

7. A plurality of pixels disposed in the display area; and A plurality of transistors disposed in the plurality of pixels The display device according to claim 1, further including.

8. The display device according to claim 7, further including an anode electrode, a light-emitting layer, and a cathode electrode electrically connected to the plurality of transistors.

9. The display device according to claim 8, wherein the sealing layer is disposed on the cathode electrode.

10. The display device according to claim 9, further including a first touch electrode and a second touch electrode disposed on the first insulating layer.

11. The display device according to claim 1, wherein the sealing layer includes a first sealing layer, a second sealing layer, and a third sealing layer.

12. The display device according to claim 11, wherein the sides of the first sealing layer, the third sealing layer, the first insulating layer, and the second insulating layer are exposed in the first area.

13. The display device according to claim 1, further including a camera, a sensor, and a light source disposed in the first area.

14. The display device according to claim 1, further comprising a drive circuit portion and a second dam portion disposed in the non-display area.

15. A substrate including a display area and a non-display area; A first area and a plurality of pixels disposed in the display area; A plurality of transistors disposed on the plurality of pixels; A planarization layer disposed on the plurality of transistors; An anode electrode, a light-emitting layer, and a cathode electrode disposed on the planarization layer; A sealing layer disposed on the cathode electrode; A first insulating layer, a first touch electrode, a second insulating layer, and a second touch electrode disposed on the sealing layer; and A first pattern portion, a first dam portion, and a second pattern portion in the first area comprising The display device, wherein the first insulating layer and the second insulating layer are disposed to extend to the first pattern portion, the first dam portion, and the second pattern portion.

16. The display device according to claim 15, further comprising a plurality of first patterns disposed in the first pattern portion.

17. The display device according to claim 16, wherein at least a part of the upper surfaces of the plurality of first patterns is in contact with each other between the first insulating layer and the second insulating layer.

18. The display device according to claim 16, wherein the first insulating layer and the second insulating layer are separated from each other between the plurality of first patterns.

19. The display device according to claim 17, wherein a protective layer is disposed between the first insulating layer and the second insulating layer between the plurality of first patterns.

20. The display device according to claim 19, wherein a first height from the lower surface to the upper surface of the plurality of first patterns is different from a second height from the lower surface of the plurality of first patterns to the upper surface of the protective layer.

21. The display device according to claim 20, wherein the second height is higher than the first height.

22. The display device according to claim 19, wherein the end of the protective layer partially overlaps the plurality of first patterns.

23. The display device according to claim 15, further comprising a plurality of second patterns disposed in the second pattern portion.

24. The display device according to claim 23, wherein the sealing layer, the first insulating layer, and the second insulating layer are disposed to extend on the plurality of second patterns.

25. The display device according to claim 24, wherein the first insulating layer and the second insulating layer are in contact with each other on the second pattern portion.

26. The display device according to claim 15, wherein the sealing layer includes a first sealing layer, a second sealing layer, and a third sealing layer.

27. The display device according to claim 26, wherein in the first region, side surfaces of the first sealing layer, the third sealing layer, the first insulating layer, and the second insulating layer are exposed.

28. The display device according to claim 15, further including a hole region in the first region, and the hole region further includes a camera, a sensor, and a light source.

29. The display device according to claim 15, further including a driving circuit portion and a second dam portion disposed in the non-display region.

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