Display device
By employing a protective pattern and inorganic films, the micro-LED display device addresses the issue of foreign substance intrusion and layer defects, ensuring reliable operation and structural integrity.
Patent Information
- Application Number
- JP2024228094
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2023-12-27
- Filing Date
- 2024-12-25
- Publication Date
- 2025-07-09
- Estimated Expiration
- 2044-12-25
AI Technical Summary
The insulating and optical layers in micro-LED display devices are prone to defects due to the intrusion of foreign substances like moisture and hydrogen, leading to driving failures and corrosion of metal wirings, and there are issues with the organic layers flowing out of the non-display area during the manufacturing process.
The implementation of a first and second protection pattern, a first and second inorganic film, and an outer optical layer to prevent the entry of foreign substances and maintain consistent thickness across the display and non-display areas, using inorganic materials to enhance protection and prevent defects.
This configuration effectively prevents the entry of moisture and hydrogen, reduces corrosion of metal wirings, and maintains the integrity of the display panel by ensuring consistent thickness and preventing organic layers from flowing out, thus enhancing the reliability and longevity of the micro-LED display.
Smart Images

Figure 2025104318000001_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a display device using an inorganic light-emitting diode as a light source.
Background Art
[0002] Electroluminescence display devices include an organic light-emitting display device in which an organic light-emitting diode (OLED) is arranged, and an inorganic light-emitting display device (hereinafter referred to as an "LED display device") in which an inorganic light-emitting diode (Light Emitting Diode: hereinafter referred to as "LED") is arranged.
[0003] Since an electroluminescence display device displays an image using a self-luminous element, it does not require another light source, for example, a backlight unit, and thus can be realized in a thin and various forms.
[0004] In an organic light-emitting display device, an oxidation phenomenon may occur between the organic light-emitting layer and the electrode due to the intrusion of moisture and oxygen, and thus a design for preventing the intrusion of oxygen and moisture is required.
[0005] Recently, as an example of an inorganic light-emitting display device, a micro-LED display device in which micro-LEDs are arranged in pixels has attracted attention as a next-generation display device. The micro-LED may be an inorganic LED having a size of 100 μm or less. The micro-LEDs may be fabricated in a separate semiconductor process and transferred to pixel positions on a display panel substrate of the display device and arranged in sub-pixels for each color.
Summary of the Invention
Problems to be Solved by the Invention
[0006] The insulating layer and the optical layer are made of organic materials, and it is difficult to prevent foreign substances such as moisture and hydrogen existing outside the display panel from entering the display panel, which may cause driving failures such as pixel driving circuits and metal wirings. In addition, when arranging the insulating layer or the optical layer on the display panel, there may be a defect that the insulating layer and the optical layer arranged in the non-display area flow down to the outside of the display panel.
[0007] The present invention arranges a first protection pattern, a second protection pattern, a first inorganic film, and a second inorganic film to prevent or delay the entry of foreign substances such as moisture and hydrogen entering from the outside, and prevent defects such as corrosion and damage of metal wirings inside the display panel. In addition, by arranging the outer optical layer and the outer bank pattern, the thickness of the second optical layer and the second inorganic film arranged in the non-display area can be the same as or approximate to that in the display area, and defects such as the organic layer such as the second optical layer flowing down outside the non-display area of the display panel due to process problems can be prevented.
[0008] The problems to be solved by the present invention are not limited to the problems mentioned above, and other problems not mentioned here will be clearly understood by those skilled in the art from the following description.
Means for Solving the Problems
[0009] The above problems can be achieved by a display device including a substrate including a display area, a non-display area, and a bending area, an adhesive layer disposed on the substrate, a pixel driving circuit disposed on the adhesive layer in the display area, a buffer layer disposed on the adhesive layer to cover the pixel driving circuit, a second protection pattern disposed on the non-display area so as to surround the display area, a first inorganic film disposed on the pixel driving circuit, and a second inorganic film disposed on the display area, the second protection pattern, and the non-display area, wherein the first inorganic film and the second inorganic film overlap in a region overlapping the second protection pattern.
[0010] According to the present invention, by arranging the first protection pattern, the second protection pattern, the first inorganic film, and the second inorganic film, it is possible to prevent or delay the entry of foreign substances such as moisture and hydrogen invading from the outside, and prevent defects such as corrosion or damage of metal wirings inside the display panel. Further, by arranging the outer optical layer and the outer bank pattern, the thickness of the second optical layer and the second inorganic film arranged in the non-display area can be the same as or approximate to that in the display area, and it is possible to prevent defects such as the organic layer such as the second optical layer flowing out of the non-display area of the display panel due to process problems.
[0011] The various and beneficial advantages and effects of the present invention are not limited to the above-described content, and other effects not mentioned will be clearly understood by those skilled in the art from the following description.
Brief Description of the Drawings
[0012]
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Mode for Carrying Out the Invention
[0013] The advantages, features, and the method for achieving them of the present invention will become clear by referring to the embodiments described in detail below together with the accompanying drawings. The present invention is not limited to the embodiments disclosed below, but is embodied in various different forms, and the embodiments are merely provided to make the disclosure of the present invention complete and to fully inform those having ordinary knowledge in the technical field to which the present invention pertains of the scope of the invention, and the present invention is only defined by the scope of the claims.
[0014] Since the shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining the embodiments of the present invention are exemplary, the present invention is not limited to the illustrated matters. Throughout the specification, the same reference numerals indicate the same components. Also, when it is determined that a detailed description of related known technologies will obscure the gist of the present invention in explaining the present invention, the detailed description thereof will be omitted.
[0015] When terms such as "comprise", "include", "have", and "consist of" mentioned in this specification are used, other parts can be added as long as "only" is not used. When a component is expressed in the singular, it can be interpreted as plural unless there are special explicit descriptions.
[0016] When interpreting a component, even without separate explicit descriptions, it should be interpreted as including an error range.
[0017] When the positional relationship and the mutual connection relationship between two components are described, such as "on", "above", "below", "sideways of", "connect or couple", "crossing or intersecting", etc., one or more other components can be interposed between these components unless terms such as "immediately" or "directly" are mentioned.
[0018] When the temporal sequence relationship is described, such as "after", "subsequent to", "next to", "before", etc., it may not be continuous on the time axis unless "immediately" or "directly" is used.
[0019] The first, the second, etc. can be used to distinguish components, but the function and structure are not limited by this ordinal number or the name of the component.
[0020] The following embodiments can be partially or wholly combined or combined with each other, and various interlocks and drives are technically possible. Each embodiment can be implemented independently of each other or can be implemented together with an associated relationship.
[0021] Hereinafter, various embodiments of the present invention will be described in detail with reference to the accompanying drawings.
[0022] A display device according to an embodiment of the present invention includes a display panel on which a display area or screen for displaying an image is disposed, and a pixel driving circuit for driving pixels of the display panel. The display area includes a pixel area where pixels are disposed. The pixel area includes a plurality of light emitting areas. A light emitting element is disposed in each of the light emitting areas. The pixel driving circuit may be built in the display panel.
[0023] FIG. 1 is a diagram showing a display device according to an embodiment of the present specification. FIG. 2 is a diagram showing an enlarged view of area A in FIG. 1. FIG. 3 is a diagram showing a partial area of a pixel.
[0024] Referring to FIGS. 1 and 2, a display device 100 according to an embodiment of the present invention includes a display panel on which an input image is visually reproduced. The display panel may include a display area AA where an image is displayed and a non-display area NA where an image is not displayed. Various wirings and driving circuits can be mounted in the non-display area NA, and a pad portion PAD to which an integrated circuit and a printed circuit are connected may be disposed. Here, the display panel may be a rectangular panel having a width in the X-axis direction, a length in the Y-axis direction, and a thickness in the Z-axis direction. At this time, the width and length of the display panel can be set to various design values depending on the application field of the display device. The X-axis direction can mean a width direction, a row direction, or a horizontal direction, the Y-axis direction can mean a longitudinal direction, a column direction, or a vertical direction, and the Z-axis direction can mean an up-down direction or a thickness direction. Further, the X-axis direction, the Y-axis direction, and the Z-axis direction may be perpendicular to each other, but may also mean different directions that are not perpendicular to each other. Accordingly, each of the X-axis direction, the Y-axis direction, and the Z-axis direction may be described as any one of a first direction, a second direction, and a third direction. And, a plane extending in the X-axis direction and the Y-axis direction can mean a horizontal plane.
[0025] The plurality of light emitting elements 10 disposed in the display area AA to form pixels PXL may be micro-sized inorganic light emitting elements. The inorganic light emitting element can be attached to the display panel by a transfer process after being grown on a silicon wafer.
[0026] The transfer process of the light-emitting element 10 may be performed for each pre-divided region. Although it was exemplified in FIG. 1 that the display region AA was divided into 12 transfer regions ST, the size and the number of divisions of the transfer region are not limited to this. The transfer process may be performed sequentially or simultaneously for the first transfer region ST to the twelfth transfer region ST. In each transfer region ST, the blue light-emitting element 10, the green light-emitting element 10, and the red light-emitting element 10 may be sequentially transferred.
[0027] A data driving circuit or a gate driving circuit may be arranged in the non-display region NA, and a wiring for supplying a control signal for controlling such a driving circuit may be arranged. Here, the control signal includes various timing signals including a clock signal, an input data enable signal, and a synchronization signal, and can be received via the pad portion PAD.
[0028] The pixel PXL can be driven by a pixel driving circuit. The pixel driving circuit can receive a driving voltage, a video signal (digital signal), a synchronization signal synchronized with the video signal, etc., and output an anode voltage and a cathode voltage of the light-emitting element 10 to drive a plurality of pixels. The driving voltage may be a high potential voltage (EVDD). The cathode voltage may be a low potential voltage (EVSS) commonly applied to the pixels. The anode voltage may be a voltage corresponding to the pixel data value of the video signal. The pixel driving circuit may be arranged in the non-display region NA or may be arranged below the display region AA.
[0029] Each pixel PXL can include a plurality of sub-pixels having different colors from each other. For example, the plurality of pixels can include a red sub-pixel in which the light-emitting element 10 that emits light of a red wavelength is arranged, a green sub-pixel in which the light-emitting element 10 that emits light of a green wavelength is arranged, and a blue sub-pixel in which the light-emitting element 10 that emits light of a blue wavelength is arranged. The plurality of pixels can further include white pixels.
[0030] Referring to FIGS. 2 to 3, a plurality of pixels PXL may be continuously arranged in a first direction (X-axis direction) and a second direction (Y-axis direction). A plurality of sub-pixels of the same color may be arranged within the pixels of the display area AA. For example, each of the plurality of pixels includes a first red sub-pixel in which a first-1 light-emitting element 11a that emits light of a red wavelength is arranged, a second red sub-pixel in which a first-2 light-emitting element 11b that emits light of a red wavelength is arranged, a first green sub-pixel in which a second-1 light-emitting element 12a that emits light of a green wavelength is arranged, a second green sub-pixel in which a second-2 light-emitting element 12b that emits light of a green wavelength is arranged, a first blue sub-pixel in which a third-1 light-emitting element 13a that emits light of a blue wavelength is arranged, and a second blue sub-pixel in which a third-2 light-emitting element 13b that emits light of a blue wavelength is arranged. The first-1 light-emitting element 11a, the second-1 light-emitting element 12a, and the third-1 light-emitting element 13a may be regarded as main light-emitting elements. The first-2 light-emitting element 11b, the second-2 light-emitting element 12b, and the third-2 light-emitting element 13b may be regarded as sub-light-emitting elements.
[0031] One sub-pixel includes at least one or more light-emitting elements. When one light-emitting element fails, the luminance of other light-emitting elements can be increased to adjust the luminance of the sub-pixel. However, it is not necessarily limited to this, and one sub-pixel may include only one light-emitting element.
[0032] A plurality of first electrodes 161 are respectively arranged below the light-emitting elements 10 and can be selectively connected to a plurality of signal wirings TL1 to TL6 by a connecting portion 161a. A high-potential voltage can be applied to the pixel driving circuit via the signal wirings TL1 to TL6. The signal wirings TL1 to TL6 and the first electrodes 161 may be formed in an electrode pattern integrated in an electrode pattern process.
[0033] As an example, the first signal wiring TL1 may be connected to the anode electrode of the first red sub-pixel, and the second signal wiring TL2 may be connected to the anode electrode of the second red sub-pixel. The third signal wiring TL3 may be connected to the anode electrode of the first green sub-pixel, and the fourth signal wiring TL4 may be connected to the anode electrode of the second green sub-pixel. The fifth signal wiring TL5 may be connected to the anode electrode of the first blue sub-pixel, and the sixth signal wiring TL6 may be connected to the anode electrode of the second blue sub-pixel. When one sub-pixel includes only one light-emitting element, the number of signal wirings TL can be reduced by half.
[0034] The second electrode 170 may be a cathode electrode that is arranged for each row and applies a cathode voltage to the light-emitting elements 10 arranged continuously in the first direction (X-axis direction). The plurality of second electrodes 170 can be arranged to be spaced apart from each other in the second direction (Y-axis direction). The plurality of second electrodes 170 can be connected to the cathode voltage via the contact electrodes 163. The plurality of second electrodes 170 can be electrically connected to the contact electrodes 163 respectively. However, it is not necessarily limited to this, and the second electrode 170 may be configured as a single electrode layer without being divided into a plurality of electrodes and function as a common electrode.
[0035] FIG. 4 is a cross-sectional view taken along line I-I' in FIG. 3. FIG. 5 is a cross-sectional view taken along line II-II' in FIG. 3. FIG. 6 is a cross-sectional view taken along line III-III' in FIG. 3. FIG. 7 is a cross-sectional view showing an example in which two light-emitting elements are connected to a pixel driving circuit.
[0036] Referring to FIGS. 3 to 5, the display device according to the embodiment includes a plurality of first electrodes 161 and contact electrodes 163 arranged on the substrate 110, a plurality of light-emitting elements 10 arranged on the plurality of first electrodes 161, a first optical layer 141 arranged between the plurality of light-emitting elements 10, and a second electrode 170 arranged on the plurality of light-emitting elements 10.
[0037] The substrate 110 may be made of a plastic having flexibility. For example, the substrate 110 may be a single-layer or multi-layer substrate made of a material selected from polyimide, polyethylene terephthalate, polyethylene naphthalate, polycarbonate, polyethersulfone, polyarylate, polysulfone, cyclic-olefin copolymer, but is not limited thereto. For example, the substrate 110 may be a ceramic substrate or a glass substrate.
[0038] On the substrate 110, the pixel driving circuit 20 may be arranged in the display area AA. The pixel driving circuit 20 may include a plurality of thin film transistors using amorphous silicon semiconductors, polycrystalline silicon semiconductors, or oxide semiconductors.
[0039] The pixel driving circuit 20 may include at least one driving thin film transistor, at least one switching thin film transistor, and at least one storage capacitor. When the pixel driving circuit 20 includes a plurality of thin film transistors, it may be formed on the substrate 110 by a TFT (Thin Film Transistor) manufacturing process. In an embodiment, the pixel driving circuit 20 may be a concept collectively referring to a plurality of thin film transistors electrically connected to the light emitting element 10.
[0040] The pixel driving circuit 20 may be a driving driver manufactured using a MOSFET (Metal-oxide-silicon field effect transistor) manufacturing process on a single crystal semiconductor substrate 110. The driving driver includes a plurality of pixel driving circuits and can drive a plurality of sub-pixels. When the pixel driving circuit 20 is realized as a driving driver, after the adhesive layer is arranged on the substrate 110, the driving driver can be mounted on the adhesive layer by a transfer process.
[0041] A buffer layer 121 covering the pixel driving circuit 20 may be disposed on the substrate 110. The buffer layer 121 may be made of an organic insulating material, for example, photosensitive photo acryl or photosensitive polyimide, but is not limited thereto.
[0042] The buffer layer 121 can be formed by laminating an inorganic insulating material, for example, silicon nitride (SiNx) or silicon oxide (SiO2) in multiple layers, or by laminating an organic insulating material and an inorganic insulating material in multiple layers.
[0043] An insulating layer 122 may be disposed on the buffer layer 121. The insulating layer 122 may be made of an organic insulating material, for example, photosensitive photo acryl or photosensitive polyimide, but is not limited thereto. Connection wirings may be disposed on the buffer layer 121. The connection wirings can include a plurality of connection wirings such as a first connection wiring RT1 and a second connection wiring RT2. The connection wirings can be connected to corresponding signal wirings TL. The signal wirings can include, but are not limited to, a first signal wiring TL1 to a sixth signal wiring TL6. The connection wirings can include a plurality of wiring patterns disposed in different layers with one or more insulating layers therebetween. The wiring patterns disposed in different layers can be electrically connected through contact holes penetrating the insulating layers.
[0044] A plurality of bank patterns 130 may be disposed on the insulating layer 122. At least one light emitting element 10 may be disposed on each of the bank patterns 130. For example, the first light emitting element 11 may be disposed on the first bank pattern 130a, the second light emitting element 12 may be disposed on the second bank pattern 130b, and the third light emitting element 13 may be disposed on the third bank pattern 130c.
[0045] The bank pattern 130 may be made of an organic insulating material, for example, photosensitive photo acryl or photosensitive polyimide, but is not limited thereto. The bank pattern 130 can guide the position where the light-emitting element 10 adheres in the transfer process of the light-emitting element 10. The bank pattern 130 may be omitted.
[0046] A solder pattern 162 may be disposed on the first electrode 161. The solder pattern 162 may be made of indium (In), tin (Sn), or an alloy thereof, but is not limited thereto.
[0047] A plurality of light-emitting elements 10 can be respectively mounted on the solder pattern 162. One pixel can include three-color light-emitting elements 10. The first light-emitting element 11 may be a red light-emitting element, the second light-emitting element 12 may be a green light-emitting element, and the third light-emitting element 13 may be a blue light-emitting element. Two light-emitting elements can be mounted on each sub-pixel.
[0048] The first optical layer 141 can cover the plurality of light-emitting elements 10 and the bank pattern 130. Accordingly, the first optical layer 141 can cover between the plurality of light-emitting elements 10 and between the plurality of bank patterns 130. The first optical layer 141 extends in the first direction X and is spaced apart in the second direction Y, and can separate the pixels arranged spaced apart in the second direction. Thereby, the first optical layer 141 can be separated between pixel rows. Here, the row can mean the first direction. And one pixel row composed of a plurality of pixels arranged along the first direction may be called a pixel group. Thereby, the display panel can include a plurality of pixel groups arranged spaced apart from each other in the second direction. For example, the first optical layer 141 arranged along the first direction is arranged around the pixels, and the plurality of first optical layers 141 arranged corresponding to the plurality of pixel groups are arranged spaced apart from each other in the second direction. Therefore, one first optical layer 141 arranged around the pixels forming one row is separable from another first optical layer 141 arranged around the pixels forming another row.
[0049] The first optical layer 141 can include an organic insulating material in which fine metal particles such as titanium dioxide particles are dispersed. The light emitted from the plurality of light-emitting elements 10 can be scattered by the fine metal particles dispersed in the first optical layer 141 and emitted to the outside.
[0050] The second electrode 170 may be disposed on the plurality of light-emitting elements 10. The second electrode 170 can be commonly connected to the plurality of pixels PXL. The second electrode 170 may be a thin electrode through which light can pass. The second electrode 170 may be a transparent electrode material, for example, indium tin oxide (ITO), but is not necessarily limited thereto.
[0051] The second electrode 170 extends in the first direction (X-axis direction) and can be separated in the second direction (Y-axis direction). For example, one second electrode 170 is formed to extend in the first direction, and the plurality of second electrodes 170 extending in the first direction may be arranged to be separated from each other along the second direction. At this time, the second electrode 170 may be arranged corresponding to each of the pixels arranged to be separated from each other in the second direction. The second electrode 170 includes a first region 171 disposed on the upper surface of the light-emitting element 10 and the upper surface of the first optical layer 141, a second region 172 in contact with the contact electrode 163 and electrically connected to the contact electrode 163, and a third region 173 disposed on the side surface of the first optical layer 141 and connecting the first region 171 and the second region 172.
[0052] On a plane, the plurality of second electrodes 170 may each overlap the first optical layer 141, and the third region 173 can cover the outer plane of the first optical layer 141.
[0053] The second optical layer 142 may be an organic insulating material surrounding the first optical layer 141. The second optical layer 142 may be disposed on the insulating layer 122 together with the first optical layer 141. The first optical layer 141 and the second optical layer 142 can include the same material (e.g., siloxane). For example, the first optical layer 141 may be a siloxane containing titanium oxide (TiOx), and the second optical layer 142 may be a siloxane not containing titanium oxide (TiOx). However, it is not necessarily limited thereto, and the first optical layer 141 and the second optical layer 142 may be formed of the same material or different materials from each other.
[0054] According to the embodiment, since the second region 172 of the second electrode 170 is connected to the contact electrode 163 in a state where it is formed flat as a whole, excessive stress does not concentrate at the point where it is connected to the contact electrode 163. Therefore, it is possible to effectively prevent cracks from occurring in the second electrode 170.
[0055] The second optical layer 142 can cover the second region 172 and the third region 173 of the second electrode 170. The upper surface of the second optical layer 142 and the upper surface of the first region 171 of the second electrode 170 can be in the same plane. That is, the first region 171 and the second optical layer 142 can function as a planarization layer. As a result, since there is no step on the surface where the black matrix 190 is formed, the pattern of the black matrix 190 can be easily formed on the first optical layer 141 and the second optical layer 142. However, it is not necessarily limited thereto, and the upper surfaces of the second optical layer 142 and the second electrode 170 may have different heights from each other.
[0056] The black matrix 190 may be an organic insulating material to which a black pigment is added. The second electrode 170 can be in contact with the contact electrode 163 under the black matrix 190. A transmission hole 191 through which light emitted from the light-emitting element 10 is emitted to the outside may be formed between the patterns of the black matrix 190. The transmission hole 191 may overlap the light-emitting element 10 in the Z-axis direction, and a partial region of the black matrix 190 may overlap the first optical layer 141 in the Z-axis direction. Here, the Z-axis direction may be referred to as the third direction. Therefore, the black matrix 190 can improve the problem that light emitted from each of the adjacent light-emitting elements 10 is emitted after being mixed by the first optical layer 141.
[0057] The cover layer 180 may be an organic insulating material that covers the black matrix 190 and the second electrode 170. In FIGS. 2 and 3, the configurations of the black matrix 190 and the cover layer 180 are omitted.
[0058] The contact electrode 163 is electrically connected to the first connection wiring RT1 disposed at the lower part, and the first connection wiring RT1 may be connected to the pixel driving circuit 20. Therefore, a cathode voltage can be applied to the second electrode 170 via the contact electrode 163. The first electrode 161 can be electrically connected to the second connection wiring RT2. This will be described later.
[0059] Referring to FIG. 5, the contact electrode 163 and the signal wirings TL1 to TL6 may be disposed on the same plane. The pixel driving circuit 20 may be disposed under the contact electrode 163 and the signal wirings TL1 to TL6. When the pixel driving circuit 20 is a driving driver, a plurality of driving drivers may be disposed in the display panel.
[0060] The passivation layer 133 can expose the contact electrode 163 so that the contact electrode 163 and the second electrode 170 are electrically connected. Also, the passivation layer 133 can insulate the signal wirings TL2 to TL5 and the second electrode 170. Here, the passivation layer 133 may be formed of an inorganic material.
[0061] Referring to FIG. 6, the connection portion 161a of the first electrode 161 extends to one side surface 131 of the bank pattern 130 and can be electrically connected to the connection wiring RT2 disposed on the insulating layer 122.
[0062] The first electrode 161, the connection portion 161a, the signal wiring TL, and / or the connection wirings RT1 and RT2 can include a single-layer or multi-layer metal layer selected from titanium (Ti), molybdenum (Mo), and aluminum (Al).
[0063] The first electrode 161 or the signal wiring TL may be formed to have a metal laminated structure in which a plurality of metal layers are formed using metal materials having different materials, thicknesses, etc. At this time, the first electrode 161, the connection portion 161a, and the signal wiring TL can be formed simultaneously by the same manufacturing process. Here, the thickness can indicate the width between one surface and the other surface of the metal layer disposed in the Z direction.
[0064] The first electrode 161 can include a first metal layer ML1 disposed below the solder pattern 162, a second metal layer ML2 disposed below the first metal layer ML1, a third metal layer ML3 disposed below the second metal layer ML2, and a fourth metal layer ML4 disposed below the third metal layer ML3. When the first electrode 161 is formed of the first metal layer ML1, the second metal layer ML2, the third metal layer ML3, and the fourth metal layer ML4, the first electrode 161 can be patterned by performing a photolithography process and an etching process after being deposited in the order of the fourth metal layer ML4 → the third metal layer ML3 → the second metal layer ML2 → the first metal layer ML1.
[0065] The first metal layer ML1 is disposed in contact with the lower part of the solder pattern 162 and can be electrically connected to the solder pattern 162.
[0066] Also, the first metal layer ML1 can include a transparent conductive oxide layer such as indium tin oxide (ITO) or indium zinc oxide (IZO) with good adhesiveness, corrosion resistance, and acid resistance. Here, the first metal layer ML1 may be referred to as an adhesive layer.
[0067] The second metal layer ML2 may be formed of a material having a different resistance value from that of the first metal layer ML1 and the third metal layer ML3. At this time, the second metal layer ML2 may be formed of a material having a lower light reflectance than the third metal layer ML3 but a higher resistance value. For example, the second metal layer ML2 can include titanium (Ti) or molybdenum (Mo).
[0068] The third metal layer ML3 may be formed of a material having a higher light reflectance than the first metal layer ML1. At this time, the third metal layer ML3 may be formed of a material having a higher light reflectance than the second metal layer ML2. For example, the third metal layer ML3 can include aluminum (Al) or silver (Ag).
[0069] That is, the light reflectance of the third metal layer ML3 may be greater than the light reflectances of the first metal layer ML1 and the second metal layer ML2.
[0070] The fourth metal layer ML4 may be formed of the same material as the second metal layer ML2. For example, the fourth metal layer ML4 can include titanium (Ti) or molybdenum (Mo).
[0071] After forming up to the first metal layer ML1, a reflective opening OP can be formed in the first electrode 161. The reflective opening OP may be a region that removes the first metal layer ML1 and the second metal layer ML2 and exposes only a part of the third metal layer ML3. The reflective opening OP may be in a form that surrounds the solder pattern 162 on a plane, or may be circular or square, but is not limited thereto.
[0072] The light emitted from the light-emitting element 10 is reflected on the surface of the third metal layer ML3 exposed by the reflection opening OP, and can have the effect of enhancing the light efficiency of the display device.
[0073] The passivation layer 133 can be disposed on the first electrode 161 and the signal wiring TL and include an opening hole 133a that exposes the solder pattern 162. Here, the opening hole 133a that exposes the solder pattern 162 may be referred to as the first opening hole. At this time, the reflection opening OP may be formed in a form surrounding the first opening hole.
[0074] The light-emitting element 10 can include a first-conductivity-type semiconductor layer 10-1, an active layer 10-2 disposed on the first-conductivity-type semiconductor layer 10-1, and a second-conductivity-type semiconductor layer 10-3 disposed on the active layer 10-2. A first driving electrode 15 may be disposed below the first-conductivity-type semiconductor layer 10-1, and a second driving electrode 14 may be disposed above the second-conductivity-type semiconductor layer 10-3.
[0075] The light-emitting element 10 can be formed on a silicon wafer using methods such as metal organic chemical vapor deposition (MOCVD), chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), molecular beam epitaxy (MBE), hydride vapor phase epitaxy (HVPE), and sputtering.
[0076] The first-conductivity-type semiconductor layer 10-1 can be realized with compound semiconductors such as III-V group and II-VI group, and may be doped with a first dopant. The first-conductivity-type semiconductor layer 10-1 may be formed of any one or more of semiconductor materials having a composition formula of Alx1Iny1Ga(1-x1-y1)N (0≦x1≦1, 0≦y1≦1, 0≦x1+y1≦1), InAlGaN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP, but is not limited thereto. When the first dopant is an n-type dopant such as Si, Ge, Sn, Se, Te, etc., the first-conductivity-type semiconductor layer 10-1 may be an n-type nitride semiconductor layer. However, when the first dopant is a p-type dopant, the first-conductivity-type semiconductor layer 10-1 may be a p-type nitride semiconductor layer.
[0077] The active layer 10-2 is a layer where electrons (or holes) injected through the first-conductivity-type semiconductor layer 10-1 meet holes (or electrons) injected through the second-conductivity-type semiconductor layer 10-3. The active layer 10-2 can generate light having a corresponding wavelength by the recombination of electrons and holes, which causes a transition to a lower energy level.
[0078] The active layer 10-2 can have any one of a single-well structure, a multiple-well structure, a single quantum well structure, a multi quantum well (MQW) structure, a quantum dot structure, or a quantum wire structure, and the structure of the active layer 10-2 is not limited thereto. The active layer 10-2 can generate light in the visible light wavelength band. As an example, the active layer 10-2 can output light in any one of the wavelength bands of blue, green, and red.
[0079] The second-conductivity-type semiconductor layer 10-3 may be disposed on the active layer 10-2. The second-conductivity-type semiconductor layer 10-3 can be realized with a compound semiconductor such as a group III-V compound semiconductor or a group II-VI compound semiconductor, and the second-conductivity-type semiconductor layer 10-3 may be doped with a second dopant. The second-conductivity-type semiconductor layer 10-3 may be formed of a semiconductor material having a composition formula of Inx2Aly2Ga1-x2-y2N (0≦x2≦1, 0≦y2≦1, 0≦x2 + y2≦1) or a material selected from AlInN, AlGaAs, GaP, GaAs, GaAsP, and AlGaInP. When the second dopant is a p-type dopant such as Mg, Zn, Ca, Sr, Ba, etc., the second-conductivity-type semiconductor layer 10-3 doped with the second dopant may be a p-type semiconductor layer. When the second dopant is an n-type dopant, the second-conductivity-type semiconductor layer 10-3 may be an n-type nitride semiconductor layer.
[0080] In the embodiment, the light-emitting device has been described as a vertical structure in which drive electrodes 14 and 15 are disposed on the upper and lower portions of the light-emitting structure. However, the light-emitting device may have a lateral structure or a flip chip structure in addition to the vertical structure.
[0081] Referring to FIG. 7, the main light-emitting element 12a and the sub-light-emitting element 12b of the sub-pixel may be disposed on the bank pattern 130. The second light-emitting element 12 will be described as an example. The first-1 electrode 161-1 connected to the main light-emitting element 12a extends to one side surface of the bank pattern 130 and can be electrically connected to the second-1 connection wiring RT21 disposed at the lower portion. The first-2 electrode 161-2 connected to the sub-light-emitting element 12b extends to the other side surface of the bank pattern 130 and can be electrically connected to the second-2 connection wiring RT22 disposed at the lower portion.
[0082] The pixel driving circuit 20 can apply an anode voltage to the main light-emitting element 12a through the second-1 connection wiring RT21, and can apply an anode voltage to the sub light-emitting element 12b through the second-2 connection wiring RT22. The pixel driving circuit 20 can apply a cathode voltage to the main light-emitting element 12a and the sub light-emitting element 12b through the first connection wiring RT1 and the second electrode 170.
[0083] The pixel driving circuit 20 may drive only the main light-emitting element 12a to adjust the luminance, or may drive the main light-emitting element 12a and the sub light-emitting element 12b simultaneously to adjust the luminance. If the main light-emitting element 12a is darkened, only the sub light-emitting element 12b can be driven to adjust the luminance.
[0084] FIG. 8 is a diagram showing a display device according to another embodiment of the present specification. FIG. 9 is a cross-sectional view taken along line IV-IV' in FIG. 8.
[0085] Referring to FIGS. 8 and 9, the second electrode 170 can be electrically connected to the contact electrode 163 through the contact hole TH1 formed in the second optical layer 142. The second optical layer 142 can include the contact hole TH1 that exposes the contact electrode 163. The second electrode 170 inserted into the contact hole TH1 of the second optical layer 142 can contact the upper surface of the contact electrode 163. The contact hole TH1 may be formed in the outer contour region of the pixel.
[0086] FIG. 10A is a diagram showing a display device according to another embodiment of the present invention. FIG. 10B is an enlarged view of region B in FIG. 10A. FIGS. 11A, 11B, and 11C are cross-sectional views taken along line Y-Y' in FIG. 10B. FIGS. 12A, 12B, and 12C are cross-sectional views taken along line Z-Z' in FIG. 10A.
[0087] Hereinafter, the content related to the same configuration as that included in the embodiment described with reference to FIGS. 1 to 9 is omitted because of duplication, and the description will focus on the different features.
[0088] Referring to FIGS. 10A and 10B, the display panel can include a display area AA where an image is displayed and a non-display area NA where an image is not displayed. Various wirings and drive circuits can be mounted in the non-display area NA, and a pad portion PC to which an integrated circuit, a printed circuit, etc. are connected may be arranged. A bending area BE may be arranged between the non-display area NA and the pad portion PC, and a connection wiring area CL may be arranged between the bending area BE and the pad portion PC.
[0089] A data drive circuit or a gate drive circuit may be arranged in the non-display area NA, and wirings for supplying a control signal for controlling such a drive circuit may be arranged. Here, the control signal includes various timing signals including a clock signal, an input data enable signal, and a synchronization signal, and can be received via the wirings arranged in the connection wiring area CL at the pad portion PC.
[0090] A protection pattern TRE may be formed in the non-display area NA so as to surround the display area AA. An outer bank pattern 130a arranged so as to surround the protection pattern TRE and an outer optical layer 143 arranged so as to cover the outer bank pattern 130a may be arranged in the non-display area NA.
[0091] The pad portion PC can include a first area (Film on Panel, FP) to which a Chip on Film (COF) adheres. As will be described later, some insulating layers can be removed in the first area (FP).
[0092] Circuit components can be arranged directly on the pad portion PC or can be attached to the pad portion PC in the form of a COP or a COF.
[0093] The circuit component may include a printed circuit board (PCB). A Chip on Film (COF) can process various signals input from the printed circuit board (PCB) and output them to the display panel side. For this purpose, one end of the Chip on Film (COF) may be attached to the display panel, and the other end opposite to it may be attached to the printed circuit board (PCB).
[0094] Various drive circuits such as a timing control unit can be mounted on the printed circuit board (PCB), and various signals generated by the drive circuit can be output to the Chip on Film (COF) side. The printed circuit board (PCB) can include, for example, a Flexible Printed Circuit Board (FPCB).
[0095] The display panel and the Chip on Film (COF) that at least partially overlaps it can be adhered by an anisotropic conductive film (ACF) disposed therebetween.
[0096] Referring to other embodiments of the present invention shown in FIGS. 11A and 12A, it includes a plurality of first electrodes 161 and contact electrodes 163 disposed on a substrate 110, a plurality of light-emitting elements 10 disposed on the plurality of first electrodes 161, a first optical layer 141 disposed between the plurality of light-emitting elements 10, and a second electrode 170 disposed on the plurality of light-emitting elements 10.
[0097] An adhesive layer AD may be disposed on the substrate 110. There may be an area where the adhesive layer AD is removed in the non-display area NA or the bending area BE. This is because the more organic layers there are in the bending area BE, the greater the risk of damage or breakage of the organic layers in the bending area BE. The adhesive layer AD can be selected, for example, as any one of Adhesive polymer, epoxy resin, UV resin, polyimide-based, acrylate-based, urethane-based, Polydimethylsiloxane (PDMS), but is not limited thereto.
[0098] On the adhesive layer AD in the display area AA, a pixel driving circuit 20 realized by a driving driver may be arranged.
[0099] A protective layer 120 for protecting the pixel driving circuit 20 may be formed on the adhesive layer AD. The protective layer 120 can cover at least a part or the whole of the side surface of the pixel driving circuit 20, and can cover a part of the upper surface of the pixel driving circuit 20. The protective layer 120 can cover the entire substrate 110, and can also cover a part or the whole of the pad portion PC. The protective layer 120 may be made of an organic insulating material, for example, photosensitive photoacryl or photosensitive polyimide, but is not limited thereto.
[0100] A buffer layer 121 covering the pixel driving circuit 20 may be arranged on the protective layer 120.
[0101] A first inorganic film INO1 may be arranged on the protective layer 120. The first inorganic film INO1 may be formed in a single layer or multiple layers of an inorganic material such as SiNx and / or SiOx. When the protective layer 120 is made of an organic material, it cannot prevent the intrusion of moisture, hydrogen, etc., and defects such as corrosion of metal wiring may occur, affecting the normal driving of the pixel driving circuit 20. The first inorganic film INO1 is made of an inorganic material, is strong against the intrusion of external moisture, and can prevent the occurrence of defects due to moisture, etc.
[0102] A third connection wiring RT3 may be arranged on the protective layer 120.
[0103] An insulating layer 122 may be arranged on the buffer layer 121. An intermediate connection wiring RTN connected to the first a connection wiring RT1a, the second a connection wiring RT2a, and the third connection wiring RT3 may be arranged on the buffer layer 121.
[0104] A first insulating layer 122a covering the first a connection wiring RT1a, the second a connection wiring RT2a, and the intermediate connection wiring RTN may be arranged on the buffer layer 121.
[0105] On the first insulating layer 122a, the first b connection wiring RT1b and the second b connection wiring RT2b may be arranged.
[0106] On the first insulating layer 122a, a second insulating layer 122b covering the first b connection wiring RT1b and the second b connection wiring RT2b may be arranged.
[0107] On the second insulating layer 122b, the first c connection wiring RT1c and the second c connection wiring RT2c may be arranged.
[0108] On the second insulating layer 122b, a third insulating layer 122c covering the first c connection wiring RT1c and the second c connection wiring RT2c may be arranged.
[0109] On the third insulating layer 122c, the first d connection wiring RT1d and the second d connection wiring RT2d may be arranged.
[0110] On the third insulating layer 122c, a fourth insulating layer 122d covering the first d connection wiring RT1d and the second d connection wiring RT2d may be arranged. The more insulating layers there are in the bending region BE, the more likely it is that the insulating layers will be damaged during bending. Although not shown, the fourth insulating layer 122d may not be arranged in the bending region BE and in the regions of the non-display region NA and the connection wiring region CL adjacent to the bending region BE. In the bending region BE, n (0 < n < 5 and n is an integer) insulating layers may be arranged.
[0111] On the fourth insulating layer 122d, a plurality of signal wirings TL, contact electrodes, and the seventh signal wiring may be arranged. That is, the plurality of signal wirings TL, contact electrodes, and the seventh signal wiring may be arranged on the same layer. Being arranged on the same layer can mean that after being entirely formed on any one layer, they are separated and formed by a patterning process or the like. However, it is not necessarily limited to this, and the heights may be different, but as long as a plurality of wirings or electrodes are formed on the same layer, the plurality of wirings or electrodes can be defined as being arranged on the same layer.
[0112] The first a connection wiring RT1a, the first b connection wiring RT1b, the first c connection wiring RT1c, the first d connection wiring RT1d, and the plurality of signal wirings TL can be electrically connected through contact holes that penetrate the insulating layer and the inorganic film in which each is disposed.
[0113] The second a connection wiring RT2a, the second b connection wiring RT2b, the second c connection wiring RT2c, the second d connection wiring RT2d, and the contact electrode 163 can be electrically connected through contact holes that penetrate the insulating layer and the inorganic film in which each is disposed.
[0114] The anode voltage supplied from the pixel driving circuit 20 can be supplied to the light emitting element 10 through the first a connection wiring RT1a, the first b connection wiring RT1b, the first c connection wiring RT1c, the first d connection wiring RT1d, the plurality of signal wirings TL, and the first electrode 161.
[0115] The cathode voltage supplied from the pixel driving circuit 20 can be supplied to the light emitting element 10 through the second a connection wiring RT2a, the second b connection wiring RT2b, the second c connection wiring RT2c, the second d connection wiring RT2d, the plurality of signal wirings TL, and the first electrode 161.
[0116] The connection wirings mentioned above are examples, and each connection wiring can include a plurality of wiring patterns disposed in different layers with one or more insulating layers therebetween. The wiring patterns disposed in different layers can be electrically connected through contact holes that penetrate the insulating layer.
[0117] The third connection wiring RT3 is disposed on the protective layer 120. The third connection wiring RT3 can extend from the display area AA to the pad portion PC.
[0118] The fourth connection wiring is disposed on the first insulating layer 122a and can extend to the pad portion PC and the connection wiring area CL.
[0119] The fifth connection wiring is disposed on the second insulating layer 122b and can extend to the pad portion PC and the connection wiring region CL.
[0120] The sixth connection wiring is disposed on the third insulating layer 122c and can extend to the pad portion PC and the connection wiring region CL.
[0121] The seventh signal wiring is disposed on the fourth insulating layer 122d and can extend to the pad portion PC and the connection wiring region CL.
[0122] Signals output from circuit components such as a printed circuit board (PCB) can be transmitted to the pixel driving circuit 20 disposed in the display area AA via a chip on film (COF), the seventh signal wiring, the sixth connection wiring, the fifth connection wiring, the fourth connection wiring, and the third connection wiring RT3.
[0123] A plurality of bank patterns 130 may be disposed on the insulating layer 122. At least one light-emitting element 10 may be disposed on each bank pattern 130. For example, referring to FIGS. 3, 11A, and 12A, the first light-emitting element 11 may be disposed on the first bank pattern 130a, the second light-emitting element 12 may be disposed on the second bank pattern 130b, and the third light-emitting element 13 may be disposed on the third bank pattern 130c.
[0124] The first electrode 161 may be disposed on the bank pattern 130. In the present embodiment, the first electrode 161 includes a plurality of metal layers ML2, ML3, and ML4 excluding the first metal layer ML1 in the formation process. In another process, the first metal layer ML1 may be disposed only in a region overlapping the first electrode 161 and the light-emitting element 10. An opening OP may be disposed in the first electrode 161. In the present embodiment, the opening OP can be formed by removing the second metal layer ML2. The first metal layer ML1 may not be disposed in the pad portion PC. Also, the first metal layer ML1 may not be disposed in other regions except for the region overlapping the light-emitting element 10.
[0125] A solder pattern 162 may be disposed on the first electrode 161. The solder pattern 162 may be made of indium (In), tin (Sn), or an alloy thereof, but is not limited thereto. The solder pattern 162 may include a first portion 162a and a second portion 162b. The first portion 162a may contain indium (In), and the second portion 162b may contain gold (Au). When the light-emitting element 10 is transferred, the first portion 162a and the second portion 162b can be eutectically bonded after being adhered by pressure and then applying heat. When the second portion 162b receives pressure, a part of the second portion 162b can cover at least a part or the whole of the side surface of the first portion 162a. In this case, the contact area between the first portion 162a and the second portion 162b becomes larger, the adhesive force becomes higher, and the electrical signal transmission becomes better.
[0126] A plurality of light-emitting elements 10 can be respectively mounted on the solder pattern 162.
[0127] The first optical layer 141a can cover the plurality of light-emitting elements 10 and the bank pattern 130. Therefore, the first optical layer 141a can cover between the plurality of light-emitting elements 10 and between the plurality of bank patterns 130. The arrangement on the plane of the first optical layer 141a is the same as the arrangement on the plane of the first optical layer 141.
[0128] The second electrode 170 may be disposed on the plurality of light-emitting elements 10. The second electrode 170 can be commonly connected to the plurality of pixels PXL.
[0129] In the non-display area NA, the second protection pattern TRE2 may be formed to surround the display area AA. The second protection pattern TRE2 may be formed after being disposed up to the first-second optical layer 141b and then removing the first to fourth insulating layers 122a, 122b, 122c, 122d and the second optical layer 142. In the non-display area NA, an outer bank pattern 130a disposed to surround the second protection pattern TRE2 and an outer optical layer 143 disposed to cover the outer bank pattern 130a may be disposed. The outer bank pattern 130a and the outer optical layer 143 may be formed on the remaining three surfaces out of the four surfaces surrounding the display panel, excluding the surface adjacent to the bending area BE. The outer bank pattern 130a may be formed of the same material in the same process as the bank pattern 130. The outer optical layer 143 may be formed of the same material in the same process as the first-first optical layer 141a.
[0130] After forming the first protection pattern TRE1 and the second protection pattern TRE2, the second inorganic film INO2 can be disposed to cover the display area AA and the non-display area NA. The second inorganic film INO2 completely covers the inside of the first protection pattern TRE1 and the second protection pattern TRE2, and a part of the second inorganic film INO2 can be in contact with the first inorganic film INO1 inside the second protection pattern TRE2. Also, the second protection pattern TRE2 may be disposed between the second electrode 170 and the first-second optical layer 141b in the area adjacent to the light-emitting element 10 in the process sequence. The second protection pattern TRE2 can completely cover the outer optical layer 143 in the non-display area NA, but can also cover only a part thereof. The second inorganic film INO2 may be formed of the same material as the first inorganic film INO1, but is not limited thereto.
[0131] In this way, when the first protection pattern TRE1, the second protection pattern TRE2, the first inorganic film INO1, and the second inorganic film INO2 are arranged, it is possible to prevent or delay the entry of foreign substances such as moisture and hydrogen invading from the outside, and prevent defects such as corrosion or damage of the metal wiring inside the display panel. Further, by arranging the outer optical layer 143 and the outer bank pattern 130a, the thickness of the second optical layer 142 and the second inorganic film INO2 arranged in the non-display region NA can be the same as or approximate to that in the display region AA, and defects such as the organic layer such as the second optical layer 142 flowing out of the non-display region NA of the display panel due to process problems can be prevented.
[0132] The first - second optical layer 141b may be arranged to overlap the first - first optical layer 141a on the second electrode 170. By arranging the first - second optical layer 141b on the second electrode 170, the amount of light emitted to the front can be increased.
[0133] After forming the first - first optical layer 141a, in order to contact the second electrode 170 and the light - emitting element 10, the first - first optical layer 141a located in the region adjacent to the upper surface of the light - emitting element 10 is removed. Thereafter, the second electrode 170 is arranged on the first - first optical layer 141a. Further, in order to supply a cathode voltage to the second electrode 170, the first - first optical layer 141a or the first - second optical layer 141b is removed to form the first protection pattern TRE1. The second electrode 170 is electrically connected to the signal wiring TL formed on the fourth insulating layer 122d via the first protection pattern TRE1 and can receive a cathode voltage.
[0134] The second optical layer 142 may be an organic insulating material surrounding the first optical layer 141. The second optical layer 142 may be disposed on the insulating layer 122 together with the first optical layer 141. The first - 1 optical layer 141a and the first - 2 optical layer 141b may be disposed in the display area AA, but the second optical layer 142 may be disposed on the display area AA and the non - display area NA. The black matrix 190 may be disposed on the first - 2 optical layer 141b. The black matrix 190 may be disposed on the first - 2 optical layer 141b, the second inorganic film INO2, and the second optical layer 142. A transmission hole may be formed between the patterns of the black matrix 190 through which the light emitted from the light - emitting element 10 is emitted to the outside.
[0135] The cover layer 180 may be an organic insulating material covering the black matrix 190 and the second inorganic film INO2.
[0136] Although not shown in the drawings, in order to protect a plurality of connection wirings RT1a, RT1b, RT1c, RT1d, RT2a, RT2b, RT2c, RT2d disposed in the display area AA from foreign substances such as moisture, after forming each connection wiring, an inorganic film can be further disposed to cover it. For example, after forming the first a - connection wiring RT1a and the second a - connection wiring RT2a, an inorganic film covering the first a - connection wiring RT1a, the second a - connection wiring RT2a, and the buffer layer 121 can be additionally disposed.
[0137] According to an embodiment of the present invention shown in FIG. 11A, the third connection wiring RT3 can transmit the electrical signal transmitted from the pad portion to the pixel driving circuit 20 via the intermediate connection wiring RTN, the first a - connection wiring RT1a, and the second a - connection wiring RT2a.
[0138] The intermediate connection wiring RTN may be formed of the same material in the same process as the first a - connection wiring RT1a and the second a - connection wiring RT2a.
[0139] The second protection pattern TRE2 is formed so that the upper part of the third connection wiring RT3 is exposed, and may be covered with the second inorganic film INO2 thereafter.
[0140] The third connection wiring RT3 can be in direct contact with a part of the first inorganic film INO1 and at least a part of the second inorganic film INO2.
[0141] According to an embodiment of the present invention shown in FIGS. 11A and 12A, the second protection pattern TRE2, the buffer layer 121, the plurality of insulating layers 122a, 122b, 122c, 122d, and the second optical layer 142 may be formed so as to have no flat portion at their boundaries and have the same taper.
[0142] According to another embodiment of the present invention shown in FIGS. 11B and 12B, when forming the second protection pattern TRE2, the plurality of insulating layers 122a, 122b, 122c, 122d and the second optical layer 142 can be removed in separate steps depending on the process environment and equipment. That is, after disposing the fourth insulating layer 122d, the plurality of insulating layers 122a, 122b, 122c, 122d in the region where the second protection pattern TRE2 is to be formed are primarily removed, and then the second optical layer 142 is disposed and removed to form the second protection pattern TRE2. As a result, a region having a flat surface can be formed at the boundary between the uppermost surface of the plurality of insulating layers 122a, 122b, 122c, 122d and the second optical layer 142, and the taper angle of the second inorganic film INO2 disposed on the inclined surface of the plurality of insulating layers 122a, 122b, 122c, 122d may be different from the taper angle of the second inorganic film INO2 disposed on the inclined surface of the second optical layer 142.
[0143] According to another embodiment of the present invention shown in FIGS. 11C and 12C, when forming the second protection pattern TRE2, each of the insulating layers included in the plurality of insulating layers 122a, 122b, 122c, 122d and the second optical layer 142 can be removed in separate processes for each layer by the process environment and the apparatus. As a result, regions having flat surfaces can be formed at the boundaries between the respective insulating layers 122a, 122b, 122c, 122d and at the boundary between the fourth insulating layer 122d and the second optical layer 142, and the taper angles of the second inorganic film INO2 disposed on the inclined surfaces of the respective insulating layers 122a, 122b, 122c, 122d and the second optical layer 142 may be different from each other.
[0144] In the embodiment, the light-emitting structure has been described as a vertical structure in which the driving electrodes 14 and 15 are disposed above and below the light-emitting structure. However, the light-emitting element may have a lateral structure or a flip chip structure in addition to the vertical structure.
[0145] The display device according to an embodiment of the present invention is applicable to a mobile device, a video phone, a smart watch, a watch phone, a wearable apparatus, a foldable apparatus, a rollable apparatus, a bendable apparatus, a flexible apparatus, a curved apparatus, a sliding apparatus, a variable apparatus, an electronic notebook, an e-book, a PMP (portable multimedia player), a PDA (personal digital assistant), an MP3 player, a mobile medical device, a desktop PC, a laptop PC, a netbook computer, a workstation, a navigation device, a vehicle display device, a theater display device, a television, a wallpaper device, a signage device, a game device, a notebook computer, a monitor, a camera, a camcorder, and home appliances, etc. And the display device according to one or more embodiments of the present specification can be applied to an organic light-emitting lighting device or an inorganic light-emitting lighting device.
[0146] The display device according to one or more embodiments of the present invention can be described as follows.
[0147] A display device according to one or more embodiments of the present invention includes a substrate including a display area, a non-display area, and a bending area, an adhesive layer disposed on the substrate, a pixel driving circuit disposed on the adhesive layer in the display area, a buffer layer disposed on the adhesive layer and covering the pixel driving circuit, a second protection pattern disposed on the non-display area so as to surround the display area, a first inorganic film disposed on the pixel driving circuit, and a second inorganic film disposed on the display area, the second protection pattern, and the non-display area, and the first inorganic film and the second inorganic film may overlap in an area overlapping the second protection pattern.
[0148] The first inorganic film can extend only up to an area overlapping the second protection pattern.
[0149] Further, a display device according to one or more embodiments of the present invention may further include a protection layer disposed above the adhesive layer and below the first inorganic film, the protection layer covering at least a part or the whole of the side surface of the pixel driving circuit, a plurality of insulating layers disposed on the buffer, a bank pattern disposed on the plurality of insulating layers, a plurality of light-emitting elements disposed on the bank pattern, a first optical layer disposed on at least one of the plurality of insulating layers and covering the plurality of light-emitting elements and the bank pattern, and a second optical layer disposed in the same layer as the first optical layer and surrounding the side surface of the first optical layer.
[0150] Furthermore, a display device according to one or more embodiments of the present invention may further include an outer bank pattern formed in the same layer as the bank pattern and an outer optical layer disposed so as to cover the outer bank pattern, the second inorganic film being disposed on the outer optical layer, and the outer bank pattern may be disposed farther from the display area than the second protection pattern.
[0151] In addition, a display device according to one or more embodiments of the present invention further includes a plurality of connection wirings respectively disposed on the plurality of insulating layers, and a third connection wiring disposed on the protective layer so as to extend from the bending region to the display region, and a surface of the third connection wiring may overlap with the first inorganic film and the second inorganic film in a region overlapping with the second protection pattern.
[0152] The second protection pattern may be formed by removing the plurality of insulating layers and the second optical layer.
[0153] The second inorganic film disposed on the inclined surface in the second protection pattern may have the same angle.
[0154] The second inorganic film disposed on the inclined surface in the second protection pattern may have a flat surface on the uppermost surface of the plurality of insulating layers.
[0155] The second inorganic film disposed on the inclined surface in the second protection pattern may have a flat surface on the upper surface of each of the plurality of insulating layers.
[0156] In addition, a display device according to one or more embodiments of the present invention includes a first electrode disposed on the bank pattern, a first metal layer disposed on the first electrode, a solder pattern disposed on the first metal layer, and a second electrode disposed on one of the plurality of light-emitting elements, and the one of the plurality of light-emitting elements may be disposed on the solder pattern.
[0157] As described above, since the content of the specification describing the problem to be solved by the invention, the means for solving the problem, and the effect of the invention does not specify the essential features of the claims, the scope of rights of the claims is not limited by the matters described in the content of the specification.
[0158] The embodiments of the present invention have been described in more detail with reference to the accompanying drawings. However, the present invention is not necessarily limited to such embodiments, and various modifications can be made and implemented without departing from the technical idea of the present invention. Therefore, the embodiments disclosed in the present invention are for the purpose of explanation rather than for limiting the technical idea of the present invention, and the scope of the technical idea of the present invention is not limited by such embodiments. Therefore, it should be understood that the embodiments described above are exemplary and non-limiting in all aspects. The protection scope of the present invention should be construed according to the scope of the claims, and all technical ideas within the equivalent scope should be construed as being included in the scope of rights of the present invention.
Explanation of Reference Numerals
[0159] 10: Light-emitting element 10: Substrate 20: Pixel driving circuit 121: Buffer layer 122: Insulating layer 130: Bank pattern 141: First optical layer 142: Second optical layer 161: First electrode 163: Contact electrode 170: Second electrode
Claims
1. A substrate including a display area, a non-display area, and a bending area; An adhesive layer disposed on the substrate; A pixel driving circuit disposed on the adhesive layer in the display area; A buffer layer disposed on the adhesive layer and covering the pixel driving circuit; A second protection pattern disposed in the non-display area so as to surround the display area; A first inorganic film disposed on the pixel driving circuit; A second inorganic film disposed on the second protection pattern and in the display area and the non-display area, A display device, wherein the first inorganic film and the second inorganic film overlap in an area overlapping with the second protection pattern.
2. The display device according to claim 1, wherein the first inorganic film extends only up to the area overlapping with the second protection pattern.
3. A protection layer disposed above the adhesive layer and below the first inorganic film, the protection layer covering at least a part or the whole of the side surface of the pixel driving circuit; A plurality of insulating layers disposed on the buffer layer; A bank pattern disposed on the plurality of insulating layers; A plurality of light-emitting elements disposed on the bank pattern; A first - 1 optical layer disposed on at least one of the plurality of insulating layers and covering the plurality of light-emitting elements and the bank pattern; The display device according to claim 1, further including a second optical layer disposed in the same layer as the first - 1 optical layer and surrounding the side surface of the first - 1 optical layer.
4. An outer bank pattern formed in the same layer as the bank pattern; An outer optical layer disposed so as to cover the outer bank pattern, The second inorganic film is disposed on the outer optical layer, The display device according to claim 3, wherein the outer bank pattern is disposed farther from the display area than the second protection pattern.
5. A plurality of connection wirings respectively disposed on the plurality of insulating layers; A third connection wiring disposed on the protection layer so as to extend from the bending area to the display area, The display device according to claim 4, wherein the surface of the third connection wiring overlaps with the first inorganic film and the second inorganic film in an area overlapping with the second protection pattern.
6. The display device according to claim 5, wherein the second protection pattern is formed by removing the plurality of insulating layers and the second optical layer.
7. The display device according to claim 6, wherein the second inorganic film disposed on the inclined surface within the second protection pattern has the same angle.
8. The display device according to claim 6, wherein the second inorganic film disposed on the inclined surface within the second protection pattern has a flat surface on the uppermost surface of the plurality of insulating layers.
9. The display device according to claim 6, wherein the second inorganic film disposed on the inclined surface within the second protection pattern has a flat surface on the upper surface of each of the plurality of insulating layers.
10. A first electrode disposed on the bank pattern, A first metal layer disposed on the first electrode, A solder pattern disposed on the first metal layer, And a second electrode disposed on one of the plurality of light-emitting elements, The display device according to claim 7, wherein the one of the plurality of light-emitting elements is disposed on the solder pattern.
11. A first - 2 optical layer disposed on the second electrode and overlapping with the first - 1 optical layer, The display device according to claim 10, further comprising a first protection pattern disposed on the plurality of insulating layers and formed by removing at least one of the first - 1 optical layer and the first - 2 optical layer.
12. The display device according to claim 1, wherein there is a region where the adhesive layer is removed in at least one of the non - display region and the bending region.
13. The outer bank pattern and the bank pattern contain the same material, The display device according to claim 4, wherein the outer optical layer and the first - 1 optical layer contain the same material.
Citation Information
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