Exposure device and image formation device

Abstract

To prevent excessive exposure of a photoreceptor, while avoiding complication of a circuit configuration.SOLUTION: An exposure device includes: a light-emitting chip having a plurality of light-emitting elements; a generation part for generating a first synchronization signal synchronized with a second synchronization signal corresponding to rotation speed of a photoreceptor; and a transmission part for transmitting to the light-emitting chip a data signal for one line for light-emitting control of the plurality of light-emitting elements, during a line period indicated by the first synchronization signal. The second synchronization signal indicates a line period corresponding to the rotation speed of the photoreceptor, and the first synchronization signal indicates a line period corresponding to first rotation speed regardless of the rotation speed of the photoreceptor. When the photoreceptor is rotated at second rotation speed which is 1 / N times the first rotation speed, the transmission part transmits the data signal for one line to the light-emitting chip by one line period among N line periods indicated by the first synchronization signal, and transmits a non-light-emitting signal to the light-emitting chip, by the residual line period among the N line periods.SELECTED DRAWING: Figure 16

Description

[Technical Field]

[0001] The present invention relates to an exposure device and an image forming apparatus. [Background technology]

[0002] Electrophotographic image forming devices form an image by exposing a rotating photoreceptor to light to form an electrostatic latent image on the photoreceptor, and then developing the electrostatic latent image with toner. Among these, solid-state exposure devices, which use a rod lens array to focus light from an array of light-emitting elements onto the surface of the photoreceptor, are attracting attention because they are easier to make smaller, quieter, and less expensive than laser scanning exposure devices.

[0003] Patent Document 1 discloses an example of a solid-state exposure type exposure apparatus. The image controller of the exposure apparatus in Patent Document 1 outputs a series of data signals for light emission control to a plurality of light-emitting chips, each having an array of light-emitting elements, during each line period indicated by a line synchronization signal. Each light-emitting chip drives a plurality of light-emitting elements in the light-emitting element array in accordance with the series of data signals input from the image controller. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Publication No. 2022-96965 Summary of the Invention [Problem to be solved by the invention]

[0005] Generally, in electrophotographic image forming devices, the amount of heat required to fuse a toner image to a sheet varies depending on the basis weight of the sheet. For example, the amount of heat required to fuse toner sufficiently to cardboard is greater than the amount of heat required to fuse toner to plain paper. Therefore, when printing on cardboard, the process speed is usually slower than when printing on plain paper to ensure that there is enough time to apply a sufficient amount of heat to the cardboard in the fuser.

[0006] However, when the light-emitting elements are maintained in an emitting state throughout one line cycle as in the exposure device of Patent Document 1, if the process speed is set slow, the line cycle becomes longer accordingly, and there is a risk that the photosensitive member will be exposed for longer than necessary. While such excessive exposure can be prevented by making the light-emitting elements emit light only for part of the line cycle, changing the method of synchronization control in accordance with the process speed setting leads to increased circuit complexity and costs.

[0007] In view of the above-mentioned problems, the present invention aims to provide a mechanism that can prevent excessive exposure of a photosensitive member while avoiding a complicated circuit configuration. [Means for solving the problem]

[0008] According to an aspect, an exposure apparatus includes at least one light-emitting chip having a plurality of light-emitting elements arranged along a line parallel to the axial direction of a rotating photoreceptor, a synchronization signal generation unit that generates a first synchronization signal synchronized with a second synchronization signal corresponding to the rotation speed of the photoreceptor, the first synchronization signal being used to control the transmission of data signals for each line to the at least one light-emitting chip, and a transmission unit that transmits, during a line period indicated by the first synchronization signal, a data signal for one line used for controlling the light emission of the plurality of light-emitting elements to the at least one light-emitting chip. The second synchronization signal indicates a first line period when the photoreceptor rotates at a first rotation speed, and indicates a second line period that is N times the first line period when the photoreceptor rotates at a second rotation speed that is 1 / N times (N is an integer, 1 < N) the first rotation speed. The synchronization signal generation unit generates the first synchronization signal indicating the first line period regardless of the rotation speed of the photoreceptor. When the photoreceptor rotates at the second rotation speed, the transmission unit transmits the data signal for one line to the at least one light-emitting chip during one line period out of N line periods indicated by the first synchronization signal, and transmits a non-light emission signal for preventing the plurality of light-emitting elements from emitting light to the at least one light-emitting chip during the remaining line periods out of the N line periods. An exposure apparatus is provided. An image forming apparatus is also provided, which includes the exposure apparatus, the photoreceptor, a developing device that develops a latent image formed by the exposure apparatus exposing the photoreceptor to form a toner image on the surface of the photoreceptor, a fixing unit that fixes the toner image transferred from the photoreceptor to a sheet to the sheet, and a setting unit that sets the rotation speed of the photoreceptor according to the type of the sheet.

Effect of the Invention

[0009] According to the present invention, it is possible to prevent excessive exposure of the photoreceptor while avoiding complication of the circuit configuration.

Brief Description of the Drawings

[0010] [Figure 1] A configuration diagram showing a schematic configuration of an image forming apparatus according to an embodiment. [Figure 2A] FIG. 2 is a first explanatory diagram illustrating the configuration of a photosensitive member and an exposure head according to an embodiment. [Figure 2B] FIG. 2 is a second explanatory diagram of the configuration of the photosensitive member and exposure head according to the embodiment. [Figure 3A] FIG. 2 is a first explanatory diagram illustrating the configuration of a printed circuit board of an exposure head according to an embodiment. [Figure 3B] FIG. 2 is a second explanatory diagram illustrating the configuration of the printed circuit board of the exposure head according to the embodiment. [Figure 4] FIG. 1 is a plan view showing a schematic configuration of a light-emitting chip according to an embodiment. [Figure 5] FIG. 1 is a cross-sectional view showing an example of the configuration of a light-emitting element according to an embodiment. [Figure 6] FIG. 2 is a block diagram showing an example of the control configuration of an exposure apparatus according to an embodiment. [Figure 7] 10 is a signal chart related to writing control data to a light-emitting chip according to an embodiment; [Figure 8] 10 is a signal chart related to the transmission of image data to a light-emitting chip according to an embodiment. [Figure 9] FIG. 2 is a block diagram showing an example of a detailed circuit configuration of the light-emitting chip according to an embodiment. [Figure 10] FIG. 3 is a circuit diagram showing a partial configuration of a current driver corresponding to one light-emitting element. [Figure 11] 10 is a signal chart relating to the output timing of drive signals from each latch unit to a current driver unit. [Figure 12] 1 is a signal chart for explaining an issue related to one embodiment. [Figure 13] FIG. 4 is a block diagram showing an example of a detailed configuration of a data communication unit according to an embodiment. [Figure 14] 10 is a signal chart showing an example of image data processing timing when the process speed is set to a normal value. [Figure 15] 10 is a signal chart showing an example of image data processing timing when the process speed is set to 1 / 2 the normal value. [Figure 16]16 is a signal chart relating to the output timing of a drive signal to a current driver in the example of FIG. 15. [Figure 17] 10 is a signal chart showing an example of image data processing timing when the process speed is set to 1 / 3 of the normal value. [Figure 18] 18 is a signal chart relating to the output timing of a drive signal to a current driver in the example of FIG. 17. DETAILED DESCRIPTION OF THE INVENTION

[0011] Hereinafter, embodiments will be described in detail with reference to the accompanying drawings. Note that the following embodiments do not limit the scope of the invention claimed. Although multiple features are described in the embodiments, not all of these multiple features are necessarily essential to the invention, and multiple features may be combined arbitrarily. Furthermore, in the accompanying drawings, the same reference numerals are used to designate the same or similar components, and redundant explanations will be omitted.

[0012] 1. General Configuration of Image Forming Apparatus 1 shows an example of a schematic configuration of an image forming apparatus 1 according to an embodiment. The image forming apparatus 1 includes a reading unit 100, an image creating unit 103, a fixing unit 104, and a conveying unit 105. The reading unit 100 optically reads an original placed on a platen and generates read image data. The image creating unit 103 forms an image on a sheet based on the read image data generated by the reading unit 100 or based on print image data received from an external device via a network, for example.

[0013] The image forming unit 103 includes image forming units 101a, 101b, 101c, and 101d. The image forming units 101a, 101b, 101c, and 101d form black, yellow, magenta, and cyan toner images, respectively. The image forming units 101a, 101b, 101c, and 101d have the same configuration and are collectively referred to as the image forming unit 101 below. The photoconductor 102 of the image forming unit 101 is rotated clockwise in the drawing during image formation. The charger 107 charges the photoconductor 102. The exposure head 106 exposes the photoconductor 102 to light to form an electrostatic latent image on the surface of the photoconductor 102. The developer 108 develops the electrostatic latent image on the photoconductor 102 with toner to form a toner image. The toner image formed on the surface of the photoreceptor 102 is transferred onto a sheet transported on a transfer belt 111. By transferring the toner images of the four photoreceptors 102 onto the sheet in an overlapping manner, a color image containing four color components, namely black, yellow, magenta, and cyan, can be formed.

[0014] The conveying unit 105 controls the feeding and transport of sheets. Specifically, the conveying unit 105 feeds a sheet from a designated unit among the internal storage units 109a and 109b, the external storage unit 109c, and the manual feed unit 109d to a transport path of the image forming apparatus 1. The fed sheet is transported to the registration rollers 110. The registration rollers 110 transport the sheet onto the transfer belt 111 at an appropriate timing so that the toner images on the photoconductors 102 are transferred to the sheet. As described above, the toner image is transferred to the sheet while the sheet is transported on the transfer belt 111. The fixing unit 104 fixes the toner image to the sheet by applying heat and pressure to the sheet to which the toner image has been transferred. After the toner image is fixed, the sheet is discharged to the outside of the image forming apparatus 1 by the discharge rollers 112. An optical sensor 113 is disposed opposite the transfer belt 111. The optical sensor 113 optically reads the test chart formed on the transfer belt 111 by the image forming unit 101. If an error in the image formation range is detected for the test chart read by the optical sensor 113, the image controller 710 (described later) performs control to compensate for the error when the subsequent job is executed.

[0015] Although an example has been described here in which a toner image is directly transferred from each photoconductor 102 to a sheet on the transfer belt 111, the toner image may also be indirectly transferred from each photoconductor 102 to a sheet via an intermediate transfer body. Also, although an example has been described here in which a color image is formed using toners of multiple colors, the technology according to the present disclosure is also applicable to an image forming apparatus that forms a monochrome image using toner of a single color.

[0016] 2. Exposure head configuration example 2A and 2B show the photoconductor 102 and the exposure head 106. The exposure head 106 is an exposure device having a light-emitting element array 201, a printed circuit board 202 on which the light-emitting element array 201 is mounted, a rod lens array 203, and a housing 204 that supports the printed circuit board 202 and the rod lens array 203. The photoconductor 102 has a cylindrical shape. The exposure head 106 is disposed so that its longitudinal direction is parallel to the axial direction D1 of the photoconductor 102 and the surface on which the rod lens array 203 is attached faces the surface of the photoconductor 102. While the photoconductor 102 rotates in the circumferential direction D2, the light-emitting element array 201 of the exposure head 106 emits light, and the rod lens array 203 forms an image of the light on the surface of the photoconductor 102.

[0017] 3A and 3B show an example of the configuration of the printed circuit board 202. Note that Fig. 3A shows the surface on which the connector 305 is mounted, and Fig. 3B shows the surface on which the light emitting element array 201 is mounted (the surface opposite to the surface on which the connector 305 is mounted).

[0018] In this embodiment, the light-emitting element array 201 includes a plurality of light-emitting elements arranged two-dimensionally. The light-emitting element array 201 includes, as a whole, X columns of light-emitting elements in the axial direction D1 of the photoconductor 102 and Y rows of light-emitting elements in the circumferential direction D2, where X and Y are integers equal to or greater than 2. In the example of FIG. 3B, the light-emitting element array 201 is divided into 20 light-emitting chips 400-1 to 400-20, each including a subset of the entire plurality of light-emitting elements. The light-emitting chips 400-1 to 400-20 are arranged in a staggered pattern along a reference line 310 parallel to the axial direction D1. The light-emitting chips 400-1 to 400-20 are also collectively referred to as light-emitting chips 400. Each light-emitting chip 400 includes a plurality of light-emitting elements arranged along a line parallel to at least the axial direction D1 of the photoconductor 102. As shown in FIG. 3B, the area occupied by all of the light-emitting elements of the 20 light-emitting chips 400 in the axial direction D1 is wider than the area occupied by the maximum width W0 of the input image data. Therefore, some light-emitting elements located at both ends of the axial direction D1 may not be used to expose the photosensitive element 102 unless an error in the image formation range is detected. Each light-emitting chip 400 on the printed circuit board 202 is connected to the image controller 710 (FIG. 6) via a connector 305. For convenience of explanation, the side with the smaller branch number of the light-emitting chips 400-1 to 400-20 aligned along the axial direction D1 may be referred to as the "left" and the side with the larger branch number as the "right." For example, the light-emitting chip 400-1 is the leftmost light-emitting chip 400, and the light-emitting chip 400-20 is the rightmost light-emitting chip.

[0019] 4 is a plan view showing a schematic configuration of one light-emitting chip 400. The plurality of light-emitting elements 602 of each light-emitting chip 400 are formed on a light-emitting substrate 402, which is, for example, a silicon substrate. A circuit unit 406 for driving the plurality of light-emitting elements 602 is provided on the light-emitting substrate 402. Signal lines for communicating with the image controller 710, power lines for connecting to a power source, and ground lines for connecting to ground are connected to the pads 408-1 to 408-9. The signal lines, power lines, and ground lines may be wires made of, for example, gold.

[0020] The number J (J=X / 20) of light-emitting elements 602 arranged in each row of one light-emitting chip 400 may be equal to, for example, 748 (J=748). Meanwhile, the number Y of light-emitting elements 602 arranged in each column of one light-emitting chip 400 may be equal to, for example, 4 (Y=4). That is, in an exemplary embodiment, each light-emitting chip 400 has 748 light-emitting elements 602 in the axial direction D1 and 4 light-emitting elements 602 in the circumferential direction D2, for a total of 2992 (=748×4) light-emitting elements 602. The spacing between the center points of adjacent light-emitting elements 602 in the circumferential direction D2 may be, for example, approximately 21.16 μm, which corresponds to a resolution of 1200 dpi. The spacing between the center points of adjacent light-emitting elements 602 in the axial direction D1 may also be approximately 21.16 μm, in which case the 748 light-emitting elements 602 occupy a length of approximately 15.8 mm in the axial direction D1. For ease of explanation, Figure 4 shows an example in which the light-emitting elements 602 in each light-emitting chip 400 are arranged in a complete grid pattern, but the Y light-emitting elements 602 in each row may also be arranged in a stepped or partially stepped pattern.

[0021] FIG. 5 is a cross-sectional view showing an example of the configuration of a light-emitting element 602. A plurality of lower electrodes 504 are formed on a light-emitting substrate 402, which is a silicon substrate. A gap of length d is provided between two adjacent lower electrodes 504. A light-emitting layer 506 is provided on the lower electrodes 504, and an upper electrode 508 is provided on the light-emitting layer 506. The upper electrode 508 is a common electrode for the plurality of lower electrodes 504. When a voltage is applied between the lower electrode 504 and the upper electrode 508, a current flows from the lower electrode 504 to the upper electrode 508, causing the light-emitting layer 506 to emit light. Therefore, one lower electrode 504 and partial regions of the light-emitting layer 506 and upper electrode 508 corresponding to the lower electrode 504 constitute one light-emitting element 602.

[0022] An organic EL (Electro Luminescence) film is used for the light-emitting layer 506. That is, the light-emitting elements 602 are organic EL elements. The upper electrode 508 is made of a transparent electrode such as indium tin oxide (ITO) so as to transmit the emission wavelength of the light-emitting layer 506. Note that in this embodiment, the entire upper electrode 508 transmits the emission wavelength of the light-emitting layer 506, but it is not necessary for the entire upper electrode 508 to transmit the emission wavelength. Specifically, it is sufficient that a partial region through which light from each light-emitting element 602 passes transmits the emission wavelength.

[0023] 5 shows that one continuous light-emitting layer 506 is formed, but multiple light-emitting layers 506 each having a width equivalent to the width W of the lower electrode 504 may be formed on the lower electrode 504. Also, in FIG. 5, the upper electrode 508 is formed as a single common electrode for the multiple lower electrodes 504, but multiple upper electrodes 508 each having a width equivalent to the width W of the lower electrode 504 may be formed corresponding to each lower electrode 504. Also, among the lower electrodes 504 of each light-emitting chip 400, a first plurality of lower electrodes 504 may be covered by a first light-emitting layer 506, and a second plurality of lower electrodes 504 may be covered by a second light-emitting layer 506. Similarly, among the lower electrodes 504 of each light-emitting chip 400, a first upper electrode 508 may be commonly formed corresponding to the first plurality of lower electrodes 504, and a second upper electrode 508 may be commonly formed corresponding to the second plurality of lower electrodes 504. In such a configuration, one lower electrode 504 and the region of the light-emitting layer 506 and upper electrode 508 corresponding to the lower electrode 504 constitute one light-emitting element 602 .

[0024] 6 is a block diagram showing an example of a control configuration for controlling the light-emitting chip 400. The image controller 710 is a control circuit that communicates with the printed circuit board 202 via a plurality of signal lines (wires). The image controller 710 has a first CPU 711, an image data generation unit 713, a register access unit 714, and a data communication unit 715. The data communication unit 715 terminates the signal line between the image controller 710 and the printed circuit board 202. The n-th light-emitting chip 400-n (n is an integer from 1 to 20) on the printed circuit board 202 is connected to the data communication unit 715 via a pair of a data signal line and a control signal line. The data signal line carries image data DATAn intended for the light-emitting chip 400-n. The control signal line carries control data WRITEn to be written to a register of the light-emitting chip 400-n.

[0025] A clock signal line, a synchronization signal line, and an enable signal line are further provided between the data communication unit 715 and each light-emitting chip 400-n. The clock signal line carries a clock signal CLK for identifying the timing of each bit of the image data DATAn and the control data WRITEn. The data communication unit 715 generates the clock signal CLK based on the reference clock signal R_CLK generated by the clock generation unit 701, and outputs the generated clock signal CLK to the clock signal line. The synchronization signal line carries a first synchronization signal SYNC, which will be described later. The enable signal line carries an enable signal EN, which will be described later.

[0026] The page storage unit 702 is a storage device that temporarily stores, on a page-by-page basis, PDL (Page Description Language) data representing each page of an input image of a print job received from the reading unit 100 or an external device. For example, the page storage unit 702 may be a large-capacity memory or an HDD (Hard Disk Drive).

[0027] The first CPU 711 is a control unit that controls image processing in the image controller 710 and communication with the printed circuit board 202. The second CPU 720 is a control unit that controls image formation operations in the image forming unit 101. The image data generation unit 713 performs image processing on the PDL data of each page stored in the page storage unit 702 to generate binary bitmap image data used for controlling the light emission of the multiple light-emitting elements 602 of the light-emitting chips 400 on the printed circuit board 202. This image processing may include, for example, raster conversion, tone correction, color conversion, and halftone processing. The image data generation unit 713 outputs the generated image data to the data communication unit 715 as input image data. The register access unit 714 obtains control data to be written to the registers in each light-emitting chip 400 from the first CPU 711 and outputs the control data to the data communication unit 715.

[0028] Image forming apparatus 1 further includes a main processor (e.g., CPU) 700 that controls the overall operation of image forming apparatus 1. When a print job starts to be executed, main processor 700 outputs a first trigger signal TOP indicating the operation start timing to image forming unit 103, fixing unit 104, and conveying unit 105. In response to the input of first trigger signal TOP, fixing unit 104 starts temperature control of the fixing roller. In response to the input of first trigger signal TOP, conveying unit 105 starts feeding and conveying the sheet.

[0029] The data communication unit 715 starts operation in response to input of the first trigger signal TOP, and outputs a second trigger signal P_TOP indicating the start timing of transmission of input image data for each page, and a second synchronization signal P_SYNC indicating synchronization timing for each line, to the second CPU 720. The second CPU 720 starts operation of each unit of the image forming unit 101 in response to input of the second trigger signal P_TOP. For example, based on the second synchronization signal P_SYNC, the second CPU 720 synchronously controls the rotation of the photoconductor 102 and the conveyance of the sheet by the transfer belt 111, thereby transferring the toner image on the surface of the photoconductor 102 to a specified image forming position on the sheet.

[0030] FIG. 7 is a signal chart related to writing control data to a register of the light-emitting chip 400. The enable signal EN indicates a high level on the enable signal line while the control data is being transmitted. The data communication unit 715 transmits a start bit to the control signal line in synchronization with the rising edge of the enable signal. Next, the data communication unit 715 transmits a write identification bit indicating a write operation, and then transmits the address of the register to which the control data should be written (4 bits in this example) and the control data (8 bits in this example). When writing to the register, the data communication unit 715 sets the frequency of the clock signal CLK to, for example, 3 MHz.

[0031] FIG. 8 is a signal chart related to the transmission of image data to each light-emitting chip 400. The data communication unit 715 periodically transmits a first synchronization signal SYNC, which indicates the exposure timing of the photoconductor 102 for each line of image data, to a synchronization signal line. If the peripheral speed of the photoconductor 102 is 200 mm / s and the peripheral resolution is 1200 dpi (approximately 21.16 μm), the first synchronization signal SYNC becomes a pulse signal that indicates a high level with a period of approximately 105.8 μs. The data communication unit 715 transmits image data DATA1 to DATA20 in parallel to 20 data signal lines in synchronization with the rising edge of the first synchronization signal SYNC. In this embodiment, each light-emitting chip 400 has 2992 light-emitting elements 602, and therefore, it is necessary to transmit bits indicating the light emission or non-emission of each of the total 2992 light-emitting elements 602 to each light-emitting chip 400 within a period of approximately 105.8 μs. 8, in this example, when transmitting image data, the data communication unit 715 sets the frequency of the clock signal CLK to 30 MHz. In this specification, the image data of the i-th line transmitted to the light-emitting chip 400-n is referred to as Li-D n When referring to each bit in the image data, the bit index (i.e., the number of the light-emitting element) is further enclosed in square brackets. However, in Fig. 8, the line number Li is omitted within the frame of each bit.

[0032] FIG. 9 is a block diagram showing an example of a detailed circuit configuration of one light-emitting chip 400 (the n-th light-emitting chip 400-n). The light-emitting chip 400 has nine pads 408-1 to 408-9, a circuit unit 406, and a light-emitting element array 410. The pads 408-1 and 408-2 are connected to a power supply voltage VCC via a power supply line. Power is supplied from this power supply voltage VCC to each circuit in the circuit unit 406 of the light-emitting chip 400. The pads 408-3 and 408-4 are connected to ground via a ground line. Each circuit in the circuit unit 406 and the upper electrode 508 are connected to ground via the pads 408-3 and 408-4. A clock signal line is connected to the register 1002, the transfer unit 1003, and the latch units 1004-001 to 1004-748 via the pad 408-5. The synchronization signal line and the data signal line are connected to the transfer unit 1003 via pads 408-6 and 408-7, respectively. The enable signal line and the control signal line are connected to the register 1002 via pads 408-8 and 408-9, respectively. Control data indicating the magnitude of the drive current to be supplied to each light-emitting element 602, for example, is written in the register 1002.

[0033] The transfer unit 1003 receives input image data DATAn, which includes a series of pixel values each indicating whether one light-emitting element 602 emits light, in synchronization with the clock signal CLK, starting from the rising edge of the first synchronization signal SYNC. The transfer unit 1003 performs serial-to-parallel conversion on the series of pixel values received serially in units of Y pixel values (e.g., Y=4). For example, the transfer unit 1003 has four cascade-connected D flip-flops, which parallelize pixel values DATA-1, DATA-2, DATA-3, and DATA-4 input over four clocks and output the parallelized pixel values to the latch units 1004-001 to 1004-748. The transfer unit 1003 also has four D flip-flops for delaying the first synchronization signal SYNC, and outputs a first latch signal LAT1 to the latch unit 1004-001 four clocks after the first synchronization signal SYNC is input.

[0034] The kth latch unit 1004-k (k is an integer from 1 to 748) holds, in a latch circuit, four pixel values DATA-1, DATA-2, DATA-3, and DATA-4 input from the transfer unit 1003 simultaneously with the input of the kth latch signal. Except for the final latch unit 1004-748, the kth latch unit 1004-k delays the kth latch signal LATk by four clocks and outputs the (k+1)th latch signal LAT(k+1) to the latch unit 1004-(k+1). The kth latch unit 1004-k continues to output, to the current driver 1100, a drive signal based on the four pixel values held in the latch circuit during the signal period of the kth latch signal. For example, there is a four-clock delay between the timing at which the first latch signal is input to the latch unit 1004-1 and the timing at which the second latch signal is input to the latch unit 1004-2. Therefore, the latch unit 1004-1 outputs drive signals based on the first, second, third, and fourth pixel values to the current driver 1100, while the latch unit 1004-2 outputs drive signals based on the fifth, sixth, seventh, and eighth pixel values to the current driver 1100. Generally speaking, the latch unit 1004-k outputs drive signals based on the (4k-3), (4k-2), (4k-1), and (4k)th pixel values to the current driver 1100. Therefore, in the embodiment shown in FIG. 9 , 748 latch units 1004-001 to 1004-748 output 2992 drive signals for controlling the driving of 2992 (=748×4) light-emitting elements 602 in approximately parallel to the current driver 1100. Each drive signal is a binary signal indicating a high level or a low level.

[0035] The current driver 1100 has 2992 light-emitting drive circuits corresponding to the 2992 light-emitting elements 602 in the light-emitting element array 410. Each light-emitting drive circuit passes a drive current of a magnitude indicated by the control data in the register 1002 through the light-emitting layer 506 of the corresponding light-emitting element 602 while the corresponding drive signal indicates a high level, which means that light is on. This causes the light-emitting elements 602 to emit light at a target intensity. Note that the control data may indicate one individual current value for each light-emitting element 602, one current value for each group of light-emitting elements 602, or one current value common to all light-emitting elements 602.

[0036] FIG. 10 shows an example of a partial configuration of a current driver 1100 corresponding to one light-emitting element 602. Referring to FIG. 10, the current driver 1100 includes a digital-to-analog converter (DAC) 1101, a first transistor 1102, a second transistor 1103, and a switching circuit 1104. The DAC 1101 performs digital-to-analog conversion on the digital value (current setting value) of the light emission intensity stored in the register 1102 and outputs a corresponding analog signal to the gate of the first transistor 1102. The first transistor 1102 is a current amplifier circuit and may be, for example, a P-channel MOSFET. The source of the first transistor 1102 is connected to a power supply voltage VCC. The drain of the first transistor 1102 is connected to the source of the second transistor 1103. The first transistor 1102 draws from its source a current whose magnitude depends on the amount of current of the analog signal input to its gate and outputs the current to its drain. The second transistor 1103 is a switching circuit and may be, for example, a P-channel MOSFET. During execution of a normal print job, a drive signal (indicating whether light emission is on or off) from the latch unit 1004 is input to the gate of the second transistor 1103 via the switching circuit 1104. The drain of the second transistor 1103 is connected to the lower electrode 504 of the light-emitting element 602. When the drive signal input to the gate indicates that light emission is on (for example, high level), the second transistor 1103 outputs a current input to the source to the light-emitting element 602 via the drain. Therefore, during the period when the drive signal indicates that light emission is on, a current of a magnitude corresponding to the parameter value stored in the register 1002 is supplied to the light-emitting element 602, causing each light-emitting element 602 to emit light at the emission intensity specified by the control data.

[0037] The switching circuit 1104 is a circuit for switching between the normal mode and the test mode. In the normal mode, the switching circuit 1104 applies a drive signal to the gate of the second transistor 1103, whereas in the test mode, the switching circuit 1104 applies a test mode signal that is always at a high level to the gate of the second transistor 1103. Thus, in the test mode, the gate of the second transistor 1103 is forcibly maintained in an on state. The mode of the switching circuit 1104 can be set, for example, by control data written to the register 1002. The test mode can be used, for example, for purposes such as testing the light-emitting state of a light-emitting element during device manufacturing.

[0038] 10 shows only a portion corresponding to one light emitting element 602, the current driving unit 1100 may actually have the same number of similar circuits as the number of light emitting elements 602 (for example, 748×4=2992). However, the DAC 1101 may be shared across multiple light emitting elements 602.

[0039] FIG. 11 is a signal chart relating to the output timing of the drive signals from each latch section 1004 to the current driver section 1100. In FIG.

[0040] The top row of FIG. 11 shows the second synchronization signal P_SYNC output from the data communication unit 715 to the second CPU 720. As described above, the period of the second synchronization signal P_SYNC may be approximately 105.8 μs. The second row shows the first synchronization signal SYNC output from the data communication unit 715 to each light-emitting chip 400. The first synchronization signal SYNC is synchronized with the second synchronization signal P_SYNC, and the period of the first synchronization signal SYNC is the same as the period of the second synchronization signal P_SYNC.

[0041] The third row shows the first latched signal LAT1 input to the first latch unit 1004-001. The period of the first latched signal LAT1 is the same as the period of the first synchronization signal SYNC, but the rising timing of the first latched signal LAT1 is delayed by four clocks from the first synchronization signal SYNC. The fourth row shows the second latched signal LAT2 input to the second latch unit 1004-002. The period of the second latched signal LAT2 is the same as the period of the first synchronization signal SYNC, but the rising timing of the second latched signal LAT2 is delayed by four clocks from the first latched signal LAT1. Generally speaking, the rising timing of the k-th latched signal LATk is delayed by four clocks from the (k-1)-th latched signal LAT(k-1).

[0042] The transfer unit 1003 of the light-emitting chip 400-1 sequentially receives the image data L1-D1[1] to L1-D1

[2992] in the first line period. The latch unit 1004-001 outputs four drive signals based on the image data L1-D1[1] to L1-D1[4] to the signal lines PON1-1 to PON1-4 in parallel from the rising edge of the first latch signal LAT1. The output of these drive signals is maintained until the next rising edge of the first latch signal LAT1 (i.e., for the duration of one line period). For example, when the image data L1-D1[1] indicates that light emission is on, the first light-emitting element 602 of the light-emitting chip 400-1 is maintained in an emitting state throughout the first line period. When the image data L1-D1[1] indicates that light emission is off, the first light-emitting element 602 of the light-emitting chip 400-1 is maintained in a non-emitting state throughout the first line period. The latch unit 1004-002 outputs four drive signals based on the image data L1-D1[5] to L1-D1[8] in parallel to the signal lines PON2-1 to PON2-4 from the rising edge of the second latch signal LAT2. The output of these drive signals is maintained until the next rising edge of the second latch signal LAT2. The same applies to the output of drive signals from the latch units 1004-003 to 1004-748.

[0043] Next, the transfer unit 1003 sequentially receives image data L2-D1[1] to L2-D1

[2992] in the second line cycle. The latch unit 1004-001 outputs four drive signals based on image data L2-D1[1] to L2-D1[4] to signal lines PON1-1 to PON1-4 in parallel, starting from the second rising edge of the first latch signal LAT1. The output of these drive signals is maintained until the next rising edge of the first latch signal LAT1. The latch unit 1004-002 outputs four drive signals based on image data L2-D1[5] to L2-D1[8] to signal lines PON2-1 to PON2-4 in parallel, starting from the second rising edge of the second latch signal LAT2. The output of these drive signals is maintained until the next rising edge of the second latch signal LAT2. The same applies to the output of drive signals from latch units 1004-003 to 1004-748.

[0044] In this way, each light-emitting chip 400-n maintains the light-emitting element 602 that is indicated to be emitting light by the data signal (image data Li-Dn) input in that line period in an emitting state throughout each line period indicated by the first synchronization signal SYNC.

[0045] 3. Variable process speed <3-1. Related Issues> However, when an image forming apparatus uses a variable process speed depending on the settings of a print job, a problem occurs in the configuration of the exposure head 106 described above. For example, there are various types of sheets used for printing, and the basis weight can differ depending on the type of sheet. As an example, the basis weight of plain paper is 60 to 105 g / m 2 ], and the basis weight of the cardboard is 150 to 300 [g / m 2] (however, these basis weight ranges do not limit this embodiment). The amount of heat required to fix a toner image to a sheet increases as the basis weight of the sheet increases. This is because basis weight has a positive correlation with heat capacity, and the greater the heat capacity, the smaller the temperature rise per unit amount of heat received from the fixing roller. Therefore, when printing on a sheet with a larger basis weight, it is possible to slow down the process speed compared to when printing on a sheet with a smaller basis weight, in order to ensure that the fixing unit 104 has time to apply a sufficient amount of heat to the sheet.

[0046] Specifically, in this embodiment, the main processor 700 functions as a setting unit that sets the rotation speed (i.e., process speed) of the photoconductor 102 depending on the type of sheet set for a print job. For example, the main processor 700 sets the rotation speed of the photoconductor 102 to a first rotation speed P1 when plain paper is used, and sets the rotation speed of the photoconductor 102 to a second rotation speed P2 when thick paper is used, where P2 is 1 / N times P1 and N is greater than 1. In this way, by setting the process speed slower when a sheet with a heavy basis weight is used, a sufficient amount of heat can be applied to the toner image to melt the toner and reliably fix the toner to the sheet.

[0047] However, since the process speed is generally inversely proportional to the line period, the slower the process speed is set, the longer the line period becomes. And, if the light emitting element 602 is kept lit throughout one line period, as in the configuration of the exposure head 106 described above, the longer the line period may result in overexposure of the photoconductor.

[0048] This overexposure will be explained using Fig. 12, taking as an example the case where the process speed ratio N is equal to 2. Fig. 12 is a signal chart similar to that shown in Fig. 11, except that the process speed in Fig. 12 is set to 1 / 2 the speed in the example of Fig. 11.

[0049] 12, the period of the second synchronization signal P_SYNC is approximately 211.6 (=105.8×2) μs because the process speed is set to 1 / 2. The first synchronization signal SYNC shown in the second row has the same line period as the period of the second synchronization signal P_SYNC.

[0050] The cycle of the first latched signal LAT1 shown in the third row is the same as the cycle of the first synchronization signal SYNC, but the rising timing of the first latched signal LAT1 is delayed by four clocks from the first synchronization signal SYNC. The cycle of the second latched signal LAT2 shown in the fourth row is the same as the cycle of the first synchronization signal SYNC, but the rising timing of the second latched signal LAT2 is delayed by four clocks from the first latched signal LAT1.

[0051] The transfer unit 1003 of the light-emitting chip 400-1 sequentially receives the image data L1-D1[1] to L1-D1

[2992] in the first line period. The latch unit 1004-001 outputs four drive signals based on the image data L1-D1[1] to L1-D1[4] to the signal lines PON1-1 to PON1-4 in parallel from the rising edge of the first latch signal LAT1. The output of these drive signals is maintained until the next rising edge of the first latch signal LAT1. For example, when the image data L1-D1[1] indicates that light emission is on, the first light-emitting element 602 of the light-emitting chip 400-1 is maintained in an emitting state throughout the first line period, which lasts approximately 211.6 μs. The same applies to the other light-emitting elements 602 of the light-emitting chip 400-1 and the light-emitting elements 602 of the other light-emitting chips 400.

[0052] That is, when the line period indicated by the first synchronization signal SYNC is doubled, the length of time that the corresponding light-emitting element 602 is maintained in an emitting state based on one pixel value is doubled, which means that the exposure of the corresponding dot on the surface of the photoconductor 102 is doubled. The increase in the exposure of the photoconductor 102 results in a corresponding increase in the amount of charge accumulated in the electrostatic latent image, resulting in an excessively high density of the developed toner image. Additionally, an excessive increase in the amount of charge in the electrostatic latent image may have the adverse effect of accelerating deterioration of the photoconductor 102.

[0053] By making the light emitting element 602 emit light only during a portion of the line period that becomes longer in response to a change in the process speed setting, it is possible to prevent overexposure of the photosensitive element 102. However, such synchronous control complicates the circuitry of each light emitting chip 400, which leads to increased costs in manufacturing and developing the image forming apparatus 1 and the exposure head 106.

[0054] <3-2. Preventing overexposure> In this embodiment, the second synchronization signal for driving and controlling the image forming unit 101 is set to indicate a line period for achieving a desired process speed. On the other hand, in order to prevent the above-mentioned overexposure while avoiding a complicated circuit configuration, the first synchronization signal for controlling the light emission of each light-emitting chip is set to indicate a constant line period independent of the process speed. The process speed may be rephrased as the rotation speed of the photoconductor. More specifically, the two synchronization signals may indicate the following line periods: ·Second synchronization signal P_SYNC: When the photoconductor 102 rotates at a first rotation speed, it indicates a first line period. When the photoconductor 102 rotates at a second rotation speed that is 1 / N times the first rotation speed, the second line period is N times the first line period (N is an integer, 1 <N) First sync signal SYNC: - Regardless of the rotation speed of the photosensitive member 102, the first line period is shown.

[0055] In addition, when the photoconductor 102 rotates at the second rotation speed, the data communication unit 715: In one line period among N line periods indicated by the first synchronization signal SYNC, a data signal for one line is transmitted to the light-emitting chips 400-1 to 400-20. In the remaining line periods of the N line periods, a non-light emitting signal for preventing all the light emitting elements 602 from emitting light is transmitted to the light emitting chips 400-1 to 400-20.

[0056] The above-described configuration can avoid the need for a complicated circuit configuration for the light-emitting chip due to variable process speed settings, thereby facilitating device miniaturization. Furthermore, excessive exposure of the photosensitive drum is prevented, providing high-quality printed images and suppressing deterioration of the photosensitive drum. An example of the detailed configuration of the data communication unit 715 for realizing this embodiment will be specifically described in the next section.

[0057] <4. Example of data communication section configuration> 13 is a block diagram showing an example of a detailed configuration of the data communication unit 715. Referring to FIG. 13, the data communication unit 715 includes a synchronization signal generation unit 731, a control data transmission unit 732, a data buffer 733, a signal selection unit 734, and an image data transmission unit 735.

[0058] <4-1.Details of each part> The synchronization signal generation unit 731 generates a clock signal CLK based on the reference clock signal R_CLK input from the clock generation unit 701. The synchronization signal generation unit 731 may variably set the frequency of the clock signal CLK under the control of the first CPU 711. For example, as described above, the frequency of the clock signal CLK may be 3 MHz when transmitting control data to the light-emitting chip 400, and the frequency of the clock signal CLK may be 30 MHz when transmitting image data to the light-emitting chip 400. The synchronization signal generation unit 731 outputs the clock signal CLK to the control data transmission unit 732, the image data transmission unit 735, and the printed circuit board 202.

[0059] Furthermore, when the synchronization signal generation unit 731 receives a first trigger signal TOP from the main processor 700, it outputs a second trigger signal P_TOP to the second CPU 720, indicating the timing to start transmitting input image data, and also starts providing a synchronization signal. Specifically, the synchronization signal generation unit 731 generates a second synchronization signal P_SYNC, which indicates a period corresponding to the rotation speed of the photoconductor 102, which is set according to the type of sheet used in the print job. The period indicated by the second synchronization signal P_SYNC is equal to the length of time required for the photoconductor 102 to rotate by one pixel. In addition, the synchronization signal generation unit 731 generates a first synchronization signal SYNC, which is synchronized with the second synchronization signal P_SYNC but indicates a constant line period independent of the rotation speed of the photoconductor 102.

[0060] As an example, assume that plain paper is selected for the first print job. In this case, the rotational speed of the photoconductor 102 is set to a first rotational speed P1. The line period of the second synchronization signal P_SYNC generated by the synchronization signal generator 731 is equal to, for example, 105.8 [μs], and the line period of the first synchronization signal SYNC is also equal to 105.8 [μs]. As another example, assume that thick paper, which has a basis weight greater than that of plain paper, is selected for the second print job. In this case, the rotational speed of the photoconductor 102 is set to a second rotational speed P2, which is half the first rotational speed P1. The line period of the second synchronization signal P_SYNC generated by the synchronization signal generator 731 is equal to, for example, 211.6 [μs]. Meanwhile, the line period of the first synchronization signal SYNC is equal to 105.8 [μs], the same as the first print job. When the resolution in the sub-scanning direction is 1200 dpi (approximately 21.16 μm), the first rotation speed P1 may correspond to a peripheral speed of the photosensitive member 102 of 200 mm / s, and the second rotation speed P2 may correspond to a peripheral speed of the photosensitive member 102 of 100 mm / s.

[0061] The second synchronization signal P_SYNC is output to the second CPU 720 and is used to control the rotation of the photosensitive member 102 and the transport of the sheet by the transfer belt 111. The first synchronization signal SYNC is output to the signal selection unit 734 and the image data transmission unit 735 and is used to control the transmission of data signals to the light-emitting chips 400 for each line.

[0062] When control data is written to the register 1002 of each light-emitting chip 400 on the printed circuit board 202, the control data transmission unit 732 transmits a control signal for writing the control data to the printed circuit board 202 in response to an instruction from the register access unit 714. Here, the instruction from the register access unit 714 is a chip designation signal CHIP_E, an address designation signal ADD, and control data D CTRL For example, the chip designation signal CHIP_E is a 5-bit signal that designates the light-emitting chip 400 to which data is to be written. The address designation signal ADD is a 4-bit signal that designates the address of the destination. CTRL is 8-bit data to be written to a specified address of a specified light-emitting chip 400. For example, when the chip specification signal CHIP_E indicates "1", the control data transmission unit 732 transmits the specified address and control data to the control signal line for the light-emitting chip 400-1 in the signal format described with reference to Fig. 7. Transmission of control data to the light-emitting chips 400-2 to 400-20 is performed in a similar manner.

[0063] The data buffer 733 stores the bitmap image data B generated by the image data generating unit 713. DATA The data buffer 733 is a line memory (for example, an SRAM) capable of buffering image data for two lines out of the total image data. Input and output of image data via the data buffer 733 will be described in detail later.

[0064] The signal selection unit 734 selects the image data M input from the data buffer 733 for each line period indicated by the first synchronization signal SYNC. DATAand a non-light-emitting signal to the image data transmission unit 735. The data signal here is made up of a series of bits that make up the image data DATA1 to DATA20 described with reference to Fig. 8, and for example, "1" indicates that the corresponding light-emitting element 602 emits light, and "0" indicates that the corresponding light-emitting element 602 does not emit light. On the other hand, the non-light-emitting signal is a signal that prevents the corresponding light-emitting element 602 from emitting light, and is fixed to "0" regardless of the pixel position.

[0065] The first CPU 711 receives the signal C output from the signal selection unit 734 to the image data transmission unit 735. DATA The signal selection unit 734 controls the selection of the data signal based on the input image data from the data buffer 733 for each line period indicated by the first synchronization signal SYNC, in accordance with the setting of the rotational speed of the photoconductor 102. For example, when the photoconductor 102 rotates at the first rotational speed, the signal selection unit 734 selects the data signal based on the input image data from the data buffer 733 for all line periods indicated by the first synchronization signal SYNC. On the other hand, when the photoconductor 102 rotates at a second rotational speed that is 1 / N times the first rotational speed, the signal selection unit 734 selects the data signal based on the input image data for one line period out of N line periods, and selects the non-light-emitting signal for the remaining line periods.

[0066] The image data transmission unit 735 transmits a first synchronization signal SYNC to the printed circuit board 202 via a synchronization signal line. Furthermore, the image data transmission unit 735 transmits one line of data signals used for controlling light emission of the plurality of light-emitting elements 602 in parallel to the light-emitting chips 400-1 to 400-20 via 20 data signal lines during a line period indicated by the first synchronization signal SYNC. The image data transmission unit 735 may have an internal data buffer for serial-to-parallel conversion.

[0067] <4-2. Example of data processing timing> (1) At normal process speed 14 is a signal chart showing an example of the timing of processing image data in the data communication unit 715. Here, the process speed is set to a normal value, that is, the rotation speed of the photoconductor 102 is set to the first rotation speed P1 (for example, printing on plain paper).

[0068] 14 is a pulse signal input from the main processor 700 to the synchronization signal generating unit 731, and indicates the operation start timing of the image forming unit 103. The pulse width may be one cycle of the clock signal CLK. By starting the operation of the fixing unit 104 and the conveying unit 105 in accordance with the operation start timing indicated by this first trigger signal TOP, the image formation position in the sub-scanning direction is aligned with an appropriate position on the sheet.

[0069] The second trigger signal P_TOP in the second row is a pulse signal output from the synchronization signal generating unit 731 to the second CPU 720, and indicates the operation start timing of each unit in the image forming unit 101. The pulse width may be one cycle of the clock signal CLK. The photoconductor 102 and the transfer belt 111 start operating in accordance with the operation start timing indicated by this second trigger signal P_TOP.

[0070] The roles of the second synchronization signal P_SYNC in the third row and the first synchronization signal SYNC in the fourth row are as explained above. Here, these two synchronization signals have the same line period (105.8 μs) and are at a high level at the beginning of the transmission timing of each line of image data. The second trigger signal P_TOP, the first synchronization signal SYNC, and the second synchronization signal P_SYNC are synchronized with each other, so that the image formation position in the main scanning direction is aligned to the appropriate position on the sheet.

[0071] The fifth row shows image data B input from the image data generating unit 713 to the data buffer 733. DATAThe sixth and seventh rows show the data stored in the first line area (MEM1) and the second line area (MEM2) of the data buffer 733, respectively. In the first line period of each page, the image data of the first line L1-D1, ..., L1-D 20 are stored in the first line area of the data buffer 733. In the second line period of each page, the image data of the second line L2-D1, ..., L2-D 20 are stored in the second line area of the data buffer 733. In the third line period of each page, the image data of the third line L3-D1, ..., L3-D 20 are stored (overwritten) in the first line area of the data buffer 733. In the fourth line period of each page, the image data of the fourth line L4-D1, ..., L4-D 20 is stored (overwritten) in the second line area of the data buffer 733. Similarly, in the fifth and subsequent line periods, image data of odd-numbered lines and image data of even-numbered lines are stored alternately in the first and second line areas of the data buffer 733.

[0072] The eighth row shows the data signal C output from the signal selection unit 734 to the image data transmission unit 735. DATA In the scenario of FIG. 14, since the rotation speed of the photoconductor 102 is the first rotation speed, the signal selection unit 734 selects a data signal based on the input image data from the data buffer 733 in every line period indicated by the first synchronization signal SYNC. Therefore, the signal selection unit 734 selects the image data L1-D1, ..., L1-D of the first line in the second line period. 20 to the image data transmission unit 735. Next, the signal selection unit 734 outputs the data signal based on the image data L2-D1, ..., L2-D of the second line in the third line period. 20 to the image data transmission unit 735. Next, the signal selection unit 734 outputs the data signal based on the image data L3-D1, ..., L3-D of the third line in the fourth line period. 20to the image data transmission unit 735. Similarly, in the fifth and subsequent line periods, the data signals of the fourth and subsequent lines are output to the image data transmission unit 735 in order.

[0073] The ninth and tenth rows show data signals DATA1 to DATA20 transmitted from the image data transmission unit 735 to the printed circuit board 202. In each of the third and subsequent line periods, the image data transmission unit 735 transmits in parallel to the printed circuit board 202 the data signals for the 20 light-emitting chips 400 that were received from the signal selection unit 734 in the previous line period and buffered. For example, in the third line period, the image data L1-D1, ..., L1-D 20 In the fourth line period, the data signals based on the second line L2-D1,...,L2-D 20 The data signals based on the above are transmitted in parallel.

[0074] (2) 1 / N process speed The signal chart in Figure 14 shows the processing timing when the process speed is set to the normal value, and no non-light emitting signals appear in the diagram. In contrast, when the process speed is set to 1 / N times the normal value, non-light emitting signals are inserted between normal data signals.

[0075] 15 is a signal chart showing another example of the timing of processing image data in the data communication unit 715. Here, the process speed is set to half the normal value, that is, the rotation speed of the photoconductor 102 is set to the second rotation speed P2 (=P1 / 2) (for example, printing on cardboard).

[0076] The first trigger signal TOP in the top row of FIG. 15 and the second trigger signal P_TOP in the second row are the same as those in the example of FIG.

[0077] The second synchronization signal P_SYNC in the third row has a period (211.6 μs) that is twice as long as that in the example of FIG. 14 because the rotation speed of the photoconductor 102 is the second rotation speed P2. On the other hand, the first synchronization signal SYNC in the fourth row has the same period (105.8 μs) as that in the example of FIG. 14, regardless of the rotation speed of the photoconductor 102. In the following description, the line period refers to the period indicated by the first synchronization signal SYNC.

[0078] 5th row image data B DATA As can be seen from the processing timing, the image data is stored from the image data generator 713 to the data buffer 733 in the cycle indicated by the second synchronization signal P_SYNC. That is, in the first line cycle indicated by the first synchronization signal SYNC, the image data for the first line L1-D1, ..., L1-D 20 is stored in the first line area (MEM1) of the data buffer 733. In the second line period, no new image data is stored in the data buffer 733. In the third line period, in response to the second rising edge of the second synchronization signal P_SYNC, the image data L2-D1, ..., L2-D 20 is stored in the second line area (MEM2) of the data buffer 733. No new image data is stored in the data buffer 733 in the fourth line period.

[0079] Focusing on the eighth row, here, the rotation speed of the photoconductor 102 is the second rotation speed, which is half the first rotation speed. Therefore, the signal selection unit 734 selects a data signal based on the input image data in one of the two line periods, and selects a non-light-emitting signal in the remaining line period. Therefore, the signal selection unit 734 selects the image data L1-D1, ..., L1-D for the first line in the second line period. 20to the image data transmission unit 735. Next, in the third line cycle, the signal selection unit 734 selects non-light-emitting signals for all the light-emitting elements 602 of all the light-emitting chips 400, and outputs these non-light-emitting signals (a sequence in which bits "0" are lined up) to the image data transmission unit 735. Similarly, in the fourth and subsequent line cycles, the signal selection unit 734 outputs data signals based on the input image data to the image data transmission unit 735 in even-numbered line cycles and non-light-emitting signals in odd-numbered line cycles.

[0080] Focusing on the ninth and tenth rows, the image data transmission unit 735 transmits the image data L1-D1, ..., L1-D of the first line in the third line period. 20 The image data transmission unit 735 transmits data signals based on the input image data to the printed circuit board 202 in parallel to the 20 light-emitting chips 400. Next, the image data transmission unit 735 transmits non-light-emitting signals to the 20 light-emitting chips 400 in parallel to the printed circuit board 202 in the fourth line period. Similarly, in the fifth and subsequent line periods, the signal selection unit 734 transmits data signals based on the input image data to the printed circuit board 202 in odd-numbered line periods and non-light-emitting signals to the printed circuit board 202 in even-numbered line periods. However, the image data transmission unit 735 simply repeats the operation of parallelizing the input signals from the signal selection unit 734 and transmitting them to the printed circuit board 202 for each line period, and does not need to be aware of whether the transmitted signals are signals based on the input image data or dummy non-light-emitting signals. Similarly, the light-emitting chips 400-1 to 400-20 on the receiving-side printed circuit board 202 simply drive the corresponding light-emitting elements 602 in accordance with the values of the respective signals, without being aware of whether the received signals are signals based on the input image data or dummy non-light-emitting signals.

[0081] FIG. 16 is a signal chart relating to the output timing of drive signals from each latch unit to the current driver, corresponding to the example of FIG.

[0082] 12, the period of the second synchronization signal P_SYNC shown in the top row of Fig. 16 is approximately 211.6 (=105.8 × 2) μs because the process speed is set to 1 / 2. The period of the first synchronization signal SYNC shown in the second row is a constant line period that does not depend on the rotation speed of the photoconductor 102, i.e., approximately 105.8 μs.

[0083] The cycle of the first latched signal LAT1 shown in the third row is the same as the cycle of the first synchronization signal SYNC, but the rising timing of the first latched signal LAT1 is delayed by four clocks from the first synchronization signal SYNC. The cycle of the second latched signal LAT2 shown in the fourth row is the same as the cycle of the first synchronization signal SYNC, but the rising timing of the second latched signal LAT2 is delayed by four clocks from the first latched signal LAT1.

[0084] The transfer unit 1003 of the light-emitting chip 400-1 sequentially receives the image data L1-D1[1] to L1-D1

[2992] in the first line period. The latch unit 1004-001 outputs four drive signals based on the image data L1-D1[1] to L1-D1[4] to the signal lines PON1-1 to PON1-4 in parallel from the rising edge of the first latch signal LAT1. The output of these drive signals is maintained until the next rising edge of the first latch signal LAT1 (i.e., for the duration of one line period). The latch unit 1004-002 outputs four drive signals based on the image data L1-D1[5] to L1-D1[8] to the signal lines PON2-1 to PON2-4 from the rising edge of the second latch signal LAT2. The output of these drive signals is maintained until the next rising edge of the second latch signal LAT2. The same applies to the output of drive signals from latch units 1004-003 to 1004-748.

[0085] Next, the transfer unit 1003 sequentially receives 2992 non-light-emitting signals in the second line period. The latch unit 1004-001 outputs four drive signals corresponding to the non-light-emitting signals in parallel to the signal lines PON1-1 to PON1-4 from the second rising edge of the first latch signal LAT1. The latch unit 1004-002 outputs four drive signals corresponding to the non-light-emitting signals in parallel to the signal lines PON2-1 to PON2-4 from the second rising edge of the second latch signal LAT2. The same applies to the output of drive signals from the latch units 1004-003 to 1004-748.

[0086] Next, the transfer unit 1003 sequentially receives image data L2-D1[1] to L2-D1

[2992] in the third line cycle. The latch unit 1004-001 outputs four drive signals based on image data L2-D1[1] to L2-D1[4] in parallel to signal lines PON1-1 to PON1-4, starting from the third rising edge of the first latch signal LAT1. The latch unit 1004-002 outputs four drive signals based on image data L2-D1[5] to L2-D1[8] in parallel to signal lines PON2-1 to PON2-4, starting from the third rising edge of the second latch signal LAT2. The same applies to the output of drive signals from the latch units 1004-003 to 1004-748.

[0087] 16, each light-emitting chip 400-n maintains the light-emitting element 602 that is indicated by the input data signal to be emitting light in an emitting state throughout one of two line periods, and does not emit any light throughout the remaining line period. This avoids the excessive exposure described with reference to FIG. 12. As a result, images can be formed with stable quality on various types of sheets, regardless of the process speed setting.

[0088] The ratio of change in process speed is not limited to the above-mentioned example of N = 2. Below, an example will be described in which excessive exposure is prevented using the same principle when the process speed is set to 1 / 3 of the normal value (i.e., N = 3).

[0089] 17 is a signal chart showing another example of the timing of processing image data in the data communication unit 715. Here, the process speed is set to 1 / 3 of the normal value, that is, the rotational speed of the photoconductor 102 is set to a third rotational speed P3 (=P1 / 3). When the resolution in the sub-scanning direction is 1200 dpi and the first rotational speed P1 corresponds to a peripheral speed of the photoconductor 102 of 200 mm / s, the third rotational speed P3 can correspond to a peripheral speed of the photoconductor 102 of 66.67 mm / s.

[0090] The first trigger signal TOP in the top row and the second trigger signal P_TOP in the second row of FIG. 17 are the same as those in the example of FIG.

[0091] The second synchronization signal P_SYNC in the third row has a period (317.4 μs) that is three times longer than that in the example of FIG. 14 because the rotation speed of the photoconductor 102 is the third rotation speed P3. On the other hand, the first synchronization signal SYNC in the fourth row has the same period (105.8 μs) as the example of FIG. 14, regardless of the rotation speed of the photoconductor 102. In the following description, the line period refers to the period indicated by the first synchronization signal SYNC.

[0092] Referring to the fifth row, the image data is stored from the image data generator 713 to the data buffer 733 in the cycle indicated by the second synchronization signal P_SYNC. That is, in the first line cycle indicated by the first synchronization signal SYNC, the image data for the first line L1-D1, ..., L1-D1 is stored in the data buffer 733 in response to the first rising edge of the second synchronization signal P_SYNC. 20 is stored in the first line area (MEM1) of the data buffer 733. In the second and third line periods, no new image data is stored in the data buffer 733. In the fourth line period, in response to the second rising edge of the second synchronization signal P_SYNC, the image data L2-D1, ..., L2-D 20 is stored in the second line area (MEM2) of the data buffer 733. No new image data is stored in the data buffer 733 in the fourth and fifth line periods.

[0093] Focusing on the eighth row, here, the rotation speed of the photoconductor 102 is the third rotation speed, which is one-third of the first rotation speed. Therefore, the signal selection unit 734 selects a data signal based on the input image data in one of the three line periods, and selects a non-light-emitting signal in the remaining two line periods. Therefore, the signal selection unit 734 selects the image data L1-D1, ..., L1-D for the first line in the third line period. 20 to the image data transmission unit 735. Next, in the fourth line cycle, the signal selection unit 734 selects non-light-emitting signals for all the light-emitting elements 602 of all the light-emitting chips 400, and outputs the non-light-emitting signals to the image data transmission unit 735. Next, in the fifth line cycle, the signal selection unit 734 again selects non-light-emitting signals for all the light-emitting elements 602 of all the light-emitting chips 400, and outputs the non-light-emitting signals to the image data transmission unit 735. In the sixth and subsequent line cycles, the signal selection unit 734 similarly outputs data signals based on the input image data to the image data transmission unit 735 in one out of every three line cycles, and non-light-emitting signals in the remaining two line cycles.

[0094] Focusing on the ninth and tenth rows, the image data transmission unit 735 transmits the image data L1-D1, ..., L1-D of the first line in the fourth line period. 20 Then, in the fifth line period, the image data transmission unit 735 transmits non-light emitting signals for the 20 light emitting chips 400 in parallel to the printed circuit board 202. Next, in the sixth line period, the image data transmission unit 735 again transmits non-light emitting signals for the 20 light emitting chips 400 in parallel to the printed circuit board 202. Although not shown in the figure, in the seventh line period, the image data transmission unit 735 transmits the image data L2-D1, ..., L2-D 20The image data transmission unit 735 transmits data signals based on the input image data to the printed circuit board 202 in parallel to the 20 light-emitting chips 400. However, here too, the image data transmission unit 735 does not need to be aware of whether the transmitted signal is a signal based on the input image data or a dummy non-light-emitting signal. Similarly, the light-emitting chips 400-1 to 400-20 only need to drive the corresponding light-emitting elements 602 in accordance with the value of each signal, without being aware of whether the received signal is a signal based on the input image data or a dummy non-light-emitting signal.

[0095] FIG. 18 is a signal chart relating to the output timing of the drive signals from each latch unit to the current driver unit, corresponding to the example of FIG.

[0096] 18, the period of the second synchronization signal P_SYNC is approximately 317.4 (=105.8×3) μs because the process speed is set to 1 / 3. The period of the first synchronization signal SYNC is approximately 105.8 μs, which is a constant line period that does not depend on the rotation speed of the photoconductor 102.

[0097] The cycle of the first latched signal LAT1 shown in the third row is the same as the cycle of the first synchronization signal SYNC, but the rising timing of the first latched signal LAT1 is delayed by four clocks from the first synchronization signal SYNC. The cycle of the second latched signal LAT2 shown in the fourth row is the same as the cycle of the first synchronization signal SYNC, but the rising timing of the second latched signal LAT2 is delayed by four clocks from the first latched signal LAT1.

[0098] The transfer unit 1003 of the light-emitting chip 400-1 sequentially receives the image data L1-D1[1] to L1-D1

[2992] in the first line period. The latch unit 1004-001 outputs four drive signals based on the image data L1-D1[1] to L1-D1[4] to the signal lines PON1-1 to PON1-4 in parallel from the rising edge of the first latch signal LAT1. The latch unit 1004-002 outputs four drive signals based on the image data L1-D1[5] to L1-D1[8] to the signal lines PON2-1 to PON2-4 in parallel from the rising edge of the second latch signal LAT2. The same applies to the output of drive signals from the latch units 1004-003 to 1004-748.

[0099] Next, the transfer unit 1003 sequentially receives 2992 non-light-emitting signals in the second line period. The latch unit 1004-001 outputs four drive signals corresponding to the non-light-emitting signals in parallel to the signal lines PON1-1 to PON1-4 from the second rising edge of the first latch signal LAT1. The latch unit 1004-002 outputs four drive signals corresponding to the non-light-emitting signals in parallel to the signal lines PON2-1 to PON2-4 from the second rising edge of the second latch signal LAT2. The same applies to the output of drive signals from the latch units 1004-003 to 1004-748.

[0100] The transfer unit 1003 also receives 2992 non-light-emitting signals in sequence during the third line period. The latch unit 1004-001 outputs four drive signals corresponding to the non-light-emitting signals in parallel to the signal lines PON1-1 to PON1-4 from the third rising edge of the first latch signal LAT1. The latch unit 1004-002 outputs four drive signals corresponding to the non-light-emitting signals in parallel to the signal lines PON2-1 to PON2-4 from the third rising edge of the second latch signal LAT2. The same applies to the output of drive signals from the latch units 1004-003 to 1004-748.

[0101] In the fourth line period, the transfer unit 1003 sequentially receives image data L2-D1[1] to L2-D1

[2992] . The latch unit 1004-001 outputs four drive signals based on image data L2-D1[1] to L2-D1[4] to signal lines PON1-1 to PON1-4 in parallel, starting from the fourth rising edge of the first latch signal LAT1. The latch unit 1004-002 outputs four drive signals based on image data L2-D1[5] to L2-D1[8] to signal lines PON2-1 to PON2-4 in parallel, starting from the fourth rising edge of the second latch signal LAT2. The same applies to the output of drive signals from the latch units 1004-003 to 1004-748.

[0102] 18, each light-emitting chip 400-n maintains the light-emitting elements 602 that are indicated by the input data signal to be emitting light in an emitting state throughout one of three line periods, and does not emit light throughout the remaining line periods. As a result, the above-mentioned excessive exposure is avoided, and images can be formed with stable quality on various types of sheets, regardless of the process speed setting.

[0103] The configuration of the exposure head 106 according to the embodiment described above makes it possible to avoid overexposure of the photoconductor 102 without affecting the configuration of the multiple light-emitting chips 400 on the printed circuit board 202, even when the process speed is variably set. Therefore, since there is no need to incorporate complex circuitry into the light-emitting chips 400 for driving and controlling the light-emitting elements 602, the manufacturing and development costs of the image forming apparatus 1 and the exposure head 106 can be reduced, and the device's miniaturization is also promoted. Furthermore, the insertion of a non-light-emitting signal into the signal sequence of the image data described above is achieved by simple signal selection based on the progression of the line cycle. Therefore, there is no need to add extra hardware to the image controller 710, thereby further reducing costs.

[0104] (3) Other process speeds Depending on the type of the sheet (or other factors), the rotational speed of the photoreceptor 102 may be set to a value other than 1 / N times the normal value. In the first modification example, assume that the photoreceptor 102 rotates at a rotational speed P4 which is M / N times the rotational speed P1. Here, M is an integer satisfying 1 < M < N. At this time, the second synchronization signal P_SYNC indicates a period which is N / M times the line period corresponding to the rotational speed P1. The synchronization signal generation unit 731 generates the first synchronization signal SYNC which indicates the same line period as the line period corresponding to the rotational speed P1 even when the photoreceptor rotates at the rotational speed P4. When the photoreceptor 102 rotates at the rotational speed P4, the image data transmission unit 735 repeatedly transmits the data signal for one line to the light-emitting chips 400-1 to 400-20 in M line periods out of the N line periods indicated by the first synchronization signal SYNC. That is, in this case, the data signal of the same line is repeatedly transmitted in M line periods. Further, the image data transmission unit 735 transmits a non-light-emission signal for preventing all the light-emitting elements 602 from emitting light to the light-emitting chips 400-1 to 400-20 in the remaining line periods out of the above N line periods. By switching between the data signal and the non-light-emission signal as in the first modification example, the exposure amount at each pixel position of each line can be suppressed to M / N times compared with the case where the non-light-emission signal is not inserted, thereby avoiding excessive exposure.

[0105] In the second modified example, the photoconductor 102 rotates at a rotation speed P5 that is M / N times the rotation speed P1. Here, M may be any positive number. In the second modified example, each light-emitting chip 400 is set to emit light at an amount of light M times the normal amount of light. The second synchronization signal P_SYNC indicates a period that is N times the line period corresponding to the rotation speed P1. Even when the photoconductor rotates at the rotation speed P5, the synchronization signal generation unit 731 generates a first synchronization signal SYNC that indicates the same line period as the line period corresponding to the rotation speed P1. When the photoconductor 102 rotates at the rotation speed P5, the image data transmission unit 735 transmits one line's worth of data signals to the light-emitting chips 400-1 to 400-20 in one of the N line periods indicated by the first synchronization signal SYNC. Furthermore, the image data transmission unit 735 transmits non-light-emitting signals to the light-emitting chips 400-1 to 400-20 in the remaining line periods of the N line periods to prevent all of the light-emitting elements 602 from emitting light. Meanwhile, the control data transmission unit 732 writes control data indicating a current setting value that is M times the current setting value when the photosensitive member 102 rotates at the rotation speed P1, to the register 1002 of each light-emitting chip 400, prior to the start of the image forming operation. By combining control of the signal output and variable setting of the current as in the second modified example, the amount of exposure at each pixel position on each line can be reduced to M / N times, thereby avoiding excessive exposure.

[0106] <5. Further variations> Although specific numerical values are used herein for the purpose of explanation, these specific numerical values are merely examples, and the present invention is not limited to the specific numerical values used in the embodiments. Specifically, the number of light-emitting chips mounted on one printed circuit board is not limited to 20 and may be any number. Furthermore, the size of the light-emitting element array of each light-emitting chip 400 is not limited to 4 rows and 748 columns and may be any size. Furthermore, the circumferential pitch and axial pitch of the light-emitting elements are not limited to approximately 21.16 μm and approximately 5 μm and may be any value. Furthermore, in the circuit unit 406 of each light-emitting chip 400, the number of signals grouped by the latch unit 1004 may be any number other than four.

[0107] Furthermore, the configuration of the data communication unit 715 is not limited to the example described above. For example, conversion from PDL data to binary input image data may be performed at any timing before signal output to the printed circuit board 202. Buffering of image data may be performed using a line memory of three or more lines instead of a line memory of two lines.

[0108] The invention is not limited to the above-described embodiments, and various changes and modifications can be made without departing from the spirit and scope of the invention. Accordingly, the following claims are appended to apprise the public of the scope of the invention. [Explanation of symbols]

[0109] 1: image forming apparatus, 102: photosensitive member, 104: fixing unit, 106: exposure head (exposure device), 108: developing unit, 202: printed circuit board, 400-1 to 400-20: light emitting chips, 410: light emitting element array, 602: light emitting element (organic EL element), 700: main processor (setting unit), 710: image controller, 711: CPU (first control unit), 713: image data generation unit, 720: CPU (second control unit), 731: synchronization signal generation unit, 732: control data transmission unit, 734: signal selection unit, 735: image data transmission unit, SYNC: first synchronization signal, P_SYNC: second synchronization signal

Claims

1. An exposure apparatus, At least one light-emitting chip having a plurality of light-emitting elements arranged along a line parallel to the axial direction of the rotating photoreceptor; a synchronization signal generating unit that generates a first synchronization signal synchronized with a second synchronization signal corresponding to a rotation speed of the photosensitive member, the first synchronization signal being used to control transmission of a data signal for each line to the at least one light-emitting chip; a transmitter that transmits, to the at least one light-emitting chip, data signals for one line used for light emission control of the plurality of light-emitting elements during a line period indicated by the first synchronization signal; Equipped with The second synchronization signal is a first line period when the photoreceptor rotates at a first rotation speed; When the photosensitive member rotates at a second rotation speed that is 1 / N times (N is an integer, 1<N) the first rotation speed, a second line period that is N times the first line period is indicated, the synchronization signal generating unit generates the first synchronization signal indicating the first line period regardless of a rotation speed of the photosensitive member; When the photosensitive member rotates at the second rotation speed, the transmitting unit transmitting the data signal for one line to the at least one light-emitting chip in one line period among N line periods indicated by the first synchronization signal; transmitting a non-light emitting signal to the at least one light emitting chip in order to prevent the plurality of light emitting elements from emitting light in the remaining line periods of the N line periods; Exposure equipment.

2. 2. The exposure apparatus according to claim 1, wherein the at least one light-emitting chip maintains a light-emitting element that is indicated to emit light by the data signal input in each line period indicated by the first synchronization signal in an emitting state throughout the line period.

3. The exposure apparatus includes: a data generating unit that generates image data used for light emission control of the plurality of light emitting elements of the at least one light emitting chip; a signal selection unit that selectively outputs to the transmission unit one of the data signal based on the image data generated by the data generation unit and the non-light emission signal for each line period indicated by the first synchronization signal; a first control unit that controls selection of a signal to be output from the signal selection unit to the transmission unit for each line period indicated by the first synchronization signal in accordance with a setting of the rotation speed of the photosensitive member; The exposure apparatus of claim 1 further comprising:

4. When the photosensitive member rotates at a third rotation speed that is M / N times (M is an integer, 1<M<N) the first rotation speed, the transmission unit repeatedly transmitting the data signal for one line to the at least one light-emitting chip in M line periods among the N line periods indicated by the first synchronization signal; transmitting the non-light emitting signal to the at least one light emitting chip in order to prevent the plurality of light emitting elements from emitting light in the remaining line periods of the N line periods; 2. The exposure apparatus according to claim 1.

5. When the photosensitive member rotates at a third rotation speed that is M / N times the first rotation speed, the transmitting unit transmitting the data signal for one line to the at least one light-emitting chip in one line period among the N line periods indicated by the first synchronization signal; transmitting the non-light emitting signal to the at least one light emitting chip in the remaining line periods of the N line periods so as not to cause the plurality of light emitting elements to emit light; the plurality of light-emitting elements of the at least one light-emitting chip are set so as to emit light at an amount of light M times greater when the photosensitive member rotates at the third rotational speed than when the photosensitive member rotates at the first rotational speed; 2. The exposure apparatus according to claim 1.

6. 2. The exposure apparatus according to claim 1, wherein the plurality of light-emitting elements are organic EL (Electro Luminescence) elements.

7. an exposure apparatus according to any one of claims 1 to 6; the photoreceptor; a developing device that develops the latent image formed by the exposure device to light on the photosensitive member to form a toner image on the surface of the photosensitive member; a fixing unit that fixes the toner image transferred from the photoreceptor to a sheet onto the sheet; a setting unit that sets the rotation speed of the photosensitive member in accordance with the type of the sheet; An image forming apparatus comprising:

8. The setting unit When an image is formed on a sheet having a first basis weight, the rotation speed of the photosensitive member is set to the first rotation speed; When an image is formed on a sheet having a second basis weight greater than the first basis weight, the rotation speed of the photosensitive member is set to the second rotation speed. The image forming apparatus according to claim 7 .

9. The image forming apparatus according to claim 7 , wherein the synchronization signal generating section generates the second synchronization signal indicating a line period corresponding to the rotation speed of the photosensitive member set by the setting section.

10. the image forming apparatus, a second control unit that synchronously controls the rotation of the photosensitive member and the conveyance of the sheet based on the second synchronization signal generated by the synchronization signal generation unit; The image forming apparatus of claim 9 further comprising:

Images