Light emitting device, image forming apparatus, display device, imaging apparatus, electronic apparatus, and wearable device

By integrating bypass capacitors with MIM, MOM, or MOS structures, the solution stabilizes the drive transistors' gate-source voltage, addressing power supply voltage fluctuations and preventing horizontal stripes in light-emitting devices.

JP2025121839APending Publication Date: 2025-08-20CANON KK
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Patent Information

Application Number
JP2024219010
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-02-07
Filing Date
2024-12-13
Publication Date
2025-08-20

AI Technical Summary

Technical Problem

Fluctuations in power supply voltage cause horizontal stripes on the display of light-emitting devices, particularly in organic light-emitting devices, due to parasitic capacitances affecting the drive transistors.

Method used

Incorporating bypass capacitors with MIM, MOM, or MOS structures between the power supply wiring and the cathode electrode to enhance capacitive coupling, thereby stabilizing the gate-source voltage of the drive transistors, reducing the impact of power supply voltage fluctuations.

Benefits of technology

The solution effectively suppresses the display artifacts caused by power supply voltage fluctuations, maintaining consistent brightness across rows and preventing horizontal stripes.

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Abstract

To provide a technique that can prevent the influence of fluctuations of power supply voltage on display of a light emitting device.SOLUTION: A light emitting device comprises a substrate including a light emitting pixel array having a plurality of light emitting pixels each including a light emitting element and a drive transistor driving the light emitting element, power supply wiring that supplies power supply voltage to the drive transistors, and a capacitance part having a first electrode and a second electrode. The light emitting element has a first electrode layer, a light emitting layer arranged on the first electrode layer, and a second electrode layer arranged on the light emitting layer. The first electrode and the second electrode are located lower than a height of a bottom face of the first electrode layer. The first electrode is electrically connected to the power supply wiring, and the second electrode is electrically connected to the second electrode layer.SELECTED DRAWING: Figure 6
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Description

[Technical Field]

[0001] The present invention relates to a light-emitting device, an image forming device, a display device, an imaging device, an electronic device, and a wearable device. [Background technology]

[0002] There are display devices equipped with light-emitting devices that use organic light-emitting elements (EL elements). Patent Document 1 describes an electro-optical device in which a light-emitting element and an intermediate electrode that connects the anode of the light-emitting element and a transistor that controls the current flowing through the light-emitting element are surrounded by power wiring. Patent Document 1 also describes that it is possible to reduce image quality degradation caused by noise affecting the area from the region where the transistor is formed to the anode. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2013-238723 Summary of the Invention [Problem to be solved by the invention]

[0004] Fluctuations in the power supply voltage in a light-emitting device can cause horizontal stripes to appear on the display. An object of the present invention is to provide a technology that can suppress the influence of fluctuations in the power supply voltage on the display of a light-emitting device. [Means for solving the problem]

[0005] One aspect of the present invention is a light-emitting device comprising a substrate including an emissive pixel array having a plurality of emissive pixels, each of which comprises a light-emitting element and a drive transistor that drives the light-emitting element, a power supply wiring that supplies a power supply voltage to the drive transistor, and a capacitance section having a first electrode and a second electrode, wherein the light-emitting element has a first electrode layer, a light-emitting layer arranged on the first electrode layer, and a second electrode layer arranged on the light-emitting layer, the first electrode and the second electrode being positioned below the height of a bottom surface of the first electrode layer, the first electrode being electrically connected to the power supply wiring, and the second electrode being electrically connected to the second electrode layer. [Effects of the Invention]

[0006] It is possible to provide a technique that can suppress the influence of fluctuations in power supply voltage on the display of a light emitting device. [Brief explanation of the drawings]

[0007] [Figure 1] FIG. 1 is a block diagram of a light-emitting device. [Figure 2] Circuit diagram of a pixel. [Figure 3] 3 is a timing chart according to the first embodiment. [Figure 4] 10A and 10B are diagrams illustrating the occurrence of horizontal stripes in an image. [Figure 5] FIG. 1 is a plan view of a light emitting device according to a first embodiment. [Figure 6] 1 is a cross-sectional view of a light emitting device according to a first embodiment. [Figure 7] FIG. 6 is a cross-sectional view of a light emitting device according to a second embodiment. [Figure 8] FIG. 10 is a cross-sectional view of a light emitting device according to a third embodiment. [Figure 9] 10A and 10B are diagrams illustrating a light-emitting device according to a fourth embodiment. [Figure 10] 10A and 10B are diagrams illustrating a light-emitting device according to a fifth embodiment. [Figure 11] 1 is a schematic diagram illustrating an example of an image forming apparatus according to an embodiment of the present invention. [Figure 12] 1 is a schematic diagram illustrating an example of a display device according to an embodiment of the present invention. [Figure 13] 1A is a schematic diagram showing an example of an imaging device according to an embodiment of the present invention; FIG. 1B is a schematic diagram showing an example of an electronic device according to an embodiment of the present invention; [Figure 14] 1A is a schematic diagram showing an example of a display device according to an embodiment of the present invention, and FIG. 1B is a schematic diagram showing an example of a foldable display device. [Figure 15] FIG. 1A is a schematic diagram showing an example of a wearable device according to one embodiment of the present invention; FIG. 1B is a schematic diagram showing an example of a wearable device according to one embodiment of the present invention, the wearable device having an imaging device. DETAILED DESCRIPTION OF THE INVENTION

[0008] Hereinafter, embodiments will be described in detail with reference to the accompanying drawings. Note that the following embodiments do not limit the scope of the invention claimed. Although multiple features are described in the embodiments, not all of these multiple features are necessarily essential to the invention, and multiple features may be combined arbitrarily. Furthermore, in the accompanying drawings, the same reference numerals are used to designate the same or similar components, and redundant explanations will be omitted.

[0009] (Embodiment 1) The following description will be given taking a light-emitting device using an organic light-emitting element (organic EL) as an example. Fig. 1 is a block diagram of a light-emitting device 101. The light-emitting device 101 shown in Fig. 1 has a light-emitting pixel array 102 in which light-emitting pixels are arranged, and peripheral circuits for the light-emitting pixel array 102. The light-emitting pixel array 102 of this embodiment has a plurality of pixels 103(1,1) to 103(m,n) arranged two-dimensionally in a matrix with m rows and n columns, and each of the pixels 103(1,1) to 103(m,n) has an organic light-emitting element.

[0010] The peripheral circuits are circuits for controlling each of the pixels 103(1,1) to 103(m,n), and include a vertical scanning circuit 104, a signal output circuit 105, and a control circuit 106. The signal output circuit 105 has a horizontal scanning circuit 107, column DAC circuits 108 which are multiple digital-to-analog conversion (DAC) circuits, and a column driver circuit 109. The column DAC circuit 108 has DAC circuits for n columns, which is the number of columns in the light-emitting pixel array 102. The column driver circuit 109 has driver circuits for n columns, which is the number of columns in the light-emitting pixel array 102.

[0011] The horizontal scanning circuit 107 scans each of the column DAC circuits 108, and inputs the digital signals input from the control circuit 106 to each DAC circuit of the column DAC circuit 108. The DAC circuits convert the input digital signals into corresponding analog signals. Each driver circuit of the column driver circuit 109 outputs the analog signals input from the corresponding DAC circuits to the corresponding signal lines VL[1 to n].

[0012] The vertical scanning circuit 104 is connected to the light emitting pixel array 102 via reset signal lines Res[1 to m], write control signal lines Sel[1 to m], and light emitting control signal lines Sw[1 to m].

[0013] FIG. 2 is a circuit diagram of a pixel 103(1,1), which is an example of the pixel 103 in FIG. 1. The pixel 103(1,1) has an organic light-emitting element 111, a drive transistor 112, a write transistor 113, a light-emission control transistor 114, a reset transistor 115, a first capacitor 116, and a second capacitor 117. The first capacitor 116 and the second capacitor 117 are capacitive sections having electrical capacitance, typically having an MIM (Metal-Insulator-Metal) structure. The drive transistor 112, the write transistor 113, the light-emission control transistor 114, and the reset transistor 115 are p-channel MOS transistors. Note that all transistors do not need to be p-channel transistors, and an appropriate combination of conductivity type and polarity may be used.

[0014] The organic light-emitting element 111 has an organic layer including an emitting layer between an anode electrode and a cathode electrode. In addition to the emitting layer, the organic layer may appropriately include one or more of a hole injection layer, a hole transport layer, an electron injection layer, and an electron transport layer. A cathode electrode 125 shared by all pixels is provided at the cathode of the organic light-emitting element 111. A cathode voltage Vcath applied to the cathode electrode 125 is typically −5 V. Parasitic capacitances 118 and 119 are shown. Here, the parasitic capacitance 118 has a capacitance value Cgd and is the parasitic capacitance between the gate electrode and drain electrode of the driving transistor 112. The parasitic capacitance 119 has a capacitance value Cpa and is the parasitic capacitance between the gate electrode of the driving transistor 112 and the cathode electrode 125.

[0015] A power supply wiring 124 is connected to the source electrode of the emission control transistor 114 and one electrode of the second capacitance element 117. One electrode of the first capacitance element 116 and the other electrode of the second capacitance element 117 are connected, and the drain electrode of the emission control transistor 114 and the source electrode of the driving transistor 112 are connected to this connection point. The drain electrode of the driving transistor 112 is connected to the anode electrode of the organic light-emitting element 111. A cathode voltage Vcath is supplied to the cathode electrode of the organic light-emitting element 111. A power supply voltage Vdd is applied to the power supply wiring 124 to which the second capacitance element 117 is connected. A typical value of the power supply voltage Vdd is 5V. Furthermore, a typical value of the voltage Vm of the drain electrode of the reset transistor 115 is -5V.

[0016] The driving of the organic light emitting device 111 of this embodiment will be described using the timing chart of FIG. 3. In FIG. 3, the horizontal axis represents time t. First, at time t1, the write control signal φSel[1] transitions from high to low, causing the gate voltage Vg of the drive transistor 112 to become a correction voltage (hereinafter referred to as Vofs). A typical value of Vofs is 2V. Also at time t1, the reset signal φRes[1] transitions from high to low. At time t2, the light emitting control signal φSw[1] transitions from low to high, causing the light emitting control transistor 114 to enter an off state. The period from t1 to t2 is called a reset period. During the reset period, the gate voltage (hereinafter referred to as Vg) of the drive transistor 112 is initialized to the correction voltage Vofs, and the source voltage (hereinafter referred to as Vs) is initialized to the power supply voltage Vdd.

[0017] At time t3, the write control signal φSel[1] transitions from low to high, turning off the write transistor 113. The period from t2 to t3 is called the threshold correction period. During the threshold correction period, the light-emitting control transistor 114 is turned off, so Vs of the drive transistor 112 changes to Vofs-Vth, which is the difference voltage between the voltage Vofs and the threshold voltage (hereinafter referred to as Vth) of the drive transistor 112, and then stabilizes. In other words, the gate-source voltage Vgs (=Vg-Vs) of the drive transistor 112 becomes Vth. The threshold voltage Vth is approximately the gate-source voltage Vgs when current begins to flow through the drive transistor 112. At this time, the gate voltage Vg of the drive transistor 112 is Vofs, so the threshold voltage Vth of the drive transistor 112 is held in the first capacitance element 116.

[0018] At time t4, the signal voltage of the signal line VL[1] switches from voltage Vofs to signal voltage (hereinafter referred to as Vsig). A typical value of Vsig is 3V. At time t5, the write control signal φSel[1] transitions from high to low. This period from t3 to t5 is called the signal write preparation period.

[0019] At time t5, the write transistor 113 is turned on, and the gate voltage Vg of the drive transistor 112 becomes the signal voltage Vsig of the signal line VL[1]. If the capacitance of the first capacitive element 116 is C1 and the capacitance of the second capacitive element 117 is C2, the source voltage Vs of the drive transistor 112 is Vs=Vofs-Vth+C1*(Vsig-Vofs) / (C1+C2) At time t6, the write control signal φSel[1] transitions from low to high. This period from t5 to t6 is called a signal write period.

[0020] At time t7, the light-emission control signal φSw transitions from high to low, turning on the light-emission control transistor 114. At this time, the source voltage Vs of the drive transistor 112 becomes substantially equal to the power supply voltage Vdd. Furthermore, the reset signal φRes[1] transitions from low to high, turning off the reset transistor 115, and current is supplied from the power supply voltage Vdd to the organic light-emitting element 111 via the light-emission control transistor 114 and the drive transistor 112. This causes the organic light-emitting element 111 to emit light. The period from time t7 onwards is called the light-emission period. Meanwhile, the periods t1 to t7 are called non-light-emission periods. The non-light-emission periods alternate row by row. In other words, the non-light-emission periods of the pixels 103(2,1) to 103(2,n) in the second row begin at time t7.

[0021] Next, we will use Figure 4 to explain the horizontal stripes that appear on a display due to fluctuations in the power supply voltage Vdd. The horizontal axis in Figure 4 represents time t. First, we will explain the ideal voltage change (a) in Vg of the drive transistor 112. The power supply voltage Vdd can fluctuate due to noise from outside the light-emitting device 101 or from peripheral circuits (the vertical scanning circuit 104, the signal output circuit 105, and the control circuit 106). Ideally, Vg of the drive transistor 112 also fluctuates at the same amplitude. Because the source voltage Vs of the drive transistor 112 is the power supply voltage Vdd during the light-emitting period, Vgs of the drive transistor 112 remains constant even when the power supply voltage Vdd fluctuates. If Vgs is constant, the source-drain current Ids of the drive transistor will also remain constant. When displaying at 60 fps (frames per second), the light-emitting period is 16 ms and the non-light-emitting period is approximately 0.02 ms, a difference of three orders of magnitude between the two periods, so most of the display time is spent in the light-emitting period. If the capacitances of the first capacitance element 116 and the second capacitance element 117 in FIG. 2 are sufficiently large, Vgs of the drive transistor 112 is kept constant during the light emission period even if the power supply voltage Vdd fluctuates.

[0022] However, Vg of the drive transistor 112 may not fluctuate simultaneously with the power supply voltage Vdd and at the same amplitude. This is explained using (b) dark row Ld and (c) bright row Lb in Figure 4. In the dark row Ld, a signal is written at the positive peak of the power supply voltage Vdd fluctuation. Due to the fixed cathode voltage Vcath and the parasitic capacitances 118 and 119 in Figure 2, Vg of the drive transistor 112 has a smaller amplitude than the power supply voltage Vdd fluctuation. Therefore, in the dark row Ld, at the negative peak of the power supply voltage Vdd fluctuation, Vgs of the drive transistor 112 becomes smaller than Vgs during the signal writing period. Because brightness is proportional to the time integral of the source-drain current Ids of the drive transistor, which is determined by Vgs, the time integral of Ids supplied to the light-emitting element 111 in row Ld is smaller than the ideal value shown in (a). This can result in row Ld being a dark row.

[0023] On the other hand, in the bright row Lb, a signal is written at the negative peak of the power supply voltage Vdd fluctuation. Again, due to the fixed cathode voltage Vcath and the parasitic capacitances 118 and 119 in Figure 2, the amplitude of Vg of the drive transistor 112 is smaller than the amplitude of the power supply voltage Vdd fluctuation. Therefore, in row Lb, at the positive peak of the power supply voltage Vdd fluctuation, the Vgs of the drive transistor 112 becomes larger than the Vgs during the signal writing period. Because brightness is proportional to the time integral of the source-drain current Ids of the drive transistor, which is determined by Vgs, row Lb has a larger time integral of Ids supplied to the light-emitting element 111 than the ideal value shown in (a). This makes row Lb brighter than ideal. Thus, the bright and dark rows Ld appear on the screen, potentially resulting in horizontal stripes on the display.

[0024] Because the presence of parasitic capacitances 118 and 119 is unavoidable, in order to prevent horizontal stripes on the display even with the parasitic capacitances 118 and 119, it is preferable that the voltage change of the cathode voltage Vcath also moves simultaneously with the voltage change of the power supply voltage Vdd and with the same amplitude. To achieve this, it is necessary to strengthen the capacitive coupling between the power supply wiring 124 to which the power supply voltage Vdd is applied in the light-emitting pixel array 102 and the cathode electrode 125. Methods for strengthening the capacitive coupling are shown in Figures 5 and 6.

[0025] FIG. 5 is a plan view illustrating a light-emitting device according to this embodiment. In the figure, the light-emitting device is mounted on a substrate 171. The substrate 171 is, for example, a semiconductor substrate. A flexible cable 173 is connected to the substrate 171 for supplying power and inputting and outputting signals. FIG. 5 shows the main wiring pads provided on the substrate 171. The wiring pads include a power supply wiring pad 123 for supplying a power supply voltage Vdd, a cathode wiring pad 175 for supplying a cathode voltage to the cathode of the organic light-emitting element, and power supply wiring pads 176 and 177 for peripheral circuits for supplying power supply voltages Vddp and Vdds to the peripheral circuits. There is also a reference power supply pad 178 for supplying a reference voltage and a signal wiring pad 179 for inputting and outputting various signals. While FIG. 5 shows only one wiring pad for each, the number of signal wiring pads 179 may be provided according to the number of input and output signals. The wiring pads provided on the substrate are connected to corresponding wiring pads for external connection provided on the flexible cable by corresponding wiring. The reference voltage here may be a ground level voltage.

[0026] A power supply voltage Vdd is applied to the light-emitting pixel array 102 via a power supply wiring pad 123 and a power supply wiring 124. A cathode voltage Vcath is applied to the light-emitting pixel array 102 via a cathode wiring pad 175 and a connection wiring 138 to the cathode electrode. A first power supply voltage Vddp for the peripheral circuits is applied to the vertical scanning circuit 104 and the signal output circuit 105, which are peripheral circuits, via a power supply wiring pad 176 and a peripheral circuit power supply wiring 121. A typical value of the first power supply voltage Vddp for the peripheral circuits is 5 V. A second power supply voltage Vdds for the peripheral circuits is applied to the signal output circuit 105 via a pad 177 and a wiring 122. A reference voltage Vss is applied to the vertical scanning circuit 104 and the signal output circuit 105 via a pad 178 and a reference voltage wiring 120. A signal for controlling the display and light-emitting device is supplied to the signal output circuit 105 via a pad 179. The wiring shown in the figure is an example and can be changed as appropriate depending on the circuit configuration.

[0027] In this embodiment, wiring for the power supply voltage Vdd and the cathode voltage Vcath can be arranged on the four sides of the area where the pixel array 102 is arranged. The power supply voltage Vdd and the cathode voltage Vcath can be supplied from the wiring arranged on the four sides. The bypass capacitor 126 is adjacent to the pixel array 102 and is arranged between the pixel array 102 and the vertical scanning circuit 104, which is a peripheral circuit. The bypass capacitor 127 is adjacent to the pixel array 102 and is arranged between the pixel array 102 and the signal output circuit 105, which is a peripheral circuit. The bypass capacitors 130 and 131 are arranged in locations adjacent to the pixel array 102. The bypass capacitors 126, 127, 130, and 131 are provided between the area where the pixel array 102 is arranged and the edge of the substrate 171. When viewed from above, the opposing electrodes of the bypass capacitors 126, 127, 130, and 131 may be arranged so as to overlap an area between the edge of the substrate 171 and the area where the light-emitting pixel array 102 is arranged.

[0028] The bypass capacitors 126, 127, 130, and 131 are preferably disposed between the power supply wiring 124 of the pixel array 102 and the connecting wiring 138 electrically connected to the cathode electrode, and are arranged on all four sides of the pixel array 102. The total capacitance of the bypass capacitors 126, 127, 130, and 131 is preferably greater than either the capacitance between the power supply voltage Vdd and the reference voltage Vss or the capacitance between the cathode voltage Vcath and the reference voltage Vss. Furthermore, the total capacitance may be greater than either the capacitance between the first power supply voltage Vddp and the reference voltage Vss or the capacitance between the second power supply voltage Vdds and the reference voltage. Increasing the total capacitance of the bypass capacitors beyond the capacitance of the parasitic capacitance strengthens the capacitive coupling between the power supply wiring 124 and the connecting wiring 138 connected to the cathode electrode, which is advantageous in suppressing the impact of fluctuations in the power supply voltage on the display of the light-emitting device. Although four bypass capacitors are shown in FIG. 5, any one of them can be effective.

[0029] FIG. 6 is a cross-sectional view of the light-emitting pixel array 102 and its adjacent area according to this embodiment. Each pixel 103 includes an anode electrode 136, an organic layer 135 on the anode electrode, and a cathode electrode 125 on the organic layer 135. The organic layer 135 between the cathode electrode 125 and the anode electrode 136 includes a light-emitting layer. The cathode electrode 125 and the anode electrode 136 may each be an electrode layer formed by a photolithography process. A color filter may be provided on the light-emitting side of the pixel 103. This example shows a pixel with a green color filter (G color filter) 131 and another pixel with a red color filter (R color filter) 132. The anode electrodes of adjacent pixels are insulated by a bank 134. The cathode electrode 125 is connected to a connection wiring 139 that supplies a cathode voltage at the edge of the light-emitting pixel array 102. The organic layer is recessed and terminated at the edge of the light-emitting pixel array 102. The electrode layer 140 is an electrode layer formed below the connection wiring 139 to the cathode electrode 125 (on the side opposite to the side where the cathode electrode 125 is located).

[0030] A first capacitance element 116 and a second capacitance element 117 are formed between the bottom surface of the pixel anode electrode 136 and a region where the transistor is formed below. In this embodiment, the capacitance elements 116 and 117 are capacitance elements with an MIM structure, and have an MIM electrode 141 and an MIM counter electrode 145 with an MIM insulating film 143 sandwiched between them. One of the capacitance elements 116 and 117 is shown here. Also, at the end of the light-emitting pixel array 102, there are an organic layer recession portion 151 where the thickness of the organic layer 135 is recessed and terminates, and a cathode contact portion 153 where a connection wiring 139 that supplies a cathode voltage to the cathode electrode 125 is arranged.

[0031] Below the bottom surface of the connection wiring 139 in the region where the organic layer recession portion 151 and the cathode contact portion 153 are located, an MIM insulating film 144, an MIM electrode 142 sandwiching the MIM insulating film 144, and an MIM counter electrode 146 are provided, forming a capacitance portion with electric capacitance. In this embodiment, the capacitance portion has an MIM structure. A peripheral circuit portion 155 in which peripheral circuits are arranged is also formed on the substrate.

[0032] The organic layer recession portion 151 and the cathode contact portion 153 are located between the light-emitting pixel array 102 and the peripheral circuit portion 155 when viewed in a plan view. The organic layer recession portion 151 is a portion where the portion of the organic layer 135 that was in the light-emitting pixel array 102 recesses toward the edge and loses its thickness. The cathode contact portion 153 is a portion where the cathode electrode 125 and the connection wiring 139 to the cathode electrode are in physical contact and electrically connected.

[0033] The MIM electrode 142, MIM insulating film 144, and MIM counter electrode 146 form a capacitive section having electrical capacitance, and this capacitive section corresponds to the bypass capacitor 126. In other words, the bypass capacitor 126 is an MIM capacitance consisting of the MIM electrode 142, MIM insulating film 144, and MIM counter electrode 146. The MIM electrode 142 of the MIM capacitance is electrically connected to the cathode electrode 125 and a cathode voltage Vcath is applied to it. The MIM counter electrode 146 is electrically connected to the power supply wiring 124 and a power supply voltage Vdd is applied to it.

[0034] It is also possible to provide a bypass capacitor outside the light-emitting device 101 to generate capacitive coupling between the power supply wiring 124 and the cathode electrode 125. However, since the inductance components of the power supply wiring 124 of the pixel array 102 and the wiring leading to the cathode electrode 125 can become large, it may not be possible to ensure synchronism of Vcath with fluctuations in Vdd. Therefore, as in this embodiment, the bypass capacitor 126 is placed in a position that overlaps with the area in which the organic layer recession portion 151 and the cathode contact portion 153, which are adjacent to the pixel array 102, are placed. As a result, the bypass capacitor can be placed close to the pixel array 102, thereby reducing the influence of inductance.

[0035] The bypass capacitors 127, 130, and 131 are capacitance sections with the same structure as the bypass capacitor 126. In this embodiment, the bypass capacitor 126 spans the area where both the organic layer recession portion 151 and the cathode contact portion 153 are located. By arranging the bypass capacitors in this manner, the electrical capacitance can be increased, and therefore the coupling effect can also be enhanced. However, the effect can also be obtained by arranging the bypass capacitors in the area of either the organic layer recession portion 151 or the cathode contact portion 153.

[0036] Furthermore, a power supply voltage Vdd may be applied to an electrode 140 located below the bottom surface of the connection wiring 139 to the cathode electrode, thereby forming an additional capacitance between the wiring between the power supply voltage Vdd and the cathode voltage Vcath. In this case, the electrode 140 may be formed by the photolithography process used to form the power supply wiring 124. Note that, although the column DAC circuit 108 and the column driver circuit 109 have been described as having DAC circuits and driver circuits for n columns, which is the number of columns in the light-emitting pixel array 102, it is also possible to have fewer than n columns by using a switch.

[0037] (Embodiment 2) This example is an example in which a bypass capacitor is formed in an area around the luminescent pixel array 102 where dummy pixels, which are non-luminescent pixels, are arranged. Figure 7 is a cross-sectional view of a luminescent device according to this embodiment. Color filters are arranged on the luminescent pixels that emit light. A dummy pixel array section 157 in which non-luminescent dummy pixels are arranged is located around the luminescent pixels. A bypass capacitor 128 is formed in the area of the dummy pixel array section 157.

[0038] Each pixel of the luminescent pixel array 102 has capacitance elements 116 and 117 to which the luminance signal of that pixel is written. These capacitance elements correspond to the portion indicated by the MIM electrode 141, MIM insulating film 143, and MIM counter electrode 145. A similar capacitance element is provided in each luminescent pixel. Meanwhile, dummy pixels are typically formed around the luminescent pixels using the same process as the luminescent pixels. Although a MIM structure capacitance element can also be formed in the dummy pixels, it is not necessary to write a luminance signal to the MIM structure capacitance element of the dummy pixels. Therefore, the capacitance element of the dummy pixels can be used as a bypass capacitor 128 by wiring a power supply voltage dd and a cathode voltage Vcath via wiring such as contacts. Since the pixels in the dummy pixel array section 157 do not need to emit light, the cathode voltage Vcath is applied to the anode electrode 137 of the dummy pixel array section 157. The other driving methods are the same as those in the first embodiment.

[0039] 7, in addition to the bypass capacitor 128, there is a bypass capacitor 126 in the organic layer recession portion 151 and the cathode contact portion 153. This increases the electrical capacitance and can strengthen the capacitive coupling. Note that even if the bypass capacitor 126 is not provided and only the bypass capacitor 128 is provided in the dummy pixel array portion 157, the capacitive coupling can be strengthened, and the impact of fluctuations in the power supply voltage on the display of the light-emitting device can be suppressed.

[0040] (Embodiment 3) This embodiment is an example in which the bypass capacitor is used as a capacitance portion of a MOS structure. Figure 8 is a cross-sectional view of a light-emitting device according to this embodiment. In this embodiment, the substrate is a p-type semiconductor substrate 161. A gate insulating film 163 is disposed on the p-type semiconductor substrate 161, and a polysilicon electrode 165 is disposed on the gate insulating film 163. A diffusion layer 167 is located below the gate insulating film 163. Also shown are an n-type well 168 and a p-type diffusion layer 169. In this embodiment, the bypass capacitor 129 is disposed as a capacitance of a MOS structure below the region where the organic layer recession portion 151 and the cathode contact portion 153 are disposed (on the p-type semiconductor substrate 161 side).

[0041] The bypass capacitor 129 includes a polysilicon electrode 165, a gate insulating film 163, and a diffusion layer 167. The polysilicon electrode 165 of the bypass capacitor 129 is electrically connected to the cathode electrode via a contact, and a cathode voltage Vcth is applied to the polysilicon electrode 165. A power supply voltage Vdd is applied to the diffusion layer 167. In this embodiment, the bypass capacitor 129 can also strengthen the coupling between the power supply wiring and the wiring to the cathode. Note that, although the bypass capacitor 129 is disposed across the organic layer recession portion 151 and the cathode contact portion 153 in FIG. 8, it may be disposed in either the organic layer recession portion 151 or the cathode contact portion 153. The bypass capacitor of this embodiment can be used alone or in combination with other embodiments.

[0042] (Embodiment 4) This embodiment is an example in which the bypass capacitor is a capacitance section with an MOM (Metal-Oxide-Metal) structure. FIG. 9(a) is a cross-sectional view of a light-emitting device according to this embodiment. In this embodiment, the bypass capacitor 176 is disposed as a capacitance with an MOM structure below the region where the organic layer recessed portion 151 and the cathode contact portion 153 are disposed. The capacitance with an MOM structure is formed by two metal electrodes on the same layer sandwiching an interlayer insulating region. The bypass capacitor 176 of this embodiment is formed by an MOM electrode 172, an interlayer insulating region 173, and an MOM counter electrode 174.

[0043] 9(b) is a plan view of the bypass capacitor 176. In the bypass capacitor 176, the MOM electrode 172 and the MOM counter electrode 174 may be arranged in a comb-like shape close to each other. They are insulated from each other by an interlayer insulating region 173.

[0044] In this embodiment as well, the bypass capacitor 176 can strengthen the coupling between the power supply wiring and the wiring to the cathode. In Fig. 9, the bypass capacitor 176 is arranged across the organic layer recession portion 151 and the cathode contact portion 153, but it may be arranged in either the organic layer recession portion 151 or the cathode contact portion 153. The bypass capacitor of this embodiment can be used alone or in combination with other embodiments.

[0045] (Embodiment 5) In this embodiment, a bypass capacitor provided in the region of the light-emitting pixel array 102 increases the capacitive coupling between the power supply wiring and the cathode. FIG. 10 is a cross-sectional view of a light-emitting device according to this embodiment. A bypass capacitor 186 made of an MIM capacitance is formed between a G pixel 187 and an R pixel 188. The bypass capacitor 186 is formed by a second MIM electrode 181, an MIM insulating film 143, and a second MIM counter electrode 185.

[0046] In this embodiment, the second MIM electrode 181 is electrically connected to the cathode electrode 125 by a connection wiring 182. The connection wiring 182 is electrically insulated from the organic layer 135 by a bank 134. The second MIM counter electrode 185 is electrically connected to a power supply wiring.

[0047] The bypass capacitor of this embodiment can be used alone or in combination with other embodiments.

[0048] (Example of application of light emitting device) An example in which the light emitting devices according to the first to fifth embodiments are applied to equipment will be described below. FIG. 11 shows an example in which the light emitting devices according to the first to fifth embodiments are applied to an image forming apparatus. FIG. 11(a) is a schematic diagram of an image forming apparatus 36 according to this embodiment. The image forming apparatus has a photosensitive member, an exposure light source, a developing unit, a charging unit, a transfer unit, a transport roller, and a fixing unit.

[0049] Light 929 is emitted from an exposure light source 928, and an electrostatic latent image is formed on the surface of a photoconductor 927. The light emitting devices according to embodiments 1 to 5 can be used as this exposure light source. A developing unit 931 has a developing material such as toner, and applies the developing material to the exposed photoconductor 927. A charging unit 930 charges the photoconductor 927. A transfer unit 932 transfers the developed image to a recording medium 934. A transport unit 933 transports the recording medium 934. The recording medium 934 is, for example, paper. A fixing unit 935 fixes the image formed on the recording medium.

[0050] 11(b) and 11(c) are schematic diagrams showing an exposure light source 928 in which multiple light-emitting units 936 are arranged on a long substrate. Arrow 937 indicates a direction parallel to the axis of the photoconductor, representing the row direction in which the organic light-emitting elements are arranged. This row direction is the same as the axis direction about which the photoconductor 927 rotates. This direction can also be called the long axis direction of the photoconductor.

[0051] Figure 11(b) shows a configuration in which the light-emitting units are arranged along the longitudinal axis of the photoconductor. Figure 11(c) shows a different configuration from Figure 11(b), in which the light-emitting units are arranged alternately in the column direction in each of the first and second columns. The first and second columns are arranged at different positions in the row direction.

[0052] 11(c), the first column has a plurality of light-emitting units arranged at intervals. The second column has light-emitting units at positions corresponding to the intervals between the light-emitting units in the first column. That is, the plurality of light-emitting units are also arranged at intervals in the row direction.

[0053] The arrangement in FIG. 11(c) can also be described as a grid arrangement, a houndstooth arrangement, or a checkerboard pattern.

[0054] 12 is a schematic diagram illustrating an example of a display device that can use the light-emitting devices according to the first to fifth embodiments. The display device 1000 may have a touch panel 1003, a display panel 1005, a frame 1006, a circuit board 1007, and a battery 1008 between an upper cover 1001 and a lower cover 1009. Flexible printed circuits FPCs 1002 and 1004 can be connected to the touch panel 1003 and the display panel 1005. A transistor is disposed on the circuit board 1007. The battery 1008 may not be provided if the display device is not a portable device, and may be provided in a different position even if the display device is a portable device.

[0055] The display device according to this embodiment may have color filters having red, green, and blue colors, which may be arranged in a delta arrangement.

[0056] The display device according to the present embodiment may be used as a display unit of a mobile terminal. In this case, the display device may have both a display function and an operation function. Examples of the mobile terminal include a mobile phone such as a smartphone, a tablet, and a head-mounted display.

[0057] The display device according to this embodiment may be used as a display unit of an imaging device having an optical unit with a plurality of lenses and an imaging element that receives light that has passed through the optical unit. The imaging device may have a display unit that displays information acquired by the imaging element. The display unit may be a display unit exposed to the outside of the imaging device or a display unit disposed within a viewfinder. The imaging device may be a digital camera or a digital video camera.

[0058] 13(a) is a schematic diagram showing an example of an imaging device using the light-emitting device according to this embodiment as a display device. The imaging device 1100 may have a viewfinder 1101, a rear display 1102, an operation unit 1103, and a housing 1104. The viewfinder 1101 may have a display device using the light-emitting device according to embodiments 1 to 5. In this case, the display device may display not only the image to be captured, but also environmental information, imaging instructions, etc. The environmental information may include the intensity of external light, the direction of external light, the speed at which the subject is moving, the possibility that the subject will be blocked by an obstruction, etc.

[0059] Since the timing suitable for capturing an image is short, it is better to display information as soon as possible. Therefore, it is preferable to use a display device using the light-emitting device according to any one of the first to fifth embodiments. Organic light-emitting elements have a fast response speed as light-emitting elements. Therefore, display devices using organic light-emitting elements are preferably used for devices that require a high display speed.

[0060] The imaging device 1100 has an optical section (not shown). The optical section has multiple lenses, which form an image on an imaging element housed in a housing 1104. The focus of the multiple lenses can be adjusted by adjusting their relative positions. This operation can also be performed automatically. The imaging device may also be called a photoelectric conversion device. Instead of sequentially capturing images, the photoelectric conversion device can include an imaging method that detects the difference from the previous image, or a method of cutting out an image from a constantly recorded image, etc.

[0061] FIG. 13(b) is a schematic diagram illustrating an example of an electronic device including the light-emitting device according to any one of the first to fifth embodiments. The electronic device 1200 includes a display unit 1201, an operation unit 1202, and a housing 1203. The housing 1203 may include a circuit, a printed circuit board having the circuit, a battery, and a communication unit. The operation unit 1202 may be a button or a touch panel type reaction unit. The operation unit may be a biometric recognition unit that recognizes a fingerprint to unlock the device, etc. An electronic device having a communication unit may also be called a communication device. The electronic device may further include a camera function by including a lens and an image sensor. An image captured by the camera function is displayed on the display unit. Examples of the electronic device include a smartphone and a laptop computer.

[0062] 14(a) and 14(b) are schematic diagrams showing an example of a display device using the light-emitting devices according to embodiments 1 to 5. FIG. 14(a) shows a display device such as a television monitor or a PC monitor. The display device 1300 has a frame 1301 and a display unit 1302. When the light-emitting devices according to the above embodiments are used in the display unit 1302, degradation of the displayed image can be suppressed.

[0063] It has a frame 1301 and a base 1303 that supports a display unit 1302. The base 1303 is not limited to the form shown in Fig. 14(a). The bottom side of the frame 1301 may also serve as the base.

[0064] The frame 1301 and the display unit 1302 may be curved. The radius of curvature may be 5000 mm or more and 6000 mm or less.

[0065] FIG. 14(b) is a schematic diagram illustrating another example of a display device. The display device 1310 in FIG. 14(b) is configured to be bendable, and is a so-called foldable display device. The display device 1310 has a first display unit 1311, a second display unit 1312, a housing 1313, and a bending point 1314. The first display unit 1311 and the second display unit 1312 may include the light-emitting devices according to embodiments 1 to 5. The first display unit 1311 and the second display unit 1312 may be a single, seamless display device. The first display unit 1311 and the second display unit 1312 can be separated by the bending point. The first display unit 1311 and the second display unit 1312 may display different images, or the first and second display units may display a single image.

[0066] 15(a) and 15(b), an example of a display device using the light-emitting device according to any one of the first to fifth embodiments will be described. The display device can be applied to a system that can be attached as a wearable device, such as smart glasses, an HMD, or a smart contact lens. The display device used in such an application example includes an imaging device capable of photoelectrically converting visible light, and a display device capable of emitting visible light.

[0067] 15(a) illustrates glasses 1600 (smart glasses) according to one application example. An imaging device 1602 such as a CMOS sensor or SPAD is provided on the front side of a lens 1601 of the glasses 1600. Furthermore, a display device according to any of the above-described embodiments is provided on the back side of the lens 1601.

[0068] The glasses 1600 further include a control device 1603. The control device 1603 functions as a power source that supplies power to the image capture device 1602 and the display device according to each embodiment. The control device 1603 also controls the operations of the image capture device 1602 and the display device. The lens 1601 is formed with an optical system for focusing light onto the image capture device 1602.

[0069] 15(b) illustrates glasses 1610 (smart glasses) according to one application example. The glasses 1610 have a control device 1612. The control device 1612 is equipped with an imaging device corresponding to the imaging device 1602 and a display device. An optical system for projecting light emitted by the display device in the control device 1612 is formed in the lens 1611, and an image is projected onto the lens 1611.

[0070] The control device 1612 functions as a power source that supplies power to the imaging device and the display device, and controls the operation of the imaging device and the display device. The control device may have a gaze detection unit that detects the gaze of the wearer. Infrared light may be used to detect the gaze. The infrared light emitting unit emits infrared light toward the eyeball of the user who is gazing at the displayed image. An imaging unit with a light receiving element detects the reflected light of the emitted infrared light from the eyeball, thereby obtaining an image of the eyeball. By having a reduction means that reduces light from the infrared light emitting unit to the display unit in a planar view, degradation of image quality is reduced.

[0071] The gaze of the user relative to the displayed image is detected from an image of the eyeball obtained by capturing infrared light. Any known method can be used for gaze detection using an image of the eyeball. One example is a gaze detection method based on the Purkinje image formed by reflection of irradiated light on the cornea.

[0072] More specifically, gaze detection processing is performed based on the pupil-corneal reflex method, which calculates a gaze vector representing the direction (rotation angle) of the eyeball based on the pupil image and Purkinje image included in the captured image of the eyeball, thereby detecting the user's gaze.

[0073] The display device according to this embodiment may have an imaging device having a light receiving element, and may control the image displayed on the display device based on information about the user's line of sight from the imaging device.

[0074] Specifically, the display device determines a first display area where the user gazes and a second display area other than the first display area based on the line-of-sight information. The first display area and the second display area may be determined by a control device of the display device, or may be determined by an external control device and received. In the display area of the display device, the display resolution of the first display area may be controlled to be higher than the display resolution of the second display area. In other words, the resolution of the second display area may be lower than that of the first field of view area.

[0075] The display area includes a first display area and a second display area different from the first display area, and a high-priority area is determined from the first display area and the second display area based on line-of-sight information. The first and second view areas may be determined by a control device of the display device, or may be determined by an external control device and received. The resolution of the high-priority area may be controlled to be higher than the resolution of areas other than the high-priority area. In other words, the resolution of an area with a relatively low priority may be lowered.

[0076] Note that AI (Artificial Intelligence) may be used to determine the first display area and the area with high priority. The AI may be a model configured to estimate the angle of gaze and the distance to an object in the line of sight from the image of the eyeball, using as training data an image of the eyeball and the direction in which the eyeball in the image was actually looking. The AI program may be included in the display device, the imaging device, or an external device. If included in the external device, it is transmitted to the display device via communication.

[0077] When display control is performed based on visual recognition detection, the smart glasses can be preferably applied to smart glasses that further include an imaging device for capturing images of the outside world. The smart glasses can display captured external information in real time.

[0078] As described above, by using a device using the organic light-emitting element according to this embodiment, it is possible to provide a stable display with good image quality even over a long period of time.

[0079] (Other embodiments) The disclosure of the present specification includes the following light emitting device and apparatus using the light emitting device. (Item 1) A light emitting device comprising: a substrate including a light emitting pixel array having a plurality of light emitting pixels, each of which includes a light emitting element and a drive transistor that drives the light emitting element; a power supply wiring that supplies a power supply voltage to the drive transistor; and a capacitance section that includes a first electrode and a second electrode, the light-emitting element has a first electrode layer, a light-emitting layer disposed on the first electrode layer, and a second electrode layer disposed on the light-emitting layer; A light-emitting device characterized in that the first electrode and the second electrode are positioned below the height of the bottom surface of the first electrode layer, the first electrode is electrically connected to the power supply wiring, and the second electrode is electrically connected to the second electrode layer. (Item 2) 2. The light-emitting device according to item 1, wherein the capacitance section is arranged to overlap a first region between the edge of the substrate and the light-emitting pixel array in a plan view. (Item 3) 3. The light-emitting device according to item 2, wherein the first region includes an edge of an organic layer including the light-emitting layer. (Item 4) 3. The light-emitting device according to item 2, wherein the first region includes a region in which a plurality of non-light-emitting pixels are arranged in a planar view, and each of the plurality of non-light-emitting pixels has the capacitance portion. (Item 5) 5. The light-emitting device according to any one of items 1 to 4, characterized in that wiring electrically connecting the second electrode and the second electrode layer is provided between the light-emitting pixels arranged in the light-emitting pixel array. (Item 6) 6. The light emitting device according to any one of items 1 to 5, wherein the capacitance section has a MOM structure. (Item 7) 6. The light emitting device according to any one of items 1 to 5, wherein the capacitance section has an MIM structure. (Item 8) 6. The light emitting device according to any one of items 1 to 5, wherein the capacitance section has a MOS structure. (Item 9) Item 9. The light-emitting device according to any one of items 1 to 8, characterized in that a peripheral circuit that controls the light-emitting pixel array is provided on the substrate, and the first electrode and the second electrode are arranged between an area in which the peripheral circuit is arranged and the light-emitting pixel array in a planar view. (Item 10) The light-emitting device described in any one of items 1 to 9, characterized in that the substrate further includes a first wiring that supplies a voltage to the second electrode layer and a second wiring that supplies a reference voltage between the power supply voltage and the voltage applied to the second electrode layer. (Item 11) Item 11. The light-emitting device described in item 10, characterized in that the electrical capacitance between the power supply wiring and the first wiring is greater than either the electrical capacitance between the power supply wiring and the second wiring or the electrical capacitance between the first wiring and the second wiring. (Item 12) 12. The light emitting device according to any one of items 1 to 11, wherein the capacitance section is disposed in an area outside the four sides of the light emitting pixel array. (Item 13) 13. The light emitting device according to any one of items 1 to 12, wherein the first electrode is an anode electrode of the light emitting element, and the second electrode is a cathode electrode of the light emitting element. (Item 14) a photosensitive member, an exposure light source for exposing the photosensitive member, a developing device for applying a developer to the exposed photosensitive member, and a transfer device for transferring an image developed by the developing device onto a recording medium, 14. An image forming apparatus, characterized in that the exposure light source comprises the light emitting device according to any one of items 1 to 13. (Item 15) 14. An imaging device comprising: an optical unit having a plurality of lenses; an imaging element that receives light that has passed through the optical unit; and a display unit that displays an image captured by the imaging element, wherein the display unit comprises a light-emitting device according to any one of items 1 to 13. (Item 16) 14. A display device comprising: a display unit having the light-emitting device according to any one of items 1 to 13; and a housing in which the display unit is provided. (Item 17) 14. An electronic device comprising: a display unit having the light-emitting device according to any one of items 1 to 13; a housing in which the display unit is provided; and a communication unit provided in the housing and configured to communicate with an external device. (Item 18) A wearable device having a display device for displaying an image, 14. A wearable device, wherein the display device comprises the light-emitting device according to any one of items 1 to 13.

[0080] The invention is not limited to the above-described embodiments, and various changes and modifications can be made without departing from the spirit and scope of the invention. Accordingly, the following claims are appended to apprise the public of the scope of the invention. [Explanation of symbols]

[0081] 102: light-emitting pixel array, 124: power supply wiring, 125: cathode electrode, 126: bypass capacitor, 131: G color filter, 132: R color filter, 134: bank, 135: organic layer, 136: anode electrode, 139: connection wiring, 140: electrode, 141, 142: MIM electrode, 143, 144: MIM insulating film, 145, 146: MIM counter electrode, 151: organic layer recession portion, 153: cathode contact portion, 155: peripheral circuit portion

Claims

1. A light emitting device comprising: a substrate including a light emitting pixel array having a plurality of light emitting pixels, each of which includes a light emitting element and a drive transistor that drives the light emitting element; a power supply wiring that supplies a power supply voltage to the drive transistor; and a capacitance section that includes a first electrode and a second electrode, the light-emitting element has a first electrode layer, a light-emitting layer disposed on the first electrode layer, and a second electrode layer disposed on the light-emitting layer; a light-emitting device characterized in that the first electrode and the second electrode are positioned below the height of the bottom surface of the first electrode layer, the first electrode is electrically connected to the power supply wiring, and the second electrode is electrically connected to the second electrode layer.

2. The light-emitting device according to claim 1 , wherein the capacitance section is arranged so as to overlap a first region between an edge of the substrate and the light-emitting pixel array in a plan view.

3. The light-emitting device according to claim 2 , wherein the first region includes an edge of an organic layer including the light-emitting layer.

4. 3. The light emitting device according to claim 2, wherein the first region includes a region in which a plurality of non-light emitting pixels are arranged in a plan view, and the plurality of non-light emitting pixels each have the capacitance portion.

5. 2. The light emitting device according to claim 1, wherein wiring electrically connecting the second electrode and the second electrode layer is provided between the light emitting pixels arranged in the light emitting pixel array.

6. 2. The light emitting device according to claim 1, wherein the capacitance section has a metal-oxide-semiconductor (MOM) structure.

7. 2. The light emitting device according to claim 1, wherein the capacitance section has an MIM structure.

8. 2. The light emitting device according to claim 1, wherein the capacitance section has a MOS structure.

9. 2. The light-emitting device according to claim 1, wherein the substrate is provided with a peripheral circuit that controls the light-emitting pixel array, and the first electrode and the second electrode are arranged between the area in which the peripheral circuit is arranged and the light-emitting pixel array in a planar view.

10. 2. The light-emitting device according to claim 1, wherein the substrate further includes a first wiring for supplying a voltage to the second electrode layer and a second wiring for supplying a reference voltage between the power supply voltage and the voltage applied to the second electrode layer.

11. 11. The light-emitting device according to claim 10, wherein the electrical capacitance between the power supply wiring and the first wiring is greater than either the electrical capacitance between the power supply wiring and the second wiring or the electrical capacitance between the first wiring and the second wiring.

12. The light emitting device according to claim 1 , wherein the capacitance section is disposed in an area outside the four sides of the light emitting pixel array.

13. 2. The light emitting device according to claim 1, wherein the first electrode is an anode electrode of the light emitting element, and the second electrode is a cathode electrode of the light emitting element.

14. a photosensitive member, an exposure light source for exposing the photosensitive member, a developing device for applying a developer to the exposed photosensitive member, and a transfer device for transferring an image developed by the developing device onto a recording medium, An image forming apparatus, comprising the light emitting device according to claim 1 as the exposure light source.

15. 14. An imaging device comprising: an optical section having a plurality of lenses; an imaging element that receives light that has passed through the optical section; and a display section that displays an image captured by the imaging element, wherein the display section comprises a light-emitting device according to any one of claims 1 to 13.

16. A display device comprising: a display portion having the light-emitting device according to claim 1; and a housing in which the display portion is provided.

17. 14. An electronic device comprising: a display unit having the light-emitting device according to claim 1; a housing in which the display unit is provided; and a communication unit provided in the housing for communicating with an external device.

18. A wearable device having a display device for displaying an image, A wearable device, wherein the display device comprises the light-emitting device according to claim 1 .

Citation Information

Patent Citations

  • Electro-optic device and electronic apparatus

    JP2013238723A