Silicon substrate evaluation method

Abstract

To provide an evaluation method for accurately measuring Si{110} surface having a complicated structure and forming step bunching.SOLUTION: A silicon substrate evaluation method evaluates surface shape by measuring a silicon substrate surface in which a plane direction of the principal plane is {110} with an atomic force microscope (AFM). A measurement region using the atomic force microscope includes an evaluation object area and is larger than evaluation object area. The evaluation method measures an area other than the evaluation object area within the measurement region first, and then measures the evaluation object area.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a method for evaluating a silicon substrate. [Background technology]

[0002] Instead of the fin structure currently used in logic ICs, GAA (Gate-All-Around) structures and CFETs (Complementary Field Effect Transistors) stacking NMOS and CMOS have been proposed for next-generation semiconductors and are being actively researched and developed. In this regard, the use of the (110) plane orientation of silicon (hereinafter also referred to as "Si"), one of several available, is being considered as a method for improving hole mobility (Non-Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Laid-Open No. 2008-091887 [Patent Document 2] Japanese Patent Application Laid-Open No. 2006-100596 [Patent Document 3] Japanese Patent Application Laid-Open No. 2008-088045 [Patent Document 4] Japanese Patent Application Laid-Open No. 2014-239184 [Patent Document 5] Japanese Patent Application Laid-Open No. 2008-091891 [Patent Document 6] Japanese Patent Application Laid-Open No. 2009-302140 [Patent Document 7] Japanese Patent Application Laid-Open No. 2008-109014 [Non-patent literature]

[0004] [Non-Patent Document 1] The 1st Workshop of the Industry-Academia Collaboration Committee on Crystal Growth, Processing, and Evaluation of Semiconductors of the Japan Society of Applied Physics: "Crystal Technology Supporting the Revival of Semiconductors" [Non-patent document 2] Yamada et al., "Fabrication of Si(110)-16×2 Single Domain Surface," Surface Science, 29(7), 401(2008) [Non-patent document 3] Miyaji et al., "Observation of Si(110) reconstructed surface by ultra-high vacuum non-contact atomic force microscopy," Journal of the Japan Institute of Metals, 72(4), 290(2008) [Non-patent document 4] Ueba, "Fundamentals of epitaxial growth: strain, diffusion, and step motion," Journal of the Japanese Society for Crystal Growth, 43(4), 213(2016) [Non-patent document 5] Hans-Jurgen Butt, Karlheinz Graf, Michael Kappl, “Physics and Chemistry of Interfaces”, Third, Revised and Enlarged Ed., WILEY-VCH Verlag GmbH & Co. KGaA, Germany 2013, / Translated by Yoshihito Suzuki and Koji Fukao, “Physics and Chemistry of Interfaces”, Maruzen, 2016 Summary of the Invention [Problem to be solved by the invention]

[0005] However, problems with Si(110) substrates have been pointed out, such as high surface roughness and haze (Non-Patent Document 1). Haze, also known as the degree of cloudiness of the surface, is a measure of surface roughness expressed as the degree of light scattering, with higher haze indicating a rougher surface. Furthermore, the most stable structure of the Si(110) outermost surface has only been identified relatively recently (Non-Patent Documents 2 and 3).

[0006] Furthermore, as described in Non-Patent Documents 2 and 3, in the surface structure of Si(110), the most stable structure, 16x2 domain (a region with a single structural unity), undergoes a phase transition depending on the temperature, and the structure changes in the range of 600 to 800°C.

[0007] In this temperature range, for example, hydrogen baking for silicon epitaxial growth and subsequent silicon epitaxial growth exceed 1000°C, so the surface structure will initially become a 1x1 structure, but a phase change will occur during cooling, and the surface structure will change depending on the time passed during cooling.

[0008] This structural change also leads to the phenomenon of step bunching. Step bunching is a phenomenon in which atomic-level steps exist on the wafer surface of semiconductor materials such as silicon, and when the atoms on the surface move due to heat treatment or other processes, these steps gather together, forming larger steps. Furthermore, for example, SiGe, which is stacked in GAA and CFETs, is often processed at temperatures exactly within this range, making it easy to imagine that this makes understanding the surface structure even more difficult. The phenomenon associated with this phase change creates a large bias, hindering our understanding of other phenomena (such as defects and contamination behavior).

[0009] This unique top surface structure of the Si(110) surface also affects the surface structure after etching. The step edges of the 16x2 domain surface structure are not single-atom structures like Si(100), but have a two-atom step. When the energy of the reaction system is low (equilibrium reaction), the reaction proceeds at the top surface atoms, resulting in a linear structure of the surface after etching surrounded by the first-nearest-neighbor Si(111) atoms. On the other hand, when the energy of the reaction system is high, the top surface and atoms below it become involved in the reaction, resulting in a square shape surrounded by the second-nearest-neighbor Si(111) atoms.

[0010] For Si(110) with such a surface state, Patent Document 1 discloses a method for reducing surface roughness by tilting the orientation during epitaxial growth. Patent Document 2 discloses the same epitaxial growth method, but specifying the cooling rate and surface protection. Furthermore, Patent Document 3 discloses a method for similarly reducing surface roughness by specifying the surface orientation during crystal growth rather than during epitaxial growth. Patent Document 4 discloses polishing the epitaxial surface. Patent Document 5 discloses a technology different from Patent Document 1 in that it uses an LPD detection size.

[0011] Furthermore, Patent Document 6 discloses a method of measuring surface roughness caused by step terraces, which affects surface particle measurement, with an atomic force microscope (AFM), and then etching with ammonium fluoride, etc., as a countermeasure against this effect. Patent Document 7 discloses a method of evaluating the surface roughness of a semiconductor wafer with an AFM and eliminating the effect of natural oxide films on the surface.

[0012] As described above, the Si(110) substrate surface has a very complex shape, making it very difficult to evaluate. In particular, understanding the step-terrace structure of the Si(110) substrate surface is extremely important for preventing haze and other problems.

[0013] However, unlike Si(100) substrates, Si(110) substrates in particular have a unique structure with a 16x2 domain as their most stable structure, and it is known that various stable structures exist in the temperature range of approximately 600-800°C. This causes structural changes, resulting in step bunching. As a result, the step-terrace structure of the surface is very complex, and it is extremely difficult to obtain accurate surface structure data using conventional AFM evaluation, especially at high magnifications.

[0014] The present invention has been made to solve the above problems, and has as its object to provide an evaluation method for accurately measuring Si{110} surfaces that have a complex structure due to step bunching. [Means for solving the problem]

[0015] The present invention has been made to achieve the above-mentioned object, and provides a method for evaluating a silicon substrate, in which the surface of a silicon substrate having a principal surface with a plane orientation of {110} is measured by an atomic force microscope (AFM) to evaluate the surface shape, characterized in that the measurement area measured by the atomic force microscope is an area that includes an evaluation target area and is larger than the evaluation target area, and an area of ​​the measurement area other than the evaluation target area is measured in advance, and then the evaluation target area is measured.

[0016] According to this method for evaluating a silicon substrate, the surface of a Si{110} substrate having a complex surface structure can be accurately measured in AFM measurement, particularly at high magnification.

[0017] In this case, the measurement region can be an area obtained by enlarging the evaluation target region by 1.5 times in the direction perpendicular to the scanning direction of the atomic force microscope.

[0018] This allows for more accurate measurement of the surface of the Si{110} substrate.

[0019] In this case, the evaluation target area can be set to 0.5 μm square or less.

[0020] This allows accurate measurement of the surface of a Si{110} substrate even at higher magnifications.

[0021] In this case, the evaluation target area can be set to 0.1 μm square or less.

[0022] This allows accurate measurement of the surface of a Si{110} substrate even at higher magnifications. [Effects of the Invention]

[0023] As described above, the silicon substrate evaluation method of the present invention makes it possible to accurately measure the Si{110} surface, which has a complex structure due to step bunching, using an AFM, and to obtain a precise AFM image without distortion. [Brief explanation of the drawings]

[0024] [Figure 1] 1 shows an example of a measurement area in the Si substrate evaluation method of the present invention. [Figure 2] 1 shows an example of an AFM image of the surface of a Si(110) substrate according to the example. [Figure 3] An example of step bunching on the surface of a Si(110) single crystal substrate is shown. [Figure 4] 1 shows an example of an AFM image of the surface of a Si(110) substrate as a comparative example. DETAILED DESCRIPTION OF THE INVENTION

[0025] The present invention will be described in detail below, but the present invention is not limited thereto.

[0026] As mentioned above, there was a need for an evaluation method that could accurately measure the Si{110} surface, which has a complex structure due to step bunching.

[0027] As a result of extensive research into the above-mentioned problems, the present inventors have found that a method for evaluating a silicon substrate, in which the surface of a silicon substrate having a principal surface with a plane orientation of {110} is measured by an atomic force microscope (AFM) to evaluate the surface shape, is characterized in that the measurement area by the atomic force microscope is an area that includes a target region to be evaluated but is larger than the target region to be evaluated, and an area of ​​the measurement area other than the target region to be evaluated is measured in advance before measuring the target region to be evaluated, makes it possible to accurately measure a Si{110} surface that has a complex structure due to step bunching using an AFM, and to obtain a high-resolution AFM image without distortion, and have completed the present invention.

[0028] Hereinafter, an embodiment of the present invention will be described with reference to the drawings.

[0029] In the present invention, a plane orientation of {110} includes a plane equivalent to (110), and also includes a plane having an off angle of 0.23 to 0.5 degrees from the {110} plane.

[0030] As mentioned above, it has been reported that the stable structure of the surface of a Si(110) substrate varies depending on the temperature (Non-Patent Documents 2 and 3). As a result, the step bunching phenomenon occurs, as described in Non-Patent Document 4. This is a phenomenon in which the steps form compressional waves at temperatures at which the steps move (around 600°C or higher in the case of Si(110)).

[0031] Non-Patent Document 4 describes the results of a Monte Carlo simulation (Fig. 3) of the compressional waves of steps formed by step bunching. As shown in Fig. 3, when the vertical axis represents time and the horizontal axis represents the direction perpendicular to the steps (step position), it describes how the step shape changes over time due to step bunching.

[0032] One method for evaluating such surface structures (step-terrace structures) is the atomic force microscope (AFM). The AFM device measures the surface shape by scanning the sample surface with a tip attached to a cantilever. The tip moves up and down in response to the unevenness of the sample surface, and to measure this up and down movement, laser light is focused on the back surface of the cantilever. The laser light reflected from this back surface toward a detector changes direction as the cantilever bends, and is measured. By adjusting the Z direction using a feedback mechanism to keep the cantilever deflection constant, the height of the sample is plotted and the surface shape is obtained (Non-Patent Document 5).

[0033] A tunneling current flows between the cantilever and the sample (in the case of a conductive material such as a semiconductor), and this tunneling current is proportional to the distance between the cantilever tip and the sample as well as the work function. For this reason, if the distance between the sample and the cantilever changes suddenly, especially at the start of measurement, the tunneling current changes suddenly, which can distort the image.

[0034] When step bunching occurs on the surface of a Si{110} substrate, the surface takes on a complex shape as described above, and when AFM measurement is performed, the image may actually be distorted, as shown in Figure 4.

[0035] Therefore, by applying an evaluation method in which the AFM measurement area, which is the silicon substrate evaluation method of the present invention, is set to an area that includes the evaluation target area but is larger than the evaluation target area, and the area of ​​the measurement area other than the evaluation target area is measured in advance, and then the evaluation target area is measured, it becomes possible to obtain an image without distortion as shown in Figure 2.

[0036] This is because the area outside the area to be evaluated is designated as a "sacrificial area" and the probe is allowed to settle in the "sacrificial area" beforehand, which reduces the effect of surface charging caused by changes in tunneling current due to sudden changes in the distance between the sample and the cantilever (reducing the potential difference between the semiconductor substrate and the cantilever).As a result, a detailed image of the surface structure of the Si{110} substrate can be obtained.

[0037] An example of an AFM measurement area in the Si substrate evaluation method of the present invention is shown in Figure 1. As shown in Figure 1, measurement area 1 includes an evaluation target area 3 and an area other than the evaluation target area (a discarded area) 2. Measurement starts from the upper left corner of measurement area 1 (measurement start point 4).

[0038] In this case, the measurement region 1 can be set to a region obtained by enlarging the evaluation target region 3 by 1.5 times in the direction perpendicular to the scanning direction of the AFM. This allows for more accurate measurement of the surface of the Si{110} substrate.

[0039] The method for evaluating a Si substrate of the present invention can be suitably applied when the evaluation target area 3 is 0.5 μm square or less, more preferably 0.1 μm square or less, at a high magnification. This allows accurate measurement of the surface of a Si{110} substrate even at higher magnifications such as those described above. [Example]

[0040] The present invention will be specifically explained below with reference to examples, but the present invention is not limited to these examples.

[0041] (Example) A single-crystal silicon substrate with a diameter of 300 mm, a surface orientation of (110), boron doped, a resistivity of 10 Ω·cm, and an off-angle of 0.237 degrees was prepared and annealed at a temperature of 1080°C for 600 seconds under a pressure of approximately 666.6 Pa (5 Torr).

[0042] After annealing, AFM measurements were performed on a 0.1 μm square area using the Si substrate evaluation method of the present invention, followed by measurements of a preset sacrificial area. The results are shown in Figure 2. As shown in Figure 2, a precise AFM image without distortion was obtained.

[0043] (Comparative Example) The same single crystal silicon substrate as in the example was prepared and annealed under the same conditions as in the example.

[0044] After annealing, AFM measurement was performed on a 0.1 μm square area using the standard method. As a result, image distortion was observed, as shown in Figure 4.

[0045] As described above, according to the embodiment of the present invention, a precise AFM image without distortion could be obtained in AFM measurement of the Si(110) substrate surface where step bunching occurred.

[0046] The present specification includes the following aspects. [1]: A method for evaluating a silicon substrate, in which the surface of a silicon substrate having a principal surface with a plane orientation of {110} is measured by an atomic force microscope (AFM) to evaluate the surface shape, the method comprising: setting a measurement area by the atomic force microscope to an area that includes an evaluation target area and is larger than the evaluation target area; measuring an area of ​​the measurement area other than the evaluation target area in advance; and then measuring the evaluation target area. [2]: The method for evaluating a silicon substrate according to [1] above, wherein the measurement region is an area obtained by enlarging the evaluation target region by 1.5 times in a direction perpendicular to the scanning direction of the atomic force microscope. [3]: The method for evaluating a silicon substrate according to [1] or [2] above, wherein the evaluation target area is 0.5 μm square or less. [4]: The method for evaluating a silicon substrate according to [1], [2], or [3] above, which comprises making the evaluation target area 0.1 μm square or less.

[0047] The present invention is not limited to the above-described embodiments. The above-described embodiments are merely examples, and anything that has substantially the same configuration as the technical idea described in the claims of the present invention and that exhibits similar effects is included within the technical scope of the present invention. [Explanation of symbols]

[0048] 1...measurement area, 2...area other than the evaluation target area (discard area), 3...evaluation target area, 4...Measurement starting point.

Claims

1. A method for evaluating a silicon substrate, comprising measuring a surface of a silicon substrate having a principal surface with a plane orientation of {110} using an atomic force microscope (AFM) to evaluate a surface shape, the method comprising: The measurement area by the atomic force microscope is set to an area that includes an evaluation target area and is larger than the evaluation target area, A method for evaluating a silicon substrate, comprising: measuring a region other than the evaluation target region in the measurement region in advance; and then measuring the evaluation target region.

2. 2. The method for evaluating a silicon substrate according to claim 1, wherein the measurement region is an area obtained by enlarging the evaluation target region by 1.5 times in a direction perpendicular to the scanning direction of the atomic force microscope.

3. 2. The method for evaluating a silicon substrate according to claim 1, wherein the evaluation target area is 0.5 μm square or less.

4. 4. The method for evaluating a silicon substrate according to claim 1, wherein the evaluation target area is 0.1 μm square or less.

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