Method of encoding picture, apparatus for encoding picture on coded video bitstream, non-transitory computer readable medium, computer program, and data structure

Abstract

To provide a method of decoding a picture from a video bitstream, implemented by a decoding device, a program, an encoder, a decoder, and a non-transitory computer readable medium.SOLUTION: A method includes: a step of receiving a bitstream including a slice header of a current slice and data representing the current slice, and obtaining a parameter used to derive the number of tiles in the current slice from the slice header when a condition is satisfied, the condition including that the slice address of the current slice is not an address of the last tile in the picture where the current slice located; and a step of reconstructing the current slice using the number of tiles in the current slice and the data representing the current slice.SELECTED DRAWING: Figure 14

Description

[Technical Field]

[0001] FIELD Embodiments of the present disclosure relate generally to the field of image processing, and more specifically to simplifying signaling slice header syntax elements. [Background technology]

[0002] Video coding (video encoding and decoding) is used in a wide range of digital video applications, such as broadcast digital TV, video transmission over the Internet and mobile networks, or real-time interactive applications such as video chat, video conferencing, DVD and Blu-ray discs, video content acquisition and editing systems, and camcorders in security applications.

[0003] The amount of video data required to show even a relatively short video can be substantial, which can result in difficulties when the data is to be streamed or otherwise communicated over communication networks with limited bandwidth capacity. Therefore, video data is typically compressed before being communicated over modern telecommunications networks. The size of the video can also be an issue when the video is stored on a storage device, as memory resources may be limited. Video compression devices often use software and / or hardware at the source to code the video data before transmission or storage, thereby reducing the amount of data needed to represent a digital video image. The compressed data is then received at the destination by a video decompression device, which decodes the video data. With limited network resources and an ever-increasing demand for higher video quality, improved compression and decompression techniques that improve compression ratios with little or no sacrifice in image quality are desirable. Summary of the Invention

[0004] Embodiments of the present disclosure provide apparatus and methods for encoding and decoding as set forth in the independent claims.

[0005] The present invention provides the following:

[0006] A method for decoding an image from a video bitstream, implemented by a decoding device, the bitstream including a slice header of a current slice and data representing the current slice, the method including: obtaining a parameter (e.g., um_tiles_in_slice_minus1) used to derive the number of tiles in the current slice from the slice header when a condition is met, the condition including that the slice address (e.g., slice_address) of the current slice is not the address of the last tile in the image in which the current slice is positioned; and reconstructing the current slice using the number of tiles in the current slice and the data representing the current slice.

[0007] In the method, as described above, determining that the slice address of the current slice is the address of the last tile in the image may include determining that the number of tiles in the image minus the slice address of the current slice is equal to 1.

[0008] In the method, as described above, determining that the slice address of the current slice is not the address of the last tile in the image may include determining that the number of tiles in the image (e.g., NumTilesInPic) minus the slice address of the current slice is greater than 1.

[0009] Therefore, according to the present invention, the presence of an image header structure in a slice header can be used to control the presence of a slice address and the number of tiles in a slice indication. If a single slice exists in an image, the slice address must be equal to the first tile in the image, and the number of tiles in the slice must be equal to the number of tiles in the image. Therefore, this can improve compression efficiency.

[0010] In the method described above, the value of the parameter for the current slice may be inferred to be equal to the default value if the condition is not met.

[0011] In the method described above, the default value may be equal to 0.

[0012] In the method described above, the slice address may be in tile units.

[0013] In the method as described above, the condition may further include determining that the current slice is in a raster scan mode.

[0014] In the method described above, the step of reconstructing the current slice using the number of tiles in the current slice may include the steps of determining a scan order of coding tree units in the current slice using the number of tiles in the current slice, and reconstructing the coding tree units in the current slice using the scan order.

[0015] The present invention further provides a method for encoding a video bitstream, implemented by an encoding device, wherein the bitstream includes a slice header of a current slice and data representing the current slice, the method comprising: encoding parameters used to derive the number of tiles in the current slice from the slice header when a condition is met, the condition including that the slice address of the current slice is not the address of the last tile in the image in which the current slice is positioned; and reconstructing the current slice using the number of tiles in the current slice and the data representing the current slice.

[0016] The present invention further provides an apparatus for decoding an image from a video bitstream, the bitstream including a slice header for a current slice and data representing the current slice, the apparatus including: an acquisition unit configured to acquire parameters used to derive a number of tiles in the current slice from the slice header when a condition is met, the condition including a slice address of the current slice not being the address of the last tile in the image in which the current slice is located; and a reconstruction unit configured to reconstruct the current slice using the number of tiles in the current slice and the data representing the current slice.The present invention further provides an apparatus for encoding an image from a coded video bitstream, the bitstream including a slice header for the current slice and data representing the current slice, the apparatus including: an encoding unit configured to encode parameters used to derive the number of tiles in the current slice from the slice header when a condition is met, the condition including a slice address of the current slice not being the address of the last tile in the image in which the current slice is located; and a reconstruction unit configured to reconstruct the current slice using the number of tiles in the current slice and the data representing the current slice.

[0017] The present invention further provides an encoder including a processing circuit for performing the method for encoding a video bitstream as described above.

[0018] The present invention further provides a decoder including a processing circuit for performing the method for decoding a video bitstream as described above.

[0019] The invention further provides a computer program product comprising program code for performing the method for encoding a video bitstream as described above or the method for decoding a video bitstream as described above when executed on a computer or processor, respectively.

[0020] The present invention further provides a decoder including one or more processors and a non-transitory computer-readable storage medium coupled to the processors and storing programming for execution by the processors, the programming, when executed by the processors, configuring the decoder to perform the method for decoding a video bitstream as described above.

[0021] The present invention further provides an encoder including one or more processors and a non-transitory computer-readable storage medium coupled to the processors and storing programming for execution by the processors, the programming, when executed by the processors, configuring the encoder to perform a method for encoding a video bitstream as described above.

[0022] The present invention further provides a non-transitory computer readable medium carrying program code which, when executed by a computing device, causes the computing device to perform the method for encoding a video bitstream as described above or the method for decoding a video bitstream as described above.

[0023] The present invention further provides a non-transitory storage medium containing a video bitstream, the bitstream including a slice header of a current slice and data representing the current slice, wherein the slice header includes a slice address of the current slice, and wherein, if a condition is met, the slice header further includes a parameter used to derive the number of tiles in the current slice from the slice header, and the condition includes that the slice address of the current slice is not the address of the last tile in the image in which the current slice is positioned.

[0024] The details of one or more embodiments are set forth in the accompanying drawings and the description below. Other features, objects, and advantages will become apparent from the description, drawings, and claims. [Brief explanation of the drawings]

[0025] In the following, embodiments of the invention will be explained in more detail with reference to the accompanying figures and drawings. [Figure 1A] 1 is a block diagram illustrating an example of a video coding system configured to implement embodiments of the present invention. [Figure 1B] FIG. 2 is a block diagram illustrating another example of a video coding system configured to implement embodiments of the present invention. [Figure 2] 1 is a block diagram illustrating an example of a video encoder configured to implement embodiments of the present invention. [Figure 3] 1 is a block diagram illustrating an exemplary structure of a video decoder configured to implement embodiments of the present invention. [Figure 4] 1 is a block diagram illustrating an example of an encoding or decoding device. [Figure 5] FIG. 10 is a block diagram illustrating another example of an encoding device or a decoding device. [Figure 6] FIG. 10 is a diagram illustrating an example of an image divided into CTUs. [Figure 7]FIG. 10 is a diagram illustrating an example of a raster scan order. [Figure 8] FIG. 2 illustrates examples of tiles, slices, and sub-images. [Figure 9] 1 shows an example of the raster scan order in an image of a CTU and one slice within the image. [Figure 10] FIG. 1 illustrates an image partitioned into 12 tiles and 3 slices. [Figure 11] FIG. 1 is a block diagram illustrating an example of an LMCS architecture. [Figure 12] 31 is a block diagram illustrating an exemplary structure of a content supply system 3100 for implementing a content distribution service. [Figure 13] FIG. 2 is a block diagram illustrating the structure of an example terminal device. [Figure 14] FIG. 2 illustrates a flowchart of a video bitstream decoding method according to an embodiment of the present disclosure. [Figure 15] FIG. 2 illustrates a flowchart of a video bitstream decoding method according to an embodiment of the present disclosure. [Figure 16] FIG. 2 illustrates a decoder for decoding a video bitstream according to an embodiment of the present disclosure. [Figure 17] 1 illustrates an encoder for encoding a video bitstream according to an embodiment of the present disclosure.In the following, identical reference signs refer to identical or at least functionally equivalent features, unless otherwise specified. DETAILED DESCRIPTION OF THE INVENTION

[0026] In the following description, reference is made to the accompanying drawings which form a part of this disclosure and which show, by way of illustration, certain aspects of embodiments of the invention or in which embodiments of the invention may be used. It is understood that embodiments of the invention may be used in other ways and may include structural or logical changes not shown in the drawings. Therefore, the following detailed description is not to be taken in a limiting sense, and the scope of the present invention is defined by the appended claims.

[0027] For example, it is understood that disclosure related to a described method may also apply to a corresponding device or system configured to perform the method, and vice versa. For example, when one or more of the steps of a particular method are described, the corresponding device may include one or more units, e.g., functional units, to perform the described one or more method steps (e.g., one unit performing the one or more steps, or multiple units each performing one or more of the steps), even if such one or more units are not explicitly described or shown in the drawings. Conversely, for example, when a particular apparatus is described based on one or more units, e.g., functional units, the corresponding method may include one or more steps (e.g., one step performing the function of one or more units, or multiple steps each performing the function of one or more of the multiple units) to perform the function of the one or more units, even if such step is not explicitly described or shown in the drawings. Furthermore, it is understood that features of various exemplary embodiments and / or aspects described herein may be combined with each other, unless specifically noted otherwise.

[0028] Video coding typically refers to the processing of a series of images that form a video or a video sequence. In the field of video coding, the terms "frame" or "image" are sometimes used synonymously instead of the term "image." Video coding (or coding in general) includes two parts: video encoding and video decoding. Video encoding is performed on the source side and typically involves processing (e.g., by compression) the original video image to reduce the amount of data required to represent the video image (for more efficient storage and / or transmission). Video decoding is performed on the destination side and typically involves the reverse process compared to the encoder to reconstruct the video image. Embodiments referring to "coding" a video image (or images in general) shall be understood to relate to "encoding" or "decoding" the video image or the respective video sequence. The combination of the encoding and decoding parts is also referred to as a codec (coding and decoding).

[0029] In the case of lossless video coding, the original video image can be reconstructed, i.e. the reconstructed video image is of the same quality as the original video image (assuming there is no transmission or other data loss during storage or transmission). In the case of lossy video coding, further compression, e.g. by quantization, is performed to reduce the amount of data representing the video image, which cannot be perfectly reconstructed at the decoder, i.e. the quality of the reconstructed video image is reduced or degraded compared to the quality of the original video image.

[0030] Some video coding standards belong to the group of "lossy hybrid video codecs" (i.e., they combine spatial and temporal prediction in the sample domain with 2D transform coding for applying quantization in the transform domain). Each image of a video sequence is typically partitioned into a set of non-overlapping blocks, and coding is typically performed at the block level. In other words, at an encoder, video is typically processed, i.e., encoded, at the block (video block) level, for example, by generating a predictive block using spatial (intra-image) prediction and / or temporal (inter-image) prediction, subtracting the predictive block from a current block (the block currently being / to be processed) to obtain a residual block, transforming the residual block, and quantizing the residual block in the transform domain to reduce (compress) the amount of data to be transmitted; while at a decoder, in order to reconstruct the current block for representation, an inverse process is applied to the encoded or compressed block compared to the encoder. Furthermore, the encoder repeats the decoder processing loop, so that both generate the same prediction (e.g., intra- and inter-prediction) and / or reconstruction for processing, i.e., coding, of a subsequent block.

[0031] Hereinafter, embodiments of a video coding system 10, a video encoder 20, and a video decoder 30 will be described based on FIGS. 1A to 3. FIG.

[0032] 1A is a schematic block diagram illustrating an example coding system 10, e.g., video coding system 10 (or coding system 10 for short), that may use techniques of this disclosure. A video encoder 20 (or encoder 20 for short) and a video decoder 30 (or decoder 30 for short) of video coding system 10 represent examples of devices that may be configured to perform techniques in accordance with various examples described in this disclosure.

[0033] As shown in FIG. 1A, coding system 10 includes a source device 12 configured to provide encoded image data 21 to, for example, a destination device 14 for decoding the encoded image data 21.

[0034] The source device 12 includes an encoder 20 and may additionally, i.e. optionally, include an image source 16 , a preprocessor (or pre-processing unit) 18 , for example an image preprocessor 18 , and a communication interface or unit 22 .

[0035] Image source 16 may include or be any type of image capture device, e.g., a camera that captures real-world images, and / or any type of image generation device, e.g., a computer graphics processor that generates computer-animated images, or any type of other device that acquires and / or provides real-world images, computer-generated images (e.g., screen content, virtual reality (VR) images), and / or any combination thereof (e.g., augmented reality (AR) images). Image source may be any type of memory or storage that stores any of the foregoing images.

[0036] To distinguish from the preprocessor 18 and the processing performed by the preprocessing unit 18 , the image or image data 17 may also be referred to as raw image or raw image data 17 .

[0037] The pre-processor 18 is configured to receive the (raw) image data 17 and perform pre-processing on the image data 17 to obtain a pre-processed image 19 or pre-processed image data 19. The pre-processing performed by the pre-processor 18 may include, for example, cropping, color format conversion (e.g., RGB to YCbCr), color correction, or noise removal. It will be understood that the pre-processing unit 18 may be an optional component.

[0038] Video encoder 20 is configured to receive pre-processed image data 19 and to provide encoded image data 21 (further details are described below, eg, with reference to FIG. 2).

[0039] The communication interface 22 of the source device 12 may be configured to receive the encoded image data 21 via the communication channel 13 and to transmit the encoded image data 21 (or any further processed version thereof) to another device, such as the destination device 14 or any other device, for storage or direct reconstruction.

[0040] The destination device 14 includes a decoder 30 (e.g., a video decoder 30), and may additionally, i.e. optionally, include a communication interface or communication unit 28, a post-processor 32 (or post-processing unit 32), and a display device 34.

[0041] The communications interface 28 of the destination device 14 is configured to receive the encoded image data 21 (or any further processed version thereof), for example directly from the source device 12 or from any other source, for example a storage device, for example an encoded image data storage device, and to provide the encoded image data 21 to a decoder 30.

[0042] The communication interface 22 and the communication interface 28 may be configured to transmit or receive the encoded image data 21 or the encoded data 13 between the source device 12 and the destination device 14 via a direct communication link, e.g., a direct wired or wireless connection, or via any type of network, e.g., a wired or wireless network or any combination thereof, or any type of private and public network or any combination thereof.

[0043] The communications interface 22 may be configured, for example, to package the encoded image data 21 into a suitable format, for example into packets, and / or to process the encoded image data using any type of transmission encoding or processing for transmission over a communications link or network.

[0044] The communications interface 28, which forms a counterpart to the communications interface 22, may be configured, for example, to receive the transmitted data and process the transmitted data using any type of corresponding transmission decoding or processing and / or depackaging to obtain the encoded image data 21.

[0045] Both communication interface 22 and communication interface 28 may be configured as unidirectional communication interfaces, as indicated by the arrows of communication channel 13 pointing from source device 12 to destination device 14 in FIG. 1A, or as bidirectional communication interfaces, e.g., configured to send and receive messages, e.g., establish connections, and confirm and exchange communication links and / or any other information related to data transmission, e.g., encoded image data transmission.

[0046] The decoder 30 is configured to receive the encoded image data 21 and provide decoded image data 31 or a decoded image 31 (further details are described below, for example, with reference to Figure 3 or Figure 5).

[0047] The post-processor 32 of the destination device 14 is configured to post-process the decoded image data 31 (also called reconstructed image data), e.g., the decoded image 31, to obtain post-processed image data 33, e.g., the post-processed image 33. The post-processing performed by the post-processing unit 32 may include, for example, color format conversion (e.g., from YCbCr to RGB), color correction, cropping or resampling, or any other processing, for example, to prepare the decoded image data 31 for display by, e.g., a display device 34.

[0048] A display device 34 of destination device 14 is configured to receive the post-processed image data 33 for displaying the image, for example, to a user or viewer. Display device 34 may be or include any type of display for presenting the reconstructed image, for example, an integrated or external display or monitor. The display may include, for example, a liquid crystal display (LCD), an organic light emitting diode (OLED) display, a plasma display, a projector, a micro LED display, a liquid crystal on silicon (LCoS), a digital light processor (DLP), or any other type of display.

[0049] 1A depicts source device 12 and destination device 14 as separate devices, an embodiment of the device may include both or both of their functionality, i.e., source device 12 or corresponding functionality and destination device 14 or corresponding functionality. In such an embodiment, source device 12 or corresponding functionality and destination device 14 or corresponding functionality may be implemented using the same hardware and / or software, or by separate hardware and / or software, or any combination thereof.

[0050] As will be apparent to those skilled in the art based on this description, the presence and (exact) division of functions of different units or functions within source device 12 and / or destination device 14, as shown in FIG. 1A, may vary depending on the actual device and application.

[0051] Encoder 20 (e.g., video encoder 20) or decoder 30 (e.g., video decoder 30), or both encoder 20 and decoder 30, may be implemented via processing circuitry as shown in FIG. 1B, such as one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), discrete logic, hardware, dedicated to video coding, or any combination thereof. Encoder 20 may be implemented via processing circuitry 46 to embody various modules described in connection with encoder 20 of FIG. 2 and / or any other encoder system or subsystem described herein. Decoder 30 may be implemented via processing circuitry 46 to embody various modules described in connection with decoder 30 of FIG. 3 and / or any other decoder system or subsystem described herein. The processing circuitry may be configured to perform various operations as described below. If the techniques are implemented partially in software, as shown in FIG. 5, a device may store instructions for the software on a suitable non-transitory computer-readable storage medium and execute the instructions using one or more processors in hardware to perform the techniques of this disclosure. Either video encoder 20 and video decoder 30 may be integrated as part of a combined encoder / decoder (codec) within a single device, for example, as shown in FIG. 1B.

[0052] Source device 12 and destination device 14 may include any of a wide range of devices, including any type of handheld or stationary device, such as a notebook or laptop computer, a mobile phone, a smartphone, a tablet or tablet computer, a camera, a desktop computer, a set-top box, a television, a display device, a digital media player, a video gaming console, a video streaming device (such as a content service server or content distribution server), a broadcast receiver device, a broadcast transmitter device, etc., and may use no operating system or any type of operating system. In some cases, source device 12 and destination device 14 may be capable of wireless communication. Thus, source device 12 and destination device 14 may be wireless communication devices.

[0053] 1A is merely an example, and the techniques of this disclosure may be applied to video coding settings (e.g., video encoding or video decoding) that do not necessarily include any data communication between an encoding device and a decoding device. In other examples, data may be retrieved from local memory, streamed over a network, etc. A video encoding device may encode and store data in memory, and / or a video decoding device may decode and retrieve data from memory. In some examples, encoding and decoding are performed by devices that do not communicate with each other but simply encode data to memory and / or retrieve and decode data from memory.

[0054] For ease of explanation, embodiments of the present invention are described herein with reference to, for example, High Efficiency Video Coding (HEVC) or Versatile Video Coding (VVC) reference software, the next-generation video coding standards developed by the ITU-T Video Coding Experts Group (VCEG) and the ISO / IEC Motion Picture Experts Group (MPEG) Joint Collaboration Team on Video Coding (JCT-VC). Those skilled in the art will understand that embodiments of the present invention are not limited to HEVC or VVC.

[0055] [Encoder and encoding method] FIG. 2 shows a schematic block diagram of an exemplary video encoder 20 configured to implement the techniques of this disclosure. In the example of FIG. 2, the video encoder 20 includes an input 201 (or input interface 201), a residual calculation unit 204, a transform processing unit 206, a quantization unit 208, an inverse quantization unit 210, an inverse transform processing unit 212, a reconstruction unit 214, a loop filter unit 220, a decoded picture buffer (DPB) 230, a mode selection unit 260, an entropy encoding unit 270, and an output 272 (or output interface 272). The mode selection unit 260 may include an inter prediction unit 244, an intra prediction unit 254, and a partitioning unit 262. The inter prediction unit 244 may include a motion estimation unit and a motion compensation unit (not shown). The video encoder 20 shown in FIG. 2 may also be referred to as a hybrid video encoder or a video encoder using a hybrid video codec.

[0056] The residual calculation unit 204, the transform processing unit 206, the quantization unit 208, and the mode selection unit 260 may be referred to as forming a forward signal path of the encoder 20, while the inverse quantization unit 210, the inverse transform processing unit 212, the reconstruction unit 214, the buffer 216, the loop filter 220, the decoded picture buffer (DPB) 230, the inter prediction unit 244, and the intra prediction unit 254 may be referred to as forming a backward signal path of the video encoder 20. The backward signal path of the video encoder 20 corresponds to the signal path of a decoder (see video decoder 30 of FIG. 3). The inverse quantization unit 210, the inverse transform processing unit 212, the reconstruction unit 214, the loop filter 220, the decoded picture buffer (DPB) 230, the inter prediction unit 244, and the intra prediction unit 254 are also referred to as forming a “built-in decoder” of the video encoder 20.

[0057] [Image and Image Segmentation (Image and Block)] Encoder 20 may be configured to receive, for example, via input 201, an image 17 (or image data 17), e.g., an image of a series of images forming a video or a video sequence. The received image or image data may be a preprocessed image 19 (or preprocessed image data 19). For simplicity, the following description will refer to image 17. Image 17 may also be referred to as a current image or a picture to be coded (particularly in video coding, to distinguish the current image from other images, e.g., previously encoded and / or decoded images of the same video sequence, i.e., a video sequence that also includes the current image). A (digital) image is or can be considered as a two-dimensional array or matrix of samples with intensity values. The samples in the array may also be called pixels (short for picture element) or pels. The number of samples in the horizontal and vertical directions (or axes) of the array or image defines the size and / or resolution of the image. Three color components are typically utilized to represent color; that is, an image may be represented by or include three sample arrays. In an RGB format or color space, an image includes corresponding red, green, and blue sample arrays. However, in video coding, each pixel is typically represented in a luminance and chrominance format or color space, such as YCbCr, which includes a luminance component denoted Y (although L may be used instead) and two chrominance components denoted Cb and Cr. The luminance (or luma for short) component Y represents brightness or gray level intensity (e.g., as in a grayscale image), and the two chrominance (or chroma for short) components Cb and Cr represent chromaticity or color information components. Thus, an image in YCbCr format includes a luminance sample array of luminance sample values ​​(Y) and two chrominance sample arrays of chrominance values ​​(Cb and Cr). An image in RGB format can be converted or transformed to YCbCr format, and vice versa; this process is also known as color conversion or translation. If the image is monochrome, the image may include only a luminance sample array. Thus, an image may be, for example, an array of luma samples in monochrome format, or an array of luma samples and two corresponding arrays of chroma samples in 4:2:0, 4:2:2, and 4:4:4 color formats.

[0058] Embodiments of video encoder 20 may include an image partitioning unit (not shown in FIG. 2 ) configured to partition image 17 into multiple (typically non-overlapping) image blocks 203. These blocks may also be referred to as root blocks, macroblocks (H.264 / AVC) or coding tree blocks (CTBs) or coding tree units (CTUs) (H.265 / HEVC and VVC). The image partitioning unit may be configured to partition each image into corresponding blocks using the same block size for all images of a video sequence and the corresponding grid that defines the block size, or to vary the block size among images or subsets or groups of images.

[0059] In a further embodiment, the video encoder may be configured to directly receive blocks 203 of image 17, e.g., one, some, or all of the blocks forming image 17. Image blocks 203 may also be referred to as current image blocks or image blocks to be coded.

[0060] Similar to image 17, image block 203 here is or can be considered to be a two-dimensional array or matrix of samples having intensity values ​​(sample values), although its dimensions are smaller than image 17. In other words, block 203 may include, for example, one sample array (e.g., a luma array for a monochrome image 17, or a luma or chroma array for a color image), or three sample arrays (e.g., a luma and two chroma arrays for a color image 17), or any other number and / or type of array depending on the applied color format. The number of samples in the horizontal and vertical directions (or axes) of block 203 defines the size of block 203. Thus, a block may be, for example, an M×N (M columns by N rows) array of samples or an M×N array of transform coefficients.

[0061] An embodiment of video encoder 20 such as that shown in FIG. 2 may be configured to encode image 17 block by block, eg, encoding and prediction is performed for each block 203.

[0062] The embodiment of the video encoder 20 shown in FIG. 2 may further be configured to partition and / or encode an image by using slices (also referred to as video slices), where an image may be partitioned or encoded using one or more slices (typically non-overlapping), and each slice may include one or more blocks (e.g., CTUs).

[0063] An embodiment of video encoder 20 as shown in FIG. 2 may be further configured to partition and / or encode an image by using tile groups (also referred to as video tile groups) and / or tiles (also referred to as video tiles), where an image may be partitioned or encoded using one or more tile groups (typically non-overlapping), each tile group may include, for example, one or more blocks (e.g., CTUs) or one or more tiles, and each tile may be, for example, rectangular in shape and may include one or more blocks (e.g., CTUs), e.g., full blocks or partial blocks.

[0064] [Residual calculation] The residual calculation unit 204 may be configured to calculate the residual block 205 (also referred to as the residual 205) based on the image block 203 and the prediction block 265 (further details regarding the prediction block 265 are provided later), for example, by subtracting the sample values ​​of the prediction block 265 from the sample values ​​of the image block 203 on a sample-by-sample (pixel-by-pixel) basis to obtain the residual block 205 in the sample domain.

[0065] [conversion] The transform processing unit 206 may be configured to apply a transform, such as a discrete cosine transform (DCT) or a discrete sine transform (DST), to the sample values ​​of the residual block 205 to obtain transform coefficients 207 in the transform domain. The transform coefficients 207 may also be referred to as transform residual coefficients and represent the residual block 205 in the transform domain.

[0066] The transform processing unit 206 may be configured to apply an integer approximation of a DCT / DST, such as the transform specified in H.265 / HEVC. Compared to an orthogonal DCT transform, such an integer approximation is typically scaled by a specific factor. To preserve the norm of the residual block processed by the forward and inverse transforms, an additional scaling factor is applied as part of the transform process. The scaling factor is typically selected based on specific constraints, such as a scaling factor that is a power of two with respect to shift operations, a bit depth of the transform coefficients, a trade-off between accuracy and implementation cost, etc. For example, a specific scaling factor may be specified for the inverse transform, e.g., by the inverse transform processing unit 212 (and a corresponding inverse transform, e.g., by the inverse transform processing unit 312 in the video decoder 30), and a corresponding scaling factor for the forward transform, e.g., by the transform processing unit 206 in the encoder 20, may be specified accordingly.

[0067] An embodiment of video encoder 20 (respectively transform processing unit 206) may be configured to encode or compress and then output transform parameters, e.g., one or more types of transform, e.g., directly or via entropy encoding unit 270, so that, for example, video decoder 30 may receive and use the transform parameters for decoding.

[0068] [Quantization] The quantization unit 208 may be configured to quantize the transform coefficients 207, for example, by applying scalar quantization or vector quantization, to obtain quantized coefficients 209. The quantized coefficients 209 may also be referred to as quantized transform coefficients 209 or quantized residual coefficients 209.

[0069] The quantization process may reduce the bit depth associated with some or all of the transform coefficients 207. For example, an n-bit transform coefficient may be rounded to an m-bit transform coefficient during quantization, where n is greater than m. The degree of quantization may be changed by adjusting the quantization parameter (QP). For example, in the case of scalar quantization, different scaling may be applied to achieve finer or coarser quantization. A smaller quantization step size corresponds to finer quantization, while a larger quantization step size corresponds to coarser quantization. The applicable quantization step size may be indicated by the quantization parameter (QP). The quantization parameter may, for example, be an index into a predefined set of applicable quantization step sizes. For example, a small quantization parameter may correspond to fine quantization (small quantization step size) and a large quantization parameter may correspond to coarse quantization (large quantization step size), or vice versa. Quantization may involve division by a quantization step size, and corresponding inverse quantization and / or dequantization, e.g., by the inverse quantization unit 210, may involve multiplication by the quantization step size. Implementations according to some standards, e.g., HEVC, may be configured to use a quantization parameter to determine the quantization step size. Generally, the quantization step size may be calculated based on the quantization parameter using a fixed-point approximation of an equation involving division. Additional scaling factors may be introduced in the quantization and dequantization to restore the norm of the residual block, which may be altered due to the scaling used in the fixed-point approximation of the quantization step size and quantization parameter equations. In one example implementation, the scaling of the inverse transform and dequantization may be combined. Alternatively, customized quantization tables may be used and signaled, e.g., in the bitstream, from the encoder to the decoder. Quantization is a lossy operation, and loss increases with increasing quantization step size.

[0070] An embodiment of video encoder 20 (respectively quantization unit 208) may be configured to encode and then output a quantization parameter (QP), e.g., directly or via entropy encoding unit 270, so that, for example, video decoder 30 may receive and apply the quantization parameter for decoding.

[0071] [Dequantization] Inverse quantization unit 210 is configured to apply the inverse quantization of quantization unit 208 to the quantized coefficients, e.g., by applying the inverse of the quantization scheme applied by quantization unit 208 based on or using the same quantization step size as quantization unit 208, to obtain dequantized coefficients 211. The dequantized coefficients 211 may also be referred to as dequantized residual coefficients 211 and correspond to the transform coefficients 207, although they are typically not identical to the transform coefficients due to loss due to quantization.

[0072] [Inverse Transformation]

[0073] The inverse transform processing unit 212 is configured to apply an inverse transform of the transform applied by the transform processing unit 206, such as an inverse discrete cosine transform (DCT) or an inverse discrete sine transform (DST) or other inverse transform, to obtain a reconstructed residual block 213 (or corresponding dequantized coefficients 213) in the sample domain. The reconstructed residual block 213 may also be referred to as a transform block 213.

[0074] [Rebuild] The reconstruction unit 214 (e.g., an adder or summator 214) is configured to add the transform block 213 (i.e., the reconstructed residual block 213) to the prediction block 265, for example, by adding, sample by sample, the sample values ​​of the reconstructed residual block 213 and the sample values ​​of the prediction block 265, to obtain a reconstructed block 215 in the sample domain.

[0075] [filtering] The loop filter unit 220 (or “loop filter” 220 for short) is configured to filter the reconstructed block 215 to obtain a filtered block 221, or generally, to filter reconstructed samples to obtain filtered samples. The loop filter unit is configured, for example, to smooth pixel transitions or otherwise improve video quality. The loop filter unit 220 may include one or more loop filters, such as a deblocking filter, a sample adaptive offset (SAO) filter, or one or more other filters, such as a bilateral filter, an adaptive loop filter (ALF), a sharpening filter, a smoothing filter, or a collaborative filter, or any combination thereof. Although the loop filter unit 220 is shown in FIG. 2 as being within the loop filter, in other configurations, the loop filter unit 220 may be implemented as a post-loop filter. The filtered block 221 may also be referred to as a filtered reconstructed block 221.

[0076] An embodiment of video encoder 20 (respectively loop filter unit 220) may be configured to encode and then output loop filter parameters (such as sample adaptive offset information), e.g., directly or via entropy encoding unit 270, so that, for example, decoder 30 may receive and apply the same loop filter parameters or respective loop filters for decoding.

[0077] [Decoded image buffer] The decoded picture buffer (DPB) 230 may be a memory that stores reference pictures, or reference image data in general, for encoding video data by the video encoder 20. The DPB 230 may be formed by any of a variety of memory devices, such as dynamic random access memory (DRAM), including synchronous dynamic random access memory (SDRAM), magnetoresistive random access memory (MRAM), resistive random access memory (RRAM), or other types of memory devices. The decoded picture buffer (DPB) 230 may be configured to store one or more filtered blocks 221. The decoded picture buffer 230 may further be configured to store other previously filtered blocks, e.g., previously reconstructed and filtered blocks 221, of the same current picture or a different picture, e.g., of a previously reconstructed picture, to provide a fully previously reconstructed, i.e., decoded, picture (and corresponding reference blocks and samples) and / or a partially reconstructed current picture (and corresponding reference blocks and samples), e.g., for inter-prediction. The decoded picture buffer (DPB) 230 may be configured to store one or more unfiltered reconstructed blocks 215, for example if the reconstructed blocks 215 have not been filtered by the loop filter unit 220, or in general, unfiltered reconstructed samples, or any other further processed version of the reconstructed blocks or samples.

[0078] Mode Selection (Segmentation and Prediction) The mode selection unit 260 includes a partitioning unit 262, an inter prediction unit 244, and an intra prediction unit 254, and is configured to receive or obtain original image data, such as the original block 203 (the current block 203 of the current image 17), and reconstructed image data, such as filtered and / or unfiltered reconstructed samples or blocks of the same (current) image and / or from one or more previously decoded images, such as from the decoded image buffer 230 or other buffers (e.g., line buffers, not shown). The reconstructed image data is used as reference image data for prediction, such as inter prediction or intra prediction, to obtain a prediction block 265 or predictor 265.

[0079] The mode selection unit 260 may be configured to determine or select a partitioning and prediction mode (e.g., intra or inter prediction mode) for the current block prediction mode (not including partitioning) and generate a corresponding prediction block 265, which is used for calculating the residual block 205 and for reconstructing the reconstructed block 215.

[0080] Embodiments of the mode selection unit 260 may be configured to select a partitioning and prediction mode (e.g., from those supported by or available to the mode selection unit 260) that provides the best match, or in other words, the smallest residual (smallest residual means better compression for transmission or storage), or the smallest signaling overhead (smallest signaling overhead means better compression for transmission or storage), or a consideration or balance of both. The mode selection unit 260 may be configured to determine the partitioning and prediction mode based on rate-distortion optimization (RDO), i.e., to select the prediction mode that provides the smallest rate-distortion. In this context, terms such as “best,” “minimum,” “optimum,” etc., do not necessarily refer to the overall “best,” “minimum,” “optimum,” etc., but may refer to the achievement of a termination or selection criterion, such as a value exceeding or falling below a threshold or other constraint, potentially leading to a “suboptimal selection” but reducing complexity and processing time.

[0081] In other words, the partitioning unit 262 may be configured to partition the block 203 into smaller block partitions or sub-blocks (again forming blocks), for example, by repeatedly using quadtree partitioning (QT), binary tree partitioning (BT), or ternary tree partitioning (TT), or any combination thereof, and to perform prediction for each block partition or sub-block, for example, wherein the mode selection includes selecting a tree structure for the partitioned block 203, and a prediction mode is applied to each of the block partitions or sub-blocks.

[0082] The partitioning (eg, by partitioning unit 260) and prediction processes (by inter-prediction unit 244 and intra-prediction unit 254) performed by example video encoder 20 are described in more detail below.

[0083] [Partitioning] The partitioning unit 262 may partition (or divide) the current block 203 into smaller partitions, e.g., smaller blocks of square or rectangular size. These smaller blocks (which may also be referred to as sub-blocks) may be further partitioned into even smaller partitions. This is also referred to as tree partitioning or hierarchical tree partitioning, where, for example, a root block at root tree level 0 (hierarchical level 0, depth 0) may be recursively partitioned, e.g., into two or more blocks at a node at the next lower tree level, e.g., tree level 1 (hierarchical level 1, depth 1), which may then be partitioned again into two or more blocks at the next lower level, e.g., tree level 2 (hierarchical level 2, depth 2), and so on, until the partitioning terminates, e.g., because a termination criterion is met, e.g., because a maximum tree depth or a minimum block size has been reached. Blocks that are not further partitioned are also referred to as leaf blocks or leaf nodes of the tree. A tree that uses a partitioning into two partitions is called a binary tree (BT), a tree that uses a partitioning into three partitions is called a ternary tree (TT), and a tree that uses a partitioning into four partitions is called a quad tree (QT).

[0084] As mentioned above, the term "block" as used herein may refer to a portion of an image, particularly a square or rectangular portion. For example, with reference to HEVC and VVC, a block may be or correspond to a coding tree unit (CTU), a coding unit (CU), a prediction unit (PU), and a transform unit (TU), and / or may correspond to a corresponding block, such as a coding tree block (CTB), a coding block (CB), a transform block (TB), or a prediction block (PB).

[0085] For example, a coding tree unit (CTU) may be or include a CTB of luma samples for an image having three sample arrays, two corresponding CTBs of chroma samples, or a CTB of a monochrome image or samples of an image coded using three separate color planes and syntax structures used to code the samples. Correspondingly, a coding tree block (CTB) may be an N×N block of samples for some value N, such that the division of the components into CTBs is a partition. A coding unit (CU) may be or include a coding block of luma samples, two corresponding coding blocks of chroma samples for an image having three sample arrays, or a coding block of a monochrome image or samples of an image coded using three separate color planes and syntax structures used to code the samples. Correspondingly, a coding block (CB) may be an M×N block of samples for some values ​​of M and N, such that the division of the CTBs into coding blocks is a partition.

[0086] For example, in an embodiment according to HEVC, a coding tree unit (CTU) may be divided into CUs by using a quadtree structure, denoted as a coding tree. The decision of whether to code an image area using inter-picture (temporal) prediction or intra-picture (spatial) prediction is made at the CU level. Each CU may be further divided into one, two, or four PUs according to a PU partition type. Within one PU, the same prediction process is applied, and related information is transmitted to the decoder on a PU-by-PU basis. After obtaining residual blocks by applying a prediction process based on the PU partition type, the CU can be partitioned into transform units (TUs) according to another quadtree structure similar to the coding tree for the CU.

[0087] For example, in an embodiment according to the latest video coding standard currently under development, referred to as Versatile Video Coding (VVC), a combined quadtree and binary tree (QTBT) partitioning is used, for example, to partition coding blocks. In the QTBT block structure, a CU can be either square or rectangular in shape. For example, a coding tree unit (CTU) is first partitioned by a quadtree structure. The quadtree leaf nodes are further partitioned by a binary tree or a ternary (or triple) tree structure. The leaf nodes of the partitioning tree are called coding units (CUs), and their segmentation is used for prediction and transform processes without any further partitioning. This means that CUs, PUs, and TUs have the same block size within the QTBT coding block structure. In parallel, multiple partitioning, for example, ternary tree partitioning, can be used with the QTBT block structure.

[0088] In one example, mode select unit 260 of video encoder 20 may be configured to perform any combination of the partitioning techniques described herein.

[0089] As described above, video encoder 20 is configured to determine or select a best or optimal prediction mode from a (e.g., predetermined) set of prediction modes, which may include, for example, intra-prediction modes and / or inter-prediction modes.

[0090] [Intra prediction] The set of intra prediction modes may include 35 different intra prediction modes, for example, non-directional modes such as DC (or mean) mode and planar mode, or directional modes, for example, as defined in HEVC, or may include 67 different intra prediction modes, for example, non-directional modes such as DC (or mean) mode and planar mode, or directional modes, for example, as defined in VVC.

[0091] The intra prediction unit 254 is configured to generate an intra prediction block 265 according to an intra prediction mode from a set of intra prediction modes using reconstructed samples of neighboring blocks of the same current image.

[0092] The intra prediction unit 254 (or generally the mode selection unit 260) is further configured to output the intra prediction parameters (or generally information indicating the selected intra prediction mode for the block) to the entropy encoding unit 270 in the form of a syntax element 266 to be included in the encoded image data 21, so that, for example, the video decoder 30 may receive and use the prediction parameters for decoding.

[0093] [Inter Prediction] The set of inter prediction modes (or possible inter prediction modes) depends on the available reference images (i.e., previously at least partially decoded images, e.g., stored in DPB230) and other inter prediction parameters, such as whether the entire reference image or only a portion of the reference image, e.g., a search window area around the area of ​​the current block, was used to search for the best matching reference block, and / or whether pixel interpolation, e.g., half / semi-pel and / or quarter-pel interpolation, was applied.

[0094] In addition to the above prediction modes, skip mode and / or direct mode may also be applied.

[0095] The inter prediction unit 244 may include a motion estimation (ME) unit and a motion compensation (MC) unit (both not shown in FIG. 2). The motion estimation unit may be configured to receive or obtain the image block 203 (the current image block 203 of the current image 17) and the decoded image 231, or at least one or more previously reconstructed blocks, e.g., reconstructed blocks of one or more other / different previously decoded images 231, for motion estimation. For example, a video sequence may include the current image and the previously decoded image 231, or in other words, the current image and the previously decoded image 231 may be part of or form a series of images forming a video sequence.

[0096] The encoder 20 may be configured to, for example, select a reference block from multiple reference blocks of the same or different images among multiple other images, and provide the reference image (or reference image index) and / or an offset (spatial offset) between the position (x, y coordinates) of the reference block and the position of the current block to the motion estimation unit as an inter-prediction parameter. This offset is also called a motion vector (MV).

[0097] The motion compensation unit is configured to obtain, e.g., receive, inter prediction parameters and perform inter prediction based on or using the inter prediction parameters to obtain an inter prediction block 265. The motion compensation performed by the motion compensation unit may involve fetching or generating a prediction block based on motion / block vectors determined by motion estimation, possibly performing interpolation up to sub-pixel accuracy. Interpolation filtering may generate additional pixel samples from known pixel samples, thus potentially increasing the number of candidate prediction blocks that can be used to code the image block. Upon receiving a motion vector for the PU of the current image block, the motion compensation unit may locate the prediction block to which the motion vector points in one of the reference image lists.

[0098] The motion compensation unit may also generate syntax elements associated with blocks and video slices that are used by video decoder 30 in decoding the image blocks of the video slices. In addition to, or instead of, slices and their respective syntax elements, tile groups and / or tiles and their respective syntax elements may be generated or used.

[0099] [Entropy Coding] Entropy encoding unit 270 is configured to, for example, apply an entropy encoding algorithm or scheme (e.g., a variable length coding (VLC) scheme, a context-adaptive VLC scheme (CAVLC), an arithmetic coding scheme, binarization, context-adaptive binary arithmetic coding (CABAC), syntax-based context-adaptive binary arithmetic coding (SBAC), probability interval partitioned entropy (PIPE) coding, or another entropy encoding method or technique), or bypass (no compression), to quantization coefficients 209, inter-prediction parameters, intra-prediction parameters, loop filter parameters, and / or other syntax elements to obtain encoded image data 21 that can be output via output 272, for example, in the form of encoded bitstream 21, so that, for example, video decoder 30 may receive and use the parameters for decoding. Encoded bitstream 21 may be transmitted to video decoder 30 or stored in memory for later transmission or retrieval by video decoder 30.

[0100] Other structural variations of the video encoder 20 can be used to encode the video stream. For example, a non-transform-based encoder 20 can quantize the residual signal directly without a transform processing unit 206 for a particular block or frame. In another implementation, the encoder 20 can have the quantization unit 208 and the inverse quantization unit 210 combined into a single unit.

[0101] [Decoder and decoding method] 3 shows an example of a video decoder 30 configured to implement the techniques of this disclosure. The video decoder 30 is configured to receive encoded image data 21 (e.g., encoded bitstream 21), for example, encoded by encoder 20, to obtain a decoded image 331. The encoded image data or bitstream includes information for decoding the encoded image data, for example, data representing image blocks and associated syntax elements of an encoded video slice (and / or tile group or tile).

[0102] 3, decoder 30 includes an entropy decoding unit 304, an inverse quantization unit 310, an inverse transform processing unit 312, a reconstruction unit 314 (e.g., summer 314), a loop filter 320, a decoded picture buffer (DPB) 330, a mode application unit 360, an inter prediction unit 344, and an intra prediction unit 354. Inter prediction unit 344 may be or include a motion compensation unit. Video decoder 30, in some examples, may perform a decoding coding pass that is generally inverse to the encoding pass described in connection with video encoder 100 from FIG. 2.

[0103] As described with respect to encoder 20, inverse quantization unit 210, inverse transform processing unit 212, reconstruction unit 214, loop filter 220, decoded picture buffer (DPB) 230, inter prediction unit 344, and intra prediction unit 354 are also referred to as forming a “built-in decoder” of video encoder 20. Accordingly, inverse quantization unit 310 may be identical in function to inverse quantization unit 110, inverse transform processing unit 312 may be identical in function to inverse transform processing unit 212, reconstruction unit 314 may be identical in function to reconstruction unit 214, loop filter 320 may be identical in function to loop filter 220, and decoded picture buffer 330 may be identical in function to decoded picture buffer 230. Accordingly, the descriptions provided for the respective units and functions of video encoder 20 also apply correspondingly to the respective units and functions of video decoder 30.

[0104] [Entropy Decoding] The entropy decoding unit 304 is configured to parse the bitstream 21 (or generally the encoded image data 21) and, e.g., perform entropy decoding on the encoded image data 21 to obtain, e.g., quantization coefficients 309 and / or decoded coding parameters (not shown in FIG. 3 ), e.g., any or all of inter-prediction parameters (e.g., reference image indices and motion vectors), intra-prediction parameters (e.g., intra-prediction modes or indices), transform parameters, quantization parameters, loop filter parameters, and / or other syntax elements. The entropy decoding unit 304 may be configured to apply a decoding algorithm or scheme corresponding to the encoding scheme described with respect to the entropy encoding unit 270 of the encoder 20. The entropy decoding unit 304 may be further configured to provide the inter-prediction parameters, intra-prediction parameters, and / or other syntax elements to the mode application unit 360 and other parameters to other units of the decoder 30. The video decoder 30 may receive syntax elements at the video slice level and / or at the video block level. Additionally or alternatively to slices and their respective syntax elements, tile groups and / or tiles and their respective syntax elements may be received and / or used.

[0105] [Dequantization] Inverse quantization unit 310 may be configured to receive a quantization parameter (QP) (or information generally related to inverse quantization) and quantized coefficients from encoded image data 21 (e.g., by parsing and / or decoding, e.g., by entropy decoding unit 304), and to apply inverse quantization to the decoded quantized coefficients 309 based on the quantization parameter to obtain dequantized coefficients 311, which may also be referred to as transform coefficients 311. The inverse quantization process may involve use of a quantization parameter determined by video encoder 20 for each video block within a video slice (or tile or tile group) to determine the degree of quantization, and similarly, the degree of inverse quantization to be applied.

[0106] [Inverse Transformation] The inverse transform processing unit 312 may be configured to receive the dequantized coefficients 311, also referred to as transform coefficients 311, and to apply a transform to the dequantized coefficients 311 to obtain reconstructed residual blocks 213 in the sample domain. The reconstructed residual blocks 213 may also be referred to as transform blocks 313. The transform may be an inverse transform, e.g., an inverse DCT, an inverse DST, an inverse integer transform, or a conceptually similar inverse transform process. The inverse transform processing unit 312 may further be configured to receive transform parameters or corresponding information from the encoded image data 21 (e.g., by parsing and / or decoding, e.g., by the entropy decoding unit 304) and determine a transform to be applied to the dequantized coefficients 311.

[0107] [Rebuild] The reconstruction unit 314 (e.g., an adder or summator 314) may be configured to add the reconstructed residual block 313 to the prediction block 365, for example, by adding the sample values ​​of the reconstructed residual block 313 and the sample values ​​of the prediction block 365, to obtain the reconstructed block 315 in the sample domain.

[0108] [filtering] Loop filter unit 320 (either within the coding loop or after the coding loop) is configured to filter reconstructed block 315 to obtain filtered block 321, e.g., to smooth pixel transitions or otherwise improve video quality. Loop filter unit 320 may include one or more loop filters, such as a deblocking filter, a sample adaptive offset (SAO) filter, or one or more other filters, e.g., a bilateral filter, an adaptive loop filter (ALF), a sharpening filter, a smoothing filter, or a collaborative filter, or any combination thereof. Although loop filter unit 320 is shown in FIG. 3 as being within the loop filter, in other configurations, loop filter unit 320 may be implemented as a post-loop filter.

[0109] [Decoded image buffer] The decoded video block 321 of the image is then stored in a decoded image buffer 330, which stores the decoded image 331 as a reference image for subsequent motion compensation of other images and / or for outputting the display, respectively.

[0110] The decoder 30 is arranged to output the decoded image 331 for presentation or viewing to a user, for example via an output 332 .

[0111] [prediction] The inter prediction unit 344 may be identical to the inter prediction unit 244 (in particular, the motion compensation unit), and the intra prediction unit 354 may be functionally identical to the intra prediction unit 254, and performs the division or partitioning decision and prediction based on the partitioning and / or prediction parameters or respective information received (e.g., by parsing and / or decoding by the entropy decoding unit 304) from the encoded image data 21. The mode application unit 360 may be configured to perform prediction (intra or inter prediction) for each block based on the reconstructed image, block, or respective samples (filtered or unfiltered) to obtain a prediction block 365.

[0112] If the video slice is coded as an intra-coded (I) slice, the intra prediction unit 354 of the mode application unit 360 is configured to generate a prediction block 365 for an image block of the current video slice based on the signaled intra prediction mode and data from a previously decoded block of the current image. If the video image is coded as an inter-coded (i.e., B or P) slice, the inter prediction unit 344 (e.g., a motion compensation unit) of the mode application unit 360 is configured to generate a prediction block 365 for a video block of the current video slice based on the motion vector and other syntax elements received from the entropy decoding unit 304. In inter prediction, the prediction block may be generated from one of multiple reference images included within one of multiple reference image lists. The video decoder 30 may construct the reference frame lists, List 0 and List 1, based on the reference images stored in the DPB 330 using a default construction technique. The same or similar may apply to or with embodiments that use tile groups (e.g., video tile groups) and / or tiles (e.g., video tiles) in addition to or instead of slices (e.g., video slices). For example, video may be coded using I, P, or B tile groups and / or tiles.

[0113] Mode application unit 360 is configured to determine prediction information for video blocks of the current video slice by parsing motion vectors or related information and other syntax elements, and uses the prediction information to generate predictive blocks for the current video block being decoded. For example, mode application unit 360 uses some of the received syntax elements to determine the prediction mode (e.g., intra or inter prediction) used to code the video blocks of the video slice, the inter-prediction slice type (e.g., B slice, P slice, or GPB slice), construction information regarding one or more of the reference image lists for the slice, motion vectors for each inter-encoded video block of the slice, inter-prediction status for each inter-coded video block of the slice, and other information for decoding video blocks in the current video slice. The same or similar may apply for or with embodiments that additionally or alternatively use tile groups (e.g., video tile groups) and / or tiles (e.g., video tiles) in slices (e.g., video slices). For example, video may be coded using I, P, or B tile groups and / or tiles.

[0114] The embodiment of the video decoder 30 shown in FIG. 3 may be configured to partition and / or decode an image by using slices (also referred to as video slices), where an image may be partitioned or decoded using one or more slices (typically non-overlapping), and each slice may include one or more blocks (e.g., CTUs).

[0115] The embodiment of video decoder 30 shown in FIG. 3 may be configured to partition and / or decode an image by using tile groups (also referred to as video tile groups) and / or tiles (also referred to as video tiles), and an image may be partitioned or decoded using one or more tile groups (typically non-overlapping), each tile group may include, for example, one or more blocks (e.g., CTUs) or one or more tiles, and each tile may be, for example, rectangular in shape and may include one or more blocks (e.g., CTUs), for example, full blocks or partial blocks.

[0116] Other variations of the video decoder 30 may be used to decode the encoded image data 21. For example, the decoder 30 may generate an output video stream without a loop filtering unit 320. For example, a non-transform-based decoder 30 may directly inverse quantize the residual signal without an inverse transform processing unit 312 for a particular block or frame. In another implementation, the video decoder 30 may have the inverse quantization unit 310 and the inverse transform processing unit 312 combined into a single unit.

[0117] It should be understood that in the encoder 20 and the decoder 30, the processing result of the current stage may be further processed and then output to the next stage. For example, after interpolation filtering, motion vector derivation or loop filtering, further operations such as clipping or shifting may be performed on the processing result of the interpolation filtering, motion vector derivation or loop filtering.

[0118] It should be noted that further operations may be applied to the derived motion vectors of the current block (including, but not limited to, control point motion vectors in affine mode, sub-block motion vectors in affine, planar, and ATMVP modes, temporal motion vectors, etc.). For example, the value of a motion vector is restricted to a predefined range according to its representation bits. If the representation bits of a motion vector are bitDepth, its range is -2^(bitDepth-1) to 2^(bitDepth-1)-1, where "^" means exponentiation. For example, if bitDepth is set equal to 16, its range is -32768 to 32767, and if bitDepth is set equal to 18, its range is -131072 to 131071. For example, the value of a derived motion vector (e.g., MVs of four 4x4 sub-blocks in one 8x8 block) is restricted so that the maximum difference between the integer parts of the four 4x4 sub-block MVs is equal to or less than N pixels, such as equal to or less than 1 pixel. Below, we provide two methods to constrain motion vectors according to bitDepth.

[0119] Method 1: Remove the overflow MSB (most significant bit) by the following operation.

number

[0120] For example, if the value of mvx is −32769 after applying equations (1) and (2), the resulting value is 32767. In computer systems, decimal numbers are stored as two's complement numbers.

[0121] The two's complement of -32769 is 1,0111,1111,1111,1111 (17 bits), then the MSBs are discarded so the resulting two's complement is 0111,1111,1111,1111 (decimal 32767), which is the same as the output from applying equations (1) and (2).

[0122]

number

[0123] Method 2: Remove the overflow MSB by clipping the value.

number

number

[0124] 4 is a schematic diagram of a video coding device 400 suitable for implementing the disclosed embodiments described herein. In an embodiment, the video coding device 400 may be a decoder, such as the video decoder 30 of FIG. 1A, or an encoder, such as the video encoder 20 of FIG. 1A.

[0125] Video coding device 400 includes an ingress port 410 (or input port 410) and a receiver unit (Rx) 420 for receiving data, a processor, logic unit, or central processing unit (CPU) 430 for processing the data, a transmitter unit (Tx) 440 and an egress port 450 (or output port 450) for transmitting the data, and a memory 460 for storing the data. Video coding device 400 may also include optical / electrical (OE) and electrical / optical (EO) components coupled to ingress port 410, receiver unit 420, transmitter unit 440, and egress port 450 for the egress or ingress of optical or electrical signals.

[0126] The processor 430 is implemented by hardware and software. The processor 430 may be implemented as one or more CPU chips, cores (e.g., multi-core processors), FPGAs, ASICs, and DSPs. The processor 430 communicates with the ingress port 410, the receiver unit 420, the transmitter unit 440, the egress port 450, and the memory 460. The processor 430 includes a coding module 470. The coding module 470 implements the disclosed embodiments described above. For example, the coding module 470 implements, processes, prepares, or provides various coding operations. Thus, the inclusion of the coding module 470 provides substantial improvements to the functionality of the video coding device 400 and results in the transformation of the video coding device 400 into different states. Alternatively, the coding module 470 is implemented as instructions stored in the memory 460 and executed by the processor 430.

[0127] Memory 460 may include one or more disks, tape drives, and solid state drives, and may be used as an overflow data storage device for storing programs when selected for execution, as well as for storing instructions and data read during execution of the programs. Memory 460 may be, for example, volatile and / or non-volatile, and may be read-only memory (ROM), random access memory (RAM), ternary content addressable memory (TCAM), and / or static random access memory (SRAM).

[0128] FIG. 5 is a simplified block diagram of an apparatus 500 that may be used as either or both of source device 12 and destination device 14 from FIG. 1 according to an example embodiment.

[0129] Processor 502 in device 500 may be a central processing unit. Alternatively, processor 502 may be any other type of device or devices now existing or later developed capable of manipulating or processing information. While the disclosed implementations may be practiced using a single processor as shown, such as processor 502, speed and efficiency advantages may be realized using more than one processor.

[0130] The memory 504 in the device 500, in one implementation, may be a read-only memory (ROM) device or a random-access memory (RAM) device. Any other suitable type of storage device may be used as the memory 504. The memory 504 may include code and data 506 accessed by the processor 502 using a bus 512. The memory 504 may further include an operating system 508 and application programs 510, which include at least one program that enables the processor 502 to perform methods described herein. For example, the application programs 510 may include applications 1-N, which further include a video coding application that performs methods described herein.

[0131] The apparatus 500 may also include one or more output devices, such as a display 518. In one example, the display 518 may be a touch-sensitive display that combines a display with a touch-sensitive element operable to detect touch input. The display 518 may be coupled to the processor 502 via the bus 512.

[0132] Although shown herein as a single bus, bus 512 of device 500 may be comprised of multiple buses. Additionally, secondary storage 514 may be directly coupled to other components of device 500 or may be accessed over a network, and may include a single integrated unit such as a memory card or multiple units such as multiple memory cards. Accordingly, device 500 may be implemented in a wide variety of configurations.

[0133] [Parameter Set] Parameter sets are fundamentally similar and share the same fundamental design goals (i.e., bitrate efficiency, error resilience, and providing a system layer interface). HEVC (H.265) has a hierarchy of parameter sets, including video parameter sets (VPS), sequence parameter sets (SPS), and picture parameter sets (PPS), which are similar to their counterparts in AVC and VVC. Each slice references a single active PPS, SPS, and VPS, to access information used to decode the slice. Because the PPS contains information that applies to all slices in a picture, all slices in a picture must reference the same PPS. Slices in different pictures can also reference the same PPS. Similarly, the SPS contains information that applies to all pictures in the same coded video sequence.

[0134] Although the PPS can be different for each individual picture, it is common for many or all pictures in a coded video sequence to reference the same PPS. Reusing parameter sets is bitrate efficient because it avoids the need to transmit shared information multiple times. It is also loss-robust because it allows the content of a parameter set to be carried over some more reliable external communication link or repeated frequently within the bitstream to ensure that it is not lost.

[0135] [Parameter Set] Parameter sets are fundamentally similar and share the same fundamental design goals (i.e., bitrate efficiency, error resilience, and providing a system layer interface). HEVC (H.265) has a hierarchy of parameter sets, including video parameter sets (VPS), sequence parameter sets (SPS), and picture parameter sets (PPS), which are similar to their counterparts in AVC and VVC. Each slice references a single active PPS, SPS, and VPS, to access information used to decode the slice. Because the PPS contains information that applies to all slices in a picture, all slices in a picture must reference the same PPS. Slices in different pictures can also reference the same PPS. Similarly, the SPS contains information that applies to all pictures in the same coded video sequence.

[0136] Although the PPS can be different for each individual picture, it is common for many or all pictures in a coded video sequence to reference the same PPS. Reusing parameter sets is bitrate efficient because it avoids the need to transmit shared information multiple times. It is also loss-robust because it allows the content of a parameter set to be carried over some more reliable external communication link or repeated frequently within the bitstream to ensure that it is not lost.

[0137] [Sequence Parameter Set (SPS)] The SPS contains parameters that apply to one or more layers of a coded video sequence and do not change from picture to picture within the coded video sequence. Specifically, the SPS contains signaling information for sub-pictures.

[0138] Some parts of the table below show snapshots of some of the sub-image signaling of SPS in ITU JVET-Q2001-v11, the download links of which are as follows: http: / / phenix.it-sudparis.eu / jvet / doc_end_user / documents / 17_Brussels / wg11 / JVET-Q2001-v11.zip In the remainder of this application, this prior art document will be referred to as VVC Draft 8 for the sake of brevity.

[0139] [Table 1] [Table 2]

[0140] Some syntax elements in the SPS signal signal the position information and control flags of each sub-image. The position information of the ith sub-image is subpic_ctu_top_left_x[i], which indicates the horizontal component of the top-left coordinate of subpic_ctu i in the image, or subpic_ctu_top_left_y[i], which indicates the vertical component of the top-left coordinate of subpic_ctu i within the image, or subpic_width_minus1[i], which indicates the width of subpic_i within the image, or subpic_height_minus1[i] indicates the height of subpic i within the image Includes.

[0141] Some syntax elements indicate the number of subpictures within an image, for example sps_num_subpics_minus1.

[0142] The image is divided into one or more tile rows and one or more tile columns. A tile is a set of CTUs that cover a rectangular area of ​​the image. The CTUs within a tile are scanned in raster scan order within that tile.

[0143] A slice consists of an integer number of complete tiles, or an integer number of complete, contiguous CTU rows within a tile of an image. Thus, each vertical slice boundary is always also a vertical tile boundary. It is also possible for the horizontal boundary of a slice to be composed of a horizontal CTU boundary within a tile that is not a tile boundary: this occurs when a tile is divided into multiple rectangular slices, each of which consists of an integer number of complete, contiguous CTU rows within the tile.

[0144] Two modes of slicing are supported: raster scan slice mode and rectangular slice mode. In raster scan slice mode, a slice contains a series of complete tiles in a tile raster scan of the image. In rectangular slice mode, a slice contains either a number of complete tiles that collectively form a rectangular area of ​​the image, or a number of contiguous complete CTU rows of a single tile that collectively form a rectangular area of ​​the image. The tiles within a rectangular slice are scanned in tile raster scan order within the rectangular area corresponding to the slice.

[0145] A sub-image contains one or more slices that collectively cover a rectangular region of the image, so each sub-image boundary is always also a slice boundary, and each vertical sub-image boundary is always also a vertical tile boundary.

[0146] One or both of the following conditions shall be met for each sub-image and tile: - All CTUs in a sub-image belong to the same tile. - All CTUs in a tile belong to the same sub-image.

[0147] [Segmenting an image into CTUs, slices, tiles and sub-images]

[0148] [Segmenting the image into CTUs] An image is divided into a series of coding tree units (CTUs). The term CTB (coding tree block) is sometimes used interchangeably. The concept of a CTU is the same as that of HEVC. For an image with three sample arrays, a CTU consists of an NxN block of luma samples along with two corresponding blocks of chroma samples. Figure 6 shows an example of an image divided into CTUs. The size of CTUs within a frame must be the same except at the image borders, where incomplete CTUs can exist.

[0149] [Segmenting an image into tiles] When tiling is enabled, the image is divided into rectangular-shaped groups of CTUs separated by vertical and / or horizontal boundaries. Vertical and horizontal tile boundaries intersect the image from bottom to bottom and from left image boundary to right image boundary, respectively. The bitstream includes an indication of the locations of the horizontal and vertical tile boundaries.

[0150] 7 illustrates partitioning an image into nine tiles. In the example, the tile boundaries are indicated by thick dashed lines. In other words, FIG. 7 illustrates a tile-based raster scan order for a CTU having nine tiles of different sizes in an image. Note that the tile boundaries are indicated by thick dashed lines.

[0151] If more than one tile exists inside the image, the scanning order of the CTU is changed. The CTU is scanned according to the following rules: 1. The tiles are scanned from left to right, top to bottom in a raster scan order, which is referred to in this disclosure as tile scan order. This means that starting with the top-left tile, all tiles in the same tile row are scanned left to right. Then, starting with the first tile in the second tile row (the row below), all tiles are scanned left to right in the second tile row. This process is repeated until all tiles have been scanned. 2. Within a tile, CTUs are scanned in raster scan order. Within a row of CTUs, CTUs are scanned from left to right, and rows of CTUs are scanned from top to bottom. Figure 7 illustrates the scanning order of CTUs when tiles are present, with the numbers within the CTUs indicating the scanning order.

[0152] The concept of tiles provides for partitioning an image in such a way that each tile can be decoded independently from other tiles of the same image, where decoding refers to entropy, residual, and predictive decoding. Furthermore, tiles can be used to partition an image into regions with similar sizes. Therefore, it is possible to process tiles of an image in parallel with each other, which is preferable in a multi-core processing environment where each processing core is identical to each other.

[0153] The terms processing order and scanning order are used as follows in this disclosure.

[0154] Processing refers to the encoding or decoding of CTUs within an encoder or decoder. Scanning order refers to the indexing of a particular section within an image. The CTU scan order within a tile refers to how the CTUs within the tile are indexed, which may not be the same order as the order in which the CTUs are processed.

[0155] Segmenting an image into slices The concept of slices provides for the partitioning of an image in such a way that each slice is decodable independently from other slices of the same image, where decoding refers to entropy, residual and predictive decoding. The difference with tiles is that slices can have a more arbitrary shape (more flexible in partitioning possibilities) and the purpose of slice partitioning is not parallel processing but packet size matching in a transmission environment and error resilience.

[0156] A slice can consist of a complete picture as well as parts thereof. In HEVC, a slice contains multiple consecutive CTUs of a picture in processing order. A slice is identified by the starting CTU address, which is signaled in the slice header or picture parameter set or some other unit.

[0157] In VVC Draft 8, a slice contains an integer number of complete tiles, or an integer number of contiguous CTU rows within a tile of an image. Thus, each vertical slice boundary is always also a vertical tile boundary. It is also possible for a horizontal boundary of a slice to be a non-tile boundary but contain a horizontal CTU boundary within the tile: this occurs when a tile is divided into multiple rectangular slices, each of which contains an integer number of contiguous complete CTU rows within the tile.

[0158] In some examples, there are two slice modes: raster scan slice mode and rectangular slice mode. In raster scan slice mode, a slice includes a series of tiles in a tile raster scan of the image. In rectangular slice mode, a slice includes multiple tiles that collectively form a rectangular area of ​​the image, or a slice includes multiple consecutive CTU rows of one tile that collectively form a rectangular area of ​​the image. The tiles in a rectangular slice are scanned in tile raster scan order within the rectangular area corresponding to the slice.

[0159] All slices of an image collectively form the whole image, i.e., every CTU of an image must be contained in one of the image's slices. Similar rules apply to tiles and sub-images.

[0160] [Segmenting an image into sub-images] A sub-picture is a rectangular section of an image. A sub-picture can be an entire image or a portion of an image. A sub-picture is a section of an image such that each sub-picture is independently decodable from other sub-pictures in the entire video sequence. In VVC Draft 8, this is true if the sub-picture is indicated in the bitstream. That is, if the indication of subpic_treated_as_pic_flag[i] is true for sub-picture i, then that sub-picture i is independently decodable from other sub-pictures in the entire video sequence.

[0161] The difference between a sub-picture and a tile or slice is that a sub-picture creates an independently decodable video sequence within a video sequence, whereas for tiles and slices, independent decoding is only guaranteed within a single picture of a video sequence.

[0162] In VVC Draft8, a sub-image contains one or more slices that collectively cover a rectangular region of the image. Thus, each sub-image boundary is always a slice boundary, and each vertical sub-image boundary is always a vertical tile boundary.

[0163] Figure 8 provides examples of tiles, slices, and sub-images. In other words, Figure 8 shows an example of an image that includes four tiles, i.e., two tile columns and two tile rows, four rectangular slices, and three sub-images. Sub-image 1 includes two slices.

[0164] 8, the image is partitioned into 216 CTUs, 4 tiles, 4 slices and 3 subpictures. The value of sps_num_subpics_minus1 is 2, and the position-related syntax elements have the following values:

[0165] For subimage 0, subpic_ctu_top_left_x[0] is not signaled but is inferred to be 0. subpic_ctu_top_left_y[0] is not signaled but is inferred to be 0. The value of subpic_width_minus1[0] is 8. The value of subpic_height_minus1[0] is 11.

[0166] For subimage 1, ·The value of subpic_ctu_top_left_x[1] is 9. The value of subpic_ctu_top_left_y[1] is 0. The value of subpic_width_minus1[1] is 8. The value of subpic_height_minus1[1] is 5.

[0167] For sub-image 2, ·The value of subpic_ctu_top_left_x[2] is 9. ·The value of subpic_ctu_top_left_y[2] is 6. subpic_width_minus1[2] is not signaled but is inferred to be 8. subpic_height_minus1[2] is not signaled but is inferred to be 5.

[0168] [Tile Signaling] The table below illustrates the signaling of tile sizes and coordinates of tiles within an image (from the VVC Draft8 Picture Parameter Set RBSP Syntax Table). [Table 3]

[0169] Tile partitioning information (address and dimensions of each tile) is usually included in the parameter set. In the above example, first, an indication is included in the bitstream (no_pic_partition_flag) that indicates whether the image is partitioned into slices and tiles. If this indication is true (meaning the image is not partitioned into slices or tiles), it is inferred that the image is partitioned into only one slice and only one tile, whose boundaries are aligned with the image boundaries. Otherwise (no_pic_partition_flag is false), the tile partitioning information is included in the bitstream.

[0170] The syntax element tile_column_width_minus1[i] indicates the width of the i'th tile column. The syntax element tile_row_height_minus1[i] indicates the height of the i'th tile row.

[0171] The height of the tile rows and the width of the tile columns can both be explicitly signaled in the bitstream or can be inferred. The syntax elements num_exp_tile_columns_minus1 and num_exp_tile_rows_minus1 indicate the number of tile columns and tile rows whose width and height are explicitly signaled, respectively. The widths and heights of the remaining tile columns and rows are inferred according to a function.

[0172] Tile indexing follows the "image tile scan order": tiles in an image are ordered (scanned) according to raster scan order, with the first tile in the top left corner of the image being tile 0, and the index increasing from left to right in each tile row, so that after the last tile in a tile row is scanned, the leftmost tile in the next tile row (one below the current tile row) is scanned.

[0173] [Slice signaling] The table below illustrates the signaling of the size of a tile and the coordinates of a rectangular shaped slice inside an image (from the VVC Draft8 Picture Parameter Set RBSP Syntax Table). [Table 4]

[0174] In VVC Draft8, the following relationship exists between slices and tiles: either a slice contains one or more complete tiles, or a tile contains one or more complete slices. Therefore, the coordinates and size of a slice are indicated wrt tile partitioning. In VVC Draft8, tile partitioning is first signaled in the picture parameter set. Slice partitioning information is then signaled using tile mapping information.

[0175] In the above table, the syntax element num_slices_in_pic_minus1 indicates the number of slices inside an image. Tile_idx_delta[i] indicates the difference between the tile indexes of the first tile of the (i+1)th and i-th slices. For example, the index of the first tile of the first slice in an image is 0. If the tile index of the first tile of the second slice inside an image is 5, then Tile_idx_delta[0] is equal to 5. In this context, the tile index is used as the address of a slice, i.e., the index of the first tile of a slice is the starting address of the slice.

[0176] slice_width_in_tiles_minus1[i] and slice_height_in_tiles_minus1[i] indicate the width and height in number of tiles of the ith slice within the image.

[0177] In the above table, if slice_width_in_tiles_minus1[i] and slice_height_in_tiles_minus1[i] are both equal to 0 (indicating that the maximum dimensions of the i-th slice are one tile in height and one tile in width), the syntax element num_exp_slices_in_tile[i] can be included in the bitstream. This syntax element indicates the number of slices inside a tile.

[0178] As explained above, according to VVC Draft 8, a slice may contain multiple complete tiles, or a tile may contain multiple complete slices; other alternatives are prohibited. According to the syntax table above, first, the number of tiles inside a slice is indicated (by including slice_width_in_tiles_minus1[i] and slice_height_in_tiles_minus1[i]). In addition, if the number of tiles inside a slice is equal to 1 according to the indication, the number of slices inside the tile is indicated (by num_exp_slices_in_tile[i]). Therefore, if both slice_width_in_tiles_minus1[i] and slice_height_in_tiles_minus1[i] are equal to 1, the actual size of the slice may be equal to or less than one tile.

[0179] The syntax element single_slice_per_subpic_flag, if true, indicates that a slice exists and that there is only one slice per subpicture for all subpictures of the slice (i.e., a subpicture cannot be divided into more than one slice).

[0180] According to one alternative signaling method, the slice map (slice start addresses and slice sizes) is indicated in VVC Draft8 according to the following steps: 1. First, a tile partitioning map is indicated in the bitstream, where an index (which may be called tileIdx) is used to index every tile in the image (according to the tile scan order in the image). After this stage, the index, coordinates and size of each tile are known. 2. The number of slices in a picture is signaled. In one example, the number of slices can be indicated by the num_slices_in_pic_minus1 syntax element. 3. For the first slice in an image, only the width and height of the slice are indicated in number of tiles. The starting address of the first slice is not explicitly signaled, but rather is inferred to be tileIdx 0 (the first tile in the image is the first tile in the first slice of the image). 4. If the size of the first slice is equal to one tile in width and one tile in height, and if there is more than one CTU row inside the tile contained within the first slice, the num_exp_slices_in_tile[0] syntax element is signaled, which indicates how many slices are contained within the tile (called numSlicesInTile[0]). 5. For each slice in the image, from the second slice to the last slice (including but excluding the last slice), the width and height of the slice are explicitly indicated in number of tiles. The starting address of the slice may be explicitly indicated by the tile_idx_delta[i] syntax element, where i is the index of the slice. If the starting address is not explicitly signaled (e.g., if the slices are signaled in an order that allows the starting position of the next slice to be inferred using the starting position and width and height of the current slice), then the starting address of the slice is inferred via a function. 6. If the size of the nth slice (n is a number between 2 and the number of slices in the image minus 1) is equal to one tile in width and one tile in height, and there are more than one CTU rows in the tiles contained in the first slice, the num_exp_slices_in_tile[n] syntax element is signaled, which indicates how many slices are contained in the tile. 7. For the last slice in an image, the width and height of the slice are not explicitly signaled, but are inferred according to the number of tiles in the image width, the number of tiles in the image height, and the starting address of the last slice. The starting address of the last slice can be explicitly indicated or inferred. The inference of the width and height of the last slice in an image can be performed according to the following two equations, which are from Section 6.5.1 of VVC Draft 8:

number

[0181] As can be seen from the steps described above, the width and height of the last slice are not signaled. It is desirable not to include the width and height of the last slice in the bitstream, as they can be easily deduced if the starting address of the slice is known. As a result, efficient compression is achieved by not including redundant information in the bitstream.

[0182] The variables tileX, tileY, NumTileColumns, and NumTileRows in the above equations are explained below.

[0183] [VVC Draft8 Section 6.5.1] 6.5.1 CTB Raster Scan, Tile Scan and Sub-Image Scan Processes For rectangular slices, the list NumCtusInSlice[i] specifying the number of CTUs in the i-th slice, for i in the range 0 to num_slices_in_pic_minus1 (inclusive), the list SliceTopLeftTileIdx[i] specifying the index of the top left tile of the slice, for i in the range 0 to num_slices_in_pic_minus1 (inclusive), and the matrix CtbAddrInSlice[i][j] specifying the image raster scan address of the j-th CTB in the i-th slice, for i in the range 0 to num_slices_in_pic_minus1 (inclusive) and j in the range 0 to NumCtusInSlice[i]-1 (inclusive) are derived as follows:

number

number

number

[0184] Again, for completeness, Recommendation ITU-T H.266 (ISO / IEC 23090-3:2020) Versatile Video Coding, cited via http: / / handle.itu.int / 11.1002 / 1000 / 14336 on August 29, 2020, also quotes much the same thing, and its content is as follows:

[0185] When rect_slice_flag is equal to 1, the list NumCtusInSlice[i] specifying the number of CTUs in the i-th slice, for i in the range 0 to num_slices_in_pic_minus1 (inclusive), the list SliceTopLeftTileIdx[i] specifying the tile index of the tile containing the first CTU in the slice, for i in the range 0 to num_slices_in_pic_minus1 (inclusive), the matrix CtbAddrInSlice[i][j] specifying the image raster scan address of the j-th CTB in the i-th slice, for i in the range 0 to num_slices_in_pic_minus1 (inclusive) and j in the range 0 to NumCtusInSlice[i]-1 (inclusive), and the variable NumSlicesInTile[i] specifying the number of slices in the tile containing the i-th slice are derived as follows:

number

number

number

number

number

[0186] Here we refer to the above-mentioned text of VVC Draft 8.

[0187] The above step-by-step description of signaling a slice map inside a picture is an example of signaling in VVC Draft 8. More specifically, the description describes a case where rectangular slices are used, the number of slices per sub-picture is not indicated equal to 1, there is more than one tile in the picture, and the number of CTU rows inside the tile is greater than 1. If some of the parameters are changed, other modes of signaling a slice map can be used. For example, if it is indicated that there is only one slice per sub-picture, the width and height of the slice are not explicitly signaled in the bitstream, but rather are inferred to be equal to the width and height of the corresponding sub-picture.

[0188] Subsection 6.5.1 of VVC Draft8 specifies the scan order of CTUs within slice i, where i is the slice index. The output of this subsection, a matrix CtbAddrInSlice[i][n], specifies the scan order of CTUs within slice i, where n is a CTU index between 0 and the number of CTUs in slice i. The value of CtbAddrInSlice[i][n] specifies the address (in raster scan order in the image) of the nth CTU in slice i.

[0189] 9 illustrates the raster scan order of CTUs in an image ("CTU raster scan order in an image") and one slice (slice 5, i.e., the fifth slice in the image) in the image as an example. In other words, FIG. 9 illustrates the raster scan order of CTUs within an image, where the image is composed of one tile and one sub-image.

[0190] According to this example, the value of CtbAddrInSlice is: CtbAddrInSlice[4][0]=27 CtbAddrInSlice[4][1]=28 CtbAddrInSlice[4][2]=29 CtbAddrInSlice[4][3]=30 CtbAddrInSlice[4][4]=37 CtbAddrInSlice[4][5]=38 CtbAddrInSlice[4][6]=39 CtbAddrInSlice[4][7]=40

[0191] Terms used in this disclosure "Image tile scan order" as described in this disclosure "Intra-tile CTU scan order" as described in this disclosure "Inner-slice CTU scan order" as described in this disclosure "CTU raster scan order in images" as described in this disclosure "Tile-based scanning order of CTUs inside an image" "Scanning order" refers to the indexing of X with Y in order of increasing index. "Processing" means decoding or encoding in an encoder or decoder. Thus, processing order means the order in which X (e.g., CTUs) are processed in an encoder or decoder.

[0192] In VVC Draft8, when there is more than one tile per image, the slice signaling is as follows:

[0193] 1. Determine the starting tile address of the slice, in number of tiles, using explicit instructions or inference. 2. For each slice except the last, signal how many tiles the slice contains. a. If you determine that a slice contains only one tile, indicate how many slices are contained within the tile. 3. For the last slice in the image, infer the number of tiles in the slice if it is determined that the slice contains at least one complete tile.

[0194] In other words, in VVC Draft8, if the size of the last slice in the picture is larger than or equal to one tile in both the width and height dimensions, the size of the last slice is inferred and not signaled.

[0195] This can be seen from Table 1, where slice_width_in_tiles_minus1[i] and slice_height_in_tiles_minus1[i] (indicating the width and height of the i-th slice in terms of the number of tiles, respectively) are included in the bitstream if they are smaller than num_slices_in_pic_minus1 (due to the for-loop "for(i = 0; i < num_slices_in_pic_minus1; i++)"). Therefore, the width and height of the slice are not signaled when i is equal to num_slices_in_pic_minus1, i.e., for the last slice.

[0196] [Luma Mapping with Chroma Scaling (LMCS)] In VVC, a coding tool called luma mapping with chroma scaling (LMCS) is added as a new processing block before the loop filter. LMCS has two main components: 1) in-loop mapping of the luma component based on an adaptive piecewise linear model, and 2) luma-dependent chroma residual scaling is applied to the chroma component. Figure 11 shows the LMCS architecture from the decoder's perspective. The light blue shaded blocks in Figure 11 indicate where processing is applied to the mapped domain, including inverse quantization, inverse transform, luma intra prediction, and adding the luma prediction together with the luma residual. The unshaded blocks in Figure 11 indicate where processing is applied to the original (i.e., unmapped) domain, including deblocking, loop filters such as ALF and SAO, motion compensation prediction, chroma intra prediction, adding the chroma prediction together with the chroma residual, and storing the decoded image as a reference image. The light yellow shaded block in Figure 11 is the new LMCS functional block, which contains the forward and backward mapping of the luma signal and the luma-dependent chroma scaling process. Like most other tools in VVC, LMCS can be enabled / disabled at the sequence level using the SPS flag.

[0197] Slice Header: A portion of a coded slice that contains data elements related to all tiles or CTU rows within the tile represented in the slice.

[0198] [Slice Header] [Table 5] [Table 3]

[0199] Table 3 illustrates a portion of the slice header syntax structure for VVC Draft 8. Rows containing "..." indicate that some rows in the table have been omitted.

[0200] In the slice header, the syntax elements indicate: The picture_header_in_slice_header_flag indicates whether the picture header syntax structure is present in the slice header. If the picture header syntax structure is not present in the slice header, it must be included in the picture header that must be included in the bitstream. slice_address indicates the tile index of the first tile of the slice. num_tiles_in_slice_minus1 indicates the number of tiles contained in the slice.

[0201] Figure 10 illustrates an image partitioned into 12 tiles and 3 slices, or in other words, Figure 10 shows an image with 18x12 luma CTUs partitioned into 12 tiles and 3 raster scan slices.

[0202] In this example shown in FIG. 10, the slice address and num_tiles_in_slice_minus1 syntax elements assume the following values ​​for each slice of the image: Slice 1 slice_address=0, and the slice start address is tile index 0. num_tiles_in_slice_minus1=1 and a slice consists of 2 tiles. Slice 2 slice_address=2, and the slice start address is tile index 2. num_tiles_in_slice_minus1=5, so a slice consists of 5 tiles. Slice 3 slice_address=7, and the slice start address is tile index 7. num_tiles_in_slice_minus1=4, so a slice consists of 4 tiles.

[0203] slice_lmcs_enabled_flag equal to 1 specifies that luma mapping with chroma scaling is enabled for the current slice. slice_lmcs_enabled_flag equal to 0 specifies that luma mapping with chroma scaling is not enabled for the current slice. If slice_lmcs_enabled_flag is not present, it is inferred to be equal to 0.

[0204] The starting tile of a slice (the address of the slice within the image) and the number of tiles within the image can be indicated using two methods. If rect_slice_flag is equal to 1 (indicating that the slice of the image has a rectangular shape), the signaling mechanism in Table 1 is used. Table 1 represents a part of a picture parameter set. In this mechanism, the addresses and sizes of all slices of the image are signaled within the picture parameter set before the first slice of the image in the bitstream. Note that the bitstream has the order in which information (picture parameter set, slices of the image, and internal syntax elements such as syntax structures) is included in (or parsed from) the bitstream.

[0205] Otherwise, if rect_slice_flag is equal to 0 (indicating that slices of the image need not be rectangular in shape), the slice_address and num_tiles_in_slice_minus1 syntax elements in the slice header indicate the address and size of the slice.

[0206] [Image Header] [7.3.2.6 RBSP Syntax for Image Header] [Table 6]

[0207] The above table presents the picture header syntax according to VVC Draft 8. It includes the picture header structure and rbsp_trailing_bits( ), which are filler bits that make the number of bits in the picture header equal to a multiple of 8.

[0208] [Image header structure] [7.3.2.7 Image Header Structure Syntax] [Table 7]

[0209] The picture header structure contains syntax elements that are applicable to all slices of an image. Some of the syntax elements are included in the picture header structure presented in the table above. As an example, ph_lmcs_enabled_flag indicates whether the LMCS (luma mapping with chroma scaling) coding tool is enabled for the slices of the image. A ph_lmcs_enabled_flag equal to 1 specifies that luma mapping with chroma scaling is enabled for all slices associated with the PH. A ph_lmcs_enabled_flag equal to 0 specifies that luma mapping with chroma scaling may be disabled for one, more, or all slices associated with the PH. If not present, the value of ph_lmcs_enabled_flag is inferred to be equal to 0.

[0210] As can be seen from the above, the picture header structure can be present in either a slice header or a picture header. According to VVC Draft 8, the picture header structure must be present in either a slice header or a picture header of a picture. If a picture header structure is present in a picture header, all slices of the picture that reference that picture header must not contain a picture header structure. The converse is also true: if a picture header structure is not present in a picture header, and therefore a picture header is not included in the bitstream of a particular picture, then the picture header structure must be present in the slice headers of the slices of that picture.

[0211] Furthermore, VVC Draft8 has another constraint, where if a picture header structure is present in the slice header, the picture must consist of only one slice (i.e., the picture cannot be split into multiple slices).

[0212] The current VVC Draft8 is inefficient because slice_address and num_tiles_in_slice_minus1 are redundantly included in the bitstream in certain cases. The redundant inclusion of slice_address and num_tiles_in_slice_minus1 in the bitstream increases the bitrate because every slice header of a picture may contain this syntax element, thus reducing compression efficiency.

[0213] [Embodiment 1] According to an embodiment, the presence of the slice_address and num_tiles_in_slice_minus1 syntax elements in the slice header is controlled based on the presence of a picture header structure in the slice header. [Table 8]

[0214] The present invention can be implemented as shown in the table above. According to the present invention, slice_address is included in the slice header if the condition in line 6 is true. In other words, slice_address is included in the slice header if: The number of tiles in the image is greater than 1 and non-rectangular slices are allowed (rect_slice_flag=0) and the image header structure is not present in the slice header. or (rect_slice_flag=1) and the number of slices in the current subimage is greater than 1.

[0215] Otherwise, it can be inferred that slice_address is not included in the slice header and its value is equal to 0.

[0216] Additionally or alternatively, the presence of the num_tiles_in_slice_minus1 syntax element in a slice header may be controlled by the presence of a picture header structure in the slice header, e.g., num_tiles_in_slice_minus1 is not included in a slice header if the slice header has a picture header structure.

[0217] Row 10 of the above table is: Rect_slice_flag is equal to 0, the number of tiles in the image is greater than 1, and picture_header_in_slice_header_flag is equal to 0 1 shows an implementation of the present invention where num_tiles_in_slice_minus1 is included in the slice header.

[0218] Otherwise, num_tiles_in_slice_minus1 is not included in the slice header and its value can be inferred to be equal to the number of tiles in the image minus one.

[0219] As explained above, there are bitstream compatibility requirements that restrict the inclusion of picture header structures in slice headers in VVC Draft 8. According to VVC Draft 8, picture header structures can be included in slice headers if there is one slice per picture.

[0220] According to the present invention, the presence of the image header structure in the slice header is used to control the presence of the slice_address and number of tiles in the slice indication, since if there is a single slice in the image, the slice address must be equal to the first tile in the image, and the number of tiles in the slice must be equal to the number of tiles in the image.

[0221] [Embodiment 2] [Table 9]

[0222] Additionally or alternatively, the presence of num_tiles_in_slice_minus1 in the slice header is controlled by the difference between the number of tiles in the image (eg, NumTilesInPic in the table above) and slice_address.

[0223] More specifically, if the difference between the number of tiles in the image and slice_address is less than a threshold, num_tiles_in_slice_minus1 is not included in the slice header and its value is inferred to be equal to a predefined number. For example, if the difference between NumTilesInPic and slice_address is less than or equal to 1, num_tiles_in_slice_minus1 is not included in the bitstream and its value is inferred to be equal to 0 (indicating that there is one tile in the current slice).

[0224] slice_address specifies the slice address of the slice.

[0225] If not present, the value of slice_address is inferred to be equal to 0.

[0226] If rect_slice_flag is equal to 0, the following applies:

[0227] The slice address is the raster scan tile index of the first tile in the slice.

[0228] The length of slice_address is Ceil(Log2(NumTilesInPic)) bits.

[0229] The value of slice_address must be in the range 0 to NumTilesInPic-1 (inclusive).

[0230] Otherwise (rect_slice_flag is equal to 1), the following applies:

[0231] The slice address is the subpicture level slice index of the current slice, i.e., SubpicLevelSliceIdx[j], where j is the picture level slice index of the current slice. The length of slice_address is Ceil(Log2(NumSlicesInSubpic[CurrSubpicIdx])) bits. The value of slice_address must be in the range 0 to NumSlicesInSubpic[CurrSubpicIdx]-1, inclusive.

[0232] It is a bitstream conformance requirement to which the following constraints apply:

[0233] If rect_slice_flag is equal to 0 or sps_subpic_info_present_flag is equal to 0, the value of slice_address shall not be equal to the value of slice_address of any other coded slice NAL unit of the same coded picture.

[0234] Otherwise, the value pair of subpic_id and slice_address shall not be equal to the value pair of subpic_id and slice_address of any other coded slice NAL unit of the same coded picture.

[0235] The shape of the image slices is such that each CTU, when decoded, has its entire left and top boundaries made up of the image boundary or the boundaries of a previously decoded CTU.

[0236] num_tiles_in_slice_minus1+1, if present, specifies the number of tiles in the slice. The value of num_tiles_in_slice_minus1 shall be in the range 0 to NumTilesInPic-1, inclusive. If not present, the value of num_tiles_in_slice_minus1 shall be inferred to be equal to 0.

[0237] The variable NumCtusInCurrSlice, which specifies the number of CTUs in the current slice, and the list CtbAddrInCurrSlice[i], which specifies the image raster scan address of the ith CTB in the slice, for i in the range 0 to NumCtusInCurrSlice-1 (inclusive), are derived as follows:

number

[0238] The variables SubpicLeftBoundaryPos, SubpicTopBoundaryPos, SubpicRightBoundaryPos and SubpicBotBoundaryPos are derived as follows:

number

[0239] [Embodiment 3] [Table 10]

[0240] Additionally or alternatively, the presence of slice_lmcs_enabled_flag in the slice header is controlled based on the presence of the picture header structure in the slice header. An example implementation is included in row 15 in the table above.

[0241] More specifically, if the picture header structure is included in the slice header, the slice_lmcs_enabled_flag is not included in the slice header. In addition, if it is not included in the slice header, the value of the slice_lmcs_enabled_flag can be inferred according to the following rules: The value of slice_lmcs_enabled_flag is inferred to be equal to ph_lmcs_enabled_flag.

[0242] Alternatively or additionally, the value of slice_lmcs_enabled_flag, if not present in the slice header, can be inferred according to the following rules: The value of slice_lmcs_enabled_flag is inferred to be equal to ph_lmcs_enabled_flag if picture_header_in_slice_header_flag is equal to 1 (picture header structure is included in the slice header).

[0243] Alternatively or additionally, the value of slice_lmcs_enabled_flag, if not present in the slice header, can be inferred according to the following rules: The value of slice_lmcs_enabled_flag is inferred to be equal to 0 if picture_header_in_slice_header_flag is equal to 0.

[0244] The above embodiments can be implemented by replacing the condition "!rect_slice_flag&&NumTilesInPic>1" on lines 6 and 10 with "!rect_slice_flag." In some example implementations, if the value of rect_slice_flag is equal to 0 (indicating that slices in an image are not necessarily rectangular), the value of the NumTilesInPic syntax element must be greater than 0 (e.g., the number of tiles in a slice must be greater than 1). In other words, the value of rect_slice_flag can only be equal to 0 if the number of tiles in an image is greater than 1. In such an implementation, the conditions "!rect_slice_flag&&NumTilesInPic>1" and "!rect_slice_flag" would have the same result. Therefore, conditions (on lines 6 and 10 in all of the above embodiments) that include "!rect_slice_flag&&NumTilesInPic>1" as part of the condition can be replaced with "!rect_slice_flag."

[0245] The above embodiment can be implemented by replacing the condition "!rect_slice_flag&&NumTilesInPic>1" with "!rect_slice_flag" in lines 6 and 10. In some example implementations, when the value of rect_slice_flag is equal to 0 (indicating that each slice in the image contains one or more tiles) and when picture_header_in_slice_header_flag is equal to 0 (indicating that the number of slices in the image is greater than 1), NumTilesInPic must be greater than 1 when picture_header_in_slice_header_flag is equal to 0 and rect_slice_flag is equal to 0.

[0246] The following is a description of the application of the encoding and decoding methods as shown in the above embodiments, and the systems that use them.

[0247] 14 is a diagram illustrating a flowchart of a method for decoding a video bitstream according to an embodiment of the present disclosure. The method illustrated in FIG. 14 is a method, implemented by a decoding device, for decoding an image from a video bitstream, the bitstream including a slice header of a current slice and data representing the current slice, the method including: obtaining parameters used to derive the number of tiles in the current slice from the slice header when a condition is met, the condition including that the slice address of the current slice is not the address of the last tile in the image in which the current slice is located (step 1601); and reconstructing the current slice using the number of tiles in the current slice and the data representing the current slice (step 1603).

[0248] 15 is a diagram illustrating a flowchart of another method for encoding a video bitstream according to an embodiment of the present disclosure. The method illustrated in FIG. 15 is a method, implemented by an encoding device, for encoding a video bitstream, the bitstream including a slice header of a current slice and data representing the current slice, the method including: encoding parameters used to derive the number of tiles in the current slice from the slice header when a condition is met, the condition including that the slice address of the current slice is not the address of the last tile in the image in which the current slice is located (step 1701); and reconstructing the current slice using the number of tiles in the current slice and the data representing the current slice (step 1703).

[0249] Figure 16 illustrates an apparatus for decoding a video bitstream, i.e., a decoder (30), according to an embodiment of the present disclosure. The apparatus illustrated in Figure 16 is an apparatus for decoding an image from a video bitstream, the bitstream including a slice header of a current slice and data representing the current slice, the apparatus including: an acquisition unit (3001) configured to acquire parameters used to derive the number of tiles in the current slice from the slice header when a condition is met, the condition including that the slice address of the current slice is not the address of the last tile in the image in which the current slice is located; and a reconstruction unit (3003) configured to reconstruct the current slice using the number of tiles in the current slice and the data representing the current slice.

[0250] Figure 17 illustrates an apparatus, i.e., an encoder (20), for encoding a video bitstream according to an embodiment of the present disclosure. The apparatus illustrated in Figure 17 is an apparatus for encoding a coded video bitstream, the bitstream including a slice header of a current slice and data representing the current slice, the apparatus including: an encoding unit (2001) configured to encode parameters used to derive the number of tiles in the current slice from the slice header when a condition is met, the condition including that the slice address of the current slice is not the address of the last tile in the image in which the current slice is located; and a reconstruction unit (2003) configured to reconstruct the current slice using the number of tiles in the current slice and the data representing the current slice.

[0251] The video decoding apparatus shown in Figure 16 may be or may be configured by the decoder 30 shown in Figures 1A, 1B, and 3 and the video decoder 3206 shown in Figure 13. Furthermore, the decoding apparatus may be configured by the video coding device 400 shown in Figure 4, the apparatus 500 shown in Figure 5, and the terminal device 3106 shown in Figure 12. The encoding apparatus shown in Figure 17 may be or may be configured by the encoder 20 shown in Figures 1A, 1B, and 3. Furthermore, the encoding apparatus may be configured by the video coding device 400 shown in Figure 4, the apparatus 500 shown in Figure 5, and the capture device 3102 shown in Figure 12.

[0252] The present disclosure discloses the following further figures. Figure 12 is a block diagram showing a content supply system 3100 for realizing a content distribution service. The content supply system 3100 includes a capture device 3102, a terminal device 3106, and optionally a display 3126. The capture device 3102 communicates with the terminal device 3106 via a communication link 3104. The communication link may include the communication channel 13 described above. The communication link 3104 includes, but is not limited to, WIFI, Ethernet, cable, wireless (3G / 4G / 5G), USB, or any type of combination thereof.

[0253] The capture device 3102 may generate data and encode the data by the encoding method as described in the above embodiment. Alternatively, the capture device 3102 may deliver the data to a streaming server (not shown), which encodes the data and transmits the encoded data to the terminal device 3106. The capture device 3102 may include, but is not limited to, a camera, a smartphone or pad, a computer or laptop, a video conferencing system, a PDA, an in-vehicle device, or any combination thereof. For example, as described above, the capture device 3102 may include the source device 12. If the data includes video, the video encoder 20 included in the capture device 3102 may actually perform the video encoding process. If the data includes audio (i.e., voice), the audio encoder included in the capture device 3102 may actually perform the audio encoding process. For some practical scenarios, the capture device 3102 delivers encoded video and audio data by multiplexing them together. For other practical scenarios, for example, in a video conferencing system, the encoded audio data and the encoded video data are not multiplexed. The capture device 3102 delivers the encoded audio data and the encoded video data separately to the terminal device 3106 .

[0254] In the content delivery system 3100, a terminal device 3106 receives and reproduces the encoded data. The terminal device 3106 may be a device having data reception and reproduction capabilities, such as a smartphone or pad 3108, a computer or laptop 3110, a network video recorder (NVR) / digital video recorder (DVR) 3112, a TV 3114, a set-top box (STB) 3116, a video conferencing system 3118, a video surveillance system 3120, a personal digital assistant (PDA) 3122, an in-vehicle device 3124, or any combination thereof, capable of decoding the encoded data described above. For example, as described above, the terminal device 3106 may include the destination device 14. If the encoded data includes video, the video decoder 30 included in the terminal device prioritizes performing video decoding. If the encoded data includes audio, the audio decoder included in the terminal device prioritizes performing audio decoding.

[0255] For a terminal device having a display, such as a smartphone or Pad 3108, a computer or laptop 3110, a network video recorder (NVR) / digital video recorder (DVR) 3112, a TV 3114, a personal digital assistant (PDA) 3122, or an in-vehicle device 3124, the terminal device can provide the decoded data to its display. For terminal devices not equipped with a display, such as an STB 3116, a video conferencing system 3118, or a video surveillance system 3120, an external display 3126 is contacted internally to receive and show the decoded data.

[0256] When each device in the system performs encoding or decoding, it can use an image encoding device or an image decoding device as shown in the above embodiment.

[0257] 13 is a diagram illustrating an example structure of the terminal device 3106. After the terminal device 3106 receives a stream from the capture device 3102, a protocol progression unit 3202 analyzes the transmission protocol of the stream. The protocol includes, but is not limited to, Real Time Streaming Protocol (RTSP), HyperText Transfer Protocol (HTTP), HTTP Live Streaming Protocol (HLS), MPEG-DASH, Real Time Transport Protocol (RTP), Real Time Messaging Protocol (RTMP), or any kind of combination thereof.

[0258] After the protocol progression unit 3202 processes the stream, a stream file is generated. The file is output to the demultiplexing unit 3204. The demultiplexing unit 3204 can separate the multiplexed data into encoded audio data and encoded video data. As mentioned above, in some practical scenarios, for example, in a video conferencing system, the encoded audio data and the encoded video data are not multiplexed. In this situation, the encoded data is sent to the video decoder 3206 and the audio decoder 3208 without passing through the demultiplexing unit 3204.

[0259] This demultiplexing process generates a video elementary stream (ES), an audio ES, and optionally subtitles. The video decoder 3206 includes the video decoder 30 as described in the above embodiment, decodes the video ES using the decoding method as shown in the above embodiment to generate video frames, and supplies this data to the synchronization unit 3212. The audio decoder 3208 decodes the audio ES to generate audio frames and supplies this data to the synchronization unit 3212. Alternatively, the video frames may be stored in a buffer (not shown in FIG. 13) before being supplied to the synchronization unit 3212. Similarly, the audio frames may be stored in a buffer (not shown in FIG. 13) before being supplied to the synchronization unit 3212.

[0260] The synchronization unit 3212 synchronizes the video and audio frames and provides the video / audio to the video / audio display 3214. For example, the synchronization unit 3212 synchronizes the presentation of video and audio information, which may be syntax coded using timestamps for the presentation of the coded audio and visual data and for the delivery of the data stream itself.

[0261] If the stream contains subtitles, the subtitle decoder 3210 decodes the subtitles, synchronizes them with the video and audio frames, and provides the video / audio / subtitles to the video / audio / subtitle display 3216.

[0262] The present invention is not limited to the above-described system, and either the image encoding device or the image decoding device in the above-described embodiments can be incorporated into other systems, for example, car systems.

[0263] [Mathematical Operators] The mathematical operators used in this disclosure are similar to those used in the C programming language. However, the results of integer division and arithmetic shift operations are more strictly defined, and additional operations such as exponentiation and real division are defined. Numbering and counting conventions generally start from 0, e.g., "first" is equivalent to 0th, "second" is equivalent to 1st, and so on.

[0264] [arithmetic operators] The following arithmetic operators are defined as follows: [Table 11]

[0265] [Logical Operators] The following logical operators are defined as follows: x&&y Boolean "and" of x and y x||y Boolean "or" of x and y ! Boolean "not" x?y:zIf x is TRUE or not equal to 0, then it is the value of y, otherwise it is the value of z.

[0266] [relational operator] The following relational operators are defined as follows: > Greater than >= Greater than or equal to < Less than <= Less than or equal to = equal to = != not equal to

[0267] When a relational operator is applied to a syntax element or variable that has been assigned the value "na" (not applicable), the value "na" is treated as the distinct value of that syntax element or variable. The value "na" is considered unequal to any other value.

[0268] [Bitwise Operators] The following bitwise operators are defined as follows: &Bitwise "and". When operating on integer terms, the operation is performed on the two's complement representation of the integer value. When operating on a binary term that contains fewer bits than another term, the shorter term is extended by adding more significant bits equal to 0. | Bitwise "or". When operating on integer terms, the operation is performed on the two's complement representation of the integer value. When operating on a binary term that contains fewer bits than another term, the shorter term is extended by adding more significant bits equal to 0. ^ Bitwise "exclusive or". When operating on integer terms, the operation is performed on the two's complement representation of the integer value. When operating on a binary term that contains fewer bits than another term, the shorter term is extended by adding more significant bits equal to 0. x >> y Arithmetic right shift of the two's complement integer representation of x by the number of bits in y. This function is defined only for non - negative integer values of y. The bits shifted into the most significant bit (MSB) as a result of the right shift have the same value as the MSB of x before the shift operation. x << y Arithmetic left shift of the two's complement integer representation of x by the number of bits in y. This function is defined only for non - negative integer values of y. The bits shifted into the least significant bit (LSB) as a result of the left shift have a value equal to 0.

[0269] [Assignment operator] The following arithmetic operators are defined as follows. = Assignment operator ++ Increment, i.e., x++ is equivalent to x = x + 1. When used as an array index, it takes the value of the variable before the increment operation. -- Decrement, i.e., x-- is equivalent to x = x - 1. When used as an array index, it takes the value of the variable before the decrement operation. += Increment by the specified amount, i.e., x += 3 is equivalent to x = x + 3 and x += (-3) is equivalent to x = x + (-3). -= Decrement by the specified amount, i.e., x -= 3 is equivalent to x = x - 3 and x -= (-3) is equivalent to x = x - (-3).

[0270] [Range notation] The following notations are used to specify a range of values. x = y..z x takes integer values from y to z (including both ends), where x, y, and z are integers and z is greater than y.

[0271] [Mathematical functions] The following mathematical functions are defined. [[ID=X33]] [Number] Asin(x) The inverse sine function, performs the operation on an argument x within the range from - 1.0 to 1.0 (including both ends), The output value is in radians and lies in the range -π÷2 to π÷2 inclusive. Atan(x) is the inverse trigonometric tangent function, The operation is performed on the argument x, and the output value is in the range -π÷2 to π÷2 (inclusive), in radians.

number

number

number

number

number

number

number

[0272] [Order of operation precedence] If the order of precedence of an expression is not explicitly indicated using parentheses, the following rules apply: -Operations with higher precedence are evaluated before any operations with lower precedence. -Operations of equal precedence are evaluated sequentially from left to right.

[0273] The following table specifies the precedence of operations from highest to lowest, with a higher position in the table indicating a higher precedence.

[0274] For operators that are also used in the C programming language, the order of precedence used herein is the same as that used in the C programming language. Table: Operation priority from highest (top of table) to lowest (bottom of table) [Table 12]

[0275] [Textual explanation of logical operations] In the text, logical statements are mathematically described in the following format:

number

number

[0276] For each "If...Otherwise,if...Otherwise,..." statement in the text, "...as follows" or "the following applies" is immediately followed by "If...". The last condition in an "If...Otherwise,if...Otherwise" is always "Otherwise,...". Interleaved "If...Otherwise,if...Otherwise,..." statements can be identified by matching "...as follows" or "...the following applies" that ends with "Otherwise,...".

[0277] In the text, logical statements are mathematically explained in the following format:

number

number

[0278] In the text, logical statements are mathematically explained in the following format:

number

[0279] Although embodiments of the present invention have been described primarily based on video coding, it should be noted that embodiments of coding system 10, encoder 20, and decoder 30 (and correspondingly, system 10), as well as other embodiments described herein, may also be configured for still image processing or coding, i.e., processing or coding of individual images independent of any preceding or subsequent images, as in video coding. Generally, when image processing coding is limited to a single image 17, only the inter-prediction units 244 (encoder) and 344 (decoder) may not be available. All other functions (also referred to as tools or techniques) of video encoder 20 and video decoder 30 may equally be used for still image processing, e.g., residual calculation 204 / 304, transform 206, quantization 208, inverse quantization 210 / 310, (inverse) transform 212 / 312, partitioning 262 / 362, intra prediction 254 / 354, and / or loop filtering 220, 320, as well as entropy coding 270 and entropy decoding 304.

[0280] Embodiments of, for example, the encoder 20 and the decoder 30, and functions described herein with reference to, for example, the encoder 20 and the decoder 30, may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on a computer-readable medium or transmitted as one or more instructions or code over a communication medium and executed by a hardware-based processing unit. Computer-readable media may include computer-readable storage media, which correspond to tangible media such as data storage media, or communication media, which include any medium that facilitates transfer of a computer program from one place to another, for example, according to a communication protocol. Thus, computer-readable media may generally correspond to (1) non-transitory tangible computer-readable storage media or (2) communication media, such as a signal or carrier wave. Data storage media may be any available medium that can be accessed by one or more computers or one or more processors to retrieve instructions, code, and / or data structures for implementing the techniques described in this disclosure. A computer program product may include a computer-readable medium.

[0281] By way of example, and not limitation, such computer-readable storage media may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, flash memory, or any other medium that can be used to store desired program code in the form of instructions or data structures and that can be accessed by a computer. Additionally, any connection is suitable to be referred to as a computer-readable medium. For example, if instructions are transmitted from a website, server, or other remote source using coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave, the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included within the definition of medium. However, computer-readable storage media and data storage media should be understood not to include connections, carrier waves, signals, or other transitory media, but instead to relate to non-transitory tangible storage media. As used herein, "disk" and "disc" include compact discs (CDs), laser discs, optical discs, digital versatile discs (DVDs), floppy disks, and Blu-ray discs, where typically, a disk is one that reproduces data magnetically, and a disc is one that reproduces data optically with a laser. Combinations of the above should also be included within the scope of computer-readable media.

[0282] The instructions may be executed by one or more processors, such as one or more digital signal processors (DSPs), general-purpose microprocessors, application-specific integrated circuits (ASICs), field-programmable logic arrays (FPGAs), or other equivalent integrated or discrete logic circuitry. Accordingly, the term "processor," as used herein, may refer to any of the foregoing structures or any other structure suitable for implementing the techniques described herein. Additionally, in some aspects, the functionality described herein may be provided in dedicated hardware and / or software modules configured for encoding and decoding, or incorporated into a combined codec. Additionally, these techniques may be implemented entirely in one or more circuits or logic elements.

[0283] The techniques of this disclosure may be implemented in a wide variety of devices or apparatuses, including a wireless handset, an integrated circuit (IC), or a set of ICs (e.g., a chipset). While various components, modules, or units are described in this disclosure to highlight functional aspects of devices configured to perform the disclosed techniques, realization by different hardware units is not necessarily required. Rather, the various units may be combined into a codec hardware unit, as described above, in conjunction with suitable software and / or firmware, or may be provided by a collection of interoperating hardware units including one or more processors, as described above.

[0284] The present disclosure discloses the following 21 additional aspects.

[0285] (Item 1) An aspect of a method for decoding a video or image bitstream implemented by a decoding device, the bitstream including data representing a current slice, the method comprising: obtaining the slice address of the current slice from a slice header of the bitstream, provided that an existence condition is met, the existence condition including that the image header syntax structure is not present in the slice header; and reconstructing the current slice based on the slice address of the current slice.

[0286] (Item 2) An aspect of the method of aspect 1, wherein the image header syntax structure not being present in the slice header includes a syntax element equal to false, and the syntax element equal to false specifies that the image header syntax structure is not present in the slice header.

[0287] (Item 3) 3. The method of claim 1, wherein a value of the slice address of the current slice is inferred to be equal to zero if the existence condition is not met.

[0288] (Item 4) An aspect of a method for decoding a video or image bitstream implemented by a decoding device, the bitstream including data representing a current slice, the method comprising: obtaining parameters used to derive the number of tiles of the current slice from a slice header of the bitstream, provided that an existence condition is met, the existence condition including that the image header syntax structure is not present in the slice header; and reconstructing the current slice based on the number of tiles in the current slice.

[0289] (Item 5) An aspect of the method of aspect 4, wherein the image header syntax structure not being present in the slice header includes a syntax element equal to false, and the syntax element equal to false specifies that the image header syntax structure is not present in the slice header.

[0290] (Item 6) An embodiment of the method of embodiment 4 or 5, wherein the value of the parameter of the current slice is inferred to be equal to the total number of tiles in the image, which is the value of the current slice minus 1, if the existence condition is not met.

[0291] (Item 7) An aspect of a method for decoding a video or image bitstream implemented by a decoding device, the bitstream including data representing a current slice, the method comprising: obtaining parameters used to derive the number of tiles of the current slice from a slice header of the bitstream, provided that an existence condition is met, the existence condition including that the slice address of the current slice is not the address of the last tile in the image in which the current slice is positioned; and reconstructing the current slice based on the number of tiles in the current slice.

[0292] (Item 8) An aspect of the method described in aspect 7, wherein the slice address of the current slice being the address of the last tile in the image includes the number of tiles in the image minus the slice address of the current slice being equal to 1.

[0293] (Item 9) 9. An embodiment of the method of embodiment 7 or 8, wherein the value of the parameter of the current slice is inferred to be equal to a default value if the existence condition is not met.

[0294] (Item 10) 10. The method of claim 9, wherein the default value is equal to 0.

[0295] (Item 11) An aspect of a method for decoding a video or image bitstream implemented by a decoding device, the bitstream including data representing a current slice, the method comprising: obtaining parameters used to derive the number of tiles of the current slice from a slice header of the bitstream, provided that an existence condition is met, the existence condition including that the slice address of the current slice is not the address of the last tile in the image in which the current slice is positioned and that the image header syntax structure is not present in the slice header; and reconstructing the current slice based on the number of tiles in the current slice.

[0296] (Item 12) An aspect of the method of aspect 11, wherein the value of the parameter is inferred to be equal to a first default value if the slice address of the current slice is the address of the last tile in the image, or is a second default value, and the image header syntax structure is not present in the slice header.

[0297] (Item 13) An aspect of a method for decoding a video or image bitstream implemented by a decoding device, the bitstream including data representing a current slice, the method comprising: obtaining a parameter (such as slice_lmcs_enabled_flag) used to specify whether luma mapping using chroma scaling is enabled for the current slice from a slice header of the bitstream, provided that an existence condition is met, the existence condition including the image header syntax structure not being present in the slice header; and reconstructing the current slice based on the number of tiles in the parameter.

[0298] (Item 14) An aspect of the method of aspect 13, wherein the image header syntax structure not being present in the slice header includes a syntax element equal to false, and the syntax element equal to false specifies that the image header syntax structure is not present in the slice header.

[0299] (Item 15) An aspect of a method for encoding video or an image into a bitstream, implemented by an encoding device, wherein the bitstream includes data representing a current slice, the method comprising: including the slice address of the current slice from a slice header of the bitstream into the bitstream, on condition that an existence condition is met, the existence condition including that the image header syntax structure is not present in the slice header; and reconstructing the current slice based on the slice address of the current slice.

[0300] (Item 16) 16. An embodiment of a decoder (30) comprising processing circuitry for performing the method of any one of embodiments 1 to 15.

[0301] (Item 17) An aspect of a computer program product comprising program code for performing the method according to any one of the preceding aspects when executed on a computer or processor.

[0302] (Item 18) An aspect of a decoder, the decoder comprising: 16. An embodiment comprising: one or more processors; and a non-transitory computer-readable storage medium coupled to the processor and storing programming for execution by the processor, the programming, when executed by the processor, configuring the decoder to perform the method of any one of the preceding embodiments 1 to 15.

[0303] (Item 19) 16. An aspect of a non-transitory computer-readable medium bearing program code that, when executed by a computing device, causes the computing device to perform the method of any one of the preceding aspects 1 to 15.

[0304] (Item 20)

[0305] An aspect of an encoded bitstream for the video signal by including a plurality of syntax elements, wherein the plurality of syntax elements include picture_header_in_slice_header_flag, and a flag (such as slice_lmcs_enabled_flag) is conditionally signaled within the slice header based at least on the value of picture_header_in_slice_header_flag.

[0306] (Item 21) An embodiment of a non-transitory recording medium comprising an encoded bitstream decoded by an image decoding device, the bitstream being generated by dividing a frame of a video signal or image signal into a plurality of blocks, and comprising a plurality of syntax elements, the plurality of syntax elements including rect_slice_flag or sps_num_subpics_minus1, and a flag (such as slice_lmcs_enabled_flag) being conditionally signaled in the slice header based at least on the value of picture_header_in_slice_header_flag. [Other possible items] [Item 1] 1. A method for decoding an image from a video bitstream, implemented by a decoding device, wherein the bitstream includes a slice header of a current slice and data representing the current slice, the method comprising: obtaining parameters from the slice header that are used to derive the number of tiles in the current slice when a condition is met, the condition including that the slice address of the current slice is not the address of the last tile in the image in which the current slice is located; reconstructing the current slice using the number of tiles in the current slice and the data representing the current slice; A method comprising: [Item 2] The method described in item 1 includes determining that the slice address of the current slice is the address of the last tile in the image when the number of tiles in the image minus the slice address of the current slice is equal to 1. [Item 3] Item 1. The method of claim 1, further comprising determining that the slice address of the current slice is not the address of the last tile in the image when the value of the number of tiles in the image minus the slice address of the current slice is greater than 1. [Item 4] 4. The method according to any one of items 1 to 3, wherein the value of the parameter of the current slice is inferred to be equal to a default value if a condition is not met. [Item 5] Item 5. The method according to item 4, wherein the default value is equal to 0. [Item 6] 6. The method of any one of items 1 to 5, wherein the slice address is in tile units. [Item 7] 7. The method of any one of items 1 to 6, wherein the condition further comprises determining that the current slice is in a raster scan mode. [Item 8] 8. The method of claim 1, wherein the step of reconstructing the current slice using the number of tiles in the current slice includes the steps of determining a scan order of the coding tree units in the current slice using the number of tiles in the current slice, and reconstructing the coding tree units in the current slice using the scan order. [Item 9] 1. A method for encoding a video bitstream, implemented by an encoding device, wherein the bitstream includes a slice header for a current slice and data representing the current slice, the method comprising: encoding parameters used to derive the number of tiles in the current slice from the slice header if a condition is met, the condition including that the slice address of the current slice is not the address of the last tile in the image in which the current slice is located; reconstructing the current slice using the number of tiles in the current slice and the data representing the current slice; A method comprising: [Item 10] 1. An apparatus for decoding an image from a video bitstream, the bitstream including a slice header of a current slice and data representing the current slice, the apparatus comprising: an acquisition unit configured to acquire parameters used to derive the number of tiles in the current slice from the slice header when a condition is met, the condition including that the slice address of the current slice is not the address of the last tile in the image in which the current slice is located; a reconstruction unit configured to reconstruct the current slice using the number of tiles in the current slice and the data representing the current slice; An apparatus comprising: [Item 11] 1. An apparatus for encoding a coded video bitstream, the bitstream including a slice header of a current slice and data representing the current slice, the apparatus comprising: an encoding unit configured to encode parameters used to derive the number of tiles in the current slice from the slice header when a condition is met, the condition including that the slice address of the current slice is not the address of the last tile in the image in which the current slice is located; a reconstruction unit configured to reconstruct the current slice using the number of tiles in the current slice and the data representing the current slice; An apparatus comprising: [Item 12] An encoder (20) comprising a processing circuit for carrying out the method described in item 9. [Item 13] A decoder (30) comprising processing circuitry for carrying out the method according to any one of items 1 to 8. [Item 14] 10. A computer program product comprising program code for performing the method according to any one of items 1 to 9 when the computer program product is run on a computer or processor. [Item 15] A decoder comprising: one or more processors; a non-transitory computer-readable storage medium coupled to the processor and storing programming for execution by the processor, the programming, when executed by the processor, configuring the decoder to perform the method of any one of items 1 to 8; and A decoder comprising: [Item 16] 1. An encoder comprising: one or more processors; a non-transitory computer-readable storage medium coupled to the processor and storing programming for execution by the processor, the programming, when executed by the processor, configuring the encoder to perform the method of claim 9; and An encoder comprising: [Item 17] A non-transitory computer readable medium carrying program code that, when executed by a computing device, causes said computing device to perform the method of any one of items 1 to 9. [Item 18] 1. A non-transitory storage medium containing a video bitstream, the bitstream including a slice header of a current slice and data representing the current slice, the slice header including a slice address of the current slice; A non-transitory storage medium, wherein the slice header further includes a parameter used to derive the number of tiles in the current slice from the slice header when a condition is met, and the condition includes the slice address of the current slice not being the address of the last tile in the image in which the current slice is positioned.

Claims

1. 1. A method for decoding an image, comprising: receiving a video bitstream including a slice header of a current slice and data representing the current slice, the slice header including a picture_header_in_slice_header_flag, and a luma mapping with chroma scaling (LMCS) related flag being conditionally present in the slice header; if the LMCS-related flag is not present in the slice header, inferring the value of the LMCS-related flag by determining whether a picture header structure is present in the slice header based on the value of the picture_header_in_slice_header_flag; determining, in response to determining that the value of the picture_header_in_slice_header_flag indicates that the picture header structure is present in the slice header, that the value of the LMCS-related flag is equal to ph_lmcs_enabled_flag, wherein the video bitstream includes the ph_lmcs_enabled_flag, and the ph_lmcs_enabled_flag indicates whether LMCS is enabled for the picture; determining, in response to determining that the value of the picture_header_in_slice_header_flag indicates that the picture header structure is not present in the slice header, that the value of the LMCS-related flag is equal to 0, indicating that LMCS is disabled for the current slice; A method comprising:

2. The method of claim 1 , wherein if the value of the LMCS-related flag is equal to 1, the value of the LMCS-related flag indicates that LMCS is enabled for the current slice.

3. The method of claim 1 or 2, wherein if the value of the ph_lmcs_enabled_flag is equal to 1, the value of the ph_lmcs_enabled_flag indicates that LMCS is enabled for the image.

4. The method of claim 1 , wherein if the value of the ph_lmcs_enabled_flag is equal to 0, the value of the ph_lmcs_enabled_flag indicates that LMCS is disabled for the image.

5. performing LMCS on the current slice based on the value of the LMCS-related flag. The method of claim 1 , further comprising:

6. 1. A method of encoding an image, comprising: generating a video bitstream including a slice header of a current slice and data representing the current slice, the slice header including a picture_header_in_slice_header_flag, wherein a luma mapping using chroma scaling (LMCS) related flag is conditionally signaled in the slice header, and if the LMCS related flag is not present in the slice header, a value of the LMCS related flag is inferred by determining whether a picture header structure is present in the slice header based on a value of the picture_header_in_slice_header_flag, and in response to determining that the value of picture_header_in_slice_header_flag indicates that the picture header structure is present in the slice header, the value of the LMCS-related flag is equal to ph_lmcs_enabled_flag, the video bitstream includes the ph_lmcs_enabled_flag, the ph_lmcs_enabled_flag indicating whether LMCS is enabled for the picture, and in response to determining that the value of the picture_header_in_slice_header_flag indicates that the picture header structure is not present in the slice header, the value of the LMCS-related flag is equal to 0, indicating that LMCS is disabled for the current slice. A method comprising:

7. The method of claim 6 , wherein if the value of the LMCS-related flag is equal to 1, the value of the LMCS-related flag indicates that LMCS is enabled for the current slice.

8. The method of claim 6 or 7, wherein if the value of the ph_lmcs_enabled_flag is equal to 1, the value of the ph_lmcs_enabled_flag indicates that LMCS is enabled for the image.

9. The method of claim 6 , wherein if the value of the ph_lmcs_enabled_flag is equal to 0, the value of the ph_lmcs_enabled_flag indicates that LMCS is disabled for the image.

10. A decoder comprising processing circuitry for carrying out the method of any one of claims 1 to 5.

11. An encoder comprising processing circuitry for carrying out the method of any one of claims 6 to 9.

12. A decoder comprising: one or more processors; a non-transitory computer-readable storage medium coupled to the processor and storing programming for execution by the processor, the programming, when executed by the processor, configuring the decoder to perform the method of any one of claims 1 to 5; and A decoder comprising:

13. 1. An encoder comprising: one or more processors; a non-transitory computer-readable storage medium coupled to the processor and storing programming for execution by the processor, the programming, when executed by the processor, configuring the encoder to perform the method of any one of claims 6 to 9; and An encoder comprising:

14. 1. A data structure for an encoded video bitstream, comprising: a slice header of a current slice and data representing the current slice, the encoded video bitstream further having a ph_lmcs_enabled_flag indicating whether LMCS is enabled for a picture, the slice header having a picture_header_in_slice_header_flag; Luma mapping with chroma scaling (LMCS) related flags are conditionally signaled in the slice header based on the picture_header_in_slice_header_flag and the ph_lmcs_enabled_flag; If the LMCS-related flag is not present in the slice header, the value of the LMCS-related flag is inferred by determining whether a picture header structure is present in the slice header based on the value of the picture_header_in_slice_header_flag, where if the value of the picture_header_in_slice_header_flag indicates that the picture header structure is present in the slice header, the value of the LMCS-related flag is equal to the value of the ph_lmcs_enabled_flag included in the encoded video bitstream, and if the value of the picture_header_in_slice_header_flag indicates that the picture header structure is not present in the slice header, the value of the LMCS-related flag is equal to 0, indicating that LMCS is disabled for the current slice; The value of the LMCS-related flag is used to perform LMCS on the current slice. Data structure.

15. 1. A data structure for an encoded video bitstream, comprising: a slice header of a current slice and data representing the current slice, the encoded video bitstream further having a ph_lmcs_enabled_flag indicating whether LMCS is enabled for a picture, the slice header having a picture_header_in_slice_header_flag; Luma mapping with chroma scaling (LMCS) related flags are conditionally signaled in the slice header based on the picture_header_in_slice_header_flag and the ph_lmcs_enabled_flag; If the LMCS-related flag is not present in the slice header, the decoder uses the value of the picture_header_in_slice_header_flag in a process to infer the value of the LMCS-related flag by determining whether a picture header structure is present in the slice header, and if the value of the picture_header_in_slice_header_flag indicates that the picture header structure is present in the slice header, the decoder the decoder uses the value of the LMCS-related flag in a process to determine that the LMCS-related flag is equal to the value of the ph_lmcs_enabled_flag included in the loaded video bitstream, and if the value of the picture_header_in_slice_header_flag indicates that the picture header structure is not present in the slice header, the decoder uses the value of the LMCS-related flag in a process to determine that the LMCS-related flag is equal to 0, indicating that LMCS is disabled for the current slice; The value of the LMCS-related flag is used in the decoder's process for performing LMCS on the current slice. Data structure.

16. 1. A method for generating an encoded video bitstream, comprising: generating the encoded video bitstream including a slice header of a current slice and data representing the current slice, the slice header including a picture_header_in_slice_header_flag, wherein a luma mapping using chroma scaling (LMCS) related flag is conditionally signaled in the slice header, and if the LMCS related flag is not present in the slice header, a value of the LMCS related flag is inferred by determining whether a picture header structure is present in the slice header based on a value of the picture_header_in_slice_header_flag, and in response to determining that the value of picture_header_in_slice_header_flag indicates that the picture header structure is present in the slice header, the value of the LMCS-related flag is equal to ph_lmcs_enabled_flag, the encoded video bitstream includes the ph_lmcs_enabled_flag, the ph_lmcs_enabled_flag indicating whether LMCS is enabled for a picture, and in response to determining that the value of picture_header_in_slice_header_flag indicates that the picture header structure is not present in the slice header, the value of the LMCS-related flag is equal to 0, indicating that LMCS is disabled for the current slice. A generating method comprising:

17. A computer program for causing a decoder to carry out the method of any one of claims 1 to 5.

18. A computer program for causing an encoder to carry out the method of any one of claims 6 to 9.

Images