Hardware-aided software modem

Abstract

To provide a hardware-aided software modem capable of improving processing speed when a modem is implemented by software and improving communication speed as modem performance.SOLUTION: A hardware-aided software modem includes a processor 29, a plurality of macro processing circuits 21-24 that execute a portion of modem signal processing, and a memory 20 that stores a modem software program that causes the processor to execute remaining processing excluding at least the portion from the modem signal processing. The processor is equipped in its inside with a plurality of control and arithmetic cores 25-28 that cooperate with the macro processing circuits, and each of the plurality of macro processing circuits and control and arithmetic cores performs pipeline processing so that the processing time for the modem signal processing is uniform.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to a hardware-aided software modem that realizes a modem used in a mobile phone or the like by software. [Background technology]

[0002] Historically, modems have evolved from the early 300 bps modems used for data communications in the late 1960s to 4800 bps digital modems for fax machines in the 1970s, and now in the age of mobile phones, they have reached speeds of several hundred Mbps. 5G communications are aiming for even faster speeds, reaching gigabits per second. Since the digital modem era, dedicated LSIs have become the norm for modem configuration technology, but there are also software modems, which are software-based. Software modems are inferior to dedicated LSIs in terms of processing speed, or communication speed as a modem's performance, but they offer advantages such as lower cost and the ability to incorporate application software that utilizes the modem into the modem software.

[0003] As in Reference 1, software modems are based on the assumption that the hardware will consist of only a CPU and memory, and some have devised software processing methods such as interrupt processing.However, to increase speed, CPUs with many CPU cores are used, or special CPUs with a structure that allows parallel processing using many cores, such as GPUs (Graphics Processing Units).

[0004] On the other hand, unrelated to modems, pipeline processing, which allows multiple instructions to be executed in parallel, has long been used to speed up computer processing, and the present invention makes it possible to perform pipeline processing efficiently. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Patent Publication No. 2001-197128 Summary of the Invention [Problem to be solved by the invention]

[0006] Even with a software modem, it enables high speeds, achieving communication speeds of several hundred Mbps, comparable to local 5G and 4G. [Effects of the Invention]

[0007] It can achieve communication speeds comparable to 5G and 4G, and can also be equipped with application software that uses the modem. It can be customized to suit a wide variety of customer needs, and a system that is particularly suitable for local 5G applications can be built. [Brief explanation of the drawings]

[0008] [Figure 1] Figure 1 shows the general configuration of a software modem. [Figure 2] FIG. 2 shows the signal processing flow of a modem according to the present invention. [Figure 3] FIG. 3 shows the hardware configuration of a software modem according to the present invention. [Figure 4] FIG. 4 shows how the software processing of the macro circuit according to the present invention is pipelined. [Figure 5] FIG. 5 shows an example where the processing times of pipeline processing are not uniform. DETAILED DESCRIPTION OF THE INVENTION

[0009] Figure 1 shows a simplified general configuration of a software modem, which has a CPU and memory (shown as MEMORY in the diagram) just like a PC, and along with an OS (operating system) that is the basic software that runs the PC, the modem software is installed in MEMORY as PC application software. The DAC / ADC in Figure 1 has the function of converting digital data resulting from PC processing into analog data and sending it, i.e., generating it as a modem output signal, and conversely, the analog-to-digital conversion function of converting modem input signals received as analog data into digital data for processing by the PC.

[0010] Today, CPU performance has improved by incorporating multiple cores, such as six, but modems are limited to a few Mbps, which is the speed of 3G mobile phones. However, as seen in recent 4G (LTE) communications, we are now in an era where modems are required to have communication speeds of several hundred Mbps for video viewing.

[0011] Figure 2 shows the flow of signal processing (modem signal processing) in a mobile phone modem, with the transmitting side on the left and the receiving side on the right. On the transmitting side, user data is divided into frames at a specified length, and a redundant code for error detection called CRC is added to each frame in CRC adding unit 1 to detect errors that occur during communication, and the format is adjusted as a frame signal. In encoding unit 2, an FEC (Forward Error Correction) function is implemented to counter transmission errors, and the data is encoded using an LDPC (Low Density Parity Check) code or a turbo code.

[0012] The scrambling unit 3 randomizes the data to ensure uniform radio energy and improves the coding efficiency of the LDPC code (by preventing the creation of unusual patterns such as consecutive zeros). The modulation unit 4 then combines multiple bits from the scrambling unit output to form a symbol, and determines a two-dimensional coordinate point for QAM (quadrature amplitude modulation) for each symbol. In the present invention, there are 64 coordinate points, and each symbol is 64QAM, consisting of 6 bits of data. The precoding unit 5 forms spatial channels for the multiple antennas used so that they are orthogonal to each other, for MIMO (Multiple Input and Multiple Output) control, and performs weighting to appropriately control the transmission power allocated to each channel.

[0013] The resource element mapping unit 6 converts the precoding unit output data into multi-carrier data and performs frequency division multiplexing. The IFFT (Inverse Fast Fourier Transform) unit 7 converts the data string from frequency space to time space, and the DAC unit 8 converts the digital data into analog data and transmits it as radio waves.

[0014] On the receiving side, analog radio waves are first converted to digital by the ADC unit 17, the data string is converted from time space to frequency space by the FFT (Fast Fourier Transform) unit 16, and the resource element demapping unit 15 extracts data of frequency components at predetermined positions from the frequency division multiplexed signal.

[0015] The equalization processing unit 14 corrects the time difference in the arrival of radio waves (the time difference between radio waves received directly between antennas and radio waves received after being reflected by obstacles such as mountains, multipath fading), and FFT processing and IFFT processing are also used here. Thereafter, the demodulation unit 13, descrambling unit 12, decoding unit 11, and CRC check unit 10 perform signal processing that is the reverse of that on the transmitting side.

[0016] Table 1 shows estimated computational complexity for software processing elements. To improve the speed (communication speed) of a software modem, it is important to implement circuitry (hardware) for computationally intensive elements and to integrate the circuits into LSI. Therefore, it is effective to combine these operations—arithmetic operations such as addition, multiplication, and division, logical operations such as AND and OR, shift operations, and bit operations—to form a macro processing circuit and integrate it into LSI, along with basic circuits and sequence circuits that implement specific algorithms. (Those skilled in the art refer to such LSIs as custom LSIs.) The basic circuits mentioned above include logical operations such as AND and OR, shift operations, and bit operations, as well as temporary registers that temporarily store data during computation. A sequence circuit is a sequencer that executes algorithms for efficient computation and has the computational instruction function (computation program).

[0017] [Table 1]

[0018] From Table 1, it is preferable to first select at least one of the encoding process and FFT / IFFT process, which require a relatively large amount of calculations, as candidates for implementing macro processing circuits (LSI). Processes with a medium amount of calculations, such as bit processing, scrambling, and modulation / demodulation, can be combined with processes with a small amount of calculations and implemented in LSI (for example, combining bit processing and CRC processing). Processes with a small amount of calculations can be processed by software without being implemented in LSI.

[0019] FIG. 3 shows an example of the configuration of hardware (e.g., a hardware-aided software modem (described later) or a system-on-chip) according to the present invention. This configuration includes a processor 29, four macro processing circuits 21, 22, 23, and 24, each of which performs a portion of modem signal processing, and a memory 20 storing a program (modem software program) that causes the processor 29 to perform at least the remaining modem signal processing, excluding the processing performed by the four macro processing circuits 21, 22, 23, and 24. The encoding processing circuit 21 performs the processing of the encoding unit 2 and the decoding unit 11 shown in FIG. 2. Furthermore, the processing performed by the bit processing circuit 22 in the scrambling unit 3 and the descrambling unit 12 shown in FIG. 2 involves writing data horizontally and reading data vertically from memory. Because software processing by the processor 29 requires complex and time-consuming memory access, the horizontal-vertical conversion is implemented in hardware to reduce the time required.

[0020] The addition and check processing of CRC in Fig. 2 is also performed in this bit processing circuit. Modulation / demodulation processing circuit 23 performs the processing of the modulation section and demodulation section in Fig. 2. FFT / IFFT processing circuit (in the present invention, the term "fast Fourier transform" is used as a general term for FFT and IFFT) 24 performs fast Fourier transform processing which requires high calculation power. Control calculation cores 25, 26, 27, and 28 corresponding to each of the four macro processing circuits described above are built into processor 29. Processor 29 is equivalent to the CPU in Fig. 1, and will be commonly referred to by those skilled in the art as a microprocessor or CPU.

[0021] Furthermore, an analog front end 30 performs the functions of the DAC section 8 and ADC section 17 in Fig. 2, as well as transmitting (modulating, etc.) and receiving (demodulating, etc.) radio waves. This analog front end 30 corresponds to the DAC / ADC in Fig. 1. The processor 29, memory 20, and four macro processing circuits 21, 22, 23, and 24 shown in Fig. 3 are implemented on a single chip as an LSI. The analog front end 30 can also be accommodated on a single chip.

[0022] The four macro processing circuits 25, 26, 27, and 28 described above may cooperate with the control calculation cores 25, 26, 27, and 28 to perform pipeline processing as software. For example, if some of the calculations performed by each macro processing circuit are performed by the corresponding control calculation core, the calculation time can be shortened compared to when the macro processing circuit performs the calculation alone, and the pipeline processing time can be made uniform. The pipeline processing shown in Figure 4 is uniform, and there is no idle time (or waiting time), so processing is executed efficiently.

[0023] Furthermore, data can be stored and transferred for each processing unit in each macro processing circuit, and the basic circuit of the macro processing circuit has a temporary register, so there is no need to store and transfer data for each operation, and the memory capacity required for storing and transferring intermediate data can be reduced.

[0024] Figure 5 shows an example where the times for each process A, B, C, and D in the pipeline processing are not equal and are uneven, making it difficult to utilize the characteristic of pipeline processing, which is the ability to process multiple instructions in parallel, and resulting in a drop in processing efficiency. The memory 20 in Figure 3 is loaded with programs such as modem software, protocol software for 5G communications, and customized software to meet customer requirements.

[0025] In addition to the three software programs mentioned above, memory 20 also includes a program memory containing an operating system as basic software (not shown), a working memory for temporarily storing calculation data, and a flash memory for storing data that needs to be stored permanently.

[0026] The above-mentioned software implemented can be described in terms of the OSI seven-layer protocol defined by ISO (International Organization for Standardization), which includes modem software as Layer 1 (physical layer), MAC (Medium access Control), RLC (Radio Link Control), PDCP (Packet Data Convergence Protocol) as Layer 2, RPC (Radio Resource Control) as Layer 3, and protocol software including Layer 4 which executes Internet protocols. Furthermore, customized software is used in Layers 6 and 7 to transmit image data, sensor data, etc., and to execute various functions required by customer systems.

[0027] In an in-house wireless network system such as local 5G, it is common for a large number of sensor terminals and surveillance cameras to be connected to the network, and for a management center to collect data received from the terminals and perform data analysis and management as requested by the customer. Customized software performs the data transfer and analysis management functions required for this purpose.

[0028] The analysis management function not only centralizes the management of all sensor terminal information managed by the management sensor, but also has an analysis management function for each sensor terminal that determines whether the sensor information is normal or abnormal, manages the sensor information chronologically, and queries other sensor terminals about their sensor sensitivity settings. This customization software allows for flexible response to customer systems.

[0029] A major feature of 5G mobile phones is their ability to transmit ultra-high definition video in a short time at communication speeds of several gigabits per second. However, for local 5G, customers require communication speeds of several hundred Mbps to be sufficient, and many prioritize customization functions over speed, making this invention highly practical.

[0030] The modem of the present invention realizes many of its functions through software processing, but some functions are realized by a macro processing circuit, i.e., hardware, so it can be called a hardware-aided software modem.

[0031] In the example of Fig. 3, four macro processing circuits (e.g., LSIs) are provided that execute some of the modem signal processing shown in Fig. 2, but the number of macro processing circuits may be one or more. Also, in Fig. 3, in order to equalize the processing time of pipeline processing, a configuration is adopted in which a control arithmetic core corresponding to each macro processing circuit assists the processing executed by that macro processing circuit, but each macro processing circuit may perform processing independently without assistance from a control arithmetic core. Also, in Fig. 3, protocol software and customization software are implemented in addition to modem software, but software other than the protocol software and customization software may be implemented, and the implementation of the protocol software and customization software may be omitted. [Industrial Applicability]

[0032] Since the modem function, which can achieve communication speeds of several hundred megabits per second, can be executed in software, it can be used not only as a modem for 4G mobile phones, but also in 5G mobile phone systems (especially local 5G), and its industrial applicability is extremely great. [Explanation of symbols]

[0033] 1. CRC appended part 2. Encoding section 3. Scrambling Section 4. Modulation section 5. Pre-coding section 6. Resource Element Mapping Section 7.IFFT section 8.DAC section 10.CRC check section 11. Decoding section 12. Descrambling section 13. Demodulation section 14. Equivalent Processing Section 15. Resource element demapping unit 16.FFT section 17.ADC section 20. Memory 21. Encoding processing circuit 22.Bit processing circuit 23. Modulation / demodulation processing circuit 24.FFT / IFFT processing circuit 25. Control calculation core 1 26. Control calculation core 2 27. Control calculation core 3 28. Control calculation core 4 29. Processor 30. Analog Front End

Claims

[Claim 1] A hardware-aided software modem comprising a processor, a plurality of macro processing circuits which execute a part of modem signal processing, and a memory which stores a modem software program which causes the processor to execute at least the remaining part of the modem signal processing excluding the part, wherein the processor is provided with a plurality of control arithmetic cores which cooperate with the macro processing circuits, and wherein each of the plurality of macro processing circuits and control arithmetic cores performs pipeline processing so that the processing time of the modem signal processing is uniform.

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