Methods for performing wrap-around motion compensation
The method of wraparound motion compensation addresses the challenge of high compression efficiency in video coding standards by enhancing encoding and decoding processes, aligning with the goals of VVC/H.266.
Patent Information
- Application Number
- JP2025108944
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2019-12-17
- Filing Date
- 2025-06-27
- Publication Date
- 2025-09-11
- Estimated Expiration
- 2040-12-17
AI Technical Summary
Existing video coding standards face challenges in achieving high compression efficiency, particularly with the development of advanced standards like VVC/H.266, where wraparound motion compensation techniques are needed to enhance coding performance.
A method and system for performing wraparound motion compensation by receiving a wraparound motion compensation flag and offset, enabling enhanced motion compensation processes in video encoding and decoding.
Improves coding efficiency by allowing for more effective compression and decompression of video data, aligning with the goals of advanced standards like VVC/H.266.
Smart Images

Figure 2025133773000001_ABST
Abstract
Description
[Technical Field]
[0001] CROSS-REFERENCE TO RELATED APPLICATIONS
[0001] This disclosure claims priority to and the benefit of priority to U.S. Provisional Patent Application No. 62 / 949,396, filed December 17, 2019. The provisional application is incorporated herein by reference in its entirety.
[0002] Technical Field FIELD OF THE DISCLOSURE
[0002] This disclosure relates generally to video processing, and more particularly to methods and systems for performing wraparound motion compensation. [Background technology]
[0003] background
[0003] A video is a set of static pictures (or "frames") that capture visual information. To reduce storage memory and transmission bandwidth, a video can be compressed before storage or transmission and decompressed before display. The compression process is typically referred to as encoding, and the decompression process is typically referred to as decoding. There are various video coding formats that use standardized video coding techniques, most commonly based on prediction, transform, quantization, entropy coding, and in-loop filtering. Standardization organizations have developed video coding standards that specify specific video coding formats, such as the High Efficiency Video Coding (e.g., HEVC / H.265) standard, the Versatile Video Coding (e.g., VVC / H.266) standard, and the AVS standard. As more and more advanced video coding techniques are adopted into video standards, the coding efficiency of new video coding standards becomes increasingly higher. Summary of the Invention [Means for solving the problem]
[0004] Disclosure Overview
[0004] An embodiment of the present disclosure provides a method for performing motion compensation, the method including: receiving a first wraparound motion compensation flag, where the first wraparound motion compensation flag is associated with a picture; determining whether the first wraparound motion compensation flag is enabled; and, in response to determining that the first wraparound motion compensation flag is enabled, receiving a wraparound motion compensation offset, where the wraparound motion compensation offset is associated with the picture; and performing wraparound motion compensation on the picture according to the first wraparound motion compensation flag and the wraparound motion compensation offset.
[0005]
[0005] An embodiment of the present disclosure further provides a system for performing motion compensation, comprising: a memory that stores a set of instructions; and a processor, wherein the processor is configured to execute the set of instructions to cause the system to: receive a first wraparound motion compensation flag, wherein the first wraparound motion compensation flag is associated with a picture; determine whether the first wraparound motion compensation flag is enabled; and, in response to determining that the first wraparound motion compensation flag is enabled, receive a wraparound motion compensation offset, wherein the wraparound motion compensation offset is associated with the picture; and perform wraparound motion compensation on the picture according to the first wraparound motion compensation flag and the wraparound motion compensation offset.
[0006]
[0006] An embodiment of the present disclosure further provides a non-transitory computer-readable medium storing a set of instructions, the set of instructions being executable by one or more processors of the device to cause the device to initiate a method of performing motion compensation, the method including receiving a first wraparound motion compensation flag, wherein the first wraparound motion compensation flag is associated with a picture; determining whether the first wraparound motion compensation flag is enabled; and in response to determining that the first wraparound motion compensation flag is enabled, receiving a wraparound motion compensation offset, wherein the wraparound motion compensation offset is associated with the picture; and performing wraparound motion compensation on the picture in accordance with the first wraparound motion compensation flag and the wraparound motion compensation offset.
[0007] BRIEF DESCRIPTION OF THE DRAWINGS
[0007] Embodiments and various aspects of the present disclosure are illustrated in the following detailed description and the accompanying drawings, in which the various features shown are not drawn to scale. [Brief explanation of the drawings]
[0008] [Figure 1] 8 illustrates the structure of an exemplary video sequence according to some embodiments of the present disclosure. [Figure 2A]
[0009] 1 shows a schematic diagram of an exemplary encoding process according to some embodiments of the present disclosure. [Figure 2B]
[0010] 10 shows a schematic diagram of another exemplary encoding process according to some embodiments of the present disclosure. [Figure 3A]
[0011] 1 shows a schematic diagram of an exemplary decoding process according to some embodiments of the present disclosure. [Figure 3B]
[0012] 10 shows a schematic diagram of another exemplary decoding process according to some embodiments of the present disclosure. [Figure 4]
[0013] 1 shows a block diagram of an exemplary apparatus for encoding or decoding video, according to some embodiments of the present disclosure. [Figure 5A]
[0014] FIG. 10 shows a schematic diagram of an exemplary blending operation for generating a reconstructed equirectangular projection, according to some embodiments of the present disclosure. [Figure 5B]
[0015] 1 shows a schematic diagram of an exemplary cropping operation for generating a reconstructed equirectangular projection according to some embodiments of the present disclosure. FIG. [Figure 6A]
[0016] 1 shows a schematic diagram of an exemplary horizontal wraparound motion compensation process for equirectangular projection, according to some embodiments of the present disclosure. [Figure 6B]
[0017] 1 shows a schematic diagram of an exemplary horizontal wraparound motion compensation process for padded equirectangular projection, according to some embodiments of the present disclosure. [Figure 7]
[0018] 1 illustrates an example sequence parameter set syntax for wraparound motion compensation according to some embodiments of the present disclosure. [Figure 8]
[0019] 1 illustrates the semantics of an example sequence parameter set for wraparound motion compensation, according to some embodiments of the present disclosure. [Figure 9]
[0020] 1 illustrates an example sequence parameter set syntax for improved wraparound motion compensation according to some embodiments of the present disclosure. [Figure 10]
[0021] 1 illustrates example sequence parameter set semantics for improved wraparound motion compensation, according to some embodiments of the present disclosure. [Figure 11]
[0022] 10 illustrates example sequence parameter set semantics for improved wraparound motion compensation with maximum picture width, according to some embodiments of the present disclosure. [Figure 12]
[0023] 10 illustrates an example derivation of the variables "PicRefWraparoundEnableFlag" and "PicRefWraparoundOffset," according to some embodiments of the present disclosure. [Figure 13]
[0024] 10 illustrates an example derivation of sample positions used for motion compensation, according to some embodiments of the present disclosure. [Figure 14]
[0025] 10 illustrates example sequence parameter set and picture parameter set syntax for wraparound motion compensation with wraparound motion compensation offsets in a picture parameter set according to some embodiments of the present disclosure. [Figure 15]
[0026] 10 illustrates example sequence parameter set and picture parameter set semantics for wraparound motion compensation with wraparound motion compensation offsets in a picture parameter set according to some embodiments of the present disclosure. [Figure 16]
[0027] 10 illustrates an example sequence parameter set syntax for improved wraparound motion compensation without wraparound motion compensation offset, according to some embodiments of the present disclosure. [Figure 17]
[0028] 1 illustrates an example picture parameter set syntax for improved wraparound motion compensation with wraparound motion compensation offsets according to some embodiments of the present disclosure. [Figure 18]
[0029] 10 illustrates example sequence parameter set and picture parameter set semantics for improved wraparound motion compensation using wraparound motion compensation offsets in picture parameter sets according to some embodiments of the present disclosure. [Figure 19]
[0030] 10 illustrates an example derivation of the variables "PicRefWraparoundEnableFlag" and "PicRefWraparoundOffset," according to some embodiments of the present disclosure. [Figure 20]
[0031] 10 illustrates an example sequence parameter set syntax for improved wraparound motion compensation without wraparound motion compensation offsets in the sequence parameter set, according to some embodiments of the present disclosure. [Figure 21]
[0032] 1 illustrates an example picture parameter set syntax for improved wraparound motion compensation using a wraparound motion control flag, according to some embodiments of the present disclosure. [Figure 22]
[0033] 10 illustrates example sequence parameter set and picture parameter set semantics for improved wraparound motion compensation using a wraparound control flag in a picture parameter set, according to some embodiments of the present disclosure. [Figure 23]
[0034] 10 illustrates example sequence parameter set and picture parameter set semantics for improved wraparound motion compensation using a wraparound control flag in a picture parameter set, according to some embodiments of the present disclosure. [Figure 24]
[0035] 10 illustrates an example derivation of the variable "PicRefWraparoundOffset" according to some embodiments of the present disclosure. [Figure 25]
[0036] 10 illustrates example sequence parameter set and picture parameter set semantics for improved wraparound motion compensation with constraints on picture size, according to some embodiments of the present disclosure. [Figure 26]
[0037] 1 illustrates the semantics of an example sequence parameter set for improved wraparound motion compensation with restrictions imposed on the variables “pic_width_max_in_luma_samples,” “CtbSizeY,” and “MinCbSizeY,” according to some embodiments of the present disclosure. [Figure 27]
[0038] 10 illustrates the semantics of an example picture parameter set for improved wraparound motion compensation with restrictions imposed on the variable "pic_width_in_luma_samples" according to some embodiments of the present disclosure. [Figure 28]
[0039] 1 illustrates a flowchart of an exemplary method for performing motion compensation, according to some embodiments of the present disclosure. [Figure 29]
[0040] 1 illustrates a flowchart of an exemplary method for performing motion compensation with a limited range for sequence wraparound motion compensation offsets, according to some embodiments of the present disclosure. [Figure 30]
[0041] 1 illustrates a flowchart of an exemplary method for performing motion compensation using pictures associated with sequence wraparound motion compensation offsets, according to some embodiments of the present disclosure. [Figure 31]
[0042] 1 illustrates a flowchart of an exemplary method for performing motion compensation with a constrained maximum picture size, according to some embodiments of the present disclosure. DETAILED DESCRIPTION OF THE INVENTION
[0009] Detailed Description
[0043] Reference will now be made in detail to exemplary embodiments, examples of which are illustrated in the accompanying drawings. The following description refers to the accompanying drawings in which like reference numerals in different drawings represent the same or similar elements unless otherwise indicated. The implementations set forth in the following description of exemplary embodiments do not represent all implementations in accordance with the present disclosure. Rather, they are merely examples of apparatus and methods in accordance with aspects related to the present disclosure as recited in the appended claims. Particular aspects of the present disclosure are described in more detail below. In the event of a conflict with terms and / or definitions incorporated by reference, the terms and definitions provided herein shall control.
[0010]
[0044] The ITU-T Video Coding Expert Group (ITU-T VCEG) and the ISO / IEC Moving Picture Expert Group (ISO / IEC MPEG) Joint Video Experts Team (JVET) are currently developing the Versatile Video Coding (VVC / H.266) standard. The VVC standard aims to double the compression efficiency of its predecessor, the High Efficiency Video Coding (HEVC / H.265) standard. In other words, the goal of VVC is to achieve the same subjective quality as HEVC / H.265 while using half the bandwidth.
[0011]
[0045] To achieve the same subjective quality as HEVC / H.265 using half the bandwidth, the Joint Video Experts Team (JVET) is developing a technology that surpasses HEVC using the joint exploration model (JEM) reference software. Because the coding technology has been incorporated into JEM, JEM has achieved substantially higher coding performance than HEVC. VCEG and MPEG have also officially begun development of next-generation video compression standards beyond HEVC.
[0012]
[0046] The VVC standard is a recent development and continues to incorporate more coding techniques that result in better compression performance. VVC is based on the same hybrid video coding system that has been used in modern video compression standards such as HEVC, H.264 / AVC, MPEG2, H.263, etc.
[0013]
[0047] Video is a set of static pictures (or "frames") arranged in time sequence to store visual information. A video capture device (e.g., a camera) can be used to capture and store these pictures in time sequence, and a video playback device (e.g., a television, a computer, a smartphone, a tablet computer, a video player, or any end-user terminal with display capabilities) can be used to display such pictures in time sequence. In some applications, a video capture device can also transmit the captured video in real time to a video playback device (e.g., a computer with a monitor) for purposes such as supervision, conferencing, or live broadcasting.
[0014]
[0048] To reduce the storage space and transmission bandwidth required by such applications, video may be compressed. For example, video may be compressed before storage and transmission, and decompressed before display. Compression and decompression may be performed by software executed by a processor (e.g., a processor in a general-purpose computer) or by specialized hardware. A module or circuitry for compression is generally referred to as an "encoder," and a module or circuitry for decompression is generally referred to as a "decoder." Encoders and decoders may collectively be referred to as a "codec." Encoders and decoders may be implemented as any of a variety of suitable hardware, software, or combinations thereof. For example, hardware implementations of encoders and decoders may include circuitry such as one or more microprocessors, digital signal processors ("DSPs"), application-specific integrated circuits ("ASICs"), field-programmable gate arrays ("FPGAs"), discrete logic, or any combination thereof. Software implementations of the encoder and decoder may include program code, computer-executable instructions, firmware, or any suitable computer-implemented algorithm or process fixed in a computer-readable medium. Video compression and decompression may be performed according to various algorithms or standards, such as MPEG-1, MPEG-2, MPEG-4, H.26x series, or the like. In some applications, a codec may decompress video from a first encoding standard and recompress the decompressed video using a second encoding standard. In this case, the codec may be referred to as a "transcoder."
[0015]
[0049] A video encoding process may identify and preserve useful information that can be used to reconstruct a picture. If the information ignored in the video encoding process cannot be perfectly reconstructed, the encoding process may be called "lossy." Otherwise, it may be called "lossless." Most encoding processes are lossy; this is a tradeoff to reduce the required storage space and transmission bandwidth.
[0016]
[0050] Often, useful information about a picture being coded (called the "current picture") includes changes relative to a reference picture (e.g., a previously coded or reconstructed picture). Such changes can include changes in pixel position, brightness, or color. Changes in the position of a group of pixels representing an object can reflect the movement of the object between the reference picture and the current picture.
[0017]
[0051] A picture that is coded without reference to another picture (i.e., it is its own reference picture) is called an "I-picture." A picture that is coded using a previous picture as a reference picture is called a "P-picture." A picture that is coded using both a previous picture and a future picture as a reference picture (i.e., the referencing is "bidirectional") is called a "B-picture."
[0018]
[0052] 1 illustrates the structure of an exemplary video sequence 100 according to some embodiments of the present disclosure. As shown in FIG. 1, the video sequence 100 can be live video or captured and archived video. The video 100 can be real video, computer-generated video (e.g., computer game video), or a combination thereof (e.g., real video with augmented reality effects). The video sequence 100 can be input from a video capture device (e.g., a camera), a video archive containing previously captured video (e.g., video files stored in a storage device), or a video supply interface (e.g., a video broadcast transceiver) for receiving video from a video content provider.
[0019]
[0053] As shown in FIG. 1, video sequence 100 may include a series of pictures arranged temporally along a timeline, including pictures 102, 104, 106, and 108. Pictures 102-106 are consecutive, with additional pictures between pictures 106 and 108. In FIG. 1, picture 102 is an I-picture, and its reference picture is picture 102 itself. Picture 104 is a P-picture, and its reference picture is picture 102, as indicated by the arrow. Picture 106 is a B-picture, and its reference pictures are pictures 104 and 108, as indicated by the arrows. In some embodiments, the reference picture of a picture (e.g., picture 104) need not immediately precede or follow that picture. For example, the reference picture of picture 104 can be a picture before picture 102. It should be noted that the reference pictures of pictures 102-106 are merely examples, and this disclosure does not limit the reference picture embodiments to the examples shown in FIG.
[0020]
[0054] Typically, video codecs do not encode or decode an entire picture at once due to the computational complexity of such a task. Rather, they may divide a picture into elementary segments and encode or decode the picture segment by segment. Such elementary segments are referred to as basic processing units ("BPUs") in this disclosure. For example, structure 110 in FIG. 1 shows an example structure of a picture (e.g., any of pictures 102-108) of video sequence 100. In structure 110, the picture is divided into 4x4 basic processing units, the boundaries of which are shown as dashed lines. In some embodiments, basic processing units may be referred to as "macroblocks" in some video coding standards (e.g., MPEG family, H.261, H.263, or H.264 / AVC) or as "coding tree units" ("CTUs") in some other video coding standards (e.g., H.265 / HEVC or H.266 / VVC). The basic processing units can have variable sizes in pictures or any arbitrary shape and size of pixels, such as 128x128, 64x64, 32x32, 16x16, 4x8, 16x32, etc. The size and shape of the basic processing unit can be selected based on a balance between coding efficiency and the level of detail to be maintained in the basic processing unit for the picture.
[0021]
[0055] A basic processing unit may be a logical unit that can include groups of different types of video data stored in computer memory (e.g., in a video frame buffer). For example, a basic processing unit for a color picture may include a luma component (Y) that represents colorless luminance information, one or more chroma components (e.g., Cb and Cr) that represent color information, and related syntax elements, where the luma and chroma components may have the same size of a basic processing unit. The luma and chroma components may be referred to as "coding tree blocks" (CTBs) in some video coding standards (e.g., H.265 / HEVC or H.266 / VVC). Any operation performed on a basic processing unit may be performed repeatedly on each of its luma and chroma components.
[0022]
[0056] Video coding has multiple computational stages, examples of which are shown in Figures 2A-2B and 3A-3B. At each stage, the size of the basic processing unit may still become too large for processing and therefore may be further divided into segments referred to as "basic processing subunits" in this disclosure. In some embodiments, the basic processing subunits may be referred to as "blocks" in some video coding standards (e.g., MPEG family, H.261, H.263, or H.264 / AVC) or as "coding units" ("CUs") in some other video coding standards (e.g., H.265 / HEVC or H.266 / VVC). The basic processing subunits may have the same or smaller size than the basic processing units. Similar to the basic processing units, the basic processing subunits are also logical units that may contain groups of different types of video data (e.g., Y, Cb, Cr, and related syntax elements) stored in computer memory (e.g., in a video frame buffer). Any operation performed on a basic processing sub-unit may be repeatedly performed on each of its luma and chroma components. Note that such division may be performed to further levels as needed for processing. Also, note that different stages may use different schemes to divide the basic processing units.
[0023]
[0057] For example, in a mode decision stage (an example of which is shown in FIG. 2B ), an encoder can decide what prediction mode (e.g., intra-picture prediction or inter-picture prediction) to use for a basic processing unit, but the basic processing unit may be too large to make such a decision. The encoder can divide the basic processing unit into multiple basic processing sub-units (e.g., CUs, as in the case of H.265 / HEVC or H.266 / VVC) and decide the type of prediction for each individual basic processing sub-unit.
[0024]
[0058] As another example, in the prediction stage (an example of which is shown in FIGS. 2A-2B), the encoder may perform prediction operations at the level of basic processing sub-units (e.g., CUs). However, in some cases, the basic processing sub-units may still be too large to process. The encoder may further divide the basic processing sub-units into smaller segments (e.g., referred to as "prediction blocks" or "PBs" in H.265 / HEVC or H.266 / VVC), at which level the prediction operations may be performed.
[0025]
[0059] As another example, in the transform stage (an example of which is shown in FIGS. 2A-2B), the encoder may perform transform operations for residual basic processing sub-units (e.g., CUs). However, in some cases, the basic processing sub-units may still be too large to process. The encoder may further divide the basic processing sub-units into smaller segments (e.g., referred to as "transform blocks" or "TBs" in H.265 / HEVC or H.266 / VVC), at which levels the transform operations may be performed. Note that the division scheme of the same basic processing sub-unit may be different in the prediction stage and the transform stage. For example, in H.265 / HEVC or H.266 / VVC, the prediction blocks and transform blocks of the same CU may have different sizes and numbers.
[0026]
[0060] 1, the fundamental processing unit 112 is further divided into 3x3 fundamental processing sub-units, the boundaries of which are shown as dotted lines. Different fundamental processing units of the same picture may be divided into fundamental processing sub-units in different ways.
[0027]
[0061] In some implementations, to provide parallel processing and error resilience capabilities to video encoding and decoding, a picture can be divided into regions for processing, so that the encoding or decoding process does not rely on information about a picture region from any other region of the picture. In other words, each region of a picture can be processed independently. By doing so, the codec can process different regions of a picture in parallel, thus increasing coding efficiency. Also, when data for a region is corrupted during processing or lost during network transmission, the codec can correctly encode or decode other regions of the same picture without relying on the corrupted or lost data, thus providing error resilience. Some video coding standards allow a picture to be divided into different types of regions. For example, H.265 / HEVC and H.266 / VVC provide two types of regions: "slices" and "tiles." It should also be noted that different pictures in video sequence 100 can have different partitioning schemes for dividing the picture into regions.
[0028]
[0062] For example, in Figure 1, structure 110 is divided into three regions 114, 116, and 118, the boundaries of which are shown as solid lines within structure 110. Region 114 includes four basic processing units. Regions 116 and 118 each include six basic processing units. It should be noted that the basic processing units, basic processing subunits, and regions of structure 110 in Figure 1 are merely examples, and the present disclosure does not limit the embodiments thereof.
[0029]
[0063] FIG. 2A shows a schematic diagram of an exemplary encoding process 200A according to some embodiments of the present disclosure. For example, the encoding process 200A shown in FIG. 2A may be performed by an encoder. As shown in FIG. 2A, the encoder may encode a video sequence 202 into a video bitstream 228 according to the process 200A. Similar to the video sequence 100 in FIG. 1, the video sequence 202 may include a set of pictures (referred to as "original pictures") arranged in a temporal order. Similar to the structure 110 in FIG. 1, each original picture of the video sequence 202 may be divided into basic processing units, basic processing sub-units, or regions for processing by the encoder. In some embodiments, the encoder may perform the process 200A at the level of the basic processing units for each original picture of the video sequence 202. For example, the encoder may perform the process 200A in an iterative manner, in which case the encoder may encode a basic processing unit in one iteration of the process 200A. In some embodiments, the encoder may perform process 200A in parallel for regions (eg, regions 114-118) of each original picture in video sequence 202.
[0030]
[0064] 2A , an encoder may provide a fundamental processing unit (referred to as an “original BPU”) of an original picture of a video sequence 202 to a prediction stage 204 to generate prediction data 206 and a prediction BPU 208. The encoder may subtract the prediction BPU 208 from the original BPU to generate a residual BPU 210. The encoder may provide the residual BPU 210 to a transform stage 212 and a quantization stage 214 to generate quantized transform coefficients 216. The encoder may provide the prediction data 206 and the quantized transform coefficients 216 to a binary coding stage 226 to generate a video bitstream 228. Components 202, 204, 206, 208, 210, 212, 214, 216, 226, and 228 may be referred to as a “forward path.” During process 200A, after quantization stage 214, the encoder may provide quantized transform coefficients 216 to inverse quantization stage 218 and inverse transform stage 220 to generate reconstructed residual BPU 222. The encoder may add reconstructed residual BPU 222 to prediction BPU 208 to generate prediction reference 224, which is used in prediction stage 204 for the next iteration of process 200A. Components 218, 220, 222, and 224 of process 200A may be referred to as a "reconstruction path." The reconstruction path may be used to ensure that both the encoder and decoder use the same reference data for prediction.
[0031]
[0065] The encoder may iteratively perform process 200A to encode each original BPU of the original picture (in the forward path) and generate (in the reconstruction path) a prediction reference 224 for encoding the next original BPU of the original picture. After encoding all original BPUs of the original picture, the encoder may proceed to encode the next picture in video sequence 202.
[0032]
[0066] Referring to process 200A, an encoder may receive a video sequence 202 generated by a video capture device (e.g., a camera). As used herein, the term "receive" may refer to receiving, inputting, acquiring, obtaining, getting, reading, accessing, or any act in any manner to input data.
[0033]
[0067] In the prediction step 204, in the current iteration, the encoder receives the original BPU and a prediction reference 224, and can perform a prediction operation to generate predicted data 206 and a predicted BPU 208. The prediction reference 224 can be generated from a reconstruction path of a previous iteration of the process 200A. The purpose of the prediction step 204 is to reduce information redundancy by extracting predicted data 206, which can be used to reconstruct the original BPU from the predicted data 206 and the prediction reference 224 as a predicted BPU 208.
[0034]
[0068] Ideally, predicted BPU 208 can be identical to the original BPU. However, due to non-ideal prediction and reconstruction operations, predicted BPU 208 generally differs slightly from the original BPU. To record such differences, after generating predicted BPU 208, the encoder can subtract it from the original BPU to generate residual BPU 210. For example, the encoder can subtract pixel values (e.g., grayscale or RGB values) of predicted BPU 208 from corresponding pixel values of the original BPU. Each pixel of residual BPU 210 can have a residual value that is the result of such a subtraction between the corresponding pixel of the original BPU and predicted BPU 208. Compared to the original BPU, predicted data 206 and residual BPU 210 can have fewer bits, which can be used to reconstruct the original BPU without significant quality degradation. Therefore, the original BPU is compressed.
[0035]
[0069] To further compress the residual BPU 210, in the transform stage 212, the encoder can reduce spatial redundancy in the residual BPU 210 by decomposing it into a set of two-dimensional "basis patterns," each associated with a "transform coefficient." The basis patterns can have the same size (e.g., the size of the residual BPU 210). Each basis pattern can represent a change frequency (e.g., a frequency of luminance change) component of the residual BPU 210. No basis pattern can be reconstructed from any combination (e.g., a linear combination) of any other basis patterns. In other words, the decomposition can decompose the changes in the residual BPU 210 into the frequency domain. Such a decomposition is similar to a discrete Fourier transform of a function, where the basis patterns are similar to the basis functions (e.g., trigonometric functions) of the discrete Fourier transform, and the transform coefficients are similar to the coefficients associated with the basis functions.
[0036]
[0070] Different transform algorithms can use different basis patterns. For example, various transform algorithms, such as a discrete cosine transform, a discrete sine transform, or the like, can be used in transform stage 212. The transform in transform stage 212 is invertible. That is, the encoder can recover residual BPU 210 by inverting the transform (referred to as an "inverse transform"). For example, to recover pixels of residual BPU 210, the inverse transform can multiply the values of corresponding pixels in the basis pattern by their associated coefficients and add the products to generate a weighted sum. For video coding standards, both the encoder and decoder can use the same transform algorithm (and therefore the same basis pattern). Therefore, the encoder can record only the transform coefficients, and the decoder can reconstruct residual BPU 210 from the transform coefficients without receiving the basis pattern from the encoder. Compared to residual BPU 210, the transform coefficients can have fewer bits, but they can be used to reconstruct residual BPU 210 without significant quality degradation. Therefore, the residual BPU 210 is further compressed.
[0037]
[0071] The encoder can further compress the transform coefficients in the quantization stage 214. In the transform process, different basis patterns can represent different change frequencies (e.g., luminance change frequencies). Because the human eye is generally better at perceiving low-frequency changes, the encoder can ignore high-frequency change information without significant quality degradation during decoding. For example, in the quantization stage 214, the encoder can generate quantized transform coefficients 216 by dividing each transform coefficient by an integer value (referred to as a "quantization parameter") and rounding the quotient to its nearest integer. After such an operation, some transform coefficients of high-frequency basis patterns can be converted to zero, and some transform coefficients of low-frequency basis patterns can be converted to smaller integers. The encoder can ignore zero-valued quantized transform coefficients 216, thereby further compressing the transform coefficients. The quantization process can also be inverted, in which case the quantized transform coefficients 216 can be reconstructed into transform coefficients in the inverse operation of quantization (referred to as "dequantization").
[0038]
[0072] Because the encoder ignores the remainder of such a division in a rounding operation, quantization stage 214 may be lossy. Typically, quantization stage 214 may contribute the greatest information loss in process 200A. The greater the information loss, the fewer bits the quantized transform coefficients 216 may require. To achieve different levels of information loss, the encoder may use different values of the quantization parameter or any other parameter of the quantization process.
[0039]
[0073] In binary encoding stage 226, the encoder may encode the prediction data 206 and the quantized transform coefficients 216 using a binary encoding technique, such as, for example, entropy coding, variable length coding, arithmetic coding, Huffman coding, context-adaptive binary arithmetic coding, or any other lossless or lossy compression algorithm. In some embodiments, in addition to the prediction data 206 and the quantized transform coefficients 216, the encoder may encode other information in binary encoding stage 226, such as, for example, a prediction mode used in prediction stage 204, parameters of the prediction operation, the type of transform in transform stage 212, parameters of the quantization process (e.g., quantization parameters), encoder control parameters (e.g., bitrate control parameters), or the like. The encoder may generate a video bitstream 228 using the output data of binary encoding stage 226. In some embodiments, the video bitstream 228 may be further packetized for network transmission.
[0040]
[0074] Referring to the reconstruction path of process 200A, in an inverse quantization stage 218, the encoder may perform inverse quantization on the quantized transform coefficients 216 to generate reconstructed transform coefficients. In an inverse transform stage 220, the encoder may generate a reconstructed residual BPU 222 based on the reconstructed transform coefficients. The encoder may add the reconstructed residual BPU 222 to a prediction BPU 208 to generate a prediction reference 224 to be used in the next iteration of process 200A.
[0041]
[0075] It should be noted that other variations of process 200A may be used to encode video sequence 202. In some embodiments, the stages of process 200A may be performed in a different order by the encoder. In some embodiments, one or more stages of process 200A may be combined into a single stage. In some embodiments, a single stage of process 200A may be split into multiple stages. For example, transform stage 212 and quantization stage 214 may be combined into a single stage. In some embodiments, process 200A may include additional stages. In some embodiments, process 200A may omit one or more stages in FIG. 2A.
[0042]
[0076] 2B shows a schematic diagram of another exemplary encoding process 200B according to some embodiments of the present disclosure. As shown in FIG. 2B, process 200B may be modified from process 200A. For example, process 200B may be used by an encoder compliant with a hybrid video coding standard (e.g., the H.26x series). Compared to process 200A, the forward path of process 200B additionally includes a mode decision stage 230 and divides the prediction stage 204 into a spatial prediction stage 2042 and a temporal prediction stage 2044. The reconstruction path of process 200B additionally includes a loop filter stage 232 and a buffer 234.
[0043]
[0077] Generally, prediction techniques can be categorized into two types: spatial prediction and temporal prediction. Spatial prediction (e.g., intra-picture prediction or "intra-prediction") can use pixels from one or more already-encoded neighboring BPUs within the same picture to predict the current BPU. That is, the prediction reference 224 in spatial prediction can include neighboring BPUs. Spatial prediction can reduce the inherent spatial redundancy of a picture. Temporal prediction (e.g., inter-picture prediction or "inter-prediction") can use regions from one or more already-encoded pictures to predict the current BPU. That is, the prediction reference 224 in temporal prediction can include an encoded picture. Temporal prediction can reduce the inherent temporal redundancy of a picture.
[0044]
[0078] Referring to process 200B, within the forward path, the encoder performs prediction operations in a spatial prediction step 2042 and a temporal prediction step 2044. For example, in the spatial prediction step 2042, the encoder may perform intra prediction. For an original BPU of a picture being encoded, the prediction reference 224 may include one or more neighboring BPUs within the same picture that are coded (in the forward path) and reconstructed (in the reconstruction path). The encoder may generate the predicted BPU 208 by extrapolating the neighboring BPUs. Extrapolation techniques may include, for example, linear extrapolation or interpolation, polynomial extrapolation or interpolation, or the like. In some embodiments, the encoder may perform extrapolation at the pixel level, such as by extrapolating, for each pixel of the predicted BPU 208, the value of the corresponding pixel. The neighboring BPUs used for extrapolation can be located relative to the original BPU from various directions, such as vertically (e.g., above the original BPU), horizontally (e.g., to the left of the original BPU), diagonally (e.g., below-left, below-right, above-left, or above-right of the original BPU), or any direction defined in the video coding standard used. For intra prediction, the prediction data 206 can include, for example, the locations (e.g., coordinates) of the neighboring BPUs used, the sizes of the neighboring BPUs used, parameters of the extrapolation, the orientations of the neighboring BPUs used relative to the original BPU, or the like.
[0045]
[0079] As another example, in the temporal prediction stage 2044, the encoder may perform inter-prediction. For the original BPU of the current picture, the prediction reference 224 may include one or more pictures (referred to as "reference pictures") that have been coded (in the forward path) and reconstructed (in the reconstruction path). In some embodiments, the reference pictures may be coded and reconstructed for each BPU. For example, the encoder may add the reconstructed residual BPU 222 to the predicted BPU 208 to generate a reconstructed BPU. When all the reconstructed BPUs of the same picture have been generated, the encoder may generate the reconstructed picture as the reference picture. The encoder may perform a "motion estimation" operation to search for a matching region within a range (referred to as a "search window") of the reference picture. The location of the search window in the reference picture may be determined based on the location of the original BPU of the current picture. For example, the search window may be centered in the reference picture at a location having the same coordinates as the original BPU in the current picture and may extend outward over a predetermined distance. When the encoder identifies a region similar to the original BPU within the search window (e.g., by using a pel-recursive algorithm, a block matching algorithm, or the like), the encoder can determine such a region as a matching region. The matching region can have different dimensions than the original BPU (e.g., smaller than, equal to, larger than, or a different shape than the original BPU). Because the reference picture and the current picture are temporally separated in a timeline (e.g., as shown in FIG. 1), the matching region can be considered to "move" toward the location of the original BPU over time. The encoder can record the direction and distance of such movement as a "motion vector." When multiple reference pictures are used (e.g., as picture 106 in FIG. 1), the encoder can search for the matching region for each reference picture and determine its associated motion vector. In some embodiments, the encoder can assign weights to the pixel values of the matching region in each matching reference picture.
[0046]
[0080] Motion estimation can be used to identify various types of motion, such as, for example, translation, rotation, zooming, or the like. For inter prediction, prediction data 206 can include, for example, the location (e.g., coordinates) of the matching region, a motion vector associated with the matching region, the number of reference pictures, weights associated with the reference pictures, or the like.
[0047]
[0081] To generate the predicted BPU 208, the encoder may perform a "motion compensation" operation. Motion compensation may be used to reconstruct the predicted BPU 208 based on the prediction data 206 (e.g., a motion vector) and the prediction reference 224. For example, the encoder may shift the matching region of a reference picture according to the motion vector, in which case the encoder may predict the original BPU of the current picture. When multiple reference pictures are used (e.g., as picture 106 in FIG. 1), the encoder may shift the matching region of the reference picture according to each motion vector and average the pixel values of the matching region. In some embodiments, if the encoder weights the pixel values of the matching region of each matching reference picture, the encoder may add a weighted sum of pixel values to the shifted matching region.
[0048]
[0082] Depending on the embodiment, inter-prediction can be unidirectional or bidirectional. Unidirectional inter-prediction can use one or more reference pictures in the same temporal direction relative to the current picture. For example, picture 104 in FIG. 1 is a unidirectional inter-predicted picture in which a reference picture (i.e., picture 102) precedes picture 104. Bidirectional inter-prediction can use one or more reference pictures in both temporal directions relative to the current picture. For example, picture 106 in FIG. 1 is a bidirectional inter-predicted picture in which reference pictures (i.e., pictures 104 and 108) are in both temporal directions relative to picture 104.
[0049]
[0083] Still referring to the forward path of process 200B, after spatial prediction step 2042 and temporal prediction step 2044, in mode decision step 230, the encoder may select a prediction mode (e.g., one of intra prediction or inter prediction) for the current iteration of process 200B. For example, the encoder may perform a rate-distortion optimization technique. In this technique, the encoder may select a prediction mode that minimizes the value of a cost function that depends on the bitrate of the candidate prediction mode and the distortion of the reconstructed reference picture under the candidate prediction mode. Depending on the selected prediction mode, the encoder may generate a corresponding predicted BPU 208 and predicted data 206.
[0050]
[0084] Within the reconstruction path of process 200B, if an intra-prediction mode is selected within the forward path, after generating the prediction reference 224 (e.g., the current BPU coded and reconstructed in the current picture), the encoder can directly provide the prediction reference 224 to the spatial prediction stage 2042 for later use (e.g., for extrapolation of the next BPU of the current picture). If an inter-prediction mode is selected within the forward path, after generating the prediction reference 224 (e.g., the current picture coded and reconstructed in all BPUs), the encoder can provide the prediction reference 224 to the loop filter stage 232, where the encoder can apply a loop filter to the prediction reference 224 to reduce or eliminate distortions (e.g., blocking artifacts) introduced by the inter prediction. The encoder can apply various loop filter techniques within the loop filter stage 232, such as deblocking, sample adaptive offset, adaptive loop filter, or the like. The loop-filtered reference picture may be stored in a buffer 234 (or "decoded picture buffer") for later use (e.g., to be used as an inter-prediction reference picture for a future picture in the video sequence 202). The encoder may store one or more reference pictures in the buffer 234 for use in the temporal prediction stage 2044. In some embodiments, the encoder may encode loop filter parameters (e.g., loop filter strength) along with the quantized transform coefficients 216, the prediction data 206, and other information in the binary encoding stage 226.
[0051]
[0085] FIG. 3A shows a schematic diagram of an exemplary decoding process 300A according to some embodiments of the present disclosure. As shown in FIG. 3A, process 300A may be a decompression process corresponding to compression process 200A in FIG. 2A. In some embodiments, process 300A may be similar to the reconstruction path of process 200A. A decoder may follow process 300A to decode video bitstream 228 into video stream 304. Video stream 304 may be similar to video sequence 202. However, due to information loss in the compression and decompression processes (e.g., quantization stage 214 in FIGS. 2A-2B), video stream 304 is generally not identical to video sequence 202. Similar to processes 200A and 200B in FIGS. 2A-2B, a decoder may perform process 300A at the level of a basic processing unit (BPU) for each picture encoded in video bitstream 228. For example, the decoder may perform process 300A in an iterative manner, in which case the decoder may decode a basic processing unit in one iteration of process 300A. In some embodiments, the decoder may perform process 300A in parallel for regions (e.g., regions 114-118) of each picture encoded in video bitstream 228.
[0052]
[0086] In FIG. 3A , a decoder may provide a portion of a video bitstream 228 associated with a basic processing unit (referred to as a “coding BPU”) of a coded picture to a binary decoding stage 302. In the binary decoding stage 302, the decoder may decode the portion into prediction data 206 and quantized transform coefficients 216. The decoder may provide the quantized transform coefficients 216 to an inverse quantization stage 218 and an inverse transform stage 220 to generate a reconstructed residual BPU 222. The decoder may provide the prediction data 206 to a prediction stage 204 to generate a prediction BPU 208. The decoder may add the reconstructed residual BPU 222 to the prediction BPU 208 to generate a prediction reference 224. In some embodiments, the prediction reference 224 may be stored in a buffer (e.g., a decoded picture buffer in computer memory). The decoder may provide the prediction reference 224 to the prediction stage 204 for performing a prediction operation in a next iteration of the process 300A.
[0053]
[0087] The decoder may perform process 300A iteratively to decode each coded BPU of a coded picture and generate a prediction reference 224 for encoding the next coded BPU of the coded picture. After decoding all coded BPUs of a coded picture, the decoder may output the picture to video stream 304 for display and proceed to decode the next coded picture in video bitstream 228.
[0054]
[0088] In binary decoding step 302, the decoder may perform the inverse operation of the binary coding technique used by the encoder (e.g., entropy coding, variable length coding, arithmetic coding, Huffman coding, context-adaptive binary arithmetic coding, or any other lossless compression algorithm). In some embodiments, in addition to prediction data 206 and quantized transform coefficients 216, the decoder may decode other information in binary decoding step 302, such as, for example, a prediction mode, parameters of the prediction operation, type of transform, parameters of the quantization process (e.g., quantization parameters), encoder control parameters (e.g., bitrate control parameters), or the like. In some embodiments, if video bitstream 228 is transmitted in packets over a network, the decoder may depacketize video bitstream 228 before providing it to binary decoding step 302.
[0055]
[0089] 3B shows a schematic diagram of another exemplary decoding process 300B according to some embodiments of the present disclosure. As shown in FIG. 3B, the process 300B may be modified from the process 300A. For example, the process 300B may be used by a decoder compliant with a hybrid video coding standard (e.g., the H.26x series). Compared to the process 300A, the process 300B additionally divides the prediction stage 204 into a spatial prediction stage 2042 and a temporal prediction stage 2044, and additionally includes a loop filter stage 232 and a buffer 234.
[0056]
[0090] In process 300B, prediction data 206 decoded by the decoder from binary decoding stage 302 for a coding basic processing unit (referred to as the “current BPU”) of a coding picture being decoded (referred to as the “current picture”) may include various types of data, depending on what prediction mode was used by the encoder to encode the current BPU. For example, if intra prediction was used by the encoder to encode the current BPU, prediction data 206 may include a prediction mode indicator (e.g., a flag value) indicating intra prediction, parameters of the intra prediction operation, or the like. Parameters of the intra prediction operation may include, for example, the location (e.g., coordinates) of one or more neighboring BPUs used as references, the size of the neighboring BPUs, parameters of extrapolation, the orientation of the neighboring BPUs relative to the original BPU, or the like. As another example, if inter prediction was used by the encoder to encode the current BPU, prediction data 206 may include a prediction mode indicator (e.g., a flag value) indicating inter prediction, parameters of the inter prediction operation, or the like. Parameters for the inter prediction operation may include, for example, the number of reference pictures associated with the current BPU, weights associated with each of the reference pictures, locations (e.g., coordinates) of one or more matching regions within each reference picture, one or more motion vectors associated with each of the matching regions, or the like.
[0057]
[0091] Based on the prediction mode indicator, the decoder may determine whether to perform spatial prediction (e.g., intra prediction) in spatial prediction step 2042 or temporal prediction (e.g., inter prediction) in temporal prediction step 2044. Details of performing such spatial or temporal prediction are described in FIG. 2B and will not be repeated below. After performing such spatial or temporal prediction, the decoder may generate a predicted BPU 208. The decoder may add the predicted BPU 208 and the reconstructed residual BPU 222 to generate a prediction reference 224, as described in FIG. 3A.
[0058]
[0092] In process 300B, the decoder may provide the prediction reference 224 to the spatial prediction stage 2042 or the temporal prediction stage 2044 to perform a prediction operation in the next iteration of process 300B. For example, if the current BPU is decoded using intra prediction in spatial prediction stage 2042, after generating the prediction reference 224 (e.g., the decoded current BPU), the decoder may provide the prediction reference 224 directly to the spatial prediction stage 2042 for later use (e.g., for extrapolation of the next BPU of the current picture). If the current BPU is decoded using inter prediction in temporal prediction stage 2044, after generating the prediction reference 224 (e.g., the reference picture from which all BPUs are decoded), the encoder may provide the prediction reference 224 to the loop filter stage 232 to reduce or eliminate distortion (e.g., blocking artifacts). The decoder may apply a loop filter to the prediction reference 224 in the manner described in FIG. 2B . The loop-filtered reference picture may be stored in a buffer 234 (e.g., a decoded picture buffer in computer memory) for later use (e.g., to be used as an inter-prediction reference picture for a future coded picture of the video bitstream 228). The decoder may store one or more reference pictures in the buffer 234 for use in the temporal prediction stage 2044. In some embodiments, when the prediction mode indicator of the prediction data 206 indicates that inter-prediction was used to encode the current BPU, the prediction data may further include parameters of the loop filter (e.g., loop filter strength).
[0059]
[0093] 4 is a block diagram of an example device 400 for encoding or decoding video, according to some embodiments of the present disclosure. As shown in FIG. 4, the device 400 may include a processor 402. When the processor 402 executes instructions described herein, the device 400 may become a specialized machine for video encoding or decoding. The processor 402 may be any type of circuitry capable of manipulating or processing information. For example, processor 402 may include any number or combination of a central processing unit (or "CPU"), a graphics processing unit (or "GPU"), a neural processing unit ("NPU"), a microcontroller unit ("MCU"), an optical processor, a programmable logic controller, a microcontroller, a microprocessor, a digital signal processor, an intellectual property (IP) core, a programmable logic array (PLA), a programmable array logic (PAL), a generic array logic (GAL), a complex programmable logic device (CPLD), a field-programmable gate array (FPGA), a system on chip (SoC), an application-specific integrated circuit (ASIC), or the like. In some embodiments, processor 402 may also be a set of processors grouped as a single logical entity. For example, as shown in Figure 4, processor 402 may include multiple processors, including processor 402a, processor 402b, and processor 402n.
[0060]
[0094] The device 400 may also include a memory 404 configured to store data (e.g., a set of instructions, computer code, intermediate data, or the like). For example, as shown in Figure 4, the stored data may include program instructions (e.g., program instructions for performing steps in processes 200A, 200B, 300A, or 300B) and data for processing (e.g., video sequence 202, video bitstream 228, or video stream 304). The processor 402 may access (e.g., via bus 410) the program instructions and data for processing, execute the program instructions, and perform operations or manipulations on the data for processing. The memory 404 may include a high-speed random-access storage device or a non-volatile storage device. In some embodiments, memory 404 may include any number or combination of random-access memory (RAM), read-only memory (ROM), optical disks, magnetic disks, hard drives, solid-state drives, flash drives, security digital (SD) cards, memory sticks, compact flash (CF) cards, or the like. Memory 404 may also be a group of memories (not shown in FIG. 4) grouped as a single logical entity.
[0061]
[0095] Bus 410 can be a communication device that transfers data between components internal to apparatus 400, such as an internal bus (e.g., a CPU-memory bus), an external bus (e.g., a Universal Serial Bus port, a Peripheral Component Interconnect Express port), or the like.
[0062]
[0096] For ease of explanation and without ambiguity, the processor 402 and other data processing circuitry will be collectively referred to in this disclosure as "data processing circuitry." The data processing circuitry may be implemented entirely in hardware or as a combination of software, hardware, or firmware. Additionally, the data processing circuitry may be a single, stand-alone module or may be fully or partially combined with any other component of the device 400.
[0063]
[0097] Device 400 may further include a network interface 406 for providing wired or wireless communication with a network (e.g., the Internet, an intranet, a local area network, a mobile communication network, or the like). In some embodiments, network interface 406 may include any number or combination of a network interface controller (NIC), a radio frequency (RF) module, a transponder, a transceiver, a modem, a router, a gateway, a wired network adapter, a wireless network adapter, a Bluetooth® adapter, an infrared adapter, a near-field communication ("NFC") adapter, a cellular network chip, or the like.
[0064]
[0098] In some embodiments, apparatus 400 may further include a peripheral interface 408 for providing connection to one or more peripheral devices. As shown in Figure 4, the peripheral devices may include, but are not limited to, a cursor control device (e.g., a mouse, touchpad, or touchscreen), a keyboard, a display (e.g., a cathode ray tube display, a liquid crystal display, or a light emitting diode display), a video input device (e.g., a camera or an input interface communicatively coupled to a video archive), or the like.
[0065]
[0099] It should be noted that a video codec (e.g., a codec performing process 200A, 200B, 300A, or 300B) may be implemented as any combination of software or hardware modules within device 400. For example, some or all of the stages of process 200A, 200B, 300A, or 300B may be implemented as one or more software modules of device 400, such as program instructions that may be loaded into memory 404. As another example, some or all of the stages of process 200A, 200B, 300A, or 300B may be implemented as one or more hardware modules of device 400, such as specialized data processing circuitry (e.g., FPGA, ASIC, NPU, or the like).
[0066]
[0100] In the quantization and inverse quantization functional blocks (e.g., quantization 214 and inverse quantization 218 in FIG. 2A or 2B, inverse quantization 218 in FIG. 3A or 3B), a quantization parameter (QP) is used to determine the amount of quantization (and inverse quantization) applied to the prediction residual. The initial QP value used for coding a picture or slice can be signaled at a high level, for example, using the init_qp_minus26 syntax element in the Picture Parameter Set (PPS) and the slice_qp_delta syntax element in the slice header. Furthermore, the QP value can be adapted at a local level per CU using delta QP values sent at the granularity of the quantization group.
[0067]
[0101] The equirectangular projection ("ERP") format is a common projection format used to represent 360-degree video and imagery. The projection maps meridians to regularly spaced vertical lines and latitude circles to regularly spaced horizontal lines. ERP is one of the most common projections used for 360-degree video and imagery because the relationship between the location of an image pixel on a map and its corresponding geographic location on a sphere is particularly simple.
[0068]
[0102] The algorithm description of projection format conversion and the video quality criteria output by JVET provide the introduction and coordinate conversion between ERP and the sphere. For the coordinate conversion from 2D to 3D, assuming the sampling position is (m, n), (u, v) can be calculated based on the following equations. u = (m + 0.5) / W, 0 ≤ m < W Equation (1) v = (n + 0.5) / H, 0 ≤ n < H Equation (2)
[0069]
[0103] Next, the longitude and latitude (φ, θ) of the sphere can be calculated from (u, v) based on the following equations. φ = (u - 0.5) × (2 × π) Equation (3) θ = (0.5 - v) × π Equation (4)
[0070] [[ID=十六]] [[ID=十七]]
[0104] The coordinates (X, Y, Z) can be calculated based on the following equations. X = cos(θ)cos(φ) Equation (5) Y = sin(θ) Equation (6) Z = -cos(θ)sin(φ) Equation (7)
[0071]
[0105] For the coordinate conversion from 3D to 2D starting from (X, Y, Z), (φ, θ) can be calculated based on the following equations. Then, (u, v) is calculated based on the equations. Finally, (m, n) can be calculated based on the equations. φ = tan -1 (-Z / X) Equation (8) θ = sin -1 (Y / (X 2 + Y 2 + Z 2 ) 1 / 2 ) Equation (9)
[0072]
[0106] To reduce seam artifacts in the reconstructed viewport that includes the left and right boundaries of the ERP picture, a new format called padded orthographic cylindrical projection (「PERP」) is provided by padding samples on each of the left and right sides of the ERP picture.
[0073]
[0107] When PERP is used to represent 360-degree video, the PERP picture is encoded. After decoding, the reconstructed PERP is converted to a reconstructed ERP by blending the duplicated samples or cropping the padded area.
[0074]
[0108] FIG. 5A shows a schematic diagram of an example blending operation for generating a reconstructed equirectangular projection according to some embodiments of the present disclosure. Unless otherwise specified, "recPERP" is used to refer to the reconstructed PERP before post-processing, and "recERP" is used to refer to the reconstructed ERP after post-processing. As shown in FIG. 5A, the duplicated samples of the recPERP may be blended by applying a distance-based weighted average operation. For example, region A may be generated by blending region A1 with A2, and region B may be generated by blending region B1 with B2.
[0075]
[0109] In the following description, the width and height of the unpadded recERP are denoted as "W" and "H", respectively. The left padding width and right padding width are denoted as "P" and "H", respectively. L " and "P R " The total padding width is shown as "P W " and P W is P L and P R In some embodiments, the recPERP can be converted to the recERP by a blending operation. For example, the sample recERP(j,i) in A, i=[0,P R-1 ] and j=[0,H−1], recERP(j,i) can be determined according to the following formula: A=w×A1+(1-w)×A2, where w is P L / P w From equation (10) recPERP(j,i) = (recPERP(j,i + P L )×(i+P L)+recPERP(j,i+P L+W )×(P R-i )+(P W >>1)) / P W Formula (11)
[0076]
[0110] In some embodiments, sample recERP(j,i) in B, i=[WP L , W-1] and j=[0, H-1], recERP(j,i) can be determined according to the following formula: B=k×B1+(1-k)×B2, where k ranges from 0 to P L / P w Formula (12) recPERP(j,i) = (recPERP(j,i + P L )×(P R-i +W)+recPERP(j,i+P L-w )×(i-W+P L )+(P w >>1)) / P W Formula (13)
[0077]
[0111] 5B shows a schematic diagram of an exemplary cropping operation for generating a reconstructed equirectangular projection according to some embodiments of the present disclosure. As shown in FIG. 5B, during the cropping process, padded samples in recPERP can be directly discarded to obtain recERP. For example, padded samples B1 and A2 may be discarded, and padded area A is equal to A1 and padded area B is equal to B2.
[0078]
[0112] In some embodiments, horizontal wraparound motion compensation may be used to improve the coding performance of ERP. For example, horizontal wraparound motion compensation may be used in the VVC standard as a 360-degree-specific coding tool designed to improve the visual quality of 360-degree video reconstructed in ERP or PERP formats. In conventional motion compensation, when a motion vector references a sample beyond the picture boundary of a reference picture, repetition padding is applied to derive the value of the beyond-boundary sample by copying from the nearest neighbor on the corresponding picture boundary. For 360-degree video, this method of repetition padding is not appropriate and may cause visual artifacts called "seam artifacts" in the reconstructed viewport video. Because 360-degree video is captured on a sphere and does not inherently have "boundaries," reference samples that are outside the boundary of the reference picture in the projection domain may be obtained from neighboring samples within the spherical domain. For common projection formats, deriving corresponding neighboring samples within the spherical domain may be difficult because it involves not only 2D-to-3D and 3D-to-2D coordinate transformations but also sample interpolation for fractional sample positions. This problem can be solved for the left and right boundaries of the ERP or PERP projection format because the spherical neighborhood outside the left picture boundary can be derived from samples inside the right picture boundary, and vice versa. Given the wide use and relative ease of implementation of the ERP or PERP projection format, horizontal wraparound motion compensation has been adapted to VVC to improve the visual quality of 360-degree video encoded in the ERP or PERP projection format.
[0079]
[0113] 6A shows a schematic diagram of an exemplary horizontal wraparound motion compensation process for equirectangular projection according to some embodiments of the present disclosure. As shown in FIG. 6A, when a portion of a reference block is outside the left (or right) boundary of a reference picture in a projection region, instead of repeated padding, the "out-of-boundary" portion can be taken from the corresponding sphere neighborhood located in the reference picture relative to the right (or left) boundary of the projection region. In some embodiments, repeated padding is used only for the top and bottom picture boundaries.
[0080]
[0114] FIG. 6B shows a schematic diagram of an exemplary horizontal wraparound motion compensation process for padded equirectangular projection according to some embodiments of the present disclosure. As shown in FIG. 6B, horizontal wraparound motion compensation can be combined with non-standard padding methods often used in 360-degree video coding. In some embodiments, this is achieved by signaling a high-level syntax element indicating the wraparound motion compensation offset, which can be set to the ERP picture width before padding. This syntax can be used to adjust the position of the horizontal wraparound accordingly. In some embodiments, this syntax is not affected by a specific amount of padding on the left or right picture boundary. As a result, this syntax can naturally support asymmetric padding of ERP pictures, where the left padding and the right padding are different. In some embodiments, the wraparound motion compensation can be determined according to the following equation:
number
[0081]
[0115] Horizontal wraparound motion compensation can provide more meaningful information for motion compensation when the reference samples are outside the left and right boundaries of the reference picture. Under common 360-degree video test conditions, this tool can improve compression performance not only in terms of rate distortion, but also in terms of reduced seam artifacts and subjective quality of the reconstructed 360-degree video. Horizontal wraparound motion compensation can also be used for other single-plane projection formats with constant sampling density in the horizontal direction, such as adjusted equal-area projection.
[0082]
[0116] In some embodiments, a limit is imposed on the wraparound motion compensation offset. The value of the offset may be derived from the range of (CtbSizeY / MinCbSizeY+2) to (pic_width_in_luma_samples / MinCbSizeY), where the variable "CtbSizeY" refers to the luma size of the coding tree block ("CTB"), the variable "MinCbSizeY" refers to the minimum size of the luma coding block, and the variable "pic_width_in_luma_samples" refers to the picture width in luma samples to avoid repeated wraparound, which is unnecessary in practical applications but introduces burden on hardware implementations.
[0083]
[0117] 7 illustrates an example sequence parameter set syntax for wraparound motion compensation according to some embodiments of the present disclosure. As shown in FIG. 5, in VVC (e.g., VVC Draft 7), for wraparound motion compensation, an enable flag "sps_ref_wraparound_enabled_flag" and an offset "sps_ref_wraparound_offset_minus1" may be signaled in a sequence parameter set ("PPS").
[0084]
[0118] FIG. 8 illustrates the semantics of an example sequence parameter set for wraparound motion compensation according to some embodiments of the present disclosure. It should be understood that the semantics illustrated in FIG. 8 may correspond to the syntax illustrated in FIG. 7. As illustrated in FIG. 8, in some embodiments, "sps_ref_wraparound_enabled_flag" may indicate whether horizontal wraparound motion compensation is applied to inter prediction. For example, a value of 1 may indicate that horizontal wraparound motion compensation is applied, and a value of 0 may indicate that horizontal wraparound motion compensation is not applied. In some embodiments, when the value of (CtbSizeY / MinCbSizeY+1) is greater than (pic_width_in_luma_samples / MinCbSizeY−1), the value of sps_ref_wraparound_enabled_flag is equal to 0, in which case "pic_width_in_luma_samples" is the value of "pic_width_in_luma_samples" in any PPS that references the SPS.
[0085]
[0119] In some embodiments, "sps_ref_wraparound_offset_minus1" + 1 may indicate the offset used to calculate the horizontal wraparound position in "MinCbSizeY" luma samples, as shown in Figure 8. In some embodiments, the value of ref_wraparound_offset_minus1 is in the range (CtbSizeY / MinCbSizeY) + 1 to (pic_width_in_luma_samples / MinCbSizeY) - 1 inclusive, where pic_width_in_luma_samples is the value of pic_width_in_luma_samples in any PPS that references the SPS.
[0086]
[0120] There are several problems with the syntax shown in Figure 7 and the semantics shown in Figure 8. In particular, "sps_ref_wraparound_enabled_flag" and "sps_ref_wraparound_offset_minus1" are syntax elements signaled in the SPS, but there is a compatibility constraint that depends on all of the "pic_width_in_luma_samples" signaled on the PPS. Because the SPS is a higher-level syntax than the PPS, and higher-level syntax should not normally reference lower-level syntax, constraining the value of an SPS syntax element value by syntax elements in all of the associated PPSs can be problematic. Furthermore, in some embodiments, wraparound motion compensation is controlled at the sequence level, but picture size changes are allowed in VVC drafts (e.g., VVC Draft 7). At the same time, "sps_ref_wraparound_enabled_flag" can be true only if the widths of all pictures in a sequence referencing the SPS meet the constraint. Therefore, wraparound motion compensation cannot be used even if only one frame does not meet the size condition. This means that the benefits of wraparound motion compensation for the entire sequence may be lost due to one frame.
[0087]
[0121] Additionally, in some embodiments, "sps_ref_wraparound_offset_minus1" is (CtbSizeY / MinCbSizeY)+1 to (pic_width_in_luma_samples / MinCbSizeY)-1. Therefore, the minimum value signaled in the bitstream for sps_ref_wraparound_offset_minus1 is (CtbSizeY / MinCbSizeY)+1, which may not be a 0 value. In general, larger values require more bits in signaling than smaller values. As a result, it is not efficient to signal syntax elements with a value range that does not start from 0.
[0088]
[0122] Embodiments of the present disclosure provide improved methods for solving the above-mentioned problems. Figure 9 shows an example sequence parameter set syntax for improved wraparound motion compensation according to some embodiments of the present disclosure. In some embodiments, signaling overhead of wraparound motion compensation ("MC") offsets may be preserved. To preserve the bits designated for the wraparound motion compensation offsets, (CtbSizeY / MinCbSizeY)+2 may be subtracted from the wraparound motion compensation offsets before they are signaled. As a result, the minimum value of this syntax element may be 0.
[0089]
[0123] 10 illustrates an example sequence parameter set semantics for improved wraparound motion compensation according to some embodiments of the present disclosure. As shown in FIG. 10, changes from the previous VVC are indicated in italics. It should be understood that the semantics shown in FIG. 10 may correspond to the syntax shown in FIG.
[0090]
[0124] In some embodiments, as shown in Figure 10, "sps_ref_wraparound_enabled_flag" may indicate whether horizontal wraparound motion compensation is applied to inter prediction. For example, a value of 1 may indicate that horizontal wraparound motion compensation is applied, and a value of 0 may indicate that horizontal wraparound motion compensation is not applied. In some embodiments, the value of "sps_ref_wraparound_enabled_flag" is equal to 0 when the value of (CtbSizeY / MinCbSizeY+1) is greater than (pic_width_in_luma_samples / MinCbSizeY-1).
[0091]
[0125] In some embodiments, as shown in Figure 10, "sps_ref_wraparound_offset" + (CtbSizeY / MinCbSizeY) + 2 may indicate the offset used to calculate the horizontal wraparound position in "MinCbSizeY" luma samples. The value of "sps_ref_wraparound_offset" may be in the range from 0 to (pic_width_in_luma_samples / MinCbSizeY) - (CtbSizeY / MinCbSizeY) - 2, inclusive, where pic_width_in_luma_samples is the value of pic_width_in_luma_samples in any PPS that references the SPS.
[0092]
[0126] As mentioned above, another problem with conventional designs is that wraparound MC is disabled for all pictures in a video sequence, even if one picture in the video sequence has dimensions that violate the conformance requirements. In some embodiments, the constraint on the syntax element value is removed. The wraparound motion compensation control flag sps_ref_wraparound_enabled_flag is signaled first in the SPS. In some embodiments, if sps_ref_wraparound_enabled_flag is true, the offset value sps_ref_wraparound_offset_minus1 is signaled.
[0093]
[0127] 11 illustrates an example sequence parameter set semantics for improved wraparound motion compensation with maximum picture width, according to some embodiments of the present disclosure. As shown in FIG. 11, changes from previous VVC are indicated in italics, and proposed deleted semantics are also indicated in strikethrough.
[0094]
[0128] In some embodiments, as shown in Figure 11, "sps_ref_wraparound_enabled_flag" may indicate whether horizontal wraparound motion compensation is applied to inter prediction. For example, a value of 1 may indicate that horizontal wraparound motion compensation may be applied to inter prediction, and a value of 0 may indicate that horizontal wraparound motion compensation is not applied.
[0095]
[0129] In some embodiments, "sps_ref_wraparound_offset_minus1" + 1 may indicate the maximum value of the offset used to calculate the horizontal wraparound position in "MinCbSizeY" luma samples, as shown in Figure 11. In some embodiments, the value of "sps_ref_wraparound_offset_minus1" is in the range from (CtbSizeY / MinCbSizeY) + 1 to (pic_width_max_in_luma_samples / MinCbSizeY) - 1, inclusive.
[0096]
[0130] In some embodiments, "pic_width_max_in_luma_samples" is the maximum width in luma samples of each decoded picture that references an SPS.
[0097]
[0131] In some embodiments, two variables "PicRefWraparoundEnableFlag" and "PicRefWraparoundOffset" may be defined for each picture in a sequence. Figure 12 shows an example derivation of the variables "PicRefWraparoundEnableFlag" and "PicRefWraparoundOffset" according to some embodiments of the present disclosure. As shown in Figure 12, "pic_width_in_luma_samples" may refer to the width of the picture referring to the PPS in which "pic_width_in_luma_samples" is signaled.
[0098]
[0132] In some embodiments, as shown in Figure 12, a variable "PicRefWraparoundEnableFlag" may be used to determine whether wraparound MC may be enabled for the current picture. For example, if the value of "PicRefWraparoundEnableFlag" indicates that wraparound MC may be enabled for the current picture, an offset "PicRefWraparoundOffset" is used in the motion compensation process.
[0099]
[0133] FIG. 13 illustrates an example of derivation of sample positions used for motion compensation according to some embodiments of the present disclosure. As shown in FIG. 13, the sample positions (xInt i ,yInt i ) refers to the sample position before wraparound, and the sample position (xInt i ,yInt i) may be determined. In some embodiments, the variable "picW" is equal to the variable "pic_width_in_luma_samples." In some embodiments, the functions "ClipH" and "Clip3" may be performed according to the equations shown in FIG. 13.
[0100]
[0134] In some embodiments, the wraparound motion compensation control flag may still be signaled in the SPS, but the wraparound motion compensation offset is signaled in the PPS instead of the SPS. Figure 14 shows example sequence parameter set and picture parameter set syntax for wraparound motion compensation using a wraparound motion compensation offset in a picture parameter set according to some embodiments of this disclosure. As shown in Figure 14, changes from previous VVC are indicated in italics, and proposed removed syntax is also indicated in strikethrough. In some embodiments, as shown in Figure 14, "sps_ref_wraparound_enabled_flag" is signaled in the SPS, and "pps_ref_wraparound_offset_minus1" is signaled in the PPS.
[0101]
[0135] 15 illustrates example sequence parameter set and picture parameter set semantics for wraparound motion compensation using a wraparound motion compensation offset in a picture parameter set according to some embodiments of the present disclosure. As shown in FIG. 15, changes from previous VVC are indicated in italics, and proposed deleted semantics are further indicated in strikethrough. It should be understood that the semantics shown in FIG. 15 may correspond to the syntax shown in FIG. 14.
[0102]
[0136] In some embodiments, as shown in Figure 15, "sps_ref_wraparound_enabled_flag" may indicate whether horizontal wraparound motion compensation is applied to inter prediction. For example, a value of 1 may indicate that horizontal wraparound motion compensation is applied, and a value of 0 may indicate that horizontal wraparound motion compensation is not applied.
[0103]
[0137] In some embodiments, "pps_ref_wraparound_offset_minus1" + 1 may indicate the offset used to calculate the horizontal wraparound position in "MinCbSizeY" luma samples, as shown in Figure 15. In some embodiments, when "sps_ref_wraparound_enabled_flag" is equal to 0 or the value of (CtbSizeY / MinCbSizeY+1) is greater than (pic_width_in_luma_samples / MinCbSizeY-1), "pps_ref_wraparound_offset_minus1" is equal to 0. Otherwise, the value of "pps_ref_wraparound_offset_minus1" is in the range from (CtbSizeY / MinCbSizeY)+1 to (pic_width_in_luma_samples / MinCbSizeY)-1, inclusive.
[0104]
[0138] In some embodiments, two variables "PicRefWraparoundEnableFlag" and "PicRefWraparoundOffset" may be defined for each picture in a sequence. In some embodiments, "PicRefWraparoundEnableFlag" may be determined as shown in Figure 12. In some embodiments, "PicRefWraparoundOffset" may be determined as "pps_ref_wraparound_offset_minus1" + 1.
[0105]
[0139] In some embodiments, during the decoding process, "PicRefWraparoundEnableFlag" and "PicRefWraparoundOffset" can be used for wrap-around motion compensation. For example, the sample position (xInt i ,yInt i ) may be derived in the manner shown in Figure 13. As shown in Figure 13, in some embodiments, the variable "picW" may be equal to "pic_width_in_luma_samples".
[0106]
[0140] In some embodiments, a wraparound motion compensation control flag may still be signaled, but the wraparound motion compensation offset is signaled in the PPS instead of the SPS. Furthermore, "pps_ref_wraparound_offset" may also indicate the use of wraparound motion compensation for pictures that reference the PPS. Figure 16 shows an example sequence parameter set syntax for improved wraparound motion compensation without wraparound motion compensation offset according to some embodiments of the present disclosure. As shown in Figure 16, changes from the previous VVC are indicated in italics, and proposed deleted syntax is also indicated in strikethrough. As shown in Figure 14, "sps_ref_wraparound_enabled_flag" may be signaled in the SPS.
[0107]
[0141] Figure 17 illustrates an example picture parameter set syntax for improved wraparound motion compensation using a wraparound motion compensation offset according to some embodiments of the present disclosure. As shown in Figure 17, changes from the previous VVC are indicated in italics. It should be understood that the PPS illustrated in Figure 17 may correspond to the SPS illustrated in Figure 16. As shown in Figure 17, "pps_ref_wraparound_offset" may be signaled in the PPS. In some embodiments, "pps_ref_wraparound_offset" signaled in the PPS may also indicate the use of wraparound motion compensation for pictures that reference the PPS. In other words, the encoder may disable wraparound motion compensation at the PPS level by setting pps_ref_wraparound_offset to a special value.
[0108]
[0142] 18 illustrates example sequence parameter set and picture parameter set semantics for improved wraparound motion compensation using wraparound motion compensation offsets in picture parameter sets according to some embodiments of the present disclosure. As shown in FIG. 18, changes from previous VVC are indicated in italics, and proposed deleted semantics are further indicated in strikethrough. It should be understood that the semantics shown in FIG. 18 may correspond to the syntax shown in FIG. 16 and FIG. 17.
[0109]
[0143] In some embodiments, as shown in Figure 18, "sps_ref_wraparound_enabled_flag" may indicate whether horizontal wraparound motion compensation is applied to inter prediction. For example, a value of 1 may indicate that horizontal wraparound motion compensation may be applied to inter prediction, and a value of 0 may indicate that horizontal wraparound motion compensation is not applied.
[0110]
[0144] In some embodiments, as shown in Figure 18, "pps_ref_wraparound_offset" + 1 may indicate the value of the offset used to calculate the horizontal wraparound position in MinCbSizeY luma samples. For example, when "pps_ref_wraparound_offset" is equal to 0, wraparound motion compensation is disabled. When "sps_ref_wraparound_enabled_flag" is equal to 0 or the value of (CtbSizeY / MinCbSizeY+1) is greater than (pic_width_in_luma_samples / MinCbSizeY-1), "pps_ref_wraparound_offset" is equal to 0. Otherwise, the value of "pps_ref_wraparound_offset" is in the range from (CtbSizeY / MinCbSizeY)+1 to (pic_width_in_luma_samples / MinCbSizeY)-1, inclusive.
[0111]
[0145] In some embodiments, two variables "PicRefWraparoundEnableFlag" and "PicRefWraparoundOffset" may be defined for each picture in a sequence. Figure 19 shows an example derivation of the variables "PicRefWraparoundEnableFlag" and "PicRefWraparoundOffset" according to some embodiments of the present disclosure.
[0112]
[0146] In some embodiments, during the decoding process, "PicRefWraparoundEnableFlag" and "PicRefWraparoundOffset" can be used for wrap-around motion compensation. For example, the sample position (xInt i ,yInt i ) may be derived in the manner shown in Figure 11. As shown in Figure 11, in some embodiments, the variable "picW" may be equal to "pic_width_in_luma_samples".
[0113]
[0147] In some embodiments, the syntax is modified. The wraparound motion compensation control flag may still be signaled in the SPS, but the wraparound motion compensation offset is signaled in the PPS instead of the SPS. Additionally, a PPS-level wraparound motion compensation control flag may also be signaled. Figure 20 shows an example sequence parameter set syntax for improved wraparound motion compensation without the wraparound motion compensation offset in the sequence parameter set, according to some embodiments of the present disclosure. As shown in Figure 20, changes from the previous VVC are indicated in italics, and the proposed removed syntax is further indicated in strikethrough. As shown in Figure 20, the "sps_ref_wraparound_enabled_flag" may be signaled in the SPS.
[0114]
[0148] 21 illustrates an example picture parameter set syntax for improved wraparound motion compensation using a wraparound control flag according to some embodiments of the present disclosure. As shown in FIG. 21, changes from previous VVC are indicated in italics. As shown in FIG. 21, a "pps_ref_wraparound_enabled_flag" may be signaled in the PPS. In some embodiments, if "pps_ref_wraparound_enabled_flag" is true (e.g., a value equal to 1), then "pps_ref_wraparound_offset" may be signaled.
[0115]
[0149] 22 shows example sequence parameter set and picture parameter set semantics for improved wraparound motion compensation using a wraparound control flag in a picture parameter set according to some embodiments of the present disclosure. As shown in FIG. 22, changes from previous VVC are shown in italics, and proposed deleted semantics are also shown in strikethrough. It should be understood that the semantics shown in FIG. 22 may correspond to the syntax shown in FIG. 20 and FIG. 21.
[0116]
[0150] In some embodiments, as shown in Figure 22, "sps_ref_wraparound_enabled_flag" may indicate whether horizontal wraparound motion compensation is applied to inter prediction. For example, a value of 1 may indicate that horizontal wraparound motion compensation may be applied to inter prediction, and a value of 0 may indicate that horizontal wraparound motion compensation is not applied.
[0117]
[0151] In some embodiments, as shown in Figure 22, "pps_ref_wraparound_enabled_flag" equal to 1 may indicate that horizontal wraparound motion compensation is applied in inter prediction. "pps_ref_wraparound_enabled_flag" equal to 0 may indicate that horizontal wraparound motion compensation is not applied. In some embodiments, "pps_ref_wraparound_enabled_flag" is equal to 0 when "sps_ref_wraparound_enabled_flag" is equal to 0 or the value of (CtbSizeY / MinCbSizeY+1) is greater than (pic_width_in_luma_samples / MinCbSizeY-1).
[0118]
[0152] In some embodiments, there are alternative semantics for sequence parameter sets and picture parameter sets, as shown in Figure 22. Figure 23 shows example sequence parameter set and picture parameter set semantics for improved wraparound motion compensation using a wraparound control flag in a picture parameter set, according to some embodiments of the present disclosure. As shown in Figure 23, changes from previous VVC are shown in italics, and proposed deleted semantics are also shown in strikethrough. It should be understood that the semantics shown in Figure 23 may correspond to the syntax shown in Figures 20 and 21.
[0119]
[0153] In some embodiments, as shown in Figure 23, "pps_ref_wraparound_enabled_flag" equal to 1 may indicate that horizontal wraparound motion compensation is applied to inter prediction. "pps_ref_wraparound_enabled_flag" equal to 0 may indicate that horizontal wraparound motion compensation is not applied. In some embodiments, when "sps_ref_wraparound_enabled_flag" is equal to 0 or the value of (CtbSizeY / MinCbSizeY+1) is greater than (pic_width_in_luma_samples / MinCbSizeY-1), "pps_ref_wraparound_enabled_flag" is 0. Otherwise, "pps_ref_wraparound_enabled_flag" is equal to 1.
[0120]
[0154] In some embodiments, "pps_ref_wraparound_offset"+(CtbSizeY / MinCbSizeY)+2 may specify the value of the offset used to calculate the horizontal wraparound position in MinCbSizeY luma samples, as shown in Figure 23. In some embodiments, the value of "pps_ref_wraparound_offset", if present, may be in the range from 0 to (pic_width_in_luma_samples / MinCbSizeY)-(CtbSizeY / MinCbSizeY)-2, inclusive.
[0121]
[0155] In some embodiments, a variable "PicRefWraparoundOffset" may be defined for each picture in a sequence. For example, "PicRefWraparoundOffset" may be derived as pps_ref_wraparound_offset_minus1+1.
[0122]
[0156] In some embodiments, during the decoding process, the variables "pps_ref_wraparound_enabled_flag" and "PicRefWraparoundOffset" may be used for wraparound motion compensation. FIG. 24 illustrates an example derivation of the variable "PicRefWraparoundOffset" according to some embodiments of the present disclosure. As shown in FIG. 24, the variable "PicRefWraparoundOffset" may be derived according to the variables "pps_ref_wraparound_offset", "CtbSizeY", and "MinCbSizeY". In some embodiments, the variable "PicRefWraparoundOffset" may be derived according to the sample positions (xInt i ,yInt i ) As shown in FIG. 13, the variable "picW" may be equal to "pic_width_in_luma_samples."
[0123]
[0157] In some embodiments, the "sps_ref_wraparound_enabled_flag" may be removed, and the "pps_ref_wraparound_enabled_flag" and "pps_ref_wraparound_offset" may be retained.
[0124]
[0158] In some embodiments, restrictions on the value range of "sps_ref_wraparound_enabled_flag" and "sps_ref_wraparound_offset_minus1" may be removed, and restrictions on the value range of picture sizes signaled in SPS and PPS may be added. Furthermore, there may be no syntax changes. Figure 25 shows example sequence parameter set and picture parameter set semantics for improved wraparound motion compensation with restrictions on picture size, according to some embodiments of the present disclosure. As shown in Figure 25, changes from the previous VVC are shown in italics, and the proposed deleted semantics are also shown in strikethrough.
[0125]
[0159] In some embodiments, "pic_width_max_in_luma_samples" may indicate the maximum width in luma samples of each decoded picture that references an SPS, as shown in Figure 25. In some embodiments, "pic_width_max_in_luma_samples" may not be equal to 0, and may be an integer multiple of max(8,MinCbSizeY).
[0126]
[0160] In some embodiments, "pic_height_max_in_luma_samples" may indicate the maximum height in luma samples of each decoded picture that references an SPS, as shown in Figure 25. In some embodiments, "pic_height_max_in_luma_samples" may not be equal to 0, and may be an integer multiple of max(8,MinCbSizeY).
[0127]
[0161] In some embodiments, as shown in FIG. 25, "sps_ref_wraparound_enabled_flag" equal to 1 may indicate that horizontal wraparound motion compensation is applied to inter prediction, and "sps_ref_wraparound_enabled_flag" equal to 0 may indicate that horizontal wraparound motion compensation is not applied.
[0128]
[0162] In some embodiments, 'sps_ref_wraparound_offset_minus1'+1 may indicate the offset used to calculate the horizontal wraparound position in 'MinCbSizeY' luma samples. In some embodiments, the value of 'sps_ref_wraparound_offset_minus1' is greater than or equal to (CtbSizeY / MinCbSizeY)+1.
[0129]
[0163] In some embodiments, restrictions may be imposed on "pic_width_max_in_luma_samples," "CtbSizeY," and "MinCbSizeY." Figure 26 illustrates example sequence parameter set semantics for improved wraparound motion compensation with restrictions imposed on the variables "pic_width_max_in_luma_samples," "CtbSizeY," and "MinCbSizeY," according to some embodiments of the present disclosure. As shown in Figure 26, changes from the previous VVC are indicated in italics, and proposed deleted semantics are also indicated in strikethrough.
[0130]
[0164] In some embodiments, a constraint may be imposed on "pic_width_in_luma_samples," which is signaled in the PPS. Figure 27 illustrates example picture parameter set semantics for improved wraparound motion compensation with constraints imposed on the variable "pic_width_in_luma_samples," according to some embodiments of the present disclosure. As shown in Figure 27, changes from the previous VVC are indicated in italics, and proposed deleted semantics are also indicated in strikethrough.
[0131]
[0165] In some embodiments, the methods shown in Figures 9-11 may be combined with any of the methods shown in Figures 11-27. Because a special value is subtracted from the wraparound motion compensation offset before it is signaled to reduce signaling costs (e.g., the methods shown in Figures 9-10), when the methods are combined, the range limit of the wraparound motion compensation offset signaled in the bitstream may also be changed. For example, the same special value may be subtracted from both the upper and lower bounds. Furthermore, if the lower bound after subtraction is 0, it may be removed because the offset signaled in the bitstream is guaranteed to be a non-negative value in the VVC standard (e.g., VVC Draft 7).
[0132]
[0166]
[0013] Embodiments of the present disclosure further provide a method for performing motion compensation. Figure 28 shows a flowchart of an exemplary method for performing motion compensation according to some embodiments of the present disclosure. It should be understood that the method 28000 shown in Figure 28 may be performed according to the syntax and semantics shown in Figures 9 and 10.
[0133]
[0167] In step S28010, a sequence of pictures is received. The sequence is associated with a sequence wraparound motion compensation flag and a sequence wraparound motion compensation offset. The minimum value for the sequence motion compensation wraparound motion compensation offset is 0. For example, as shown in FIG. 9, to preserve the bits designated for the wraparound motion compensation offset, (CtbSizeY / MinCbSizeY)+2 may be subtracted from the wraparound motion compensation offset before it is signaled. As a result, the minimum value of this syntax element may be 0.
[0134]
[0168] In step S28020, it is determined whether the sequence wraparound motion compensation flag is enabled.
[0135]
[0169] In step S28030, in response to the sequence wraparound motion compensation flag being enabled, wraparound motion compensation is performed on a picture in the sequence of pictures according to the sequence wraparound motion compensation offset. In some embodiments, the motion compensation is performed in accordance with the VVC standard.
[0136]
[0170]
[0013] Embodiments of the present disclosure further provide a method for performing motion compensation with a limited range for sequence wrap-around motion compensation offsets. Figure 29 shows a flowchart of an exemplary method for performing motion compensation with a limited range for sequence wrap-around motion compensation offsets according to some embodiments of the present disclosure. It should be understood that the method 29000 shown in Figure 29 can be performed according to the semantics shown in Figure 11.
[0137]
[0171] In step S29010, a sequence of pictures is received. The sequence is associated with a sequence wraparound motion compensation flag and a sequence wraparound motion compensation offset. The range for the sequence wraparound motion compensation offset is limited according to the maximum width of a picture in the sequence of pictures. For example, as shown in FIG. 11, "pic_width_max_in_luma_samples" may represent the maximum width in luma samples of each decoded picture that references an SPS. The value of "sps_ref_wraparound_offset_minus1" may be in the range from (CtbSizeY / MinCbSizeY)+1 to (pic_width_max_in_luma_samples / MinCbSizeY)-1, inclusive.
[0138]
[0172] In step S29020, it is determined whether the sequence wraparound motion compensation flag is enabled.
[0139]
[0173] In step S29030, in response to the sequence wraparound motion compensation flag being enabled, wraparound motion compensation is performed on a picture in the sequence of pictures according to a sequence wraparound motion compensation offset. In some embodiments, the motion compensation is performed in accordance with the VVC standard. In some embodiments, wraparound motion compensation may be performed on multiple pictures in the sequence of pictures, and the multiple pictures may have different sizes. In some embodiments, wraparound motion compensation on a picture is performed according to the sequence wraparound motion compensation offset in response to the picture wraparound enable flag being enabled. The picture wraparound enable flag may be determined according to the sequence wraparound motion compensation flag. For example, as shown in FIG. 12, the picture wraparound enable flag may be determined from an equation including a variable "sps_ref_wraparound_enabled_flag".
[0140]
[0174]
[0071] Embodiments of the present disclosure further provide a method for performing motion compensation using pictures associated with sequence wrap-around motion compensation offsets. Figure 30 shows a flowchart of an exemplary method for performing motion compensation using pictures associated with sequence wrap-around motion compensation offsets according to some embodiments of the present disclosure. It should be understood that the method 30000 shown in Figure 30 can be performed in accordance with the syntax and semantics shown in Figures 14 and 15.
[0141]
[0175] In step S30010, a sequence of pictures is received. The sequence is associated with a sequence wraparound motion compensation flag, and pictures in the sequence are associated with picture wraparound motion compensation offsets. For example, as shown in Figure 14, a new variable "pps_ref_wraparound_offset" may be included in the picture parameter set.
[0142]
[0176] In step S30020, it is determined whether the sequence wraparound motion compensation flag is enabled.
[0143]
[0177] In step S30030, in response to the sequence wraparound motion compensation flag being enabled, wraparound motion compensation is performed on a picture in the sequence of pictures according to the sequence wraparound motion compensation offset. In some embodiments, the motion compensation is performed in accordance with the VVC standard. In some embodiments, wraparound motion compensation may be performed on multiple pictures in the sequence of pictures, and the multiple pictures may have different sizes.
[0144]
[0178] In some embodiments, wraparound motion compensation for a picture is performed according to a sequence wraparound motion compensation offset depending on whether a picture wraparound enable flag is enabled. The picture wraparound enable flag may be determined according to the sequence wraparound motion compensation flag. For example, as shown in FIG. 12, the picture wraparound enable flag may be determined from an equation including a variable "sps_ref_wraparound_enabled_flag." In some embodiments, the minimum value of the picture wraparound motion compensation offset is 0. For example, as shown in FIG. 18, the minimum value for the variable "pps_ref_wraparound_offset" may be 0.
[0145]
[0179] In some embodiments, a picture is associated with a picture wraparound motion compensation flag. Depending on whether the picture wraparound motion compensation flag is enabled, wraparound motion compensation may be performed on the picture according to a picture wraparound motion compensation offset. For example, as shown in Figure 21, a new variable "pps_ref_wraparound_enabled_flag" may be added to the picture parameter set. As shown in Figure 22, the variable "pps_ref_wraparound_enabled_flag" may indicate whether horizontal wraparound motion compensation is applied at the picture level. In some embodiments, depending on whether the picture wraparound motion compensation flag is enabled, a picture wraparound motion compensation offset may be signaled.
[0146]
[0180]
[0071] Embodiments of the present disclosure further provide a method for performing motion compensation with a constrained maximum picture size. Figure 31 shows a flowchart of an exemplary method for performing motion compensation with a constrained maximum picture size according to some embodiments of the present disclosure. It should be understood that the method 31000 shown in Figure 31 can be performed according to the semantics shown in Figure 25.
[0147]
[0181] In step S31010, a sequence of pictures is received, the sequence being associated with a sequence wraparound motion compensation flag, and pictures in the sequence being associated with picture wraparound motion compensation offsets.
[0148]
[0182] In step S31020, it is determined whether the sequence wraparound motion compensation flag is enabled.
[0149]
[0183] In step S31030, in response to the sequence wraparound motion compensation flag being enabled, wraparound motion compensation is performed on a picture in the sequence of pictures according to the sequence wraparound motion compensation offset. The maximum size of the picture is limited to a minimum value according to the sequence wraparound motion compensation offset. For example, as shown in Figure 26, the maximum picture width may be determined according to an equation including "sps_ref_wraparound_offset_minus1". In some embodiments, motion compensation is performed according to the VVC standard. In some embodiments, wraparound motion compensation may be performed on multiple pictures in the sequence of pictures, and the multiple pictures may have different sizes. In some embodiments, the size of the picture is limited to a minimum value according to the sequence wraparound motion compensation offset. For example, as shown in Figure 27, the picture width may be determined according to an equation including "sps_ref_wraparound_offset_minus1".
[0150]
[0184] Some embodiments also provide a non-transitory computer-readable storage medium containing instructions that can be executed by a device (such as the encoders and decoders of the present disclosure) to perform the methods described above. Common forms of non-transitory media include, for example, a floppy disk, a flexible disk, a hard disk, a solid-state drive, a magnetic tape, or any other magnetic data storage medium, a CD-ROM, any other optical data storage medium, any physical medium with a pattern of holes, RAM, PROM, and EPROM, FLASH-EPROM or any other flash memory, NVRAM, cache, registers, any other memory chip or cartridge, and networked versions thereof. A device may include one or more processors (CPUs), input / output interfaces, a network interface, and / or memory.
[0151]
[0185] It should be noted that relational terms herein, such as "first" and "second," are used merely to distinguish one entity or operation from another, and do not require or imply any actual relationship or order among those entities or operations. Furthermore, the words "comprising," "having," "containing," and "including," and other similar forms, are intended to be equivalent in meaning and to be open-ended in that the element or elements following any of these words are not meant to be an exclusive list of such elements or elements, or to be limited to only the listed element or elements.
[0152]
[0186] As used herein, unless specifically stated otherwise, the term "or" includes all possible combinations unless impracticable. For example, if it is stated that a database may include A or B, then, unless specifically stated otherwise or impracticable, the database may include A, or B, or A and B. As a second example, if it is stated that a database may include A, B, or C, then, unless specifically stated otherwise or impracticable, the database may include A, B, or C, or A and B, A and C, or B and C, or A, B, and C.
[0153]
[0187] It is understood that the above-described embodiments can be implemented by hardware, or software (program code), or a combination of hardware and software. If implemented by software, it can be stored in the above-described computer-readable medium. The software, when executed by a processor, can perform the methods of the present disclosure. The computational units and other functional units described in the present disclosure can be implemented by hardware, or software, or a combination of hardware and software. Those skilled in the art will also understand that multiple of the above-described modules / units can be combined into one module / unit, or that each of the above-described modules / units can be further divided into multiple sub-modules / sub-units.
[0154]
[0188] In the foregoing specification, embodiments have been described with reference to numerous specific details that may vary from implementation to implementation. Certain adaptations and modifications of the above-described embodiments may be made. Other embodiments may be apparent to those skilled in the art from consideration of the specification and practice of the invention disclosed herein. It is intended that the specification and examples be considered as examples only, with the true scope and spirit of the invention being indicated by the appended claims. It is also intended that the sequences of steps depicted in the figures are for illustrative purposes only and are not intended to be limited to any particular sequence of steps. Thus, one skilled in the art will recognize that these steps may be performed in different orders while implementing the same method.
[0155]
[0189] The embodiments can be further described using the following clauses. 1. 1. A method of performing motion compensation, comprising: receiving a first wraparound motion compensation flag, the first wraparound motion compensation flag being associated with the picture; determining whether a first wraparound motion compensation flag is valid; receiving a wraparound motion compensation offset in response to determining that the first wraparound motion compensation flag is valid, the wraparound motion compensation offset being associated with the picture; performing motion compensation on the picture according to a first wraparound motion compensation flag and a wraparound motion compensation offset; A method comprising: 2. receiving a second wraparound motion compensation flag, wherein the first wraparound motion compensation flag is associated with a set of pictures that includes the picture associated with the first wraparound motion compensation flag; determining whether a second wraparound motion compensation flag is invalid; and In response to determining that the second wraparound motion compensation flag is invalid, determining that the first wraparound motion compensation flag is also invalid; 2. The method of clause 1, further comprising: 3. Determining whether the first wraparound motion compensation flag is valid includes: determining a picture width of a picture associated with a first wraparound motion compensation flag; determining whether a first wraparound motion compensation flag is valid based on the picture width; 3. The method of clause 2, further comprising: 4. determining whether a luma coding tree block size of the minimum coding block unit plus one is greater than a picture width of the minimum coding block unit minus one; determining, in response to determining that the luma coding tree block size of the smallest coding block unit+1 is greater than a picture width of the picture of the smallest coding block unit−1, that the first motion compensation flag is invalid; 4. The method of clause 3, further comprising: 5. determining whether a second wraparound motion compensation flag is valid; and In response to determining that the second wraparound motion compensation flag is enabled, determining that a picture width of the picture is greater than or equal to the luma coding tree block size plus an offset; 5. The method of any one of clauses 2 to 4, further comprising: 6. The method of clause 5, further comprising determining, in response to determining that the second wraparound motion compensation flag is valid, that the luma coding tree block size+1 of the minimum coding block unit is less than or equal to the picture width-1 of the picture of the minimum coding block unit. 7. 7. The method of any one of clauses 2 to 6, wherein the second wraparound motion compensation flag is signaled in a sequence parameter set, and the first wraparound motion compensation flag and the wraparound motion compensation offset are signaled in a picture parameter set. 8. 8. The method according to any one of clauses 1 to 7, wherein motion compensation is performed in accordance with a versatile video coding standard. 9. 9. The method of any one of clauses 1 to 8, further comprising performing motion compensation on a plurality of pictures, the plurality of pictures having different sizes. 10. performing motion compensation on the picture according to a wrap-around motion compensation offset; determining a second wraparound motion compensation offset by adding an offset to the wraparound motion compensation offset received from the bitstream; performing motion compensation on the picture according to a second wraparound motion compensation offset; 10. The method of any one of clauses 1 to 9, further comprising: 11. 1. A system for performing motion compensation, comprising: a memory for storing a set of instructions; a processor, the processor comprising: receiving a first wraparound motion compensation offset, the first wraparound motion compensation offset being associated with picture i; determining whether a first wraparound motion compensation flag is valid; receiving a wraparound motion compensation offset in response to determining that the first wraparound motion compensation flag is valid, the wraparound motion compensation offset being associated with the picture; performing motion compensation on the picture according to a first wraparound motion compensation flag and a wraparound motion compensation offset; A system configured to execute a set of instructions to cause the system to execute a program. 12. The processor: receiving a second wraparound motion compensation flag, the second wraparound motion compensation flag being associated with a set of pictures that includes the picture associated with the first wraparound motion compensation flag; determining whether a second wraparound motion compensation flag is invalid; and In response to determining that the second wraparound motion compensation flag is invalid, determining that the first wraparound motion compensation flag is also invalid; 12. The system of claim 11, further configured to execute a set of instructions to cause the system to perform: 13. The processor: determining a picture width of a picture associated with a first wraparound motion compensation flag; determining whether a first wraparound motion compensation flag is valid based on the picture width; 13. The system of claim 12, further configured to execute a set of instructions to cause the system to perform: 14. The processor: determining whether a luma coding tree block size of the minimum coding block unit plus one is greater than a picture width of the minimum coding block unit minus one; determining, in response to determining that the luma coding tree block size of the smallest coding block unit+1 is greater than a picture width of the picture of the smallest coding block unit−1, that the first motion compensation flag is invalid; 14. The system of claim 13, further configured to execute a set of instructions to cause the system to perform: 15. The processor: determining whether a second wraparound motion compensation flag is valid; and In response to determining that the second wraparound motion compensation flag is enabled, determining that a picture width of the picture is greater than or equal to the luma coding tree block size plus an offset; 15. The system of any one of clauses 12 to 14, further configured to execute a set of instructions to cause the system to perform the following: 16. The processor: In response to determining that the second wraparound motion compensation flag is enabled, determining that a luma coding tree block size of the minimum coding block unit plus one is less than or equal to a picture width of the picture of the minimum coding block unit minus one. 16. The system of clause 15, further configured to execute a set of instructions to cause the system to perform: 17. 17. The system of any one of clauses 12 to 16, wherein the second wraparound motion compensation flag is signaled in a sequence parameter set, and the first wraparound motion compensation flag and the wraparound motion compensation offset are signaled in a picture parameter set. 18. The processor: Performing motion compensation on multiple pictures and further configured to execute a set of instructions to cause the system to execute: 18. The system of any one of clauses 11 to 17, wherein the pictures have different sizes. 19. The processor: determining a second wraparound motion compensation offset by adding an offset to the wraparound motion compensation offset received from the bitstream; performing motion compensation on the picture according to a second wraparound motion compensation offset; 19. The system of any one of clauses 11 to 18, further configured to execute a set of instructions to cause the system to perform the following: 20. 1. A non-transitory computer-readable medium storing a set of instructions, the set of instructions executable by one or more processors of an apparatus to cause the apparatus to initiate a method of performing motion compensation, the method comprising: receiving a first wraparound motion compensation flag, the first wraparound motion compensation flag being associated with a picture in the set of pictures; determining whether a first wraparound motion compensation flag is valid; receiving a wraparound motion compensation offset in response to determining that the first wraparound motion compensation flag is valid, the wraparound motion compensation offset being associated with the picture; performing motion compensation on the picture according to a first wraparound motion compensation flag and a wraparound motion compensation offset; 1. A non-transitory computer-readable medium comprising: twenty one. The set of instructions is determining a picture width of a picture associated with a first wraparound motion compensation flag; determining whether a first wraparound motion compensation flag is valid based on the picture width; 21. The non-transitory computer-readable medium of clause 20, executable by at least one processor of a computer system to cause the computer system to further execute.
[0156]
[0190] In the drawings and specification, illustrative embodiments have been disclosed. However, many variations and modifications to these embodiments may be made. Accordingly, although specific terms are employed, they are used in a generic and descriptive sense only and not for purposes of limitation.
Claims
1. 1. A method of performing motion compensation, comprising: receiving a first wraparound motion compensation flag, the first wraparound motion compensation flag being associated with a picture; determining whether the first wraparound motion compensation flag is valid; receiving a wraparound motion compensation offset in response to determining that the first wraparound motion compensation flag is valid, the wraparound motion compensation offset being associated with the picture; performing motion compensation on the picture according to the first wraparound motion compensation flag and the wraparound motion compensation offset; A method comprising:
2. receiving a second wraparound motion compensation flag, the first wraparound motion compensation flag being associated with a set of pictures that includes the picture associated with the first wraparound motion compensation flag; determining whether the second wraparound motion compensation flag is invalid; In response to determining that the second wraparound motion compensation flag is invalid, determining that the first wraparound motion compensation flag is invalid; and The method of claim 1 further comprising:
3. determining whether the first wraparound motion compensation flag is valid includes: determining a picture width of the picture associated with the first wraparound motion compensation flag; determining whether the first wraparound motion compensation flag is valid based on the picture width; The method of claim 2 further comprising:
4. determining whether a luma coding tree block size of a minimum coding block unit plus one is greater than the picture width of the picture of a minimum coding block unit minus one; determining, in response to determining that the luma coding tree block size in minimum coding block units + 1 is greater than the picture width of the picture in minimum coding block units - 1, that the first motion compensation flag is invalid; The method of claim 3 further comprising:
5. determining whether the second wraparound motion compensation flag is valid; and determining, in response to determining that the second wraparound motion compensation flag is enabled, a picture width of the picture that is greater than or equal to a luma coding tree block size plus an offset; The method of claim 2 further comprising:
6. 6. The method of claim 5, further comprising: in response to determining that the second wraparound motion compensation flag is enabled, determining that the luma coding tree block size of a smallest coding block unit plus one is less than or equal to the picture width of the picture of a smallest coding block unit minus one.
7. The method of claim 2 , wherein the second wraparound motion compensation flag is signaled in a sequence parameter set, and the first wraparound motion compensation flag and the wraparound motion compensation offset are signaled in a picture parameter set.
8. The method of claim 1 , wherein the motion compensation is performed in accordance with a versatile video coding standard.
9. The method of claim 1 , further comprising performing motion compensation on a plurality of pictures, the plurality of pictures having different sizes.
10. performing motion compensation on the picture according to the wrap-around motion compensation offset; determining a second wraparound motion compensation offset by adding an offset to the wraparound motion compensation offset received from the bitstream; performing motion compensation on the picture according to the second wraparound motion compensation offset; The method of claim 1 further comprising:
11. 1. A system for performing motion compensation, comprising: a memory for storing a set of instructions; a processor, the processor comprising: receiving a first wraparound motion compensation offset, the first wraparound motion compensation offset being associated with a picture; determining whether the first wraparound motion compensation flag is valid; receiving a wraparound motion compensation offset in response to determining that the first wraparound motion compensation flag is valid, the wraparound motion compensation offset being associated with the picture; performing motion compensation on the picture according to the first wraparound motion compensation flag and the wraparound motion compensation offset; a system configured to execute the set of instructions to cause the system to perform
12. the processor: receiving a second wraparound motion compensation flag, the second wraparound motion compensation flag being associated with a set of pictures that includes the picture associated with the first wraparound motion compensation flag; determining whether the second wraparound motion compensation flag is invalid; In response to determining that the second wraparound motion compensation flag is invalid, determining that the first wraparound motion compensation flag is invalid; and 12. The system of claim 11, further configured to execute the set of instructions to cause the system to perform:
13. the processor: determining a picture width of the picture associated with the first wraparound motion compensation flag; determining whether the first wraparound motion compensation flag is valid based on the picture width; The system of claim 12 , further configured to execute the set of instructions to cause the system to perform:
14. the processor: determining whether a luma coding tree block size of a minimum coding block unit plus one is greater than the picture width of the picture of a minimum coding block unit minus one; determining, in response to determining that the luma coding tree block size in minimum coding block units + 1 is greater than the picture width of the picture in minimum coding block units - 1, that the first motion compensation flag is invalid; 14. The system of claim 13, further configured to execute the set of instructions to cause the system to perform:
15. the processor: determining whether the second wraparound motion compensation flag is valid; and determining, in response to determining that the second wraparound motion compensation flag is enabled, a picture width of the picture that is greater than or equal to a luma coding tree block size plus an offset; The system of claim 12 , further configured to execute the set of instructions to cause the system to perform:
16. the processor: determining, in response to determining that the second wraparound motion compensation flag is valid, that the luma coding tree block size of a minimum coding block unit plus one is less than or equal to the picture width of the picture of a minimum coding block unit minus one; 16. The system of claim 15, further configured to execute the set of instructions to cause the system to perform:
17. 13. The system of claim 12, wherein the second wraparound motion compensation flag is signaled in a sequence parameter set, and the first wraparound motion compensation flag and the wraparound motion compensation offset are signaled in a picture parameter set.
18. the processor: Performing motion compensation on a plurality of pictures, the plurality of pictures having different sizes.
12. The system of claim 11, further configured to execute the set of instructions to cause the system to perform:
19. the processor: determining a second wraparound motion compensation offset by adding an offset to the wraparound motion compensation offset received from the bitstream; performing motion compensation on the picture according to the second wraparound motion compensation offset; 12. The system of claim 11, further configured to execute the set of instructions to cause the system to perform:
20. 1. A non-transitory computer-readable medium storing a set of instructions, the set of instructions executable by one or more processors of an apparatus to cause the apparatus to initiate a method of performing motion compensation, the method comprising: receiving a first wraparound motion compensation flag, the first wraparound motion compensation flag being associated with a picture in a set of pictures; determining whether the first wraparound motion compensation flag is valid; receiving a wraparound motion compensation offset in response to determining that the first wraparound motion compensation flag is valid, the wraparound motion compensation offset being associated with the picture; performing motion compensation on the picture according to the first wraparound motion compensation flag and the wraparound motion compensation offset; 1. A non-transitory computer-readable medium comprising:
Citation Information
Patent Citations
Clipping in reference picture resampling
WO2021036977A1